1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
18 #include <rte_malloc.h>
19 #include <ethdev_driver.h>
20 #include <ethdev_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_common.h>
24 #include <rte_kvargs.h>
25 #include <rte_rwlock.h>
26 #include <rte_spinlock.h>
27 #include <rte_string_fns.h>
28 #include <rte_alarm.h>
29 #include <rte_eal_paging.h>
31 #include <mlx5_glue.h>
32 #include <mlx5_devx_cmds.h>
33 #include <mlx5_common.h>
34 #include <mlx5_common_mp.h>
35 #include <mlx5_common_mr.h>
36 #include <mlx5_malloc.h>
38 #include "mlx5_defs.h"
40 #include "mlx5_common_os.h"
41 #include "mlx5_utils.h"
42 #include "mlx5_rxtx.h"
43 #include "mlx5_autoconf.h"
45 #include "mlx5_flow.h"
46 #include "rte_pmd_mlx5.h"
47 #include "mlx5_verbs.h"
49 #include "mlx5_devx.h"
51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
53 #ifndef HAVE_IBV_MLX5_MOD_MPW
54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
64 /* Spinlock for mlx5_shared_data allocation. */
65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
67 /* Process local data for secondary processes. */
68 static struct mlx5_local_data mlx5_local_data;
71 * Set the completion channel file descriptor interrupt as non-blocking.
74 * Pointer to RQ channel object, which includes the channel fd
77 * The file descriptor (representing the intetrrupt) used in this channel.
80 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
83 mlx5_os_set_nonblock_channel_fd(int fd)
87 flags = fcntl(fd, F_GETFL);
88 return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
92 * Get mlx5 device attributes. The glue function query_device_ex() is called
93 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
94 * device attributes from the glue out parameter.
97 * Pointer to ibv context.
100 * Pointer to mlx5 device attributes.
103 * 0 on success, non zero error number otherwise
106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
109 struct ibv_device_attr_ex attr_ex;
110 memset(device_attr, 0, sizeof(*device_attr));
111 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
115 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
116 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
117 device_attr->max_sge = attr_ex.orig_attr.max_sge;
118 device_attr->max_cq = attr_ex.orig_attr.max_cq;
119 device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
120 device_attr->max_mr = attr_ex.orig_attr.max_mr;
121 device_attr->max_pd = attr_ex.orig_attr.max_pd;
122 device_attr->max_qp = attr_ex.orig_attr.max_qp;
123 device_attr->max_srq = attr_ex.orig_attr.max_srq;
124 device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
125 device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
126 device_attr->max_rwq_indirection_table_size =
127 attr_ex.rss_caps.max_rwq_indirection_table_size;
128 device_attr->max_tso = attr_ex.tso_caps.max_tso;
129 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
131 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
132 err = mlx5_glue->dv_query_device(ctx, &dv_attr);
136 device_attr->flags = dv_attr.flags;
137 device_attr->comp_mask = dv_attr.comp_mask;
138 #ifdef HAVE_IBV_MLX5_MOD_SWP
139 device_attr->sw_parsing_offloads =
140 dv_attr.sw_parsing_caps.sw_parsing_offloads;
142 device_attr->min_single_stride_log_num_of_bytes =
143 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
144 device_attr->max_single_stride_log_num_of_bytes =
145 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
146 device_attr->min_single_wqe_log_num_of_strides =
147 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
148 device_attr->max_single_wqe_log_num_of_strides =
149 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
150 device_attr->stride_supported_qpts =
151 dv_attr.striding_rq_caps.supported_qpts;
152 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
153 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
160 * Verbs callback to allocate a memory. This function should allocate the space
161 * according to the size provided residing inside a huge page.
162 * Please note that all allocation must respect the alignment from libmlx5
163 * (i.e. currently rte_mem_page_size()).
166 * The size in bytes of the memory to allocate.
168 * A pointer to the callback data.
171 * Allocated buffer, NULL otherwise and rte_errno is set.
174 mlx5_alloc_verbs_buf(size_t size, void *data)
176 struct mlx5_dev_ctx_shared *sh = data;
178 size_t alignment = rte_mem_page_size();
179 if (alignment == (size_t)-1) {
180 DRV_LOG(ERR, "Failed to get mem page size");
185 MLX5_ASSERT(data != NULL);
186 ret = mlx5_malloc(0, size, alignment, sh->numa_node);
193 * Verbs callback to free a memory.
196 * A pointer to the memory to free.
198 * A pointer to the callback data.
201 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
203 MLX5_ASSERT(data != NULL);
208 * Initialize DR related data within private structure.
209 * Routine checks the reference counter and does actual
210 * resources creation/initialization only if counter is zero.
213 * Pointer to the private device data structure.
216 * Zero on success, positive error code otherwise.
219 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
221 struct mlx5_dev_ctx_shared *sh = priv->sh;
222 char s[MLX5_HLIST_NAMESIZE] __rte_unused;
225 MLX5_ASSERT(sh && sh->refcnt);
228 err = mlx5_alloc_table_hash_list(priv);
231 /* The resources below are only valid with DV support. */
232 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
233 /* Init port id action cache list. */
234 snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
235 mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
236 flow_dv_port_id_create_cb,
237 flow_dv_port_id_match_cb,
238 flow_dv_port_id_remove_cb);
239 /* Init push vlan action cache list. */
240 snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
241 mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
242 flow_dv_push_vlan_create_cb,
243 flow_dv_push_vlan_match_cb,
244 flow_dv_push_vlan_remove_cb);
245 /* Init sample action cache list. */
246 snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
247 mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh,
248 flow_dv_sample_create_cb,
249 flow_dv_sample_match_cb,
250 flow_dv_sample_remove_cb);
251 /* Init dest array action cache list. */
252 snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
253 mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh,
254 flow_dv_dest_array_create_cb,
255 flow_dv_dest_array_match_cb,
256 flow_dv_dest_array_remove_cb);
257 /* Create tags hash list table. */
258 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
259 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
260 MLX5_HLIST_WRITE_MOST,
261 flow_dv_tag_create_cb,
262 flow_dv_tag_match_cb,
263 flow_dv_tag_remove_cb);
264 if (!sh->tag_table) {
265 DRV_LOG(ERR, "tags with hash creation failed.");
269 sh->tag_table->ctx = sh;
270 snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
271 sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
272 0, MLX5_HLIST_WRITE_MOST |
273 MLX5_HLIST_DIRECT_KEY,
274 flow_dv_modify_create_cb,
275 flow_dv_modify_match_cb,
276 flow_dv_modify_remove_cb);
277 if (!sh->modify_cmds) {
278 DRV_LOG(ERR, "hdr modify hash creation failed");
282 sh->modify_cmds->ctx = sh;
283 snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
284 sh->encaps_decaps = mlx5_hlist_create(s,
285 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
286 0, MLX5_HLIST_DIRECT_KEY |
287 MLX5_HLIST_WRITE_MOST,
288 flow_dv_encap_decap_create_cb,
289 flow_dv_encap_decap_match_cb,
290 flow_dv_encap_decap_remove_cb);
291 if (!sh->encaps_decaps) {
292 DRV_LOG(ERR, "encap decap hash creation failed");
296 sh->encaps_decaps->ctx = sh;
298 #ifdef HAVE_MLX5DV_DR
301 /* Reference counter is zero, we should initialize structures. */
302 domain = mlx5_glue->dr_create_domain(sh->ctx,
303 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
305 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
309 sh->rx_domain = domain;
310 domain = mlx5_glue->dr_create_domain(sh->ctx,
311 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
313 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
317 sh->tx_domain = domain;
318 #ifdef HAVE_MLX5DV_DR_ESWITCH
319 if (priv->config.dv_esw_en) {
320 domain = mlx5_glue->dr_create_domain
321 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
323 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
327 sh->fdb_domain = domain;
328 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
332 err = mlx5_alloc_tunnel_hub(sh);
334 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
337 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
338 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
339 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
341 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
343 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
344 #endif /* HAVE_MLX5DV_DR */
345 sh->default_miss_action =
346 mlx5_glue->dr_create_flow_action_default_miss();
347 if (!sh->default_miss_action)
348 DRV_LOG(WARNING, "Default miss action is not supported.");
351 /* Rollback the created objects. */
353 mlx5_glue->dr_destroy_domain(sh->rx_domain);
354 sh->rx_domain = NULL;
357 mlx5_glue->dr_destroy_domain(sh->tx_domain);
358 sh->tx_domain = NULL;
360 if (sh->fdb_domain) {
361 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
362 sh->fdb_domain = NULL;
364 if (sh->esw_drop_action) {
365 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
366 sh->esw_drop_action = NULL;
368 if (sh->pop_vlan_action) {
369 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
370 sh->pop_vlan_action = NULL;
372 if (sh->encaps_decaps) {
373 mlx5_hlist_destroy(sh->encaps_decaps);
374 sh->encaps_decaps = NULL;
376 if (sh->modify_cmds) {
377 mlx5_hlist_destroy(sh->modify_cmds);
378 sh->modify_cmds = NULL;
381 /* tags should be destroyed with flow before. */
382 mlx5_hlist_destroy(sh->tag_table);
383 sh->tag_table = NULL;
385 if (sh->tunnel_hub) {
386 mlx5_release_tunnel_hub(sh, priv->dev_port);
387 sh->tunnel_hub = NULL;
389 mlx5_free_table_hash_list(priv);
394 * Destroy DR related data within private structure.
397 * Pointer to the private device data structure.
400 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
402 struct mlx5_dev_ctx_shared *sh = priv->sh;
404 MLX5_ASSERT(sh && sh->refcnt);
407 #ifdef HAVE_MLX5DV_DR
409 mlx5_glue->dr_destroy_domain(sh->rx_domain);
410 sh->rx_domain = NULL;
413 mlx5_glue->dr_destroy_domain(sh->tx_domain);
414 sh->tx_domain = NULL;
416 #ifdef HAVE_MLX5DV_DR_ESWITCH
417 if (sh->fdb_domain) {
418 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
419 sh->fdb_domain = NULL;
421 if (sh->esw_drop_action) {
422 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
423 sh->esw_drop_action = NULL;
426 if (sh->pop_vlan_action) {
427 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
428 sh->pop_vlan_action = NULL;
430 #endif /* HAVE_MLX5DV_DR */
431 if (sh->default_miss_action)
432 mlx5_glue->destroy_flow_action
433 (sh->default_miss_action);
434 if (sh->encaps_decaps) {
435 mlx5_hlist_destroy(sh->encaps_decaps);
436 sh->encaps_decaps = NULL;
438 if (sh->modify_cmds) {
439 mlx5_hlist_destroy(sh->modify_cmds);
440 sh->modify_cmds = NULL;
443 /* tags should be destroyed with flow before. */
444 mlx5_hlist_destroy(sh->tag_table);
445 sh->tag_table = NULL;
447 if (sh->tunnel_hub) {
448 mlx5_release_tunnel_hub(sh, priv->dev_port);
449 sh->tunnel_hub = NULL;
451 mlx5_cache_list_destroy(&sh->port_id_action_list);
452 mlx5_cache_list_destroy(&sh->push_vlan_action_list);
453 mlx5_free_table_hash_list(priv);
457 * Initialize shared data between primary and secondary process.
459 * A memzone is reserved by primary process and secondary processes attach to
463 * 0 on success, a negative errno value otherwise and rte_errno is set.
466 mlx5_init_shared_data(void)
468 const struct rte_memzone *mz;
471 rte_spinlock_lock(&mlx5_shared_data_lock);
472 if (mlx5_shared_data == NULL) {
473 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
474 /* Allocate shared memory. */
475 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
476 sizeof(*mlx5_shared_data),
480 "Cannot allocate mlx5 shared data");
484 mlx5_shared_data = mz->addr;
485 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
486 rte_spinlock_init(&mlx5_shared_data->lock);
488 /* Lookup allocated shared memory. */
489 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
492 "Cannot attach mlx5 shared data");
496 mlx5_shared_data = mz->addr;
497 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
501 rte_spinlock_unlock(&mlx5_shared_data_lock);
506 * PMD global initialization.
508 * Independent from individual device, this function initializes global
509 * per-PMD data structures distinguishing primary and secondary processes.
510 * Hence, each initialization is called once per a process.
513 * 0 on success, a negative errno value otherwise and rte_errno is set.
518 struct mlx5_shared_data *sd;
519 struct mlx5_local_data *ld = &mlx5_local_data;
522 if (mlx5_init_shared_data())
524 sd = mlx5_shared_data;
526 rte_spinlock_lock(&sd->lock);
527 switch (rte_eal_process_type()) {
528 case RTE_PROC_PRIMARY:
531 LIST_INIT(&sd->mem_event_cb_list);
532 rte_rwlock_init(&sd->mem_event_rwlock);
533 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
534 mlx5_mr_mem_event_cb, NULL);
535 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
536 mlx5_mp_os_primary_handle);
539 sd->init_done = true;
541 case RTE_PROC_SECONDARY:
544 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
545 mlx5_mp_os_secondary_handle);
549 ld->init_done = true;
555 rte_spinlock_unlock(&sd->lock);
560 * Create the Tx queue DevX/Verbs object.
563 * Pointer to Ethernet device.
565 * Queue index in DPDK Tx queue array.
568 * 0 on success, a negative errno value otherwise and rte_errno is set.
571 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
573 struct mlx5_priv *priv = dev->data->dev_private;
574 struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
575 struct mlx5_txq_ctrl *txq_ctrl =
576 container_of(txq_data, struct mlx5_txq_ctrl, txq);
578 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
579 return mlx5_txq_devx_obj_new(dev, idx);
580 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
581 if (!priv->config.dv_esw_en)
582 return mlx5_txq_devx_obj_new(dev, idx);
584 return mlx5_txq_ibv_obj_new(dev, idx);
588 * Release an Tx DevX/verbs queue object.
591 * DevX/Verbs Tx queue object.
594 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
596 if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
597 mlx5_txq_devx_obj_release(txq_obj);
600 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
601 if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
602 mlx5_txq_devx_obj_release(txq_obj);
606 mlx5_txq_ibv_obj_release(txq_obj);
610 * DV flow counter mode detect and config.
613 * Pointer to rte_eth_dev structure.
617 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
619 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
620 struct mlx5_priv *priv = dev->data->dev_private;
621 struct mlx5_dev_ctx_shared *sh = priv->sh;
624 #ifndef HAVE_IBV_DEVX_ASYNC
628 if (!priv->config.devx || !priv->config.dv_flow_en ||
629 !priv->config.hca_attr.flow_counters_dump ||
630 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
631 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
635 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
636 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
637 priv->config.hca_attr.flow_counters_dump,
638 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
639 /* Initialize fallback mode only on the port initializes sh. */
641 sh->cmng.counter_fallback = fallback;
642 else if (fallback != sh->cmng.counter_fallback)
643 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
644 "with others:%d.", PORT_ID(priv), fallback);
649 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
651 struct mlx5_priv *priv = dev->data->dev_private;
652 void *ctx = priv->sh->ctx;
654 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
655 if (!priv->q_counters) {
656 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
659 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
660 "by DevX - fall-back to use the kernel driver global "
661 "queue counter.", dev->data->port_id);
662 /* Create WQ by kernel and query its queue counter ID. */
664 wq = mlx5_glue->create_wq(ctx,
665 &(struct ibv_wq_init_attr){
666 .wq_type = IBV_WQT_RQ,
673 /* Counter is assigned only on RDY state. */
674 int ret = mlx5_glue->modify_wq(wq,
675 &(struct ibv_wq_attr){
676 .attr_mask = IBV_WQ_ATTR_STATE,
677 .wq_state = IBV_WQS_RDY,
681 mlx5_devx_cmd_wq_query(wq,
682 &priv->counter_set_id);
683 claim_zero(mlx5_glue->destroy_wq(wq));
685 claim_zero(mlx5_glue->destroy_cq(cq));
688 priv->counter_set_id = priv->q_counters->id;
690 if (priv->counter_set_id == 0)
691 DRV_LOG(INFO, "Part of the port %d statistics will not be "
692 "available.", dev->data->port_id);
696 * Spawn an Ethernet device from Verbs information.
699 * Backing DPDK device.
701 * Verbs device parameters (name, port, switch_info) to spawn.
703 * Device configuration parameters.
706 * A valid Ethernet device object on success, NULL otherwise and rte_errno
707 * is set. The following errors are defined:
709 * EBUSY: device is not supposed to be spawned.
710 * EEXIST: device is already spawned
712 static struct rte_eth_dev *
713 mlx5_dev_spawn(struct rte_device *dpdk_dev,
714 struct mlx5_dev_spawn_data *spawn,
715 struct mlx5_dev_config *config)
717 const struct mlx5_switch_info *switch_info = &spawn->info;
718 struct mlx5_dev_ctx_shared *sh = NULL;
719 struct ibv_port_attr port_attr;
720 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
721 struct rte_eth_dev *eth_dev = NULL;
722 struct mlx5_priv *priv = NULL;
724 unsigned int hw_padding = 0;
726 unsigned int tunnel_en = 0;
727 unsigned int mpls_en = 0;
728 unsigned int swp = 0;
729 unsigned int mprq = 0;
730 unsigned int mprq_min_stride_size_n = 0;
731 unsigned int mprq_max_stride_size_n = 0;
732 unsigned int mprq_min_stride_num_n = 0;
733 unsigned int mprq_max_stride_num_n = 0;
734 struct rte_ether_addr mac;
735 char name[RTE_ETH_NAME_MAX_LEN];
736 int own_domain_id = 0;
739 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
740 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
743 /* Determine if this port representor is supposed to be spawned. */
744 if (switch_info->representor && dpdk_dev->devargs) {
745 struct rte_eth_devargs eth_da;
747 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
750 DRV_LOG(ERR, "failed to process device arguments: %s",
751 strerror(rte_errno));
754 if (eth_da.type == RTE_ETH_REPRESENTOR_NONE) {
755 /* Representor not specified. */
759 if (eth_da.type != RTE_ETH_REPRESENTOR_VF) {
761 DRV_LOG(ERR, "unsupported representor type: %s",
762 dpdk_dev->devargs->args);
765 for (i = 0; i < eth_da.nb_representor_ports; ++i)
766 if (eth_da.representor_ports[i] ==
767 (uint16_t)switch_info->port_name)
769 if (i == eth_da.nb_representor_ports) {
774 /* Build device name. */
775 if (spawn->pf_bond < 0) {
777 if (!switch_info->representor)
778 strlcpy(name, dpdk_dev->name, sizeof(name));
780 snprintf(name, sizeof(name), "%s_representor_%u",
781 dpdk_dev->name, switch_info->port_name);
783 /* Bonding device. */
784 if (!switch_info->representor)
785 snprintf(name, sizeof(name), "%s_%s",
787 mlx5_os_get_dev_device_name(spawn->phys_dev));
789 snprintf(name, sizeof(name), "%s_%s_representor_%u",
791 mlx5_os_get_dev_device_name(spawn->phys_dev),
792 switch_info->port_name);
794 /* check if the device is already spawned */
795 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
799 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
800 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
801 struct mlx5_mp_id mp_id;
803 eth_dev = rte_eth_dev_attach_secondary(name);
804 if (eth_dev == NULL) {
805 DRV_LOG(ERR, "can not attach rte ethdev");
809 priv = eth_dev->data->dev_private;
810 if (priv->sh->bond_dev != UINT16_MAX)
811 /* For bonding port, use primary PCI device. */
813 rte_eth_devices[priv->sh->bond_dev].device;
815 eth_dev->device = dpdk_dev;
816 eth_dev->dev_ops = &mlx5_dev_sec_ops;
817 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
818 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
819 err = mlx5_proc_priv_init(eth_dev);
822 mp_id.port_id = eth_dev->data->port_id;
823 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
824 /* Receive command fd from primary process */
825 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
828 /* Remap UAR for Tx queues. */
829 err = mlx5_tx_uar_init_secondary(eth_dev, err);
833 * Ethdev pointer is still required as input since
834 * the primary device is not accessible from the
837 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
838 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
841 mlx5_dev_close(eth_dev);
845 * Some parameters ("tx_db_nc" in particularly) are needed in
846 * advance to create dv/verbs device context. We proceed the
847 * devargs here to get ones, and later proceed devargs again
848 * to override some hardware settings.
850 err = mlx5_args(config, dpdk_dev->devargs);
853 DRV_LOG(ERR, "failed to process device arguments: %s",
854 strerror(rte_errno));
857 if (config->dv_miss_info) {
858 if (switch_info->master || switch_info->representor)
859 config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
861 mlx5_malloc_mem_select(config->sys_mem_en);
862 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
865 config->devx = sh->devx;
866 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
867 config->dest_tir = 1;
869 #ifdef HAVE_IBV_MLX5_MOD_SWP
870 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
873 * Multi-packet send is supported by ConnectX-4 Lx PF as well
874 * as all ConnectX-5 devices.
876 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
877 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
879 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
880 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
882 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
883 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
884 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
885 DRV_LOG(DEBUG, "enhanced MPW is supported");
886 mps = MLX5_MPW_ENHANCED;
888 DRV_LOG(DEBUG, "MPW is supported");
892 DRV_LOG(DEBUG, "MPW isn't supported");
893 mps = MLX5_MPW_DISABLED;
895 #ifdef HAVE_IBV_MLX5_MOD_SWP
896 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
897 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
898 DRV_LOG(DEBUG, "SWP support: %u", swp);
901 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
902 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
903 struct mlx5dv_striding_rq_caps mprq_caps =
904 dv_attr.striding_rq_caps;
906 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
907 mprq_caps.min_single_stride_log_num_of_bytes);
908 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
909 mprq_caps.max_single_stride_log_num_of_bytes);
910 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
911 mprq_caps.min_single_wqe_log_num_of_strides);
912 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
913 mprq_caps.max_single_wqe_log_num_of_strides);
914 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
915 mprq_caps.supported_qpts);
916 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
918 mprq_min_stride_size_n =
919 mprq_caps.min_single_stride_log_num_of_bytes;
920 mprq_max_stride_size_n =
921 mprq_caps.max_single_stride_log_num_of_bytes;
922 mprq_min_stride_num_n =
923 mprq_caps.min_single_wqe_log_num_of_strides;
924 mprq_max_stride_num_n =
925 mprq_caps.max_single_wqe_log_num_of_strides;
928 /* Rx CQE compression is enabled by default. */
929 config->cqe_comp = 1;
930 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
931 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
932 tunnel_en = ((dv_attr.tunnel_offloads_caps &
933 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
934 (dv_attr.tunnel_offloads_caps &
935 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
936 (dv_attr.tunnel_offloads_caps &
937 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
939 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
940 tunnel_en ? "" : "not ");
943 "tunnel offloading disabled due to old OFED/rdma-core version");
945 config->tunnel_en = tunnel_en;
946 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
947 mpls_en = ((dv_attr.tunnel_offloads_caps &
948 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
949 (dv_attr.tunnel_offloads_caps &
950 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
951 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
952 mpls_en ? "" : "not ");
954 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
955 " old OFED/rdma-core version or firmware configuration");
957 config->mpls_en = mpls_en;
958 /* Check port status. */
959 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
961 DRV_LOG(ERR, "port query failed: %s", strerror(err));
964 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
965 DRV_LOG(ERR, "port is not configured in Ethernet mode");
969 if (port_attr.state != IBV_PORT_ACTIVE)
970 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
971 mlx5_glue->port_state_str(port_attr.state),
973 /* Allocate private eth device data. */
974 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
976 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
978 DRV_LOG(ERR, "priv allocation failure");
983 priv->dev_port = spawn->phys_port;
984 priv->pci_dev = spawn->pci_dev;
985 priv->mtu = RTE_ETHER_MTU;
986 /* Some internal functions rely on Netlink sockets, open them now. */
987 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
988 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
989 priv->representor = !!switch_info->representor;
990 priv->master = !!switch_info->master;
991 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
992 priv->vport_meta_tag = 0;
993 priv->vport_meta_mask = 0;
994 priv->pf_bond = spawn->pf_bond;
995 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
997 * The DevX port query API is implemented. E-Switch may use
998 * either vport or reg_c[0] metadata register to match on
999 * vport index. The engaged part of metadata register is
1002 if (switch_info->representor || switch_info->master) {
1003 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1004 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1005 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
1009 "can't query devx port %d on device %s",
1011 mlx5_os_get_dev_device_name(spawn->phys_dev));
1012 devx_port.comp_mask = 0;
1015 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1016 priv->vport_meta_tag = devx_port.reg_c_0.value;
1017 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1018 if (!priv->vport_meta_mask) {
1019 DRV_LOG(ERR, "vport zero mask for port %d"
1020 " on bonding device %s",
1022 mlx5_os_get_dev_device_name
1027 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1028 DRV_LOG(ERR, "invalid vport tag for port %d"
1029 " on bonding device %s",
1031 mlx5_os_get_dev_device_name
1037 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1038 priv->vport_id = devx_port.vport_num;
1039 } else if (spawn->pf_bond >= 0) {
1040 DRV_LOG(ERR, "can't deduce vport index for port %d"
1041 " on bonding device %s",
1043 mlx5_os_get_dev_device_name(spawn->phys_dev));
1047 /* Suppose vport index in compatible way. */
1048 priv->vport_id = switch_info->representor ?
1049 switch_info->port_name + 1 : -1;
1053 * Kernel/rdma_core support single E-Switch per PF configurations
1054 * only and vport_id field contains the vport index for
1055 * associated VF, which is deduced from representor port name.
1056 * For example, let's have the IB device port 10, it has
1057 * attached network device eth0, which has port name attribute
1058 * pf0vf2, we can deduce the VF number as 2, and set vport index
1059 * as 3 (2+1). This assigning schema should be changed if the
1060 * multiple E-Switch instances per PF configurations or/and PCI
1061 * subfunctions are added.
1063 priv->vport_id = switch_info->representor ?
1064 switch_info->port_name + 1 : -1;
1066 /* representor_id field keeps the unmodified VF index. */
1067 priv->representor_id = switch_info->representor ?
1068 switch_info->port_name : -1;
1070 * Look for sibling devices in order to reuse their switch domain
1071 * if any, otherwise allocate one.
1073 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1074 const struct mlx5_priv *opriv =
1075 rte_eth_devices[port_id].data->dev_private;
1078 opriv->sh != priv->sh ||
1080 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1082 priv->domain_id = opriv->domain_id;
1085 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1086 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1089 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1090 strerror(rte_errno));
1095 /* Override some values set by hardware configuration. */
1096 mlx5_args(config, dpdk_dev->devargs);
1097 err = mlx5_dev_check_sibling_config(priv, config);
1100 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1101 IBV_DEVICE_RAW_IP_CSUM);
1102 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1103 (config->hw_csum ? "" : "not "));
1104 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1105 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1106 DRV_LOG(DEBUG, "counters are not supported");
1108 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1109 if (config->dv_flow_en) {
1110 DRV_LOG(WARNING, "DV flow is not supported");
1111 config->dv_flow_en = 0;
1114 config->ind_table_max_size =
1115 sh->device_attr.max_rwq_indirection_table_size;
1117 * Remove this check once DPDK supports larger/variable
1118 * indirection tables.
1120 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1121 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1122 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1123 config->ind_table_max_size);
1124 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1125 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1126 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1127 (config->hw_vlan_strip ? "" : "not "));
1128 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1129 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1130 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1131 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1132 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1133 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1134 IBV_DEVICE_PCI_WRITE_END_PADDING);
1136 if (config->hw_padding && !hw_padding) {
1137 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1138 config->hw_padding = 0;
1139 } else if (config->hw_padding) {
1140 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1142 config->tso = (sh->device_attr.max_tso > 0 &&
1143 (sh->device_attr.tso_supported_qpts &
1144 (1 << IBV_QPT_RAW_PACKET)));
1146 config->tso_max_payload_sz = sh->device_attr.max_tso;
1148 * MPW is disabled by default, while the Enhanced MPW is enabled
1151 if (config->mps == MLX5_ARG_UNSET)
1152 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1155 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1156 DRV_LOG(INFO, "%sMPS is %s",
1157 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1158 config->mps == MLX5_MPW ? "legacy " : "",
1159 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1161 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1166 /* Check relax ordering support. */
1167 if (!haswell_broadwell_cpu) {
1168 sh->cmng.relaxed_ordering_write =
1169 config->hca_attr.relaxed_ordering_write;
1170 sh->cmng.relaxed_ordering_read =
1171 config->hca_attr.relaxed_ordering_read;
1173 sh->cmng.relaxed_ordering_read = 0;
1174 sh->cmng.relaxed_ordering_write = 0;
1176 /* Check for LRO support. */
1177 if (config->dest_tir && config->hca_attr.lro_cap &&
1178 config->dv_flow_en) {
1179 /* TBD check tunnel lro caps. */
1180 config->lro.supported = config->hca_attr.lro_cap;
1181 DRV_LOG(DEBUG, "Device supports LRO");
1183 * If LRO timeout is not configured by application,
1184 * use the minimal supported value.
1186 if (!config->lro.timeout)
1187 config->lro.timeout =
1188 config->hca_attr.lro_timer_supported_periods[0];
1189 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1190 config->lro.timeout);
1191 DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1192 "required for coalescing is %d bytes",
1193 config->hca_attr.lro_min_mss_size);
1195 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1196 if (config->hca_attr.qos.sup &&
1197 config->hca_attr.qos.flow_meter_old &&
1198 config->dv_flow_en) {
1199 uint8_t reg_c_mask =
1200 config->hca_attr.qos.flow_meter_reg_c_ids;
1202 * Meter needs two REG_C's for color match and pre-sfx
1203 * flow match. Here get the REG_C for color match.
1204 * REG_C_0 and REG_C_1 is reserved for metadata feature.
1207 if (__builtin_popcount(reg_c_mask) < 1) {
1209 DRV_LOG(WARNING, "No available register for"
1213 * The meter color register is used by the
1214 * flow-hit feature as well.
1215 * The flow-hit feature must use REG_C_3
1216 * Prefer REG_C_3 if it is available.
1218 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1219 priv->mtr_color_reg = REG_C_3;
1221 priv->mtr_color_reg = ffs(reg_c_mask)
1224 priv->mtr_reg_share =
1225 config->hca_attr.qos.flow_meter;
1226 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1227 priv->mtr_color_reg);
1231 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1232 if (config->hca_attr.flow_hit_aso &&
1233 priv->mtr_color_reg == REG_C_3) {
1234 sh->flow_hit_aso_en = 1;
1235 err = mlx5_flow_aso_age_mng_init(sh);
1240 DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1242 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1243 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1244 if (config->hca_attr.log_max_ft_sampler_num > 0 &&
1245 config->dv_flow_en) {
1246 priv->sampler_en = 1;
1247 DRV_LOG(DEBUG, "The Sampler enabled!\n");
1249 priv->sampler_en = 0;
1250 if (!config->hca_attr.log_max_ft_sampler_num)
1251 DRV_LOG(WARNING, "No available register for"
1254 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1258 if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1259 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1260 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1261 config->cqe_comp = 0;
1263 if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1264 (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1265 DRV_LOG(WARNING, "Flow Tag CQE compression"
1266 " format isn't supported.");
1267 config->cqe_comp = 0;
1269 if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1270 (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1271 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1272 " format isn't supported.");
1273 config->cqe_comp = 0;
1275 DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1276 config->cqe_comp ? "" : "not ");
1277 if (config->tx_pp) {
1278 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1279 config->hca_attr.dev_freq_khz);
1280 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1281 config->hca_attr.qos.packet_pacing ? "" : "not ");
1282 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1283 config->hca_attr.cross_channel ? "" : "not ");
1284 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1285 config->hca_attr.wqe_index_ignore ? "" : "not ");
1286 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1287 config->hca_attr.non_wire_sq ? "" : "not ");
1288 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1289 config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1290 config->hca_attr.log_max_static_sq_wq);
1291 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1292 config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1293 if (!config->devx) {
1294 DRV_LOG(ERR, "DevX is required for packet pacing");
1298 if (!config->hca_attr.qos.packet_pacing) {
1299 DRV_LOG(ERR, "Packet pacing is not supported");
1303 if (!config->hca_attr.cross_channel) {
1304 DRV_LOG(ERR, "Cross channel operations are"
1305 " required for packet pacing");
1309 if (!config->hca_attr.wqe_index_ignore) {
1310 DRV_LOG(ERR, "WQE index ignore feature is"
1311 " required for packet pacing");
1315 if (!config->hca_attr.non_wire_sq) {
1316 DRV_LOG(ERR, "Non-wire SQ feature is"
1317 " required for packet pacing");
1321 if (!config->hca_attr.log_max_static_sq_wq) {
1322 DRV_LOG(ERR, "Static WQE SQ feature is"
1323 " required for packet pacing");
1327 if (!config->hca_attr.qos.wqe_rate_pp) {
1328 DRV_LOG(ERR, "WQE rate mode is required"
1329 " for packet pacing");
1333 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1334 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1335 " can't create queues for packet pacing");
1341 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1343 err = config->hca_attr.access_register_user ?
1344 mlx5_devx_cmd_register_read
1345 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1346 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1350 /* MTUTC register is read successfully. */
1351 ts_mode = MLX5_GET(register_mtutc, reg,
1353 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1354 config->rt_timestamp = 1;
1356 /* Kernel does not support register reading. */
1357 if (config->hca_attr.dev_freq_khz ==
1358 (NS_PER_S / MS_PER_S))
1359 config->rt_timestamp = 1;
1363 * If HW has bug working with tunnel packet decapsulation and
1364 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1365 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1367 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1368 config->hw_fcs_strip = 0;
1369 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1370 (config->hw_fcs_strip ? "" : "not "));
1371 if (config->mprq.enabled && mprq) {
1372 if (config->mprq.stride_num_n &&
1373 (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1374 config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1375 config->mprq.stride_num_n =
1376 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1377 mprq_min_stride_num_n),
1378 mprq_max_stride_num_n);
1380 "the number of strides"
1381 " for Multi-Packet RQ is out of range,"
1382 " setting default value (%u)",
1383 1 << config->mprq.stride_num_n);
1385 if (config->mprq.stride_size_n &&
1386 (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1387 config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1388 config->mprq.stride_size_n =
1389 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1390 mprq_min_stride_size_n),
1391 mprq_max_stride_size_n);
1393 "the size of a stride"
1394 " for Multi-Packet RQ is out of range,"
1395 " setting default value (%u)",
1396 1 << config->mprq.stride_size_n);
1398 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1399 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1400 } else if (config->mprq.enabled && !mprq) {
1401 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1402 config->mprq.enabled = 0;
1404 if (config->max_dump_files_num == 0)
1405 config->max_dump_files_num = 128;
1406 eth_dev = rte_eth_dev_allocate(name);
1407 if (eth_dev == NULL) {
1408 DRV_LOG(ERR, "can not allocate rte ethdev");
1412 if (priv->representor) {
1413 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1414 eth_dev->data->representor_id = priv->representor_id;
1416 priv->mp_id.port_id = eth_dev->data->port_id;
1417 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1419 * Store associated network device interface index. This index
1420 * is permanent throughout the lifetime of device. So, we may store
1421 * the ifindex here and use the cached value further.
1423 MLX5_ASSERT(spawn->ifindex);
1424 priv->if_index = spawn->ifindex;
1425 if (priv->pf_bond >= 0 && priv->master) {
1426 /* Get bond interface info */
1427 err = mlx5_sysfs_bond_info(priv->if_index,
1428 &priv->bond_ifindex,
1431 DRV_LOG(ERR, "unable to get bond info: %s",
1432 strerror(rte_errno));
1434 DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1435 priv->if_index, priv->bond_ifindex,
1438 eth_dev->data->dev_private = priv;
1439 priv->dev_data = eth_dev->data;
1440 eth_dev->data->mac_addrs = priv->mac;
1441 if (spawn->pf_bond < 0) {
1442 eth_dev->device = dpdk_dev;
1444 /* Use primary bond PCI as device. */
1445 if (sh->bond_dev == UINT16_MAX) {
1446 sh->bond_dev = eth_dev->data->port_id;
1447 eth_dev->device = dpdk_dev;
1449 eth_dev->device = rte_eth_devices[sh->bond_dev].device;
1452 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1453 /* Configure the first MAC address by default. */
1454 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1456 "port %u cannot get MAC address, is mlx5_en"
1457 " loaded? (errno: %s)",
1458 eth_dev->data->port_id, strerror(rte_errno));
1463 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1464 eth_dev->data->port_id,
1465 mac.addr_bytes[0], mac.addr_bytes[1],
1466 mac.addr_bytes[2], mac.addr_bytes[3],
1467 mac.addr_bytes[4], mac.addr_bytes[5]);
1468 #ifdef RTE_LIBRTE_MLX5_DEBUG
1470 char ifname[MLX5_NAMESIZE];
1472 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1473 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1474 eth_dev->data->port_id, ifname);
1476 DRV_LOG(DEBUG, "port %u ifname is unknown",
1477 eth_dev->data->port_id);
1480 /* Get actual MTU if possible. */
1481 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1486 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1488 /* Initialize burst functions to prevent crashes before link-up. */
1489 eth_dev->rx_pkt_burst = removed_rx_burst;
1490 eth_dev->tx_pkt_burst = removed_tx_burst;
1491 eth_dev->dev_ops = &mlx5_dev_ops;
1492 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1493 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1494 eth_dev->rx_queue_count = mlx5_rx_queue_count;
1495 /* Register MAC address. */
1496 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1497 if (config->vf && config->vf_nl_en)
1498 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1499 mlx5_ifindex(eth_dev),
1500 eth_dev->data->mac_addrs,
1501 MLX5_MAX_MAC_ADDRESSES);
1503 priv->ctrl_flows = 0;
1504 rte_spinlock_init(&priv->flow_list_lock);
1505 TAILQ_INIT(&priv->flow_meters);
1506 TAILQ_INIT(&priv->flow_meter_profiles);
1507 /* Hint libmlx5 to use PMD allocator for data plane resources */
1508 mlx5_glue->dv_set_context_attr(sh->ctx,
1509 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1510 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1511 .alloc = &mlx5_alloc_verbs_buf,
1512 .free = &mlx5_free_verbs_buf,
1515 /* Bring Ethernet device up. */
1516 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1517 eth_dev->data->port_id);
1518 mlx5_set_link_up(eth_dev);
1520 * Even though the interrupt handler is not installed yet,
1521 * interrupts will still trigger on the async_fd from
1522 * Verbs context returned by ibv_open_device().
1524 mlx5_link_update(eth_dev, 0);
1525 #ifdef HAVE_MLX5DV_DR_ESWITCH
1526 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1527 (switch_info->representor || switch_info->master)))
1528 config->dv_esw_en = 0;
1530 config->dv_esw_en = 0;
1532 /* Detect minimal data bytes to inline. */
1533 mlx5_set_min_inline(spawn, config);
1534 /* Store device configuration on private structure. */
1535 priv->config = *config;
1536 /* Create context for virtual machine VLAN workaround. */
1537 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1538 if (config->dv_flow_en) {
1539 err = mlx5_alloc_shared_dr(priv);
1543 if (config->devx && config->dv_flow_en && config->dest_tir) {
1544 priv->obj_ops = devx_obj_ops;
1545 priv->obj_ops.drop_action_create =
1546 ibv_obj_ops.drop_action_create;
1547 priv->obj_ops.drop_action_destroy =
1548 ibv_obj_ops.drop_action_destroy;
1549 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1550 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1552 if (config->dv_esw_en)
1553 priv->obj_ops.txq_obj_modify =
1554 ibv_obj_ops.txq_obj_modify;
1556 /* Use specific wrappers for Tx object. */
1557 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1558 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1559 mlx5_queue_counter_id_prepare(eth_dev);
1562 priv->obj_ops = ibv_obj_ops;
1564 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1565 if (!priv->drop_queue.hrxq)
1567 /* Supported Verbs flow priority number detection. */
1568 err = mlx5_flow_discover_priorities(eth_dev);
1573 priv->config.flow_prio = err;
1574 if (!priv->config.dv_esw_en &&
1575 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1576 DRV_LOG(WARNING, "metadata mode %u is not supported "
1577 "(no E-Switch)", priv->config.dv_xmeta_en);
1578 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1580 mlx5_set_metadata_mask(eth_dev);
1581 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1582 !priv->sh->dv_regc0_mask) {
1583 DRV_LOG(ERR, "metadata mode %u is not supported "
1584 "(no metadata reg_c[0] is available)",
1585 priv->config.dv_xmeta_en);
1589 mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1590 mlx5_hrxq_create_cb,
1592 mlx5_hrxq_remove_cb);
1593 /* Query availability of metadata reg_c's. */
1594 err = mlx5_flow_discover_mreg_c(eth_dev);
1599 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1601 "port %u extensive metadata register is not supported",
1602 eth_dev->data->port_id);
1603 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1604 DRV_LOG(ERR, "metadata mode %u is not supported "
1605 "(no metadata registers available)",
1606 priv->config.dv_xmeta_en);
1611 if (priv->config.dv_flow_en &&
1612 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1613 mlx5_flow_ext_mreg_supported(eth_dev) &&
1614 priv->sh->dv_regc0_mask) {
1615 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1616 MLX5_FLOW_MREG_HTABLE_SZ,
1618 flow_dv_mreg_create_cb,
1619 flow_dv_mreg_match_cb,
1620 flow_dv_mreg_remove_cb);
1621 if (!priv->mreg_cp_tbl) {
1625 priv->mreg_cp_tbl->ctx = eth_dev;
1627 rte_spinlock_init(&priv->shared_act_sl);
1628 mlx5_flow_counter_mode_config(eth_dev);
1629 if (priv->config.dv_flow_en)
1630 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1634 if (priv->mreg_cp_tbl)
1635 mlx5_hlist_destroy(priv->mreg_cp_tbl);
1637 mlx5_os_free_shared_dr(priv);
1638 if (priv->nl_socket_route >= 0)
1639 close(priv->nl_socket_route);
1640 if (priv->nl_socket_rdma >= 0)
1641 close(priv->nl_socket_rdma);
1642 if (priv->vmwa_context)
1643 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1644 if (eth_dev && priv->drop_queue.hrxq)
1645 mlx5_drop_action_destroy(eth_dev);
1647 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1648 mlx5_cache_list_destroy(&priv->hrxqs);
1650 if (eth_dev != NULL)
1651 eth_dev->data->dev_private = NULL;
1653 if (eth_dev != NULL) {
1654 /* mac_addrs must not be freed alone because part of
1657 eth_dev->data->mac_addrs = NULL;
1658 rte_eth_dev_release_port(eth_dev);
1661 mlx5_free_shared_dev_ctx(sh);
1662 MLX5_ASSERT(err > 0);
1668 * Comparison callback to sort device data.
1670 * This is meant to be used with qsort().
1673 * Pointer to pointer to first data object.
1675 * Pointer to pointer to second data object.
1678 * 0 if both objects are equal, less than 0 if the first argument is less
1679 * than the second, greater than 0 otherwise.
1682 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1684 const struct mlx5_switch_info *si_a =
1685 &((const struct mlx5_dev_spawn_data *)a)->info;
1686 const struct mlx5_switch_info *si_b =
1687 &((const struct mlx5_dev_spawn_data *)b)->info;
1690 /* Master device first. */
1691 ret = si_b->master - si_a->master;
1694 /* Then representor devices. */
1695 ret = si_b->representor - si_a->representor;
1698 /* Unidentified devices come last in no specific order. */
1699 if (!si_a->representor)
1701 /* Order representors by name. */
1702 return si_a->port_name - si_b->port_name;
1706 * Match PCI information for possible slaves of bonding device.
1708 * @param[in] ibv_dev
1709 * Pointer to Infiniband device structure.
1710 * @param[in] pci_dev
1711 * Pointer to PCI device structure to match PCI address.
1712 * @param[in] nl_rdma
1713 * Netlink RDMA group socket handle.
1716 * negative value if no bonding device found, otherwise
1717 * positive index of slave PF in bonding.
1720 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1721 const struct rte_pci_device *pci_dev,
1724 char ifname[IF_NAMESIZE + 1];
1725 unsigned int ifindex;
1731 * Try to get master device name. If something goes
1732 * wrong suppose the lack of kernel support and no
1737 if (!strstr(ibv_dev->name, "bond"))
1739 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1743 * The Master device might not be on the predefined
1744 * port (not on port index 1, it is not garanted),
1745 * we have to scan all Infiniband device port and
1748 for (i = 1; i <= np; ++i) {
1749 /* Check whether Infiniband port is populated. */
1750 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1753 if (!if_indextoname(ifindex, ifname))
1755 /* Try to read bonding slave names from sysfs. */
1757 "/sys/class/net/%s/master/bonding/slaves", ifname);
1758 file = fopen(slaves, "r");
1764 /* Use safe format to check maximal buffer length. */
1765 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1766 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1767 char tmp_str[IF_NAMESIZE + 32];
1768 struct rte_pci_addr pci_addr;
1769 struct mlx5_switch_info info;
1771 /* Process slave interface names in the loop. */
1772 snprintf(tmp_str, sizeof(tmp_str),
1773 "/sys/class/net/%s", ifname);
1774 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1775 DRV_LOG(WARNING, "can not get PCI address"
1776 " for netdev \"%s\"", ifname);
1779 if (pci_dev->addr.domain != pci_addr.domain ||
1780 pci_dev->addr.bus != pci_addr.bus ||
1781 pci_dev->addr.devid != pci_addr.devid ||
1782 pci_dev->addr.function != pci_addr.function)
1784 /* Slave interface PCI address match found. */
1786 snprintf(tmp_str, sizeof(tmp_str),
1787 "/sys/class/net/%s/phys_port_name", ifname);
1788 file = fopen(tmp_str, "rb");
1791 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1792 if (fscanf(file, "%32s", tmp_str) == 1)
1793 mlx5_translate_port_name(tmp_str, &info);
1794 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1795 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1796 pf = info.port_name;
1805 * DPDK callback to register a PCI device.
1807 * This function spawns Ethernet devices out of a given PCI device.
1809 * @param[in] pci_drv
1810 * PCI driver structure (mlx5_driver).
1811 * @param[in] pci_dev
1812 * PCI device information.
1815 * 0 on success, a negative errno value otherwise and rte_errno is set.
1818 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1819 struct rte_pci_device *pci_dev)
1821 struct ibv_device **ibv_list;
1823 * Number of found IB Devices matching with requested PCI BDF.
1824 * nd != 1 means there are multiple IB devices over the same
1825 * PCI device and we have representors and master.
1827 unsigned int nd = 0;
1829 * Number of found IB device Ports. nd = 1 and np = 1..n means
1830 * we have the single multiport IB device, and there may be
1831 * representors attached to some of found ports.
1833 unsigned int np = 0;
1835 * Number of DPDK ethernet devices to Spawn - either over
1836 * multiple IB devices or multiple ports of single IB device.
1837 * Actually this is the number of iterations to spawn.
1839 unsigned int ns = 0;
1842 * < 0 - no bonding device (single one)
1843 * >= 0 - bonding device (value is slave PF index)
1846 struct mlx5_dev_spawn_data *list = NULL;
1847 struct mlx5_dev_config dev_config;
1848 unsigned int dev_config_vf;
1851 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1852 mlx5_pmd_socket_init();
1853 ret = mlx5_init_once();
1855 DRV_LOG(ERR, "unable to init PMD global data: %s",
1856 strerror(rte_errno));
1860 ibv_list = mlx5_glue->get_device_list(&ret);
1862 rte_errno = errno ? errno : ENOSYS;
1863 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1867 * First scan the list of all Infiniband devices to find
1868 * matching ones, gathering into the list.
1870 struct ibv_device *ibv_match[ret + 1];
1871 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1872 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1876 struct rte_pci_addr pci_addr;
1878 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1879 bd = mlx5_device_bond_pci_match
1880 (ibv_list[ret], pci_dev, nl_rdma);
1883 * Bonding device detected. Only one match is allowed,
1884 * the bonding is supported over multi-port IB device,
1885 * there should be no matches on representor PCI
1886 * functions or non VF LAG bonding devices with
1887 * specified address.
1891 "multiple PCI match on bonding device"
1892 "\"%s\" found", ibv_list[ret]->name);
1897 DRV_LOG(INFO, "PCI information matches for"
1898 " slave %d bonding device \"%s\"",
1899 bd, ibv_list[ret]->name);
1900 ibv_match[nd++] = ibv_list[ret];
1903 if (mlx5_dev_to_pci_addr
1904 (ibv_list[ret]->ibdev_path, &pci_addr))
1906 if (pci_dev->addr.domain != pci_addr.domain ||
1907 pci_dev->addr.bus != pci_addr.bus ||
1908 pci_dev->addr.devid != pci_addr.devid ||
1909 pci_dev->addr.function != pci_addr.function)
1911 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1912 ibv_list[ret]->name);
1913 ibv_match[nd++] = ibv_list[ret];
1915 ibv_match[nd] = NULL;
1917 /* No device matches, just complain and bail out. */
1919 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1920 " are kernel drivers loaded?",
1921 pci_dev->addr.domain, pci_dev->addr.bus,
1922 pci_dev->addr.devid, pci_dev->addr.function);
1929 * Found single matching device may have multiple ports.
1930 * Each port may be representor, we have to check the port
1931 * number and check the representors existence.
1934 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1936 DRV_LOG(WARNING, "can not get IB device \"%s\""
1937 " ports number", ibv_match[0]->name);
1938 if (bd >= 0 && !np) {
1939 DRV_LOG(ERR, "can not get ports"
1940 " for bonding device");
1946 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1949 * This may happen if there is VF LAG kernel support and
1950 * application is compiled with older rdma_core library.
1953 "No kernel/verbs support for VF LAG bonding found.");
1954 rte_errno = ENOTSUP;
1960 * Now we can determine the maximal
1961 * amount of devices to be spawned.
1963 list = mlx5_malloc(MLX5_MEM_ZERO,
1964 sizeof(struct mlx5_dev_spawn_data) *
1966 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1968 DRV_LOG(ERR, "spawn data array allocation failure");
1973 if (bd >= 0 || np > 1) {
1975 * Single IB device with multiple ports found,
1976 * it may be E-Switch master device and representors.
1977 * We have to perform identification through the ports.
1979 MLX5_ASSERT(nl_rdma >= 0);
1980 MLX5_ASSERT(ns == 0);
1981 MLX5_ASSERT(nd == 1);
1983 for (i = 1; i <= np; ++i) {
1984 list[ns].max_port = np;
1985 list[ns].phys_port = i;
1986 list[ns].phys_dev = ibv_match[0];
1987 list[ns].eth_dev = NULL;
1988 list[ns].pci_dev = pci_dev;
1989 list[ns].pf_bond = bd;
1990 list[ns].ifindex = mlx5_nl_ifindex
1992 mlx5_os_get_dev_device_name
1993 (list[ns].phys_dev), i);
1994 if (!list[ns].ifindex) {
1996 * No network interface index found for the
1997 * specified port, it means there is no
1998 * representor on this port. It's OK,
1999 * there can be disabled ports, for example
2000 * if sriov_numvfs < sriov_totalvfs.
2006 ret = mlx5_nl_switch_info
2010 if (ret || (!list[ns].info.representor &&
2011 !list[ns].info.master)) {
2013 * We failed to recognize representors with
2014 * Netlink, let's try to perform the task
2017 ret = mlx5_sysfs_switch_info
2021 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2022 if (!ret && bd >= 0) {
2023 switch (list[ns].info.name_type) {
2024 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2025 if (list[ns].info.port_name == bd)
2028 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2030 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2031 if (list[ns].info.pf_num == bd)
2040 if (!ret && (list[ns].info.representor ^
2041 list[ns].info.master))
2046 "unable to recognize master/representors"
2047 " on the IB device with multiple ports");
2054 * The existence of several matching entries (nd > 1) means
2055 * port representors have been instantiated. No existing Verbs
2056 * call nor sysfs entries can tell them apart, this can only
2057 * be done through Netlink calls assuming kernel drivers are
2058 * recent enough to support them.
2060 * In the event of identification failure through Netlink,
2061 * try again through sysfs, then:
2063 * 1. A single IB device matches (nd == 1) with single
2064 * port (np=0/1) and is not a representor, assume
2065 * no switch support.
2067 * 2. Otherwise no safe assumptions can be made;
2068 * complain louder and bail out.
2070 for (i = 0; i != nd; ++i) {
2071 memset(&list[ns].info, 0, sizeof(list[ns].info));
2072 list[ns].max_port = 1;
2073 list[ns].phys_port = 1;
2074 list[ns].phys_dev = ibv_match[i];
2075 list[ns].eth_dev = NULL;
2076 list[ns].pci_dev = pci_dev;
2077 list[ns].pf_bond = -1;
2078 list[ns].ifindex = 0;
2080 list[ns].ifindex = mlx5_nl_ifindex
2082 mlx5_os_get_dev_device_name
2083 (list[ns].phys_dev), 1);
2084 if (!list[ns].ifindex) {
2085 char ifname[IF_NAMESIZE];
2088 * Netlink failed, it may happen with old
2089 * ib_core kernel driver (before 4.16).
2090 * We can assume there is old driver because
2091 * here we are processing single ports IB
2092 * devices. Let's try sysfs to retrieve
2093 * the ifindex. The method works for
2094 * master device only.
2098 * Multiple devices found, assume
2099 * representors, can not distinguish
2100 * master/representor and retrieve
2101 * ifindex via sysfs.
2105 ret = mlx5_get_ifname_sysfs
2106 (ibv_match[i]->ibdev_path, ifname);
2109 if_nametoindex(ifname);
2110 if (!list[ns].ifindex) {
2112 * No network interface index found
2113 * for the specified device, it means
2114 * there it is neither representor
2122 ret = mlx5_nl_switch_info
2126 if (ret || (!list[ns].info.representor &&
2127 !list[ns].info.master)) {
2129 * We failed to recognize representors with
2130 * Netlink, let's try to perform the task
2133 ret = mlx5_sysfs_switch_info
2137 if (!ret && (list[ns].info.representor ^
2138 list[ns].info.master)) {
2140 } else if ((nd == 1) &&
2141 !list[ns].info.representor &&
2142 !list[ns].info.master) {
2144 * Single IB device with
2145 * one physical port and
2146 * attached network device.
2147 * May be SRIOV is not enabled
2148 * or there is no representors.
2150 DRV_LOG(INFO, "no E-Switch support detected");
2157 "unable to recognize master/representors"
2158 " on the multiple IB devices");
2166 * Sort list to probe devices in natural order for users convenience
2167 * (i.e. master first, then representors from lowest to highest ID).
2169 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2170 /* Device specific configuration. */
2171 switch (pci_dev->id.device_id) {
2172 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2173 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2174 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2175 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2176 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2177 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2178 case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2185 for (i = 0; i != ns; ++i) {
2188 /* Default configuration. */
2189 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2190 dev_config.vf = dev_config_vf;
2191 dev_config.mps = MLX5_ARG_UNSET;
2192 dev_config.dbnc = MLX5_ARG_UNSET;
2193 dev_config.rx_vec_en = 1;
2194 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2195 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2196 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2197 dev_config.txqs_inline = MLX5_ARG_UNSET;
2198 dev_config.vf_nl_en = 1;
2199 dev_config.mr_ext_memseg_en = 1;
2200 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2201 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2202 dev_config.dv_esw_en = 1;
2203 dev_config.dv_flow_en = 1;
2204 dev_config.decap_en = 1;
2205 dev_config.log_hp_size = MLX5_ARG_UNSET;
2206 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2209 if (!list[i].eth_dev) {
2210 if (rte_errno != EBUSY && rte_errno != EEXIST)
2212 /* Device is disabled or already spawned. Ignore it. */
2215 restore = list[i].eth_dev->data->dev_flags;
2216 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2217 /* Restore non-PCI flags cleared by the above call. */
2218 list[i].eth_dev->data->dev_flags |= restore;
2219 rte_eth_dev_probing_finish(list[i].eth_dev);
2223 "probe of PCI device " PCI_PRI_FMT " aborted after"
2224 " encountering an error: %s",
2225 pci_dev->addr.domain, pci_dev->addr.bus,
2226 pci_dev->addr.devid, pci_dev->addr.function,
2227 strerror(rte_errno));
2231 if (!list[i].eth_dev)
2233 mlx5_dev_close(list[i].eth_dev);
2234 /* mac_addrs must not be freed because in dev_private */
2235 list[i].eth_dev->data->mac_addrs = NULL;
2236 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2238 /* Restore original error. */
2245 * Do the routine cleanup:
2246 * - close opened Netlink sockets
2247 * - free allocated spawn data array
2248 * - free the Infiniband device list
2256 MLX5_ASSERT(ibv_list);
2257 mlx5_glue->free_device_list(ibv_list);
2262 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2267 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2268 /* Get environment variable to store. */
2269 env = getenv(MLX5_SHUT_UP_BF);
2270 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2271 if (config->dbnc == MLX5_ARG_UNSET)
2272 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2274 setenv(MLX5_SHUT_UP_BF,
2275 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2280 mlx5_restore_doorbell_mapping_env(int value)
2282 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2283 /* Restore the original environment variable state. */
2284 if (value == MLX5_ARG_UNSET)
2285 unsetenv(MLX5_SHUT_UP_BF);
2287 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2291 * Extract pdn of PD object using DV API.
2294 * Pointer to the verbs PD object.
2296 * Pointer to the PD object number variable.
2299 * 0 on success, error value otherwise.
2302 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2304 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2305 struct mlx5dv_obj obj;
2306 struct mlx5dv_pd pd_info;
2310 obj.pd.out = &pd_info;
2311 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2313 DRV_LOG(DEBUG, "Fail to get PD object info");
2322 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2326 * Function API to open IB device.
2328 * This function calls the Linux glue APIs to open a device.
2331 * Pointer to the IB device attributes (name, port, etc).
2332 * @param[out] config
2333 * Pointer to device configuration structure.
2335 * Pointer to shared context structure.
2338 * 0 on success, a positive error value otherwise.
2341 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2342 const struct mlx5_dev_config *config,
2343 struct mlx5_dev_ctx_shared *sh)
2348 sh->numa_node = spawn->pci_dev->device.numa_node;
2349 pthread_mutex_init(&sh->txpp.mutex, NULL);
2351 * Configure environment variable "MLX5_BF_SHUT_UP"
2352 * before the device creation. The rdma_core library
2353 * checks the variable at device creation and
2354 * stores the result internally.
2356 dbmap_env = mlx5_config_doorbell_mapping_env(config);
2357 /* Try to open IB device with DV first, then usual Verbs. */
2359 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2362 DRV_LOG(DEBUG, "DevX is supported");
2363 /* The device is created, no need for environment. */
2364 mlx5_restore_doorbell_mapping_env(dbmap_env);
2366 /* The environment variable is still configured. */
2367 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2368 err = errno ? errno : ENODEV;
2370 * The environment variable is not needed anymore,
2371 * all device creation attempts are completed.
2373 mlx5_restore_doorbell_mapping_env(dbmap_env);
2376 DRV_LOG(DEBUG, "DevX is NOT supported");
2379 if (!err && sh->ctx) {
2380 /* Hint libmlx5 to use PMD allocator for data plane resources */
2381 mlx5_glue->dv_set_context_attr(sh->ctx,
2382 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2383 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2384 .alloc = &mlx5_alloc_verbs_buf,
2385 .free = &mlx5_free_verbs_buf,
2393 * Install shared asynchronous device events handler.
2394 * This function is implemented to support event sharing
2395 * between multiple ports of single IB device.
2398 * Pointer to mlx5_dev_ctx_shared object.
2401 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2406 sh->intr_handle.fd = -1;
2407 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2408 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2409 F_SETFL, flags | O_NONBLOCK);
2411 DRV_LOG(INFO, "failed to change file descriptor async event"
2414 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2415 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2416 if (rte_intr_callback_register(&sh->intr_handle,
2417 mlx5_dev_interrupt_handler, sh)) {
2418 DRV_LOG(INFO, "Fail to install the shared interrupt.");
2419 sh->intr_handle.fd = -1;
2423 #ifdef HAVE_IBV_DEVX_ASYNC
2424 sh->intr_handle_devx.fd = -1;
2426 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2427 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2429 DRV_LOG(INFO, "failed to allocate devx_comp.");
2432 flags = fcntl(devx_comp->fd, F_GETFL);
2433 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2435 DRV_LOG(INFO, "failed to change file descriptor"
2439 sh->intr_handle_devx.fd = devx_comp->fd;
2440 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2441 if (rte_intr_callback_register(&sh->intr_handle_devx,
2442 mlx5_dev_interrupt_handler_devx, sh)) {
2443 DRV_LOG(INFO, "Fail to install the devx shared"
2445 sh->intr_handle_devx.fd = -1;
2447 #endif /* HAVE_IBV_DEVX_ASYNC */
2452 * Uninstall shared asynchronous device events handler.
2453 * This function is implemented to support event sharing
2454 * between multiple ports of single IB device.
2457 * Pointer to mlx5_dev_ctx_shared object.
2460 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2462 if (sh->intr_handle.fd >= 0)
2463 mlx5_intr_callback_unregister(&sh->intr_handle,
2464 mlx5_dev_interrupt_handler, sh);
2465 #ifdef HAVE_IBV_DEVX_ASYNC
2466 if (sh->intr_handle_devx.fd >= 0)
2467 rte_intr_callback_unregister(&sh->intr_handle_devx,
2468 mlx5_dev_interrupt_handler_devx, sh);
2470 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2475 * Read statistics by a named counter.
2478 * Pointer to the private device data structure.
2479 * @param[in] ctr_name
2480 * Pointer to the name of the statistic counter to read
2482 * Pointer to read statistic value.
2484 * 0 on success and stat is valud, 1 if failed to read the value
2489 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2495 if (priv->q_counters != NULL &&
2496 strcmp(ctr_name, "out_of_buffer") == 0)
2497 return mlx5_devx_cmd_queue_counter_query(priv->sh->ctx,
2498 0, (uint32_t *)stat);
2499 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2500 priv->sh->ibdev_path,
2503 fd = open(path, O_RDONLY);
2505 * in switchdev the file location is not per port
2506 * but rather in <ibdev_path>/hw_counters/<file_name>.
2509 MKSTR(path1, "%s/hw_counters/%s",
2510 priv->sh->ibdev_path,
2512 fd = open(path1, O_RDONLY);
2515 char buf[21] = {'\0'};
2516 ssize_t n = read(fd, buf, sizeof(buf));
2520 *stat = strtoull(buf, NULL, 10);
2530 * Set the reg_mr and dereg_mr call backs
2532 * @param reg_mr_cb[out]
2533 * Pointer to reg_mr func
2534 * @param dereg_mr_cb[out]
2535 * Pointer to dereg_mr func
2539 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2540 mlx5_dereg_mr_t *dereg_mr_cb)
2542 *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2543 *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2547 * Remove a MAC address from device
2550 * Pointer to Ethernet device structure.
2552 * MAC address index.
2555 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2557 struct mlx5_priv *priv = dev->data->dev_private;
2558 const int vf = priv->config.vf;
2561 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2562 mlx5_ifindex(dev), priv->mac_own,
2563 &dev->data->mac_addrs[index], index);
2567 * Adds a MAC address to the device
2570 * Pointer to Ethernet device structure.
2572 * MAC address to register.
2574 * MAC address index.
2577 * 0 on success, a negative errno value otherwise
2580 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2583 struct mlx5_priv *priv = dev->data->dev_private;
2584 const int vf = priv->config.vf;
2588 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2589 mlx5_ifindex(dev), priv->mac_own,
2595 * Modify a VF MAC address
2598 * Pointer to device private data.
2600 * MAC address to modify into.
2602 * Net device interface index
2607 * 0 on success, a negative errno value otherwise
2610 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2611 unsigned int iface_idx,
2612 struct rte_ether_addr *mac_addr,
2615 return mlx5_nl_vf_mac_addr_modify
2616 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2620 * Set device promiscuous mode
2623 * Pointer to Ethernet device structure.
2625 * 0 - promiscuous is disabled, otherwise - enabled
2628 * 0 on success, a negative error value otherwise
2631 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2633 struct mlx5_priv *priv = dev->data->dev_private;
2635 return mlx5_nl_promisc(priv->nl_socket_route,
2636 mlx5_ifindex(dev), !!enable);
2640 * Set device promiscuous mode
2643 * Pointer to Ethernet device structure.
2645 * 0 - all multicase is disabled, otherwise - enabled
2648 * 0 on success, a negative error value otherwise
2651 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2653 struct mlx5_priv *priv = dev->data->dev_private;
2655 return mlx5_nl_allmulti(priv->nl_socket_route,
2656 mlx5_ifindex(dev), !!enable);
2660 * Flush device MAC addresses
2663 * Pointer to Ethernet device structure.
2667 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2669 struct mlx5_priv *priv = dev->data->dev_private;
2671 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2672 dev->data->mac_addrs,
2673 MLX5_MAX_MAC_ADDRESSES, priv->mac_own);