1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
18 #include <rte_malloc.h>
19 #include <rte_ethdev_driver.h>
20 #include <rte_ethdev_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_common.h>
24 #include <rte_kvargs.h>
25 #include <rte_rwlock.h>
26 #include <rte_spinlock.h>
27 #include <rte_string_fns.h>
28 #include <rte_alarm.h>
29 #include <rte_eal_paging.h>
31 #include <mlx5_glue.h>
32 #include <mlx5_devx_cmds.h>
33 #include <mlx5_common.h>
34 #include <mlx5_common_mp.h>
35 #include <mlx5_common_mr.h>
36 #include <mlx5_malloc.h>
38 #include "mlx5_defs.h"
40 #include "mlx5_common_os.h"
41 #include "mlx5_utils.h"
42 #include "mlx5_rxtx.h"
43 #include "mlx5_autoconf.h"
45 #include "mlx5_flow.h"
46 #include "rte_pmd_mlx5.h"
47 #include "mlx5_verbs.h"
49 #include "mlx5_devx.h"
51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
53 #ifndef HAVE_IBV_MLX5_MOD_MPW
54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
64 /* Spinlock for mlx5_shared_data allocation. */
65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
67 /* Process local data for secondary processes. */
68 static struct mlx5_local_data mlx5_local_data;
71 * Set the completion channel file descriptor interrupt as non-blocking.
74 * Pointer to RQ channel object, which includes the channel fd
77 * The file descriptor (representing the intetrrupt) used in this channel.
80 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
83 mlx5_os_set_nonblock_channel_fd(int fd)
87 flags = fcntl(fd, F_GETFL);
88 return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
92 * Get mlx5 device attributes. The glue function query_device_ex() is called
93 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
94 * device attributes from the glue out parameter.
97 * Pointer to ibv context.
100 * Pointer to mlx5 device attributes.
103 * 0 on success, non zero error number otherwise
106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
109 struct ibv_device_attr_ex attr_ex;
110 memset(device_attr, 0, sizeof(*device_attr));
111 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
115 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
116 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
117 device_attr->max_sge = attr_ex.orig_attr.max_sge;
118 device_attr->max_cq = attr_ex.orig_attr.max_cq;
119 device_attr->max_qp = attr_ex.orig_attr.max_qp;
120 device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
121 device_attr->max_rwq_indirection_table_size =
122 attr_ex.rss_caps.max_rwq_indirection_table_size;
123 device_attr->max_tso = attr_ex.tso_caps.max_tso;
124 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
126 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
127 err = mlx5_glue->dv_query_device(ctx, &dv_attr);
131 device_attr->flags = dv_attr.flags;
132 device_attr->comp_mask = dv_attr.comp_mask;
133 #ifdef HAVE_IBV_MLX5_MOD_SWP
134 device_attr->sw_parsing_offloads =
135 dv_attr.sw_parsing_caps.sw_parsing_offloads;
137 device_attr->min_single_stride_log_num_of_bytes =
138 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
139 device_attr->max_single_stride_log_num_of_bytes =
140 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
141 device_attr->min_single_wqe_log_num_of_strides =
142 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
143 device_attr->max_single_wqe_log_num_of_strides =
144 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
145 device_attr->stride_supported_qpts =
146 dv_attr.striding_rq_caps.supported_qpts;
147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
148 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
155 * Verbs callback to allocate a memory. This function should allocate the space
156 * according to the size provided residing inside a huge page.
157 * Please note that all allocation must respect the alignment from libmlx5
158 * (i.e. currently rte_mem_page_size()).
161 * The size in bytes of the memory to allocate.
163 * A pointer to the callback data.
166 * Allocated buffer, NULL otherwise and rte_errno is set.
169 mlx5_alloc_verbs_buf(size_t size, void *data)
171 struct mlx5_priv *priv = data;
173 unsigned int socket = SOCKET_ID_ANY;
174 size_t alignment = rte_mem_page_size();
175 if (alignment == (size_t)-1) {
176 DRV_LOG(ERR, "Failed to get mem page size");
181 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
182 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
184 socket = ctrl->socket;
185 } else if (priv->verbs_alloc_ctx.type ==
186 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
187 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
189 socket = ctrl->socket;
191 MLX5_ASSERT(data != NULL);
192 ret = mlx5_malloc(0, size, alignment, socket);
199 * Verbs callback to free a memory.
202 * A pointer to the memory to free.
204 * A pointer to the callback data.
207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
209 MLX5_ASSERT(data != NULL);
214 * Initialize DR related data within private structure.
215 * Routine checks the reference counter and does actual
216 * resources creation/initialization only if counter is zero.
219 * Pointer to the private device data structure.
222 * Zero on success, positive error code otherwise.
225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
227 struct mlx5_dev_ctx_shared *sh = priv->sh;
228 char s[MLX5_HLIST_NAMESIZE];
231 MLX5_ASSERT(sh && sh->refcnt);
234 err = mlx5_alloc_table_hash_list(priv);
237 /* Create tags hash list table. */
238 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
239 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
240 if (!sh->tag_table) {
241 DRV_LOG(ERR, "tags with hash creation failed.");
245 snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
246 sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ);
247 if (!sh->modify_cmds) {
248 DRV_LOG(ERR, "hdr modify hash creation failed");
252 snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
253 sh->encaps_decaps = mlx5_hlist_create(s,
254 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ);
255 if (!sh->encaps_decaps) {
256 DRV_LOG(ERR, "encap decap hash creation failed");
260 #ifdef HAVE_MLX5DV_DR
263 /* Reference counter is zero, we should initialize structures. */
264 domain = mlx5_glue->dr_create_domain(sh->ctx,
265 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
267 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
271 sh->rx_domain = domain;
272 domain = mlx5_glue->dr_create_domain(sh->ctx,
273 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
275 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
279 pthread_mutex_init(&sh->dv_mutex, NULL);
280 sh->tx_domain = domain;
281 #ifdef HAVE_MLX5DV_DR_ESWITCH
282 if (priv->config.dv_esw_en) {
283 domain = mlx5_glue->dr_create_domain
284 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
286 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
290 sh->fdb_domain = domain;
291 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
295 err = mlx5_alloc_tunnel_hub(sh);
297 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
300 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
301 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
302 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
304 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
306 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
307 #endif /* HAVE_MLX5DV_DR */
308 sh->default_miss_action =
309 mlx5_glue->dr_create_flow_action_default_miss();
310 if (!sh->default_miss_action)
311 DRV_LOG(WARNING, "Default miss action is not supported.");
314 /* Rollback the created objects. */
316 mlx5_glue->dr_destroy_domain(sh->rx_domain);
317 sh->rx_domain = NULL;
320 mlx5_glue->dr_destroy_domain(sh->tx_domain);
321 sh->tx_domain = NULL;
323 if (sh->fdb_domain) {
324 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
325 sh->fdb_domain = NULL;
327 if (sh->esw_drop_action) {
328 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
329 sh->esw_drop_action = NULL;
331 if (sh->pop_vlan_action) {
332 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
333 sh->pop_vlan_action = NULL;
335 if (sh->encaps_decaps) {
336 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
337 sh->encaps_decaps = NULL;
339 if (sh->modify_cmds) {
340 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
341 sh->modify_cmds = NULL;
344 /* tags should be destroyed with flow before. */
345 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
346 sh->tag_table = NULL;
348 if (sh->tunnel_hub) {
349 mlx5_release_tunnel_hub(sh, priv->dev_port);
350 sh->tunnel_hub = NULL;
352 mlx5_free_table_hash_list(priv);
357 * Destroy DR related data within private structure.
360 * Pointer to the private device data structure.
363 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
365 struct mlx5_dev_ctx_shared *sh = priv->sh;
367 MLX5_ASSERT(sh && sh->refcnt);
370 #ifdef HAVE_MLX5DV_DR
372 mlx5_glue->dr_destroy_domain(sh->rx_domain);
373 sh->rx_domain = NULL;
376 mlx5_glue->dr_destroy_domain(sh->tx_domain);
377 sh->tx_domain = NULL;
379 #ifdef HAVE_MLX5DV_DR_ESWITCH
380 if (sh->fdb_domain) {
381 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
382 sh->fdb_domain = NULL;
384 if (sh->esw_drop_action) {
385 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
386 sh->esw_drop_action = NULL;
389 if (sh->pop_vlan_action) {
390 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
391 sh->pop_vlan_action = NULL;
393 pthread_mutex_destroy(&sh->dv_mutex);
394 #endif /* HAVE_MLX5DV_DR */
395 if (sh->default_miss_action)
396 mlx5_glue->destroy_flow_action
397 (sh->default_miss_action);
398 if (sh->encaps_decaps) {
399 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
400 sh->encaps_decaps = NULL;
402 if (sh->modify_cmds) {
403 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
404 sh->modify_cmds = NULL;
407 /* tags should be destroyed with flow before. */
408 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
409 sh->tag_table = NULL;
411 if (sh->tunnel_hub) {
412 mlx5_release_tunnel_hub(sh, priv->dev_port);
413 sh->tunnel_hub = NULL;
415 mlx5_free_table_hash_list(priv);
419 * Initialize shared data between primary and secondary process.
421 * A memzone is reserved by primary process and secondary processes attach to
425 * 0 on success, a negative errno value otherwise and rte_errno is set.
428 mlx5_init_shared_data(void)
430 const struct rte_memzone *mz;
433 rte_spinlock_lock(&mlx5_shared_data_lock);
434 if (mlx5_shared_data == NULL) {
435 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
436 /* Allocate shared memory. */
437 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
438 sizeof(*mlx5_shared_data),
442 "Cannot allocate mlx5 shared data");
446 mlx5_shared_data = mz->addr;
447 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
448 rte_spinlock_init(&mlx5_shared_data->lock);
450 /* Lookup allocated shared memory. */
451 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
454 "Cannot attach mlx5 shared data");
458 mlx5_shared_data = mz->addr;
459 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
463 rte_spinlock_unlock(&mlx5_shared_data_lock);
468 * PMD global initialization.
470 * Independent from individual device, this function initializes global
471 * per-PMD data structures distinguishing primary and secondary processes.
472 * Hence, each initialization is called once per a process.
475 * 0 on success, a negative errno value otherwise and rte_errno is set.
480 struct mlx5_shared_data *sd;
481 struct mlx5_local_data *ld = &mlx5_local_data;
484 if (mlx5_init_shared_data())
486 sd = mlx5_shared_data;
488 rte_spinlock_lock(&sd->lock);
489 switch (rte_eal_process_type()) {
490 case RTE_PROC_PRIMARY:
493 LIST_INIT(&sd->mem_event_cb_list);
494 rte_rwlock_init(&sd->mem_event_rwlock);
495 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
496 mlx5_mr_mem_event_cb, NULL);
497 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
498 mlx5_mp_os_primary_handle);
501 sd->init_done = true;
503 case RTE_PROC_SECONDARY:
506 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
507 mlx5_mp_os_secondary_handle);
511 ld->init_done = true;
517 rte_spinlock_unlock(&sd->lock);
522 * Create the Tx queue DevX/Verbs object.
525 * Pointer to Ethernet device.
527 * Queue index in DPDK Tx queue array.
530 * 0 on success, a negative errno value otherwise and rte_errno is set.
533 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
535 struct mlx5_priv *priv = dev->data->dev_private;
536 struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
537 struct mlx5_txq_ctrl *txq_ctrl =
538 container_of(txq_data, struct mlx5_txq_ctrl, txq);
540 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
541 return mlx5_txq_devx_obj_new(dev, idx);
542 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
543 if (!priv->config.dv_esw_en)
544 return mlx5_txq_devx_obj_new(dev, idx);
546 return mlx5_txq_ibv_obj_new(dev, idx);
550 * Release an Tx DevX/verbs queue object.
553 * DevX/Verbs Tx queue object.
556 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
558 if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
559 mlx5_txq_devx_obj_release(txq_obj);
562 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
563 if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
564 mlx5_txq_devx_obj_release(txq_obj);
568 mlx5_txq_ibv_obj_release(txq_obj);
572 * DV flow counter mode detect and config.
575 * Pointer to rte_eth_dev structure.
579 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
581 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
582 struct mlx5_priv *priv = dev->data->dev_private;
583 struct mlx5_dev_ctx_shared *sh = priv->sh;
586 #ifndef HAVE_IBV_DEVX_ASYNC
590 if (!priv->config.devx || !priv->config.dv_flow_en ||
591 !priv->config.hca_attr.flow_counters_dump ||
592 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
593 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
597 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
598 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
599 priv->config.hca_attr.flow_counters_dump,
600 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
601 /* Initialize fallback mode only on the port initializes sh. */
603 sh->cmng.counter_fallback = fallback;
604 else if (fallback != sh->cmng.counter_fallback)
605 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
606 "with others:%d.", PORT_ID(priv), fallback);
611 * Spawn an Ethernet device from Verbs information.
614 * Backing DPDK device.
616 * Verbs device parameters (name, port, switch_info) to spawn.
618 * Device configuration parameters.
621 * A valid Ethernet device object on success, NULL otherwise and rte_errno
622 * is set. The following errors are defined:
624 * EBUSY: device is not supposed to be spawned.
625 * EEXIST: device is already spawned
627 static struct rte_eth_dev *
628 mlx5_dev_spawn(struct rte_device *dpdk_dev,
629 struct mlx5_dev_spawn_data *spawn,
630 struct mlx5_dev_config *config)
632 const struct mlx5_switch_info *switch_info = &spawn->info;
633 struct mlx5_dev_ctx_shared *sh = NULL;
634 struct ibv_port_attr port_attr;
635 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
636 struct rte_eth_dev *eth_dev = NULL;
637 struct mlx5_priv *priv = NULL;
639 unsigned int hw_padding = 0;
641 unsigned int cqe_comp;
642 unsigned int cqe_pad = 0;
643 unsigned int tunnel_en = 0;
644 unsigned int mpls_en = 0;
645 unsigned int swp = 0;
646 unsigned int mprq = 0;
647 unsigned int mprq_min_stride_size_n = 0;
648 unsigned int mprq_max_stride_size_n = 0;
649 unsigned int mprq_min_stride_num_n = 0;
650 unsigned int mprq_max_stride_num_n = 0;
651 struct rte_ether_addr mac;
652 char name[RTE_ETH_NAME_MAX_LEN];
653 int own_domain_id = 0;
656 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
657 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
660 /* Determine if this port representor is supposed to be spawned. */
661 if (switch_info->representor && dpdk_dev->devargs) {
662 struct rte_eth_devargs eth_da;
664 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
667 DRV_LOG(ERR, "failed to process device arguments: %s",
668 strerror(rte_errno));
671 for (i = 0; i < eth_da.nb_representor_ports; ++i)
672 if (eth_da.representor_ports[i] ==
673 (uint16_t)switch_info->port_name)
675 if (i == eth_da.nb_representor_ports) {
680 /* Build device name. */
681 if (spawn->pf_bond < 0) {
683 if (!switch_info->representor)
684 strlcpy(name, dpdk_dev->name, sizeof(name));
686 snprintf(name, sizeof(name), "%s_representor_%u",
687 dpdk_dev->name, switch_info->port_name);
689 /* Bonding device. */
690 if (!switch_info->representor)
691 snprintf(name, sizeof(name), "%s_%s",
693 mlx5_os_get_dev_device_name(spawn->phys_dev));
695 snprintf(name, sizeof(name), "%s_%s_representor_%u",
697 mlx5_os_get_dev_device_name(spawn->phys_dev),
698 switch_info->port_name);
700 /* check if the device is already spawned */
701 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
705 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
706 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
707 struct mlx5_mp_id mp_id;
709 eth_dev = rte_eth_dev_attach_secondary(name);
710 if (eth_dev == NULL) {
711 DRV_LOG(ERR, "can not attach rte ethdev");
715 eth_dev->device = dpdk_dev;
716 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
717 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
718 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
719 err = mlx5_proc_priv_init(eth_dev);
722 mp_id.port_id = eth_dev->data->port_id;
723 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
724 /* Receive command fd from primary process */
725 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
728 /* Remap UAR for Tx queues. */
729 err = mlx5_tx_uar_init_secondary(eth_dev, err);
733 * Ethdev pointer is still required as input since
734 * the primary device is not accessible from the
737 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
738 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
741 mlx5_dev_close(eth_dev);
745 * Some parameters ("tx_db_nc" in particularly) are needed in
746 * advance to create dv/verbs device context. We proceed the
747 * devargs here to get ones, and later proceed devargs again
748 * to override some hardware settings.
750 err = mlx5_args(config, dpdk_dev->devargs);
753 DRV_LOG(ERR, "failed to process device arguments: %s",
754 strerror(rte_errno));
757 if (config->dv_miss_info) {
758 if (switch_info->master || switch_info->representor)
759 config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
761 mlx5_malloc_mem_select(config->sys_mem_en);
762 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
765 config->devx = sh->devx;
766 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
767 config->dest_tir = 1;
769 #ifdef HAVE_IBV_MLX5_MOD_SWP
770 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
773 * Multi-packet send is supported by ConnectX-4 Lx PF as well
774 * as all ConnectX-5 devices.
776 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
777 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
779 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
780 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
782 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
783 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
784 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
785 DRV_LOG(DEBUG, "enhanced MPW is supported");
786 mps = MLX5_MPW_ENHANCED;
788 DRV_LOG(DEBUG, "MPW is supported");
792 DRV_LOG(DEBUG, "MPW isn't supported");
793 mps = MLX5_MPW_DISABLED;
795 #ifdef HAVE_IBV_MLX5_MOD_SWP
796 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
797 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
798 DRV_LOG(DEBUG, "SWP support: %u", swp);
801 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
802 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
803 struct mlx5dv_striding_rq_caps mprq_caps =
804 dv_attr.striding_rq_caps;
806 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
807 mprq_caps.min_single_stride_log_num_of_bytes);
808 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
809 mprq_caps.max_single_stride_log_num_of_bytes);
810 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
811 mprq_caps.min_single_wqe_log_num_of_strides);
812 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
813 mprq_caps.max_single_wqe_log_num_of_strides);
814 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
815 mprq_caps.supported_qpts);
816 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
818 mprq_min_stride_size_n =
819 mprq_caps.min_single_stride_log_num_of_bytes;
820 mprq_max_stride_size_n =
821 mprq_caps.max_single_stride_log_num_of_bytes;
822 mprq_min_stride_num_n =
823 mprq_caps.min_single_wqe_log_num_of_strides;
824 mprq_max_stride_num_n =
825 mprq_caps.max_single_wqe_log_num_of_strides;
828 if (RTE_CACHE_LINE_SIZE == 128 &&
829 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
833 config->cqe_comp = cqe_comp;
834 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
835 /* Whether device supports 128B Rx CQE padding. */
836 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
837 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
839 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
840 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
841 tunnel_en = ((dv_attr.tunnel_offloads_caps &
842 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
843 (dv_attr.tunnel_offloads_caps &
844 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
845 (dv_attr.tunnel_offloads_caps &
846 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
848 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
849 tunnel_en ? "" : "not ");
852 "tunnel offloading disabled due to old OFED/rdma-core version");
854 config->tunnel_en = tunnel_en;
855 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
856 mpls_en = ((dv_attr.tunnel_offloads_caps &
857 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
858 (dv_attr.tunnel_offloads_caps &
859 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
860 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
861 mpls_en ? "" : "not ");
863 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
864 " old OFED/rdma-core version or firmware configuration");
866 config->mpls_en = mpls_en;
867 /* Check port status. */
868 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
870 DRV_LOG(ERR, "port query failed: %s", strerror(err));
873 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
874 DRV_LOG(ERR, "port is not configured in Ethernet mode");
878 if (port_attr.state != IBV_PORT_ACTIVE)
879 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
880 mlx5_glue->port_state_str(port_attr.state),
882 /* Allocate private eth device data. */
883 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
885 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
887 DRV_LOG(ERR, "priv allocation failure");
892 priv->dev_port = spawn->phys_port;
893 priv->pci_dev = spawn->pci_dev;
894 priv->mtu = RTE_ETHER_MTU;
895 priv->mp_id.port_id = port_id;
896 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
897 /* Some internal functions rely on Netlink sockets, open them now. */
898 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
899 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
900 priv->representor = !!switch_info->representor;
901 priv->master = !!switch_info->master;
902 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
903 priv->vport_meta_tag = 0;
904 priv->vport_meta_mask = 0;
905 priv->pf_bond = spawn->pf_bond;
906 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
908 * The DevX port query API is implemented. E-Switch may use
909 * either vport or reg_c[0] metadata register to match on
910 * vport index. The engaged part of metadata register is
913 if (switch_info->representor || switch_info->master) {
914 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
915 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
916 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
920 "can't query devx port %d on device %s",
922 mlx5_os_get_dev_device_name(spawn->phys_dev));
923 devx_port.comp_mask = 0;
926 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
927 priv->vport_meta_tag = devx_port.reg_c_0.value;
928 priv->vport_meta_mask = devx_port.reg_c_0.mask;
929 if (!priv->vport_meta_mask) {
930 DRV_LOG(ERR, "vport zero mask for port %d"
931 " on bonding device %s",
933 mlx5_os_get_dev_device_name
938 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
939 DRV_LOG(ERR, "invalid vport tag for port %d"
940 " on bonding device %s",
942 mlx5_os_get_dev_device_name
948 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
949 priv->vport_id = devx_port.vport_num;
950 } else if (spawn->pf_bond >= 0) {
951 DRV_LOG(ERR, "can't deduce vport index for port %d"
952 " on bonding device %s",
954 mlx5_os_get_dev_device_name(spawn->phys_dev));
958 /* Suppose vport index in compatible way. */
959 priv->vport_id = switch_info->representor ?
960 switch_info->port_name + 1 : -1;
964 * Kernel/rdma_core support single E-Switch per PF configurations
965 * only and vport_id field contains the vport index for
966 * associated VF, which is deduced from representor port name.
967 * For example, let's have the IB device port 10, it has
968 * attached network device eth0, which has port name attribute
969 * pf0vf2, we can deduce the VF number as 2, and set vport index
970 * as 3 (2+1). This assigning schema should be changed if the
971 * multiple E-Switch instances per PF configurations or/and PCI
972 * subfunctions are added.
974 priv->vport_id = switch_info->representor ?
975 switch_info->port_name + 1 : -1;
977 /* representor_id field keeps the unmodified VF index. */
978 priv->representor_id = switch_info->representor ?
979 switch_info->port_name : -1;
981 * Look for sibling devices in order to reuse their switch domain
982 * if any, otherwise allocate one.
984 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
985 const struct mlx5_priv *opriv =
986 rte_eth_devices[port_id].data->dev_private;
989 opriv->sh != priv->sh ||
991 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
993 priv->domain_id = opriv->domain_id;
996 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
997 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1000 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1001 strerror(rte_errno));
1006 /* Override some values set by hardware configuration. */
1007 mlx5_args(config, dpdk_dev->devargs);
1008 err = mlx5_dev_check_sibling_config(priv, config);
1011 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1012 IBV_DEVICE_RAW_IP_CSUM);
1013 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1014 (config->hw_csum ? "" : "not "));
1015 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1016 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1017 DRV_LOG(DEBUG, "counters are not supported");
1019 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1020 if (config->dv_flow_en) {
1021 DRV_LOG(WARNING, "DV flow is not supported");
1022 config->dv_flow_en = 0;
1025 config->ind_table_max_size =
1026 sh->device_attr.max_rwq_indirection_table_size;
1028 * Remove this check once DPDK supports larger/variable
1029 * indirection tables.
1031 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1032 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1033 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1034 config->ind_table_max_size);
1035 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1036 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1037 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1038 (config->hw_vlan_strip ? "" : "not "));
1039 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1040 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1041 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1042 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1043 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1044 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1045 IBV_DEVICE_PCI_WRITE_END_PADDING);
1047 if (config->hw_padding && !hw_padding) {
1048 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1049 config->hw_padding = 0;
1050 } else if (config->hw_padding) {
1051 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1053 config->tso = (sh->device_attr.max_tso > 0 &&
1054 (sh->device_attr.tso_supported_qpts &
1055 (1 << IBV_QPT_RAW_PACKET)));
1057 config->tso_max_payload_sz = sh->device_attr.max_tso;
1059 * MPW is disabled by default, while the Enhanced MPW is enabled
1062 if (config->mps == MLX5_ARG_UNSET)
1063 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1066 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1067 DRV_LOG(INFO, "%sMPS is %s",
1068 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1069 config->mps == MLX5_MPW ? "legacy " : "",
1070 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1071 if (config->cqe_comp && !cqe_comp) {
1072 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1073 config->cqe_comp = 0;
1075 if (config->cqe_pad && !cqe_pad) {
1076 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1077 config->cqe_pad = 0;
1078 } else if (config->cqe_pad) {
1079 DRV_LOG(INFO, "Rx CQE padding is enabled");
1082 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1087 /* Check relax ordering support. */
1088 if (config->hca_attr.relaxed_ordering_write &&
1089 config->hca_attr.relaxed_ordering_read &&
1090 !haswell_broadwell_cpu)
1091 sh->cmng.relaxed_ordering = 1;
1092 /* Check for LRO support. */
1093 if (config->dest_tir && config->hca_attr.lro_cap &&
1094 config->dv_flow_en) {
1095 /* TBD check tunnel lro caps. */
1096 config->lro.supported = config->hca_attr.lro_cap;
1097 DRV_LOG(DEBUG, "Device supports LRO");
1099 * If LRO timeout is not configured by application,
1100 * use the minimal supported value.
1102 if (!config->lro.timeout)
1103 config->lro.timeout =
1104 config->hca_attr.lro_timer_supported_periods[0];
1105 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1106 config->lro.timeout);
1107 DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1108 "required for coalescing is %d bytes",
1109 config->hca_attr.lro_min_mss_size);
1111 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1112 if (config->hca_attr.qos.sup &&
1113 config->hca_attr.qos.srtcm_sup &&
1114 config->dv_flow_en) {
1115 uint8_t reg_c_mask =
1116 config->hca_attr.qos.flow_meter_reg_c_ids;
1118 * Meter needs two REG_C's for color match and pre-sfx
1119 * flow match. Here get the REG_C for color match.
1120 * REG_C_0 and REG_C_1 is reserved for metadata feature.
1123 if (__builtin_popcount(reg_c_mask) < 1) {
1125 DRV_LOG(WARNING, "No available register for"
1128 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1131 priv->mtr_reg_share =
1132 config->hca_attr.qos.flow_meter_reg_share;
1133 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1134 priv->mtr_color_reg);
1138 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1139 if (config->hca_attr.log_max_ft_sampler_num > 0 &&
1140 config->dv_flow_en) {
1141 priv->sampler_en = 1;
1142 DRV_LOG(DEBUG, "The Sampler enabled!\n");
1144 priv->sampler_en = 0;
1145 if (!config->hca_attr.log_max_ft_sampler_num)
1146 DRV_LOG(WARNING, "No available register for"
1149 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1153 if (config->tx_pp) {
1154 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1155 config->hca_attr.dev_freq_khz);
1156 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1157 config->hca_attr.qos.packet_pacing ? "" : "not ");
1158 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1159 config->hca_attr.cross_channel ? "" : "not ");
1160 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1161 config->hca_attr.wqe_index_ignore ? "" : "not ");
1162 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1163 config->hca_attr.non_wire_sq ? "" : "not ");
1164 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1165 config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1166 config->hca_attr.log_max_static_sq_wq);
1167 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1168 config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1169 if (!config->devx) {
1170 DRV_LOG(ERR, "DevX is required for packet pacing");
1174 if (!config->hca_attr.qos.packet_pacing) {
1175 DRV_LOG(ERR, "Packet pacing is not supported");
1179 if (!config->hca_attr.cross_channel) {
1180 DRV_LOG(ERR, "Cross channel operations are"
1181 " required for packet pacing");
1185 if (!config->hca_attr.wqe_index_ignore) {
1186 DRV_LOG(ERR, "WQE index ignore feature is"
1187 " required for packet pacing");
1191 if (!config->hca_attr.non_wire_sq) {
1192 DRV_LOG(ERR, "Non-wire SQ feature is"
1193 " required for packet pacing");
1197 if (!config->hca_attr.log_max_static_sq_wq) {
1198 DRV_LOG(ERR, "Static WQE SQ feature is"
1199 " required for packet pacing");
1203 if (!config->hca_attr.qos.wqe_rate_pp) {
1204 DRV_LOG(ERR, "WQE rate mode is required"
1205 " for packet pacing");
1209 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1210 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1211 " can't create queues for packet pacing");
1217 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1219 err = config->hca_attr.access_register_user ?
1220 mlx5_devx_cmd_register_read
1221 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1222 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1226 /* MTUTC register is read successfully. */
1227 ts_mode = MLX5_GET(register_mtutc, reg,
1229 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1230 config->rt_timestamp = 1;
1232 /* Kernel does not support register reading. */
1233 if (config->hca_attr.dev_freq_khz ==
1234 (NS_PER_S / MS_PER_S))
1235 config->rt_timestamp = 1;
1239 * If HW has bug working with tunnel packet decapsulation and
1240 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1241 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1243 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1244 config->hw_fcs_strip = 0;
1245 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1246 (config->hw_fcs_strip ? "" : "not "));
1247 if (config->mprq.enabled && mprq) {
1248 if (config->mprq.stride_num_n &&
1249 (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1250 config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1251 config->mprq.stride_num_n =
1252 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1253 mprq_min_stride_num_n),
1254 mprq_max_stride_num_n);
1256 "the number of strides"
1257 " for Multi-Packet RQ is out of range,"
1258 " setting default value (%u)",
1259 1 << config->mprq.stride_num_n);
1261 if (config->mprq.stride_size_n &&
1262 (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1263 config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1264 config->mprq.stride_size_n =
1265 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1266 mprq_min_stride_size_n),
1267 mprq_max_stride_size_n);
1269 "the size of a stride"
1270 " for Multi-Packet RQ is out of range,"
1271 " setting default value (%u)",
1272 1 << config->mprq.stride_size_n);
1274 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1275 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1276 } else if (config->mprq.enabled && !mprq) {
1277 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1278 config->mprq.enabled = 0;
1280 if (config->max_dump_files_num == 0)
1281 config->max_dump_files_num = 128;
1282 eth_dev = rte_eth_dev_allocate(name);
1283 if (eth_dev == NULL) {
1284 DRV_LOG(ERR, "can not allocate rte ethdev");
1288 if (priv->representor) {
1289 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1290 eth_dev->data->representor_id = priv->representor_id;
1293 * Store associated network device interface index. This index
1294 * is permanent throughout the lifetime of device. So, we may store
1295 * the ifindex here and use the cached value further.
1297 MLX5_ASSERT(spawn->ifindex);
1298 priv->if_index = spawn->ifindex;
1299 if (priv->pf_bond >= 0 && priv->master) {
1300 /* Get bond interface info */
1301 err = mlx5_sysfs_bond_info(priv->if_index,
1302 &priv->bond_ifindex,
1305 DRV_LOG(ERR, "unable to get bond info: %s",
1306 strerror(rte_errno));
1308 DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1309 priv->if_index, priv->bond_ifindex,
1312 eth_dev->data->dev_private = priv;
1313 priv->dev_data = eth_dev->data;
1314 eth_dev->data->mac_addrs = priv->mac;
1315 eth_dev->device = dpdk_dev;
1316 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1317 /* Configure the first MAC address by default. */
1318 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1320 "port %u cannot get MAC address, is mlx5_en"
1321 " loaded? (errno: %s)",
1322 eth_dev->data->port_id, strerror(rte_errno));
1327 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1328 eth_dev->data->port_id,
1329 mac.addr_bytes[0], mac.addr_bytes[1],
1330 mac.addr_bytes[2], mac.addr_bytes[3],
1331 mac.addr_bytes[4], mac.addr_bytes[5]);
1332 #ifdef RTE_LIBRTE_MLX5_DEBUG
1334 char ifname[IF_NAMESIZE];
1336 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1337 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1338 eth_dev->data->port_id, ifname);
1340 DRV_LOG(DEBUG, "port %u ifname is unknown",
1341 eth_dev->data->port_id);
1344 /* Get actual MTU if possible. */
1345 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1350 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1352 /* Initialize burst functions to prevent crashes before link-up. */
1353 eth_dev->rx_pkt_burst = removed_rx_burst;
1354 eth_dev->tx_pkt_burst = removed_tx_burst;
1355 eth_dev->dev_ops = &mlx5_os_dev_ops;
1356 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1357 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1358 eth_dev->rx_queue_count = mlx5_rx_queue_count;
1359 /* Register MAC address. */
1360 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1361 if (config->vf && config->vf_nl_en)
1362 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1363 mlx5_ifindex(eth_dev),
1364 eth_dev->data->mac_addrs,
1365 MLX5_MAX_MAC_ADDRESSES);
1367 priv->ctrl_flows = 0;
1368 rte_spinlock_init(&priv->flow_list_lock);
1369 TAILQ_INIT(&priv->flow_meters);
1370 TAILQ_INIT(&priv->flow_meter_profiles);
1371 /* Hint libmlx5 to use PMD allocator for data plane resources */
1372 mlx5_glue->dv_set_context_attr(sh->ctx,
1373 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1374 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1375 .alloc = &mlx5_alloc_verbs_buf,
1376 .free = &mlx5_free_verbs_buf,
1379 /* Bring Ethernet device up. */
1380 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1381 eth_dev->data->port_id);
1382 mlx5_set_link_up(eth_dev);
1384 * Even though the interrupt handler is not installed yet,
1385 * interrupts will still trigger on the async_fd from
1386 * Verbs context returned by ibv_open_device().
1388 mlx5_link_update(eth_dev, 0);
1389 #ifdef HAVE_MLX5DV_DR_ESWITCH
1390 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1391 (switch_info->representor || switch_info->master)))
1392 config->dv_esw_en = 0;
1394 config->dv_esw_en = 0;
1396 /* Detect minimal data bytes to inline. */
1397 mlx5_set_min_inline(spawn, config);
1398 /* Store device configuration on private structure. */
1399 priv->config = *config;
1400 /* Create context for virtual machine VLAN workaround. */
1401 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1402 if (config->dv_flow_en) {
1403 err = mlx5_alloc_shared_dr(priv);
1407 if (config->devx && config->dv_flow_en && config->dest_tir) {
1408 priv->obj_ops = devx_obj_ops;
1409 priv->obj_ops.drop_action_create =
1410 ibv_obj_ops.drop_action_create;
1411 priv->obj_ops.drop_action_destroy =
1412 ibv_obj_ops.drop_action_destroy;
1413 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1414 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1416 if (config->dv_esw_en)
1417 priv->obj_ops.txq_obj_modify =
1418 ibv_obj_ops.txq_obj_modify;
1420 /* Use specific wrappers for Tx object. */
1421 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1422 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1425 priv->obj_ops = ibv_obj_ops;
1427 /* Supported Verbs flow priority number detection. */
1428 err = mlx5_flow_discover_priorities(eth_dev);
1433 priv->config.flow_prio = err;
1434 if (!priv->config.dv_esw_en &&
1435 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1436 DRV_LOG(WARNING, "metadata mode %u is not supported "
1437 "(no E-Switch)", priv->config.dv_xmeta_en);
1438 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1440 mlx5_set_metadata_mask(eth_dev);
1441 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1442 !priv->sh->dv_regc0_mask) {
1443 DRV_LOG(ERR, "metadata mode %u is not supported "
1444 "(no metadata reg_c[0] is available)",
1445 priv->config.dv_xmeta_en);
1449 /* Query availability of metadata reg_c's. */
1450 err = mlx5_flow_discover_mreg_c(eth_dev);
1455 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1457 "port %u extensive metadata register is not supported",
1458 eth_dev->data->port_id);
1459 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1460 DRV_LOG(ERR, "metadata mode %u is not supported "
1461 "(no metadata registers available)",
1462 priv->config.dv_xmeta_en);
1467 if (priv->config.dv_flow_en &&
1468 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1469 mlx5_flow_ext_mreg_supported(eth_dev) &&
1470 priv->sh->dv_regc0_mask) {
1471 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1472 MLX5_FLOW_MREG_HTABLE_SZ);
1473 if (!priv->mreg_cp_tbl) {
1478 mlx5_flow_counter_mode_config(eth_dev);
1482 if (priv->mreg_cp_tbl)
1483 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1485 mlx5_os_free_shared_dr(priv);
1486 if (priv->nl_socket_route >= 0)
1487 close(priv->nl_socket_route);
1488 if (priv->nl_socket_rdma >= 0)
1489 close(priv->nl_socket_rdma);
1490 if (priv->vmwa_context)
1491 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1493 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1495 if (eth_dev != NULL)
1496 eth_dev->data->dev_private = NULL;
1498 if (eth_dev != NULL) {
1499 /* mac_addrs must not be freed alone because part of
1502 eth_dev->data->mac_addrs = NULL;
1503 rte_eth_dev_release_port(eth_dev);
1506 mlx5_free_shared_dev_ctx(sh);
1507 MLX5_ASSERT(err > 0);
1513 * Comparison callback to sort device data.
1515 * This is meant to be used with qsort().
1518 * Pointer to pointer to first data object.
1520 * Pointer to pointer to second data object.
1523 * 0 if both objects are equal, less than 0 if the first argument is less
1524 * than the second, greater than 0 otherwise.
1527 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1529 const struct mlx5_switch_info *si_a =
1530 &((const struct mlx5_dev_spawn_data *)a)->info;
1531 const struct mlx5_switch_info *si_b =
1532 &((const struct mlx5_dev_spawn_data *)b)->info;
1535 /* Master device first. */
1536 ret = si_b->master - si_a->master;
1539 /* Then representor devices. */
1540 ret = si_b->representor - si_a->representor;
1543 /* Unidentified devices come last in no specific order. */
1544 if (!si_a->representor)
1546 /* Order representors by name. */
1547 return si_a->port_name - si_b->port_name;
1551 * Match PCI information for possible slaves of bonding device.
1553 * @param[in] ibv_dev
1554 * Pointer to Infiniband device structure.
1555 * @param[in] pci_dev
1556 * Pointer to PCI device structure to match PCI address.
1557 * @param[in] nl_rdma
1558 * Netlink RDMA group socket handle.
1561 * negative value if no bonding device found, otherwise
1562 * positive index of slave PF in bonding.
1565 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1566 const struct rte_pci_device *pci_dev,
1569 char ifname[IF_NAMESIZE + 1];
1570 unsigned int ifindex;
1576 * Try to get master device name. If something goes
1577 * wrong suppose the lack of kernel support and no
1582 if (!strstr(ibv_dev->name, "bond"))
1584 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1588 * The Master device might not be on the predefined
1589 * port (not on port index 1, it is not garanted),
1590 * we have to scan all Infiniband device port and
1593 for (i = 1; i <= np; ++i) {
1594 /* Check whether Infiniband port is populated. */
1595 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1598 if (!if_indextoname(ifindex, ifname))
1600 /* Try to read bonding slave names from sysfs. */
1602 "/sys/class/net/%s/master/bonding/slaves", ifname);
1603 file = fopen(slaves, "r");
1609 /* Use safe format to check maximal buffer length. */
1610 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1611 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1612 char tmp_str[IF_NAMESIZE + 32];
1613 struct rte_pci_addr pci_addr;
1614 struct mlx5_switch_info info;
1616 /* Process slave interface names in the loop. */
1617 snprintf(tmp_str, sizeof(tmp_str),
1618 "/sys/class/net/%s", ifname);
1619 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1620 DRV_LOG(WARNING, "can not get PCI address"
1621 " for netdev \"%s\"", ifname);
1624 if (pci_dev->addr.domain != pci_addr.domain ||
1625 pci_dev->addr.bus != pci_addr.bus ||
1626 pci_dev->addr.devid != pci_addr.devid ||
1627 pci_dev->addr.function != pci_addr.function)
1629 /* Slave interface PCI address match found. */
1631 snprintf(tmp_str, sizeof(tmp_str),
1632 "/sys/class/net/%s/phys_port_name", ifname);
1633 file = fopen(tmp_str, "rb");
1636 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1637 if (fscanf(file, "%32s", tmp_str) == 1)
1638 mlx5_translate_port_name(tmp_str, &info);
1639 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1640 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1641 pf = info.port_name;
1650 * DPDK callback to register a PCI device.
1652 * This function spawns Ethernet devices out of a given PCI device.
1654 * @param[in] pci_drv
1655 * PCI driver structure (mlx5_driver).
1656 * @param[in] pci_dev
1657 * PCI device information.
1660 * 0 on success, a negative errno value otherwise and rte_errno is set.
1663 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1664 struct rte_pci_device *pci_dev)
1666 struct ibv_device **ibv_list;
1668 * Number of found IB Devices matching with requested PCI BDF.
1669 * nd != 1 means there are multiple IB devices over the same
1670 * PCI device and we have representors and master.
1672 unsigned int nd = 0;
1674 * Number of found IB device Ports. nd = 1 and np = 1..n means
1675 * we have the single multiport IB device, and there may be
1676 * representors attached to some of found ports.
1678 unsigned int np = 0;
1680 * Number of DPDK ethernet devices to Spawn - either over
1681 * multiple IB devices or multiple ports of single IB device.
1682 * Actually this is the number of iterations to spawn.
1684 unsigned int ns = 0;
1687 * < 0 - no bonding device (single one)
1688 * >= 0 - bonding device (value is slave PF index)
1691 struct mlx5_dev_spawn_data *list = NULL;
1692 struct mlx5_dev_config dev_config;
1693 unsigned int dev_config_vf;
1696 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1697 mlx5_pmd_socket_init();
1698 ret = mlx5_init_once();
1700 DRV_LOG(ERR, "unable to init PMD global data: %s",
1701 strerror(rte_errno));
1705 ibv_list = mlx5_glue->get_device_list(&ret);
1707 rte_errno = errno ? errno : ENOSYS;
1708 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1712 * First scan the list of all Infiniband devices to find
1713 * matching ones, gathering into the list.
1715 struct ibv_device *ibv_match[ret + 1];
1716 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1717 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1721 struct rte_pci_addr pci_addr;
1723 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1724 bd = mlx5_device_bond_pci_match
1725 (ibv_list[ret], pci_dev, nl_rdma);
1728 * Bonding device detected. Only one match is allowed,
1729 * the bonding is supported over multi-port IB device,
1730 * there should be no matches on representor PCI
1731 * functions or non VF LAG bonding devices with
1732 * specified address.
1736 "multiple PCI match on bonding device"
1737 "\"%s\" found", ibv_list[ret]->name);
1742 DRV_LOG(INFO, "PCI information matches for"
1743 " slave %d bonding device \"%s\"",
1744 bd, ibv_list[ret]->name);
1745 ibv_match[nd++] = ibv_list[ret];
1748 if (mlx5_dev_to_pci_addr
1749 (ibv_list[ret]->ibdev_path, &pci_addr))
1751 if (pci_dev->addr.domain != pci_addr.domain ||
1752 pci_dev->addr.bus != pci_addr.bus ||
1753 pci_dev->addr.devid != pci_addr.devid ||
1754 pci_dev->addr.function != pci_addr.function)
1756 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1757 ibv_list[ret]->name);
1758 ibv_match[nd++] = ibv_list[ret];
1760 ibv_match[nd] = NULL;
1762 /* No device matches, just complain and bail out. */
1764 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1765 " are kernel drivers loaded?",
1766 pci_dev->addr.domain, pci_dev->addr.bus,
1767 pci_dev->addr.devid, pci_dev->addr.function);
1774 * Found single matching device may have multiple ports.
1775 * Each port may be representor, we have to check the port
1776 * number and check the representors existence.
1779 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1781 DRV_LOG(WARNING, "can not get IB device \"%s\""
1782 " ports number", ibv_match[0]->name);
1783 if (bd >= 0 && !np) {
1784 DRV_LOG(ERR, "can not get ports"
1785 " for bonding device");
1791 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1794 * This may happen if there is VF LAG kernel support and
1795 * application is compiled with older rdma_core library.
1798 "No kernel/verbs support for VF LAG bonding found.");
1799 rte_errno = ENOTSUP;
1805 * Now we can determine the maximal
1806 * amount of devices to be spawned.
1808 list = mlx5_malloc(MLX5_MEM_ZERO,
1809 sizeof(struct mlx5_dev_spawn_data) *
1811 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1813 DRV_LOG(ERR, "spawn data array allocation failure");
1818 if (bd >= 0 || np > 1) {
1820 * Single IB device with multiple ports found,
1821 * it may be E-Switch master device and representors.
1822 * We have to perform identification through the ports.
1824 MLX5_ASSERT(nl_rdma >= 0);
1825 MLX5_ASSERT(ns == 0);
1826 MLX5_ASSERT(nd == 1);
1828 for (i = 1; i <= np; ++i) {
1829 list[ns].max_port = np;
1830 list[ns].phys_port = i;
1831 list[ns].phys_dev = ibv_match[0];
1832 list[ns].eth_dev = NULL;
1833 list[ns].pci_dev = pci_dev;
1834 list[ns].pf_bond = bd;
1835 list[ns].ifindex = mlx5_nl_ifindex
1837 mlx5_os_get_dev_device_name
1838 (list[ns].phys_dev), i);
1839 if (!list[ns].ifindex) {
1841 * No network interface index found for the
1842 * specified port, it means there is no
1843 * representor on this port. It's OK,
1844 * there can be disabled ports, for example
1845 * if sriov_numvfs < sriov_totalvfs.
1851 ret = mlx5_nl_switch_info
1855 if (ret || (!list[ns].info.representor &&
1856 !list[ns].info.master)) {
1858 * We failed to recognize representors with
1859 * Netlink, let's try to perform the task
1862 ret = mlx5_sysfs_switch_info
1866 if (!ret && bd >= 0) {
1867 switch (list[ns].info.name_type) {
1868 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1869 if (list[ns].info.port_name == bd)
1872 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1874 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1875 if (list[ns].info.pf_num == bd)
1883 if (!ret && (list[ns].info.representor ^
1884 list[ns].info.master))
1889 "unable to recognize master/representors"
1890 " on the IB device with multiple ports");
1897 * The existence of several matching entries (nd > 1) means
1898 * port representors have been instantiated. No existing Verbs
1899 * call nor sysfs entries can tell them apart, this can only
1900 * be done through Netlink calls assuming kernel drivers are
1901 * recent enough to support them.
1903 * In the event of identification failure through Netlink,
1904 * try again through sysfs, then:
1906 * 1. A single IB device matches (nd == 1) with single
1907 * port (np=0/1) and is not a representor, assume
1908 * no switch support.
1910 * 2. Otherwise no safe assumptions can be made;
1911 * complain louder and bail out.
1913 for (i = 0; i != nd; ++i) {
1914 memset(&list[ns].info, 0, sizeof(list[ns].info));
1915 list[ns].max_port = 1;
1916 list[ns].phys_port = 1;
1917 list[ns].phys_dev = ibv_match[i];
1918 list[ns].eth_dev = NULL;
1919 list[ns].pci_dev = pci_dev;
1920 list[ns].pf_bond = -1;
1921 list[ns].ifindex = 0;
1923 list[ns].ifindex = mlx5_nl_ifindex
1925 mlx5_os_get_dev_device_name
1926 (list[ns].phys_dev), 1);
1927 if (!list[ns].ifindex) {
1928 char ifname[IF_NAMESIZE];
1931 * Netlink failed, it may happen with old
1932 * ib_core kernel driver (before 4.16).
1933 * We can assume there is old driver because
1934 * here we are processing single ports IB
1935 * devices. Let's try sysfs to retrieve
1936 * the ifindex. The method works for
1937 * master device only.
1941 * Multiple devices found, assume
1942 * representors, can not distinguish
1943 * master/representor and retrieve
1944 * ifindex via sysfs.
1948 ret = mlx5_get_ifname_sysfs
1949 (ibv_match[i]->ibdev_path, ifname);
1952 if_nametoindex(ifname);
1953 if (!list[ns].ifindex) {
1955 * No network interface index found
1956 * for the specified device, it means
1957 * there it is neither representor
1965 ret = mlx5_nl_switch_info
1969 if (ret || (!list[ns].info.representor &&
1970 !list[ns].info.master)) {
1972 * We failed to recognize representors with
1973 * Netlink, let's try to perform the task
1976 ret = mlx5_sysfs_switch_info
1980 if (!ret && (list[ns].info.representor ^
1981 list[ns].info.master)) {
1983 } else if ((nd == 1) &&
1984 !list[ns].info.representor &&
1985 !list[ns].info.master) {
1987 * Single IB device with
1988 * one physical port and
1989 * attached network device.
1990 * May be SRIOV is not enabled
1991 * or there is no representors.
1993 DRV_LOG(INFO, "no E-Switch support detected");
2000 "unable to recognize master/representors"
2001 " on the multiple IB devices");
2009 * Sort list to probe devices in natural order for users convenience
2010 * (i.e. master first, then representors from lowest to highest ID).
2012 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2013 /* Device specific configuration. */
2014 switch (pci_dev->id.device_id) {
2015 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2016 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2017 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2018 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2019 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2020 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2021 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2028 for (i = 0; i != ns; ++i) {
2031 /* Default configuration. */
2032 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2033 dev_config.vf = dev_config_vf;
2034 dev_config.mps = MLX5_ARG_UNSET;
2035 dev_config.dbnc = MLX5_ARG_UNSET;
2036 dev_config.rx_vec_en = 1;
2037 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2038 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2039 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2040 dev_config.txqs_inline = MLX5_ARG_UNSET;
2041 dev_config.vf_nl_en = 1;
2042 dev_config.mr_ext_memseg_en = 1;
2043 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2044 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2045 dev_config.dv_esw_en = 1;
2046 dev_config.dv_flow_en = 1;
2047 dev_config.decap_en = 1;
2048 dev_config.log_hp_size = MLX5_ARG_UNSET;
2049 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2052 if (!list[i].eth_dev) {
2053 if (rte_errno != EBUSY && rte_errno != EEXIST)
2055 /* Device is disabled or already spawned. Ignore it. */
2058 restore = list[i].eth_dev->data->dev_flags;
2059 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2060 /* Restore non-PCI flags cleared by the above call. */
2061 list[i].eth_dev->data->dev_flags |= restore;
2062 rte_eth_dev_probing_finish(list[i].eth_dev);
2066 "probe of PCI device " PCI_PRI_FMT " aborted after"
2067 " encountering an error: %s",
2068 pci_dev->addr.domain, pci_dev->addr.bus,
2069 pci_dev->addr.devid, pci_dev->addr.function,
2070 strerror(rte_errno));
2074 if (!list[i].eth_dev)
2076 mlx5_dev_close(list[i].eth_dev);
2077 /* mac_addrs must not be freed because in dev_private */
2078 list[i].eth_dev->data->mac_addrs = NULL;
2079 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2081 /* Restore original error. */
2088 * Do the routine cleanup:
2089 * - close opened Netlink sockets
2090 * - free allocated spawn data array
2091 * - free the Infiniband device list
2099 MLX5_ASSERT(ibv_list);
2100 mlx5_glue->free_device_list(ibv_list);
2105 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2110 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2111 /* Get environment variable to store. */
2112 env = getenv(MLX5_SHUT_UP_BF);
2113 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2114 if (config->dbnc == MLX5_ARG_UNSET)
2115 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2117 setenv(MLX5_SHUT_UP_BF,
2118 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2123 mlx5_restore_doorbell_mapping_env(int value)
2125 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2126 /* Restore the original environment variable state. */
2127 if (value == MLX5_ARG_UNSET)
2128 unsetenv(MLX5_SHUT_UP_BF);
2130 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2134 * Extract pdn of PD object using DV API.
2137 * Pointer to the verbs PD object.
2139 * Pointer to the PD object number variable.
2142 * 0 on success, error value otherwise.
2145 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2147 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2148 struct mlx5dv_obj obj;
2149 struct mlx5dv_pd pd_info;
2153 obj.pd.out = &pd_info;
2154 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2156 DRV_LOG(DEBUG, "Fail to get PD object info");
2165 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2169 * Function API to open IB device.
2171 * This function calls the Linux glue APIs to open a device.
2174 * Pointer to the IB device attributes (name, port, etc).
2175 * @param[out] config
2176 * Pointer to device configuration structure.
2178 * Pointer to shared context structure.
2181 * 0 on success, a positive error value otherwise.
2184 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2185 const struct mlx5_dev_config *config,
2186 struct mlx5_dev_ctx_shared *sh)
2191 sh->numa_node = spawn->pci_dev->device.numa_node;
2192 pthread_mutex_init(&sh->txpp.mutex, NULL);
2194 * Configure environment variable "MLX5_BF_SHUT_UP"
2195 * before the device creation. The rdma_core library
2196 * checks the variable at device creation and
2197 * stores the result internally.
2199 dbmap_env = mlx5_config_doorbell_mapping_env(config);
2200 /* Try to open IB device with DV first, then usual Verbs. */
2202 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2205 DRV_LOG(DEBUG, "DevX is supported");
2206 /* The device is created, no need for environment. */
2207 mlx5_restore_doorbell_mapping_env(dbmap_env);
2209 /* The environment variable is still configured. */
2210 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2211 err = errno ? errno : ENODEV;
2213 * The environment variable is not needed anymore,
2214 * all device creation attempts are completed.
2216 mlx5_restore_doorbell_mapping_env(dbmap_env);
2219 DRV_LOG(DEBUG, "DevX is NOT supported");
2226 * Install shared asynchronous device events handler.
2227 * This function is implemented to support event sharing
2228 * between multiple ports of single IB device.
2231 * Pointer to mlx5_dev_ctx_shared object.
2234 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2239 sh->intr_handle.fd = -1;
2240 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2241 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2242 F_SETFL, flags | O_NONBLOCK);
2244 DRV_LOG(INFO, "failed to change file descriptor async event"
2247 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2248 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2249 if (rte_intr_callback_register(&sh->intr_handle,
2250 mlx5_dev_interrupt_handler, sh)) {
2251 DRV_LOG(INFO, "Fail to install the shared interrupt.");
2252 sh->intr_handle.fd = -1;
2256 #ifdef HAVE_IBV_DEVX_ASYNC
2257 sh->intr_handle_devx.fd = -1;
2259 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2260 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2262 DRV_LOG(INFO, "failed to allocate devx_comp.");
2265 flags = fcntl(devx_comp->fd, F_GETFL);
2266 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2268 DRV_LOG(INFO, "failed to change file descriptor"
2272 sh->intr_handle_devx.fd = devx_comp->fd;
2273 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2274 if (rte_intr_callback_register(&sh->intr_handle_devx,
2275 mlx5_dev_interrupt_handler_devx, sh)) {
2276 DRV_LOG(INFO, "Fail to install the devx shared"
2278 sh->intr_handle_devx.fd = -1;
2280 #endif /* HAVE_IBV_DEVX_ASYNC */
2285 * Uninstall shared asynchronous device events handler.
2286 * This function is implemented to support event sharing
2287 * between multiple ports of single IB device.
2290 * Pointer to mlx5_dev_ctx_shared object.
2293 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2295 if (sh->intr_handle.fd >= 0)
2296 mlx5_intr_callback_unregister(&sh->intr_handle,
2297 mlx5_dev_interrupt_handler, sh);
2298 #ifdef HAVE_IBV_DEVX_ASYNC
2299 if (sh->intr_handle_devx.fd >= 0)
2300 rte_intr_callback_unregister(&sh->intr_handle_devx,
2301 mlx5_dev_interrupt_handler_devx, sh);
2303 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2308 * Read statistics by a named counter.
2311 * Pointer to the private device data structure.
2312 * @param[in] ctr_name
2313 * Pointer to the name of the statistic counter to read
2315 * Pointer to read statistic value.
2317 * 0 on success and stat is valud, 1 if failed to read the value
2322 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2328 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2329 priv->sh->ibdev_path,
2332 fd = open(path, O_RDONLY);
2334 * in switchdev the file location is not per port
2335 * but rather in <ibdev_path>/hw_counters/<file_name>.
2338 MKSTR(path1, "%s/hw_counters/%s",
2339 priv->sh->ibdev_path,
2341 fd = open(path1, O_RDONLY);
2344 char buf[21] = {'\0'};
2345 ssize_t n = read(fd, buf, sizeof(buf));
2349 *stat = strtoull(buf, NULL, 10);
2359 * Set the reg_mr and dereg_mr call backs
2361 * @param reg_mr_cb[out]
2362 * Pointer to reg_mr func
2363 * @param dereg_mr_cb[out]
2364 * Pointer to dereg_mr func
2368 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2369 mlx5_dereg_mr_t *dereg_mr_cb)
2371 *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2372 *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2376 * Remove a MAC address from device
2379 * Pointer to Ethernet device structure.
2381 * MAC address index.
2384 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2386 struct mlx5_priv *priv = dev->data->dev_private;
2387 const int vf = priv->config.vf;
2390 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2391 mlx5_ifindex(dev), priv->mac_own,
2392 &dev->data->mac_addrs[index], index);
2396 * Adds a MAC address to the device
2399 * Pointer to Ethernet device structure.
2401 * MAC address to register.
2403 * MAC address index.
2406 * 0 on success, a negative errno value otherwise
2409 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2412 struct mlx5_priv *priv = dev->data->dev_private;
2413 const int vf = priv->config.vf;
2417 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2418 mlx5_ifindex(dev), priv->mac_own,
2424 * Modify a VF MAC address
2427 * Pointer to device private data.
2429 * MAC address to modify into.
2431 * Net device interface index
2436 * 0 on success, a negative errno value otherwise
2439 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2440 unsigned int iface_idx,
2441 struct rte_ether_addr *mac_addr,
2444 return mlx5_nl_vf_mac_addr_modify
2445 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2449 * Set device promiscuous mode
2452 * Pointer to Ethernet device structure.
2454 * 0 - promiscuous is disabled, otherwise - enabled
2457 * 0 on success, a negative error value otherwise
2460 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2462 struct mlx5_priv *priv = dev->data->dev_private;
2464 return mlx5_nl_promisc(priv->nl_socket_route,
2465 mlx5_ifindex(dev), !!enable);
2469 * Set device promiscuous mode
2472 * Pointer to Ethernet device structure.
2474 * 0 - all multicase is disabled, otherwise - enabled
2477 * 0 on success, a negative error value otherwise
2480 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2482 struct mlx5_priv *priv = dev->data->dev_private;
2484 return mlx5_nl_allmulti(priv->nl_socket_route,
2485 mlx5_ifindex(dev), !!enable);
2489 * Flush device MAC addresses
2492 * Pointer to Ethernet device structure.
2496 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2498 struct mlx5_priv *priv = dev->data->dev_private;
2500 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2501 dev->data->mac_addrs,
2502 MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2505 const struct eth_dev_ops mlx5_os_dev_ops = {
2506 .dev_configure = mlx5_dev_configure,
2507 .dev_start = mlx5_dev_start,
2508 .dev_stop = mlx5_dev_stop,
2509 .dev_set_link_down = mlx5_set_link_down,
2510 .dev_set_link_up = mlx5_set_link_up,
2511 .dev_close = mlx5_dev_close,
2512 .promiscuous_enable = mlx5_promiscuous_enable,
2513 .promiscuous_disable = mlx5_promiscuous_disable,
2514 .allmulticast_enable = mlx5_allmulticast_enable,
2515 .allmulticast_disable = mlx5_allmulticast_disable,
2516 .link_update = mlx5_link_update,
2517 .stats_get = mlx5_stats_get,
2518 .stats_reset = mlx5_stats_reset,
2519 .xstats_get = mlx5_xstats_get,
2520 .xstats_reset = mlx5_xstats_reset,
2521 .xstats_get_names = mlx5_xstats_get_names,
2522 .fw_version_get = mlx5_fw_version_get,
2523 .dev_infos_get = mlx5_dev_infos_get,
2524 .read_clock = mlx5_txpp_read_clock,
2525 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2526 .vlan_filter_set = mlx5_vlan_filter_set,
2527 .rx_queue_setup = mlx5_rx_queue_setup,
2528 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2529 .tx_queue_setup = mlx5_tx_queue_setup,
2530 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2531 .rx_queue_release = mlx5_rx_queue_release,
2532 .tx_queue_release = mlx5_tx_queue_release,
2533 .rx_queue_start = mlx5_rx_queue_start,
2534 .rx_queue_stop = mlx5_rx_queue_stop,
2535 .tx_queue_start = mlx5_tx_queue_start,
2536 .tx_queue_stop = mlx5_tx_queue_stop,
2537 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2538 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2539 .mac_addr_remove = mlx5_mac_addr_remove,
2540 .mac_addr_add = mlx5_mac_addr_add,
2541 .mac_addr_set = mlx5_mac_addr_set,
2542 .set_mc_addr_list = mlx5_set_mc_addr_list,
2543 .mtu_set = mlx5_dev_set_mtu,
2544 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2545 .vlan_offload_set = mlx5_vlan_offload_set,
2546 .reta_update = mlx5_dev_rss_reta_update,
2547 .reta_query = mlx5_dev_rss_reta_query,
2548 .rss_hash_update = mlx5_rss_hash_update,
2549 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2550 .filter_ctrl = mlx5_dev_filter_ctrl,
2551 .rxq_info_get = mlx5_rxq_info_get,
2552 .txq_info_get = mlx5_txq_info_get,
2553 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2554 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2555 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2556 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2557 .is_removed = mlx5_is_removed,
2558 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
2559 .get_module_info = mlx5_get_module_info,
2560 .get_module_eeprom = mlx5_get_module_eeprom,
2561 .hairpin_cap_get = mlx5_hairpin_cap_get,
2562 .mtr_ops_get = mlx5_flow_meter_ops_get,
2563 .hairpin_bind = mlx5_hairpin_bind,
2564 .hairpin_unbind = mlx5_hairpin_unbind,
2565 .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2566 .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2567 .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2568 .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2571 /* Available operations from secondary process. */
2572 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2573 .stats_get = mlx5_stats_get,
2574 .stats_reset = mlx5_stats_reset,
2575 .xstats_get = mlx5_xstats_get,
2576 .xstats_reset = mlx5_xstats_reset,
2577 .xstats_get_names = mlx5_xstats_get_names,
2578 .fw_version_get = mlx5_fw_version_get,
2579 .dev_infos_get = mlx5_dev_infos_get,
2580 .read_clock = mlx5_txpp_read_clock,
2581 .rx_queue_start = mlx5_rx_queue_start,
2582 .rx_queue_stop = mlx5_rx_queue_stop,
2583 .tx_queue_start = mlx5_tx_queue_start,
2584 .tx_queue_stop = mlx5_tx_queue_stop,
2585 .rxq_info_get = mlx5_rxq_info_get,
2586 .txq_info_get = mlx5_txq_info_get,
2587 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2588 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2589 .get_module_info = mlx5_get_module_info,
2590 .get_module_eeprom = mlx5_get_module_eeprom,
2593 /* Available operations in flow isolated mode. */
2594 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2595 .dev_configure = mlx5_dev_configure,
2596 .dev_start = mlx5_dev_start,
2597 .dev_stop = mlx5_dev_stop,
2598 .dev_set_link_down = mlx5_set_link_down,
2599 .dev_set_link_up = mlx5_set_link_up,
2600 .dev_close = mlx5_dev_close,
2601 .promiscuous_enable = mlx5_promiscuous_enable,
2602 .promiscuous_disable = mlx5_promiscuous_disable,
2603 .allmulticast_enable = mlx5_allmulticast_enable,
2604 .allmulticast_disable = mlx5_allmulticast_disable,
2605 .link_update = mlx5_link_update,
2606 .stats_get = mlx5_stats_get,
2607 .stats_reset = mlx5_stats_reset,
2608 .xstats_get = mlx5_xstats_get,
2609 .xstats_reset = mlx5_xstats_reset,
2610 .xstats_get_names = mlx5_xstats_get_names,
2611 .fw_version_get = mlx5_fw_version_get,
2612 .dev_infos_get = mlx5_dev_infos_get,
2613 .read_clock = mlx5_txpp_read_clock,
2614 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2615 .vlan_filter_set = mlx5_vlan_filter_set,
2616 .rx_queue_setup = mlx5_rx_queue_setup,
2617 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2618 .tx_queue_setup = mlx5_tx_queue_setup,
2619 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2620 .rx_queue_release = mlx5_rx_queue_release,
2621 .tx_queue_release = mlx5_tx_queue_release,
2622 .rx_queue_start = mlx5_rx_queue_start,
2623 .rx_queue_stop = mlx5_rx_queue_stop,
2624 .tx_queue_start = mlx5_tx_queue_start,
2625 .tx_queue_stop = mlx5_tx_queue_stop,
2626 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2627 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2628 .mac_addr_remove = mlx5_mac_addr_remove,
2629 .mac_addr_add = mlx5_mac_addr_add,
2630 .mac_addr_set = mlx5_mac_addr_set,
2631 .set_mc_addr_list = mlx5_set_mc_addr_list,
2632 .mtu_set = mlx5_dev_set_mtu,
2633 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2634 .vlan_offload_set = mlx5_vlan_offload_set,
2635 .filter_ctrl = mlx5_dev_filter_ctrl,
2636 .rxq_info_get = mlx5_rxq_info_get,
2637 .txq_info_get = mlx5_txq_info_get,
2638 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2639 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2640 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2641 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2642 .is_removed = mlx5_is_removed,
2643 .get_module_info = mlx5_get_module_info,
2644 .get_module_eeprom = mlx5_get_module_eeprom,
2645 .hairpin_cap_get = mlx5_hairpin_cap_get,
2646 .mtr_ops_get = mlx5_flow_meter_ops_get,
2647 .hairpin_bind = mlx5_hairpin_bind,
2648 .hairpin_unbind = mlx5_hairpin_unbind,
2649 .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2650 .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2651 .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2652 .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,