drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /* rte flow indexed pool configuration. */
  71 static struct mlx5_indexed_pool_config icfg[] = {
  72         {
  73                 .size = sizeof(struct rte_flow),
  74                 .trunk_size = 64,
  75                 .need_lock = 1,
  76                 .release_mem_en = 0,
  77                 .malloc = mlx5_malloc,
  78                 .free = mlx5_free,
  79                 .per_core_cache = 0,
  80                 .type = "ctl_flow_ipool",
  81         },
  82         {
  83                 .size = sizeof(struct rte_flow),
  84                 .trunk_size = 64,
  85                 .grow_trunk = 3,
  86                 .grow_shift = 2,
  87                 .need_lock = 1,
  88                 .release_mem_en = 0,
  89                 .malloc = mlx5_malloc,
  90                 .free = mlx5_free,
  91                 .per_core_cache = 1 << 14,
  92                 .type = "rte_flow_ipool",
  93         },
  94         {
  95                 .size = sizeof(struct rte_flow),
  96                 .trunk_size = 64,
  97                 .grow_trunk = 3,
  98                 .grow_shift = 2,
  99                 .need_lock = 1,
 100                 .release_mem_en = 0,
 101                 .malloc = mlx5_malloc,
 102                 .free = mlx5_free,
 103                 .per_core_cache = 0,
 104                 .type = "mcp_flow_ipool",
 105         },
 106 };
 107
 108 /**
 109  * Set the completion channel file descriptor interrupt as non-blocking.
 110  *
 111  * @param[in] rxq_obj
 112  *   Pointer to RQ channel object, which includes the channel fd
 113  *
 114  * @param[out] fd
 115  *   The file descriptor (representing the intetrrupt) used in this channel.
 116  *
 117  * @return
 118  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 119  */
 120 int
 121 mlx5_os_set_nonblock_channel_fd(int fd)
 122 {
 123         int flags;
 124
 125         flags = fcntl(fd, F_GETFL);
 126         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 127 }
 128
 129 /**
 130  * Get mlx5 device attributes. The glue function query_device_ex() is called
 131  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 132  * device attributes from the glue out parameter.
 133  *
 134  * @param cdev
 135  *   Pointer to mlx5 device.
 136  *
 137  * @param device_attr
 138  *   Pointer to mlx5 device attributes.
 139  *
 140  * @return
 141  *   0 on success, non zero error number otherwise
 142  */
 143 int
 144 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
 145                      struct mlx5_dev_attr *device_attr)
 146 {
 147         int err;
 148         struct ibv_context *ctx = cdev->ctx;
 149         struct ibv_device_attr_ex attr_ex;
 150
 151         memset(device_attr, 0, sizeof(*device_attr));
 152         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 153         if (err)
 154                 return err;
 155         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 156         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 157         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 158         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 159         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 160         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 161         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 162         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 163         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 164         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 165         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 166         device_attr->max_rwq_indirection_table_size =
 167                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 168         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 169         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 170
 171         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 172         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 173         if (err)
 174                 return err;
 175
 176         device_attr->flags = dv_attr.flags;
 177         device_attr->comp_mask = dv_attr.comp_mask;
 178 #ifdef HAVE_IBV_MLX5_MOD_SWP
 179         device_attr->sw_parsing_offloads =
 180                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 181 #endif
 182         device_attr->min_single_stride_log_num_of_bytes =
 183                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 184         device_attr->max_single_stride_log_num_of_bytes =
 185                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 186         device_attr->min_single_wqe_log_num_of_strides =
 187                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 188         device_attr->max_single_wqe_log_num_of_strides =
 189                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 190         device_attr->stride_supported_qpts =
 191                 dv_attr.striding_rq_caps.supported_qpts;
 192 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 193         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 194 #endif
 195         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 196                 sizeof(device_attr->fw_ver));
 197
 198         return err;
 199 }
 200
 201 /**
 202  * Detect misc5 support or not
 203  *
 204  * @param[in] priv
 205  *   Device private data pointer
 206  */
 207 #ifdef HAVE_MLX5DV_DR
 208 static void
 209 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 210 {
 211 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 212         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 213          * Case: IPv4--->UDP--->VxLAN--->vni
 214          */
 215         void *tbl;
 216         struct mlx5_flow_dv_match_params matcher_mask;
 217         void *match_m;
 218         void *matcher;
 219         void *headers_m;
 220         void *misc5_m;
 221         uint32_t *tunnel_header_m;
 222         struct mlx5dv_flow_matcher_attr dv_attr;
 223
 224         memset(&matcher_mask, 0, sizeof(matcher_mask));
 225         matcher_mask.size = sizeof(matcher_mask.buf);
 226         match_m = matcher_mask.buf;
 227         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 228         misc5_m = MLX5_ADDR_OF(fte_match_param,
 229                                match_m, misc_parameters_5);
 230         tunnel_header_m = (uint32_t *)
 231                                 MLX5_ADDR_OF(fte_match_set_misc5,
 232                                 misc5_m, tunnel_header_1);
 233         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 234         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 235         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 236         *tunnel_header_m = 0xffffff;
 237
 238         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 239         if (!tbl) {
 240                 DRV_LOG(INFO, "No SW steering support");
 241                 return;
 242         }
 243         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 244         dv_attr.match_mask = (void *)&matcher_mask,
 245         dv_attr.match_criteria_enable =
 246                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 247                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 248         dv_attr.priority = 3;
 249 #ifdef HAVE_MLX5DV_DR_ESWITCH
 250         void *misc2_m;
 251         if (priv->config.dv_esw_en) {
 252                 /* FDB enabled reg_c_0 */
 253                 dv_attr.match_criteria_enable |=
 254                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 255                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 256                                        match_m, misc_parameters_2);
 257                 MLX5_SET(fte_match_set_misc2, misc2_m,
 258                          metadata_reg_c_0, 0xffff);
 259         }
 260 #endif
 261         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 262                                                     &dv_attr, tbl);
 263         if (matcher) {
 264                 priv->sh->misc5_cap = 1;
 265                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 266         }
 267         mlx5_glue->dr_destroy_flow_tbl(tbl);
 268 #else
 269         RTE_SET_USED(priv);
 270 #endif
 271 }
 272 #endif
 273
 274 /**
 275  * Initialize DR related data within private structure.
 276  * Routine checks the reference counter and does actual
 277  * resources creation/initialization only if counter is zero.
 278  *
 279  * @param[in] priv
 280  *   Pointer to the private device data structure.
 281  *
 282  * @return
 283  *   Zero on success, positive error code otherwise.
 284  */
 285 static int
 286 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 287 {
 288         struct mlx5_dev_ctx_shared *sh = priv->sh;
 289         char s[MLX5_NAME_SIZE] __rte_unused;
 290         int err;
 291
 292         MLX5_ASSERT(sh && sh->refcnt);
 293         if (sh->refcnt > 1)
 294                 return 0;
 295         err = mlx5_alloc_table_hash_list(priv);
 296         if (err)
 297                 goto error;
 298         /* The resources below are only valid with DV support. */
 299 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 300         /* Init port id action list. */
 301         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 302         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 303                                                    flow_dv_port_id_create_cb,
 304                                                    flow_dv_port_id_match_cb,
 305                                                    flow_dv_port_id_remove_cb,
 306                                                    flow_dv_port_id_clone_cb,
 307                                                  flow_dv_port_id_clone_free_cb);
 308         if (!sh->port_id_action_list)
 309                 goto error;
 310         /* Init push vlan action list. */
 311         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 312         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 313                                                     flow_dv_push_vlan_create_cb,
 314                                                     flow_dv_push_vlan_match_cb,
 315                                                     flow_dv_push_vlan_remove_cb,
 316                                                     flow_dv_push_vlan_clone_cb,
 317                                                flow_dv_push_vlan_clone_free_cb);
 318         if (!sh->push_vlan_action_list)
 319                 goto error;
 320         /* Init sample action list. */
 321         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 322         sh->sample_action_list = mlx5_list_create(s, sh, true,
 323                                                   flow_dv_sample_create_cb,
 324                                                   flow_dv_sample_match_cb,
 325                                                   flow_dv_sample_remove_cb,
 326                                                   flow_dv_sample_clone_cb,
 327                                                   flow_dv_sample_clone_free_cb);
 328         if (!sh->sample_action_list)
 329                 goto error;
 330         /* Init dest array action list. */
 331         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 332         sh->dest_array_list = mlx5_list_create(s, sh, true,
 333                                                flow_dv_dest_array_create_cb,
 334                                                flow_dv_dest_array_match_cb,
 335                                                flow_dv_dest_array_remove_cb,
 336                                                flow_dv_dest_array_clone_cb,
 337                                               flow_dv_dest_array_clone_free_cb);
 338         if (!sh->dest_array_list)
 339                 goto error;
 340 #endif
 341 #ifdef HAVE_MLX5DV_DR
 342         void *domain;
 343
 344         /* Reference counter is zero, we should initialize structures. */
 345         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 346                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 347         if (!domain) {
 348                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 349                 err = errno;
 350                 goto error;
 351         }
 352         sh->rx_domain = domain;
 353         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 354                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 355         if (!domain) {
 356                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 357                 err = errno;
 358                 goto error;
 359         }
 360         sh->tx_domain = domain;
 361 #ifdef HAVE_MLX5DV_DR_ESWITCH
 362         if (priv->config.dv_esw_en) {
 363                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 364                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 365                 if (!domain) {
 366                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 367                         err = errno;
 368                         goto error;
 369                 }
 370                 sh->fdb_domain = domain;
 371         }
 372         /*
 373          * The drop action is just some dummy placeholder in rdma-core. It
 374          * does not belong to domains and has no any attributes, and, can be
 375          * shared by the entire device.
 376          */
 377         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 378         if (!sh->dr_drop_action) {
 379                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 380                 err = errno;
 381                 goto error;
 382         }
 383 #endif
 384         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 385                 err = mlx5_alloc_tunnel_hub(sh);
 386         if (err) {
 387                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 388                 goto error;
 389         }
 390         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 391                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 392                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 393                 if (sh->fdb_domain)
 394                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 395         }
 396         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 397         if (!priv->config.allow_duplicate_pattern) {
 398 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 399                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 400 #endif
 401                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 402                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 403                 if (sh->fdb_domain)
 404                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 405         }
 406
 407         __mlx5_discovery_misc5_cap(priv);
 408 #endif /* HAVE_MLX5DV_DR */
 409         sh->default_miss_action =
 410                         mlx5_glue->dr_create_flow_action_default_miss();
 411         if (!sh->default_miss_action)
 412                 DRV_LOG(WARNING, "Default miss action is not supported.");
 413         return 0;
 414 error:
 415         /* Rollback the created objects. */
 416         if (sh->rx_domain) {
 417                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 418                 sh->rx_domain = NULL;
 419         }
 420         if (sh->tx_domain) {
 421                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 422                 sh->tx_domain = NULL;
 423         }
 424         if (sh->fdb_domain) {
 425                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 426                 sh->fdb_domain = NULL;
 427         }
 428         if (sh->dr_drop_action) {
 429                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 430                 sh->dr_drop_action = NULL;
 431         }
 432         if (sh->pop_vlan_action) {
 433                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 434                 sh->pop_vlan_action = NULL;
 435         }
 436         if (sh->encaps_decaps) {
 437                 mlx5_hlist_destroy(sh->encaps_decaps);
 438                 sh->encaps_decaps = NULL;
 439         }
 440         if (sh->modify_cmds) {
 441                 mlx5_hlist_destroy(sh->modify_cmds);
 442                 sh->modify_cmds = NULL;
 443         }
 444         if (sh->tag_table) {
 445                 /* tags should be destroyed with flow before. */
 446                 mlx5_hlist_destroy(sh->tag_table);
 447                 sh->tag_table = NULL;
 448         }
 449         if (sh->tunnel_hub) {
 450                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 451                 sh->tunnel_hub = NULL;
 452         }
 453         mlx5_free_table_hash_list(priv);
 454         if (sh->port_id_action_list) {
 455                 mlx5_list_destroy(sh->port_id_action_list);
 456                 sh->port_id_action_list = NULL;
 457         }
 458         if (sh->push_vlan_action_list) {
 459                 mlx5_list_destroy(sh->push_vlan_action_list);
 460                 sh->push_vlan_action_list = NULL;
 461         }
 462         if (sh->sample_action_list) {
 463                 mlx5_list_destroy(sh->sample_action_list);
 464                 sh->sample_action_list = NULL;
 465         }
 466         if (sh->dest_array_list) {
 467                 mlx5_list_destroy(sh->dest_array_list);
 468                 sh->dest_array_list = NULL;
 469         }
 470         return err;
 471 }
 472
 473 /**
 474  * Destroy DR related data within private structure.
 475  *
 476  * @param[in] priv
 477  *   Pointer to the private device data structure.
 478  */
 479 void
 480 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 481 {
 482         struct mlx5_dev_ctx_shared *sh = priv->sh;
 483
 484         MLX5_ASSERT(sh && sh->refcnt);
 485         if (sh->refcnt > 1)
 486                 return;
 487 #ifdef HAVE_MLX5DV_DR
 488         if (sh->rx_domain) {
 489                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 490                 sh->rx_domain = NULL;
 491         }
 492         if (sh->tx_domain) {
 493                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 494                 sh->tx_domain = NULL;
 495         }
 496 #ifdef HAVE_MLX5DV_DR_ESWITCH
 497         if (sh->fdb_domain) {
 498                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 499                 sh->fdb_domain = NULL;
 500         }
 501         if (sh->dr_drop_action) {
 502                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 503                 sh->dr_drop_action = NULL;
 504         }
 505 #endif
 506         if (sh->pop_vlan_action) {
 507                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 508                 sh->pop_vlan_action = NULL;
 509         }
 510 #endif /* HAVE_MLX5DV_DR */
 511         if (sh->default_miss_action)
 512                 mlx5_glue->destroy_flow_action
 513                                 (sh->default_miss_action);
 514         if (sh->encaps_decaps) {
 515                 mlx5_hlist_destroy(sh->encaps_decaps);
 516                 sh->encaps_decaps = NULL;
 517         }
 518         if (sh->modify_cmds) {
 519                 mlx5_hlist_destroy(sh->modify_cmds);
 520                 sh->modify_cmds = NULL;
 521         }
 522         if (sh->tag_table) {
 523                 /* tags should be destroyed with flow before. */
 524                 mlx5_hlist_destroy(sh->tag_table);
 525                 sh->tag_table = NULL;
 526         }
 527         if (sh->tunnel_hub) {
 528                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 529                 sh->tunnel_hub = NULL;
 530         }
 531         mlx5_free_table_hash_list(priv);
 532         if (sh->port_id_action_list) {
 533                 mlx5_list_destroy(sh->port_id_action_list);
 534                 sh->port_id_action_list = NULL;
 535         }
 536         if (sh->push_vlan_action_list) {
 537                 mlx5_list_destroy(sh->push_vlan_action_list);
 538                 sh->push_vlan_action_list = NULL;
 539         }
 540         if (sh->sample_action_list) {
 541                 mlx5_list_destroy(sh->sample_action_list);
 542                 sh->sample_action_list = NULL;
 543         }
 544         if (sh->dest_array_list) {
 545                 mlx5_list_destroy(sh->dest_array_list);
 546                 sh->dest_array_list = NULL;
 547         }
 548 }
 549
 550 /**
 551  * Initialize shared data between primary and secondary process.
 552  *
 553  * A memzone is reserved by primary process and secondary processes attach to
 554  * the memzone.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 mlx5_init_shared_data(void)
 561 {
 562         const struct rte_memzone *mz;
 563         int ret = 0;
 564
 565         rte_spinlock_lock(&mlx5_shared_data_lock);
 566         if (mlx5_shared_data == NULL) {
 567                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 568                         /* Allocate shared memory. */
 569                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 570                                                  sizeof(*mlx5_shared_data),
 571                                                  SOCKET_ID_ANY, 0);
 572                         if (mz == NULL) {
 573                                 DRV_LOG(ERR,
 574                                         "Cannot allocate mlx5 shared data");
 575                                 ret = -rte_errno;
 576                                 goto error;
 577                         }
 578                         mlx5_shared_data = mz->addr;
 579                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 580                         rte_spinlock_init(&mlx5_shared_data->lock);
 581                 } else {
 582                         /* Lookup allocated shared memory. */
 583                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 584                         if (mz == NULL) {
 585                                 DRV_LOG(ERR,
 586                                         "Cannot attach mlx5 shared data");
 587                                 ret = -rte_errno;
 588                                 goto error;
 589                         }
 590                         mlx5_shared_data = mz->addr;
 591                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 592                 }
 593         }
 594 error:
 595         rte_spinlock_unlock(&mlx5_shared_data_lock);
 596         return ret;
 597 }
 598
 599 /**
 600  * PMD global initialization.
 601  *
 602  * Independent from individual device, this function initializes global
 603  * per-PMD data structures distinguishing primary and secondary processes.
 604  * Hence, each initialization is called once per a process.
 605  *
 606  * @return
 607  *   0 on success, a negative errno value otherwise and rte_errno is set.
 608  */
 609 static int
 610 mlx5_init_once(void)
 611 {
 612         struct mlx5_shared_data *sd;
 613         struct mlx5_local_data *ld = &mlx5_local_data;
 614         int ret = 0;
 615
 616         if (mlx5_init_shared_data())
 617                 return -rte_errno;
 618         sd = mlx5_shared_data;
 619         MLX5_ASSERT(sd);
 620         rte_spinlock_lock(&sd->lock);
 621         switch (rte_eal_process_type()) {
 622         case RTE_PROC_PRIMARY:
 623                 if (sd->init_done)
 624                         break;
 625                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 626                                            mlx5_mp_os_primary_handle);
 627                 if (ret)
 628                         goto out;
 629                 sd->init_done = true;
 630                 break;
 631         case RTE_PROC_SECONDARY:
 632                 if (ld->init_done)
 633                         break;
 634                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 635                                              mlx5_mp_os_secondary_handle);
 636                 if (ret)
 637                         goto out;
 638                 ++sd->secondary_cnt;
 639                 ld->init_done = true;
 640                 break;
 641         default:
 642                 break;
 643         }
 644 out:
 645         rte_spinlock_unlock(&sd->lock);
 646         return ret;
 647 }
 648
 649 /**
 650  * Create the Tx queue DevX/Verbs object.
 651  *
 652  * @param dev
 653  *   Pointer to Ethernet device.
 654  * @param idx
 655  *   Queue index in DPDK Tx queue array.
 656  *
 657  * @return
 658  *   0 on success, a negative errno value otherwise and rte_errno is set.
 659  */
 660 static int
 661 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 662 {
 663         struct mlx5_priv *priv = dev->data->dev_private;
 664         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 665         struct mlx5_txq_ctrl *txq_ctrl =
 666                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 667
 668         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 669                 return mlx5_txq_devx_obj_new(dev, idx);
 670 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 671         if (!priv->config.dv_esw_en)
 672                 return mlx5_txq_devx_obj_new(dev, idx);
 673 #endif
 674         return mlx5_txq_ibv_obj_new(dev, idx);
 675 }
 676
 677 /**
 678  * Release an Tx DevX/verbs queue object.
 679  *
 680  * @param txq_obj
 681  *   DevX/Verbs Tx queue object.
 682  */
 683 static void
 684 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 685 {
 686         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 687                 mlx5_txq_devx_obj_release(txq_obj);
 688                 return;
 689         }
 690 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 691         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 692                 mlx5_txq_devx_obj_release(txq_obj);
 693                 return;
 694         }
 695 #endif
 696         mlx5_txq_ibv_obj_release(txq_obj);
 697 }
 698
 699 /**
 700  * DV flow counter mode detect and config.
 701  *
 702  * @param dev
 703  *   Pointer to rte_eth_dev structure.
 704  *
 705  */
 706 static void
 707 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 708 {
 709 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 710         struct mlx5_priv *priv = dev->data->dev_private;
 711         struct mlx5_dev_ctx_shared *sh = priv->sh;
 712         bool fallback;
 713
 714 #ifndef HAVE_IBV_DEVX_ASYNC
 715         fallback = true;
 716 #else
 717         fallback = false;
 718         if (!sh->devx || !priv->config.dv_flow_en ||
 719             !priv->config.hca_attr.flow_counters_dump ||
 720             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 721             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 722                 fallback = true;
 723 #endif
 724         if (fallback)
 725                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 726                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 727                         priv->config.hca_attr.flow_counters_dump,
 728                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 729         /* Initialize fallback mode only on the port initializes sh. */
 730         if (sh->refcnt == 1)
 731                 sh->cmng.counter_fallback = fallback;
 732         else if (fallback != sh->cmng.counter_fallback)
 733                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 734                         "with others:%d.", PORT_ID(priv), fallback);
 735 #endif
 736 }
 737
 738 /**
 739  * DR flow drop action support detect.
 740  *
 741  * @param dev
 742  *   Pointer to rte_eth_dev structure.
 743  *
 744  */
 745 static void
 746 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 747 {
 748 #ifdef HAVE_MLX5DV_DR
 749         struct mlx5_priv *priv = dev->data->dev_private;
 750
 751         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 752                 return;
 753         /**
 754          * DR supports drop action placeholder when it is supported;
 755          * otherwise, use the queue drop action.
 756          */
 757         if (mlx5_flow_discover_dr_action_support(dev))
 758                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 759         else
 760                 priv->root_drop_action = priv->sh->dr_drop_action;
 761 #endif
 762 }
 763
 764 static void
 765 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 766 {
 767         struct mlx5_priv *priv = dev->data->dev_private;
 768         void *ctx = priv->sh->cdev->ctx;
 769
 770         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 771         if (!priv->q_counters) {
 772                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 773                 struct ibv_wq *wq;
 774
 775                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 776                         "by DevX - fall-back to use the kernel driver global "
 777                         "queue counter.", dev->data->port_id);
 778                 /* Create WQ by kernel and query its queue counter ID. */
 779                 if (cq) {
 780                         wq = mlx5_glue->create_wq(ctx,
 781                                                   &(struct ibv_wq_init_attr){
 782                                                     .wq_type = IBV_WQT_RQ,
 783                                                     .max_wr = 1,
 784                                                     .max_sge = 1,
 785                                                     .pd = priv->sh->cdev->pd,
 786                                                     .cq = cq,
 787                                                 });
 788                         if (wq) {
 789                                 /* Counter is assigned only on RDY state. */
 790                                 int ret = mlx5_glue->modify_wq(wq,
 791                                                  &(struct ibv_wq_attr){
 792                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 793                                                  .wq_state = IBV_WQS_RDY,
 794                                                 });
 795
 796                                 if (ret == 0)
 797                                         mlx5_devx_cmd_wq_query(wq,
 798                                                          &priv->counter_set_id);
 799                                 claim_zero(mlx5_glue->destroy_wq(wq));
 800                         }
 801                         claim_zero(mlx5_glue->destroy_cq(cq));
 802                 }
 803         } else {
 804                 priv->counter_set_id = priv->q_counters->id;
 805         }
 806         if (priv->counter_set_id == 0)
 807                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 808                         "available.", dev->data->port_id);
 809 }
 810
 811 /**
 812  * Check if representor spawn info match devargs.
 813  *
 814  * @param spawn
 815  *   Verbs device parameters (name, port, switch_info) to spawn.
 816  * @param eth_da
 817  *   Device devargs to probe.
 818  *
 819  * @return
 820  *   Match result.
 821  */
 822 static bool
 823 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 824                        struct rte_eth_devargs *eth_da)
 825 {
 826         struct mlx5_switch_info *switch_info = &spawn->info;
 827         unsigned int p, f;
 828         uint16_t id;
 829         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 830                                                       eth_da->type);
 831
 832         switch (eth_da->type) {
 833         case RTE_ETH_REPRESENTOR_SF:
 834                 if (!(spawn->info.port_name == -1 &&
 835                       switch_info->name_type ==
 836                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 837                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 838                         rte_errno = EBUSY;
 839                         return false;
 840                 }
 841                 break;
 842         case RTE_ETH_REPRESENTOR_VF:
 843                 /* Allows HPF representor index -1 as exception. */
 844                 if (!(spawn->info.port_name == -1 &&
 845                       switch_info->name_type ==
 846                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 847                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 848                         rte_errno = EBUSY;
 849                         return false;
 850                 }
 851                 break;
 852         case RTE_ETH_REPRESENTOR_NONE:
 853                 rte_errno = EBUSY;
 854                 return false;
 855         default:
 856                 rte_errno = ENOTSUP;
 857                 DRV_LOG(ERR, "unsupported representor type");
 858                 return false;
 859         }
 860         /* Check representor ID: */
 861         for (p = 0; p < eth_da->nb_ports; ++p) {
 862                 if (spawn->pf_bond < 0) {
 863                         /* For non-LAG mode, allow and ignore pf. */
 864                         switch_info->pf_num = eth_da->ports[p];
 865                         repr_id = mlx5_representor_id_encode(switch_info,
 866                                                              eth_da->type);
 867                 }
 868                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 869                         id = MLX5_REPRESENTOR_ID
 870                                 (eth_da->ports[p], eth_da->type,
 871                                  eth_da->representor_ports[f]);
 872                         if (repr_id == id)
 873                                 return true;
 874                 }
 875         }
 876         rte_errno = EBUSY;
 877         return false;
 878 }
 879
 880
 881 /**
 882  * Spawn an Ethernet device from Verbs information.
 883  *
 884  * @param dpdk_dev
 885  *   Backing DPDK device.
 886  * @param spawn
 887  *   Verbs device parameters (name, port, switch_info) to spawn.
 888  * @param config
 889  *   Device configuration parameters.
 890  * @param eth_da
 891  *   Device arguments.
 892  *
 893  * @return
 894  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 895  *   is set. The following errors are defined:
 896  *
 897  *   EBUSY: device is not supposed to be spawned.
 898  *   EEXIST: device is already spawned
 899  */
 900 static struct rte_eth_dev *
 901 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 902                struct mlx5_dev_spawn_data *spawn,
 903                struct mlx5_dev_config *config,
 904                struct rte_eth_devargs *eth_da)
 905 {
 906         const struct mlx5_switch_info *switch_info = &spawn->info;
 907         struct mlx5_dev_ctx_shared *sh = NULL;
 908         struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 909         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 910         struct rte_eth_dev *eth_dev = NULL;
 911         struct mlx5_priv *priv = NULL;
 912         int err = 0;
 913         unsigned int hw_padding = 0;
 914         unsigned int mps;
 915         unsigned int mpls_en = 0;
 916         unsigned int swp = 0;
 917         unsigned int mprq = 0;
 918         unsigned int mprq_min_stride_size_n = 0;
 919         unsigned int mprq_max_stride_size_n = 0;
 920         unsigned int mprq_min_stride_num_n = 0;
 921         unsigned int mprq_max_stride_num_n = 0;
 922         struct rte_ether_addr mac;
 923         char name[RTE_ETH_NAME_MAX_LEN];
 924         int own_domain_id = 0;
 925         uint16_t port_id;
 926         struct mlx5_port_info vport_info = { .query_flags = 0 };
 927         int nl_rdma = -1;
 928         int i;
 929
 930         /* Determine if this port representor is supposed to be spawned. */
 931         if (switch_info->representor && dpdk_dev->devargs &&
 932             !mlx5_representor_match(spawn, eth_da))
 933                 return NULL;
 934         /* Build device name. */
 935         if (spawn->pf_bond < 0) {
 936                 /* Single device. */
 937                 if (!switch_info->representor)
 938                         strlcpy(name, dpdk_dev->name, sizeof(name));
 939                 else
 940                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 941                                  dpdk_dev->name,
 942                                  switch_info->name_type ==
 943                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 944                                  switch_info->port_name);
 945         } else {
 946                 /* Bonding device. */
 947                 if (!switch_info->representor) {
 948                         err = snprintf(name, sizeof(name), "%s_%s",
 949                                        dpdk_dev->name, spawn->phys_dev_name);
 950                 } else {
 951                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 952                                 dpdk_dev->name, spawn->phys_dev_name,
 953                                 switch_info->ctrl_num,
 954                                 switch_info->pf_num,
 955                                 switch_info->name_type ==
 956                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 957                                 switch_info->port_name);
 958                 }
 959         }
 960         if (err >= (int)sizeof(name))
 961                 DRV_LOG(WARNING, "device name overflow %s", name);
 962         /* check if the device is already spawned */
 963         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 964                 rte_errno = EEXIST;
 965                 return NULL;
 966         }
 967         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 968         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 969                 struct mlx5_mp_id mp_id;
 970
 971                 eth_dev = rte_eth_dev_attach_secondary(name);
 972                 if (eth_dev == NULL) {
 973                         DRV_LOG(ERR, "can not attach rte ethdev");
 974                         rte_errno = ENOMEM;
 975                         return NULL;
 976                 }
 977                 eth_dev->device = dpdk_dev;
 978                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 979                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 980                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 981                 err = mlx5_proc_priv_init(eth_dev);
 982                 if (err)
 983                         return NULL;
 984                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
 985                 /* Receive command fd from primary process */
 986                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 987                 if (err < 0)
 988                         goto err_secondary;
 989                 /* Remap UAR for Tx queues. */
 990                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 991                 if (err)
 992                         goto err_secondary;
 993                 /*
 994                  * Ethdev pointer is still required as input since
 995                  * the primary device is not accessible from the
 996                  * secondary process.
 997                  */
 998                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 999                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1000                 return eth_dev;
1001 err_secondary:
1002                 mlx5_dev_close(eth_dev);
1003                 return NULL;
1004         }
1005         /*
1006          * Some parameters ("tx_db_nc" in particularly) are needed in
1007          * advance to create dv/verbs device context. We proceed the
1008          * devargs here to get ones, and later proceed devargs again
1009          * to override some hardware settings.
1010          */
1011         err = mlx5_args(config, dpdk_dev->devargs);
1012         if (err) {
1013                 err = rte_errno;
1014                 DRV_LOG(ERR, "failed to process device arguments: %s",
1015                         strerror(rte_errno));
1016                 goto error;
1017         }
1018         if (config->dv_miss_info) {
1019                 if (switch_info->master || switch_info->representor)
1020                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
1021         }
1022         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
1023         if (!sh)
1024                 return NULL;
1025 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1026         config->dest_tir = 1;
1027 #endif
1028 #ifdef HAVE_IBV_MLX5_MOD_SWP
1029         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1030 #endif
1031         /*
1032          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1033          * as all ConnectX-5 devices.
1034          */
1035 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1036         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1037 #endif
1038 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1039         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1040 #endif
1041         mlx5_glue->dv_query_device(sh->cdev->ctx, &dv_attr);
1042         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1043                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1044                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1045                         mps = MLX5_MPW_ENHANCED;
1046                 } else {
1047                         DRV_LOG(DEBUG, "MPW is supported");
1048                         mps = MLX5_MPW;
1049                 }
1050         } else {
1051                 DRV_LOG(DEBUG, "MPW isn't supported");
1052                 mps = MLX5_MPW_DISABLED;
1053         }
1054 #ifdef HAVE_IBV_MLX5_MOD_SWP
1055         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1056                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1057         DRV_LOG(DEBUG, "SWP support: %u", swp);
1058 #endif
1059         config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1060                 MLX5_SW_PARSING_TSO_CAP);
1061 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1062         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1063                 struct mlx5dv_striding_rq_caps mprq_caps =
1064                         dv_attr.striding_rq_caps;
1065
1066                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1067                         mprq_caps.min_single_stride_log_num_of_bytes);
1068                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1069                         mprq_caps.max_single_stride_log_num_of_bytes);
1070                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1071                         mprq_caps.min_single_wqe_log_num_of_strides);
1072                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1073                         mprq_caps.max_single_wqe_log_num_of_strides);
1074                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1075                         mprq_caps.supported_qpts);
1076                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1077                 mprq = 1;
1078                 mprq_min_stride_size_n =
1079                         mprq_caps.min_single_stride_log_num_of_bytes;
1080                 mprq_max_stride_size_n =
1081                         mprq_caps.max_single_stride_log_num_of_bytes;
1082                 mprq_min_stride_num_n =
1083                         mprq_caps.min_single_wqe_log_num_of_strides;
1084                 mprq_max_stride_num_n =
1085                         mprq_caps.max_single_wqe_log_num_of_strides;
1086         }
1087 #endif
1088         /* Rx CQE compression is enabled by default. */
1089         config->cqe_comp = 1;
1090 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1091         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1092                 config->tunnel_en = dv_attr.tunnel_offloads_caps &
1093                              (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1094                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1095                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1096         }
1097         if (config->tunnel_en) {
1098                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1099                 config->tunnel_en &
1100                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1101                 config->tunnel_en &
1102                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1103                 config->tunnel_en &
1104                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1105                 );
1106         } else {
1107                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1108         }
1109 #else
1110         DRV_LOG(WARNING,
1111                 "tunnel offloading disabled due to old OFED/rdma-core version");
1112 #endif
1113 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1114         mpls_en = ((dv_attr.tunnel_offloads_caps &
1115                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1116                    (dv_attr.tunnel_offloads_caps &
1117                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1118         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1119                 mpls_en ? "" : "not ");
1120 #else
1121         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1122                 " old OFED/rdma-core version or firmware configuration");
1123 #endif
1124         config->mpls_en = mpls_en;
1125         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1126         /* Check port status. */
1127         if (spawn->phys_port <= UINT8_MAX) {
1128                 /* Legacy Verbs api only support u8 port number. */
1129                 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1130                                             &port_attr);
1131                 if (err) {
1132                         DRV_LOG(ERR, "port query failed: %s", strerror(err));
1133                         goto error;
1134                 }
1135                 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1136                         DRV_LOG(ERR, "port is not configured in Ethernet mode");
1137                         err = EINVAL;
1138                         goto error;
1139                 }
1140         } else if (nl_rdma >= 0) {
1141                 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1142                 err = mlx5_nl_port_state(nl_rdma,
1143                         spawn->phys_dev_name,
1144                         spawn->phys_port);
1145                 if (err < 0) {
1146                         DRV_LOG(INFO, "Failed to get netlink port state: %s",
1147                                 strerror(rte_errno));
1148                         err = -rte_errno;
1149                         goto error;
1150                 }
1151                 port_attr.state = (enum ibv_port_state)err;
1152         }
1153         if (port_attr.state != IBV_PORT_ACTIVE)
1154                 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1155                         mlx5_glue->port_state_str(port_attr.state),
1156                         port_attr.state);
1157         /* Allocate private eth device data. */
1158         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1159                            sizeof(*priv),
1160                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1161         if (priv == NULL) {
1162                 DRV_LOG(ERR, "priv allocation failure");
1163                 err = ENOMEM;
1164                 goto error;
1165         }
1166         priv->sh = sh;
1167         priv->dev_port = spawn->phys_port;
1168         priv->pci_dev = spawn->pci_dev;
1169         priv->mtu = RTE_ETHER_MTU;
1170         /* Some internal functions rely on Netlink sockets, open them now. */
1171         priv->nl_socket_rdma = nl_rdma;
1172         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1173         priv->representor = !!switch_info->representor;
1174         priv->master = !!switch_info->master;
1175         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1176         priv->vport_meta_tag = 0;
1177         priv->vport_meta_mask = 0;
1178         priv->pf_bond = spawn->pf_bond;
1179
1180         DRV_LOG(DEBUG,
1181                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1182                 priv->dev_port, dpdk_dev->bus->name,
1183                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1184                 priv->master, priv->representor, priv->pf_bond);
1185
1186         /*
1187          * If we have E-Switch we should determine the vport attributes.
1188          * E-Switch may use either source vport field or reg_c[0] metadata
1189          * register to match on vport index. The engaged part of metadata
1190          * register is defined by mask.
1191          */
1192         if (switch_info->representor || switch_info->master) {
1193                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1194                                                  spawn->phys_port,
1195                                                  &vport_info);
1196                 if (err) {
1197                         DRV_LOG(WARNING,
1198                                 "Cannot query devx port %d on device %s",
1199                                 spawn->phys_port, spawn->phys_dev_name);
1200                         vport_info.query_flags = 0;
1201                 }
1202         }
1203         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1204                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1205                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1206                 if (!priv->vport_meta_mask) {
1207                         DRV_LOG(ERR,
1208                                 "vport zero mask for port %d on bonding device %s",
1209                                 spawn->phys_port, spawn->phys_dev_name);
1210                         err = ENOTSUP;
1211                         goto error;
1212                 }
1213                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1214                         DRV_LOG(ERR,
1215                                 "Invalid vport tag for port %d on bonding device %s",
1216                                 spawn->phys_port, spawn->phys_dev_name);
1217                         err = ENOTSUP;
1218                         goto error;
1219                 }
1220         }
1221         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1222                 priv->vport_id = vport_info.vport_id;
1223         } else if (spawn->pf_bond >= 0 &&
1224                    (switch_info->representor || switch_info->master)) {
1225                 DRV_LOG(ERR,
1226                         "Cannot deduce vport index for port %d on bonding device %s",
1227                         spawn->phys_port, spawn->phys_dev_name);
1228                 err = ENOTSUP;
1229                 goto error;
1230         } else {
1231                 /*
1232                  * Suppose vport index in compatible way. Kernel/rdma_core
1233                  * support single E-Switch per PF configurations only and
1234                  * vport_id field contains the vport index for associated VF,
1235                  * which is deduced from representor port name.
1236                  * For example, let's have the IB device port 10, it has
1237                  * attached network device eth0, which has port name attribute
1238                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1239                  * as 3 (2+1). This assigning schema should be changed if the
1240                  * multiple E-Switch instances per PF configurations or/and PCI
1241                  * subfunctions are added.
1242                  */
1243                 priv->vport_id = switch_info->representor ?
1244                                  switch_info->port_name + 1 : -1;
1245         }
1246         priv->representor_id = mlx5_representor_id_encode(switch_info,
1247                                                           eth_da->type);
1248         /*
1249          * Look for sibling devices in order to reuse their switch domain
1250          * if any, otherwise allocate one.
1251          */
1252         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1253                 const struct mlx5_priv *opriv =
1254                         rte_eth_devices[port_id].data->dev_private;
1255
1256                 if (!opriv ||
1257                     opriv->sh != priv->sh ||
1258                         opriv->domain_id ==
1259                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1260                         continue;
1261                 priv->domain_id = opriv->domain_id;
1262                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1263                         priv->dev_port, priv->domain_id);
1264                 break;
1265         }
1266         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1267                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1268                 if (err) {
1269                         err = rte_errno;
1270                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1271                                 strerror(rte_errno));
1272                         goto error;
1273                 }
1274                 own_domain_id = 1;
1275                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1276                         priv->dev_port, priv->domain_id);
1277         }
1278         /* Override some values set by hardware configuration. */
1279         mlx5_args(config, dpdk_dev->devargs);
1280         err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev);
1281         if (err)
1282                 goto error;
1283         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1284                             IBV_DEVICE_RAW_IP_CSUM);
1285         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1286                 (config->hw_csum ? "" : "not "));
1287 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1288         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1289         DRV_LOG(DEBUG, "counters are not supported");
1290 #endif
1291 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1292         if (config->dv_flow_en) {
1293                 DRV_LOG(WARNING, "DV flow is not supported");
1294                 config->dv_flow_en = 0;
1295         }
1296 #endif
1297         if (spawn->max_port > UINT8_MAX) {
1298                 /* Verbs can't support ports larger than 255 by design. */
1299                 DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
1300                 err = EINVAL;
1301                 goto error;
1302         }
1303         config->ind_table_max_size =
1304                 sh->device_attr.max_rwq_indirection_table_size;
1305         /*
1306          * Remove this check once DPDK supports larger/variable
1307          * indirection tables.
1308          */
1309         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1310                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1311         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1312                 config->ind_table_max_size);
1313         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1314                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1315         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1316                 (config->hw_vlan_strip ? "" : "not "));
1317         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1318                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1319 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1320         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1321 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1322         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1323                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1324 #endif
1325         if (config->hw_padding && !hw_padding) {
1326                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1327                 config->hw_padding = 0;
1328         } else if (config->hw_padding) {
1329                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1330         }
1331         config->tso = (sh->device_attr.max_tso > 0 &&
1332                       (sh->device_attr.tso_supported_qpts &
1333                        (1 << IBV_QPT_RAW_PACKET)));
1334         if (config->tso)
1335                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1336         /*
1337          * MPW is disabled by default, while the Enhanced MPW is enabled
1338          * by default.
1339          */
1340         if (config->mps == MLX5_ARG_UNSET)
1341                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1342                                                           MLX5_MPW_DISABLED;
1343         else
1344                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1345         DRV_LOG(INFO, "%sMPS is %s",
1346                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1347                 config->mps == MLX5_MPW ? "legacy " : "",
1348                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1349         if (sh->devx) {
1350                 config->hca_attr = sh->cdev->config.hca_attr;
1351                 sh->steering_format_version =
1352                         config->hca_attr.steering_format_version;
1353                 /* Check for LRO support. */
1354                 if (config->dest_tir && config->hca_attr.lro_cap &&
1355                     config->dv_flow_en) {
1356                         /* TBD check tunnel lro caps. */
1357                         config->lro.supported = config->hca_attr.lro_cap;
1358                         DRV_LOG(DEBUG, "Device supports LRO");
1359                         /*
1360                          * If LRO timeout is not configured by application,
1361                          * use the minimal supported value.
1362                          */
1363                         if (!config->lro.timeout)
1364                                 config->lro.timeout =
1365                                 config->hca_attr.lro_timer_supported_periods[0];
1366                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1367                                 config->lro.timeout);
1368                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1369                                 "required for coalescing is %d bytes",
1370                                 config->hca_attr.lro_min_mss_size);
1371                 }
1372 #if defined(HAVE_MLX5DV_DR) && \
1373         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1374          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1375                 if (config->hca_attr.qos.sup &&
1376                     config->hca_attr.qos.flow_meter_old &&
1377                     config->dv_flow_en) {
1378                         uint8_t reg_c_mask =
1379                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1380                         /*
1381                          * Meter needs two REG_C's for color match and pre-sfx
1382                          * flow match. Here get the REG_C for color match.
1383                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1384                          */
1385                         reg_c_mask &= 0xfc;
1386                         if (__builtin_popcount(reg_c_mask) < 1) {
1387                                 priv->mtr_en = 0;
1388                                 DRV_LOG(WARNING, "No available register for"
1389                                         " meter.");
1390                         } else {
1391                                 /*
1392                                  * The meter color register is used by the
1393                                  * flow-hit feature as well.
1394                                  * The flow-hit feature must use REG_C_3
1395                                  * Prefer REG_C_3 if it is available.
1396                                  */
1397                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1398                                         priv->mtr_color_reg = REG_C_3;
1399                                 else
1400                                         priv->mtr_color_reg = ffs(reg_c_mask)
1401                                                               - 1 + REG_C_0;
1402                                 priv->mtr_en = 1;
1403                                 priv->mtr_reg_share =
1404                                       config->hca_attr.qos.flow_meter;
1405                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1406                                         priv->mtr_color_reg);
1407                         }
1408                 }
1409                 if (config->hca_attr.qos.sup &&
1410                         config->hca_attr.qos.flow_meter_aso_sup) {
1411                         uint32_t log_obj_size =
1412                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1413                         if (log_obj_size >=
1414                         config->hca_attr.qos.log_meter_aso_granularity &&
1415                         log_obj_size <=
1416                         config->hca_attr.qos.log_meter_aso_max_alloc)
1417                                 sh->meter_aso_en = 1;
1418                 }
1419                 if (priv->mtr_en) {
1420                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1421                         if (err) {
1422                                 err = -err;
1423                                 goto error;
1424                         }
1425                 }
1426                 if (config->hca_attr.flow.tunnel_header_0_1)
1427                         sh->tunnel_header_0_1 = 1;
1428 #endif
1429 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1430                 if (config->hca_attr.flow_hit_aso &&
1431                     priv->mtr_color_reg == REG_C_3) {
1432                         sh->flow_hit_aso_en = 1;
1433                         err = mlx5_flow_aso_age_mng_init(sh);
1434                         if (err) {
1435                                 err = -err;
1436                                 goto error;
1437                         }
1438                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1439                 }
1440 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1441 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1442         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1443                 if (config->hca_attr.ct_offload &&
1444                     priv->mtr_color_reg == REG_C_3) {
1445                         err = mlx5_flow_aso_ct_mng_init(sh);
1446                         if (err) {
1447                                 err = -err;
1448                                 goto error;
1449                         }
1450                         DRV_LOG(DEBUG, "CT ASO is supported.");
1451                         sh->ct_aso_en = 1;
1452                 }
1453 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1454 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1455                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1456                     config->dv_flow_en) {
1457                         priv->sampler_en = 1;
1458                         DRV_LOG(DEBUG, "Sampler enabled!");
1459                 } else {
1460                         priv->sampler_en = 0;
1461                         if (!config->hca_attr.log_max_ft_sampler_num)
1462                                 DRV_LOG(WARNING,
1463                                         "No available register for sampler.");
1464                         else
1465                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1466                 }
1467 #endif
1468         }
1469         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1470             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1471                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1472                 config->cqe_comp = 0;
1473         }
1474         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1475             (!sh->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1476                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1477                                  " format isn't supported.");
1478                 config->cqe_comp = 0;
1479         }
1480         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1481             (!sh->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1482                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1483                                  " format isn't supported.");
1484                 config->cqe_comp = 0;
1485         }
1486         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1487                         config->cqe_comp ? "" : "not ");
1488         if (config->tx_pp) {
1489                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1490                         config->hca_attr.dev_freq_khz);
1491                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1492                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1493                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1494                         config->hca_attr.cross_channel ? "" : "not ");
1495                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1496                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1497                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1498                         config->hca_attr.non_wire_sq ? "" : "not ");
1499                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1500                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1501                         config->hca_attr.log_max_static_sq_wq);
1502                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1503                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1504                 if (!sh->devx) {
1505                         DRV_LOG(ERR, "DevX is required for packet pacing");
1506                         err = ENODEV;
1507                         goto error;
1508                 }
1509                 if (!config->hca_attr.qos.packet_pacing) {
1510                         DRV_LOG(ERR, "Packet pacing is not supported");
1511                         err = ENODEV;
1512                         goto error;
1513                 }
1514                 if (!config->hca_attr.cross_channel) {
1515                         DRV_LOG(ERR, "Cross channel operations are"
1516                                      " required for packet pacing");
1517                         err = ENODEV;
1518                         goto error;
1519                 }
1520                 if (!config->hca_attr.wqe_index_ignore) {
1521                         DRV_LOG(ERR, "WQE index ignore feature is"
1522                                      " required for packet pacing");
1523                         err = ENODEV;
1524                         goto error;
1525                 }
1526                 if (!config->hca_attr.non_wire_sq) {
1527                         DRV_LOG(ERR, "Non-wire SQ feature is"
1528                                      " required for packet pacing");
1529                         err = ENODEV;
1530                         goto error;
1531                 }
1532                 if (!config->hca_attr.log_max_static_sq_wq) {
1533                         DRV_LOG(ERR, "Static WQE SQ feature is"
1534                                      " required for packet pacing");
1535                         err = ENODEV;
1536                         goto error;
1537                 }
1538                 if (!config->hca_attr.qos.wqe_rate_pp) {
1539                         DRV_LOG(ERR, "WQE rate mode is required"
1540                                      " for packet pacing");
1541                         err = ENODEV;
1542                         goto error;
1543                 }
1544 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1545                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1546                              " can't create queues for packet pacing");
1547                 err = ENODEV;
1548                 goto error;
1549 #endif
1550         }
1551         if (sh->devx) {
1552                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1553
1554                 err = config->hca_attr.access_register_user ?
1555                         mlx5_devx_cmd_register_read
1556                                 (sh->cdev->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1557                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1558                 if (!err) {
1559                         uint32_t ts_mode;
1560
1561                         /* MTUTC register is read successfully. */
1562                         ts_mode = MLX5_GET(register_mtutc, reg,
1563                                            time_stamp_mode);
1564                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1565                                 config->rt_timestamp = 1;
1566                 } else {
1567                         /* Kernel does not support register reading. */
1568                         if (config->hca_attr.dev_freq_khz ==
1569                                                  (NS_PER_S / MS_PER_S))
1570                                 config->rt_timestamp = 1;
1571                 }
1572         }
1573         /*
1574          * If HW has bug working with tunnel packet decapsulation and
1575          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1576          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1577          */
1578         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1579                 config->hw_fcs_strip = 0;
1580         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1581                 (config->hw_fcs_strip ? "" : "not "));
1582         if (config->mprq.enabled && mprq) {
1583                 if (config->mprq.stride_num_n &&
1584                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1585                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1586                         config->mprq.stride_num_n =
1587                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1588                                                 mprq_min_stride_num_n),
1589                                         mprq_max_stride_num_n);
1590                         DRV_LOG(WARNING,
1591                                 "the number of strides"
1592                                 " for Multi-Packet RQ is out of range,"
1593                                 " setting default value (%u)",
1594                                 1 << config->mprq.stride_num_n);
1595                 }
1596                 if (config->mprq.stride_size_n &&
1597                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1598                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1599                         config->mprq.stride_size_n =
1600                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1601                                                 mprq_min_stride_size_n),
1602                                         mprq_max_stride_size_n);
1603                         DRV_LOG(WARNING,
1604                                 "the size of a stride"
1605                                 " for Multi-Packet RQ is out of range,"
1606                                 " setting default value (%u)",
1607                                 1 << config->mprq.stride_size_n);
1608                 }
1609                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1610                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1611         } else if (config->mprq.enabled && !mprq) {
1612                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1613                 config->mprq.enabled = 0;
1614         }
1615         if (config->max_dump_files_num == 0)
1616                 config->max_dump_files_num = 128;
1617         eth_dev = rte_eth_dev_allocate(name);
1618         if (eth_dev == NULL) {
1619                 DRV_LOG(ERR, "can not allocate rte ethdev");
1620                 err = ENOMEM;
1621                 goto error;
1622         }
1623         if (priv->representor) {
1624                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1625                 eth_dev->data->representor_id = priv->representor_id;
1626                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1627                         struct mlx5_priv *opriv =
1628                                 rte_eth_devices[port_id].data->dev_private;
1629                         if (opriv &&
1630                             opriv->master &&
1631                             opriv->domain_id == priv->domain_id &&
1632                             opriv->sh == priv->sh) {
1633                                 eth_dev->data->backer_port_id = port_id;
1634                                 break;
1635                         }
1636                 }
1637                 if (port_id >= RTE_MAX_ETHPORTS)
1638                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1639         }
1640         priv->mp_id.port_id = eth_dev->data->port_id;
1641         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1642         /*
1643          * Store associated network device interface index. This index
1644          * is permanent throughout the lifetime of device. So, we may store
1645          * the ifindex here and use the cached value further.
1646          */
1647         MLX5_ASSERT(spawn->ifindex);
1648         priv->if_index = spawn->ifindex;
1649         eth_dev->data->dev_private = priv;
1650         priv->dev_data = eth_dev->data;
1651         eth_dev->data->mac_addrs = priv->mac;
1652         eth_dev->device = dpdk_dev;
1653         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1654         /* Configure the first MAC address by default. */
1655         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1656                 DRV_LOG(ERR,
1657                         "port %u cannot get MAC address, is mlx5_en"
1658                         " loaded? (errno: %s)",
1659                         eth_dev->data->port_id, strerror(rte_errno));
1660                 err = ENODEV;
1661                 goto error;
1662         }
1663         DRV_LOG(INFO,
1664                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1665                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1666 #ifdef RTE_LIBRTE_MLX5_DEBUG
1667         {
1668                 char ifname[MLX5_NAMESIZE];
1669
1670                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1671                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1672                                 eth_dev->data->port_id, ifname);
1673                 else
1674                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1675                                 eth_dev->data->port_id);
1676         }
1677 #endif
1678         /* Get actual MTU if possible. */
1679         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1680         if (err) {
1681                 err = rte_errno;
1682                 goto error;
1683         }
1684         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1685                 priv->mtu);
1686         /* Initialize burst functions to prevent crashes before link-up. */
1687         eth_dev->rx_pkt_burst = removed_rx_burst;
1688         eth_dev->tx_pkt_burst = removed_tx_burst;
1689         eth_dev->dev_ops = &mlx5_dev_ops;
1690         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1691         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1692         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1693         /* Register MAC address. */
1694         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1695         if (config->vf && config->vf_nl_en)
1696                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1697                                       mlx5_ifindex(eth_dev),
1698                                       eth_dev->data->mac_addrs,
1699                                       MLX5_MAX_MAC_ADDRESSES);
1700         priv->ctrl_flows = 0;
1701         rte_spinlock_init(&priv->flow_list_lock);
1702         TAILQ_INIT(&priv->flow_meters);
1703         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1704         if (!priv->mtr_profile_tbl)
1705                 goto error;
1706         /* Bring Ethernet device up. */
1707         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1708                 eth_dev->data->port_id);
1709         mlx5_set_link_up(eth_dev);
1710         /*
1711          * Even though the interrupt handler is not installed yet,
1712          * interrupts will still trigger on the async_fd from
1713          * Verbs context returned by ibv_open_device().
1714          */
1715         mlx5_link_update(eth_dev, 0);
1716 #ifdef HAVE_MLX5DV_DR_ESWITCH
1717         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1718               (switch_info->representor || switch_info->master)))
1719                 config->dv_esw_en = 0;
1720 #else
1721         config->dv_esw_en = 0;
1722 #endif
1723         /* Detect minimal data bytes to inline. */
1724         mlx5_set_min_inline(spawn, config);
1725         /* Store device configuration on private structure. */
1726         priv->config = *config;
1727         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1728                 icfg[i].release_mem_en = !!config->reclaim_mode;
1729                 if (config->reclaim_mode)
1730                         icfg[i].per_core_cache = 0;
1731                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1732                 if (!priv->flows[i])
1733                         goto error;
1734         }
1735         /* Create context for virtual machine VLAN workaround. */
1736         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1737         if (config->dv_flow_en) {
1738                 err = mlx5_alloc_shared_dr(priv);
1739                 if (err)
1740                         goto error;
1741         }
1742         if (sh->devx && config->dv_flow_en && config->dest_tir) {
1743                 priv->obj_ops = devx_obj_ops;
1744                 priv->obj_ops.drop_action_create =
1745                                                 ibv_obj_ops.drop_action_create;
1746                 priv->obj_ops.drop_action_destroy =
1747                                                 ibv_obj_ops.drop_action_destroy;
1748 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1749                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1750 #else
1751                 if (config->dv_esw_en)
1752                         priv->obj_ops.txq_obj_modify =
1753                                                 ibv_obj_ops.txq_obj_modify;
1754 #endif
1755                 /* Use specific wrappers for Tx object. */
1756                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1757                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1758                 mlx5_queue_counter_id_prepare(eth_dev);
1759                 priv->obj_ops.lb_dummy_queue_create =
1760                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1761                 priv->obj_ops.lb_dummy_queue_release =
1762                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1763         } else {
1764                 priv->obj_ops = ibv_obj_ops;
1765         }
1766         if (config->tx_pp &&
1767             (priv->config.dv_esw_en ||
1768              priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
1769                 /*
1770                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1771                  * packet pacing and already checked above.
1772                  * Hence, we should only make sure the SQs will be created
1773                  * with DevX, not with Verbs.
1774                  * Verbs allocates the SQ UAR on its own and it can't be shared
1775                  * with Clock Queue UAR as required for Tx scheduling.
1776                  */
1777                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1778                 err = ENODEV;
1779                 goto error;
1780         }
1781         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1782         if (!priv->drop_queue.hrxq)
1783                 goto error;
1784         /* Supported Verbs flow priority number detection. */
1785         err = mlx5_flow_discover_priorities(eth_dev);
1786         if (err < 0) {
1787                 err = -err;
1788                 goto error;
1789         }
1790         priv->config.flow_prio = err;
1791         if (!priv->config.dv_esw_en &&
1792             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1793                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1794                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1795                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1796         }
1797         mlx5_set_metadata_mask(eth_dev);
1798         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1799             !priv->sh->dv_regc0_mask) {
1800                 DRV_LOG(ERR, "metadata mode %u is not supported "
1801                              "(no metadata reg_c[0] is available)",
1802                              priv->config.dv_xmeta_en);
1803                         err = ENOTSUP;
1804                         goto error;
1805         }
1806         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1807                                        mlx5_hrxq_create_cb,
1808                                        mlx5_hrxq_match_cb,
1809                                        mlx5_hrxq_remove_cb,
1810                                        mlx5_hrxq_clone_cb,
1811                                        mlx5_hrxq_clone_free_cb);
1812         if (!priv->hrxqs)
1813                 goto error;
1814         rte_rwlock_init(&priv->ind_tbls_lock);
1815         /* Query availability of metadata reg_c's. */
1816         err = mlx5_flow_discover_mreg_c(eth_dev);
1817         if (err < 0) {
1818                 err = -err;
1819                 goto error;
1820         }
1821         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1822                 DRV_LOG(DEBUG,
1823                         "port %u extensive metadata register is not supported",
1824                         eth_dev->data->port_id);
1825                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1826                         DRV_LOG(ERR, "metadata mode %u is not supported "
1827                                      "(no metadata registers available)",
1828                                      priv->config.dv_xmeta_en);
1829                         err = ENOTSUP;
1830                         goto error;
1831                 }
1832         }
1833         if (priv->config.dv_flow_en &&
1834             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1835             mlx5_flow_ext_mreg_supported(eth_dev) &&
1836             priv->sh->dv_regc0_mask) {
1837                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1838                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1839                                                       false, true, eth_dev,
1840                                                       flow_dv_mreg_create_cb,
1841                                                       flow_dv_mreg_match_cb,
1842                                                       flow_dv_mreg_remove_cb,
1843                                                       flow_dv_mreg_clone_cb,
1844                                                     flow_dv_mreg_clone_free_cb);
1845                 if (!priv->mreg_cp_tbl) {
1846                         err = ENOMEM;
1847                         goto error;
1848                 }
1849         }
1850         rte_spinlock_init(&priv->shared_act_sl);
1851         mlx5_flow_counter_mode_config(eth_dev);
1852         mlx5_flow_drop_action_config(eth_dev);
1853         if (priv->config.dv_flow_en)
1854                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1855         return eth_dev;
1856 error:
1857         if (priv) {
1858                 if (priv->mreg_cp_tbl)
1859                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1860                 if (priv->sh)
1861                         mlx5_os_free_shared_dr(priv);
1862                 if (priv->nl_socket_route >= 0)
1863                         close(priv->nl_socket_route);
1864                 if (priv->vmwa_context)
1865                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1866                 if (eth_dev && priv->drop_queue.hrxq)
1867                         mlx5_drop_action_destroy(eth_dev);
1868                 if (priv->mtr_profile_tbl)
1869                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1870                 if (own_domain_id)
1871                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1872                 if (priv->hrxqs)
1873                         mlx5_list_destroy(priv->hrxqs);
1874                 mlx5_free(priv);
1875                 if (eth_dev != NULL)
1876                         eth_dev->data->dev_private = NULL;
1877         }
1878         if (eth_dev != NULL) {
1879                 /* mac_addrs must not be freed alone because part of
1880                  * dev_private
1881                  **/
1882                 eth_dev->data->mac_addrs = NULL;
1883                 rte_eth_dev_release_port(eth_dev);
1884         }
1885         if (sh)
1886                 mlx5_free_shared_dev_ctx(sh);
1887         if (nl_rdma >= 0)
1888                 close(nl_rdma);
1889         MLX5_ASSERT(err > 0);
1890         rte_errno = err;
1891         return NULL;
1892 }
1893
1894 /**
1895  * Comparison callback to sort device data.
1896  *
1897  * This is meant to be used with qsort().
1898  *
1899  * @param a[in]
1900  *   Pointer to pointer to first data object.
1901  * @param b[in]
1902  *   Pointer to pointer to second data object.
1903  *
1904  * @return
1905  *   0 if both objects are equal, less than 0 if the first argument is less
1906  *   than the second, greater than 0 otherwise.
1907  */
1908 static int
1909 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1910 {
1911         const struct mlx5_switch_info *si_a =
1912                 &((const struct mlx5_dev_spawn_data *)a)->info;
1913         const struct mlx5_switch_info *si_b =
1914                 &((const struct mlx5_dev_spawn_data *)b)->info;
1915         int ret;
1916
1917         /* Master device first. */
1918         ret = si_b->master - si_a->master;
1919         if (ret)
1920                 return ret;
1921         /* Then representor devices. */
1922         ret = si_b->representor - si_a->representor;
1923         if (ret)
1924                 return ret;
1925         /* Unidentified devices come last in no specific order. */
1926         if (!si_a->representor)
1927                 return 0;
1928         /* Order representors by name. */
1929         return si_a->port_name - si_b->port_name;
1930 }
1931
1932 /**
1933  * Match PCI information for possible slaves of bonding device.
1934  *
1935  * @param[in] ibdev_name
1936  *   Name of Infiniband device.
1937  * @param[in] pci_dev
1938  *   Pointer to primary PCI address structure to match.
1939  * @param[in] nl_rdma
1940  *   Netlink RDMA group socket handle.
1941  * @param[in] owner
1942  *   Representor owner PF index.
1943  * @param[out] bond_info
1944  *   Pointer to bonding information.
1945  *
1946  * @return
1947  *   negative value if no bonding device found, otherwise
1948  *   positive index of slave PF in bonding.
1949  */
1950 static int
1951 mlx5_device_bond_pci_match(const char *ibdev_name,
1952                            const struct rte_pci_addr *pci_dev,
1953                            int nl_rdma, uint16_t owner,
1954                            struct mlx5_bond_info *bond_info)
1955 {
1956         char ifname[IF_NAMESIZE + 1];
1957         unsigned int ifindex;
1958         unsigned int np, i;
1959         FILE *bond_file = NULL, *file;
1960         int pf = -1;
1961         int ret;
1962
1963         /*
1964          * Try to get master device name. If something goes wrong suppose
1965          * the lack of kernel support and no bonding devices.
1966          */
1967         memset(bond_info, 0, sizeof(*bond_info));
1968         if (nl_rdma < 0)
1969                 return -1;
1970         if (!strstr(ibdev_name, "bond"))
1971                 return -1;
1972         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1973         if (!np)
1974                 return -1;
1975         /*
1976          * The master device might not be on the predefined port(not on port
1977          * index 1, it is not guaranteed), we have to scan all Infiniband
1978          * device ports and find master.
1979          */
1980         for (i = 1; i <= np; ++i) {
1981                 /* Check whether Infiniband port is populated. */
1982                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1983                 if (!ifindex)
1984                         continue;
1985                 if (!if_indextoname(ifindex, ifname))
1986                         continue;
1987                 /* Try to read bonding slave names from sysfs. */
1988                 MKSTR(slaves,
1989                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1990                 bond_file = fopen(slaves, "r");
1991                 if (bond_file)
1992                         break;
1993         }
1994         if (!bond_file)
1995                 return -1;
1996         /* Use safe format to check maximal buffer length. */
1997         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1998         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1999                 char tmp_str[IF_NAMESIZE + 32];
2000                 struct rte_pci_addr pci_addr;
2001                 struct mlx5_switch_info info;
2002
2003                 /* Process slave interface names in the loop. */
2004                 snprintf(tmp_str, sizeof(tmp_str),
2005                          "/sys/class/net/%s", ifname);
2006                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
2007                         DRV_LOG(WARNING,
2008                                 "Cannot get PCI address for netdev \"%s\".",
2009                                 ifname);
2010                         continue;
2011                 }
2012                 /* Slave interface PCI address match found. */
2013                 snprintf(tmp_str, sizeof(tmp_str),
2014                          "/sys/class/net/%s/phys_port_name", ifname);
2015                 file = fopen(tmp_str, "rb");
2016                 if (!file)
2017                         break;
2018                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2019                 if (fscanf(file, "%32s", tmp_str) == 1)
2020                         mlx5_translate_port_name(tmp_str, &info);
2021                 fclose(file);
2022                 /* Only process PF ports. */
2023                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
2024                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2025                         continue;
2026                 /* Check max bonding member. */
2027                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
2028                         DRV_LOG(WARNING, "bonding index out of range, "
2029                                 "please increase MLX5_BOND_MAX_PORTS: %s",
2030                                 tmp_str);
2031                         break;
2032                 }
2033                 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
2034                 if (pci_dev->domain == pci_addr.domain &&
2035                     pci_dev->bus == pci_addr.bus &&
2036                     pci_dev->devid == pci_addr.devid &&
2037                     ((pci_dev->function == 0 &&
2038                       pci_dev->function + owner == pci_addr.function) ||
2039                      (pci_dev->function == owner &&
2040                       pci_addr.function == owner)))
2041                         pf = info.port_name;
2042                 /* Get ifindex. */
2043                 snprintf(tmp_str, sizeof(tmp_str),
2044                          "/sys/class/net/%s/ifindex", ifname);
2045                 file = fopen(tmp_str, "rb");
2046                 if (!file)
2047                         break;
2048                 ret = fscanf(file, "%u", &ifindex);
2049                 fclose(file);
2050                 if (ret != 1)
2051                         break;
2052                 /* Save bonding info. */
2053                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
2054                         sizeof(bond_info->ports[0].ifname));
2055                 bond_info->ports[info.port_name].pci_addr = pci_addr;
2056                 bond_info->ports[info.port_name].ifindex = ifindex;
2057                 bond_info->n_port++;
2058         }
2059         if (pf >= 0) {
2060                 /* Get bond interface info */
2061                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2062                                            bond_info->ifname);
2063                 if (ret)
2064                         DRV_LOG(ERR, "unable to get bond info: %s",
2065                                 strerror(rte_errno));
2066                 else
2067                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2068                                 ifindex, bond_info->ifindex, bond_info->ifname);
2069         }
2070         return pf;
2071 }
2072
2073 static void
2074 mlx5_os_config_default(struct mlx5_dev_config *config)
2075 {
2076         memset(config, 0, sizeof(*config));
2077         config->mps = MLX5_ARG_UNSET;
2078         config->rx_vec_en = 1;
2079         config->txq_inline_max = MLX5_ARG_UNSET;
2080         config->txq_inline_min = MLX5_ARG_UNSET;
2081         config->txq_inline_mpw = MLX5_ARG_UNSET;
2082         config->txqs_inline = MLX5_ARG_UNSET;
2083         config->vf_nl_en = 1;
2084         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2085         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2086         config->dv_esw_en = 1;
2087         config->dv_flow_en = 1;
2088         config->decap_en = 1;
2089         config->log_hp_size = MLX5_ARG_UNSET;
2090         config->allow_duplicate_pattern = 1;
2091 }
2092
2093 /**
2094  * Register a PCI device within bonding.
2095  *
2096  * This function spawns Ethernet devices out of a given PCI device and
2097  * bonding owner PF index.
2098  *
2099  * @param[in] cdev
2100  *   Pointer to common mlx5 device structure.
2101  * @param[in] req_eth_da
2102  *   Requested ethdev device argument.
2103  * @param[in] owner_id
2104  *   Requested owner PF port ID within bonding device, default to 0.
2105  *
2106  * @return
2107  *   0 on success, a negative errno value otherwise and rte_errno is set.
2108  */
2109 static int
2110 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2111                      struct rte_eth_devargs *req_eth_da,
2112                      uint16_t owner_id)
2113 {
2114         struct ibv_device **ibv_list;
2115         /*
2116          * Number of found IB Devices matching with requested PCI BDF.
2117          * nd != 1 means there are multiple IB devices over the same
2118          * PCI device and we have representors and master.
2119          */
2120         unsigned int nd = 0;
2121         /*
2122          * Number of found IB device Ports. nd = 1 and np = 1..n means
2123          * we have the single multiport IB device, and there may be
2124          * representors attached to some of found ports.
2125          */
2126         unsigned int np = 0;
2127         /*
2128          * Number of DPDK ethernet devices to Spawn - either over
2129          * multiple IB devices or multiple ports of single IB device.
2130          * Actually this is the number of iterations to spawn.
2131          */
2132         unsigned int ns = 0;
2133         /*
2134          * Bonding device
2135          *   < 0 - no bonding device (single one)
2136          *  >= 0 - bonding device (value is slave PF index)
2137          */
2138         int bd = -1;
2139         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2140         struct mlx5_dev_spawn_data *list = NULL;
2141         struct mlx5_dev_config dev_config;
2142         unsigned int dev_config_vf;
2143         struct rte_eth_devargs eth_da = *req_eth_da;
2144         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2145         struct mlx5_bond_info bond_info;
2146         int ret = -1;
2147
2148         errno = 0;
2149         ibv_list = mlx5_glue->get_device_list(&ret);
2150         if (!ibv_list) {
2151                 rte_errno = errno ? errno : ENOSYS;
2152                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2153                 return -rte_errno;
2154         }
2155         /*
2156          * First scan the list of all Infiniband devices to find
2157          * matching ones, gathering into the list.
2158          */
2159         struct ibv_device *ibv_match[ret + 1];
2160         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2161         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2162         unsigned int i;
2163
2164         while (ret-- > 0) {
2165                 struct rte_pci_addr pci_addr;
2166
2167                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2168                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2169                                                 nl_rdma, owner_id, &bond_info);
2170                 if (bd >= 0) {
2171                         /*
2172                          * Bonding device detected. Only one match is allowed,
2173                          * the bonding is supported over multi-port IB device,
2174                          * there should be no matches on representor PCI
2175                          * functions or non VF LAG bonding devices with
2176                          * specified address.
2177                          */
2178                         if (nd) {
2179                                 DRV_LOG(ERR,
2180                                         "multiple PCI match on bonding device"
2181                                         "\"%s\" found", ibv_list[ret]->name);
2182                                 rte_errno = ENOENT;
2183                                 ret = -rte_errno;
2184                                 goto exit;
2185                         }
2186                         /* Amend owner pci address if owner PF ID specified. */
2187                         if (eth_da.nb_representor_ports)
2188                                 owner_pci.function += owner_id;
2189                         DRV_LOG(INFO,
2190                                 "PCI information matches for slave %d bonding device \"%s\"",
2191                                 bd, ibv_list[ret]->name);
2192                         ibv_match[nd++] = ibv_list[ret];
2193                         break;
2194                 } else {
2195                         /* Bonding device not found. */
2196                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2197                                               &pci_addr))
2198                                 continue;
2199                         if (owner_pci.domain != pci_addr.domain ||
2200                             owner_pci.bus != pci_addr.bus ||
2201                             owner_pci.devid != pci_addr.devid ||
2202                             owner_pci.function != pci_addr.function)
2203                                 continue;
2204                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2205                                 ibv_list[ret]->name);
2206                         ibv_match[nd++] = ibv_list[ret];
2207                 }
2208         }
2209         ibv_match[nd] = NULL;
2210         if (!nd) {
2211                 /* No device matches, just complain and bail out. */
2212                 DRV_LOG(WARNING,
2213                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2214                         " are kernel drivers loaded?",
2215                         owner_pci.domain, owner_pci.bus,
2216                         owner_pci.devid, owner_pci.function);
2217                 rte_errno = ENOENT;
2218                 ret = -rte_errno;
2219                 goto exit;
2220         }
2221         if (nd == 1) {
2222                 /*
2223                  * Found single matching device may have multiple ports.
2224                  * Each port may be representor, we have to check the port
2225                  * number and check the representors existence.
2226                  */
2227                 if (nl_rdma >= 0)
2228                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2229                 if (!np)
2230                         DRV_LOG(WARNING,
2231                                 "Cannot get IB device \"%s\" ports number.",
2232                                 ibv_match[0]->name);
2233                 if (bd >= 0 && !np) {
2234                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2235                         rte_errno = ENOENT;
2236                         ret = -rte_errno;
2237                         goto exit;
2238                 }
2239         }
2240         /* Now we can determine the maximal amount of devices to be spawned. */
2241         list = mlx5_malloc(MLX5_MEM_ZERO,
2242                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2243                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2244         if (!list) {
2245                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2246                 rte_errno = ENOMEM;
2247                 ret = -rte_errno;
2248                 goto exit;
2249         }
2250         if (bd >= 0 || np > 1) {
2251                 /*
2252                  * Single IB device with multiple ports found,
2253                  * it may be E-Switch master device and representors.
2254                  * We have to perform identification through the ports.
2255                  */
2256                 MLX5_ASSERT(nl_rdma >= 0);
2257                 MLX5_ASSERT(ns == 0);
2258                 MLX5_ASSERT(nd == 1);
2259                 MLX5_ASSERT(np);
2260                 for (i = 1; i <= np; ++i) {
2261                         list[ns].bond_info = &bond_info;
2262                         list[ns].max_port = np;
2263                         list[ns].phys_port = i;
2264                         list[ns].phys_dev_name = ibv_match[0]->name;
2265                         list[ns].eth_dev = NULL;
2266                         list[ns].pci_dev = pci_dev;
2267                         list[ns].cdev = cdev;
2268                         list[ns].pf_bond = bd;
2269                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2270                                                            ibv_match[0]->name,
2271                                                            i);
2272                         if (!list[ns].ifindex) {
2273                                 /*
2274                                  * No network interface index found for the
2275                                  * specified port, it means there is no
2276                                  * representor on this port. It's OK,
2277                                  * there can be disabled ports, for example
2278                                  * if sriov_numvfs < sriov_totalvfs.
2279                                  */
2280                                 continue;
2281                         }
2282                         ret = -1;
2283                         if (nl_route >= 0)
2284                                 ret = mlx5_nl_switch_info(nl_route,
2285                                                           list[ns].ifindex,
2286                                                           &list[ns].info);
2287                         if (ret || (!list[ns].info.representor &&
2288                                     !list[ns].info.master)) {
2289                                 /*
2290                                  * We failed to recognize representors with
2291                                  * Netlink, let's try to perform the task
2292                                  * with sysfs.
2293                                  */
2294                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2295                                                              &list[ns].info);
2296                         }
2297                         if (!ret && bd >= 0) {
2298                                 switch (list[ns].info.name_type) {
2299                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2300                                         if (np == 1) {
2301                                                 /*
2302                                                  * Force standalone bonding
2303                                                  * device for ROCE LAG
2304                                                  * confgiurations.
2305                                                  */
2306                                                 list[ns].info.master = 0;
2307                                                 list[ns].info.representor = 0;
2308                                         }
2309                                         if (list[ns].info.port_name == bd)
2310                                                 ns++;
2311                                         break;
2312                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2313                                         /* Fallthrough */
2314                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2315                                         /* Fallthrough */
2316                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2317                                         if (list[ns].info.pf_num == bd)
2318                                                 ns++;
2319                                         break;
2320                                 default:
2321                                         break;
2322                                 }
2323                                 continue;
2324                         }
2325                         if (!ret && (list[ns].info.representor ^
2326                                      list[ns].info.master))
2327                                 ns++;
2328                 }
2329                 if (!ns) {
2330                         DRV_LOG(ERR,
2331                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2332                         rte_errno = ENOENT;
2333                         ret = -rte_errno;
2334                         goto exit;
2335                 }
2336         } else {
2337                 /*
2338                  * The existence of several matching entries (nd > 1) means
2339                  * port representors have been instantiated. No existing Verbs
2340                  * call nor sysfs entries can tell them apart, this can only
2341                  * be done through Netlink calls assuming kernel drivers are
2342                  * recent enough to support them.
2343                  *
2344                  * In the event of identification failure through Netlink,
2345                  * try again through sysfs, then:
2346                  *
2347                  * 1. A single IB device matches (nd == 1) with single
2348                  *    port (np=0/1) and is not a representor, assume
2349                  *    no switch support.
2350                  *
2351                  * 2. Otherwise no safe assumptions can be made;
2352                  *    complain louder and bail out.
2353                  */
2354                 for (i = 0; i != nd; ++i) {
2355                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2356                         list[ns].bond_info = NULL;
2357                         list[ns].max_port = 1;
2358                         list[ns].phys_port = 1;
2359                         list[ns].phys_dev_name = ibv_match[i]->name;
2360                         list[ns].eth_dev = NULL;
2361                         list[ns].pci_dev = pci_dev;
2362                         list[ns].cdev = cdev;
2363                         list[ns].pf_bond = -1;
2364                         list[ns].ifindex = 0;
2365                         if (nl_rdma >= 0)
2366                                 list[ns].ifindex = mlx5_nl_ifindex
2367                                                             (nl_rdma,
2368                                                              ibv_match[i]->name,
2369                                                              1);
2370                         if (!list[ns].ifindex) {
2371                                 char ifname[IF_NAMESIZE];
2372
2373                                 /*
2374                                  * Netlink failed, it may happen with old
2375                                  * ib_core kernel driver (before 4.16).
2376                                  * We can assume there is old driver because
2377                                  * here we are processing single ports IB
2378                                  * devices. Let's try sysfs to retrieve
2379                                  * the ifindex. The method works for
2380                                  * master device only.
2381                                  */
2382                                 if (nd > 1) {
2383                                         /*
2384                                          * Multiple devices found, assume
2385                                          * representors, can not distinguish
2386                                          * master/representor and retrieve
2387                                          * ifindex via sysfs.
2388                                          */
2389                                         continue;
2390                                 }
2391                                 ret = mlx5_get_ifname_sysfs
2392                                         (ibv_match[i]->ibdev_path, ifname);
2393                                 if (!ret)
2394                                         list[ns].ifindex =
2395                                                 if_nametoindex(ifname);
2396                                 if (!list[ns].ifindex) {
2397                                         /*
2398                                          * No network interface index found
2399                                          * for the specified device, it means
2400                                          * there it is neither representor
2401                                          * nor master.
2402                                          */
2403                                         continue;
2404                                 }
2405                         }
2406                         ret = -1;
2407                         if (nl_route >= 0)
2408                                 ret = mlx5_nl_switch_info(nl_route,
2409                                                           list[ns].ifindex,
2410                                                           &list[ns].info);
2411                         if (ret || (!list[ns].info.representor &&
2412                                     !list[ns].info.master)) {
2413                                 /*
2414                                  * We failed to recognize representors with
2415                                  * Netlink, let's try to perform the task
2416                                  * with sysfs.
2417                                  */
2418                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2419                                                              &list[ns].info);
2420                         }
2421                         if (!ret && (list[ns].info.representor ^
2422                                      list[ns].info.master)) {
2423                                 ns++;
2424                         } else if ((nd == 1) &&
2425                                    !list[ns].info.representor &&
2426                                    !list[ns].info.master) {
2427                                 /*
2428                                  * Single IB device with one physical port and
2429                                  * attached network device.
2430                                  * May be SRIOV is not enabled or there is no
2431                                  * representors.
2432                                  */
2433                                 DRV_LOG(INFO, "No E-Switch support detected.");
2434                                 ns++;
2435                                 break;
2436                         }
2437                 }
2438                 if (!ns) {
2439                         DRV_LOG(ERR,
2440                                 "Unable to recognize master/representors on the multiple IB devices.");
2441                         rte_errno = ENOENT;
2442                         ret = -rte_errno;
2443                         goto exit;
2444                 }
2445                 /*
2446                  * New kernels may add the switch_id attribute for the case
2447                  * there is no E-Switch and we wrongly recognized the only
2448                  * device as master. Override this if there is the single
2449                  * device with single port and new device name format present.
2450                  */
2451                 if (nd == 1 &&
2452                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2453                         list[0].info.master = 0;
2454                         list[0].info.representor = 0;
2455                 }
2456         }
2457         MLX5_ASSERT(ns);
2458         /*
2459          * Sort list to probe devices in natural order for users convenience
2460          * (i.e. master first, then representors from lowest to highest ID).
2461          */
2462         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2463         /* Device specific configuration. */
2464         switch (pci_dev->id.device_id) {
2465         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2466         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2467         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2468         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2469         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2470         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2471         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2472                 dev_config_vf = 1;
2473                 break;
2474         default:
2475                 dev_config_vf = 0;
2476                 break;
2477         }
2478         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2479                 /* Set devargs default values. */
2480                 if (eth_da.nb_mh_controllers == 0) {
2481                         eth_da.nb_mh_controllers = 1;
2482                         eth_da.mh_controllers[0] = 0;
2483                 }
2484                 if (eth_da.nb_ports == 0 && ns > 0) {
2485                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2486                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2487                                         pci_dev->device.devargs->args);
2488                         eth_da.nb_ports = 1;
2489                         eth_da.ports[0] = list[0].info.pf_num;
2490                 }
2491                 if (eth_da.nb_representor_ports == 0) {
2492                         eth_da.nb_representor_ports = 1;
2493                         eth_da.representor_ports[0] = 0;
2494                 }
2495         }
2496         for (i = 0; i != ns; ++i) {
2497                 uint32_t restore;
2498
2499                 /* Default configuration. */
2500                 mlx5_os_config_default(&dev_config);
2501                 dev_config.vf = dev_config_vf;
2502                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2503                                                  &dev_config, &eth_da);
2504                 if (!list[i].eth_dev) {
2505                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2506                                 break;
2507                         /* Device is disabled or already spawned. Ignore it. */
2508                         continue;
2509                 }
2510                 restore = list[i].eth_dev->data->dev_flags;
2511                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2512                 /**
2513                  * Each representor has a dedicated interrupts vector.
2514                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2515                  * representor eth_dev object because representor and PF
2516                  * share the same PCI address.
2517                  * Override representor device with a dedicated
2518                  * interrupts handle here.
2519                  * Representor interrupts handle is released in mlx5_dev_stop().
2520                  */
2521                 if (list[i].info.representor) {
2522                         struct rte_intr_handle *intr_handle;
2523                         intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
2524                                                   sizeof(*intr_handle), 0,
2525                                                   SOCKET_ID_ANY);
2526                         if (!intr_handle) {
2527                                 DRV_LOG(ERR,
2528                                         "port %u failed to allocate memory for interrupt handler "
2529                                         "Rx interrupts will not be supported",
2530                                         i);
2531                                 rte_errno = ENOMEM;
2532                                 ret = -rte_errno;
2533                                 goto exit;
2534                         }
2535                         list[i].eth_dev->intr_handle = intr_handle;
2536                 }
2537                 /* Restore non-PCI flags cleared by the above call. */
2538                 list[i].eth_dev->data->dev_flags |= restore;
2539                 rte_eth_dev_probing_finish(list[i].eth_dev);
2540         }
2541         if (i != ns) {
2542                 DRV_LOG(ERR,
2543                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2544                         " encountering an error: %s",
2545                         owner_pci.domain, owner_pci.bus,
2546                         owner_pci.devid, owner_pci.function,
2547                         strerror(rte_errno));
2548                 ret = -rte_errno;
2549                 /* Roll back. */
2550                 while (i--) {
2551                         if (!list[i].eth_dev)
2552                                 continue;
2553                         mlx5_dev_close(list[i].eth_dev);
2554                         /* mac_addrs must not be freed because in dev_private */
2555                         list[i].eth_dev->data->mac_addrs = NULL;
2556                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2557                 }
2558                 /* Restore original error. */
2559                 rte_errno = -ret;
2560         } else {
2561                 ret = 0;
2562         }
2563 exit:
2564         /*
2565          * Do the routine cleanup:
2566          * - close opened Netlink sockets
2567          * - free allocated spawn data array
2568          * - free the Infiniband device list
2569          */
2570         if (nl_rdma >= 0)
2571                 close(nl_rdma);
2572         if (nl_route >= 0)
2573                 close(nl_route);
2574         if (list)
2575                 mlx5_free(list);
2576         MLX5_ASSERT(ibv_list);
2577         mlx5_glue->free_device_list(ibv_list);
2578         return ret;
2579 }
2580
2581 static int
2582 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2583                           struct rte_eth_devargs *eth_da)
2584 {
2585         int ret = 0;
2586
2587         if (dev->devargs == NULL)
2588                 return 0;
2589         memset(eth_da, 0, sizeof(*eth_da));
2590         /* Parse representor information first from class argument. */
2591         if (dev->devargs->cls_str)
2592                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2593         if (ret != 0) {
2594                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2595                         dev->devargs->cls_str);
2596                 return -rte_errno;
2597         }
2598         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2599                 /* Parse legacy device argument */
2600                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2601                 if (ret) {
2602                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2603                                 dev->devargs->args);
2604                         return -rte_errno;
2605                 }
2606         }
2607         return 0;
2608 }
2609
2610 /**
2611  * Callback to register a PCI device.
2612  *
2613  * This function spawns Ethernet devices out of a given PCI device.
2614  *
2615  * @param[in] cdev
2616  *   Pointer to common mlx5 device structure.
2617  *
2618  * @return
2619  *   0 on success, a negative errno value otherwise and rte_errno is set.
2620  */
2621 static int
2622 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2623 {
2624         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2625         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2626         int ret = 0;
2627         uint16_t p;
2628
2629         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2630         if (ret != 0)
2631                 return ret;
2632
2633         if (eth_da.nb_ports > 0) {
2634                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2635                 for (p = 0; p < eth_da.nb_ports; p++) {
2636                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2637                                                    eth_da.ports[p]);
2638                         if (ret)
2639                                 break;
2640                 }
2641                 if (ret) {
2642                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2643                                 "aborted due to proding failure of PF %u",
2644                                 pci_dev->addr.domain, pci_dev->addr.bus,
2645                                 pci_dev->addr.devid, pci_dev->addr.function,
2646                                 eth_da.ports[p]);
2647                         mlx5_net_remove(cdev);
2648                 }
2649         } else {
2650                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2651         }
2652         return ret;
2653 }
2654
2655 /* Probe a single SF device on auxiliary bus, no representor support. */
2656 static int
2657 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2658 {
2659         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2660         struct mlx5_dev_config config;
2661         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2662         struct rte_device *dev = cdev->dev;
2663         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2664         struct rte_eth_dev *eth_dev;
2665         int ret = 0;
2666
2667         /* Parse ethdev devargs. */
2668         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2669         if (ret != 0)
2670                 return ret;
2671         /* Set default config data. */
2672         mlx5_os_config_default(&config);
2673         config.sf = 1;
2674         /* Init spawn data. */
2675         spawn.max_port = 1;
2676         spawn.phys_port = 1;
2677         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2678         ret = mlx5_auxiliary_get_ifindex(dev->name);
2679         if (ret < 0) {
2680                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2681                 return ret;
2682         }
2683         spawn.ifindex = ret;
2684         spawn.cdev = cdev;
2685         /* Spawn device. */
2686         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2687         if (eth_dev == NULL)
2688                 return -rte_errno;
2689         /* Post create. */
2690         eth_dev->intr_handle = &adev->intr_handle;
2691         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2692                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2693                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2694                 eth_dev->data->numa_node = dev->numa_node;
2695         }
2696         rte_eth_dev_probing_finish(eth_dev);
2697         return 0;
2698 }
2699
2700 /**
2701  * Net class driver callback to probe a device.
2702  *
2703  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2704  *
2705  * @param[in] cdev
2706  *   Pointer to the common mlx5 device.
2707  *
2708  * @return
2709  *   0 on success, a negative errno value otherwise and rte_errno is set.
2710  */
2711 int
2712 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2713 {
2714         int ret;
2715
2716         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2717                 mlx5_pmd_socket_init();
2718         ret = mlx5_init_once();
2719         if (ret) {
2720                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2721                         strerror(rte_errno));
2722                 return -rte_errno;
2723         }
2724         if (mlx5_dev_is_pci(cdev->dev))
2725                 return mlx5_os_pci_probe(cdev);
2726         else
2727                 return mlx5_os_auxiliary_probe(cdev);
2728 }
2729
2730 /**
2731  * Install shared asynchronous device events handler.
2732  * This function is implemented to support event sharing
2733  * between multiple ports of single IB device.
2734  *
2735  * @param sh
2736  *   Pointer to mlx5_dev_ctx_shared object.
2737  */
2738 void
2739 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2740 {
2741         int ret;
2742         int flags;
2743         struct ibv_context *ctx = sh->cdev->ctx;
2744
2745         sh->intr_handle.fd = -1;
2746         flags = fcntl(ctx->async_fd, F_GETFL);
2747         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2748         if (ret) {
2749                 DRV_LOG(INFO, "failed to change file descriptor async event"
2750                         " queue");
2751         } else {
2752                 sh->intr_handle.fd = ctx->async_fd;
2753                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2754                 if (rte_intr_callback_register(&sh->intr_handle,
2755                                         mlx5_dev_interrupt_handler, sh)) {
2756                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2757                         sh->intr_handle.fd = -1;
2758                 }
2759         }
2760         if (sh->devx) {
2761 #ifdef HAVE_IBV_DEVX_ASYNC
2762                 sh->intr_handle_devx.fd = -1;
2763                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2764                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2765                 if (!devx_comp) {
2766                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2767                         return;
2768                 }
2769                 flags = fcntl(devx_comp->fd, F_GETFL);
2770                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2771                 if (ret) {
2772                         DRV_LOG(INFO, "failed to change file descriptor"
2773                                 " devx comp");
2774                         return;
2775                 }
2776                 sh->intr_handle_devx.fd = devx_comp->fd;
2777                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2778                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2779                                         mlx5_dev_interrupt_handler_devx, sh)) {
2780                         DRV_LOG(INFO, "Fail to install the devx shared"
2781                                 " interrupt.");
2782                         sh->intr_handle_devx.fd = -1;
2783                 }
2784 #endif /* HAVE_IBV_DEVX_ASYNC */
2785         }
2786 }
2787
2788 /**
2789  * Uninstall shared asynchronous device events handler.
2790  * This function is implemented to support event sharing
2791  * between multiple ports of single IB device.
2792  *
2793  * @param dev
2794  *   Pointer to mlx5_dev_ctx_shared object.
2795  */
2796 void
2797 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2798 {
2799         if (sh->intr_handle.fd >= 0)
2800                 mlx5_intr_callback_unregister(&sh->intr_handle,
2801                                               mlx5_dev_interrupt_handler, sh);
2802 #ifdef HAVE_IBV_DEVX_ASYNC
2803         if (sh->intr_handle_devx.fd >= 0)
2804                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2805                                   mlx5_dev_interrupt_handler_devx, sh);
2806         if (sh->devx_comp)
2807                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2808 #endif
2809 }
2810
2811 /**
2812  * Read statistics by a named counter.
2813  *
2814  * @param[in] priv
2815  *   Pointer to the private device data structure.
2816  * @param[in] ctr_name
2817  *   Pointer to the name of the statistic counter to read
2818  * @param[out] stat
2819  *   Pointer to read statistic value.
2820  * @return
2821  *   0 on success and stat is valud, 1 if failed to read the value
2822  *   rte_errno is set.
2823  *
2824  */
2825 int
2826 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2827                       uint64_t *stat)
2828 {
2829         int fd;
2830
2831         if (priv->sh) {
2832                 if (priv->q_counters != NULL &&
2833                     strcmp(ctr_name, "out_of_buffer") == 0)
2834                         return mlx5_devx_cmd_queue_counter_query
2835                                         (priv->q_counters, 0, (uint32_t *)stat);
2836                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2837                       priv->sh->ibdev_path,
2838                       priv->dev_port,
2839                       ctr_name);
2840                 fd = open(path, O_RDONLY);
2841                 /*
2842                  * in switchdev the file location is not per port
2843                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2844                  */
2845                 if (fd == -1) {
2846                         MKSTR(path1, "%s/hw_counters/%s",
2847                               priv->sh->ibdev_path,
2848                               ctr_name);
2849                         fd = open(path1, O_RDONLY);
2850                 }
2851                 if (fd != -1) {
2852                         char buf[21] = {'\0'};
2853                         ssize_t n = read(fd, buf, sizeof(buf));
2854
2855                         close(fd);
2856                         if (n != -1) {
2857                                 *stat = strtoull(buf, NULL, 10);
2858                                 return 0;
2859                         }
2860                 }
2861         }
2862         *stat = 0;
2863         return 1;
2864 }
2865
2866 /**
2867  * Remove a MAC address from device
2868  *
2869  * @param dev
2870  *   Pointer to Ethernet device structure.
2871  * @param index
2872  *   MAC address index.
2873  */
2874 void
2875 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2876 {
2877         struct mlx5_priv *priv = dev->data->dev_private;
2878         const int vf = priv->config.vf;
2879
2880         if (vf)
2881                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2882                                         mlx5_ifindex(dev), priv->mac_own,
2883                                         &dev->data->mac_addrs[index], index);
2884 }
2885
2886 /**
2887  * Adds a MAC address to the device
2888  *
2889  * @param dev
2890  *   Pointer to Ethernet device structure.
2891  * @param mac_addr
2892  *   MAC address to register.
2893  * @param index
2894  *   MAC address index.
2895  *
2896  * @return
2897  *   0 on success, a negative errno value otherwise
2898  */
2899 int
2900 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2901                      uint32_t index)
2902 {
2903         struct mlx5_priv *priv = dev->data->dev_private;
2904         const int vf = priv->config.vf;
2905         int ret = 0;
2906
2907         if (vf)
2908                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2909                                            mlx5_ifindex(dev), priv->mac_own,
2910                                            mac, index);
2911         return ret;
2912 }
2913
2914 /**
2915  * Modify a VF MAC address
2916  *
2917  * @param priv
2918  *   Pointer to device private data.
2919  * @param mac_addr
2920  *   MAC address to modify into.
2921  * @param iface_idx
2922  *   Net device interface index
2923  * @param vf_index
2924  *   VF index
2925  *
2926  * @return
2927  *   0 on success, a negative errno value otherwise
2928  */
2929 int
2930 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2931                            unsigned int iface_idx,
2932                            struct rte_ether_addr *mac_addr,
2933                            int vf_index)
2934 {
2935         return mlx5_nl_vf_mac_addr_modify
2936                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2937 }
2938
2939 /**
2940  * Set device promiscuous mode
2941  *
2942  * @param dev
2943  *   Pointer to Ethernet device structure.
2944  * @param enable
2945  *   0 - promiscuous is disabled, otherwise - enabled
2946  *
2947  * @return
2948  *   0 on success, a negative error value otherwise
2949  */
2950 int
2951 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2952 {
2953         struct mlx5_priv *priv = dev->data->dev_private;
2954
2955         return mlx5_nl_promisc(priv->nl_socket_route,
2956                                mlx5_ifindex(dev), !!enable);
2957 }
2958
2959 /**
2960  * Set device promiscuous mode
2961  *
2962  * @param dev
2963  *   Pointer to Ethernet device structure.
2964  * @param enable
2965  *   0 - all multicase is disabled, otherwise - enabled
2966  *
2967  * @return
2968  *   0 on success, a negative error value otherwise
2969  */
2970 int
2971 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2972 {
2973         struct mlx5_priv *priv = dev->data->dev_private;
2974
2975         return mlx5_nl_allmulti(priv->nl_socket_route,
2976                                 mlx5_ifindex(dev), !!enable);
2977 }
2978
2979 /**
2980  * Flush device MAC addresses
2981  *
2982  * @param dev
2983  *   Pointer to Ethernet device structure.
2984  *
2985  */
2986 void
2987 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2988 {
2989         struct mlx5_priv *priv = dev->data->dev_private;
2990
2991         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2992                                dev->data->mac_addrs,
2993                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2994 }