1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
18 #include <rte_malloc.h>
19 #include <rte_ethdev_driver.h>
20 #include <rte_ethdev_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_common.h>
24 #include <rte_kvargs.h>
25 #include <rte_rwlock.h>
26 #include <rte_spinlock.h>
27 #include <rte_string_fns.h>
28 #include <rte_alarm.h>
29 #include <rte_eal_paging.h>
31 #include <mlx5_glue.h>
32 #include <mlx5_devx_cmds.h>
33 #include <mlx5_common.h>
34 #include <mlx5_common_mp.h>
35 #include <mlx5_common_mr.h>
36 #include <mlx5_malloc.h>
38 #include "mlx5_defs.h"
40 #include "mlx5_common_os.h"
41 #include "mlx5_utils.h"
42 #include "mlx5_rxtx.h"
43 #include "mlx5_autoconf.h"
45 #include "mlx5_flow.h"
46 #include "rte_pmd_mlx5.h"
47 #include "mlx5_verbs.h"
50 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
52 #ifndef HAVE_IBV_MLX5_MOD_MPW
53 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
54 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
57 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
58 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
61 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
63 /* Spinlock for mlx5_shared_data allocation. */
64 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
66 /* Process local data for secondary processes. */
67 static struct mlx5_local_data mlx5_local_data;
70 * Set the completion channel file descriptor interrupt as non-blocking.
73 * Pointer to RQ channel object, which includes the channel fd
76 * The file descriptor (representing the intetrrupt) used in this channel.
79 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
82 mlx5_os_set_nonblock_channel_fd(int fd)
86 flags = fcntl(fd, F_GETFL);
87 return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
91 * Get mlx5 device attributes. The glue function query_device_ex() is called
92 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
93 * device attributes from the glue out parameter.
96 * Pointer to ibv context.
99 * Pointer to mlx5 device attributes.
102 * 0 on success, non zero error number otherwise
105 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
108 struct ibv_device_attr_ex attr_ex;
109 memset(device_attr, 0, sizeof(*device_attr));
110 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
114 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
115 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
116 device_attr->max_sge = attr_ex.orig_attr.max_sge;
117 device_attr->max_cq = attr_ex.orig_attr.max_cq;
118 device_attr->max_qp = attr_ex.orig_attr.max_qp;
119 device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
120 device_attr->max_rwq_indirection_table_size =
121 attr_ex.rss_caps.max_rwq_indirection_table_size;
122 device_attr->max_tso = attr_ex.tso_caps.max_tso;
123 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
125 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
126 err = mlx5_glue->dv_query_device(ctx, &dv_attr);
130 device_attr->flags = dv_attr.flags;
131 device_attr->comp_mask = dv_attr.comp_mask;
132 #ifdef HAVE_IBV_MLX5_MOD_SWP
133 device_attr->sw_parsing_offloads =
134 dv_attr.sw_parsing_caps.sw_parsing_offloads;
136 device_attr->min_single_stride_log_num_of_bytes =
137 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
138 device_attr->max_single_stride_log_num_of_bytes =
139 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
140 device_attr->min_single_wqe_log_num_of_strides =
141 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
142 device_attr->max_single_wqe_log_num_of_strides =
143 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
144 device_attr->stride_supported_qpts =
145 dv_attr.striding_rq_caps.supported_qpts;
146 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
147 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
154 * Verbs callback to allocate a memory. This function should allocate the space
155 * according to the size provided residing inside a huge page.
156 * Please note that all allocation must respect the alignment from libmlx5
157 * (i.e. currently rte_mem_page_size()).
160 * The size in bytes of the memory to allocate.
162 * A pointer to the callback data.
165 * Allocated buffer, NULL otherwise and rte_errno is set.
168 mlx5_alloc_verbs_buf(size_t size, void *data)
170 struct mlx5_priv *priv = data;
172 unsigned int socket = SOCKET_ID_ANY;
173 size_t alignment = rte_mem_page_size();
174 if (alignment == (size_t)-1) {
175 DRV_LOG(ERR, "Failed to get mem page size");
180 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
181 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
183 socket = ctrl->socket;
184 } else if (priv->verbs_alloc_ctx.type ==
185 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
186 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
188 socket = ctrl->socket;
190 MLX5_ASSERT(data != NULL);
191 ret = mlx5_malloc(0, size, alignment, socket);
198 * Verbs callback to free a memory.
201 * A pointer to the memory to free.
203 * A pointer to the callback data.
206 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
208 MLX5_ASSERT(data != NULL);
213 * Initialize DR related data within private structure.
214 * Routine checks the reference counter and does actual
215 * resources creation/initialization only if counter is zero.
218 * Pointer to the private device data structure.
221 * Zero on success, positive error code otherwise.
224 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
226 struct mlx5_dev_ctx_shared *sh = priv->sh;
227 char s[MLX5_HLIST_NAMESIZE];
231 err = mlx5_alloc_table_hash_list(priv);
233 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
234 (void *)sh->flow_tbls);
237 /* Create tags hash list table. */
238 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
239 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
240 if (!sh->tag_table) {
241 DRV_LOG(ERR, "tags with hash creation failed.");
245 snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
246 sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ);
247 if (!sh->modify_cmds) {
248 DRV_LOG(ERR, "hdr modify hash creation failed");
252 #ifdef HAVE_MLX5DV_DR
256 /* Shared DV/DR structures is already initialized. */
261 /* Reference counter is zero, we should initialize structures. */
262 domain = mlx5_glue->dr_create_domain(sh->ctx,
263 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
265 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
269 sh->rx_domain = domain;
270 domain = mlx5_glue->dr_create_domain(sh->ctx,
271 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
273 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
277 pthread_mutex_init(&sh->dv_mutex, NULL);
278 sh->tx_domain = domain;
279 #ifdef HAVE_MLX5DV_DR_ESWITCH
280 if (priv->config.dv_esw_en) {
281 domain = mlx5_glue->dr_create_domain
282 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
284 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
288 sh->fdb_domain = domain;
289 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
292 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
293 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
294 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
296 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
298 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
299 #endif /* HAVE_MLX5DV_DR */
304 /* Rollback the created objects. */
306 mlx5_glue->dr_destroy_domain(sh->rx_domain);
307 sh->rx_domain = NULL;
310 mlx5_glue->dr_destroy_domain(sh->tx_domain);
311 sh->tx_domain = NULL;
313 if (sh->fdb_domain) {
314 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
315 sh->fdb_domain = NULL;
317 if (sh->esw_drop_action) {
318 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
319 sh->esw_drop_action = NULL;
321 if (sh->pop_vlan_action) {
322 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
323 sh->pop_vlan_action = NULL;
325 if (sh->modify_cmds) {
326 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
327 sh->modify_cmds = NULL;
330 /* tags should be destroyed with flow before. */
331 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
332 sh->tag_table = NULL;
334 mlx5_free_table_hash_list(priv);
339 * Destroy DR related data within private structure.
342 * Pointer to the private device data structure.
345 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
347 struct mlx5_dev_ctx_shared *sh;
349 if (!priv->dr_shared)
354 #ifdef HAVE_MLX5DV_DR
355 MLX5_ASSERT(sh->dv_refcnt);
356 if (sh->dv_refcnt && --sh->dv_refcnt)
359 mlx5_glue->dr_destroy_domain(sh->rx_domain);
360 sh->rx_domain = NULL;
363 mlx5_glue->dr_destroy_domain(sh->tx_domain);
364 sh->tx_domain = NULL;
366 #ifdef HAVE_MLX5DV_DR_ESWITCH
367 if (sh->fdb_domain) {
368 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
369 sh->fdb_domain = NULL;
371 if (sh->esw_drop_action) {
372 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
373 sh->esw_drop_action = NULL;
376 if (sh->pop_vlan_action) {
377 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
378 sh->pop_vlan_action = NULL;
380 pthread_mutex_destroy(&sh->dv_mutex);
381 #endif /* HAVE_MLX5DV_DR */
382 if (sh->modify_cmds) {
383 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
384 sh->modify_cmds = NULL;
387 /* tags should be destroyed with flow before. */
388 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
389 sh->tag_table = NULL;
391 mlx5_free_table_hash_list(priv);
395 * Initialize shared data between primary and secondary process.
397 * A memzone is reserved by primary process and secondary processes attach to
401 * 0 on success, a negative errno value otherwise and rte_errno is set.
404 mlx5_init_shared_data(void)
406 const struct rte_memzone *mz;
409 rte_spinlock_lock(&mlx5_shared_data_lock);
410 if (mlx5_shared_data == NULL) {
411 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
412 /* Allocate shared memory. */
413 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
414 sizeof(*mlx5_shared_data),
418 "Cannot allocate mlx5 shared data");
422 mlx5_shared_data = mz->addr;
423 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
424 rte_spinlock_init(&mlx5_shared_data->lock);
426 /* Lookup allocated shared memory. */
427 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
430 "Cannot attach mlx5 shared data");
434 mlx5_shared_data = mz->addr;
435 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
439 rte_spinlock_unlock(&mlx5_shared_data_lock);
444 * PMD global initialization.
446 * Independent from individual device, this function initializes global
447 * per-PMD data structures distinguishing primary and secondary processes.
448 * Hence, each initialization is called once per a process.
451 * 0 on success, a negative errno value otherwise and rte_errno is set.
456 struct mlx5_shared_data *sd;
457 struct mlx5_local_data *ld = &mlx5_local_data;
460 if (mlx5_init_shared_data())
462 sd = mlx5_shared_data;
464 rte_spinlock_lock(&sd->lock);
465 switch (rte_eal_process_type()) {
466 case RTE_PROC_PRIMARY:
469 LIST_INIT(&sd->mem_event_cb_list);
470 rte_rwlock_init(&sd->mem_event_rwlock);
471 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
472 mlx5_mr_mem_event_cb, NULL);
473 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
474 mlx5_mp_os_primary_handle);
477 sd->init_done = true;
479 case RTE_PROC_SECONDARY:
482 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
483 mlx5_mp_os_secondary_handle);
487 ld->init_done = true;
493 rte_spinlock_unlock(&sd->lock);
498 * Spawn an Ethernet device from Verbs information.
501 * Backing DPDK device.
503 * Verbs device parameters (name, port, switch_info) to spawn.
505 * Device configuration parameters.
508 * A valid Ethernet device object on success, NULL otherwise and rte_errno
509 * is set. The following errors are defined:
511 * EBUSY: device is not supposed to be spawned.
512 * EEXIST: device is already spawned
514 static struct rte_eth_dev *
515 mlx5_dev_spawn(struct rte_device *dpdk_dev,
516 struct mlx5_dev_spawn_data *spawn,
517 struct mlx5_dev_config *config)
519 const struct mlx5_switch_info *switch_info = &spawn->info;
520 struct mlx5_dev_ctx_shared *sh = NULL;
521 struct ibv_port_attr port_attr;
522 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
523 struct rte_eth_dev *eth_dev = NULL;
524 struct mlx5_priv *priv = NULL;
526 unsigned int hw_padding = 0;
528 unsigned int cqe_comp;
529 unsigned int cqe_pad = 0;
530 unsigned int tunnel_en = 0;
531 unsigned int mpls_en = 0;
532 unsigned int swp = 0;
533 unsigned int mprq = 0;
534 unsigned int mprq_min_stride_size_n = 0;
535 unsigned int mprq_max_stride_size_n = 0;
536 unsigned int mprq_min_stride_num_n = 0;
537 unsigned int mprq_max_stride_num_n = 0;
538 struct rte_ether_addr mac;
539 char name[RTE_ETH_NAME_MAX_LEN];
540 int own_domain_id = 0;
543 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
544 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
547 /* Determine if this port representor is supposed to be spawned. */
548 if (switch_info->representor && dpdk_dev->devargs) {
549 struct rte_eth_devargs eth_da;
551 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
554 DRV_LOG(ERR, "failed to process device arguments: %s",
555 strerror(rte_errno));
558 for (i = 0; i < eth_da.nb_representor_ports; ++i)
559 if (eth_da.representor_ports[i] ==
560 (uint16_t)switch_info->port_name)
562 if (i == eth_da.nb_representor_ports) {
567 /* Build device name. */
568 if (spawn->pf_bond < 0) {
570 if (!switch_info->representor)
571 strlcpy(name, dpdk_dev->name, sizeof(name));
573 snprintf(name, sizeof(name), "%s_representor_%u",
574 dpdk_dev->name, switch_info->port_name);
576 /* Bonding device. */
577 if (!switch_info->representor)
578 snprintf(name, sizeof(name), "%s_%s",
580 mlx5_os_get_dev_device_name(spawn->phys_dev));
582 snprintf(name, sizeof(name), "%s_%s_representor_%u",
584 mlx5_os_get_dev_device_name(spawn->phys_dev),
585 switch_info->port_name);
587 /* check if the device is already spawned */
588 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
592 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
593 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
594 struct mlx5_mp_id mp_id;
596 eth_dev = rte_eth_dev_attach_secondary(name);
597 if (eth_dev == NULL) {
598 DRV_LOG(ERR, "can not attach rte ethdev");
602 eth_dev->device = dpdk_dev;
603 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
604 err = mlx5_proc_priv_init(eth_dev);
607 mp_id.port_id = eth_dev->data->port_id;
608 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
609 /* Receive command fd from primary process */
610 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
613 /* Remap UAR for Tx queues. */
614 err = mlx5_tx_uar_init_secondary(eth_dev, err);
618 * Ethdev pointer is still required as input since
619 * the primary device is not accessible from the
622 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
623 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
626 mlx5_dev_close(eth_dev);
630 * Some parameters ("tx_db_nc" in particularly) are needed in
631 * advance to create dv/verbs device context. We proceed the
632 * devargs here to get ones, and later proceed devargs again
633 * to override some hardware settings.
635 err = mlx5_args(config, dpdk_dev->devargs);
638 DRV_LOG(ERR, "failed to process device arguments: %s",
639 strerror(rte_errno));
642 mlx5_malloc_mem_select(config->sys_mem_en);
643 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
646 config->devx = sh->devx;
647 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
648 config->dest_tir = 1;
650 #ifdef HAVE_IBV_MLX5_MOD_SWP
651 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
654 * Multi-packet send is supported by ConnectX-4 Lx PF as well
655 * as all ConnectX-5 devices.
657 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
658 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
660 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
661 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
663 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
664 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
665 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
666 DRV_LOG(DEBUG, "enhanced MPW is supported");
667 mps = MLX5_MPW_ENHANCED;
669 DRV_LOG(DEBUG, "MPW is supported");
673 DRV_LOG(DEBUG, "MPW isn't supported");
674 mps = MLX5_MPW_DISABLED;
676 #ifdef HAVE_IBV_MLX5_MOD_SWP
677 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
678 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
679 DRV_LOG(DEBUG, "SWP support: %u", swp);
682 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
683 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
684 struct mlx5dv_striding_rq_caps mprq_caps =
685 dv_attr.striding_rq_caps;
687 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
688 mprq_caps.min_single_stride_log_num_of_bytes);
689 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
690 mprq_caps.max_single_stride_log_num_of_bytes);
691 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
692 mprq_caps.min_single_wqe_log_num_of_strides);
693 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
694 mprq_caps.max_single_wqe_log_num_of_strides);
695 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
696 mprq_caps.supported_qpts);
697 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
699 mprq_min_stride_size_n =
700 mprq_caps.min_single_stride_log_num_of_bytes;
701 mprq_max_stride_size_n =
702 mprq_caps.max_single_stride_log_num_of_bytes;
703 mprq_min_stride_num_n =
704 mprq_caps.min_single_wqe_log_num_of_strides;
705 mprq_max_stride_num_n =
706 mprq_caps.max_single_wqe_log_num_of_strides;
709 if (RTE_CACHE_LINE_SIZE == 128 &&
710 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
714 config->cqe_comp = cqe_comp;
715 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
716 /* Whether device supports 128B Rx CQE padding. */
717 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
718 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
720 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
721 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
722 tunnel_en = ((dv_attr.tunnel_offloads_caps &
723 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
724 (dv_attr.tunnel_offloads_caps &
725 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
726 (dv_attr.tunnel_offloads_caps &
727 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
729 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
730 tunnel_en ? "" : "not ");
733 "tunnel offloading disabled due to old OFED/rdma-core version");
735 config->tunnel_en = tunnel_en;
736 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
737 mpls_en = ((dv_attr.tunnel_offloads_caps &
738 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
739 (dv_attr.tunnel_offloads_caps &
740 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
741 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
742 mpls_en ? "" : "not ");
744 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
745 " old OFED/rdma-core version or firmware configuration");
747 config->mpls_en = mpls_en;
748 /* Check port status. */
749 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
751 DRV_LOG(ERR, "port query failed: %s", strerror(err));
754 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
755 DRV_LOG(ERR, "port is not configured in Ethernet mode");
759 if (port_attr.state != IBV_PORT_ACTIVE)
760 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
761 mlx5_glue->port_state_str(port_attr.state),
763 /* Allocate private eth device data. */
764 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
766 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
768 DRV_LOG(ERR, "priv allocation failure");
773 priv->dev_port = spawn->phys_port;
774 priv->pci_dev = spawn->pci_dev;
775 priv->mtu = RTE_ETHER_MTU;
776 priv->mp_id.port_id = port_id;
777 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
778 /* Some internal functions rely on Netlink sockets, open them now. */
779 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
780 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
781 priv->representor = !!switch_info->representor;
782 priv->master = !!switch_info->master;
783 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
784 priv->vport_meta_tag = 0;
785 priv->vport_meta_mask = 0;
786 priv->pf_bond = spawn->pf_bond;
787 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
789 * The DevX port query API is implemented. E-Switch may use
790 * either vport or reg_c[0] metadata register to match on
791 * vport index. The engaged part of metadata register is
794 if (switch_info->representor || switch_info->master) {
795 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
796 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
797 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
801 "can't query devx port %d on device %s",
803 mlx5_os_get_dev_device_name(spawn->phys_dev));
804 devx_port.comp_mask = 0;
807 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
808 priv->vport_meta_tag = devx_port.reg_c_0.value;
809 priv->vport_meta_mask = devx_port.reg_c_0.mask;
810 if (!priv->vport_meta_mask) {
811 DRV_LOG(ERR, "vport zero mask for port %d"
812 " on bonding device %s",
814 mlx5_os_get_dev_device_name
819 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
820 DRV_LOG(ERR, "invalid vport tag for port %d"
821 " on bonding device %s",
823 mlx5_os_get_dev_device_name
829 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
830 priv->vport_id = devx_port.vport_num;
831 } else if (spawn->pf_bond >= 0) {
832 DRV_LOG(ERR, "can't deduce vport index for port %d"
833 " on bonding device %s",
835 mlx5_os_get_dev_device_name(spawn->phys_dev));
839 /* Suppose vport index in compatible way. */
840 priv->vport_id = switch_info->representor ?
841 switch_info->port_name + 1 : -1;
845 * Kernel/rdma_core support single E-Switch per PF configurations
846 * only and vport_id field contains the vport index for
847 * associated VF, which is deduced from representor port name.
848 * For example, let's have the IB device port 10, it has
849 * attached network device eth0, which has port name attribute
850 * pf0vf2, we can deduce the VF number as 2, and set vport index
851 * as 3 (2+1). This assigning schema should be changed if the
852 * multiple E-Switch instances per PF configurations or/and PCI
853 * subfunctions are added.
855 priv->vport_id = switch_info->representor ?
856 switch_info->port_name + 1 : -1;
858 /* representor_id field keeps the unmodified VF index. */
859 priv->representor_id = switch_info->representor ?
860 switch_info->port_name : -1;
862 * Look for sibling devices in order to reuse their switch domain
863 * if any, otherwise allocate one.
865 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
866 const struct mlx5_priv *opriv =
867 rte_eth_devices[port_id].data->dev_private;
870 opriv->sh != priv->sh ||
872 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
874 priv->domain_id = opriv->domain_id;
877 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
878 err = rte_eth_switch_domain_alloc(&priv->domain_id);
881 DRV_LOG(ERR, "unable to allocate switch domain: %s",
882 strerror(rte_errno));
887 /* Override some values set by hardware configuration. */
888 mlx5_args(config, dpdk_dev->devargs);
889 err = mlx5_dev_check_sibling_config(priv, config);
892 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
893 IBV_DEVICE_RAW_IP_CSUM);
894 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
895 (config->hw_csum ? "" : "not "));
896 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
897 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
898 DRV_LOG(DEBUG, "counters are not supported");
900 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
901 if (config->dv_flow_en) {
902 DRV_LOG(WARNING, "DV flow is not supported");
903 config->dv_flow_en = 0;
906 config->ind_table_max_size =
907 sh->device_attr.max_rwq_indirection_table_size;
909 * Remove this check once DPDK supports larger/variable
910 * indirection tables.
912 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
913 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
914 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
915 config->ind_table_max_size);
916 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
917 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
918 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
919 (config->hw_vlan_strip ? "" : "not "));
920 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
921 IBV_RAW_PACKET_CAP_SCATTER_FCS);
922 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
923 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
924 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
925 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
926 IBV_DEVICE_PCI_WRITE_END_PADDING);
928 if (config->hw_padding && !hw_padding) {
929 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
930 config->hw_padding = 0;
931 } else if (config->hw_padding) {
932 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
934 config->tso = (sh->device_attr.max_tso > 0 &&
935 (sh->device_attr.tso_supported_qpts &
936 (1 << IBV_QPT_RAW_PACKET)));
938 config->tso_max_payload_sz = sh->device_attr.max_tso;
940 * MPW is disabled by default, while the Enhanced MPW is enabled
943 if (config->mps == MLX5_ARG_UNSET)
944 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
947 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
948 DRV_LOG(INFO, "%sMPS is %s",
949 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
950 config->mps == MLX5_MPW ? "legacy " : "",
951 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
952 if (config->cqe_comp && !cqe_comp) {
953 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
954 config->cqe_comp = 0;
956 if (config->cqe_pad && !cqe_pad) {
957 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
959 } else if (config->cqe_pad) {
960 DRV_LOG(INFO, "Rx CQE padding is enabled");
963 priv->counter_fallback = 0;
964 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
969 if (!config->hca_attr.flow_counters_dump)
970 priv->counter_fallback = 1;
971 #ifndef HAVE_IBV_DEVX_ASYNC
972 priv->counter_fallback = 1;
974 if (priv->counter_fallback)
975 DRV_LOG(INFO, "Use fall-back DV counter management");
976 /* Check for LRO support. */
977 if (config->dest_tir && config->hca_attr.lro_cap &&
978 config->dv_flow_en) {
979 /* TBD check tunnel lro caps. */
980 config->lro.supported = config->hca_attr.lro_cap;
981 DRV_LOG(DEBUG, "Device supports LRO");
983 * If LRO timeout is not configured by application,
984 * use the minimal supported value.
986 if (!config->lro.timeout)
987 config->lro.timeout =
988 config->hca_attr.lro_timer_supported_periods[0];
989 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
990 config->lro.timeout);
992 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
993 if (config->hca_attr.qos.sup &&
994 config->hca_attr.qos.srtcm_sup &&
995 config->dv_flow_en) {
997 config->hca_attr.qos.flow_meter_reg_c_ids;
999 * Meter needs two REG_C's for color match and pre-sfx
1000 * flow match. Here get the REG_C for color match.
1001 * REG_C_0 and REG_C_1 is reserved for metadata feature.
1004 if (__builtin_popcount(reg_c_mask) < 1) {
1006 DRV_LOG(WARNING, "No available register for"
1009 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1012 priv->mtr_reg_share =
1013 config->hca_attr.qos.flow_meter_reg_share;
1014 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1015 priv->mtr_color_reg);
1020 if (config->tx_pp) {
1021 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1022 config->hca_attr.dev_freq_khz);
1023 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1024 config->hca_attr.qos.packet_pacing ? "" : "not ");
1025 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1026 config->hca_attr.cross_channel ? "" : "not ");
1027 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1028 config->hca_attr.wqe_index_ignore ? "" : "not ");
1029 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1030 config->hca_attr.non_wire_sq ? "" : "not ");
1031 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1032 config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1033 config->hca_attr.log_max_static_sq_wq);
1034 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1035 config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1036 if (!config->devx) {
1037 DRV_LOG(ERR, "DevX is required for packet pacing");
1041 if (!config->hca_attr.qos.packet_pacing) {
1042 DRV_LOG(ERR, "Packet pacing is not supported");
1046 if (!config->hca_attr.cross_channel) {
1047 DRV_LOG(ERR, "Cross channel operations are"
1048 " required for packet pacing");
1052 if (!config->hca_attr.wqe_index_ignore) {
1053 DRV_LOG(ERR, "WQE index ignore feature is"
1054 " required for packet pacing");
1058 if (!config->hca_attr.non_wire_sq) {
1059 DRV_LOG(ERR, "Non-wire SQ feature is"
1060 " required for packet pacing");
1064 if (!config->hca_attr.log_max_static_sq_wq) {
1065 DRV_LOG(ERR, "Static WQE SQ feature is"
1066 " required for packet pacing");
1070 if (!config->hca_attr.qos.wqe_rate_pp) {
1071 DRV_LOG(ERR, "WQE rate mode is required"
1072 " for packet pacing");
1076 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1077 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1078 " can't create queues for packet pacing");
1084 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1086 err = config->hca_attr.access_register_user ?
1087 mlx5_devx_cmd_register_read
1088 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1089 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1093 /* MTUTC register is read successfully. */
1094 ts_mode = MLX5_GET(register_mtutc, reg,
1096 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1097 config->rt_timestamp = 1;
1099 /* Kernel does not support register reading. */
1100 if (config->hca_attr.dev_freq_khz ==
1101 (NS_PER_S / MS_PER_S))
1102 config->rt_timestamp = 1;
1106 * If HW has bug working with tunnel packet decapsulation and
1107 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1108 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1110 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1111 config->hw_fcs_strip = 0;
1112 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1113 (config->hw_fcs_strip ? "" : "not "));
1114 if (config->mprq.enabled && mprq) {
1115 if (config->mprq.stride_num_n &&
1116 (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1117 config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1118 config->mprq.stride_num_n =
1119 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1120 mprq_min_stride_num_n),
1121 mprq_max_stride_num_n);
1123 "the number of strides"
1124 " for Multi-Packet RQ is out of range,"
1125 " setting default value (%u)",
1126 1 << config->mprq.stride_num_n);
1128 if (config->mprq.stride_size_n &&
1129 (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1130 config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1131 config->mprq.stride_size_n =
1132 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1133 mprq_min_stride_size_n),
1134 mprq_max_stride_size_n);
1136 "the size of a stride"
1137 " for Multi-Packet RQ is out of range,"
1138 " setting default value (%u)",
1139 1 << config->mprq.stride_size_n);
1141 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1142 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1143 } else if (config->mprq.enabled && !mprq) {
1144 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1145 config->mprq.enabled = 0;
1147 if (config->max_dump_files_num == 0)
1148 config->max_dump_files_num = 128;
1149 eth_dev = rte_eth_dev_allocate(name);
1150 if (eth_dev == NULL) {
1151 DRV_LOG(ERR, "can not allocate rte ethdev");
1155 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1156 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1157 if (priv->representor) {
1158 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1159 eth_dev->data->representor_id = priv->representor_id;
1162 * Store associated network device interface index. This index
1163 * is permanent throughout the lifetime of device. So, we may store
1164 * the ifindex here and use the cached value further.
1166 MLX5_ASSERT(spawn->ifindex);
1167 priv->if_index = spawn->ifindex;
1168 eth_dev->data->dev_private = priv;
1169 priv->dev_data = eth_dev->data;
1170 eth_dev->data->mac_addrs = priv->mac;
1171 eth_dev->device = dpdk_dev;
1172 /* Configure the first MAC address by default. */
1173 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1175 "port %u cannot get MAC address, is mlx5_en"
1176 " loaded? (errno: %s)",
1177 eth_dev->data->port_id, strerror(rte_errno));
1182 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1183 eth_dev->data->port_id,
1184 mac.addr_bytes[0], mac.addr_bytes[1],
1185 mac.addr_bytes[2], mac.addr_bytes[3],
1186 mac.addr_bytes[4], mac.addr_bytes[5]);
1187 #ifdef RTE_LIBRTE_MLX5_DEBUG
1189 char ifname[IF_NAMESIZE];
1191 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1192 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1193 eth_dev->data->port_id, ifname);
1195 DRV_LOG(DEBUG, "port %u ifname is unknown",
1196 eth_dev->data->port_id);
1199 /* Get actual MTU if possible. */
1200 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1205 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1207 /* Initialize burst functions to prevent crashes before link-up. */
1208 eth_dev->rx_pkt_burst = removed_rx_burst;
1209 eth_dev->tx_pkt_burst = removed_tx_burst;
1210 eth_dev->dev_ops = &mlx5_os_dev_ops;
1211 /* Register MAC address. */
1212 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1213 if (config->vf && config->vf_nl_en)
1214 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1215 mlx5_ifindex(eth_dev),
1216 eth_dev->data->mac_addrs,
1217 MLX5_MAX_MAC_ADDRESSES);
1219 priv->ctrl_flows = 0;
1220 TAILQ_INIT(&priv->flow_meters);
1221 TAILQ_INIT(&priv->flow_meter_profiles);
1222 /* Hint libmlx5 to use PMD allocator for data plane resources */
1223 mlx5_glue->dv_set_context_attr(sh->ctx,
1224 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1225 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1226 .alloc = &mlx5_alloc_verbs_buf,
1227 .free = &mlx5_free_verbs_buf,
1230 /* Bring Ethernet device up. */
1231 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1232 eth_dev->data->port_id);
1233 mlx5_set_link_up(eth_dev);
1235 * Even though the interrupt handler is not installed yet,
1236 * interrupts will still trigger on the async_fd from
1237 * Verbs context returned by ibv_open_device().
1239 mlx5_link_update(eth_dev, 0);
1240 #ifdef HAVE_MLX5DV_DR_ESWITCH
1241 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1242 (switch_info->representor || switch_info->master)))
1243 config->dv_esw_en = 0;
1245 config->dv_esw_en = 0;
1247 /* Detect minimal data bytes to inline. */
1248 mlx5_set_min_inline(spawn, config);
1249 /* Store device configuration on private structure. */
1250 priv->config = *config;
1251 /* Create context for virtual machine VLAN workaround. */
1252 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1253 if (config->dv_flow_en) {
1254 err = mlx5_alloc_shared_dr(priv);
1258 * RSS id is shared with meter flow id. Meter flow id can only
1259 * use the 24 MSB of the register.
1261 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1262 MLX5_MTR_COLOR_BITS);
1263 if (!priv->qrss_id_pool) {
1264 DRV_LOG(ERR, "can't create flow id pool");
1269 /* Supported Verbs flow priority number detection. */
1270 err = mlx5_flow_discover_priorities(eth_dev);
1275 priv->config.flow_prio = err;
1276 if (!priv->config.dv_esw_en &&
1277 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1278 DRV_LOG(WARNING, "metadata mode %u is not supported "
1279 "(no E-Switch)", priv->config.dv_xmeta_en);
1280 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1282 mlx5_set_metadata_mask(eth_dev);
1283 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1284 !priv->sh->dv_regc0_mask) {
1285 DRV_LOG(ERR, "metadata mode %u is not supported "
1286 "(no metadata reg_c[0] is available)",
1287 priv->config.dv_xmeta_en);
1292 * Allocate the buffer for flow creating, just once.
1293 * The allocation must be done before any flow creating.
1295 mlx5_flow_alloc_intermediate(eth_dev);
1296 /* Query availability of metadata reg_c's. */
1297 err = mlx5_flow_discover_mreg_c(eth_dev);
1302 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1304 "port %u extensive metadata register is not supported",
1305 eth_dev->data->port_id);
1306 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1307 DRV_LOG(ERR, "metadata mode %u is not supported "
1308 "(no metadata registers available)",
1309 priv->config.dv_xmeta_en);
1314 if (priv->config.dv_flow_en &&
1315 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1316 mlx5_flow_ext_mreg_supported(eth_dev) &&
1317 priv->sh->dv_regc0_mask) {
1318 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1319 MLX5_FLOW_MREG_HTABLE_SZ);
1320 if (!priv->mreg_cp_tbl) {
1328 if (priv->mreg_cp_tbl)
1329 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1331 mlx5_os_free_shared_dr(priv);
1332 if (priv->nl_socket_route >= 0)
1333 close(priv->nl_socket_route);
1334 if (priv->nl_socket_rdma >= 0)
1335 close(priv->nl_socket_rdma);
1336 if (priv->vmwa_context)
1337 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1338 if (priv->qrss_id_pool)
1339 mlx5_flow_id_pool_release(priv->qrss_id_pool);
1341 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1343 if (eth_dev != NULL)
1344 eth_dev->data->dev_private = NULL;
1346 if (eth_dev != NULL) {
1347 /* mac_addrs must not be freed alone because part of
1350 eth_dev->data->mac_addrs = NULL;
1351 rte_eth_dev_release_port(eth_dev);
1354 mlx5_free_shared_dev_ctx(sh);
1355 MLX5_ASSERT(err > 0);
1361 * Comparison callback to sort device data.
1363 * This is meant to be used with qsort().
1366 * Pointer to pointer to first data object.
1368 * Pointer to pointer to second data object.
1371 * 0 if both objects are equal, less than 0 if the first argument is less
1372 * than the second, greater than 0 otherwise.
1375 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1377 const struct mlx5_switch_info *si_a =
1378 &((const struct mlx5_dev_spawn_data *)a)->info;
1379 const struct mlx5_switch_info *si_b =
1380 &((const struct mlx5_dev_spawn_data *)b)->info;
1383 /* Master device first. */
1384 ret = si_b->master - si_a->master;
1387 /* Then representor devices. */
1388 ret = si_b->representor - si_a->representor;
1391 /* Unidentified devices come last in no specific order. */
1392 if (!si_a->representor)
1394 /* Order representors by name. */
1395 return si_a->port_name - si_b->port_name;
1399 * Match PCI information for possible slaves of bonding device.
1401 * @param[in] ibv_dev
1402 * Pointer to Infiniband device structure.
1403 * @param[in] pci_dev
1404 * Pointer to PCI device structure to match PCI address.
1405 * @param[in] nl_rdma
1406 * Netlink RDMA group socket handle.
1409 * negative value if no bonding device found, otherwise
1410 * positive index of slave PF in bonding.
1413 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1414 const struct rte_pci_device *pci_dev,
1417 char ifname[IF_NAMESIZE + 1];
1418 unsigned int ifindex;
1424 * Try to get master device name. If something goes
1425 * wrong suppose the lack of kernel support and no
1430 if (!strstr(ibv_dev->name, "bond"))
1432 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1436 * The Master device might not be on the predefined
1437 * port (not on port index 1, it is not garanted),
1438 * we have to scan all Infiniband device port and
1441 for (i = 1; i <= np; ++i) {
1442 /* Check whether Infiniband port is populated. */
1443 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1446 if (!if_indextoname(ifindex, ifname))
1448 /* Try to read bonding slave names from sysfs. */
1450 "/sys/class/net/%s/master/bonding/slaves", ifname);
1451 file = fopen(slaves, "r");
1457 /* Use safe format to check maximal buffer length. */
1458 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1459 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1460 char tmp_str[IF_NAMESIZE + 32];
1461 struct rte_pci_addr pci_addr;
1462 struct mlx5_switch_info info;
1464 /* Process slave interface names in the loop. */
1465 snprintf(tmp_str, sizeof(tmp_str),
1466 "/sys/class/net/%s", ifname);
1467 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1468 DRV_LOG(WARNING, "can not get PCI address"
1469 " for netdev \"%s\"", ifname);
1472 if (pci_dev->addr.domain != pci_addr.domain ||
1473 pci_dev->addr.bus != pci_addr.bus ||
1474 pci_dev->addr.devid != pci_addr.devid ||
1475 pci_dev->addr.function != pci_addr.function)
1477 /* Slave interface PCI address match found. */
1479 snprintf(tmp_str, sizeof(tmp_str),
1480 "/sys/class/net/%s/phys_port_name", ifname);
1481 file = fopen(tmp_str, "rb");
1484 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1485 if (fscanf(file, "%32s", tmp_str) == 1)
1486 mlx5_translate_port_name(tmp_str, &info);
1487 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1488 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1489 pf = info.port_name;
1498 * DPDK callback to register a PCI device.
1500 * This function spawns Ethernet devices out of a given PCI device.
1502 * @param[in] pci_drv
1503 * PCI driver structure (mlx5_driver).
1504 * @param[in] pci_dev
1505 * PCI device information.
1508 * 0 on success, a negative errno value otherwise and rte_errno is set.
1511 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1512 struct rte_pci_device *pci_dev)
1514 struct ibv_device **ibv_list;
1516 * Number of found IB Devices matching with requested PCI BDF.
1517 * nd != 1 means there are multiple IB devices over the same
1518 * PCI device and we have representors and master.
1520 unsigned int nd = 0;
1522 * Number of found IB device Ports. nd = 1 and np = 1..n means
1523 * we have the single multiport IB device, and there may be
1524 * representors attached to some of found ports.
1526 unsigned int np = 0;
1528 * Number of DPDK ethernet devices to Spawn - either over
1529 * multiple IB devices or multiple ports of single IB device.
1530 * Actually this is the number of iterations to spawn.
1532 unsigned int ns = 0;
1535 * < 0 - no bonding device (single one)
1536 * >= 0 - bonding device (value is slave PF index)
1539 struct mlx5_dev_spawn_data *list = NULL;
1540 struct mlx5_dev_config dev_config;
1541 unsigned int dev_config_vf;
1544 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1545 mlx5_pmd_socket_init();
1546 ret = mlx5_init_once();
1548 DRV_LOG(ERR, "unable to init PMD global data: %s",
1549 strerror(rte_errno));
1553 ibv_list = mlx5_glue->get_device_list(&ret);
1555 rte_errno = errno ? errno : ENOSYS;
1556 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1560 * First scan the list of all Infiniband devices to find
1561 * matching ones, gathering into the list.
1563 struct ibv_device *ibv_match[ret + 1];
1564 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1565 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1569 struct rte_pci_addr pci_addr;
1571 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1572 bd = mlx5_device_bond_pci_match
1573 (ibv_list[ret], pci_dev, nl_rdma);
1576 * Bonding device detected. Only one match is allowed,
1577 * the bonding is supported over multi-port IB device,
1578 * there should be no matches on representor PCI
1579 * functions or non VF LAG bonding devices with
1580 * specified address.
1584 "multiple PCI match on bonding device"
1585 "\"%s\" found", ibv_list[ret]->name);
1590 DRV_LOG(INFO, "PCI information matches for"
1591 " slave %d bonding device \"%s\"",
1592 bd, ibv_list[ret]->name);
1593 ibv_match[nd++] = ibv_list[ret];
1596 if (mlx5_dev_to_pci_addr
1597 (ibv_list[ret]->ibdev_path, &pci_addr))
1599 if (pci_dev->addr.domain != pci_addr.domain ||
1600 pci_dev->addr.bus != pci_addr.bus ||
1601 pci_dev->addr.devid != pci_addr.devid ||
1602 pci_dev->addr.function != pci_addr.function)
1604 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1605 ibv_list[ret]->name);
1606 ibv_match[nd++] = ibv_list[ret];
1608 ibv_match[nd] = NULL;
1610 /* No device matches, just complain and bail out. */
1612 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1613 " are kernel drivers loaded?",
1614 pci_dev->addr.domain, pci_dev->addr.bus,
1615 pci_dev->addr.devid, pci_dev->addr.function);
1622 * Found single matching device may have multiple ports.
1623 * Each port may be representor, we have to check the port
1624 * number and check the representors existence.
1627 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1629 DRV_LOG(WARNING, "can not get IB device \"%s\""
1630 " ports number", ibv_match[0]->name);
1631 if (bd >= 0 && !np) {
1632 DRV_LOG(ERR, "can not get ports"
1633 " for bonding device");
1639 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1642 * This may happen if there is VF LAG kernel support and
1643 * application is compiled with older rdma_core library.
1646 "No kernel/verbs support for VF LAG bonding found.");
1647 rte_errno = ENOTSUP;
1653 * Now we can determine the maximal
1654 * amount of devices to be spawned.
1656 list = mlx5_malloc(MLX5_MEM_ZERO,
1657 sizeof(struct mlx5_dev_spawn_data) *
1659 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1661 DRV_LOG(ERR, "spawn data array allocation failure");
1666 if (bd >= 0 || np > 1) {
1668 * Single IB device with multiple ports found,
1669 * it may be E-Switch master device and representors.
1670 * We have to perform identification through the ports.
1672 MLX5_ASSERT(nl_rdma >= 0);
1673 MLX5_ASSERT(ns == 0);
1674 MLX5_ASSERT(nd == 1);
1676 for (i = 1; i <= np; ++i) {
1677 list[ns].max_port = np;
1678 list[ns].phys_port = i;
1679 list[ns].phys_dev = ibv_match[0];
1680 list[ns].eth_dev = NULL;
1681 list[ns].pci_dev = pci_dev;
1682 list[ns].pf_bond = bd;
1683 list[ns].ifindex = mlx5_nl_ifindex
1685 mlx5_os_get_dev_device_name
1686 (list[ns].phys_dev), i);
1687 if (!list[ns].ifindex) {
1689 * No network interface index found for the
1690 * specified port, it means there is no
1691 * representor on this port. It's OK,
1692 * there can be disabled ports, for example
1693 * if sriov_numvfs < sriov_totalvfs.
1699 ret = mlx5_nl_switch_info
1703 if (ret || (!list[ns].info.representor &&
1704 !list[ns].info.master)) {
1706 * We failed to recognize representors with
1707 * Netlink, let's try to perform the task
1710 ret = mlx5_sysfs_switch_info
1714 if (!ret && bd >= 0) {
1715 switch (list[ns].info.name_type) {
1716 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1717 if (list[ns].info.port_name == bd)
1720 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1722 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1723 if (list[ns].info.pf_num == bd)
1731 if (!ret && (list[ns].info.representor ^
1732 list[ns].info.master))
1737 "unable to recognize master/representors"
1738 " on the IB device with multiple ports");
1745 * The existence of several matching entries (nd > 1) means
1746 * port representors have been instantiated. No existing Verbs
1747 * call nor sysfs entries can tell them apart, this can only
1748 * be done through Netlink calls assuming kernel drivers are
1749 * recent enough to support them.
1751 * In the event of identification failure through Netlink,
1752 * try again through sysfs, then:
1754 * 1. A single IB device matches (nd == 1) with single
1755 * port (np=0/1) and is not a representor, assume
1756 * no switch support.
1758 * 2. Otherwise no safe assumptions can be made;
1759 * complain louder and bail out.
1761 for (i = 0; i != nd; ++i) {
1762 memset(&list[ns].info, 0, sizeof(list[ns].info));
1763 list[ns].max_port = 1;
1764 list[ns].phys_port = 1;
1765 list[ns].phys_dev = ibv_match[i];
1766 list[ns].eth_dev = NULL;
1767 list[ns].pci_dev = pci_dev;
1768 list[ns].pf_bond = -1;
1769 list[ns].ifindex = 0;
1771 list[ns].ifindex = mlx5_nl_ifindex
1773 mlx5_os_get_dev_device_name
1774 (list[ns].phys_dev), 1);
1775 if (!list[ns].ifindex) {
1776 char ifname[IF_NAMESIZE];
1779 * Netlink failed, it may happen with old
1780 * ib_core kernel driver (before 4.16).
1781 * We can assume there is old driver because
1782 * here we are processing single ports IB
1783 * devices. Let's try sysfs to retrieve
1784 * the ifindex. The method works for
1785 * master device only.
1789 * Multiple devices found, assume
1790 * representors, can not distinguish
1791 * master/representor and retrieve
1792 * ifindex via sysfs.
1796 ret = mlx5_get_ifname_sysfs
1797 (ibv_match[i]->ibdev_path, ifname);
1800 if_nametoindex(ifname);
1801 if (!list[ns].ifindex) {
1803 * No network interface index found
1804 * for the specified device, it means
1805 * there it is neither representor
1813 ret = mlx5_nl_switch_info
1817 if (ret || (!list[ns].info.representor &&
1818 !list[ns].info.master)) {
1820 * We failed to recognize representors with
1821 * Netlink, let's try to perform the task
1824 ret = mlx5_sysfs_switch_info
1828 if (!ret && (list[ns].info.representor ^
1829 list[ns].info.master)) {
1831 } else if ((nd == 1) &&
1832 !list[ns].info.representor &&
1833 !list[ns].info.master) {
1835 * Single IB device with
1836 * one physical port and
1837 * attached network device.
1838 * May be SRIOV is not enabled
1839 * or there is no representors.
1841 DRV_LOG(INFO, "no E-Switch support detected");
1848 "unable to recognize master/representors"
1849 " on the multiple IB devices");
1857 * Sort list to probe devices in natural order for users convenience
1858 * (i.e. master first, then representors from lowest to highest ID).
1860 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1861 /* Device specific configuration. */
1862 switch (pci_dev->id.device_id) {
1863 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1864 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1865 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1866 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1867 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1868 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1869 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1876 for (i = 0; i != ns; ++i) {
1879 /* Default configuration. */
1880 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1881 dev_config.vf = dev_config_vf;
1882 dev_config.mps = MLX5_ARG_UNSET;
1883 dev_config.dbnc = MLX5_ARG_UNSET;
1884 dev_config.rx_vec_en = 1;
1885 dev_config.txq_inline_max = MLX5_ARG_UNSET;
1886 dev_config.txq_inline_min = MLX5_ARG_UNSET;
1887 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
1888 dev_config.txqs_inline = MLX5_ARG_UNSET;
1889 dev_config.vf_nl_en = 1;
1890 dev_config.mr_ext_memseg_en = 1;
1891 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1892 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1893 dev_config.dv_esw_en = 1;
1894 dev_config.dv_flow_en = 1;
1895 dev_config.decap_en = 1;
1896 dev_config.log_hp_size = MLX5_ARG_UNSET;
1897 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1900 if (!list[i].eth_dev) {
1901 if (rte_errno != EBUSY && rte_errno != EEXIST)
1903 /* Device is disabled or already spawned. Ignore it. */
1906 restore = list[i].eth_dev->data->dev_flags;
1907 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1908 /* Restore non-PCI flags cleared by the above call. */
1909 list[i].eth_dev->data->dev_flags |= restore;
1910 rte_eth_dev_probing_finish(list[i].eth_dev);
1914 "probe of PCI device " PCI_PRI_FMT " aborted after"
1915 " encountering an error: %s",
1916 pci_dev->addr.domain, pci_dev->addr.bus,
1917 pci_dev->addr.devid, pci_dev->addr.function,
1918 strerror(rte_errno));
1922 if (!list[i].eth_dev)
1924 mlx5_dev_close(list[i].eth_dev);
1925 /* mac_addrs must not be freed because in dev_private */
1926 list[i].eth_dev->data->mac_addrs = NULL;
1927 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1929 /* Restore original error. */
1936 * Do the routine cleanup:
1937 * - close opened Netlink sockets
1938 * - free allocated spawn data array
1939 * - free the Infiniband device list
1947 MLX5_ASSERT(ibv_list);
1948 mlx5_glue->free_device_list(ibv_list);
1953 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1958 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1959 /* Get environment variable to store. */
1960 env = getenv(MLX5_SHUT_UP_BF);
1961 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
1962 if (config->dbnc == MLX5_ARG_UNSET)
1963 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
1965 setenv(MLX5_SHUT_UP_BF,
1966 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
1971 mlx5_restore_doorbell_mapping_env(int value)
1973 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1974 /* Restore the original environment variable state. */
1975 if (value == MLX5_ARG_UNSET)
1976 unsetenv(MLX5_SHUT_UP_BF);
1978 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
1982 * Extract pdn of PD object using DV API.
1985 * Pointer to the verbs PD object.
1987 * Pointer to the PD object number variable.
1990 * 0 on success, error value otherwise.
1993 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1995 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1996 struct mlx5dv_obj obj;
1997 struct mlx5dv_pd pd_info;
2001 obj.pd.out = &pd_info;
2002 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2004 DRV_LOG(DEBUG, "Fail to get PD object info");
2013 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2017 * Function API to open IB device.
2019 * This function calls the Linux glue APIs to open a device.
2022 * Pointer to the IB device attributes (name, port, etc).
2023 * @param[out] config
2024 * Pointer to device configuration structure.
2026 * Pointer to shared context structure.
2029 * 0 on success, a positive error value otherwise.
2032 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2033 const struct mlx5_dev_config *config,
2034 struct mlx5_dev_ctx_shared *sh)
2039 sh->numa_node = spawn->pci_dev->device.numa_node;
2040 pthread_mutex_init(&sh->txpp.mutex, NULL);
2042 * Configure environment variable "MLX5_BF_SHUT_UP"
2043 * before the device creation. The rdma_core library
2044 * checks the variable at device creation and
2045 * stores the result internally.
2047 dbmap_env = mlx5_config_doorbell_mapping_env(config);
2048 /* Try to open IB device with DV first, then usual Verbs. */
2050 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2053 DRV_LOG(DEBUG, "DevX is supported");
2054 /* The device is created, no need for environment. */
2055 mlx5_restore_doorbell_mapping_env(dbmap_env);
2057 /* The environment variable is still configured. */
2058 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2059 err = errno ? errno : ENODEV;
2061 * The environment variable is not needed anymore,
2062 * all device creation attempts are completed.
2064 mlx5_restore_doorbell_mapping_env(dbmap_env);
2067 DRV_LOG(DEBUG, "DevX is NOT supported");
2074 * Install shared asynchronous device events handler.
2075 * This function is implemented to support event sharing
2076 * between multiple ports of single IB device.
2079 * Pointer to mlx5_dev_ctx_shared object.
2082 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2087 sh->intr_handle.fd = -1;
2088 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2089 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2090 F_SETFL, flags | O_NONBLOCK);
2092 DRV_LOG(INFO, "failed to change file descriptor async event"
2095 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2096 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2097 if (rte_intr_callback_register(&sh->intr_handle,
2098 mlx5_dev_interrupt_handler, sh)) {
2099 DRV_LOG(INFO, "Fail to install the shared interrupt.");
2100 sh->intr_handle.fd = -1;
2104 #ifdef HAVE_IBV_DEVX_ASYNC
2105 sh->intr_handle_devx.fd = -1;
2107 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2108 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2110 DRV_LOG(INFO, "failed to allocate devx_comp.");
2113 flags = fcntl(devx_comp->fd, F_GETFL);
2114 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2116 DRV_LOG(INFO, "failed to change file descriptor"
2120 sh->intr_handle_devx.fd = devx_comp->fd;
2121 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2122 if (rte_intr_callback_register(&sh->intr_handle_devx,
2123 mlx5_dev_interrupt_handler_devx, sh)) {
2124 DRV_LOG(INFO, "Fail to install the devx shared"
2126 sh->intr_handle_devx.fd = -1;
2128 #endif /* HAVE_IBV_DEVX_ASYNC */
2133 * Uninstall shared asynchronous device events handler.
2134 * This function is implemented to support event sharing
2135 * between multiple ports of single IB device.
2138 * Pointer to mlx5_dev_ctx_shared object.
2141 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2143 if (sh->intr_handle.fd >= 0)
2144 mlx5_intr_callback_unregister(&sh->intr_handle,
2145 mlx5_dev_interrupt_handler, sh);
2146 #ifdef HAVE_IBV_DEVX_ASYNC
2147 if (sh->intr_handle_devx.fd >= 0)
2148 rte_intr_callback_unregister(&sh->intr_handle_devx,
2149 mlx5_dev_interrupt_handler_devx, sh);
2151 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2156 * Read statistics by a named counter.
2159 * Pointer to the private device data structure.
2160 * @param[in] ctr_name
2161 * Pointer to the name of the statistic counter to read
2163 * Pointer to read statistic value.
2165 * 0 on success and stat is valud, 1 if failed to read the value
2170 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2176 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2177 priv->sh->ibdev_path,
2180 fd = open(path, O_RDONLY);
2182 * in switchdev the file location is not per port
2183 * but rather in <ibdev_path>/hw_counters/<file_name>.
2186 MKSTR(path1, "%s/hw_counters/%s",
2187 priv->sh->ibdev_path,
2189 fd = open(path1, O_RDONLY);
2192 char buf[21] = {'\0'};
2193 ssize_t n = read(fd, buf, sizeof(buf));
2197 *stat = strtoull(buf, NULL, 10);
2207 * Set the reg_mr and dereg_mr call backs
2209 * @param reg_mr_cb[out]
2210 * Pointer to reg_mr func
2211 * @param dereg_mr_cb[out]
2212 * Pointer to dereg_mr func
2216 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2217 mlx5_dereg_mr_t *dereg_mr_cb)
2219 *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2220 *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2224 * Remove a MAC address from device
2227 * Pointer to Ethernet device structure.
2229 * MAC address index.
2232 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2234 struct mlx5_priv *priv = dev->data->dev_private;
2235 const int vf = priv->config.vf;
2238 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2239 mlx5_ifindex(dev), priv->mac_own,
2240 &dev->data->mac_addrs[index], index);
2244 * Adds a MAC address to the device
2247 * Pointer to Ethernet device structure.
2249 * MAC address to register.
2251 * MAC address index.
2254 * 0 on success, a negative errno value otherwise
2257 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2260 struct mlx5_priv *priv = dev->data->dev_private;
2261 const int vf = priv->config.vf;
2265 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2266 mlx5_ifindex(dev), priv->mac_own,
2272 * Modify a VF MAC address
2275 * Pointer to device private data.
2277 * MAC address to modify into.
2279 * Net device interface index
2284 * 0 on success, a negative errno value otherwise
2287 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2288 unsigned int iface_idx,
2289 struct rte_ether_addr *mac_addr,
2292 return mlx5_nl_vf_mac_addr_modify
2293 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2297 * Set device promiscuous mode
2300 * Pointer to Ethernet device structure.
2302 * 0 - promiscuous is disabled, otherwise - enabled
2305 * 0 on success, a negative error value otherwise
2308 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2310 struct mlx5_priv *priv = dev->data->dev_private;
2312 return mlx5_nl_promisc(priv->nl_socket_route,
2313 mlx5_ifindex(dev), !!enable);
2317 * Set device promiscuous mode
2320 * Pointer to Ethernet device structure.
2322 * 0 - all multicase is disabled, otherwise - enabled
2325 * 0 on success, a negative error value otherwise
2328 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2330 struct mlx5_priv *priv = dev->data->dev_private;
2332 return mlx5_nl_allmulti(priv->nl_socket_route,
2333 mlx5_ifindex(dev), !!enable);
2337 * Flush device MAC addresses
2340 * Pointer to Ethernet device structure.
2344 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2346 struct mlx5_priv *priv = dev->data->dev_private;
2348 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2349 dev->data->mac_addrs,
2350 MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2353 const struct eth_dev_ops mlx5_os_dev_ops = {
2354 .dev_configure = mlx5_dev_configure,
2355 .dev_start = mlx5_dev_start,
2356 .dev_stop = mlx5_dev_stop,
2357 .dev_set_link_down = mlx5_set_link_down,
2358 .dev_set_link_up = mlx5_set_link_up,
2359 .dev_close = mlx5_dev_close,
2360 .promiscuous_enable = mlx5_promiscuous_enable,
2361 .promiscuous_disable = mlx5_promiscuous_disable,
2362 .allmulticast_enable = mlx5_allmulticast_enable,
2363 .allmulticast_disable = mlx5_allmulticast_disable,
2364 .link_update = mlx5_link_update,
2365 .stats_get = mlx5_stats_get,
2366 .stats_reset = mlx5_stats_reset,
2367 .xstats_get = mlx5_xstats_get,
2368 .xstats_reset = mlx5_xstats_reset,
2369 .xstats_get_names = mlx5_xstats_get_names,
2370 .fw_version_get = mlx5_fw_version_get,
2371 .dev_infos_get = mlx5_dev_infos_get,
2372 .read_clock = mlx5_txpp_read_clock,
2373 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2374 .vlan_filter_set = mlx5_vlan_filter_set,
2375 .rx_queue_setup = mlx5_rx_queue_setup,
2376 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2377 .tx_queue_setup = mlx5_tx_queue_setup,
2378 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2379 .rx_queue_release = mlx5_rx_queue_release,
2380 .tx_queue_release = mlx5_tx_queue_release,
2381 .rx_queue_start = mlx5_rx_queue_start,
2382 .rx_queue_stop = mlx5_rx_queue_stop,
2383 .tx_queue_start = mlx5_tx_queue_start,
2384 .tx_queue_stop = mlx5_tx_queue_stop,
2385 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2386 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2387 .mac_addr_remove = mlx5_mac_addr_remove,
2388 .mac_addr_add = mlx5_mac_addr_add,
2389 .mac_addr_set = mlx5_mac_addr_set,
2390 .set_mc_addr_list = mlx5_set_mc_addr_list,
2391 .mtu_set = mlx5_dev_set_mtu,
2392 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2393 .vlan_offload_set = mlx5_vlan_offload_set,
2394 .reta_update = mlx5_dev_rss_reta_update,
2395 .reta_query = mlx5_dev_rss_reta_query,
2396 .rss_hash_update = mlx5_rss_hash_update,
2397 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2398 .filter_ctrl = mlx5_dev_filter_ctrl,
2399 .rx_descriptor_status = mlx5_rx_descriptor_status,
2400 .tx_descriptor_status = mlx5_tx_descriptor_status,
2401 .rxq_info_get = mlx5_rxq_info_get,
2402 .txq_info_get = mlx5_txq_info_get,
2403 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2404 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2405 .rx_queue_count = mlx5_rx_queue_count,
2406 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2407 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2408 .is_removed = mlx5_is_removed,
2409 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
2410 .get_module_info = mlx5_get_module_info,
2411 .get_module_eeprom = mlx5_get_module_eeprom,
2412 .hairpin_cap_get = mlx5_hairpin_cap_get,
2413 .mtr_ops_get = mlx5_flow_meter_ops_get,
2416 /* Available operations from secondary process. */
2417 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2418 .stats_get = mlx5_stats_get,
2419 .stats_reset = mlx5_stats_reset,
2420 .xstats_get = mlx5_xstats_get,
2421 .xstats_reset = mlx5_xstats_reset,
2422 .xstats_get_names = mlx5_xstats_get_names,
2423 .fw_version_get = mlx5_fw_version_get,
2424 .dev_infos_get = mlx5_dev_infos_get,
2425 .read_clock = mlx5_txpp_read_clock,
2426 .rx_queue_start = mlx5_rx_queue_start,
2427 .rx_queue_stop = mlx5_rx_queue_stop,
2428 .tx_queue_start = mlx5_tx_queue_start,
2429 .tx_queue_stop = mlx5_tx_queue_stop,
2430 .rx_descriptor_status = mlx5_rx_descriptor_status,
2431 .tx_descriptor_status = mlx5_tx_descriptor_status,
2432 .rxq_info_get = mlx5_rxq_info_get,
2433 .txq_info_get = mlx5_txq_info_get,
2434 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2435 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2436 .get_module_info = mlx5_get_module_info,
2437 .get_module_eeprom = mlx5_get_module_eeprom,
2440 /* Available operations in flow isolated mode. */
2441 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2442 .dev_configure = mlx5_dev_configure,
2443 .dev_start = mlx5_dev_start,
2444 .dev_stop = mlx5_dev_stop,
2445 .dev_set_link_down = mlx5_set_link_down,
2446 .dev_set_link_up = mlx5_set_link_up,
2447 .dev_close = mlx5_dev_close,
2448 .promiscuous_enable = mlx5_promiscuous_enable,
2449 .promiscuous_disable = mlx5_promiscuous_disable,
2450 .allmulticast_enable = mlx5_allmulticast_enable,
2451 .allmulticast_disable = mlx5_allmulticast_disable,
2452 .link_update = mlx5_link_update,
2453 .stats_get = mlx5_stats_get,
2454 .stats_reset = mlx5_stats_reset,
2455 .xstats_get = mlx5_xstats_get,
2456 .xstats_reset = mlx5_xstats_reset,
2457 .xstats_get_names = mlx5_xstats_get_names,
2458 .fw_version_get = mlx5_fw_version_get,
2459 .dev_infos_get = mlx5_dev_infos_get,
2460 .read_clock = mlx5_txpp_read_clock,
2461 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2462 .vlan_filter_set = mlx5_vlan_filter_set,
2463 .rx_queue_setup = mlx5_rx_queue_setup,
2464 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2465 .tx_queue_setup = mlx5_tx_queue_setup,
2466 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2467 .rx_queue_release = mlx5_rx_queue_release,
2468 .tx_queue_release = mlx5_tx_queue_release,
2469 .rx_queue_start = mlx5_rx_queue_start,
2470 .rx_queue_stop = mlx5_rx_queue_stop,
2471 .tx_queue_start = mlx5_tx_queue_start,
2472 .tx_queue_stop = mlx5_tx_queue_stop,
2473 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2474 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2475 .mac_addr_remove = mlx5_mac_addr_remove,
2476 .mac_addr_add = mlx5_mac_addr_add,
2477 .mac_addr_set = mlx5_mac_addr_set,
2478 .set_mc_addr_list = mlx5_set_mc_addr_list,
2479 .mtu_set = mlx5_dev_set_mtu,
2480 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2481 .vlan_offload_set = mlx5_vlan_offload_set,
2482 .filter_ctrl = mlx5_dev_filter_ctrl,
2483 .rx_descriptor_status = mlx5_rx_descriptor_status,
2484 .tx_descriptor_status = mlx5_tx_descriptor_status,
2485 .rxq_info_get = mlx5_rxq_info_get,
2486 .txq_info_get = mlx5_txq_info_get,
2487 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2488 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2489 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2490 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2491 .is_removed = mlx5_is_removed,
2492 .get_module_info = mlx5_get_module_info,
2493 .get_module_eeprom = mlx5_get_module_eeprom,
2494 .hairpin_cap_get = mlx5_hairpin_cap_get,
2495 .mtr_ops_get = mlx5_flow_meter_ops_get,