1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
18 #include <rte_malloc.h>
19 #include <rte_ethdev_driver.h>
20 #include <rte_ethdev_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_common.h>
24 #include <rte_kvargs.h>
25 #include <rte_rwlock.h>
26 #include <rte_spinlock.h>
27 #include <rte_string_fns.h>
28 #include <rte_alarm.h>
29 #include <rte_eal_paging.h>
31 #include <mlx5_glue.h>
32 #include <mlx5_devx_cmds.h>
33 #include <mlx5_common.h>
34 #include <mlx5_common_mp.h>
35 #include <mlx5_common_mr.h>
36 #include <mlx5_malloc.h>
38 #include "mlx5_defs.h"
40 #include "mlx5_common_os.h"
41 #include "mlx5_utils.h"
42 #include "mlx5_rxtx.h"
43 #include "mlx5_autoconf.h"
45 #include "mlx5_flow.h"
46 #include "rte_pmd_mlx5.h"
47 #include "mlx5_verbs.h"
49 #include "mlx5_devx.h"
51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
53 #ifndef HAVE_IBV_MLX5_MOD_MPW
54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
64 /* Spinlock for mlx5_shared_data allocation. */
65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
67 /* Process local data for secondary processes. */
68 static struct mlx5_local_data mlx5_local_data;
71 * Set the completion channel file descriptor interrupt as non-blocking.
74 * Pointer to RQ channel object, which includes the channel fd
77 * The file descriptor (representing the intetrrupt) used in this channel.
80 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
83 mlx5_os_set_nonblock_channel_fd(int fd)
87 flags = fcntl(fd, F_GETFL);
88 return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
92 * Get mlx5 device attributes. The glue function query_device_ex() is called
93 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
94 * device attributes from the glue out parameter.
97 * Pointer to ibv context.
100 * Pointer to mlx5 device attributes.
103 * 0 on success, non zero error number otherwise
106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
109 struct ibv_device_attr_ex attr_ex;
110 memset(device_attr, 0, sizeof(*device_attr));
111 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
115 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
116 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
117 device_attr->max_sge = attr_ex.orig_attr.max_sge;
118 device_attr->max_cq = attr_ex.orig_attr.max_cq;
119 device_attr->max_qp = attr_ex.orig_attr.max_qp;
120 device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
121 device_attr->max_rwq_indirection_table_size =
122 attr_ex.rss_caps.max_rwq_indirection_table_size;
123 device_attr->max_tso = attr_ex.tso_caps.max_tso;
124 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
126 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
127 err = mlx5_glue->dv_query_device(ctx, &dv_attr);
131 device_attr->flags = dv_attr.flags;
132 device_attr->comp_mask = dv_attr.comp_mask;
133 #ifdef HAVE_IBV_MLX5_MOD_SWP
134 device_attr->sw_parsing_offloads =
135 dv_attr.sw_parsing_caps.sw_parsing_offloads;
137 device_attr->min_single_stride_log_num_of_bytes =
138 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
139 device_attr->max_single_stride_log_num_of_bytes =
140 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
141 device_attr->min_single_wqe_log_num_of_strides =
142 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
143 device_attr->max_single_wqe_log_num_of_strides =
144 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
145 device_attr->stride_supported_qpts =
146 dv_attr.striding_rq_caps.supported_qpts;
147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
148 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
155 * Verbs callback to allocate a memory. This function should allocate the space
156 * according to the size provided residing inside a huge page.
157 * Please note that all allocation must respect the alignment from libmlx5
158 * (i.e. currently rte_mem_page_size()).
161 * The size in bytes of the memory to allocate.
163 * A pointer to the callback data.
166 * Allocated buffer, NULL otherwise and rte_errno is set.
169 mlx5_alloc_verbs_buf(size_t size, void *data)
171 struct mlx5_priv *priv = data;
173 unsigned int socket = SOCKET_ID_ANY;
174 size_t alignment = rte_mem_page_size();
175 if (alignment == (size_t)-1) {
176 DRV_LOG(ERR, "Failed to get mem page size");
181 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
182 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
184 socket = ctrl->socket;
185 } else if (priv->verbs_alloc_ctx.type ==
186 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
187 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
189 socket = ctrl->socket;
191 MLX5_ASSERT(data != NULL);
192 ret = mlx5_malloc(0, size, alignment, socket);
199 * Verbs callback to free a memory.
202 * A pointer to the memory to free.
204 * A pointer to the callback data.
207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
209 MLX5_ASSERT(data != NULL);
214 * Initialize DR related data within private structure.
215 * Routine checks the reference counter and does actual
216 * resources creation/initialization only if counter is zero.
219 * Pointer to the private device data structure.
222 * Zero on success, positive error code otherwise.
225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
227 struct mlx5_dev_ctx_shared *sh = priv->sh;
228 char s[MLX5_HLIST_NAMESIZE] __rte_unused;
231 MLX5_ASSERT(sh && sh->refcnt);
234 err = mlx5_alloc_table_hash_list(priv);
237 /* The resources below are only valid with DV support. */
238 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
239 /* Init port id action cache list. */
240 snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
241 mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
242 flow_dv_port_id_create_cb,
243 flow_dv_port_id_match_cb,
244 flow_dv_port_id_remove_cb);
245 /* Init push vlan action cache list. */
246 snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
247 mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
248 flow_dv_push_vlan_create_cb,
249 flow_dv_push_vlan_match_cb,
250 flow_dv_push_vlan_remove_cb);
251 /* Init sample action cache list. */
252 snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
253 mlx5_cache_list_init(&sh->sample_action_list, s, 0,
254 &rte_eth_devices[priv->dev_data->port_id],
255 flow_dv_sample_create_cb,
256 flow_dv_sample_match_cb,
257 flow_dv_sample_remove_cb);
258 /* Init dest array action cache list. */
259 snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
260 mlx5_cache_list_init(&sh->dest_array_list, s, 0,
261 &rte_eth_devices[priv->dev_data->port_id],
262 flow_dv_dest_array_create_cb,
263 flow_dv_dest_array_match_cb,
264 flow_dv_dest_array_remove_cb);
265 /* Create tags hash list table. */
266 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
267 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
268 MLX5_HLIST_WRITE_MOST,
269 flow_dv_tag_create_cb, NULL,
270 flow_dv_tag_remove_cb);
271 if (!sh->tag_table) {
272 DRV_LOG(ERR, "tags with hash creation failed.");
276 sh->tag_table->ctx = sh;
277 snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
278 sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
279 0, MLX5_HLIST_WRITE_MOST |
280 MLX5_HLIST_DIRECT_KEY,
281 flow_dv_modify_create_cb,
282 flow_dv_modify_match_cb,
283 flow_dv_modify_remove_cb);
284 if (!sh->modify_cmds) {
285 DRV_LOG(ERR, "hdr modify hash creation failed");
289 sh->modify_cmds->ctx = sh;
290 snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
291 sh->encaps_decaps = mlx5_hlist_create(s,
292 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
293 0, MLX5_HLIST_DIRECT_KEY |
294 MLX5_HLIST_WRITE_MOST,
295 flow_dv_encap_decap_create_cb,
296 flow_dv_encap_decap_match_cb,
297 flow_dv_encap_decap_remove_cb);
298 if (!sh->encaps_decaps) {
299 DRV_LOG(ERR, "encap decap hash creation failed");
303 sh->encaps_decaps->ctx = sh;
305 #ifdef HAVE_MLX5DV_DR
308 /* Reference counter is zero, we should initialize structures. */
309 domain = mlx5_glue->dr_create_domain(sh->ctx,
310 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
312 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
316 sh->rx_domain = domain;
317 domain = mlx5_glue->dr_create_domain(sh->ctx,
318 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
320 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
324 sh->tx_domain = domain;
325 #ifdef HAVE_MLX5DV_DR_ESWITCH
326 if (priv->config.dv_esw_en) {
327 domain = mlx5_glue->dr_create_domain
328 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
330 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
334 sh->fdb_domain = domain;
335 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
339 err = mlx5_alloc_tunnel_hub(sh);
341 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
344 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
345 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
346 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
348 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
350 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
351 #endif /* HAVE_MLX5DV_DR */
352 sh->default_miss_action =
353 mlx5_glue->dr_create_flow_action_default_miss();
354 if (!sh->default_miss_action)
355 DRV_LOG(WARNING, "Default miss action is not supported.");
358 /* Rollback the created objects. */
360 mlx5_glue->dr_destroy_domain(sh->rx_domain);
361 sh->rx_domain = NULL;
364 mlx5_glue->dr_destroy_domain(sh->tx_domain);
365 sh->tx_domain = NULL;
367 if (sh->fdb_domain) {
368 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
369 sh->fdb_domain = NULL;
371 if (sh->esw_drop_action) {
372 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
373 sh->esw_drop_action = NULL;
375 if (sh->pop_vlan_action) {
376 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
377 sh->pop_vlan_action = NULL;
379 if (sh->encaps_decaps) {
380 mlx5_hlist_destroy(sh->encaps_decaps);
381 sh->encaps_decaps = NULL;
383 if (sh->modify_cmds) {
384 mlx5_hlist_destroy(sh->modify_cmds);
385 sh->modify_cmds = NULL;
388 /* tags should be destroyed with flow before. */
389 mlx5_hlist_destroy(sh->tag_table);
390 sh->tag_table = NULL;
392 if (sh->tunnel_hub) {
393 mlx5_release_tunnel_hub(sh, priv->dev_port);
394 sh->tunnel_hub = NULL;
396 mlx5_free_table_hash_list(priv);
401 * Destroy DR related data within private structure.
404 * Pointer to the private device data structure.
407 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
409 struct mlx5_dev_ctx_shared *sh = priv->sh;
411 MLX5_ASSERT(sh && sh->refcnt);
414 #ifdef HAVE_MLX5DV_DR
416 mlx5_glue->dr_destroy_domain(sh->rx_domain);
417 sh->rx_domain = NULL;
420 mlx5_glue->dr_destroy_domain(sh->tx_domain);
421 sh->tx_domain = NULL;
423 #ifdef HAVE_MLX5DV_DR_ESWITCH
424 if (sh->fdb_domain) {
425 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
426 sh->fdb_domain = NULL;
428 if (sh->esw_drop_action) {
429 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
430 sh->esw_drop_action = NULL;
433 if (sh->pop_vlan_action) {
434 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
435 sh->pop_vlan_action = NULL;
437 #endif /* HAVE_MLX5DV_DR */
438 if (sh->default_miss_action)
439 mlx5_glue->destroy_flow_action
440 (sh->default_miss_action);
441 if (sh->encaps_decaps) {
442 mlx5_hlist_destroy(sh->encaps_decaps);
443 sh->encaps_decaps = NULL;
445 if (sh->modify_cmds) {
446 mlx5_hlist_destroy(sh->modify_cmds);
447 sh->modify_cmds = NULL;
450 /* tags should be destroyed with flow before. */
451 mlx5_hlist_destroy(sh->tag_table);
452 sh->tag_table = NULL;
454 if (sh->tunnel_hub) {
455 mlx5_release_tunnel_hub(sh, priv->dev_port);
456 sh->tunnel_hub = NULL;
458 mlx5_cache_list_destroy(&sh->port_id_action_list);
459 mlx5_cache_list_destroy(&sh->push_vlan_action_list);
460 mlx5_free_table_hash_list(priv);
464 * Initialize shared data between primary and secondary process.
466 * A memzone is reserved by primary process and secondary processes attach to
470 * 0 on success, a negative errno value otherwise and rte_errno is set.
473 mlx5_init_shared_data(void)
475 const struct rte_memzone *mz;
478 rte_spinlock_lock(&mlx5_shared_data_lock);
479 if (mlx5_shared_data == NULL) {
480 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
481 /* Allocate shared memory. */
482 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
483 sizeof(*mlx5_shared_data),
487 "Cannot allocate mlx5 shared data");
491 mlx5_shared_data = mz->addr;
492 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
493 rte_spinlock_init(&mlx5_shared_data->lock);
495 /* Lookup allocated shared memory. */
496 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
499 "Cannot attach mlx5 shared data");
503 mlx5_shared_data = mz->addr;
504 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
508 rte_spinlock_unlock(&mlx5_shared_data_lock);
513 * PMD global initialization.
515 * Independent from individual device, this function initializes global
516 * per-PMD data structures distinguishing primary and secondary processes.
517 * Hence, each initialization is called once per a process.
520 * 0 on success, a negative errno value otherwise and rte_errno is set.
525 struct mlx5_shared_data *sd;
526 struct mlx5_local_data *ld = &mlx5_local_data;
529 if (mlx5_init_shared_data())
531 sd = mlx5_shared_data;
533 rte_spinlock_lock(&sd->lock);
534 switch (rte_eal_process_type()) {
535 case RTE_PROC_PRIMARY:
538 LIST_INIT(&sd->mem_event_cb_list);
539 rte_rwlock_init(&sd->mem_event_rwlock);
540 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
541 mlx5_mr_mem_event_cb, NULL);
542 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
543 mlx5_mp_os_primary_handle);
546 sd->init_done = true;
548 case RTE_PROC_SECONDARY:
551 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
552 mlx5_mp_os_secondary_handle);
556 ld->init_done = true;
562 rte_spinlock_unlock(&sd->lock);
567 * Create the Tx queue DevX/Verbs object.
570 * Pointer to Ethernet device.
572 * Queue index in DPDK Tx queue array.
575 * 0 on success, a negative errno value otherwise and rte_errno is set.
578 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
580 struct mlx5_priv *priv = dev->data->dev_private;
581 struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
582 struct mlx5_txq_ctrl *txq_ctrl =
583 container_of(txq_data, struct mlx5_txq_ctrl, txq);
585 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
586 return mlx5_txq_devx_obj_new(dev, idx);
587 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
588 if (!priv->config.dv_esw_en)
589 return mlx5_txq_devx_obj_new(dev, idx);
591 return mlx5_txq_ibv_obj_new(dev, idx);
595 * Release an Tx DevX/verbs queue object.
598 * DevX/Verbs Tx queue object.
601 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
603 if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
604 mlx5_txq_devx_obj_release(txq_obj);
607 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
608 if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
609 mlx5_txq_devx_obj_release(txq_obj);
613 mlx5_txq_ibv_obj_release(txq_obj);
617 * DV flow counter mode detect and config.
620 * Pointer to rte_eth_dev structure.
624 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
626 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
627 struct mlx5_priv *priv = dev->data->dev_private;
628 struct mlx5_dev_ctx_shared *sh = priv->sh;
631 #ifndef HAVE_IBV_DEVX_ASYNC
635 if (!priv->config.devx || !priv->config.dv_flow_en ||
636 !priv->config.hca_attr.flow_counters_dump ||
637 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
638 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
642 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
643 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
644 priv->config.hca_attr.flow_counters_dump,
645 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
646 /* Initialize fallback mode only on the port initializes sh. */
648 sh->cmng.counter_fallback = fallback;
649 else if (fallback != sh->cmng.counter_fallback)
650 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
651 "with others:%d.", PORT_ID(priv), fallback);
656 * Spawn an Ethernet device from Verbs information.
659 * Backing DPDK device.
661 * Verbs device parameters (name, port, switch_info) to spawn.
663 * Device configuration parameters.
666 * A valid Ethernet device object on success, NULL otherwise and rte_errno
667 * is set. The following errors are defined:
669 * EBUSY: device is not supposed to be spawned.
670 * EEXIST: device is already spawned
672 static struct rte_eth_dev *
673 mlx5_dev_spawn(struct rte_device *dpdk_dev,
674 struct mlx5_dev_spawn_data *spawn,
675 struct mlx5_dev_config *config)
677 const struct mlx5_switch_info *switch_info = &spawn->info;
678 struct mlx5_dev_ctx_shared *sh = NULL;
679 struct ibv_port_attr port_attr;
680 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
681 struct rte_eth_dev *eth_dev = NULL;
682 struct mlx5_priv *priv = NULL;
684 unsigned int hw_padding = 0;
686 unsigned int cqe_comp;
687 unsigned int cqe_pad = 0;
688 unsigned int tunnel_en = 0;
689 unsigned int mpls_en = 0;
690 unsigned int swp = 0;
691 unsigned int mprq = 0;
692 unsigned int mprq_min_stride_size_n = 0;
693 unsigned int mprq_max_stride_size_n = 0;
694 unsigned int mprq_min_stride_num_n = 0;
695 unsigned int mprq_max_stride_num_n = 0;
696 struct rte_ether_addr mac;
697 char name[RTE_ETH_NAME_MAX_LEN];
698 int own_domain_id = 0;
701 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
702 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
705 /* Determine if this port representor is supposed to be spawned. */
706 if (switch_info->representor && dpdk_dev->devargs) {
707 struct rte_eth_devargs eth_da;
709 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
712 DRV_LOG(ERR, "failed to process device arguments: %s",
713 strerror(rte_errno));
716 for (i = 0; i < eth_da.nb_representor_ports; ++i)
717 if (eth_da.representor_ports[i] ==
718 (uint16_t)switch_info->port_name)
720 if (i == eth_da.nb_representor_ports) {
725 /* Build device name. */
726 if (spawn->pf_bond < 0) {
728 if (!switch_info->representor)
729 strlcpy(name, dpdk_dev->name, sizeof(name));
731 snprintf(name, sizeof(name), "%s_representor_%u",
732 dpdk_dev->name, switch_info->port_name);
734 /* Bonding device. */
735 if (!switch_info->representor)
736 snprintf(name, sizeof(name), "%s_%s",
738 mlx5_os_get_dev_device_name(spawn->phys_dev));
740 snprintf(name, sizeof(name), "%s_%s_representor_%u",
742 mlx5_os_get_dev_device_name(spawn->phys_dev),
743 switch_info->port_name);
745 /* check if the device is already spawned */
746 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
750 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
751 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
752 struct mlx5_mp_id mp_id;
754 eth_dev = rte_eth_dev_attach_secondary(name);
755 if (eth_dev == NULL) {
756 DRV_LOG(ERR, "can not attach rte ethdev");
760 eth_dev->device = dpdk_dev;
761 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
762 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
763 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
764 err = mlx5_proc_priv_init(eth_dev);
767 mp_id.port_id = eth_dev->data->port_id;
768 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
769 /* Receive command fd from primary process */
770 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
773 /* Remap UAR for Tx queues. */
774 err = mlx5_tx_uar_init_secondary(eth_dev, err);
778 * Ethdev pointer is still required as input since
779 * the primary device is not accessible from the
782 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
783 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
786 mlx5_dev_close(eth_dev);
790 * Some parameters ("tx_db_nc" in particularly) are needed in
791 * advance to create dv/verbs device context. We proceed the
792 * devargs here to get ones, and later proceed devargs again
793 * to override some hardware settings.
795 err = mlx5_args(config, dpdk_dev->devargs);
798 DRV_LOG(ERR, "failed to process device arguments: %s",
799 strerror(rte_errno));
802 if (config->dv_miss_info) {
803 if (switch_info->master || switch_info->representor)
804 config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
806 mlx5_malloc_mem_select(config->sys_mem_en);
807 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
810 config->devx = sh->devx;
811 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
812 config->dest_tir = 1;
814 #ifdef HAVE_IBV_MLX5_MOD_SWP
815 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
818 * Multi-packet send is supported by ConnectX-4 Lx PF as well
819 * as all ConnectX-5 devices.
821 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
822 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
824 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
825 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
827 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
828 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
829 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
830 DRV_LOG(DEBUG, "enhanced MPW is supported");
831 mps = MLX5_MPW_ENHANCED;
833 DRV_LOG(DEBUG, "MPW is supported");
837 DRV_LOG(DEBUG, "MPW isn't supported");
838 mps = MLX5_MPW_DISABLED;
840 #ifdef HAVE_IBV_MLX5_MOD_SWP
841 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
842 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
843 DRV_LOG(DEBUG, "SWP support: %u", swp);
846 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
847 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
848 struct mlx5dv_striding_rq_caps mprq_caps =
849 dv_attr.striding_rq_caps;
851 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
852 mprq_caps.min_single_stride_log_num_of_bytes);
853 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
854 mprq_caps.max_single_stride_log_num_of_bytes);
855 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
856 mprq_caps.min_single_wqe_log_num_of_strides);
857 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
858 mprq_caps.max_single_wqe_log_num_of_strides);
859 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
860 mprq_caps.supported_qpts);
861 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
863 mprq_min_stride_size_n =
864 mprq_caps.min_single_stride_log_num_of_bytes;
865 mprq_max_stride_size_n =
866 mprq_caps.max_single_stride_log_num_of_bytes;
867 mprq_min_stride_num_n =
868 mprq_caps.min_single_wqe_log_num_of_strides;
869 mprq_max_stride_num_n =
870 mprq_caps.max_single_wqe_log_num_of_strides;
873 if (RTE_CACHE_LINE_SIZE == 128 &&
874 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
878 config->cqe_comp = cqe_comp;
879 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
880 /* Whether device supports 128B Rx CQE padding. */
881 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
882 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
884 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
885 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
886 tunnel_en = ((dv_attr.tunnel_offloads_caps &
887 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
888 (dv_attr.tunnel_offloads_caps &
889 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
890 (dv_attr.tunnel_offloads_caps &
891 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
893 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
894 tunnel_en ? "" : "not ");
897 "tunnel offloading disabled due to old OFED/rdma-core version");
899 config->tunnel_en = tunnel_en;
900 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
901 mpls_en = ((dv_attr.tunnel_offloads_caps &
902 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
903 (dv_attr.tunnel_offloads_caps &
904 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
905 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
906 mpls_en ? "" : "not ");
908 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
909 " old OFED/rdma-core version or firmware configuration");
911 config->mpls_en = mpls_en;
912 /* Check port status. */
913 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
915 DRV_LOG(ERR, "port query failed: %s", strerror(err));
918 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
919 DRV_LOG(ERR, "port is not configured in Ethernet mode");
923 if (port_attr.state != IBV_PORT_ACTIVE)
924 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
925 mlx5_glue->port_state_str(port_attr.state),
927 /* Allocate private eth device data. */
928 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
930 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
932 DRV_LOG(ERR, "priv allocation failure");
937 priv->dev_port = spawn->phys_port;
938 priv->pci_dev = spawn->pci_dev;
939 priv->mtu = RTE_ETHER_MTU;
940 priv->mp_id.port_id = port_id;
941 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
942 /* Some internal functions rely on Netlink sockets, open them now. */
943 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
944 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
945 priv->representor = !!switch_info->representor;
946 priv->master = !!switch_info->master;
947 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
948 priv->vport_meta_tag = 0;
949 priv->vport_meta_mask = 0;
950 priv->pf_bond = spawn->pf_bond;
951 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
953 * The DevX port query API is implemented. E-Switch may use
954 * either vport or reg_c[0] metadata register to match on
955 * vport index. The engaged part of metadata register is
958 if (switch_info->representor || switch_info->master) {
959 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
960 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
961 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
965 "can't query devx port %d on device %s",
967 mlx5_os_get_dev_device_name(spawn->phys_dev));
968 devx_port.comp_mask = 0;
971 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
972 priv->vport_meta_tag = devx_port.reg_c_0.value;
973 priv->vport_meta_mask = devx_port.reg_c_0.mask;
974 if (!priv->vport_meta_mask) {
975 DRV_LOG(ERR, "vport zero mask for port %d"
976 " on bonding device %s",
978 mlx5_os_get_dev_device_name
983 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
984 DRV_LOG(ERR, "invalid vport tag for port %d"
985 " on bonding device %s",
987 mlx5_os_get_dev_device_name
993 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
994 priv->vport_id = devx_port.vport_num;
995 } else if (spawn->pf_bond >= 0) {
996 DRV_LOG(ERR, "can't deduce vport index for port %d"
997 " on bonding device %s",
999 mlx5_os_get_dev_device_name(spawn->phys_dev));
1003 /* Suppose vport index in compatible way. */
1004 priv->vport_id = switch_info->representor ?
1005 switch_info->port_name + 1 : -1;
1009 * Kernel/rdma_core support single E-Switch per PF configurations
1010 * only and vport_id field contains the vport index for
1011 * associated VF, which is deduced from representor port name.
1012 * For example, let's have the IB device port 10, it has
1013 * attached network device eth0, which has port name attribute
1014 * pf0vf2, we can deduce the VF number as 2, and set vport index
1015 * as 3 (2+1). This assigning schema should be changed if the
1016 * multiple E-Switch instances per PF configurations or/and PCI
1017 * subfunctions are added.
1019 priv->vport_id = switch_info->representor ?
1020 switch_info->port_name + 1 : -1;
1022 /* representor_id field keeps the unmodified VF index. */
1023 priv->representor_id = switch_info->representor ?
1024 switch_info->port_name : -1;
1026 * Look for sibling devices in order to reuse their switch domain
1027 * if any, otherwise allocate one.
1029 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1030 const struct mlx5_priv *opriv =
1031 rte_eth_devices[port_id].data->dev_private;
1034 opriv->sh != priv->sh ||
1036 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1038 priv->domain_id = opriv->domain_id;
1041 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1042 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1045 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1046 strerror(rte_errno));
1051 /* Override some values set by hardware configuration. */
1052 mlx5_args(config, dpdk_dev->devargs);
1053 err = mlx5_dev_check_sibling_config(priv, config);
1056 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1057 IBV_DEVICE_RAW_IP_CSUM);
1058 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1059 (config->hw_csum ? "" : "not "));
1060 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1061 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1062 DRV_LOG(DEBUG, "counters are not supported");
1064 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1065 if (config->dv_flow_en) {
1066 DRV_LOG(WARNING, "DV flow is not supported");
1067 config->dv_flow_en = 0;
1070 config->ind_table_max_size =
1071 sh->device_attr.max_rwq_indirection_table_size;
1073 * Remove this check once DPDK supports larger/variable
1074 * indirection tables.
1076 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1077 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1078 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1079 config->ind_table_max_size);
1080 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1081 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1082 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1083 (config->hw_vlan_strip ? "" : "not "));
1084 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1085 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1086 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1087 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1088 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1089 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1090 IBV_DEVICE_PCI_WRITE_END_PADDING);
1092 if (config->hw_padding && !hw_padding) {
1093 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1094 config->hw_padding = 0;
1095 } else if (config->hw_padding) {
1096 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1098 config->tso = (sh->device_attr.max_tso > 0 &&
1099 (sh->device_attr.tso_supported_qpts &
1100 (1 << IBV_QPT_RAW_PACKET)));
1102 config->tso_max_payload_sz = sh->device_attr.max_tso;
1104 * MPW is disabled by default, while the Enhanced MPW is enabled
1107 if (config->mps == MLX5_ARG_UNSET)
1108 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1111 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1112 DRV_LOG(INFO, "%sMPS is %s",
1113 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1114 config->mps == MLX5_MPW ? "legacy " : "",
1115 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1116 if (config->cqe_comp && !cqe_comp) {
1117 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1118 config->cqe_comp = 0;
1120 if (config->cqe_pad && !cqe_pad) {
1121 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1122 config->cqe_pad = 0;
1123 } else if (config->cqe_pad) {
1124 DRV_LOG(INFO, "Rx CQE padding is enabled");
1127 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1132 #ifdef HAVE_MLX5DV_DR_ACTION_FLOW_HIT
1133 if (config->hca_attr.flow_hit_aso) {
1134 sh->flow_hit_aso_en = 1;
1135 err = mlx5_flow_aso_age_mng_init(sh);
1140 DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1142 #endif /* HAVE_MLX5DV_DR_ACTION_FLOW_HIT */
1143 /* Check relax ordering support. */
1144 if (!haswell_broadwell_cpu) {
1145 sh->cmng.relaxed_ordering_write =
1146 config->hca_attr.relaxed_ordering_write;
1147 sh->cmng.relaxed_ordering_read =
1148 config->hca_attr.relaxed_ordering_read;
1150 sh->cmng.relaxed_ordering_read = 0;
1151 sh->cmng.relaxed_ordering_write = 0;
1153 /* Check for LRO support. */
1154 if (config->dest_tir && config->hca_attr.lro_cap &&
1155 config->dv_flow_en) {
1156 /* TBD check tunnel lro caps. */
1157 config->lro.supported = config->hca_attr.lro_cap;
1158 DRV_LOG(DEBUG, "Device supports LRO");
1160 * If LRO timeout is not configured by application,
1161 * use the minimal supported value.
1163 if (!config->lro.timeout)
1164 config->lro.timeout =
1165 config->hca_attr.lro_timer_supported_periods[0];
1166 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1167 config->lro.timeout);
1168 DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1169 "required for coalescing is %d bytes",
1170 config->hca_attr.lro_min_mss_size);
1172 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1173 if (config->hca_attr.qos.sup &&
1174 config->hca_attr.qos.srtcm_sup &&
1175 config->dv_flow_en) {
1176 uint8_t reg_c_mask =
1177 config->hca_attr.qos.flow_meter_reg_c_ids;
1179 * Meter needs two REG_C's for color match and pre-sfx
1180 * flow match. Here get the REG_C for color match.
1181 * REG_C_0 and REG_C_1 is reserved for metadata feature.
1184 if (__builtin_popcount(reg_c_mask) < 1) {
1186 DRV_LOG(WARNING, "No available register for"
1189 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1192 priv->mtr_reg_share =
1193 config->hca_attr.qos.flow_meter_reg_share;
1194 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1195 priv->mtr_color_reg);
1199 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1200 if (config->hca_attr.log_max_ft_sampler_num > 0 &&
1201 config->dv_flow_en) {
1202 priv->sampler_en = 1;
1203 DRV_LOG(DEBUG, "The Sampler enabled!\n");
1205 priv->sampler_en = 0;
1206 if (!config->hca_attr.log_max_ft_sampler_num)
1207 DRV_LOG(WARNING, "No available register for"
1210 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1214 if (config->tx_pp) {
1215 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1216 config->hca_attr.dev_freq_khz);
1217 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1218 config->hca_attr.qos.packet_pacing ? "" : "not ");
1219 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1220 config->hca_attr.cross_channel ? "" : "not ");
1221 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1222 config->hca_attr.wqe_index_ignore ? "" : "not ");
1223 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1224 config->hca_attr.non_wire_sq ? "" : "not ");
1225 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1226 config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1227 config->hca_attr.log_max_static_sq_wq);
1228 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1229 config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1230 if (!config->devx) {
1231 DRV_LOG(ERR, "DevX is required for packet pacing");
1235 if (!config->hca_attr.qos.packet_pacing) {
1236 DRV_LOG(ERR, "Packet pacing is not supported");
1240 if (!config->hca_attr.cross_channel) {
1241 DRV_LOG(ERR, "Cross channel operations are"
1242 " required for packet pacing");
1246 if (!config->hca_attr.wqe_index_ignore) {
1247 DRV_LOG(ERR, "WQE index ignore feature is"
1248 " required for packet pacing");
1252 if (!config->hca_attr.non_wire_sq) {
1253 DRV_LOG(ERR, "Non-wire SQ feature is"
1254 " required for packet pacing");
1258 if (!config->hca_attr.log_max_static_sq_wq) {
1259 DRV_LOG(ERR, "Static WQE SQ feature is"
1260 " required for packet pacing");
1264 if (!config->hca_attr.qos.wqe_rate_pp) {
1265 DRV_LOG(ERR, "WQE rate mode is required"
1266 " for packet pacing");
1270 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1271 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1272 " can't create queues for packet pacing");
1278 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1280 err = config->hca_attr.access_register_user ?
1281 mlx5_devx_cmd_register_read
1282 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1283 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1287 /* MTUTC register is read successfully. */
1288 ts_mode = MLX5_GET(register_mtutc, reg,
1290 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1291 config->rt_timestamp = 1;
1293 /* Kernel does not support register reading. */
1294 if (config->hca_attr.dev_freq_khz ==
1295 (NS_PER_S / MS_PER_S))
1296 config->rt_timestamp = 1;
1300 * If HW has bug working with tunnel packet decapsulation and
1301 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1302 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1304 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1305 config->hw_fcs_strip = 0;
1306 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1307 (config->hw_fcs_strip ? "" : "not "));
1308 if (config->mprq.enabled && mprq) {
1309 if (config->mprq.stride_num_n &&
1310 (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1311 config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1312 config->mprq.stride_num_n =
1313 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1314 mprq_min_stride_num_n),
1315 mprq_max_stride_num_n);
1317 "the number of strides"
1318 " for Multi-Packet RQ is out of range,"
1319 " setting default value (%u)",
1320 1 << config->mprq.stride_num_n);
1322 if (config->mprq.stride_size_n &&
1323 (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1324 config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1325 config->mprq.stride_size_n =
1326 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1327 mprq_min_stride_size_n),
1328 mprq_max_stride_size_n);
1330 "the size of a stride"
1331 " for Multi-Packet RQ is out of range,"
1332 " setting default value (%u)",
1333 1 << config->mprq.stride_size_n);
1335 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1336 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1337 } else if (config->mprq.enabled && !mprq) {
1338 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1339 config->mprq.enabled = 0;
1341 if (config->max_dump_files_num == 0)
1342 config->max_dump_files_num = 128;
1343 eth_dev = rte_eth_dev_allocate(name);
1344 if (eth_dev == NULL) {
1345 DRV_LOG(ERR, "can not allocate rte ethdev");
1349 if (priv->representor) {
1350 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1351 eth_dev->data->representor_id = priv->representor_id;
1354 * Store associated network device interface index. This index
1355 * is permanent throughout the lifetime of device. So, we may store
1356 * the ifindex here and use the cached value further.
1358 MLX5_ASSERT(spawn->ifindex);
1359 priv->if_index = spawn->ifindex;
1360 if (priv->pf_bond >= 0 && priv->master) {
1361 /* Get bond interface info */
1362 err = mlx5_sysfs_bond_info(priv->if_index,
1363 &priv->bond_ifindex,
1366 DRV_LOG(ERR, "unable to get bond info: %s",
1367 strerror(rte_errno));
1369 DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1370 priv->if_index, priv->bond_ifindex,
1373 eth_dev->data->dev_private = priv;
1374 priv->dev_data = eth_dev->data;
1375 eth_dev->data->mac_addrs = priv->mac;
1376 eth_dev->device = dpdk_dev;
1377 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1378 /* Configure the first MAC address by default. */
1379 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1381 "port %u cannot get MAC address, is mlx5_en"
1382 " loaded? (errno: %s)",
1383 eth_dev->data->port_id, strerror(rte_errno));
1388 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1389 eth_dev->data->port_id,
1390 mac.addr_bytes[0], mac.addr_bytes[1],
1391 mac.addr_bytes[2], mac.addr_bytes[3],
1392 mac.addr_bytes[4], mac.addr_bytes[5]);
1393 #ifdef RTE_LIBRTE_MLX5_DEBUG
1395 char ifname[IF_NAMESIZE];
1397 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1398 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1399 eth_dev->data->port_id, ifname);
1401 DRV_LOG(DEBUG, "port %u ifname is unknown",
1402 eth_dev->data->port_id);
1405 /* Get actual MTU if possible. */
1406 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1411 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1413 /* Initialize burst functions to prevent crashes before link-up. */
1414 eth_dev->rx_pkt_burst = removed_rx_burst;
1415 eth_dev->tx_pkt_burst = removed_tx_burst;
1416 eth_dev->dev_ops = &mlx5_os_dev_ops;
1417 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1418 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1419 eth_dev->rx_queue_count = mlx5_rx_queue_count;
1420 /* Register MAC address. */
1421 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1422 if (config->vf && config->vf_nl_en)
1423 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1424 mlx5_ifindex(eth_dev),
1425 eth_dev->data->mac_addrs,
1426 MLX5_MAX_MAC_ADDRESSES);
1428 priv->ctrl_flows = 0;
1429 rte_spinlock_init(&priv->flow_list_lock);
1430 TAILQ_INIT(&priv->flow_meters);
1431 TAILQ_INIT(&priv->flow_meter_profiles);
1432 /* Hint libmlx5 to use PMD allocator for data plane resources */
1433 mlx5_glue->dv_set_context_attr(sh->ctx,
1434 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1435 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1436 .alloc = &mlx5_alloc_verbs_buf,
1437 .free = &mlx5_free_verbs_buf,
1440 /* Bring Ethernet device up. */
1441 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1442 eth_dev->data->port_id);
1443 mlx5_set_link_up(eth_dev);
1445 * Even though the interrupt handler is not installed yet,
1446 * interrupts will still trigger on the async_fd from
1447 * Verbs context returned by ibv_open_device().
1449 mlx5_link_update(eth_dev, 0);
1450 #ifdef HAVE_MLX5DV_DR_ESWITCH
1451 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1452 (switch_info->representor || switch_info->master)))
1453 config->dv_esw_en = 0;
1455 config->dv_esw_en = 0;
1457 /* Detect minimal data bytes to inline. */
1458 mlx5_set_min_inline(spawn, config);
1459 /* Store device configuration on private structure. */
1460 priv->config = *config;
1461 /* Create context for virtual machine VLAN workaround. */
1462 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1463 if (config->dv_flow_en) {
1464 err = mlx5_alloc_shared_dr(priv);
1468 if (config->devx && config->dv_flow_en && config->dest_tir) {
1469 priv->obj_ops = devx_obj_ops;
1470 priv->obj_ops.drop_action_create =
1471 ibv_obj_ops.drop_action_create;
1472 priv->obj_ops.drop_action_destroy =
1473 ibv_obj_ops.drop_action_destroy;
1474 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1475 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1477 if (config->dv_esw_en)
1478 priv->obj_ops.txq_obj_modify =
1479 ibv_obj_ops.txq_obj_modify;
1481 /* Use specific wrappers for Tx object. */
1482 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1483 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1486 priv->obj_ops = ibv_obj_ops;
1488 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1489 if (!priv->drop_queue.hrxq)
1491 /* Supported Verbs flow priority number detection. */
1492 err = mlx5_flow_discover_priorities(eth_dev);
1497 priv->config.flow_prio = err;
1498 if (!priv->config.dv_esw_en &&
1499 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1500 DRV_LOG(WARNING, "metadata mode %u is not supported "
1501 "(no E-Switch)", priv->config.dv_xmeta_en);
1502 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1504 mlx5_set_metadata_mask(eth_dev);
1505 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1506 !priv->sh->dv_regc0_mask) {
1507 DRV_LOG(ERR, "metadata mode %u is not supported "
1508 "(no metadata reg_c[0] is available)",
1509 priv->config.dv_xmeta_en);
1513 mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1514 mlx5_hrxq_create_cb,
1516 mlx5_hrxq_remove_cb);
1517 /* Query availability of metadata reg_c's. */
1518 err = mlx5_flow_discover_mreg_c(eth_dev);
1523 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1525 "port %u extensive metadata register is not supported",
1526 eth_dev->data->port_id);
1527 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1528 DRV_LOG(ERR, "metadata mode %u is not supported "
1529 "(no metadata registers available)",
1530 priv->config.dv_xmeta_en);
1535 if (priv->config.dv_flow_en &&
1536 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1537 mlx5_flow_ext_mreg_supported(eth_dev) &&
1538 priv->sh->dv_regc0_mask) {
1539 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1540 MLX5_FLOW_MREG_HTABLE_SZ,
1542 flow_dv_mreg_create_cb,
1544 flow_dv_mreg_remove_cb);
1545 if (!priv->mreg_cp_tbl) {
1549 priv->mreg_cp_tbl->ctx = eth_dev;
1551 rte_spinlock_init(&priv->shared_act_sl);
1552 mlx5_flow_counter_mode_config(eth_dev);
1553 if (priv->config.dv_flow_en)
1554 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1558 if (priv->mreg_cp_tbl)
1559 mlx5_hlist_destroy(priv->mreg_cp_tbl);
1561 mlx5_os_free_shared_dr(priv);
1562 if (priv->nl_socket_route >= 0)
1563 close(priv->nl_socket_route);
1564 if (priv->nl_socket_rdma >= 0)
1565 close(priv->nl_socket_rdma);
1566 if (priv->vmwa_context)
1567 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1568 if (eth_dev && priv->drop_queue.hrxq)
1569 mlx5_drop_action_destroy(eth_dev);
1571 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1572 mlx5_cache_list_destroy(&priv->hrxqs);
1574 if (eth_dev != NULL)
1575 eth_dev->data->dev_private = NULL;
1577 if (eth_dev != NULL) {
1578 /* mac_addrs must not be freed alone because part of
1581 eth_dev->data->mac_addrs = NULL;
1582 rte_eth_dev_release_port(eth_dev);
1585 mlx5_free_shared_dev_ctx(sh);
1586 MLX5_ASSERT(err > 0);
1592 * Comparison callback to sort device data.
1594 * This is meant to be used with qsort().
1597 * Pointer to pointer to first data object.
1599 * Pointer to pointer to second data object.
1602 * 0 if both objects are equal, less than 0 if the first argument is less
1603 * than the second, greater than 0 otherwise.
1606 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1608 const struct mlx5_switch_info *si_a =
1609 &((const struct mlx5_dev_spawn_data *)a)->info;
1610 const struct mlx5_switch_info *si_b =
1611 &((const struct mlx5_dev_spawn_data *)b)->info;
1614 /* Master device first. */
1615 ret = si_b->master - si_a->master;
1618 /* Then representor devices. */
1619 ret = si_b->representor - si_a->representor;
1622 /* Unidentified devices come last in no specific order. */
1623 if (!si_a->representor)
1625 /* Order representors by name. */
1626 return si_a->port_name - si_b->port_name;
1630 * Match PCI information for possible slaves of bonding device.
1632 * @param[in] ibv_dev
1633 * Pointer to Infiniband device structure.
1634 * @param[in] pci_dev
1635 * Pointer to PCI device structure to match PCI address.
1636 * @param[in] nl_rdma
1637 * Netlink RDMA group socket handle.
1640 * negative value if no bonding device found, otherwise
1641 * positive index of slave PF in bonding.
1644 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1645 const struct rte_pci_device *pci_dev,
1648 char ifname[IF_NAMESIZE + 1];
1649 unsigned int ifindex;
1655 * Try to get master device name. If something goes
1656 * wrong suppose the lack of kernel support and no
1661 if (!strstr(ibv_dev->name, "bond"))
1663 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1667 * The Master device might not be on the predefined
1668 * port (not on port index 1, it is not garanted),
1669 * we have to scan all Infiniband device port and
1672 for (i = 1; i <= np; ++i) {
1673 /* Check whether Infiniband port is populated. */
1674 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1677 if (!if_indextoname(ifindex, ifname))
1679 /* Try to read bonding slave names from sysfs. */
1681 "/sys/class/net/%s/master/bonding/slaves", ifname);
1682 file = fopen(slaves, "r");
1688 /* Use safe format to check maximal buffer length. */
1689 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1690 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1691 char tmp_str[IF_NAMESIZE + 32];
1692 struct rte_pci_addr pci_addr;
1693 struct mlx5_switch_info info;
1695 /* Process slave interface names in the loop. */
1696 snprintf(tmp_str, sizeof(tmp_str),
1697 "/sys/class/net/%s", ifname);
1698 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1699 DRV_LOG(WARNING, "can not get PCI address"
1700 " for netdev \"%s\"", ifname);
1703 if (pci_dev->addr.domain != pci_addr.domain ||
1704 pci_dev->addr.bus != pci_addr.bus ||
1705 pci_dev->addr.devid != pci_addr.devid ||
1706 pci_dev->addr.function != pci_addr.function)
1708 /* Slave interface PCI address match found. */
1710 snprintf(tmp_str, sizeof(tmp_str),
1711 "/sys/class/net/%s/phys_port_name", ifname);
1712 file = fopen(tmp_str, "rb");
1715 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1716 if (fscanf(file, "%32s", tmp_str) == 1)
1717 mlx5_translate_port_name(tmp_str, &info);
1718 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1719 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1720 pf = info.port_name;
1729 * DPDK callback to register a PCI device.
1731 * This function spawns Ethernet devices out of a given PCI device.
1733 * @param[in] pci_drv
1734 * PCI driver structure (mlx5_driver).
1735 * @param[in] pci_dev
1736 * PCI device information.
1739 * 0 on success, a negative errno value otherwise and rte_errno is set.
1742 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1743 struct rte_pci_device *pci_dev)
1745 struct ibv_device **ibv_list;
1747 * Number of found IB Devices matching with requested PCI BDF.
1748 * nd != 1 means there are multiple IB devices over the same
1749 * PCI device and we have representors and master.
1751 unsigned int nd = 0;
1753 * Number of found IB device Ports. nd = 1 and np = 1..n means
1754 * we have the single multiport IB device, and there may be
1755 * representors attached to some of found ports.
1757 unsigned int np = 0;
1759 * Number of DPDK ethernet devices to Spawn - either over
1760 * multiple IB devices or multiple ports of single IB device.
1761 * Actually this is the number of iterations to spawn.
1763 unsigned int ns = 0;
1766 * < 0 - no bonding device (single one)
1767 * >= 0 - bonding device (value is slave PF index)
1770 struct mlx5_dev_spawn_data *list = NULL;
1771 struct mlx5_dev_config dev_config;
1772 unsigned int dev_config_vf;
1775 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1776 mlx5_pmd_socket_init();
1777 ret = mlx5_init_once();
1779 DRV_LOG(ERR, "unable to init PMD global data: %s",
1780 strerror(rte_errno));
1784 ibv_list = mlx5_glue->get_device_list(&ret);
1786 rte_errno = errno ? errno : ENOSYS;
1787 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1791 * First scan the list of all Infiniband devices to find
1792 * matching ones, gathering into the list.
1794 struct ibv_device *ibv_match[ret + 1];
1795 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1796 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1800 struct rte_pci_addr pci_addr;
1802 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1803 bd = mlx5_device_bond_pci_match
1804 (ibv_list[ret], pci_dev, nl_rdma);
1807 * Bonding device detected. Only one match is allowed,
1808 * the bonding is supported over multi-port IB device,
1809 * there should be no matches on representor PCI
1810 * functions or non VF LAG bonding devices with
1811 * specified address.
1815 "multiple PCI match on bonding device"
1816 "\"%s\" found", ibv_list[ret]->name);
1821 DRV_LOG(INFO, "PCI information matches for"
1822 " slave %d bonding device \"%s\"",
1823 bd, ibv_list[ret]->name);
1824 ibv_match[nd++] = ibv_list[ret];
1827 if (mlx5_dev_to_pci_addr
1828 (ibv_list[ret]->ibdev_path, &pci_addr))
1830 if (pci_dev->addr.domain != pci_addr.domain ||
1831 pci_dev->addr.bus != pci_addr.bus ||
1832 pci_dev->addr.devid != pci_addr.devid ||
1833 pci_dev->addr.function != pci_addr.function)
1835 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1836 ibv_list[ret]->name);
1837 ibv_match[nd++] = ibv_list[ret];
1839 ibv_match[nd] = NULL;
1841 /* No device matches, just complain and bail out. */
1843 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1844 " are kernel drivers loaded?",
1845 pci_dev->addr.domain, pci_dev->addr.bus,
1846 pci_dev->addr.devid, pci_dev->addr.function);
1853 * Found single matching device may have multiple ports.
1854 * Each port may be representor, we have to check the port
1855 * number and check the representors existence.
1858 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1860 DRV_LOG(WARNING, "can not get IB device \"%s\""
1861 " ports number", ibv_match[0]->name);
1862 if (bd >= 0 && !np) {
1863 DRV_LOG(ERR, "can not get ports"
1864 " for bonding device");
1870 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1873 * This may happen if there is VF LAG kernel support and
1874 * application is compiled with older rdma_core library.
1877 "No kernel/verbs support for VF LAG bonding found.");
1878 rte_errno = ENOTSUP;
1884 * Now we can determine the maximal
1885 * amount of devices to be spawned.
1887 list = mlx5_malloc(MLX5_MEM_ZERO,
1888 sizeof(struct mlx5_dev_spawn_data) *
1890 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1892 DRV_LOG(ERR, "spawn data array allocation failure");
1897 if (bd >= 0 || np > 1) {
1899 * Single IB device with multiple ports found,
1900 * it may be E-Switch master device and representors.
1901 * We have to perform identification through the ports.
1903 MLX5_ASSERT(nl_rdma >= 0);
1904 MLX5_ASSERT(ns == 0);
1905 MLX5_ASSERT(nd == 1);
1907 for (i = 1; i <= np; ++i) {
1908 list[ns].max_port = np;
1909 list[ns].phys_port = i;
1910 list[ns].phys_dev = ibv_match[0];
1911 list[ns].eth_dev = NULL;
1912 list[ns].pci_dev = pci_dev;
1913 list[ns].pf_bond = bd;
1914 list[ns].ifindex = mlx5_nl_ifindex
1916 mlx5_os_get_dev_device_name
1917 (list[ns].phys_dev), i);
1918 if (!list[ns].ifindex) {
1920 * No network interface index found for the
1921 * specified port, it means there is no
1922 * representor on this port. It's OK,
1923 * there can be disabled ports, for example
1924 * if sriov_numvfs < sriov_totalvfs.
1930 ret = mlx5_nl_switch_info
1934 if (ret || (!list[ns].info.representor &&
1935 !list[ns].info.master)) {
1937 * We failed to recognize representors with
1938 * Netlink, let's try to perform the task
1941 ret = mlx5_sysfs_switch_info
1945 if (!ret && bd >= 0) {
1946 switch (list[ns].info.name_type) {
1947 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1948 if (list[ns].info.port_name == bd)
1951 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1953 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1954 if (list[ns].info.pf_num == bd)
1962 if (!ret && (list[ns].info.representor ^
1963 list[ns].info.master))
1968 "unable to recognize master/representors"
1969 " on the IB device with multiple ports");
1976 * The existence of several matching entries (nd > 1) means
1977 * port representors have been instantiated. No existing Verbs
1978 * call nor sysfs entries can tell them apart, this can only
1979 * be done through Netlink calls assuming kernel drivers are
1980 * recent enough to support them.
1982 * In the event of identification failure through Netlink,
1983 * try again through sysfs, then:
1985 * 1. A single IB device matches (nd == 1) with single
1986 * port (np=0/1) and is not a representor, assume
1987 * no switch support.
1989 * 2. Otherwise no safe assumptions can be made;
1990 * complain louder and bail out.
1992 for (i = 0; i != nd; ++i) {
1993 memset(&list[ns].info, 0, sizeof(list[ns].info));
1994 list[ns].max_port = 1;
1995 list[ns].phys_port = 1;
1996 list[ns].phys_dev = ibv_match[i];
1997 list[ns].eth_dev = NULL;
1998 list[ns].pci_dev = pci_dev;
1999 list[ns].pf_bond = -1;
2000 list[ns].ifindex = 0;
2002 list[ns].ifindex = mlx5_nl_ifindex
2004 mlx5_os_get_dev_device_name
2005 (list[ns].phys_dev), 1);
2006 if (!list[ns].ifindex) {
2007 char ifname[IF_NAMESIZE];
2010 * Netlink failed, it may happen with old
2011 * ib_core kernel driver (before 4.16).
2012 * We can assume there is old driver because
2013 * here we are processing single ports IB
2014 * devices. Let's try sysfs to retrieve
2015 * the ifindex. The method works for
2016 * master device only.
2020 * Multiple devices found, assume
2021 * representors, can not distinguish
2022 * master/representor and retrieve
2023 * ifindex via sysfs.
2027 ret = mlx5_get_ifname_sysfs
2028 (ibv_match[i]->ibdev_path, ifname);
2031 if_nametoindex(ifname);
2032 if (!list[ns].ifindex) {
2034 * No network interface index found
2035 * for the specified device, it means
2036 * there it is neither representor
2044 ret = mlx5_nl_switch_info
2048 if (ret || (!list[ns].info.representor &&
2049 !list[ns].info.master)) {
2051 * We failed to recognize representors with
2052 * Netlink, let's try to perform the task
2055 ret = mlx5_sysfs_switch_info
2059 if (!ret && (list[ns].info.representor ^
2060 list[ns].info.master)) {
2062 } else if ((nd == 1) &&
2063 !list[ns].info.representor &&
2064 !list[ns].info.master) {
2066 * Single IB device with
2067 * one physical port and
2068 * attached network device.
2069 * May be SRIOV is not enabled
2070 * or there is no representors.
2072 DRV_LOG(INFO, "no E-Switch support detected");
2079 "unable to recognize master/representors"
2080 " on the multiple IB devices");
2088 * Sort list to probe devices in natural order for users convenience
2089 * (i.e. master first, then representors from lowest to highest ID).
2091 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2092 /* Device specific configuration. */
2093 switch (pci_dev->id.device_id) {
2094 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2095 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2096 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2097 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2098 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2099 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2100 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2107 for (i = 0; i != ns; ++i) {
2110 /* Default configuration. */
2111 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2112 dev_config.vf = dev_config_vf;
2113 dev_config.mps = MLX5_ARG_UNSET;
2114 dev_config.dbnc = MLX5_ARG_UNSET;
2115 dev_config.rx_vec_en = 1;
2116 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2117 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2118 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2119 dev_config.txqs_inline = MLX5_ARG_UNSET;
2120 dev_config.vf_nl_en = 1;
2121 dev_config.mr_ext_memseg_en = 1;
2122 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2123 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2124 dev_config.dv_esw_en = 1;
2125 dev_config.dv_flow_en = 1;
2126 dev_config.decap_en = 1;
2127 dev_config.log_hp_size = MLX5_ARG_UNSET;
2128 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2131 if (!list[i].eth_dev) {
2132 if (rte_errno != EBUSY && rte_errno != EEXIST)
2134 /* Device is disabled or already spawned. Ignore it. */
2137 restore = list[i].eth_dev->data->dev_flags;
2138 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2139 /* Restore non-PCI flags cleared by the above call. */
2140 list[i].eth_dev->data->dev_flags |= restore;
2141 rte_eth_dev_probing_finish(list[i].eth_dev);
2145 "probe of PCI device " PCI_PRI_FMT " aborted after"
2146 " encountering an error: %s",
2147 pci_dev->addr.domain, pci_dev->addr.bus,
2148 pci_dev->addr.devid, pci_dev->addr.function,
2149 strerror(rte_errno));
2153 if (!list[i].eth_dev)
2155 mlx5_dev_close(list[i].eth_dev);
2156 /* mac_addrs must not be freed because in dev_private */
2157 list[i].eth_dev->data->mac_addrs = NULL;
2158 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2160 /* Restore original error. */
2167 * Do the routine cleanup:
2168 * - close opened Netlink sockets
2169 * - free allocated spawn data array
2170 * - free the Infiniband device list
2178 MLX5_ASSERT(ibv_list);
2179 mlx5_glue->free_device_list(ibv_list);
2184 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2189 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2190 /* Get environment variable to store. */
2191 env = getenv(MLX5_SHUT_UP_BF);
2192 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2193 if (config->dbnc == MLX5_ARG_UNSET)
2194 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2196 setenv(MLX5_SHUT_UP_BF,
2197 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2202 mlx5_restore_doorbell_mapping_env(int value)
2204 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2205 /* Restore the original environment variable state. */
2206 if (value == MLX5_ARG_UNSET)
2207 unsetenv(MLX5_SHUT_UP_BF);
2209 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2213 * Extract pdn of PD object using DV API.
2216 * Pointer to the verbs PD object.
2218 * Pointer to the PD object number variable.
2221 * 0 on success, error value otherwise.
2224 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2226 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2227 struct mlx5dv_obj obj;
2228 struct mlx5dv_pd pd_info;
2232 obj.pd.out = &pd_info;
2233 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2235 DRV_LOG(DEBUG, "Fail to get PD object info");
2244 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2248 * Function API to open IB device.
2250 * This function calls the Linux glue APIs to open a device.
2253 * Pointer to the IB device attributes (name, port, etc).
2254 * @param[out] config
2255 * Pointer to device configuration structure.
2257 * Pointer to shared context structure.
2260 * 0 on success, a positive error value otherwise.
2263 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2264 const struct mlx5_dev_config *config,
2265 struct mlx5_dev_ctx_shared *sh)
2270 sh->numa_node = spawn->pci_dev->device.numa_node;
2271 pthread_mutex_init(&sh->txpp.mutex, NULL);
2273 * Configure environment variable "MLX5_BF_SHUT_UP"
2274 * before the device creation. The rdma_core library
2275 * checks the variable at device creation and
2276 * stores the result internally.
2278 dbmap_env = mlx5_config_doorbell_mapping_env(config);
2279 /* Try to open IB device with DV first, then usual Verbs. */
2281 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2284 DRV_LOG(DEBUG, "DevX is supported");
2285 /* The device is created, no need for environment. */
2286 mlx5_restore_doorbell_mapping_env(dbmap_env);
2288 /* The environment variable is still configured. */
2289 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2290 err = errno ? errno : ENODEV;
2292 * The environment variable is not needed anymore,
2293 * all device creation attempts are completed.
2295 mlx5_restore_doorbell_mapping_env(dbmap_env);
2298 DRV_LOG(DEBUG, "DevX is NOT supported");
2305 * Install shared asynchronous device events handler.
2306 * This function is implemented to support event sharing
2307 * between multiple ports of single IB device.
2310 * Pointer to mlx5_dev_ctx_shared object.
2313 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2318 sh->intr_handle.fd = -1;
2319 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2320 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2321 F_SETFL, flags | O_NONBLOCK);
2323 DRV_LOG(INFO, "failed to change file descriptor async event"
2326 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2327 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2328 if (rte_intr_callback_register(&sh->intr_handle,
2329 mlx5_dev_interrupt_handler, sh)) {
2330 DRV_LOG(INFO, "Fail to install the shared interrupt.");
2331 sh->intr_handle.fd = -1;
2335 #ifdef HAVE_IBV_DEVX_ASYNC
2336 sh->intr_handle_devx.fd = -1;
2338 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2339 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2341 DRV_LOG(INFO, "failed to allocate devx_comp.");
2344 flags = fcntl(devx_comp->fd, F_GETFL);
2345 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2347 DRV_LOG(INFO, "failed to change file descriptor"
2351 sh->intr_handle_devx.fd = devx_comp->fd;
2352 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2353 if (rte_intr_callback_register(&sh->intr_handle_devx,
2354 mlx5_dev_interrupt_handler_devx, sh)) {
2355 DRV_LOG(INFO, "Fail to install the devx shared"
2357 sh->intr_handle_devx.fd = -1;
2359 #endif /* HAVE_IBV_DEVX_ASYNC */
2364 * Uninstall shared asynchronous device events handler.
2365 * This function is implemented to support event sharing
2366 * between multiple ports of single IB device.
2369 * Pointer to mlx5_dev_ctx_shared object.
2372 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2374 if (sh->intr_handle.fd >= 0)
2375 mlx5_intr_callback_unregister(&sh->intr_handle,
2376 mlx5_dev_interrupt_handler, sh);
2377 #ifdef HAVE_IBV_DEVX_ASYNC
2378 if (sh->intr_handle_devx.fd >= 0)
2379 rte_intr_callback_unregister(&sh->intr_handle_devx,
2380 mlx5_dev_interrupt_handler_devx, sh);
2382 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2387 * Read statistics by a named counter.
2390 * Pointer to the private device data structure.
2391 * @param[in] ctr_name
2392 * Pointer to the name of the statistic counter to read
2394 * Pointer to read statistic value.
2396 * 0 on success and stat is valud, 1 if failed to read the value
2401 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2407 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2408 priv->sh->ibdev_path,
2411 fd = open(path, O_RDONLY);
2413 * in switchdev the file location is not per port
2414 * but rather in <ibdev_path>/hw_counters/<file_name>.
2417 MKSTR(path1, "%s/hw_counters/%s",
2418 priv->sh->ibdev_path,
2420 fd = open(path1, O_RDONLY);
2423 char buf[21] = {'\0'};
2424 ssize_t n = read(fd, buf, sizeof(buf));
2428 *stat = strtoull(buf, NULL, 10);
2438 * Set the reg_mr and dereg_mr call backs
2440 * @param reg_mr_cb[out]
2441 * Pointer to reg_mr func
2442 * @param dereg_mr_cb[out]
2443 * Pointer to dereg_mr func
2447 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2448 mlx5_dereg_mr_t *dereg_mr_cb)
2450 *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2451 *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2455 * Remove a MAC address from device
2458 * Pointer to Ethernet device structure.
2460 * MAC address index.
2463 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2465 struct mlx5_priv *priv = dev->data->dev_private;
2466 const int vf = priv->config.vf;
2469 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2470 mlx5_ifindex(dev), priv->mac_own,
2471 &dev->data->mac_addrs[index], index);
2475 * Adds a MAC address to the device
2478 * Pointer to Ethernet device structure.
2480 * MAC address to register.
2482 * MAC address index.
2485 * 0 on success, a negative errno value otherwise
2488 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2491 struct mlx5_priv *priv = dev->data->dev_private;
2492 const int vf = priv->config.vf;
2496 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2497 mlx5_ifindex(dev), priv->mac_own,
2503 * Modify a VF MAC address
2506 * Pointer to device private data.
2508 * MAC address to modify into.
2510 * Net device interface index
2515 * 0 on success, a negative errno value otherwise
2518 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2519 unsigned int iface_idx,
2520 struct rte_ether_addr *mac_addr,
2523 return mlx5_nl_vf_mac_addr_modify
2524 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2528 * Set device promiscuous mode
2531 * Pointer to Ethernet device structure.
2533 * 0 - promiscuous is disabled, otherwise - enabled
2536 * 0 on success, a negative error value otherwise
2539 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2541 struct mlx5_priv *priv = dev->data->dev_private;
2543 return mlx5_nl_promisc(priv->nl_socket_route,
2544 mlx5_ifindex(dev), !!enable);
2548 * Set device promiscuous mode
2551 * Pointer to Ethernet device structure.
2553 * 0 - all multicase is disabled, otherwise - enabled
2556 * 0 on success, a negative error value otherwise
2559 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2561 struct mlx5_priv *priv = dev->data->dev_private;
2563 return mlx5_nl_allmulti(priv->nl_socket_route,
2564 mlx5_ifindex(dev), !!enable);
2568 * Flush device MAC addresses
2571 * Pointer to Ethernet device structure.
2575 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2577 struct mlx5_priv *priv = dev->data->dev_private;
2579 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2580 dev->data->mac_addrs,
2581 MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2584 const struct eth_dev_ops mlx5_os_dev_ops = {
2585 .dev_configure = mlx5_dev_configure,
2586 .dev_start = mlx5_dev_start,
2587 .dev_stop = mlx5_dev_stop,
2588 .dev_set_link_down = mlx5_set_link_down,
2589 .dev_set_link_up = mlx5_set_link_up,
2590 .dev_close = mlx5_dev_close,
2591 .promiscuous_enable = mlx5_promiscuous_enable,
2592 .promiscuous_disable = mlx5_promiscuous_disable,
2593 .allmulticast_enable = mlx5_allmulticast_enable,
2594 .allmulticast_disable = mlx5_allmulticast_disable,
2595 .link_update = mlx5_link_update,
2596 .stats_get = mlx5_stats_get,
2597 .stats_reset = mlx5_stats_reset,
2598 .xstats_get = mlx5_xstats_get,
2599 .xstats_reset = mlx5_xstats_reset,
2600 .xstats_get_names = mlx5_xstats_get_names,
2601 .fw_version_get = mlx5_fw_version_get,
2602 .dev_infos_get = mlx5_dev_infos_get,
2603 .read_clock = mlx5_txpp_read_clock,
2604 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2605 .vlan_filter_set = mlx5_vlan_filter_set,
2606 .rx_queue_setup = mlx5_rx_queue_setup,
2607 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2608 .tx_queue_setup = mlx5_tx_queue_setup,
2609 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2610 .rx_queue_release = mlx5_rx_queue_release,
2611 .tx_queue_release = mlx5_tx_queue_release,
2612 .rx_queue_start = mlx5_rx_queue_start,
2613 .rx_queue_stop = mlx5_rx_queue_stop,
2614 .tx_queue_start = mlx5_tx_queue_start,
2615 .tx_queue_stop = mlx5_tx_queue_stop,
2616 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2617 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2618 .mac_addr_remove = mlx5_mac_addr_remove,
2619 .mac_addr_add = mlx5_mac_addr_add,
2620 .mac_addr_set = mlx5_mac_addr_set,
2621 .set_mc_addr_list = mlx5_set_mc_addr_list,
2622 .mtu_set = mlx5_dev_set_mtu,
2623 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2624 .vlan_offload_set = mlx5_vlan_offload_set,
2625 .reta_update = mlx5_dev_rss_reta_update,
2626 .reta_query = mlx5_dev_rss_reta_query,
2627 .rss_hash_update = mlx5_rss_hash_update,
2628 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2629 .filter_ctrl = mlx5_dev_filter_ctrl,
2630 .rxq_info_get = mlx5_rxq_info_get,
2631 .txq_info_get = mlx5_txq_info_get,
2632 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2633 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2634 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2635 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2636 .is_removed = mlx5_is_removed,
2637 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
2638 .get_module_info = mlx5_get_module_info,
2639 .get_module_eeprom = mlx5_get_module_eeprom,
2640 .hairpin_cap_get = mlx5_hairpin_cap_get,
2641 .mtr_ops_get = mlx5_flow_meter_ops_get,
2642 .hairpin_bind = mlx5_hairpin_bind,
2643 .hairpin_unbind = mlx5_hairpin_unbind,
2644 .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2645 .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2646 .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2647 .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2650 /* Available operations from secondary process. */
2651 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2652 .stats_get = mlx5_stats_get,
2653 .stats_reset = mlx5_stats_reset,
2654 .xstats_get = mlx5_xstats_get,
2655 .xstats_reset = mlx5_xstats_reset,
2656 .xstats_get_names = mlx5_xstats_get_names,
2657 .fw_version_get = mlx5_fw_version_get,
2658 .dev_infos_get = mlx5_dev_infos_get,
2659 .read_clock = mlx5_txpp_read_clock,
2660 .rx_queue_start = mlx5_rx_queue_start,
2661 .rx_queue_stop = mlx5_rx_queue_stop,
2662 .tx_queue_start = mlx5_tx_queue_start,
2663 .tx_queue_stop = mlx5_tx_queue_stop,
2664 .rxq_info_get = mlx5_rxq_info_get,
2665 .txq_info_get = mlx5_txq_info_get,
2666 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2667 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2668 .get_module_info = mlx5_get_module_info,
2669 .get_module_eeprom = mlx5_get_module_eeprom,
2672 /* Available operations in flow isolated mode. */
2673 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2674 .dev_configure = mlx5_dev_configure,
2675 .dev_start = mlx5_dev_start,
2676 .dev_stop = mlx5_dev_stop,
2677 .dev_set_link_down = mlx5_set_link_down,
2678 .dev_set_link_up = mlx5_set_link_up,
2679 .dev_close = mlx5_dev_close,
2680 .promiscuous_enable = mlx5_promiscuous_enable,
2681 .promiscuous_disable = mlx5_promiscuous_disable,
2682 .allmulticast_enable = mlx5_allmulticast_enable,
2683 .allmulticast_disable = mlx5_allmulticast_disable,
2684 .link_update = mlx5_link_update,
2685 .stats_get = mlx5_stats_get,
2686 .stats_reset = mlx5_stats_reset,
2687 .xstats_get = mlx5_xstats_get,
2688 .xstats_reset = mlx5_xstats_reset,
2689 .xstats_get_names = mlx5_xstats_get_names,
2690 .fw_version_get = mlx5_fw_version_get,
2691 .dev_infos_get = mlx5_dev_infos_get,
2692 .read_clock = mlx5_txpp_read_clock,
2693 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2694 .vlan_filter_set = mlx5_vlan_filter_set,
2695 .rx_queue_setup = mlx5_rx_queue_setup,
2696 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2697 .tx_queue_setup = mlx5_tx_queue_setup,
2698 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2699 .rx_queue_release = mlx5_rx_queue_release,
2700 .tx_queue_release = mlx5_tx_queue_release,
2701 .rx_queue_start = mlx5_rx_queue_start,
2702 .rx_queue_stop = mlx5_rx_queue_stop,
2703 .tx_queue_start = mlx5_tx_queue_start,
2704 .tx_queue_stop = mlx5_tx_queue_stop,
2705 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2706 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2707 .mac_addr_remove = mlx5_mac_addr_remove,
2708 .mac_addr_add = mlx5_mac_addr_add,
2709 .mac_addr_set = mlx5_mac_addr_set,
2710 .set_mc_addr_list = mlx5_set_mc_addr_list,
2711 .mtu_set = mlx5_dev_set_mtu,
2712 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2713 .vlan_offload_set = mlx5_vlan_offload_set,
2714 .filter_ctrl = mlx5_dev_filter_ctrl,
2715 .rxq_info_get = mlx5_rxq_info_get,
2716 .txq_info_get = mlx5_txq_info_get,
2717 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2718 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2719 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2720 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2721 .is_removed = mlx5_is_removed,
2722 .get_module_info = mlx5_get_module_info,
2723 .get_module_eeprom = mlx5_get_module_eeprom,
2724 .hairpin_cap_get = mlx5_hairpin_cap_get,
2725 .mtr_ops_get = mlx5_flow_meter_ops_get,
2726 .hairpin_bind = mlx5_hairpin_bind,
2727 .hairpin_unbind = mlx5_hairpin_unbind,
2728 .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2729 .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2730 .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2731 .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,