drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /* rte flow indexed pool configuration. */
  71 static struct mlx5_indexed_pool_config icfg[] = {
  72         {
  73                 .size = sizeof(struct rte_flow),
  74                 .trunk_size = 64,
  75                 .need_lock = 1,
  76                 .release_mem_en = 0,
  77                 .malloc = mlx5_malloc,
  78                 .free = mlx5_free,
  79                 .per_core_cache = 0,
  80                 .type = "ctl_flow_ipool",
  81         },
  82         {
  83                 .size = sizeof(struct rte_flow),
  84                 .trunk_size = 64,
  85                 .grow_trunk = 3,
  86                 .grow_shift = 2,
  87                 .need_lock = 1,
  88                 .release_mem_en = 0,
  89                 .malloc = mlx5_malloc,
  90                 .free = mlx5_free,
  91                 .per_core_cache = 1 << 14,
  92                 .type = "rte_flow_ipool",
  93         },
  94         {
  95                 .size = sizeof(struct rte_flow),
  96                 .trunk_size = 64,
  97                 .grow_trunk = 3,
  98                 .grow_shift = 2,
  99                 .need_lock = 1,
 100                 .release_mem_en = 0,
 101                 .malloc = mlx5_malloc,
 102                 .free = mlx5_free,
 103                 .per_core_cache = 0,
 104                 .type = "mcp_flow_ipool",
 105         },
 106 };
 107
 108 /**
 109  * Set the completion channel file descriptor interrupt as non-blocking.
 110  *
 111  * @param[in] rxq_obj
 112  *   Pointer to RQ channel object, which includes the channel fd
 113  *
 114  * @param[out] fd
 115  *   The file descriptor (representing the interrupt) used in this channel.
 116  *
 117  * @return
 118  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 119  */
 120 int
 121 mlx5_os_set_nonblock_channel_fd(int fd)
 122 {
 123         int flags;
 124
 125         flags = fcntl(fd, F_GETFL);
 126         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 127 }
 128
 129 /**
 130  * Get mlx5 device attributes. The glue function query_device_ex() is called
 131  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 132  * device attributes from the glue out parameter.
 133  *
 134  * @param sh
 135  *   Pointer to shared device context.
 136  *
 137  * @return
 138  *   0 on success, a negative errno value otherwise and rte_errno is set.
 139  */
 140 int
 141 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
 142 {
 143         int err;
 144         struct ibv_context *ctx = sh->cdev->ctx;
 145         struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 };
 146         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 147
 148         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 149         if (err) {
 150                 rte_errno = errno;
 151                 return -rte_errno;
 152         }
 153 #ifdef HAVE_IBV_MLX5_MOD_SWP
 154         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 155 #endif
 156 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 157         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 158 #endif
 159 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 160         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 161 #endif
 162         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 163         if (err) {
 164                 rte_errno = errno;
 165                 return -rte_errno;
 166         }
 167         memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
 168         sh->dev_cap.device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 169         sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 170         sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;
 171         sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;
 172         sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;
 173         sh->dev_cap.raw_packet_caps = attr_ex.raw_packet_caps;
 174         sh->dev_cap.max_rwq_indirection_table_size =
 175                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 176         sh->dev_cap.max_tso = attr_ex.tso_caps.max_tso;
 177         sh->dev_cap.tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 178         strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,
 179                 sizeof(sh->dev_cap.fw_ver));
 180         sh->dev_cap.flags = dv_attr.flags;
 181         sh->dev_cap.comp_mask = dv_attr.comp_mask;
 182 #ifdef HAVE_IBV_MLX5_MOD_SWP
 183         sh->dev_cap.sw_parsing_offloads =
 184                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 185 #endif
 186 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 187         sh->dev_cap.min_single_stride_log_num_of_bytes =
 188                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 189         sh->dev_cap.max_single_stride_log_num_of_bytes =
 190                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 191         sh->dev_cap.min_single_wqe_log_num_of_strides =
 192                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 193         sh->dev_cap.max_single_wqe_log_num_of_strides =
 194                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 195         sh->dev_cap.stride_supported_qpts =
 196                 dv_attr.striding_rq_caps.supported_qpts;
 197 #endif
 198 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 199         sh->dev_cap.tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 200 #endif
 201         return 0;
 202 }
 203
 204 /**
 205  * Detect misc5 support or not
 206  *
 207  * @param[in] priv
 208  *   Device private data pointer
 209  */
 210 #ifdef HAVE_MLX5DV_DR
 211 static void
 212 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 213 {
 214 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 215         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 216          * Case: IPv4--->UDP--->VxLAN--->vni
 217          */
 218         void *tbl;
 219         struct mlx5_flow_dv_match_params matcher_mask;
 220         void *match_m;
 221         void *matcher;
 222         void *headers_m;
 223         void *misc5_m;
 224         uint32_t *tunnel_header_m;
 225         struct mlx5dv_flow_matcher_attr dv_attr;
 226
 227         memset(&matcher_mask, 0, sizeof(matcher_mask));
 228         matcher_mask.size = sizeof(matcher_mask.buf);
 229         match_m = matcher_mask.buf;
 230         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 231         misc5_m = MLX5_ADDR_OF(fte_match_param,
 232                                match_m, misc_parameters_5);
 233         tunnel_header_m = (uint32_t *)
 234                                 MLX5_ADDR_OF(fte_match_set_misc5,
 235                                 misc5_m, tunnel_header_1);
 236         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 237         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 238         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 239         *tunnel_header_m = 0xffffff;
 240
 241         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 242         if (!tbl) {
 243                 DRV_LOG(INFO, "No SW steering support");
 244                 return;
 245         }
 246         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 247         dv_attr.match_mask = (void *)&matcher_mask,
 248         dv_attr.match_criteria_enable =
 249                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 250                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 251         dv_attr.priority = 3;
 252 #ifdef HAVE_MLX5DV_DR_ESWITCH
 253         void *misc2_m;
 254         if (priv->config.dv_esw_en) {
 255                 /* FDB enabled reg_c_0 */
 256                 dv_attr.match_criteria_enable |=
 257                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 258                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 259                                        match_m, misc_parameters_2);
 260                 MLX5_SET(fte_match_set_misc2, misc2_m,
 261                          metadata_reg_c_0, 0xffff);
 262         }
 263 #endif
 264         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 265                                                     &dv_attr, tbl);
 266         if (matcher) {
 267                 priv->sh->misc5_cap = 1;
 268                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 269         }
 270         mlx5_glue->dr_destroy_flow_tbl(tbl);
 271 #else
 272         RTE_SET_USED(priv);
 273 #endif
 274 }
 275 #endif
 276
 277 /**
 278  * Initialize DR related data within private structure.
 279  * Routine checks the reference counter and does actual
 280  * resources creation/initialization only if counter is zero.
 281  *
 282  * @param[in] priv
 283  *   Pointer to the private device data structure.
 284  *
 285  * @return
 286  *   Zero on success, positive error code otherwise.
 287  */
 288 static int
 289 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 290 {
 291         struct mlx5_dev_ctx_shared *sh = priv->sh;
 292         char s[MLX5_NAME_SIZE] __rte_unused;
 293         int err;
 294
 295         MLX5_ASSERT(sh && sh->refcnt);
 296         if (sh->refcnt > 1)
 297                 return 0;
 298         err = mlx5_alloc_table_hash_list(priv);
 299         if (err)
 300                 goto error;
 301         /* The resources below are only valid with DV support. */
 302 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 303         /* Init port id action list. */
 304         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 305         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 306                                                    flow_dv_port_id_create_cb,
 307                                                    flow_dv_port_id_match_cb,
 308                                                    flow_dv_port_id_remove_cb,
 309                                                    flow_dv_port_id_clone_cb,
 310                                                  flow_dv_port_id_clone_free_cb);
 311         if (!sh->port_id_action_list)
 312                 goto error;
 313         /* Init push vlan action list. */
 314         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 315         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 316                                                     flow_dv_push_vlan_create_cb,
 317                                                     flow_dv_push_vlan_match_cb,
 318                                                     flow_dv_push_vlan_remove_cb,
 319                                                     flow_dv_push_vlan_clone_cb,
 320                                                flow_dv_push_vlan_clone_free_cb);
 321         if (!sh->push_vlan_action_list)
 322                 goto error;
 323         /* Init sample action list. */
 324         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 325         sh->sample_action_list = mlx5_list_create(s, sh, true,
 326                                                   flow_dv_sample_create_cb,
 327                                                   flow_dv_sample_match_cb,
 328                                                   flow_dv_sample_remove_cb,
 329                                                   flow_dv_sample_clone_cb,
 330                                                   flow_dv_sample_clone_free_cb);
 331         if (!sh->sample_action_list)
 332                 goto error;
 333         /* Init dest array action list. */
 334         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 335         sh->dest_array_list = mlx5_list_create(s, sh, true,
 336                                                flow_dv_dest_array_create_cb,
 337                                                flow_dv_dest_array_match_cb,
 338                                                flow_dv_dest_array_remove_cb,
 339                                                flow_dv_dest_array_clone_cb,
 340                                               flow_dv_dest_array_clone_free_cb);
 341         if (!sh->dest_array_list)
 342                 goto error;
 343         /* Init shared flex parsers list, no need lcore_share */
 344         snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
 345         sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
 346                                                mlx5_flex_parser_create_cb,
 347                                                mlx5_flex_parser_match_cb,
 348                                                mlx5_flex_parser_remove_cb,
 349                                                mlx5_flex_parser_clone_cb,
 350                                                mlx5_flex_parser_clone_free_cb);
 351         if (!sh->flex_parsers_dv)
 352                 goto error;
 353 #endif
 354 #ifdef HAVE_MLX5DV_DR
 355         void *domain;
 356
 357         /* Reference counter is zero, we should initialize structures. */
 358         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 359                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 360         if (!domain) {
 361                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 362                 err = errno;
 363                 goto error;
 364         }
 365         sh->rx_domain = domain;
 366         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 367                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 368         if (!domain) {
 369                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 370                 err = errno;
 371                 goto error;
 372         }
 373         sh->tx_domain = domain;
 374 #ifdef HAVE_MLX5DV_DR_ESWITCH
 375         if (priv->config.dv_esw_en) {
 376                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 377                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 378                 if (!domain) {
 379                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 380                         err = errno;
 381                         goto error;
 382                 }
 383                 sh->fdb_domain = domain;
 384         }
 385         /*
 386          * The drop action is just some dummy placeholder in rdma-core. It
 387          * does not belong to domains and has no any attributes, and, can be
 388          * shared by the entire device.
 389          */
 390         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 391         if (!sh->dr_drop_action) {
 392                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 393                 err = errno;
 394                 goto error;
 395         }
 396 #endif
 397         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 398                 err = mlx5_alloc_tunnel_hub(sh);
 399         if (err) {
 400                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 401                 goto error;
 402         }
 403         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 404                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 405                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 406                 if (sh->fdb_domain)
 407                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 408         }
 409         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 410         if (!priv->config.allow_duplicate_pattern) {
 411 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 412                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 413 #endif
 414                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 415                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 416                 if (sh->fdb_domain)
 417                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 418         }
 419
 420         __mlx5_discovery_misc5_cap(priv);
 421 #endif /* HAVE_MLX5DV_DR */
 422         sh->default_miss_action =
 423                         mlx5_glue->dr_create_flow_action_default_miss();
 424         if (!sh->default_miss_action)
 425                 DRV_LOG(WARNING, "Default miss action is not supported.");
 426         LIST_INIT(&sh->shared_rxqs);
 427         return 0;
 428 error:
 429         /* Rollback the created objects. */
 430         if (sh->rx_domain) {
 431                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 432                 sh->rx_domain = NULL;
 433         }
 434         if (sh->tx_domain) {
 435                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 436                 sh->tx_domain = NULL;
 437         }
 438         if (sh->fdb_domain) {
 439                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 440                 sh->fdb_domain = NULL;
 441         }
 442         if (sh->dr_drop_action) {
 443                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 444                 sh->dr_drop_action = NULL;
 445         }
 446         if (sh->pop_vlan_action) {
 447                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 448                 sh->pop_vlan_action = NULL;
 449         }
 450         if (sh->encaps_decaps) {
 451                 mlx5_hlist_destroy(sh->encaps_decaps);
 452                 sh->encaps_decaps = NULL;
 453         }
 454         if (sh->modify_cmds) {
 455                 mlx5_hlist_destroy(sh->modify_cmds);
 456                 sh->modify_cmds = NULL;
 457         }
 458         if (sh->tag_table) {
 459                 /* tags should be destroyed with flow before. */
 460                 mlx5_hlist_destroy(sh->tag_table);
 461                 sh->tag_table = NULL;
 462         }
 463         if (sh->tunnel_hub) {
 464                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 465                 sh->tunnel_hub = NULL;
 466         }
 467         mlx5_free_table_hash_list(priv);
 468         if (sh->port_id_action_list) {
 469                 mlx5_list_destroy(sh->port_id_action_list);
 470                 sh->port_id_action_list = NULL;
 471         }
 472         if (sh->push_vlan_action_list) {
 473                 mlx5_list_destroy(sh->push_vlan_action_list);
 474                 sh->push_vlan_action_list = NULL;
 475         }
 476         if (sh->sample_action_list) {
 477                 mlx5_list_destroy(sh->sample_action_list);
 478                 sh->sample_action_list = NULL;
 479         }
 480         if (sh->dest_array_list) {
 481                 mlx5_list_destroy(sh->dest_array_list);
 482                 sh->dest_array_list = NULL;
 483         }
 484         return err;
 485 }
 486
 487 /**
 488  * Destroy DR related data within private structure.
 489  *
 490  * @param[in] priv
 491  *   Pointer to the private device data structure.
 492  */
 493 void
 494 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 495 {
 496         struct mlx5_dev_ctx_shared *sh = priv->sh;
 497
 498         MLX5_ASSERT(sh && sh->refcnt);
 499         if (sh->refcnt > 1)
 500                 return;
 501         MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
 502 #ifdef HAVE_MLX5DV_DR
 503         if (sh->rx_domain) {
 504                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 505                 sh->rx_domain = NULL;
 506         }
 507         if (sh->tx_domain) {
 508                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 509                 sh->tx_domain = NULL;
 510         }
 511 #ifdef HAVE_MLX5DV_DR_ESWITCH
 512         if (sh->fdb_domain) {
 513                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 514                 sh->fdb_domain = NULL;
 515         }
 516         if (sh->dr_drop_action) {
 517                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 518                 sh->dr_drop_action = NULL;
 519         }
 520 #endif
 521         if (sh->pop_vlan_action) {
 522                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 523                 sh->pop_vlan_action = NULL;
 524         }
 525 #endif /* HAVE_MLX5DV_DR */
 526         if (sh->default_miss_action)
 527                 mlx5_glue->destroy_flow_action
 528                                 (sh->default_miss_action);
 529         if (sh->encaps_decaps) {
 530                 mlx5_hlist_destroy(sh->encaps_decaps);
 531                 sh->encaps_decaps = NULL;
 532         }
 533         if (sh->modify_cmds) {
 534                 mlx5_hlist_destroy(sh->modify_cmds);
 535                 sh->modify_cmds = NULL;
 536         }
 537         if (sh->tag_table) {
 538                 /* tags should be destroyed with flow before. */
 539                 mlx5_hlist_destroy(sh->tag_table);
 540                 sh->tag_table = NULL;
 541         }
 542         if (sh->tunnel_hub) {
 543                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 544                 sh->tunnel_hub = NULL;
 545         }
 546         mlx5_free_table_hash_list(priv);
 547         if (sh->port_id_action_list) {
 548                 mlx5_list_destroy(sh->port_id_action_list);
 549                 sh->port_id_action_list = NULL;
 550         }
 551         if (sh->push_vlan_action_list) {
 552                 mlx5_list_destroy(sh->push_vlan_action_list);
 553                 sh->push_vlan_action_list = NULL;
 554         }
 555         if (sh->sample_action_list) {
 556                 mlx5_list_destroy(sh->sample_action_list);
 557                 sh->sample_action_list = NULL;
 558         }
 559         if (sh->dest_array_list) {
 560                 mlx5_list_destroy(sh->dest_array_list);
 561                 sh->dest_array_list = NULL;
 562         }
 563 }
 564
 565 /**
 566  * Initialize shared data between primary and secondary process.
 567  *
 568  * A memzone is reserved by primary process and secondary processes attach to
 569  * the memzone.
 570  *
 571  * @return
 572  *   0 on success, a negative errno value otherwise and rte_errno is set.
 573  */
 574 static int
 575 mlx5_init_shared_data(void)
 576 {
 577         const struct rte_memzone *mz;
 578         int ret = 0;
 579
 580         rte_spinlock_lock(&mlx5_shared_data_lock);
 581         if (mlx5_shared_data == NULL) {
 582                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 583                         /* Allocate shared memory. */
 584                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 585                                                  sizeof(*mlx5_shared_data),
 586                                                  SOCKET_ID_ANY, 0);
 587                         if (mz == NULL) {
 588                                 DRV_LOG(ERR,
 589                                         "Cannot allocate mlx5 shared data");
 590                                 ret = -rte_errno;
 591                                 goto error;
 592                         }
 593                         mlx5_shared_data = mz->addr;
 594                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 595                         rte_spinlock_init(&mlx5_shared_data->lock);
 596                 } else {
 597                         /* Lookup allocated shared memory. */
 598                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 599                         if (mz == NULL) {
 600                                 DRV_LOG(ERR,
 601                                         "Cannot attach mlx5 shared data");
 602                                 ret = -rte_errno;
 603                                 goto error;
 604                         }
 605                         mlx5_shared_data = mz->addr;
 606                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 607                 }
 608         }
 609 error:
 610         rte_spinlock_unlock(&mlx5_shared_data_lock);
 611         return ret;
 612 }
 613
 614 /**
 615  * PMD global initialization.
 616  *
 617  * Independent from individual device, this function initializes global
 618  * per-PMD data structures distinguishing primary and secondary processes.
 619  * Hence, each initialization is called once per a process.
 620  *
 621  * @return
 622  *   0 on success, a negative errno value otherwise and rte_errno is set.
 623  */
 624 static int
 625 mlx5_init_once(void)
 626 {
 627         struct mlx5_shared_data *sd;
 628         struct mlx5_local_data *ld = &mlx5_local_data;
 629         int ret = 0;
 630
 631         if (mlx5_init_shared_data())
 632                 return -rte_errno;
 633         sd = mlx5_shared_data;
 634         MLX5_ASSERT(sd);
 635         rte_spinlock_lock(&sd->lock);
 636         switch (rte_eal_process_type()) {
 637         case RTE_PROC_PRIMARY:
 638                 if (sd->init_done)
 639                         break;
 640                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 641                                            mlx5_mp_os_primary_handle);
 642                 if (ret)
 643                         goto out;
 644                 sd->init_done = true;
 645                 break;
 646         case RTE_PROC_SECONDARY:
 647                 if (ld->init_done)
 648                         break;
 649                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 650                                              mlx5_mp_os_secondary_handle);
 651                 if (ret)
 652                         goto out;
 653                 ++sd->secondary_cnt;
 654                 ld->init_done = true;
 655                 break;
 656         default:
 657                 break;
 658         }
 659 out:
 660         rte_spinlock_unlock(&sd->lock);
 661         return ret;
 662 }
 663
 664 /**
 665  * DR flow drop action support detect.
 666  *
 667  * @param dev
 668  *   Pointer to rte_eth_dev structure.
 669  *
 670  */
 671 static void
 672 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 673 {
 674 #ifdef HAVE_MLX5DV_DR
 675         struct mlx5_priv *priv = dev->data->dev_private;
 676
 677         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 678                 return;
 679         /**
 680          * DR supports drop action placeholder when it is supported;
 681          * otherwise, use the queue drop action.
 682          */
 683         if (!priv->sh->drop_action_check_flag) {
 684                 if (!mlx5_flow_discover_dr_action_support(dev))
 685                         priv->sh->dr_drop_action_en = 1;
 686                 priv->sh->drop_action_check_flag = 1;
 687         }
 688         if (priv->sh->dr_drop_action_en)
 689                 priv->root_drop_action = priv->sh->dr_drop_action;
 690         else
 691                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 692 #endif
 693 }
 694
 695 static void
 696 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 697 {
 698         struct mlx5_priv *priv = dev->data->dev_private;
 699         void *ctx = priv->sh->cdev->ctx;
 700
 701         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 702         if (!priv->q_counters) {
 703                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 704                 struct ibv_wq *wq;
 705
 706                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 707                         "by DevX - fall-back to use the kernel driver global "
 708                         "queue counter.", dev->data->port_id);
 709                 /* Create WQ by kernel and query its queue counter ID. */
 710                 if (cq) {
 711                         wq = mlx5_glue->create_wq(ctx,
 712                                                   &(struct ibv_wq_init_attr){
 713                                                     .wq_type = IBV_WQT_RQ,
 714                                                     .max_wr = 1,
 715                                                     .max_sge = 1,
 716                                                     .pd = priv->sh->cdev->pd,
 717                                                     .cq = cq,
 718                                                 });
 719                         if (wq) {
 720                                 /* Counter is assigned only on RDY state. */
 721                                 int ret = mlx5_glue->modify_wq(wq,
 722                                                  &(struct ibv_wq_attr){
 723                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 724                                                  .wq_state = IBV_WQS_RDY,
 725                                                 });
 726
 727                                 if (ret == 0)
 728                                         mlx5_devx_cmd_wq_query(wq,
 729                                                          &priv->counter_set_id);
 730                                 claim_zero(mlx5_glue->destroy_wq(wq));
 731                         }
 732                         claim_zero(mlx5_glue->destroy_cq(cq));
 733                 }
 734         } else {
 735                 priv->counter_set_id = priv->q_counters->id;
 736         }
 737         if (priv->counter_set_id == 0)
 738                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 739                         "available.", dev->data->port_id);
 740 }
 741
 742 /**
 743  * Check if representor spawn info match devargs.
 744  *
 745  * @param spawn
 746  *   Verbs device parameters (name, port, switch_info) to spawn.
 747  * @param eth_da
 748  *   Device devargs to probe.
 749  *
 750  * @return
 751  *   Match result.
 752  */
 753 static bool
 754 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 755                        struct rte_eth_devargs *eth_da)
 756 {
 757         struct mlx5_switch_info *switch_info = &spawn->info;
 758         unsigned int p, f;
 759         uint16_t id;
 760         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 761                                                       eth_da->type);
 762
 763         switch (eth_da->type) {
 764         case RTE_ETH_REPRESENTOR_SF:
 765                 if (!(spawn->info.port_name == -1 &&
 766                       switch_info->name_type ==
 767                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 768                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 769                         rte_errno = EBUSY;
 770                         return false;
 771                 }
 772                 break;
 773         case RTE_ETH_REPRESENTOR_VF:
 774                 /* Allows HPF representor index -1 as exception. */
 775                 if (!(spawn->info.port_name == -1 &&
 776                       switch_info->name_type ==
 777                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 778                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 779                         rte_errno = EBUSY;
 780                         return false;
 781                 }
 782                 break;
 783         case RTE_ETH_REPRESENTOR_NONE:
 784                 rte_errno = EBUSY;
 785                 return false;
 786         default:
 787                 rte_errno = ENOTSUP;
 788                 DRV_LOG(ERR, "unsupported representor type");
 789                 return false;
 790         }
 791         /* Check representor ID: */
 792         for (p = 0; p < eth_da->nb_ports; ++p) {
 793                 if (spawn->pf_bond < 0) {
 794                         /* For non-LAG mode, allow and ignore pf. */
 795                         switch_info->pf_num = eth_da->ports[p];
 796                         repr_id = mlx5_representor_id_encode(switch_info,
 797                                                              eth_da->type);
 798                 }
 799                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 800                         id = MLX5_REPRESENTOR_ID
 801                                 (eth_da->ports[p], eth_da->type,
 802                                  eth_da->representor_ports[f]);
 803                         if (repr_id == id)
 804                                 return true;
 805                 }
 806         }
 807         rte_errno = EBUSY;
 808         return false;
 809 }
 810
 811 /**
 812  * Spawn an Ethernet device from Verbs information.
 813  *
 814  * @param dpdk_dev
 815  *   Backing DPDK device.
 816  * @param spawn
 817  *   Verbs device parameters (name, port, switch_info) to spawn.
 818  * @param config
 819  *   Device configuration parameters.
 820  * @param eth_da
 821  *   Device arguments.
 822  *
 823  * @return
 824  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 825  *   is set. The following errors are defined:
 826  *
 827  *   EBUSY: device is not supposed to be spawned.
 828  *   EEXIST: device is already spawned
 829  */
 830 static struct rte_eth_dev *
 831 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 832                struct mlx5_dev_spawn_data *spawn,
 833                struct mlx5_dev_config *config,
 834                struct rte_eth_devargs *eth_da)
 835 {
 836         const struct mlx5_switch_info *switch_info = &spawn->info;
 837         struct mlx5_dev_ctx_shared *sh = NULL;
 838         struct mlx5_hca_attr *hca_attr = &spawn->cdev->config.hca_attr;
 839         struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 840         struct rte_eth_dev *eth_dev = NULL;
 841         struct mlx5_priv *priv = NULL;
 842         int err = 0;
 843         unsigned int hw_padding = 0;
 844         unsigned int mps;
 845         unsigned int mpls_en = 0;
 846         unsigned int swp = 0;
 847         unsigned int mprq = 0;
 848         struct rte_ether_addr mac;
 849         char name[RTE_ETH_NAME_MAX_LEN];
 850         int own_domain_id = 0;
 851         uint16_t port_id;
 852         struct mlx5_port_info vport_info = { .query_flags = 0 };
 853         int nl_rdma = -1;
 854         int i;
 855
 856         /* Determine if this port representor is supposed to be spawned. */
 857         if (switch_info->representor && dpdk_dev->devargs &&
 858             !mlx5_representor_match(spawn, eth_da))
 859                 return NULL;
 860         /* Build device name. */
 861         if (spawn->pf_bond < 0) {
 862                 /* Single device. */
 863                 if (!switch_info->representor)
 864                         strlcpy(name, dpdk_dev->name, sizeof(name));
 865                 else
 866                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 867                                  dpdk_dev->name,
 868                                  switch_info->name_type ==
 869                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 870                                  switch_info->port_name);
 871         } else {
 872                 /* Bonding device. */
 873                 if (!switch_info->representor) {
 874                         err = snprintf(name, sizeof(name), "%s_%s",
 875                                        dpdk_dev->name, spawn->phys_dev_name);
 876                 } else {
 877                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 878                                 dpdk_dev->name, spawn->phys_dev_name,
 879                                 switch_info->ctrl_num,
 880                                 switch_info->pf_num,
 881                                 switch_info->name_type ==
 882                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 883                                 switch_info->port_name);
 884                 }
 885         }
 886         if (err >= (int)sizeof(name))
 887                 DRV_LOG(WARNING, "device name overflow %s", name);
 888         /* check if the device is already spawned */
 889         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 890                 rte_errno = EEXIST;
 891                 return NULL;
 892         }
 893         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 894         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 895                 struct mlx5_mp_id mp_id;
 896
 897                 eth_dev = rte_eth_dev_attach_secondary(name);
 898                 if (eth_dev == NULL) {
 899                         DRV_LOG(ERR, "can not attach rte ethdev");
 900                         rte_errno = ENOMEM;
 901                         return NULL;
 902                 }
 903                 eth_dev->device = dpdk_dev;
 904                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 905                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 906                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 907                 err = mlx5_proc_priv_init(eth_dev);
 908                 if (err)
 909                         return NULL;
 910                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
 911                 /* Receive command fd from primary process */
 912                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 913                 if (err < 0)
 914                         goto err_secondary;
 915                 /* Remap UAR for Tx queues. */
 916                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 917                 if (err)
 918                         goto err_secondary;
 919                 /*
 920                  * Ethdev pointer is still required as input since
 921                  * the primary device is not accessible from the
 922                  * secondary process.
 923                  */
 924                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 925                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 926                 return eth_dev;
 927 err_secondary:
 928                 mlx5_dev_close(eth_dev);
 929                 return NULL;
 930         }
 931         /* Process parameters. */
 932         err = mlx5_args(config, dpdk_dev->devargs);
 933         if (err) {
 934                 DRV_LOG(ERR, "failed to process device arguments: %s",
 935                         strerror(rte_errno));
 936                 return NULL;
 937         }
 938         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 939         if (!sh)
 940                 return NULL;
 941         /* Update final values for devargs before check sibling config. */
 942 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
 943         if (config->dv_flow_en) {
 944                 DRV_LOG(WARNING, "DV flow is not supported.");
 945                 config->dv_flow_en = 0;
 946         }
 947 #endif
 948 #ifdef HAVE_MLX5DV_DR_ESWITCH
 949         if (!(hca_attr->eswitch_manager && config->dv_flow_en && sh->esw_mode))
 950                 config->dv_esw_en = 0;
 951 #else
 952         config->dv_esw_en = 0;
 953 #endif
 954         if (config->dv_miss_info && config->dv_esw_en)
 955                 config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 956         if (!config->dv_esw_en &&
 957             config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
 958                 DRV_LOG(WARNING,
 959                         "Metadata mode %u is not supported (no E-Switch).",
 960                         config->dv_xmeta_en);
 961                 config->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
 962         }
 963         /* Check sibling device configurations. */
 964         err = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);
 965         if (err)
 966                 goto error;
 967 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 968         config->dest_tir = 1;
 969 #endif
 970         /*
 971          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 972          * as all ConnectX-5 devices.
 973          */
 974         if (sh->dev_cap.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 975                 if (sh->dev_cap.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 976                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 977                         mps = MLX5_MPW_ENHANCED;
 978                 } else {
 979                         DRV_LOG(DEBUG, "MPW is supported");
 980                         mps = MLX5_MPW;
 981                 }
 982         } else {
 983                 DRV_LOG(DEBUG, "MPW isn't supported");
 984                 mps = MLX5_MPW_DISABLED;
 985         }
 986 #ifdef HAVE_IBV_MLX5_MOD_SWP
 987         if (sh->dev_cap.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 988                 swp = sh->dev_cap.sw_parsing_offloads;
 989         DRV_LOG(DEBUG, "SWP support: %u", swp);
 990 #endif
 991         config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
 992                 MLX5_SW_PARSING_TSO_CAP);
 993 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 994         if (sh->dev_cap.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 995                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 996                         sh->dev_cap.min_single_stride_log_num_of_bytes);
 997                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 998                         sh->dev_cap.max_single_stride_log_num_of_bytes);
 999                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1000                         sh->dev_cap.min_single_wqe_log_num_of_strides);
1001                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1002                         sh->dev_cap.max_single_wqe_log_num_of_strides);
1003                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1004                         sh->dev_cap.stride_supported_qpts);
1005                 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %d",
1006                         config->mprq.log_min_stride_wqe_size);
1007                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1008                 mprq = 1;
1009                 config->mprq.log_min_stride_size =
1010                         sh->dev_cap.min_single_stride_log_num_of_bytes;
1011                 config->mprq.log_max_stride_size =
1012                         sh->dev_cap.max_single_stride_log_num_of_bytes;
1013                 config->mprq.log_min_stride_num =
1014                         sh->dev_cap.min_single_wqe_log_num_of_strides;
1015                 config->mprq.log_max_stride_num =
1016                         sh->dev_cap.max_single_wqe_log_num_of_strides;
1017         }
1018 #endif
1019 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1020         if (sh->dev_cap.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1021                 config->tunnel_en = sh->dev_cap.tunnel_offloads_caps &
1022                              (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1023                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1024                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1025         }
1026         if (config->tunnel_en) {
1027                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1028                 config->tunnel_en &
1029                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1030                 config->tunnel_en &
1031                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1032                 config->tunnel_en &
1033                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1034                 );
1035         } else {
1036                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1037         }
1038 #else
1039         DRV_LOG(WARNING,
1040                 "tunnel offloading disabled due to old OFED/rdma-core version");
1041 #endif
1042 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1043         mpls_en = ((sh->dev_cap.tunnel_offloads_caps &
1044                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1045                    (sh->dev_cap.tunnel_offloads_caps &
1046                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1047         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1048                 mpls_en ? "" : "not ");
1049 #else
1050         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1051                 " old OFED/rdma-core version or firmware configuration");
1052 #endif
1053         config->mpls_en = mpls_en;
1054         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1055         /* Check port status. */
1056         if (spawn->phys_port <= UINT8_MAX) {
1057                 /* Legacy Verbs api only support u8 port number. */
1058                 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1059                                             &port_attr);
1060                 if (err) {
1061                         DRV_LOG(ERR, "port query failed: %s", strerror(err));
1062                         goto error;
1063                 }
1064                 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1065                         DRV_LOG(ERR, "port is not configured in Ethernet mode");
1066                         err = EINVAL;
1067                         goto error;
1068                 }
1069         } else if (nl_rdma >= 0) {
1070                 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1071                 err = mlx5_nl_port_state(nl_rdma,
1072                         spawn->phys_dev_name,
1073                         spawn->phys_port);
1074                 if (err < 0) {
1075                         DRV_LOG(INFO, "Failed to get netlink port state: %s",
1076                                 strerror(rte_errno));
1077                         err = -rte_errno;
1078                         goto error;
1079                 }
1080                 port_attr.state = (enum ibv_port_state)err;
1081         }
1082         if (port_attr.state != IBV_PORT_ACTIVE)
1083                 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1084                         mlx5_glue->port_state_str(port_attr.state),
1085                         port_attr.state);
1086         /* Allocate private eth device data. */
1087         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1088                            sizeof(*priv),
1089                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1090         if (priv == NULL) {
1091                 DRV_LOG(ERR, "priv allocation failure");
1092                 err = ENOMEM;
1093                 goto error;
1094         }
1095         priv->sh = sh;
1096         priv->dev_port = spawn->phys_port;
1097         priv->pci_dev = spawn->pci_dev;
1098         priv->mtu = RTE_ETHER_MTU;
1099         /* Some internal functions rely on Netlink sockets, open them now. */
1100         priv->nl_socket_rdma = nl_rdma;
1101         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1102         priv->representor = !!switch_info->representor;
1103         priv->master = !!switch_info->master;
1104         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1105         priv->vport_meta_tag = 0;
1106         priv->vport_meta_mask = 0;
1107         priv->pf_bond = spawn->pf_bond;
1108
1109         DRV_LOG(DEBUG,
1110                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1111                 priv->dev_port, dpdk_dev->bus->name,
1112                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1113                 priv->master, priv->representor, priv->pf_bond);
1114
1115         /*
1116          * If we have E-Switch we should determine the vport attributes.
1117          * E-Switch may use either source vport field or reg_c[0] metadata
1118          * register to match on vport index. The engaged part of metadata
1119          * register is defined by mask.
1120          */
1121         if (sh->esw_mode) {
1122                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1123                                                  spawn->phys_port,
1124                                                  &vport_info);
1125                 if (err) {
1126                         DRV_LOG(WARNING,
1127                                 "Cannot query devx port %d on device %s",
1128                                 spawn->phys_port, spawn->phys_dev_name);
1129                         vport_info.query_flags = 0;
1130                 }
1131         }
1132         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1133                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1134                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1135                 if (!priv->vport_meta_mask) {
1136                         DRV_LOG(ERR,
1137                                 "vport zero mask for port %d on bonding device %s",
1138                                 spawn->phys_port, spawn->phys_dev_name);
1139                         err = ENOTSUP;
1140                         goto error;
1141                 }
1142                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1143                         DRV_LOG(ERR,
1144                                 "Invalid vport tag for port %d on bonding device %s",
1145                                 spawn->phys_port, spawn->phys_dev_name);
1146                         err = ENOTSUP;
1147                         goto error;
1148                 }
1149         }
1150         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1151                 priv->vport_id = vport_info.vport_id;
1152         } else if (spawn->pf_bond >= 0 && sh->esw_mode) {
1153                 DRV_LOG(ERR,
1154                         "Cannot deduce vport index for port %d on bonding device %s",
1155                         spawn->phys_port, spawn->phys_dev_name);
1156                 err = ENOTSUP;
1157                 goto error;
1158         } else {
1159                 /*
1160                  * Suppose vport index in compatible way. Kernel/rdma_core
1161                  * support single E-Switch per PF configurations only and
1162                  * vport_id field contains the vport index for associated VF,
1163                  * which is deduced from representor port name.
1164                  * For example, let's have the IB device port 10, it has
1165                  * attached network device eth0, which has port name attribute
1166                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1167                  * as 3 (2+1). This assigning schema should be changed if the
1168                  * multiple E-Switch instances per PF configurations or/and PCI
1169                  * subfunctions are added.
1170                  */
1171                 priv->vport_id = switch_info->representor ?
1172                                  switch_info->port_name + 1 : -1;
1173         }
1174         priv->representor_id = mlx5_representor_id_encode(switch_info,
1175                                                           eth_da->type);
1176         /*
1177          * Look for sibling devices in order to reuse their switch domain
1178          * if any, otherwise allocate one.
1179          */
1180         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1181                 const struct mlx5_priv *opriv =
1182                         rte_eth_devices[port_id].data->dev_private;
1183
1184                 if (!opriv ||
1185                     opriv->sh != priv->sh ||
1186                         opriv->domain_id ==
1187                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1188                         continue;
1189                 priv->domain_id = opriv->domain_id;
1190                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1191                         priv->dev_port, priv->domain_id);
1192                 break;
1193         }
1194         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1195                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1196                 if (err) {
1197                         err = rte_errno;
1198                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1199                                 strerror(rte_errno));
1200                         goto error;
1201                 }
1202                 own_domain_id = 1;
1203                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1204                         priv->dev_port, priv->domain_id);
1205         }
1206         config->hw_csum = !!(sh->dev_cap.device_cap_flags_ex &
1207                             IBV_DEVICE_RAW_IP_CSUM);
1208         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1209                 (config->hw_csum ? "" : "not "));
1210 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1211         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1212         DRV_LOG(DEBUG, "counters are not supported");
1213 #endif
1214         config->ind_table_max_size =
1215                 sh->dev_cap.max_rwq_indirection_table_size;
1216         /*
1217          * Remove this check once DPDK supports larger/variable
1218          * indirection tables.
1219          */
1220         if (config->ind_table_max_size > (unsigned int)RTE_ETH_RSS_RETA_SIZE_512)
1221                 config->ind_table_max_size = RTE_ETH_RSS_RETA_SIZE_512;
1222         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1223                 config->ind_table_max_size);
1224         config->hw_vlan_strip = !!(sh->dev_cap.raw_packet_caps &
1225                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1226         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1227                 (config->hw_vlan_strip ? "" : "not "));
1228         config->hw_fcs_strip = !!(sh->dev_cap.raw_packet_caps &
1229                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1230 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1231         hw_padding = !!sh->dev_cap.rx_pad_end_addr_align;
1232 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1233         hw_padding = !!(sh->dev_cap.device_cap_flags_ex &
1234                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1235 #endif
1236         if (config->hw_padding && !hw_padding) {
1237                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1238                 config->hw_padding = 0;
1239         } else if (config->hw_padding) {
1240                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1241         }
1242         config->tso = (sh->dev_cap.max_tso > 0 &&
1243                       (sh->dev_cap.tso_supported_qpts &
1244                        (1 << IBV_QPT_RAW_PACKET)));
1245         if (config->tso)
1246                 config->tso_max_payload_sz = sh->dev_cap.max_tso;
1247         /*
1248          * MPW is disabled by default, while the Enhanced MPW is enabled
1249          * by default.
1250          */
1251         if (config->mps == MLX5_ARG_UNSET)
1252                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1253                                                           MLX5_MPW_DISABLED;
1254         else
1255                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1256         DRV_LOG(INFO, "%sMPS is %s",
1257                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1258                 config->mps == MLX5_MPW ? "legacy " : "",
1259                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1260         if (sh->cdev->config.devx) {
1261                 sh->steering_format_version = hca_attr->steering_format_version;
1262                 /* Check for LRO support. */
1263                 if (config->dest_tir && hca_attr->lro_cap &&
1264                     config->dv_flow_en) {
1265                         /* TBD check tunnel lro caps. */
1266                         config->lro.supported = hca_attr->lro_cap;
1267                         DRV_LOG(DEBUG, "Device supports LRO");
1268                         /*
1269                          * If LRO timeout is not configured by application,
1270                          * use the minimal supported value.
1271                          */
1272                         if (!config->lro.timeout)
1273                                 config->lro.timeout =
1274                                        hca_attr->lro_timer_supported_periods[0];
1275                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1276                                 config->lro.timeout);
1277                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1278                                 "required for coalescing is %d bytes",
1279                                 hca_attr->lro_min_mss_size);
1280                 }
1281 #if defined(HAVE_MLX5DV_DR) && \
1282         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1283          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1284                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1285                     config->dv_flow_en) {
1286                         uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
1287                         /*
1288                          * Meter needs two REG_C's for color match and pre-sfx
1289                          * flow match. Here get the REG_C for color match.
1290                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1291                          */
1292                         reg_c_mask &= 0xfc;
1293                         if (__builtin_popcount(reg_c_mask) < 1) {
1294                                 priv->mtr_en = 0;
1295                                 DRV_LOG(WARNING, "No available register for"
1296                                         " meter.");
1297                         } else {
1298                                 /*
1299                                  * The meter color register is used by the
1300                                  * flow-hit feature as well.
1301                                  * The flow-hit feature must use REG_C_3
1302                                  * Prefer REG_C_3 if it is available.
1303                                  */
1304                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1305                                         priv->mtr_color_reg = REG_C_3;
1306                                 else
1307                                         priv->mtr_color_reg = ffs(reg_c_mask)
1308                                                               - 1 + REG_C_0;
1309                                 priv->mtr_en = 1;
1310                                 priv->mtr_reg_share = hca_attr->qos.flow_meter;
1311                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1312                                         priv->mtr_color_reg);
1313                         }
1314                 }
1315                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
1316                         uint32_t log_obj_size =
1317                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1318                         if (log_obj_size >=
1319                             hca_attr->qos.log_meter_aso_granularity &&
1320                             log_obj_size <=
1321                             hca_attr->qos.log_meter_aso_max_alloc)
1322                                 sh->meter_aso_en = 1;
1323                 }
1324                 if (priv->mtr_en) {
1325                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1326                         if (err) {
1327                                 err = -err;
1328                                 goto error;
1329                         }
1330                 }
1331                 if (hca_attr->flow.tunnel_header_0_1)
1332                         sh->tunnel_header_0_1 = 1;
1333 #endif
1334 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1335                 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) {
1336                         sh->flow_hit_aso_en = 1;
1337                         err = mlx5_flow_aso_age_mng_init(sh);
1338                         if (err) {
1339                                 err = -err;
1340                                 goto error;
1341                         }
1342                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1343                 }
1344 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1345 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1346         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1347                 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) {
1348                         err = mlx5_flow_aso_ct_mng_init(sh);
1349                         if (err) {
1350                                 err = -err;
1351                                 goto error;
1352                         }
1353                         DRV_LOG(DEBUG, "CT ASO is supported.");
1354                         sh->ct_aso_en = 1;
1355                 }
1356 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1357 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1358                 if (hca_attr->log_max_ft_sampler_num > 0  &&
1359                     config->dv_flow_en) {
1360                         priv->sampler_en = 1;
1361                         DRV_LOG(DEBUG, "Sampler enabled!");
1362                 } else {
1363                         priv->sampler_en = 0;
1364                         if (!hca_attr->log_max_ft_sampler_num)
1365                                 DRV_LOG(WARNING,
1366                                         "No available register for sampler.");
1367                         else
1368                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1369                 }
1370 #endif
1371         }
1372         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1373             !(sh->dev_cap.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1374                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1375                 config->cqe_comp = 0;
1376         }
1377         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1378             (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_flow_tag)) {
1379                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1380                                  " format isn't supported.");
1381                 config->cqe_comp = 0;
1382         }
1383         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1384             (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_l3_l4_tag)) {
1385                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1386                                  " format isn't supported.");
1387                 config->cqe_comp = 0;
1388         }
1389         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1390                         config->cqe_comp ? "" : "not ");
1391         if (config->tx_pp) {
1392                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1393                         hca_attr->dev_freq_khz);
1394                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1395                         hca_attr->qos.packet_pacing ? "" : "not ");
1396                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1397                         hca_attr->cross_channel ? "" : "not ");
1398                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1399                         hca_attr->wqe_index_ignore ? "" : "not ");
1400                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1401                         hca_attr->non_wire_sq ? "" : "not ");
1402                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1403                         hca_attr->log_max_static_sq_wq ? "" : "not ",
1404                         hca_attr->log_max_static_sq_wq);
1405                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1406                         hca_attr->qos.wqe_rate_pp ? "" : "not ");
1407                 if (!sh->cdev->config.devx) {
1408                         DRV_LOG(ERR, "DevX is required for packet pacing");
1409                         err = ENODEV;
1410                         goto error;
1411                 }
1412                 if (!hca_attr->qos.packet_pacing) {
1413                         DRV_LOG(ERR, "Packet pacing is not supported");
1414                         err = ENODEV;
1415                         goto error;
1416                 }
1417                 if (!hca_attr->cross_channel) {
1418                         DRV_LOG(ERR, "Cross channel operations are"
1419                                      " required for packet pacing");
1420                         err = ENODEV;
1421                         goto error;
1422                 }
1423                 if (!hca_attr->wqe_index_ignore) {
1424                         DRV_LOG(ERR, "WQE index ignore feature is"
1425                                      " required for packet pacing");
1426                         err = ENODEV;
1427                         goto error;
1428                 }
1429                 if (!hca_attr->non_wire_sq) {
1430                         DRV_LOG(ERR, "Non-wire SQ feature is"
1431                                      " required for packet pacing");
1432                         err = ENODEV;
1433                         goto error;
1434                 }
1435                 if (!hca_attr->log_max_static_sq_wq) {
1436                         DRV_LOG(ERR, "Static WQE SQ feature is"
1437                                      " required for packet pacing");
1438                         err = ENODEV;
1439                         goto error;
1440                 }
1441                 if (!hca_attr->qos.wqe_rate_pp) {
1442                         DRV_LOG(ERR, "WQE rate mode is required"
1443                                      " for packet pacing");
1444                         err = ENODEV;
1445                         goto error;
1446                 }
1447 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1448                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1449                              " can't create queues for packet pacing");
1450                 err = ENODEV;
1451                 goto error;
1452 #endif
1453         }
1454         if (config->std_delay_drop || config->hp_delay_drop) {
1455                 if (!hca_attr->rq_delay_drop) {
1456                         config->std_delay_drop = 0;
1457                         config->hp_delay_drop = 0;
1458                         DRV_LOG(WARNING,
1459                                 "dev_port-%u: Rxq delay drop is not supported",
1460                                 priv->dev_port);
1461                 }
1462         }
1463         if (sh->cdev->config.devx)
1464                 mlx5_rt_timestamp_config(sh, config, hca_attr);
1465         /*
1466          * If HW has bug working with tunnel packet decapsulation and
1467          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1468          * bit. Then RTE_ETH_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1469          */
1470         if (hca_attr->scatter_fcs_w_decap_disable && config->decap_en)
1471                 config->hw_fcs_strip = 0;
1472         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1473                 (config->hw_fcs_strip ? "" : "not "));
1474         if (config->mprq.enabled && !mprq) {
1475                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1476                 config->mprq.enabled = 0;
1477         }
1478         if (config->max_dump_files_num == 0)
1479                 config->max_dump_files_num = 128;
1480         eth_dev = rte_eth_dev_allocate(name);
1481         if (eth_dev == NULL) {
1482                 DRV_LOG(ERR, "can not allocate rte ethdev");
1483                 err = ENOMEM;
1484                 goto error;
1485         }
1486         if (priv->representor) {
1487                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1488                 eth_dev->data->representor_id = priv->representor_id;
1489                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1490                         struct mlx5_priv *opriv =
1491                                 rte_eth_devices[port_id].data->dev_private;
1492                         if (opriv &&
1493                             opriv->master &&
1494                             opriv->domain_id == priv->domain_id &&
1495                             opriv->sh == priv->sh) {
1496                                 eth_dev->data->backer_port_id = port_id;
1497                                 break;
1498                         }
1499                 }
1500                 if (port_id >= RTE_MAX_ETHPORTS)
1501                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1502         }
1503         priv->mp_id.port_id = eth_dev->data->port_id;
1504         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1505         /*
1506          * Store associated network device interface index. This index
1507          * is permanent throughout the lifetime of device. So, we may store
1508          * the ifindex here and use the cached value further.
1509          */
1510         MLX5_ASSERT(spawn->ifindex);
1511         priv->if_index = spawn->ifindex;
1512         priv->lag_affinity_idx = sh->refcnt - 1;
1513         eth_dev->data->dev_private = priv;
1514         priv->dev_data = eth_dev->data;
1515         eth_dev->data->mac_addrs = priv->mac;
1516         eth_dev->device = dpdk_dev;
1517         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1518         /* Configure the first MAC address by default. */
1519         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1520                 DRV_LOG(ERR,
1521                         "port %u cannot get MAC address, is mlx5_en"
1522                         " loaded? (errno: %s)",
1523                         eth_dev->data->port_id, strerror(rte_errno));
1524                 err = ENODEV;
1525                 goto error;
1526         }
1527         DRV_LOG(INFO,
1528                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1529                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1530 #ifdef RTE_LIBRTE_MLX5_DEBUG
1531         {
1532                 char ifname[MLX5_NAMESIZE];
1533
1534                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1535                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1536                                 eth_dev->data->port_id, ifname);
1537                 else
1538                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1539                                 eth_dev->data->port_id);
1540         }
1541 #endif
1542         /* Get actual MTU if possible. */
1543         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1544         if (err) {
1545                 err = rte_errno;
1546                 goto error;
1547         }
1548         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1549                 priv->mtu);
1550         /* Initialize burst functions to prevent crashes before link-up. */
1551         eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1552         eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1553         eth_dev->dev_ops = &mlx5_dev_ops;
1554         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1555         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1556         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1557         /* Register MAC address. */
1558         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1559         if (config->vf && config->vf_nl_en)
1560                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1561                                       mlx5_ifindex(eth_dev),
1562                                       eth_dev->data->mac_addrs,
1563                                       MLX5_MAX_MAC_ADDRESSES);
1564         priv->ctrl_flows = 0;
1565         rte_spinlock_init(&priv->flow_list_lock);
1566         TAILQ_INIT(&priv->flow_meters);
1567         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1568         if (!priv->mtr_profile_tbl)
1569                 goto error;
1570         /* Bring Ethernet device up. */
1571         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1572                 eth_dev->data->port_id);
1573         mlx5_set_link_up(eth_dev);
1574         /*
1575          * Even though the interrupt handler is not installed yet,
1576          * interrupts will still trigger on the async_fd from
1577          * Verbs context returned by ibv_open_device().
1578          */
1579         mlx5_link_update(eth_dev, 0);
1580         /* Detect minimal data bytes to inline. */
1581         mlx5_set_min_inline(spawn, config);
1582         /* Store device configuration on private structure. */
1583         priv->config = *config;
1584         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1585                 icfg[i].release_mem_en = !!config->reclaim_mode;
1586                 if (config->reclaim_mode)
1587                         icfg[i].per_core_cache = 0;
1588                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1589                 if (!priv->flows[i])
1590                         goto error;
1591         }
1592         /* Create context for virtual machine VLAN workaround. */
1593         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1594         if (config->dv_flow_en) {
1595                 err = mlx5_alloc_shared_dr(priv);
1596                 if (err)
1597                         goto error;
1598                 if (mlx5_flex_item_port_init(eth_dev) < 0)
1599                         goto error;
1600         }
1601         if (sh->cdev->config.devx && config->dv_flow_en && config->dest_tir) {
1602                 priv->obj_ops = devx_obj_ops;
1603                 mlx5_queue_counter_id_prepare(eth_dev);
1604                 priv->obj_ops.lb_dummy_queue_create =
1605                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1606                 priv->obj_ops.lb_dummy_queue_release =
1607                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1608         } else if (spawn->max_port > UINT8_MAX) {
1609                 /* Verbs can't support ports larger than 255 by design. */
1610                 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1611                 err = ENOTSUP;
1612                 goto error;
1613         } else {
1614                 priv->obj_ops = ibv_obj_ops;
1615         }
1616         if (config->tx_pp &&
1617             priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1618                 /*
1619                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1620                  * packet pacing and already checked above.
1621                  * Hence, we should only make sure the SQs will be created
1622                  * with DevX, not with Verbs.
1623                  * Verbs allocates the SQ UAR on its own and it can't be shared
1624                  * with Clock Queue UAR as required for Tx scheduling.
1625                  */
1626                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1627                 err = ENODEV;
1628                 goto error;
1629         }
1630         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1631         if (!priv->drop_queue.hrxq)
1632                 goto error;
1633         /* Port representor shares the same max priority with pf port. */
1634         if (!priv->sh->flow_priority_check_flag) {
1635                 /* Supported Verbs flow priority number detection. */
1636                 err = mlx5_flow_discover_priorities(eth_dev);
1637                 priv->sh->flow_max_priority = err;
1638                 priv->sh->flow_priority_check_flag = 1;
1639         } else {
1640                 err = priv->sh->flow_max_priority;
1641         }
1642         if (err < 0) {
1643                 err = -err;
1644                 goto error;
1645         }
1646         mlx5_set_metadata_mask(eth_dev);
1647         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1648             !priv->sh->dv_regc0_mask) {
1649                 DRV_LOG(ERR, "metadata mode %u is not supported "
1650                              "(no metadata reg_c[0] is available)",
1651                              priv->config.dv_xmeta_en);
1652                         err = ENOTSUP;
1653                         goto error;
1654         }
1655         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1656                                        mlx5_hrxq_create_cb,
1657                                        mlx5_hrxq_match_cb,
1658                                        mlx5_hrxq_remove_cb,
1659                                        mlx5_hrxq_clone_cb,
1660                                        mlx5_hrxq_clone_free_cb);
1661         if (!priv->hrxqs)
1662                 goto error;
1663         rte_rwlock_init(&priv->ind_tbls_lock);
1664         /* Query availability of metadata reg_c's. */
1665         if (!priv->sh->metadata_regc_check_flag) {
1666                 err = mlx5_flow_discover_mreg_c(eth_dev);
1667                 if (err < 0) {
1668                         err = -err;
1669                         goto error;
1670                 }
1671         }
1672         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1673                 DRV_LOG(DEBUG,
1674                         "port %u extensive metadata register is not supported",
1675                         eth_dev->data->port_id);
1676                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1677                         DRV_LOG(ERR, "metadata mode %u is not supported "
1678                                      "(no metadata registers available)",
1679                                      priv->config.dv_xmeta_en);
1680                         err = ENOTSUP;
1681                         goto error;
1682                 }
1683         }
1684         if (priv->config.dv_flow_en &&
1685             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1686             mlx5_flow_ext_mreg_supported(eth_dev) &&
1687             priv->sh->dv_regc0_mask) {
1688                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1689                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1690                                                       false, true, eth_dev,
1691                                                       flow_dv_mreg_create_cb,
1692                                                       flow_dv_mreg_match_cb,
1693                                                       flow_dv_mreg_remove_cb,
1694                                                       flow_dv_mreg_clone_cb,
1695                                                     flow_dv_mreg_clone_free_cb);
1696                 if (!priv->mreg_cp_tbl) {
1697                         err = ENOMEM;
1698                         goto error;
1699                 }
1700         }
1701         rte_spinlock_init(&priv->shared_act_sl);
1702         mlx5_flow_counter_mode_config(eth_dev);
1703         mlx5_flow_drop_action_config(eth_dev);
1704         if (priv->config.dv_flow_en)
1705                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1706         return eth_dev;
1707 error:
1708         if (priv) {
1709                 if (priv->mreg_cp_tbl)
1710                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1711                 if (priv->sh)
1712                         mlx5_os_free_shared_dr(priv);
1713                 if (priv->nl_socket_route >= 0)
1714                         close(priv->nl_socket_route);
1715                 if (priv->vmwa_context)
1716                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1717                 if (eth_dev && priv->drop_queue.hrxq)
1718                         mlx5_drop_action_destroy(eth_dev);
1719                 if (priv->mtr_profile_tbl)
1720                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1721                 if (own_domain_id)
1722                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1723                 if (priv->hrxqs)
1724                         mlx5_list_destroy(priv->hrxqs);
1725                 if (eth_dev && priv->flex_item_map)
1726                         mlx5_flex_item_port_cleanup(eth_dev);
1727                 mlx5_free(priv);
1728                 if (eth_dev != NULL)
1729                         eth_dev->data->dev_private = NULL;
1730         }
1731         if (eth_dev != NULL) {
1732                 /* mac_addrs must not be freed alone because part of
1733                  * dev_private
1734                  **/
1735                 eth_dev->data->mac_addrs = NULL;
1736                 rte_eth_dev_release_port(eth_dev);
1737         }
1738         if (sh)
1739                 mlx5_free_shared_dev_ctx(sh);
1740         if (nl_rdma >= 0)
1741                 close(nl_rdma);
1742         MLX5_ASSERT(err > 0);
1743         rte_errno = err;
1744         return NULL;
1745 }
1746
1747 /**
1748  * Comparison callback to sort device data.
1749  *
1750  * This is meant to be used with qsort().
1751  *
1752  * @param a[in]
1753  *   Pointer to pointer to first data object.
1754  * @param b[in]
1755  *   Pointer to pointer to second data object.
1756  *
1757  * @return
1758  *   0 if both objects are equal, less than 0 if the first argument is less
1759  *   than the second, greater than 0 otherwise.
1760  */
1761 static int
1762 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1763 {
1764         const struct mlx5_switch_info *si_a =
1765                 &((const struct mlx5_dev_spawn_data *)a)->info;
1766         const struct mlx5_switch_info *si_b =
1767                 &((const struct mlx5_dev_spawn_data *)b)->info;
1768         int ret;
1769
1770         /* Master device first. */
1771         ret = si_b->master - si_a->master;
1772         if (ret)
1773                 return ret;
1774         /* Then representor devices. */
1775         ret = si_b->representor - si_a->representor;
1776         if (ret)
1777                 return ret;
1778         /* Unidentified devices come last in no specific order. */
1779         if (!si_a->representor)
1780                 return 0;
1781         /* Order representors by name. */
1782         return si_a->port_name - si_b->port_name;
1783 }
1784
1785 /**
1786  * Match PCI information for possible slaves of bonding device.
1787  *
1788  * @param[in] ibdev_name
1789  *   Name of Infiniband device.
1790  * @param[in] pci_dev
1791  *   Pointer to primary PCI address structure to match.
1792  * @param[in] nl_rdma
1793  *   Netlink RDMA group socket handle.
1794  * @param[in] owner
1795  *   Representor owner PF index.
1796  * @param[out] bond_info
1797  *   Pointer to bonding information.
1798  *
1799  * @return
1800  *   negative value if no bonding device found, otherwise
1801  *   positive index of slave PF in bonding.
1802  */
1803 static int
1804 mlx5_device_bond_pci_match(const char *ibdev_name,
1805                            const struct rte_pci_addr *pci_dev,
1806                            int nl_rdma, uint16_t owner,
1807                            struct mlx5_bond_info *bond_info)
1808 {
1809         char ifname[IF_NAMESIZE + 1];
1810         unsigned int ifindex;
1811         unsigned int np, i;
1812         FILE *bond_file = NULL, *file;
1813         int pf = -1;
1814         int ret;
1815         uint8_t cur_guid[32] = {0};
1816         uint8_t guid[32] = {0};
1817
1818         /*
1819          * Try to get master device name. If something goes wrong suppose
1820          * the lack of kernel support and no bonding devices.
1821          */
1822         memset(bond_info, 0, sizeof(*bond_info));
1823         if (nl_rdma < 0)
1824                 return -1;
1825         if (!strstr(ibdev_name, "bond"))
1826                 return -1;
1827         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1828         if (!np)
1829                 return -1;
1830         if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
1831                 return -1;
1832         /*
1833          * The master device might not be on the predefined port(not on port
1834          * index 1, it is not guaranteed), we have to scan all Infiniband
1835          * device ports and find master.
1836          */
1837         for (i = 1; i <= np; ++i) {
1838                 /* Check whether Infiniband port is populated. */
1839                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1840                 if (!ifindex)
1841                         continue;
1842                 if (!if_indextoname(ifindex, ifname))
1843                         continue;
1844                 /* Try to read bonding slave names from sysfs. */
1845                 MKSTR(slaves,
1846                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1847                 bond_file = fopen(slaves, "r");
1848                 if (bond_file)
1849                         break;
1850         }
1851         if (!bond_file)
1852                 return -1;
1853         /* Use safe format to check maximal buffer length. */
1854         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1855         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1856                 char tmp_str[IF_NAMESIZE + 32];
1857                 struct rte_pci_addr pci_addr;
1858                 struct mlx5_switch_info info;
1859                 int ret;
1860
1861                 /* Process slave interface names in the loop. */
1862                 snprintf(tmp_str, sizeof(tmp_str),
1863                          "/sys/class/net/%s", ifname);
1864                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1865                         DRV_LOG(WARNING,
1866                                 "Cannot get PCI address for netdev \"%s\".",
1867                                 ifname);
1868                         continue;
1869                 }
1870                 /* Slave interface PCI address match found. */
1871                 snprintf(tmp_str, sizeof(tmp_str),
1872                          "/sys/class/net/%s/phys_port_name", ifname);
1873                 file = fopen(tmp_str, "rb");
1874                 if (!file)
1875                         break;
1876                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1877                 if (fscanf(file, "%32s", tmp_str) == 1)
1878                         mlx5_translate_port_name(tmp_str, &info);
1879                 fclose(file);
1880                 /* Only process PF ports. */
1881                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1882                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1883                         continue;
1884                 /* Check max bonding member. */
1885                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1886                         DRV_LOG(WARNING, "bonding index out of range, "
1887                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1888                                 tmp_str);
1889                         break;
1890                 }
1891                 /* Get ifindex. */
1892                 snprintf(tmp_str, sizeof(tmp_str),
1893                          "/sys/class/net/%s/ifindex", ifname);
1894                 file = fopen(tmp_str, "rb");
1895                 if (!file)
1896                         break;
1897                 ret = fscanf(file, "%u", &ifindex);
1898                 fclose(file);
1899                 if (ret != 1)
1900                         break;
1901                 /* Save bonding info. */
1902                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1903                         sizeof(bond_info->ports[0].ifname));
1904                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1905                 bond_info->ports[info.port_name].ifindex = ifindex;
1906                 bond_info->n_port++;
1907                 /*
1908                  * Under socket direct mode, bonding will use
1909                  * system_image_guid as identification.
1910                  * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
1911                  * All bonding members should have the same guid even if driver
1912                  * is using PCIe BDF.
1913                  */
1914                 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
1915                 if (ret < 0)
1916                         break;
1917                 else if (ret > 0) {
1918                         if (!memcmp(guid, cur_guid, sizeof(guid)) &&
1919                             owner == info.port_name &&
1920                             (owner != 0 || (owner == 0 &&
1921                             !rte_pci_addr_cmp(pci_dev, &pci_addr))))
1922                                 pf = info.port_name;
1923                 } else if (pci_dev->domain == pci_addr.domain &&
1924                     pci_dev->bus == pci_addr.bus &&
1925                     pci_dev->devid == pci_addr.devid &&
1926                     ((pci_dev->function == 0 &&
1927                       pci_dev->function + owner == pci_addr.function) ||
1928                      (pci_dev->function == owner &&
1929                       pci_addr.function == owner)))
1930                         pf = info.port_name;
1931         }
1932         if (pf >= 0) {
1933                 /* Get bond interface info */
1934                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1935                                            bond_info->ifname);
1936                 if (ret)
1937                         DRV_LOG(ERR, "unable to get bond info: %s",
1938                                 strerror(rte_errno));
1939                 else
1940                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1941                                 ifindex, bond_info->ifindex, bond_info->ifname);
1942         }
1943         if (owner == 0 && pf != 0) {
1944                 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner",
1945                                 pci_dev->domain, pci_dev->bus, pci_dev->devid,
1946                                 pci_dev->function);
1947         }
1948         return pf;
1949 }
1950
1951 static void
1952 mlx5_os_config_default(struct mlx5_dev_config *config,
1953                        struct mlx5_common_dev_config *cconf)
1954 {
1955         memset(config, 0, sizeof(*config));
1956         config->mps = MLX5_ARG_UNSET;
1957         config->cqe_comp = 1;
1958         config->rx_vec_en = 1;
1959         config->txq_inline_max = MLX5_ARG_UNSET;
1960         config->txq_inline_min = MLX5_ARG_UNSET;
1961         config->txq_inline_mpw = MLX5_ARG_UNSET;
1962         config->txqs_inline = MLX5_ARG_UNSET;
1963         config->vf_nl_en = 1;
1964         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1965         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1966         config->mprq.log_min_stride_wqe_size = cconf->devx ?
1967                                         cconf->hca_attr.log_min_stride_wqe_sz :
1968                                         MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
1969         config->mprq.log_stride_num = MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;
1970         config->dv_esw_en = 1;
1971         config->dv_flow_en = 1;
1972         config->decap_en = 1;
1973         config->log_hp_size = MLX5_ARG_UNSET;
1974         config->allow_duplicate_pattern = 1;
1975         config->std_delay_drop = 0;
1976         config->hp_delay_drop = 0;
1977 }
1978
1979 /**
1980  * Register a PCI device within bonding.
1981  *
1982  * This function spawns Ethernet devices out of a given PCI device and
1983  * bonding owner PF index.
1984  *
1985  * @param[in] cdev
1986  *   Pointer to common mlx5 device structure.
1987  * @param[in] req_eth_da
1988  *   Requested ethdev device argument.
1989  * @param[in] owner_id
1990  *   Requested owner PF port ID within bonding device, default to 0.
1991  *
1992  * @return
1993  *   0 on success, a negative errno value otherwise and rte_errno is set.
1994  */
1995 static int
1996 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
1997                      struct rte_eth_devargs *req_eth_da,
1998                      uint16_t owner_id)
1999 {
2000         struct ibv_device **ibv_list;
2001         /*
2002          * Number of found IB Devices matching with requested PCI BDF.
2003          * nd != 1 means there are multiple IB devices over the same
2004          * PCI device and we have representors and master.
2005          */
2006         unsigned int nd = 0;
2007         /*
2008          * Number of found IB device Ports. nd = 1 and np = 1..n means
2009          * we have the single multiport IB device, and there may be
2010          * representors attached to some of found ports.
2011          */
2012         unsigned int np = 0;
2013         /*
2014          * Number of DPDK ethernet devices to Spawn - either over
2015          * multiple IB devices or multiple ports of single IB device.
2016          * Actually this is the number of iterations to spawn.
2017          */
2018         unsigned int ns = 0;
2019         /*
2020          * Bonding device
2021          *   < 0 - no bonding device (single one)
2022          *  >= 0 - bonding device (value is slave PF index)
2023          */
2024         int bd = -1;
2025         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2026         struct mlx5_dev_spawn_data *list = NULL;
2027         struct mlx5_dev_config dev_config;
2028         struct rte_eth_devargs eth_da = *req_eth_da;
2029         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2030         struct mlx5_bond_info bond_info;
2031         int ret = -1;
2032
2033         errno = 0;
2034         ibv_list = mlx5_glue->get_device_list(&ret);
2035         if (!ibv_list) {
2036                 rte_errno = errno ? errno : ENOSYS;
2037                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2038                 return -rte_errno;
2039         }
2040         /*
2041          * First scan the list of all Infiniband devices to find
2042          * matching ones, gathering into the list.
2043          */
2044         struct ibv_device *ibv_match[ret + 1];
2045         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2046         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2047         unsigned int i;
2048
2049         while (ret-- > 0) {
2050                 struct rte_pci_addr pci_addr;
2051
2052                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2053                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2054                                                 nl_rdma, owner_id, &bond_info);
2055                 if (bd >= 0) {
2056                         /*
2057                          * Bonding device detected. Only one match is allowed,
2058                          * the bonding is supported over multi-port IB device,
2059                          * there should be no matches on representor PCI
2060                          * functions or non VF LAG bonding devices with
2061                          * specified address.
2062                          */
2063                         if (nd) {
2064                                 DRV_LOG(ERR,
2065                                         "multiple PCI match on bonding device"
2066                                         "\"%s\" found", ibv_list[ret]->name);
2067                                 rte_errno = ENOENT;
2068                                 ret = -rte_errno;
2069                                 goto exit;
2070                         }
2071                         /* Amend owner pci address if owner PF ID specified. */
2072                         if (eth_da.nb_representor_ports)
2073                                 owner_pci.function += owner_id;
2074                         DRV_LOG(INFO,
2075                                 "PCI information matches for slave %d bonding device \"%s\"",
2076                                 bd, ibv_list[ret]->name);
2077                         ibv_match[nd++] = ibv_list[ret];
2078                         break;
2079                 } else {
2080                         /* Bonding device not found. */
2081                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2082                                               &pci_addr))
2083                                 continue;
2084                         if (owner_pci.domain != pci_addr.domain ||
2085                             owner_pci.bus != pci_addr.bus ||
2086                             owner_pci.devid != pci_addr.devid ||
2087                             owner_pci.function != pci_addr.function)
2088                                 continue;
2089                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2090                                 ibv_list[ret]->name);
2091                         ibv_match[nd++] = ibv_list[ret];
2092                 }
2093         }
2094         ibv_match[nd] = NULL;
2095         if (!nd) {
2096                 /* No device matches, just complain and bail out. */
2097                 DRV_LOG(WARNING,
2098                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2099                         " are kernel drivers loaded?",
2100                         owner_pci.domain, owner_pci.bus,
2101                         owner_pci.devid, owner_pci.function);
2102                 rte_errno = ENOENT;
2103                 ret = -rte_errno;
2104                 goto exit;
2105         }
2106         if (nd == 1) {
2107                 /*
2108                  * Found single matching device may have multiple ports.
2109                  * Each port may be representor, we have to check the port
2110                  * number and check the representors existence.
2111                  */
2112                 if (nl_rdma >= 0)
2113                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2114                 if (!np)
2115                         DRV_LOG(WARNING,
2116                                 "Cannot get IB device \"%s\" ports number.",
2117                                 ibv_match[0]->name);
2118                 if (bd >= 0 && !np) {
2119                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2120                         rte_errno = ENOENT;
2121                         ret = -rte_errno;
2122                         goto exit;
2123                 }
2124         }
2125         /* Now we can determine the maximal amount of devices to be spawned. */
2126         list = mlx5_malloc(MLX5_MEM_ZERO,
2127                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2128                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2129         if (!list) {
2130                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2131                 rte_errno = ENOMEM;
2132                 ret = -rte_errno;
2133                 goto exit;
2134         }
2135         if (bd >= 0 || np > 1) {
2136                 /*
2137                  * Single IB device with multiple ports found,
2138                  * it may be E-Switch master device and representors.
2139                  * We have to perform identification through the ports.
2140                  */
2141                 MLX5_ASSERT(nl_rdma >= 0);
2142                 MLX5_ASSERT(ns == 0);
2143                 MLX5_ASSERT(nd == 1);
2144                 MLX5_ASSERT(np);
2145                 for (i = 1; i <= np; ++i) {
2146                         list[ns].bond_info = &bond_info;
2147                         list[ns].max_port = np;
2148                         list[ns].phys_port = i;
2149                         list[ns].phys_dev_name = ibv_match[0]->name;
2150                         list[ns].eth_dev = NULL;
2151                         list[ns].pci_dev = pci_dev;
2152                         list[ns].cdev = cdev;
2153                         list[ns].pf_bond = bd;
2154                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2155                                                            ibv_match[0]->name,
2156                                                            i);
2157                         if (!list[ns].ifindex) {
2158                                 /*
2159                                  * No network interface index found for the
2160                                  * specified port, it means there is no
2161                                  * representor on this port. It's OK,
2162                                  * there can be disabled ports, for example
2163                                  * if sriov_numvfs < sriov_totalvfs.
2164                                  */
2165                                 continue;
2166                         }
2167                         ret = -1;
2168                         if (nl_route >= 0)
2169                                 ret = mlx5_nl_switch_info(nl_route,
2170                                                           list[ns].ifindex,
2171                                                           &list[ns].info);
2172                         if (ret || (!list[ns].info.representor &&
2173                                     !list[ns].info.master)) {
2174                                 /*
2175                                  * We failed to recognize representors with
2176                                  * Netlink, let's try to perform the task
2177                                  * with sysfs.
2178                                  */
2179                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2180                                                              &list[ns].info);
2181                         }
2182                         if (!ret && bd >= 0) {
2183                                 switch (list[ns].info.name_type) {
2184                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2185                                         if (np == 1) {
2186                                                 /*
2187                                                  * Force standalone bonding
2188                                                  * device for ROCE LAG
2189                                                  * configurations.
2190                                                  */
2191                                                 list[ns].info.master = 0;
2192                                                 list[ns].info.representor = 0;
2193                                         }
2194                                         if (list[ns].info.port_name == bd)
2195                                                 ns++;
2196                                         break;
2197                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2198                                         /* Fallthrough */
2199                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2200                                         /* Fallthrough */
2201                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2202                                         if (list[ns].info.pf_num == bd)
2203                                                 ns++;
2204                                         break;
2205                                 default:
2206                                         break;
2207                                 }
2208                                 continue;
2209                         }
2210                         if (!ret && (list[ns].info.representor ^
2211                                      list[ns].info.master))
2212                                 ns++;
2213                 }
2214                 if (!ns) {
2215                         DRV_LOG(ERR,
2216                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2217                         rte_errno = ENOENT;
2218                         ret = -rte_errno;
2219                         goto exit;
2220                 }
2221         } else {
2222                 /*
2223                  * The existence of several matching entries (nd > 1) means
2224                  * port representors have been instantiated. No existing Verbs
2225                  * call nor sysfs entries can tell them apart, this can only
2226                  * be done through Netlink calls assuming kernel drivers are
2227                  * recent enough to support them.
2228                  *
2229                  * In the event of identification failure through Netlink,
2230                  * try again through sysfs, then:
2231                  *
2232                  * 1. A single IB device matches (nd == 1) with single
2233                  *    port (np=0/1) and is not a representor, assume
2234                  *    no switch support.
2235                  *
2236                  * 2. Otherwise no safe assumptions can be made;
2237                  *    complain louder and bail out.
2238                  */
2239                 for (i = 0; i != nd; ++i) {
2240                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2241                         list[ns].bond_info = NULL;
2242                         list[ns].max_port = 1;
2243                         list[ns].phys_port = 1;
2244                         list[ns].phys_dev_name = ibv_match[i]->name;
2245                         list[ns].eth_dev = NULL;
2246                         list[ns].pci_dev = pci_dev;
2247                         list[ns].cdev = cdev;
2248                         list[ns].pf_bond = -1;
2249                         list[ns].ifindex = 0;
2250                         if (nl_rdma >= 0)
2251                                 list[ns].ifindex = mlx5_nl_ifindex
2252                                                             (nl_rdma,
2253                                                              ibv_match[i]->name,
2254                                                              1);
2255                         if (!list[ns].ifindex) {
2256                                 char ifname[IF_NAMESIZE];
2257
2258                                 /*
2259                                  * Netlink failed, it may happen with old
2260                                  * ib_core kernel driver (before 4.16).
2261                                  * We can assume there is old driver because
2262                                  * here we are processing single ports IB
2263                                  * devices. Let's try sysfs to retrieve
2264                                  * the ifindex. The method works for
2265                                  * master device only.
2266                                  */
2267                                 if (nd > 1) {
2268                                         /*
2269                                          * Multiple devices found, assume
2270                                          * representors, can not distinguish
2271                                          * master/representor and retrieve
2272                                          * ifindex via sysfs.
2273                                          */
2274                                         continue;
2275                                 }
2276                                 ret = mlx5_get_ifname_sysfs
2277                                         (ibv_match[i]->ibdev_path, ifname);
2278                                 if (!ret)
2279                                         list[ns].ifindex =
2280                                                 if_nametoindex(ifname);
2281                                 if (!list[ns].ifindex) {
2282                                         /*
2283                                          * No network interface index found
2284                                          * for the specified device, it means
2285                                          * there it is neither representor
2286                                          * nor master.
2287                                          */
2288                                         continue;
2289                                 }
2290                         }
2291                         ret = -1;
2292                         if (nl_route >= 0)
2293                                 ret = mlx5_nl_switch_info(nl_route,
2294                                                           list[ns].ifindex,
2295                                                           &list[ns].info);
2296                         if (ret || (!list[ns].info.representor &&
2297                                     !list[ns].info.master)) {
2298                                 /*
2299                                  * We failed to recognize representors with
2300                                  * Netlink, let's try to perform the task
2301                                  * with sysfs.
2302                                  */
2303                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2304                                                              &list[ns].info);
2305                         }
2306                         if (!ret && (list[ns].info.representor ^
2307                                      list[ns].info.master)) {
2308                                 ns++;
2309                         } else if ((nd == 1) &&
2310                                    !list[ns].info.representor &&
2311                                    !list[ns].info.master) {
2312                                 /*
2313                                  * Single IB device with one physical port and
2314                                  * attached network device.
2315                                  * May be SRIOV is not enabled or there is no
2316                                  * representors.
2317                                  */
2318                                 DRV_LOG(INFO, "No E-Switch support detected.");
2319                                 ns++;
2320                                 break;
2321                         }
2322                 }
2323                 if (!ns) {
2324                         DRV_LOG(ERR,
2325                                 "Unable to recognize master/representors on the multiple IB devices.");
2326                         rte_errno = ENOENT;
2327                         ret = -rte_errno;
2328                         goto exit;
2329                 }
2330                 /*
2331                  * New kernels may add the switch_id attribute for the case
2332                  * there is no E-Switch and we wrongly recognized the only
2333                  * device as master. Override this if there is the single
2334                  * device with single port and new device name format present.
2335                  */
2336                 if (nd == 1 &&
2337                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2338                         list[0].info.master = 0;
2339                         list[0].info.representor = 0;
2340                 }
2341         }
2342         MLX5_ASSERT(ns);
2343         /*
2344          * Sort list to probe devices in natural order for users convenience
2345          * (i.e. master first, then representors from lowest to highest ID).
2346          */
2347         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2348         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2349                 /* Set devargs default values. */
2350                 if (eth_da.nb_mh_controllers == 0) {
2351                         eth_da.nb_mh_controllers = 1;
2352                         eth_da.mh_controllers[0] = 0;
2353                 }
2354                 if (eth_da.nb_ports == 0 && ns > 0) {
2355                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2356                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2357                                         pci_dev->device.devargs->args);
2358                         eth_da.nb_ports = 1;
2359                         eth_da.ports[0] = list[0].info.pf_num;
2360                 }
2361                 if (eth_da.nb_representor_ports == 0) {
2362                         eth_da.nb_representor_ports = 1;
2363                         eth_da.representor_ports[0] = 0;
2364                 }
2365         }
2366         for (i = 0; i != ns; ++i) {
2367                 uint32_t restore;
2368
2369                 /* Default configuration. */
2370                 mlx5_os_config_default(&dev_config, &cdev->config);
2371                 dev_config.vf = mlx5_dev_is_vf_pci(pci_dev);
2372                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2373                                                  &dev_config, &eth_da);
2374                 if (!list[i].eth_dev) {
2375                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2376                                 break;
2377                         /* Device is disabled or already spawned. Ignore it. */
2378                         continue;
2379                 }
2380                 restore = list[i].eth_dev->data->dev_flags;
2381                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2382                 /**
2383                  * Each representor has a dedicated interrupts vector.
2384                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2385                  * representor eth_dev object because representor and PF
2386                  * share the same PCI address.
2387                  * Override representor device with a dedicated
2388                  * interrupts handle here.
2389                  * Representor interrupts handle is released in mlx5_dev_stop().
2390                  */
2391                 if (list[i].info.representor) {
2392                         struct rte_intr_handle *intr_handle =
2393                                 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2394                         if (intr_handle == NULL) {
2395                                 DRV_LOG(ERR,
2396                                         "port %u failed to allocate memory for interrupt handler "
2397                                         "Rx interrupts will not be supported",
2398                                         i);
2399                                 rte_errno = ENOMEM;
2400                                 ret = -rte_errno;
2401                                 goto exit;
2402                         }
2403                         list[i].eth_dev->intr_handle = intr_handle;
2404                 }
2405                 /* Restore non-PCI flags cleared by the above call. */
2406                 list[i].eth_dev->data->dev_flags |= restore;
2407                 rte_eth_dev_probing_finish(list[i].eth_dev);
2408         }
2409         if (i != ns) {
2410                 DRV_LOG(ERR,
2411                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2412                         " encountering an error: %s",
2413                         owner_pci.domain, owner_pci.bus,
2414                         owner_pci.devid, owner_pci.function,
2415                         strerror(rte_errno));
2416                 ret = -rte_errno;
2417                 /* Roll back. */
2418                 while (i--) {
2419                         if (!list[i].eth_dev)
2420                                 continue;
2421                         mlx5_dev_close(list[i].eth_dev);
2422                         /* mac_addrs must not be freed because in dev_private */
2423                         list[i].eth_dev->data->mac_addrs = NULL;
2424                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2425                 }
2426                 /* Restore original error. */
2427                 rte_errno = -ret;
2428         } else {
2429                 ret = 0;
2430         }
2431 exit:
2432         /*
2433          * Do the routine cleanup:
2434          * - close opened Netlink sockets
2435          * - free allocated spawn data array
2436          * - free the Infiniband device list
2437          */
2438         if (nl_rdma >= 0)
2439                 close(nl_rdma);
2440         if (nl_route >= 0)
2441                 close(nl_route);
2442         if (list)
2443                 mlx5_free(list);
2444         MLX5_ASSERT(ibv_list);
2445         mlx5_glue->free_device_list(ibv_list);
2446         return ret;
2447 }
2448
2449 static int
2450 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2451                           struct rte_eth_devargs *eth_da)
2452 {
2453         int ret = 0;
2454
2455         if (dev->devargs == NULL)
2456                 return 0;
2457         memset(eth_da, 0, sizeof(*eth_da));
2458         /* Parse representor information first from class argument. */
2459         if (dev->devargs->cls_str)
2460                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2461         if (ret != 0) {
2462                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2463                         dev->devargs->cls_str);
2464                 return -rte_errno;
2465         }
2466         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2467                 /* Parse legacy device argument */
2468                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2469                 if (ret) {
2470                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2471                                 dev->devargs->args);
2472                         return -rte_errno;
2473                 }
2474         }
2475         return 0;
2476 }
2477
2478 /**
2479  * Callback to register a PCI device.
2480  *
2481  * This function spawns Ethernet devices out of a given PCI device.
2482  *
2483  * @param[in] cdev
2484  *   Pointer to common mlx5 device structure.
2485  *
2486  * @return
2487  *   0 on success, a negative errno value otherwise and rte_errno is set.
2488  */
2489 static int
2490 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2491 {
2492         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2493         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2494         int ret = 0;
2495         uint16_t p;
2496
2497         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2498         if (ret != 0)
2499                 return ret;
2500
2501         if (eth_da.nb_ports > 0) {
2502                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2503                 for (p = 0; p < eth_da.nb_ports; p++) {
2504                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2505                                                    eth_da.ports[p]);
2506                         if (ret)
2507                                 break;
2508                 }
2509                 if (ret) {
2510                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2511                                 "aborted due to prodding failure of PF %u",
2512                                 pci_dev->addr.domain, pci_dev->addr.bus,
2513                                 pci_dev->addr.devid, pci_dev->addr.function,
2514                                 eth_da.ports[p]);
2515                         mlx5_net_remove(cdev);
2516                 }
2517         } else {
2518                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2519         }
2520         return ret;
2521 }
2522
2523 /* Probe a single SF device on auxiliary bus, no representor support. */
2524 static int
2525 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2526 {
2527         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2528         struct mlx5_dev_config config;
2529         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2530         struct rte_device *dev = cdev->dev;
2531         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2532         struct rte_eth_dev *eth_dev;
2533         int ret = 0;
2534
2535         /* Parse ethdev devargs. */
2536         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2537         if (ret != 0)
2538                 return ret;
2539         /* Set default config data. */
2540         mlx5_os_config_default(&config, &cdev->config);
2541         config.sf = 1;
2542         /* Init spawn data. */
2543         spawn.max_port = 1;
2544         spawn.phys_port = 1;
2545         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2546         ret = mlx5_auxiliary_get_ifindex(dev->name);
2547         if (ret < 0) {
2548                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2549                 return ret;
2550         }
2551         spawn.ifindex = ret;
2552         spawn.cdev = cdev;
2553         /* Spawn device. */
2554         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2555         if (eth_dev == NULL)
2556                 return -rte_errno;
2557         /* Post create. */
2558         eth_dev->intr_handle = adev->intr_handle;
2559         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2560                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2561                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2562                 eth_dev->data->numa_node = dev->numa_node;
2563         }
2564         rte_eth_dev_probing_finish(eth_dev);
2565         return 0;
2566 }
2567
2568 /**
2569  * Net class driver callback to probe a device.
2570  *
2571  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2572  *
2573  * @param[in] cdev
2574  *   Pointer to the common mlx5 device.
2575  *
2576  * @return
2577  *   0 on success, a negative errno value otherwise and rte_errno is set.
2578  */
2579 int
2580 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2581 {
2582         int ret;
2583
2584         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2585                 mlx5_pmd_socket_init();
2586         ret = mlx5_init_once();
2587         if (ret) {
2588                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2589                         strerror(rte_errno));
2590                 return -rte_errno;
2591         }
2592         if (mlx5_dev_is_pci(cdev->dev))
2593                 return mlx5_os_pci_probe(cdev);
2594         else
2595                 return mlx5_os_auxiliary_probe(cdev);
2596 }
2597
2598 /**
2599  * Cleanup resources when the last device is closed.
2600  */
2601 void
2602 mlx5_os_net_cleanup(void)
2603 {
2604         mlx5_pmd_socket_uninit();
2605 }
2606
2607 /**
2608  * Install shared asynchronous device events handler.
2609  * This function is implemented to support event sharing
2610  * between multiple ports of single IB device.
2611  *
2612  * @param sh
2613  *   Pointer to mlx5_dev_ctx_shared object.
2614  */
2615 void
2616 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2617 {
2618         int ret;
2619         int flags;
2620         struct ibv_context *ctx = sh->cdev->ctx;
2621
2622         sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2623         if (sh->intr_handle == NULL) {
2624                 DRV_LOG(ERR, "Fail to allocate intr_handle");
2625                 rte_errno = ENOMEM;
2626                 return;
2627         }
2628         rte_intr_fd_set(sh->intr_handle, -1);
2629
2630         flags = fcntl(ctx->async_fd, F_GETFL);
2631         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2632         if (ret) {
2633                 DRV_LOG(INFO, "failed to change file descriptor async event"
2634                         " queue");
2635         } else {
2636                 rte_intr_fd_set(sh->intr_handle, ctx->async_fd);
2637                 rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);
2638                 if (rte_intr_callback_register(sh->intr_handle,
2639                                         mlx5_dev_interrupt_handler, sh)) {
2640                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2641                         rte_intr_fd_set(sh->intr_handle, -1);
2642                 }
2643         }
2644         if (sh->cdev->config.devx) {
2645 #ifdef HAVE_IBV_DEVX_ASYNC
2646                 sh->intr_handle_devx =
2647                         rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2648                 if (!sh->intr_handle_devx) {
2649                         DRV_LOG(ERR, "Fail to allocate intr_handle");
2650                         rte_errno = ENOMEM;
2651                         return;
2652                 }
2653                 rte_intr_fd_set(sh->intr_handle_devx, -1);
2654                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2655                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2656                 if (!devx_comp) {
2657                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2658                         return;
2659                 }
2660                 flags = fcntl(devx_comp->fd, F_GETFL);
2661                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2662                 if (ret) {
2663                         DRV_LOG(INFO, "failed to change file descriptor"
2664                                 " devx comp");
2665                         return;
2666                 }
2667                 rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);
2668                 rte_intr_type_set(sh->intr_handle_devx,
2669                                          RTE_INTR_HANDLE_EXT);
2670                 if (rte_intr_callback_register(sh->intr_handle_devx,
2671                                         mlx5_dev_interrupt_handler_devx, sh)) {
2672                         DRV_LOG(INFO, "Fail to install the devx shared"
2673                                 " interrupt.");
2674                         rte_intr_fd_set(sh->intr_handle_devx, -1);
2675                 }
2676 #endif /* HAVE_IBV_DEVX_ASYNC */
2677         }
2678 }
2679
2680 /**
2681  * Uninstall shared asynchronous device events handler.
2682  * This function is implemented to support event sharing
2683  * between multiple ports of single IB device.
2684  *
2685  * @param dev
2686  *   Pointer to mlx5_dev_ctx_shared object.
2687  */
2688 void
2689 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2690 {
2691         if (rte_intr_fd_get(sh->intr_handle) >= 0)
2692                 mlx5_intr_callback_unregister(sh->intr_handle,
2693                                               mlx5_dev_interrupt_handler, sh);
2694         rte_intr_instance_free(sh->intr_handle);
2695 #ifdef HAVE_IBV_DEVX_ASYNC
2696         if (rte_intr_fd_get(sh->intr_handle_devx) >= 0)
2697                 rte_intr_callback_unregister(sh->intr_handle_devx,
2698                                   mlx5_dev_interrupt_handler_devx, sh);
2699         rte_intr_instance_free(sh->intr_handle_devx);
2700         if (sh->devx_comp)
2701                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2702 #endif
2703 }
2704
2705 /**
2706  * Read statistics by a named counter.
2707  *
2708  * @param[in] priv
2709  *   Pointer to the private device data structure.
2710  * @param[in] ctr_name
2711  *   Pointer to the name of the statistic counter to read
2712  * @param[out] stat
2713  *   Pointer to read statistic value.
2714  * @return
2715  *   0 on success and stat is valud, 1 if failed to read the value
2716  *   rte_errno is set.
2717  *
2718  */
2719 int
2720 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2721                       uint64_t *stat)
2722 {
2723         int fd;
2724
2725         if (priv->sh) {
2726                 if (priv->q_counters != NULL &&
2727                     strcmp(ctr_name, "out_of_buffer") == 0)
2728                         return mlx5_devx_cmd_queue_counter_query
2729                                         (priv->q_counters, 0, (uint32_t *)stat);
2730                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2731                       priv->sh->ibdev_path,
2732                       priv->dev_port,
2733                       ctr_name);
2734                 fd = open(path, O_RDONLY);
2735                 /*
2736                  * in switchdev the file location is not per port
2737                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2738                  */
2739                 if (fd == -1) {
2740                         MKSTR(path1, "%s/hw_counters/%s",
2741                               priv->sh->ibdev_path,
2742                               ctr_name);
2743                         fd = open(path1, O_RDONLY);
2744                 }
2745                 if (fd != -1) {
2746                         char buf[21] = {'\0'};
2747                         ssize_t n = read(fd, buf, sizeof(buf));
2748
2749                         close(fd);
2750                         if (n != -1) {
2751                                 *stat = strtoull(buf, NULL, 10);
2752                                 return 0;
2753                         }
2754                 }
2755         }
2756         *stat = 0;
2757         return 1;
2758 }
2759
2760 /**
2761  * Remove a MAC address from device
2762  *
2763  * @param dev
2764  *   Pointer to Ethernet device structure.
2765  * @param index
2766  *   MAC address index.
2767  */
2768 void
2769 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2770 {
2771         struct mlx5_priv *priv = dev->data->dev_private;
2772         const int vf = priv->config.vf;
2773
2774         if (vf)
2775                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2776                                         mlx5_ifindex(dev), priv->mac_own,
2777                                         &dev->data->mac_addrs[index], index);
2778 }
2779
2780 /**
2781  * Adds a MAC address to the device
2782  *
2783  * @param dev
2784  *   Pointer to Ethernet device structure.
2785  * @param mac_addr
2786  *   MAC address to register.
2787  * @param index
2788  *   MAC address index.
2789  *
2790  * @return
2791  *   0 on success, a negative errno value otherwise
2792  */
2793 int
2794 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2795                      uint32_t index)
2796 {
2797         struct mlx5_priv *priv = dev->data->dev_private;
2798         const int vf = priv->config.vf;
2799         int ret = 0;
2800
2801         if (vf)
2802                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2803                                            mlx5_ifindex(dev), priv->mac_own,
2804                                            mac, index);
2805         return ret;
2806 }
2807
2808 /**
2809  * Modify a VF MAC address
2810  *
2811  * @param priv
2812  *   Pointer to device private data.
2813  * @param mac_addr
2814  *   MAC address to modify into.
2815  * @param iface_idx
2816  *   Net device interface index
2817  * @param vf_index
2818  *   VF index
2819  *
2820  * @return
2821  *   0 on success, a negative errno value otherwise
2822  */
2823 int
2824 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2825                            unsigned int iface_idx,
2826                            struct rte_ether_addr *mac_addr,
2827                            int vf_index)
2828 {
2829         return mlx5_nl_vf_mac_addr_modify
2830                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2831 }
2832
2833 /**
2834  * Set device promiscuous mode
2835  *
2836  * @param dev
2837  *   Pointer to Ethernet device structure.
2838  * @param enable
2839  *   0 - promiscuous is disabled, otherwise - enabled
2840  *
2841  * @return
2842  *   0 on success, a negative error value otherwise
2843  */
2844 int
2845 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2846 {
2847         struct mlx5_priv *priv = dev->data->dev_private;
2848
2849         return mlx5_nl_promisc(priv->nl_socket_route,
2850                                mlx5_ifindex(dev), !!enable);
2851 }
2852
2853 /**
2854  * Set device promiscuous mode
2855  *
2856  * @param dev
2857  *   Pointer to Ethernet device structure.
2858  * @param enable
2859  *   0 - all multicase is disabled, otherwise - enabled
2860  *
2861  * @return
2862  *   0 on success, a negative error value otherwise
2863  */
2864 int
2865 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2866 {
2867         struct mlx5_priv *priv = dev->data->dev_private;
2868
2869         return mlx5_nl_allmulti(priv->nl_socket_route,
2870                                 mlx5_ifindex(dev), !!enable);
2871 }
2872
2873 /**
2874  * Flush device MAC addresses
2875  *
2876  * @param dev
2877  *   Pointer to Ethernet device structure.
2878  *
2879  */
2880 void
2881 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2882 {
2883         struct mlx5_priv *priv = dev->data->dev_private;
2884
2885         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2886                                dev->data->mac_addrs,
2887                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2888 }