drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE];
 229         int err = 0;
 230
 231         if (!sh->flow_tbls)
 232                 err = mlx5_alloc_table_hash_list(priv);
 233         else
 234                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
 235                         (void *)sh->flow_tbls);
 236         if (err)
 237                 return err;
 238         /* Create tags hash list table. */
 239         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 240         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 241         if (!sh->tag_table) {
 242                 DRV_LOG(ERR, "tags with hash creation failed.");
 243                 err = ENOMEM;
 244                 goto error;
 245         }
 246         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 247         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ);
 248         if (!sh->modify_cmds) {
 249                 DRV_LOG(ERR, "hdr modify hash creation failed");
 250                 err = ENOMEM;
 251                 goto error;
 252         }
 253         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 254         sh->encaps_decaps = mlx5_hlist_create(s,
 255                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ);
 256         if (!sh->encaps_decaps) {
 257                 DRV_LOG(ERR, "encap decap hash creation failed");
 258                 err = ENOMEM;
 259                 goto error;
 260         }
 261 #ifdef HAVE_MLX5DV_DR
 262         void *domain;
 263
 264         if (sh->dv_refcnt) {
 265                 /* Shared DV/DR structures is already initialized. */
 266                 sh->dv_refcnt++;
 267                 priv->dr_shared = 1;
 268                 return 0;
 269         }
 270         /* Reference counter is zero, we should initialize structures. */
 271         domain = mlx5_glue->dr_create_domain(sh->ctx,
 272                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 273         if (!domain) {
 274                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 275                 err = errno;
 276                 goto error;
 277         }
 278         sh->rx_domain = domain;
 279         domain = mlx5_glue->dr_create_domain(sh->ctx,
 280                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 281         if (!domain) {
 282                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 283                 err = errno;
 284                 goto error;
 285         }
 286         pthread_mutex_init(&sh->dv_mutex, NULL);
 287         sh->tx_domain = domain;
 288 #ifdef HAVE_MLX5DV_DR_ESWITCH
 289         if (priv->config.dv_esw_en) {
 290                 domain  = mlx5_glue->dr_create_domain
 291                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 292                 if (!domain) {
 293                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 294                         err = errno;
 295                         goto error;
 296                 }
 297                 sh->fdb_domain = domain;
 298                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 299         }
 300 #endif
 301         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 302                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 303                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 304                 if (sh->fdb_domain)
 305                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 306         }
 307         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 308 #endif /* HAVE_MLX5DV_DR */
 309         sh->dv_refcnt++;
 310         priv->dr_shared = 1;
 311         return 0;
 312 error:
 313         /* Rollback the created objects. */
 314         if (sh->rx_domain) {
 315                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 316                 sh->rx_domain = NULL;
 317         }
 318         if (sh->tx_domain) {
 319                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 320                 sh->tx_domain = NULL;
 321         }
 322         if (sh->fdb_domain) {
 323                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 324                 sh->fdb_domain = NULL;
 325         }
 326         if (sh->esw_drop_action) {
 327                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 328                 sh->esw_drop_action = NULL;
 329         }
 330         if (sh->pop_vlan_action) {
 331                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 332                 sh->pop_vlan_action = NULL;
 333         }
 334         if (sh->encaps_decaps) {
 335                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
 336                 sh->encaps_decaps = NULL;
 337         }
 338         if (sh->modify_cmds) {
 339                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 340                 sh->modify_cmds = NULL;
 341         }
 342         if (sh->tag_table) {
 343                 /* tags should be destroyed with flow before. */
 344                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 345                 sh->tag_table = NULL;
 346         }
 347         mlx5_free_table_hash_list(priv);
 348         return err;
 349 }
 350
 351 /**
 352  * Destroy DR related data within private structure.
 353  *
 354  * @param[in] priv
 355  *   Pointer to the private device data structure.
 356  */
 357 void
 358 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 359 {
 360         struct mlx5_dev_ctx_shared *sh;
 361
 362         if (!priv->dr_shared)
 363                 return;
 364         priv->dr_shared = 0;
 365         sh = priv->sh;
 366         MLX5_ASSERT(sh);
 367 #ifdef HAVE_MLX5DV_DR
 368         MLX5_ASSERT(sh->dv_refcnt);
 369         if (sh->dv_refcnt && --sh->dv_refcnt)
 370                 return;
 371         if (sh->rx_domain) {
 372                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 373                 sh->rx_domain = NULL;
 374         }
 375         if (sh->tx_domain) {
 376                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 377                 sh->tx_domain = NULL;
 378         }
 379 #ifdef HAVE_MLX5DV_DR_ESWITCH
 380         if (sh->fdb_domain) {
 381                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 382                 sh->fdb_domain = NULL;
 383         }
 384         if (sh->esw_drop_action) {
 385                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 386                 sh->esw_drop_action = NULL;
 387         }
 388 #endif
 389         if (sh->pop_vlan_action) {
 390                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 391                 sh->pop_vlan_action = NULL;
 392         }
 393         pthread_mutex_destroy(&sh->dv_mutex);
 394 #endif /* HAVE_MLX5DV_DR */
 395         if (sh->encaps_decaps) {
 396                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
 397                 sh->encaps_decaps = NULL;
 398         }
 399         if (sh->modify_cmds) {
 400                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 401                 sh->modify_cmds = NULL;
 402         }
 403         if (sh->tag_table) {
 404                 /* tags should be destroyed with flow before. */
 405                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 406                 sh->tag_table = NULL;
 407         }
 408         mlx5_free_table_hash_list(priv);
 409 }
 410
 411 /**
 412  * Initialize shared data between primary and secondary process.
 413  *
 414  * A memzone is reserved by primary process and secondary processes attach to
 415  * the memzone.
 416  *
 417  * @return
 418  *   0 on success, a negative errno value otherwise and rte_errno is set.
 419  */
 420 static int
 421 mlx5_init_shared_data(void)
 422 {
 423         const struct rte_memzone *mz;
 424         int ret = 0;
 425
 426         rte_spinlock_lock(&mlx5_shared_data_lock);
 427         if (mlx5_shared_data == NULL) {
 428                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 429                         /* Allocate shared memory. */
 430                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 431                                                  sizeof(*mlx5_shared_data),
 432                                                  SOCKET_ID_ANY, 0);
 433                         if (mz == NULL) {
 434                                 DRV_LOG(ERR,
 435                                         "Cannot allocate mlx5 shared data");
 436                                 ret = -rte_errno;
 437                                 goto error;
 438                         }
 439                         mlx5_shared_data = mz->addr;
 440                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 441                         rte_spinlock_init(&mlx5_shared_data->lock);
 442                 } else {
 443                         /* Lookup allocated shared memory. */
 444                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 445                         if (mz == NULL) {
 446                                 DRV_LOG(ERR,
 447                                         "Cannot attach mlx5 shared data");
 448                                 ret = -rte_errno;
 449                                 goto error;
 450                         }
 451                         mlx5_shared_data = mz->addr;
 452                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 453                 }
 454         }
 455 error:
 456         rte_spinlock_unlock(&mlx5_shared_data_lock);
 457         return ret;
 458 }
 459
 460 /**
 461  * PMD global initialization.
 462  *
 463  * Independent from individual device, this function initializes global
 464  * per-PMD data structures distinguishing primary and secondary processes.
 465  * Hence, each initialization is called once per a process.
 466  *
 467  * @return
 468  *   0 on success, a negative errno value otherwise and rte_errno is set.
 469  */
 470 static int
 471 mlx5_init_once(void)
 472 {
 473         struct mlx5_shared_data *sd;
 474         struct mlx5_local_data *ld = &mlx5_local_data;
 475         int ret = 0;
 476
 477         if (mlx5_init_shared_data())
 478                 return -rte_errno;
 479         sd = mlx5_shared_data;
 480         MLX5_ASSERT(sd);
 481         rte_spinlock_lock(&sd->lock);
 482         switch (rte_eal_process_type()) {
 483         case RTE_PROC_PRIMARY:
 484                 if (sd->init_done)
 485                         break;
 486                 LIST_INIT(&sd->mem_event_cb_list);
 487                 rte_rwlock_init(&sd->mem_event_rwlock);
 488                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 489                                                 mlx5_mr_mem_event_cb, NULL);
 490                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 491                                            mlx5_mp_os_primary_handle);
 492                 if (ret)
 493                         goto out;
 494                 sd->init_done = true;
 495                 break;
 496         case RTE_PROC_SECONDARY:
 497                 if (ld->init_done)
 498                         break;
 499                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 500                                              mlx5_mp_os_secondary_handle);
 501                 if (ret)
 502                         goto out;
 503                 ++sd->secondary_cnt;
 504                 ld->init_done = true;
 505                 break;
 506         default:
 507                 break;
 508         }
 509 out:
 510         rte_spinlock_unlock(&sd->lock);
 511         return ret;
 512 }
 513
 514 /**
 515  * Create the Tx queue DevX/Verbs object.
 516  *
 517  * @param dev
 518  *   Pointer to Ethernet device.
 519  * @param idx
 520  *   Queue index in DPDK Tx queue array.
 521  *
 522  * @return
 523  *   0 on success, a negative errno value otherwise and rte_errno is set.
 524  */
 525 static int
 526 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 527 {
 528         struct mlx5_priv *priv = dev->data->dev_private;
 529         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 530         struct mlx5_txq_ctrl *txq_ctrl =
 531                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 532
 533         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 534                 return mlx5_txq_devx_obj_new(dev, idx);
 535 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 536         if (!priv->config.dv_esw_en)
 537                 return mlx5_txq_devx_obj_new(dev, idx);
 538 #endif
 539         return mlx5_txq_ibv_obj_new(dev, idx);
 540 }
 541
 542 /**
 543  * Release an Tx DevX/verbs queue object.
 544  *
 545  * @param txq_obj
 546  *   DevX/Verbs Tx queue object.
 547  */
 548 static void
 549 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 550 {
 551         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 552                 mlx5_txq_devx_obj_release(txq_obj);
 553                 return;
 554         }
 555 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 556         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 557                 mlx5_txq_devx_obj_release(txq_obj);
 558                 return;
 559         }
 560 #endif
 561         mlx5_txq_ibv_obj_release(txq_obj);
 562 }
 563
 564 /**
 565  * DV flow counter mode detect and config.
 566  *
 567  * @param dev
 568  *   Pointer to rte_eth_dev structure.
 569  *
 570  */
 571 static void
 572 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 573 {
 574 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 575         struct mlx5_priv *priv = dev->data->dev_private;
 576
 577         /* If devx is not supported or not DV mode, counters are not working. */
 578         if (!priv->config.devx || !priv->config.dv_flow_en)
 579                 return;
 580 #ifndef HAVE_IBV_DEVX_ASYNC
 581         priv->counter_fallback = 1;
 582 #else
 583         priv->counter_fallback = 0;
 584         if (!priv->config.hca_attr.flow_counters_dump ||
 585             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 586             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 587                 priv->counter_fallback = 1;
 588 #endif
 589         if (priv->counter_fallback)
 590                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 591                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 592                         priv->config.hca_attr.flow_counters_dump,
 593                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 594 #endif
 595 }
 596
 597 /**
 598  * Spawn an Ethernet device from Verbs information.
 599  *
 600  * @param dpdk_dev
 601  *   Backing DPDK device.
 602  * @param spawn
 603  *   Verbs device parameters (name, port, switch_info) to spawn.
 604  * @param config
 605  *   Device configuration parameters.
 606  *
 607  * @return
 608  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 609  *   is set. The following errors are defined:
 610  *
 611  *   EBUSY: device is not supposed to be spawned.
 612  *   EEXIST: device is already spawned
 613  */
 614 static struct rte_eth_dev *
 615 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 616                struct mlx5_dev_spawn_data *spawn,
 617                struct mlx5_dev_config *config)
 618 {
 619         const struct mlx5_switch_info *switch_info = &spawn->info;
 620         struct mlx5_dev_ctx_shared *sh = NULL;
 621         struct ibv_port_attr port_attr;
 622         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 623         struct rte_eth_dev *eth_dev = NULL;
 624         struct mlx5_priv *priv = NULL;
 625         int err = 0;
 626         unsigned int hw_padding = 0;
 627         unsigned int mps;
 628         unsigned int cqe_comp;
 629         unsigned int cqe_pad = 0;
 630         unsigned int tunnel_en = 0;
 631         unsigned int mpls_en = 0;
 632         unsigned int swp = 0;
 633         unsigned int mprq = 0;
 634         unsigned int mprq_min_stride_size_n = 0;
 635         unsigned int mprq_max_stride_size_n = 0;
 636         unsigned int mprq_min_stride_num_n = 0;
 637         unsigned int mprq_max_stride_num_n = 0;
 638         struct rte_ether_addr mac;
 639         char name[RTE_ETH_NAME_MAX_LEN];
 640         int own_domain_id = 0;
 641         uint16_t port_id;
 642         unsigned int i;
 643 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 644         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 645 #endif
 646
 647         /* Determine if this port representor is supposed to be spawned. */
 648         if (switch_info->representor && dpdk_dev->devargs) {
 649                 struct rte_eth_devargs eth_da;
 650
 651                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 652                 if (err) {
 653                         rte_errno = -err;
 654                         DRV_LOG(ERR, "failed to process device arguments: %s",
 655                                 strerror(rte_errno));
 656                         return NULL;
 657                 }
 658                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 659                         if (eth_da.representor_ports[i] ==
 660                             (uint16_t)switch_info->port_name)
 661                                 break;
 662                 if (i == eth_da.nb_representor_ports) {
 663                         rte_errno = EBUSY;
 664                         return NULL;
 665                 }
 666         }
 667         /* Build device name. */
 668         if (spawn->pf_bond <  0) {
 669                 /* Single device. */
 670                 if (!switch_info->representor)
 671                         strlcpy(name, dpdk_dev->name, sizeof(name));
 672                 else
 673                         snprintf(name, sizeof(name), "%s_representor_%u",
 674                                  dpdk_dev->name, switch_info->port_name);
 675         } else {
 676                 /* Bonding device. */
 677                 if (!switch_info->representor)
 678                         snprintf(name, sizeof(name), "%s_%s",
 679                                  dpdk_dev->name,
 680                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 681                 else
 682                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 683                                  dpdk_dev->name,
 684                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 685                                  switch_info->port_name);
 686         }
 687         /* check if the device is already spawned */
 688         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 689                 rte_errno = EEXIST;
 690                 return NULL;
 691         }
 692         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 693         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 694                 struct mlx5_mp_id mp_id;
 695
 696                 eth_dev = rte_eth_dev_attach_secondary(name);
 697                 if (eth_dev == NULL) {
 698                         DRV_LOG(ERR, "can not attach rte ethdev");
 699                         rte_errno = ENOMEM;
 700                         return NULL;
 701                 }
 702                 eth_dev->device = dpdk_dev;
 703                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 704                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 705                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 706                 err = mlx5_proc_priv_init(eth_dev);
 707                 if (err)
 708                         return NULL;
 709                 mp_id.port_id = eth_dev->data->port_id;
 710                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 711                 /* Receive command fd from primary process */
 712                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 713                 if (err < 0)
 714                         goto err_secondary;
 715                 /* Remap UAR for Tx queues. */
 716                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 717                 if (err)
 718                         goto err_secondary;
 719                 /*
 720                  * Ethdev pointer is still required as input since
 721                  * the primary device is not accessible from the
 722                  * secondary process.
 723                  */
 724                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 725                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 726                 return eth_dev;
 727 err_secondary:
 728                 mlx5_dev_close(eth_dev);
 729                 return NULL;
 730         }
 731         /*
 732          * Some parameters ("tx_db_nc" in particularly) are needed in
 733          * advance to create dv/verbs device context. We proceed the
 734          * devargs here to get ones, and later proceed devargs again
 735          * to override some hardware settings.
 736          */
 737         err = mlx5_args(config, dpdk_dev->devargs);
 738         if (err) {
 739                 err = rte_errno;
 740                 DRV_LOG(ERR, "failed to process device arguments: %s",
 741                         strerror(rte_errno));
 742                 goto error;
 743         }
 744         mlx5_malloc_mem_select(config->sys_mem_en);
 745         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 746         if (!sh)
 747                 return NULL;
 748         config->devx = sh->devx;
 749 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 750         config->dest_tir = 1;
 751 #endif
 752 #ifdef HAVE_IBV_MLX5_MOD_SWP
 753         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 754 #endif
 755         /*
 756          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 757          * as all ConnectX-5 devices.
 758          */
 759 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 760         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 761 #endif
 762 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 763         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 764 #endif
 765         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 766         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 767                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 768                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 769                         mps = MLX5_MPW_ENHANCED;
 770                 } else {
 771                         DRV_LOG(DEBUG, "MPW is supported");
 772                         mps = MLX5_MPW;
 773                 }
 774         } else {
 775                 DRV_LOG(DEBUG, "MPW isn't supported");
 776                 mps = MLX5_MPW_DISABLED;
 777         }
 778 #ifdef HAVE_IBV_MLX5_MOD_SWP
 779         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 780                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 781         DRV_LOG(DEBUG, "SWP support: %u", swp);
 782 #endif
 783         config->swp = !!swp;
 784 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 785         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 786                 struct mlx5dv_striding_rq_caps mprq_caps =
 787                         dv_attr.striding_rq_caps;
 788
 789                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 790                         mprq_caps.min_single_stride_log_num_of_bytes);
 791                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 792                         mprq_caps.max_single_stride_log_num_of_bytes);
 793                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 794                         mprq_caps.min_single_wqe_log_num_of_strides);
 795                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 796                         mprq_caps.max_single_wqe_log_num_of_strides);
 797                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 798                         mprq_caps.supported_qpts);
 799                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 800                 mprq = 1;
 801                 mprq_min_stride_size_n =
 802                         mprq_caps.min_single_stride_log_num_of_bytes;
 803                 mprq_max_stride_size_n =
 804                         mprq_caps.max_single_stride_log_num_of_bytes;
 805                 mprq_min_stride_num_n =
 806                         mprq_caps.min_single_wqe_log_num_of_strides;
 807                 mprq_max_stride_num_n =
 808                         mprq_caps.max_single_wqe_log_num_of_strides;
 809         }
 810 #endif
 811         if (RTE_CACHE_LINE_SIZE == 128 &&
 812             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 813                 cqe_comp = 0;
 814         else
 815                 cqe_comp = 1;
 816         config->cqe_comp = cqe_comp;
 817 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 818         /* Whether device supports 128B Rx CQE padding. */
 819         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 820                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 821 #endif
 822 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 823         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 824                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 825                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 826                              (dv_attr.tunnel_offloads_caps &
 827                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 828                              (dv_attr.tunnel_offloads_caps &
 829                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 830         }
 831         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 832                 tunnel_en ? "" : "not ");
 833 #else
 834         DRV_LOG(WARNING,
 835                 "tunnel offloading disabled due to old OFED/rdma-core version");
 836 #endif
 837         config->tunnel_en = tunnel_en;
 838 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 839         mpls_en = ((dv_attr.tunnel_offloads_caps &
 840                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 841                    (dv_attr.tunnel_offloads_caps &
 842                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 843         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 844                 mpls_en ? "" : "not ");
 845 #else
 846         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 847                 " old OFED/rdma-core version or firmware configuration");
 848 #endif
 849         config->mpls_en = mpls_en;
 850         /* Check port status. */
 851         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 852         if (err) {
 853                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 854                 goto error;
 855         }
 856         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 857                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 858                 err = EINVAL;
 859                 goto error;
 860         }
 861         if (port_attr.state != IBV_PORT_ACTIVE)
 862                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 863                         mlx5_glue->port_state_str(port_attr.state),
 864                         port_attr.state);
 865         /* Allocate private eth device data. */
 866         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 867                            sizeof(*priv),
 868                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 869         if (priv == NULL) {
 870                 DRV_LOG(ERR, "priv allocation failure");
 871                 err = ENOMEM;
 872                 goto error;
 873         }
 874         priv->sh = sh;
 875         priv->dev_port = spawn->phys_port;
 876         priv->pci_dev = spawn->pci_dev;
 877         priv->mtu = RTE_ETHER_MTU;
 878         priv->mp_id.port_id = port_id;
 879         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 880         /* Some internal functions rely on Netlink sockets, open them now. */
 881         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 882         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 883         priv->representor = !!switch_info->representor;
 884         priv->master = !!switch_info->master;
 885         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 886         priv->vport_meta_tag = 0;
 887         priv->vport_meta_mask = 0;
 888         priv->pf_bond = spawn->pf_bond;
 889 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 890         /*
 891          * The DevX port query API is implemented. E-Switch may use
 892          * either vport or reg_c[0] metadata register to match on
 893          * vport index. The engaged part of metadata register is
 894          * defined by mask.
 895          */
 896         if (switch_info->representor || switch_info->master) {
 897                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 898                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 899                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 900                                                  &devx_port);
 901                 if (err) {
 902                         DRV_LOG(WARNING,
 903                                 "can't query devx port %d on device %s",
 904                                 spawn->phys_port,
 905                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 906                         devx_port.comp_mask = 0;
 907                 }
 908         }
 909         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 910                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 911                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 912                 if (!priv->vport_meta_mask) {
 913                         DRV_LOG(ERR, "vport zero mask for port %d"
 914                                      " on bonding device %s",
 915                                      spawn->phys_port,
 916                                      mlx5_os_get_dev_device_name
 917                                                         (spawn->phys_dev));
 918                         err = ENOTSUP;
 919                         goto error;
 920                 }
 921                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 922                         DRV_LOG(ERR, "invalid vport tag for port %d"
 923                                      " on bonding device %s",
 924                                      spawn->phys_port,
 925                                      mlx5_os_get_dev_device_name
 926                                                         (spawn->phys_dev));
 927                         err = ENOTSUP;
 928                         goto error;
 929                 }
 930         }
 931         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 932                 priv->vport_id = devx_port.vport_num;
 933         } else if (spawn->pf_bond >= 0) {
 934                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 935                              " on bonding device %s",
 936                              spawn->phys_port,
 937                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 938                 err = ENOTSUP;
 939                 goto error;
 940         } else {
 941                 /* Suppose vport index in compatible way. */
 942                 priv->vport_id = switch_info->representor ?
 943                                  switch_info->port_name + 1 : -1;
 944         }
 945 #else
 946         /*
 947          * Kernel/rdma_core support single E-Switch per PF configurations
 948          * only and vport_id field contains the vport index for
 949          * associated VF, which is deduced from representor port name.
 950          * For example, let's have the IB device port 10, it has
 951          * attached network device eth0, which has port name attribute
 952          * pf0vf2, we can deduce the VF number as 2, and set vport index
 953          * as 3 (2+1). This assigning schema should be changed if the
 954          * multiple E-Switch instances per PF configurations or/and PCI
 955          * subfunctions are added.
 956          */
 957         priv->vport_id = switch_info->representor ?
 958                          switch_info->port_name + 1 : -1;
 959 #endif
 960         /* representor_id field keeps the unmodified VF index. */
 961         priv->representor_id = switch_info->representor ?
 962                                switch_info->port_name : -1;
 963         /*
 964          * Look for sibling devices in order to reuse their switch domain
 965          * if any, otherwise allocate one.
 966          */
 967         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 968                 const struct mlx5_priv *opriv =
 969                         rte_eth_devices[port_id].data->dev_private;
 970
 971                 if (!opriv ||
 972                     opriv->sh != priv->sh ||
 973                         opriv->domain_id ==
 974                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 975                         continue;
 976                 priv->domain_id = opriv->domain_id;
 977                 break;
 978         }
 979         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 980                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
 981                 if (err) {
 982                         err = rte_errno;
 983                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
 984                                 strerror(rte_errno));
 985                         goto error;
 986                 }
 987                 own_domain_id = 1;
 988         }
 989         /* Override some values set by hardware configuration. */
 990         mlx5_args(config, dpdk_dev->devargs);
 991         err = mlx5_dev_check_sibling_config(priv, config);
 992         if (err)
 993                 goto error;
 994         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
 995                             IBV_DEVICE_RAW_IP_CSUM);
 996         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
 997                 (config->hw_csum ? "" : "not "));
 998 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
 999         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1000         DRV_LOG(DEBUG, "counters are not supported");
1001 #endif
1002 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1003         if (config->dv_flow_en) {
1004                 DRV_LOG(WARNING, "DV flow is not supported");
1005                 config->dv_flow_en = 0;
1006         }
1007 #endif
1008         config->ind_table_max_size =
1009                 sh->device_attr.max_rwq_indirection_table_size;
1010         /*
1011          * Remove this check once DPDK supports larger/variable
1012          * indirection tables.
1013          */
1014         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1015                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1016         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1017                 config->ind_table_max_size);
1018         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1019                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1020         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1021                 (config->hw_vlan_strip ? "" : "not "));
1022         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1023                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1024 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1025         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1026 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1027         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1028                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1029 #endif
1030         if (config->hw_padding && !hw_padding) {
1031                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1032                 config->hw_padding = 0;
1033         } else if (config->hw_padding) {
1034                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1035         }
1036         config->tso = (sh->device_attr.max_tso > 0 &&
1037                       (sh->device_attr.tso_supported_qpts &
1038                        (1 << IBV_QPT_RAW_PACKET)));
1039         if (config->tso)
1040                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1041         /*
1042          * MPW is disabled by default, while the Enhanced MPW is enabled
1043          * by default.
1044          */
1045         if (config->mps == MLX5_ARG_UNSET)
1046                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1047                                                           MLX5_MPW_DISABLED;
1048         else
1049                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1050         DRV_LOG(INFO, "%sMPS is %s",
1051                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1052                 config->mps == MLX5_MPW ? "legacy " : "",
1053                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1054         if (config->cqe_comp && !cqe_comp) {
1055                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1056                 config->cqe_comp = 0;
1057         }
1058         if (config->cqe_pad && !cqe_pad) {
1059                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1060                 config->cqe_pad = 0;
1061         } else if (config->cqe_pad) {
1062                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1063         }
1064         if (config->devx) {
1065                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1066                 if (err) {
1067                         err = -err;
1068                         goto error;
1069                 }
1070                 /* Check for LRO support. */
1071                 if (config->dest_tir && config->hca_attr.lro_cap &&
1072                     config->dv_flow_en) {
1073                         /* TBD check tunnel lro caps. */
1074                         config->lro.supported = config->hca_attr.lro_cap;
1075                         DRV_LOG(DEBUG, "Device supports LRO");
1076                         /*
1077                          * If LRO timeout is not configured by application,
1078                          * use the minimal supported value.
1079                          */
1080                         if (!config->lro.timeout)
1081                                 config->lro.timeout =
1082                                 config->hca_attr.lro_timer_supported_periods[0];
1083                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1084                                 config->lro.timeout);
1085                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1086                                 "required for coalescing is %d bytes",
1087                                 config->hca_attr.lro_min_mss_size);
1088                 }
1089 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1090                 if (config->hca_attr.qos.sup &&
1091                     config->hca_attr.qos.srtcm_sup &&
1092                     config->dv_flow_en) {
1093                         uint8_t reg_c_mask =
1094                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1095                         /*
1096                          * Meter needs two REG_C's for color match and pre-sfx
1097                          * flow match. Here get the REG_C for color match.
1098                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1099                          */
1100                         reg_c_mask &= 0xfc;
1101                         if (__builtin_popcount(reg_c_mask) < 1) {
1102                                 priv->mtr_en = 0;
1103                                 DRV_LOG(WARNING, "No available register for"
1104                                         " meter.");
1105                         } else {
1106                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1107                                                       REG_C_0;
1108                                 priv->mtr_en = 1;
1109                                 priv->mtr_reg_share =
1110                                       config->hca_attr.qos.flow_meter_reg_share;
1111                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1112                                         priv->mtr_color_reg);
1113                         }
1114                 }
1115 #endif
1116 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1117                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1118                     config->dv_flow_en) {
1119                         priv->sampler_en = 1;
1120                         DRV_LOG(DEBUG, "The Sampler enabled!\n");
1121                 } else {
1122                         priv->sampler_en = 0;
1123                         if (!config->hca_attr.log_max_ft_sampler_num)
1124                                 DRV_LOG(WARNING, "No available register for"
1125                                                 " Sampler.");
1126                         else
1127                                 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1128                 }
1129 #endif
1130         }
1131         if (config->tx_pp) {
1132                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1133                         config->hca_attr.dev_freq_khz);
1134                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1135                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1136                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1137                         config->hca_attr.cross_channel ? "" : "not ");
1138                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1139                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1140                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1141                         config->hca_attr.non_wire_sq ? "" : "not ");
1142                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1143                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1144                         config->hca_attr.log_max_static_sq_wq);
1145                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1146                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1147                 if (!config->devx) {
1148                         DRV_LOG(ERR, "DevX is required for packet pacing");
1149                         err = ENODEV;
1150                         goto error;
1151                 }
1152                 if (!config->hca_attr.qos.packet_pacing) {
1153                         DRV_LOG(ERR, "Packet pacing is not supported");
1154                         err = ENODEV;
1155                         goto error;
1156                 }
1157                 if (!config->hca_attr.cross_channel) {
1158                         DRV_LOG(ERR, "Cross channel operations are"
1159                                      " required for packet pacing");
1160                         err = ENODEV;
1161                         goto error;
1162                 }
1163                 if (!config->hca_attr.wqe_index_ignore) {
1164                         DRV_LOG(ERR, "WQE index ignore feature is"
1165                                      " required for packet pacing");
1166                         err = ENODEV;
1167                         goto error;
1168                 }
1169                 if (!config->hca_attr.non_wire_sq) {
1170                         DRV_LOG(ERR, "Non-wire SQ feature is"
1171                                      " required for packet pacing");
1172                         err = ENODEV;
1173                         goto error;
1174                 }
1175                 if (!config->hca_attr.log_max_static_sq_wq) {
1176                         DRV_LOG(ERR, "Static WQE SQ feature is"
1177                                      " required for packet pacing");
1178                         err = ENODEV;
1179                         goto error;
1180                 }
1181                 if (!config->hca_attr.qos.wqe_rate_pp) {
1182                         DRV_LOG(ERR, "WQE rate mode is required"
1183                                      " for packet pacing");
1184                         err = ENODEV;
1185                         goto error;
1186                 }
1187 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1188                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1189                              " can't create queues for packet pacing");
1190                 err = ENODEV;
1191                 goto error;
1192 #endif
1193         }
1194         if (config->devx) {
1195                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1196
1197                 err = config->hca_attr.access_register_user ?
1198                         mlx5_devx_cmd_register_read
1199                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1200                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1201                 if (!err) {
1202                         uint32_t ts_mode;
1203
1204                         /* MTUTC register is read successfully. */
1205                         ts_mode = MLX5_GET(register_mtutc, reg,
1206                                            time_stamp_mode);
1207                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1208                                 config->rt_timestamp = 1;
1209                 } else {
1210                         /* Kernel does not support register reading. */
1211                         if (config->hca_attr.dev_freq_khz ==
1212                                                  (NS_PER_S / MS_PER_S))
1213                                 config->rt_timestamp = 1;
1214                 }
1215         }
1216         /*
1217          * If HW has bug working with tunnel packet decapsulation and
1218          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1219          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1220          */
1221         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1222                 config->hw_fcs_strip = 0;
1223         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1224                 (config->hw_fcs_strip ? "" : "not "));
1225         if (config->mprq.enabled && mprq) {
1226                 if (config->mprq.stride_num_n &&
1227                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1228                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1229                         config->mprq.stride_num_n =
1230                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1231                                                 mprq_min_stride_num_n),
1232                                         mprq_max_stride_num_n);
1233                         DRV_LOG(WARNING,
1234                                 "the number of strides"
1235                                 " for Multi-Packet RQ is out of range,"
1236                                 " setting default value (%u)",
1237                                 1 << config->mprq.stride_num_n);
1238                 }
1239                 if (config->mprq.stride_size_n &&
1240                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1241                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1242                         config->mprq.stride_size_n =
1243                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1244                                                 mprq_min_stride_size_n),
1245                                         mprq_max_stride_size_n);
1246                         DRV_LOG(WARNING,
1247                                 "the size of a stride"
1248                                 " for Multi-Packet RQ is out of range,"
1249                                 " setting default value (%u)",
1250                                 1 << config->mprq.stride_size_n);
1251                 }
1252                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1253                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1254         } else if (config->mprq.enabled && !mprq) {
1255                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1256                 config->mprq.enabled = 0;
1257         }
1258         if (config->max_dump_files_num == 0)
1259                 config->max_dump_files_num = 128;
1260         eth_dev = rte_eth_dev_allocate(name);
1261         if (eth_dev == NULL) {
1262                 DRV_LOG(ERR, "can not allocate rte ethdev");
1263                 err = ENOMEM;
1264                 goto error;
1265         }
1266         if (priv->representor) {
1267                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1268                 eth_dev->data->representor_id = priv->representor_id;
1269         }
1270         /*
1271          * Store associated network device interface index. This index
1272          * is permanent throughout the lifetime of device. So, we may store
1273          * the ifindex here and use the cached value further.
1274          */
1275         MLX5_ASSERT(spawn->ifindex);
1276         priv->if_index = spawn->ifindex;
1277         if (priv->pf_bond >= 0 && priv->master) {
1278                 /* Get bond interface info */
1279                 err = mlx5_sysfs_bond_info(priv->if_index,
1280                                      &priv->bond_ifindex,
1281                                      priv->bond_name);
1282                 if (err)
1283                         DRV_LOG(ERR, "unable to get bond info: %s",
1284                                 strerror(rte_errno));
1285                 else
1286                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1287                                 priv->if_index, priv->bond_ifindex,
1288                                 priv->bond_name);
1289         }
1290         eth_dev->data->dev_private = priv;
1291         priv->dev_data = eth_dev->data;
1292         eth_dev->data->mac_addrs = priv->mac;
1293         eth_dev->device = dpdk_dev;
1294         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1295         /* Configure the first MAC address by default. */
1296         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1297                 DRV_LOG(ERR,
1298                         "port %u cannot get MAC address, is mlx5_en"
1299                         " loaded? (errno: %s)",
1300                         eth_dev->data->port_id, strerror(rte_errno));
1301                 err = ENODEV;
1302                 goto error;
1303         }
1304         DRV_LOG(INFO,
1305                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1306                 eth_dev->data->port_id,
1307                 mac.addr_bytes[0], mac.addr_bytes[1],
1308                 mac.addr_bytes[2], mac.addr_bytes[3],
1309                 mac.addr_bytes[4], mac.addr_bytes[5]);
1310 #ifdef RTE_LIBRTE_MLX5_DEBUG
1311         {
1312                 char ifname[IF_NAMESIZE];
1313
1314                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1315                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1316                                 eth_dev->data->port_id, ifname);
1317                 else
1318                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1319                                 eth_dev->data->port_id);
1320         }
1321 #endif
1322         /* Get actual MTU if possible. */
1323         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1324         if (err) {
1325                 err = rte_errno;
1326                 goto error;
1327         }
1328         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1329                 priv->mtu);
1330         /* Initialize burst functions to prevent crashes before link-up. */
1331         eth_dev->rx_pkt_burst = removed_rx_burst;
1332         eth_dev->tx_pkt_burst = removed_tx_burst;
1333         eth_dev->dev_ops = &mlx5_os_dev_ops;
1334         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1335         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1336         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1337         /* Register MAC address. */
1338         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1339         if (config->vf && config->vf_nl_en)
1340                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1341                                       mlx5_ifindex(eth_dev),
1342                                       eth_dev->data->mac_addrs,
1343                                       MLX5_MAX_MAC_ADDRESSES);
1344         priv->flows = 0;
1345         priv->ctrl_flows = 0;
1346         TAILQ_INIT(&priv->flow_meters);
1347         TAILQ_INIT(&priv->flow_meter_profiles);
1348         /* Hint libmlx5 to use PMD allocator for data plane resources */
1349         mlx5_glue->dv_set_context_attr(sh->ctx,
1350                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1351                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1352                                 .alloc = &mlx5_alloc_verbs_buf,
1353                                 .free = &mlx5_free_verbs_buf,
1354                                 .data = priv,
1355                         }));
1356         /* Bring Ethernet device up. */
1357         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1358                 eth_dev->data->port_id);
1359         mlx5_set_link_up(eth_dev);
1360         /*
1361          * Even though the interrupt handler is not installed yet,
1362          * interrupts will still trigger on the async_fd from
1363          * Verbs context returned by ibv_open_device().
1364          */
1365         mlx5_link_update(eth_dev, 0);
1366 #ifdef HAVE_MLX5DV_DR_ESWITCH
1367         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1368               (switch_info->representor || switch_info->master)))
1369                 config->dv_esw_en = 0;
1370 #else
1371         config->dv_esw_en = 0;
1372 #endif
1373         /* Detect minimal data bytes to inline. */
1374         mlx5_set_min_inline(spawn, config);
1375         /* Store device configuration on private structure. */
1376         priv->config = *config;
1377         /* Create context for virtual machine VLAN workaround. */
1378         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1379         if (config->dv_flow_en) {
1380                 err = mlx5_alloc_shared_dr(priv);
1381                 if (err)
1382                         goto error;
1383                 /*
1384                  * RSS id is shared with meter flow id. Meter flow id can only
1385                  * use the 24 MSB of the register.
1386                  */
1387                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1388                                      MLX5_MTR_COLOR_BITS);
1389                 if (!priv->qrss_id_pool) {
1390                         DRV_LOG(ERR, "can't create flow id pool");
1391                         err = ENOMEM;
1392                         goto error;
1393                 }
1394         }
1395         if (config->devx && config->dv_flow_en && config->dest_tir) {
1396                 priv->obj_ops = devx_obj_ops;
1397                 priv->obj_ops.drop_action_create =
1398                                                 ibv_obj_ops.drop_action_create;
1399                 priv->obj_ops.drop_action_destroy =
1400                                                 ibv_obj_ops.drop_action_destroy;
1401 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1402                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1403 #else
1404                 if (config->dv_esw_en)
1405                         priv->obj_ops.txq_obj_modify =
1406                                                 ibv_obj_ops.txq_obj_modify;
1407 #endif
1408                 /* Use specific wrappers for Tx object. */
1409                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1410                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1411
1412         } else {
1413                 priv->obj_ops = ibv_obj_ops;
1414         }
1415         /* Supported Verbs flow priority number detection. */
1416         err = mlx5_flow_discover_priorities(eth_dev);
1417         if (err < 0) {
1418                 err = -err;
1419                 goto error;
1420         }
1421         priv->config.flow_prio = err;
1422         if (!priv->config.dv_esw_en &&
1423             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1424                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1425                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1426                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1427         }
1428         mlx5_set_metadata_mask(eth_dev);
1429         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1430             !priv->sh->dv_regc0_mask) {
1431                 DRV_LOG(ERR, "metadata mode %u is not supported "
1432                              "(no metadata reg_c[0] is available)",
1433                              priv->config.dv_xmeta_en);
1434                         err = ENOTSUP;
1435                         goto error;
1436         }
1437         /*
1438          * Allocate the buffer for flow creating, just once.
1439          * The allocation must be done before any flow creating.
1440          */
1441         mlx5_flow_alloc_intermediate(eth_dev);
1442         /* Query availability of metadata reg_c's. */
1443         err = mlx5_flow_discover_mreg_c(eth_dev);
1444         if (err < 0) {
1445                 err = -err;
1446                 goto error;
1447         }
1448         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1449                 DRV_LOG(DEBUG,
1450                         "port %u extensive metadata register is not supported",
1451                         eth_dev->data->port_id);
1452                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1453                         DRV_LOG(ERR, "metadata mode %u is not supported "
1454                                      "(no metadata registers available)",
1455                                      priv->config.dv_xmeta_en);
1456                         err = ENOTSUP;
1457                         goto error;
1458                 }
1459         }
1460         if (priv->config.dv_flow_en &&
1461             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1462             mlx5_flow_ext_mreg_supported(eth_dev) &&
1463             priv->sh->dv_regc0_mask) {
1464                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1465                                                       MLX5_FLOW_MREG_HTABLE_SZ);
1466                 if (!priv->mreg_cp_tbl) {
1467                         err = ENOMEM;
1468                         goto error;
1469                 }
1470         }
1471         mlx5_flow_counter_mode_config(eth_dev);
1472         return eth_dev;
1473 error:
1474         if (priv) {
1475                 if (priv->mreg_cp_tbl)
1476                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1477                 if (priv->sh)
1478                         mlx5_os_free_shared_dr(priv);
1479                 if (priv->nl_socket_route >= 0)
1480                         close(priv->nl_socket_route);
1481                 if (priv->nl_socket_rdma >= 0)
1482                         close(priv->nl_socket_rdma);
1483                 if (priv->vmwa_context)
1484                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1485                 if (priv->qrss_id_pool)
1486                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
1487                 if (own_domain_id)
1488                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1489                 mlx5_free(priv);
1490                 if (eth_dev != NULL)
1491                         eth_dev->data->dev_private = NULL;
1492         }
1493         if (eth_dev != NULL) {
1494                 /* mac_addrs must not be freed alone because part of
1495                  * dev_private
1496                  **/
1497                 eth_dev->data->mac_addrs = NULL;
1498                 rte_eth_dev_release_port(eth_dev);
1499         }
1500         if (sh)
1501                 mlx5_free_shared_dev_ctx(sh);
1502         MLX5_ASSERT(err > 0);
1503         rte_errno = err;
1504         return NULL;
1505 }
1506
1507 /**
1508  * Comparison callback to sort device data.
1509  *
1510  * This is meant to be used with qsort().
1511  *
1512  * @param a[in]
1513  *   Pointer to pointer to first data object.
1514  * @param b[in]
1515  *   Pointer to pointer to second data object.
1516  *
1517  * @return
1518  *   0 if both objects are equal, less than 0 if the first argument is less
1519  *   than the second, greater than 0 otherwise.
1520  */
1521 static int
1522 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1523 {
1524         const struct mlx5_switch_info *si_a =
1525                 &((const struct mlx5_dev_spawn_data *)a)->info;
1526         const struct mlx5_switch_info *si_b =
1527                 &((const struct mlx5_dev_spawn_data *)b)->info;
1528         int ret;
1529
1530         /* Master device first. */
1531         ret = si_b->master - si_a->master;
1532         if (ret)
1533                 return ret;
1534         /* Then representor devices. */
1535         ret = si_b->representor - si_a->representor;
1536         if (ret)
1537                 return ret;
1538         /* Unidentified devices come last in no specific order. */
1539         if (!si_a->representor)
1540                 return 0;
1541         /* Order representors by name. */
1542         return si_a->port_name - si_b->port_name;
1543 }
1544
1545 /**
1546  * Match PCI information for possible slaves of bonding device.
1547  *
1548  * @param[in] ibv_dev
1549  *   Pointer to Infiniband device structure.
1550  * @param[in] pci_dev
1551  *   Pointer to PCI device structure to match PCI address.
1552  * @param[in] nl_rdma
1553  *   Netlink RDMA group socket handle.
1554  *
1555  * @return
1556  *   negative value if no bonding device found, otherwise
1557  *   positive index of slave PF in bonding.
1558  */
1559 static int
1560 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1561                            const struct rte_pci_device *pci_dev,
1562                            int nl_rdma)
1563 {
1564         char ifname[IF_NAMESIZE + 1];
1565         unsigned int ifindex;
1566         unsigned int np, i;
1567         FILE *file = NULL;
1568         int pf = -1;
1569
1570         /*
1571          * Try to get master device name. If something goes
1572          * wrong suppose the lack of kernel support and no
1573          * bonding devices.
1574          */
1575         if (nl_rdma < 0)
1576                 return -1;
1577         if (!strstr(ibv_dev->name, "bond"))
1578                 return -1;
1579         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1580         if (!np)
1581                 return -1;
1582         /*
1583          * The Master device might not be on the predefined
1584          * port (not on port index 1, it is not garanted),
1585          * we have to scan all Infiniband device port and
1586          * find master.
1587          */
1588         for (i = 1; i <= np; ++i) {
1589                 /* Check whether Infiniband port is populated. */
1590                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1591                 if (!ifindex)
1592                         continue;
1593                 if (!if_indextoname(ifindex, ifname))
1594                         continue;
1595                 /* Try to read bonding slave names from sysfs. */
1596                 MKSTR(slaves,
1597                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1598                 file = fopen(slaves, "r");
1599                 if (file)
1600                         break;
1601         }
1602         if (!file)
1603                 return -1;
1604         /* Use safe format to check maximal buffer length. */
1605         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1606         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1607                 char tmp_str[IF_NAMESIZE + 32];
1608                 struct rte_pci_addr pci_addr;
1609                 struct mlx5_switch_info info;
1610
1611                 /* Process slave interface names in the loop. */
1612                 snprintf(tmp_str, sizeof(tmp_str),
1613                          "/sys/class/net/%s", ifname);
1614                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1615                         DRV_LOG(WARNING, "can not get PCI address"
1616                                          " for netdev \"%s\"", ifname);
1617                         continue;
1618                 }
1619                 if (pci_dev->addr.domain != pci_addr.domain ||
1620                     pci_dev->addr.bus != pci_addr.bus ||
1621                     pci_dev->addr.devid != pci_addr.devid ||
1622                     pci_dev->addr.function != pci_addr.function)
1623                         continue;
1624                 /* Slave interface PCI address match found. */
1625                 fclose(file);
1626                 snprintf(tmp_str, sizeof(tmp_str),
1627                          "/sys/class/net/%s/phys_port_name", ifname);
1628                 file = fopen(tmp_str, "rb");
1629                 if (!file)
1630                         break;
1631                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1632                 if (fscanf(file, "%32s", tmp_str) == 1)
1633                         mlx5_translate_port_name(tmp_str, &info);
1634                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1635                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1636                         pf = info.port_name;
1637                 break;
1638         }
1639         if (file)
1640                 fclose(file);
1641         return pf;
1642 }
1643
1644 /**
1645  * DPDK callback to register a PCI device.
1646  *
1647  * This function spawns Ethernet devices out of a given PCI device.
1648  *
1649  * @param[in] pci_drv
1650  *   PCI driver structure (mlx5_driver).
1651  * @param[in] pci_dev
1652  *   PCI device information.
1653  *
1654  * @return
1655  *   0 on success, a negative errno value otherwise and rte_errno is set.
1656  */
1657 int
1658 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1659                   struct rte_pci_device *pci_dev)
1660 {
1661         struct ibv_device **ibv_list;
1662         /*
1663          * Number of found IB Devices matching with requested PCI BDF.
1664          * nd != 1 means there are multiple IB devices over the same
1665          * PCI device and we have representors and master.
1666          */
1667         unsigned int nd = 0;
1668         /*
1669          * Number of found IB device Ports. nd = 1 and np = 1..n means
1670          * we have the single multiport IB device, and there may be
1671          * representors attached to some of found ports.
1672          */
1673         unsigned int np = 0;
1674         /*
1675          * Number of DPDK ethernet devices to Spawn - either over
1676          * multiple IB devices or multiple ports of single IB device.
1677          * Actually this is the number of iterations to spawn.
1678          */
1679         unsigned int ns = 0;
1680         /*
1681          * Bonding device
1682          *   < 0 - no bonding device (single one)
1683          *  >= 0 - bonding device (value is slave PF index)
1684          */
1685         int bd = -1;
1686         struct mlx5_dev_spawn_data *list = NULL;
1687         struct mlx5_dev_config dev_config;
1688         unsigned int dev_config_vf;
1689         int ret;
1690
1691         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1692                 mlx5_pmd_socket_init();
1693         ret = mlx5_init_once();
1694         if (ret) {
1695                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1696                         strerror(rte_errno));
1697                 return -rte_errno;
1698         }
1699         errno = 0;
1700         ibv_list = mlx5_glue->get_device_list(&ret);
1701         if (!ibv_list) {
1702                 rte_errno = errno ? errno : ENOSYS;
1703                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1704                 return -rte_errno;
1705         }
1706         /*
1707          * First scan the list of all Infiniband devices to find
1708          * matching ones, gathering into the list.
1709          */
1710         struct ibv_device *ibv_match[ret + 1];
1711         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1712         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1713         unsigned int i;
1714
1715         while (ret-- > 0) {
1716                 struct rte_pci_addr pci_addr;
1717
1718                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1719                 bd = mlx5_device_bond_pci_match
1720                                 (ibv_list[ret], pci_dev, nl_rdma);
1721                 if (bd >= 0) {
1722                         /*
1723                          * Bonding device detected. Only one match is allowed,
1724                          * the bonding is supported over multi-port IB device,
1725                          * there should be no matches on representor PCI
1726                          * functions or non VF LAG bonding devices with
1727                          * specified address.
1728                          */
1729                         if (nd) {
1730                                 DRV_LOG(ERR,
1731                                         "multiple PCI match on bonding device"
1732                                         "\"%s\" found", ibv_list[ret]->name);
1733                                 rte_errno = ENOENT;
1734                                 ret = -rte_errno;
1735                                 goto exit;
1736                         }
1737                         DRV_LOG(INFO, "PCI information matches for"
1738                                       " slave %d bonding device \"%s\"",
1739                                       bd, ibv_list[ret]->name);
1740                         ibv_match[nd++] = ibv_list[ret];
1741                         break;
1742                 }
1743                 if (mlx5_dev_to_pci_addr
1744                         (ibv_list[ret]->ibdev_path, &pci_addr))
1745                         continue;
1746                 if (pci_dev->addr.domain != pci_addr.domain ||
1747                     pci_dev->addr.bus != pci_addr.bus ||
1748                     pci_dev->addr.devid != pci_addr.devid ||
1749                     pci_dev->addr.function != pci_addr.function)
1750                         continue;
1751                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1752                         ibv_list[ret]->name);
1753                 ibv_match[nd++] = ibv_list[ret];
1754         }
1755         ibv_match[nd] = NULL;
1756         if (!nd) {
1757                 /* No device matches, just complain and bail out. */
1758                 DRV_LOG(WARNING,
1759                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1760                         " are kernel drivers loaded?",
1761                         pci_dev->addr.domain, pci_dev->addr.bus,
1762                         pci_dev->addr.devid, pci_dev->addr.function);
1763                 rte_errno = ENOENT;
1764                 ret = -rte_errno;
1765                 goto exit;
1766         }
1767         if (nd == 1) {
1768                 /*
1769                  * Found single matching device may have multiple ports.
1770                  * Each port may be representor, we have to check the port
1771                  * number and check the representors existence.
1772                  */
1773                 if (nl_rdma >= 0)
1774                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1775                 if (!np)
1776                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1777                                          " ports number", ibv_match[0]->name);
1778                 if (bd >= 0 && !np) {
1779                         DRV_LOG(ERR, "can not get ports"
1780                                      " for bonding device");
1781                         rte_errno = ENOENT;
1782                         ret = -rte_errno;
1783                         goto exit;
1784                 }
1785         }
1786 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1787         if (bd >= 0) {
1788                 /*
1789                  * This may happen if there is VF LAG kernel support and
1790                  * application is compiled with older rdma_core library.
1791                  */
1792                 DRV_LOG(ERR,
1793                         "No kernel/verbs support for VF LAG bonding found.");
1794                 rte_errno = ENOTSUP;
1795                 ret = -rte_errno;
1796                 goto exit;
1797         }
1798 #endif
1799         /*
1800          * Now we can determine the maximal
1801          * amount of devices to be spawned.
1802          */
1803         list = mlx5_malloc(MLX5_MEM_ZERO,
1804                            sizeof(struct mlx5_dev_spawn_data) *
1805                            (np ? np : nd),
1806                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1807         if (!list) {
1808                 DRV_LOG(ERR, "spawn data array allocation failure");
1809                 rte_errno = ENOMEM;
1810                 ret = -rte_errno;
1811                 goto exit;
1812         }
1813         if (bd >= 0 || np > 1) {
1814                 /*
1815                  * Single IB device with multiple ports found,
1816                  * it may be E-Switch master device and representors.
1817                  * We have to perform identification through the ports.
1818                  */
1819                 MLX5_ASSERT(nl_rdma >= 0);
1820                 MLX5_ASSERT(ns == 0);
1821                 MLX5_ASSERT(nd == 1);
1822                 MLX5_ASSERT(np);
1823                 for (i = 1; i <= np; ++i) {
1824                         list[ns].max_port = np;
1825                         list[ns].phys_port = i;
1826                         list[ns].phys_dev = ibv_match[0];
1827                         list[ns].eth_dev = NULL;
1828                         list[ns].pci_dev = pci_dev;
1829                         list[ns].pf_bond = bd;
1830                         list[ns].ifindex = mlx5_nl_ifindex
1831                                 (nl_rdma,
1832                                 mlx5_os_get_dev_device_name
1833                                                 (list[ns].phys_dev), i);
1834                         if (!list[ns].ifindex) {
1835                                 /*
1836                                  * No network interface index found for the
1837                                  * specified port, it means there is no
1838                                  * representor on this port. It's OK,
1839                                  * there can be disabled ports, for example
1840                                  * if sriov_numvfs < sriov_totalvfs.
1841                                  */
1842                                 continue;
1843                         }
1844                         ret = -1;
1845                         if (nl_route >= 0)
1846                                 ret = mlx5_nl_switch_info
1847                                                (nl_route,
1848                                                 list[ns].ifindex,
1849                                                 &list[ns].info);
1850                         if (ret || (!list[ns].info.representor &&
1851                                     !list[ns].info.master)) {
1852                                 /*
1853                                  * We failed to recognize representors with
1854                                  * Netlink, let's try to perform the task
1855                                  * with sysfs.
1856                                  */
1857                                 ret =  mlx5_sysfs_switch_info
1858                                                 (list[ns].ifindex,
1859                                                  &list[ns].info);
1860                         }
1861                         if (!ret && bd >= 0) {
1862                                 switch (list[ns].info.name_type) {
1863                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1864                                         if (list[ns].info.port_name == bd)
1865                                                 ns++;
1866                                         break;
1867                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1868                                         /* Fallthrough */
1869                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1870                                         if (list[ns].info.pf_num == bd)
1871                                                 ns++;
1872                                         break;
1873                                 default:
1874                                         break;
1875                                 }
1876                                 continue;
1877                         }
1878                         if (!ret && (list[ns].info.representor ^
1879                                      list[ns].info.master))
1880                                 ns++;
1881                 }
1882                 if (!ns) {
1883                         DRV_LOG(ERR,
1884                                 "unable to recognize master/representors"
1885                                 " on the IB device with multiple ports");
1886                         rte_errno = ENOENT;
1887                         ret = -rte_errno;
1888                         goto exit;
1889                 }
1890         } else {
1891                 /*
1892                  * The existence of several matching entries (nd > 1) means
1893                  * port representors have been instantiated. No existing Verbs
1894                  * call nor sysfs entries can tell them apart, this can only
1895                  * be done through Netlink calls assuming kernel drivers are
1896                  * recent enough to support them.
1897                  *
1898                  * In the event of identification failure through Netlink,
1899                  * try again through sysfs, then:
1900                  *
1901                  * 1. A single IB device matches (nd == 1) with single
1902                  *    port (np=0/1) and is not a representor, assume
1903                  *    no switch support.
1904                  *
1905                  * 2. Otherwise no safe assumptions can be made;
1906                  *    complain louder and bail out.
1907                  */
1908                 for (i = 0; i != nd; ++i) {
1909                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1910                         list[ns].max_port = 1;
1911                         list[ns].phys_port = 1;
1912                         list[ns].phys_dev = ibv_match[i];
1913                         list[ns].eth_dev = NULL;
1914                         list[ns].pci_dev = pci_dev;
1915                         list[ns].pf_bond = -1;
1916                         list[ns].ifindex = 0;
1917                         if (nl_rdma >= 0)
1918                                 list[ns].ifindex = mlx5_nl_ifindex
1919                                 (nl_rdma,
1920                                 mlx5_os_get_dev_device_name
1921                                                 (list[ns].phys_dev), 1);
1922                         if (!list[ns].ifindex) {
1923                                 char ifname[IF_NAMESIZE];
1924
1925                                 /*
1926                                  * Netlink failed, it may happen with old
1927                                  * ib_core kernel driver (before 4.16).
1928                                  * We can assume there is old driver because
1929                                  * here we are processing single ports IB
1930                                  * devices. Let's try sysfs to retrieve
1931                                  * the ifindex. The method works for
1932                                  * master device only.
1933                                  */
1934                                 if (nd > 1) {
1935                                         /*
1936                                          * Multiple devices found, assume
1937                                          * representors, can not distinguish
1938                                          * master/representor and retrieve
1939                                          * ifindex via sysfs.
1940                                          */
1941                                         continue;
1942                                 }
1943                                 ret = mlx5_get_ifname_sysfs
1944                                         (ibv_match[i]->ibdev_path, ifname);
1945                                 if (!ret)
1946                                         list[ns].ifindex =
1947                                                 if_nametoindex(ifname);
1948                                 if (!list[ns].ifindex) {
1949                                         /*
1950                                          * No network interface index found
1951                                          * for the specified device, it means
1952                                          * there it is neither representor
1953                                          * nor master.
1954                                          */
1955                                         continue;
1956                                 }
1957                         }
1958                         ret = -1;
1959                         if (nl_route >= 0)
1960                                 ret = mlx5_nl_switch_info
1961                                                (nl_route,
1962                                                 list[ns].ifindex,
1963                                                 &list[ns].info);
1964                         if (ret || (!list[ns].info.representor &&
1965                                     !list[ns].info.master)) {
1966                                 /*
1967                                  * We failed to recognize representors with
1968                                  * Netlink, let's try to perform the task
1969                                  * with sysfs.
1970                                  */
1971                                 ret =  mlx5_sysfs_switch_info
1972                                                 (list[ns].ifindex,
1973                                                  &list[ns].info);
1974                         }
1975                         if (!ret && (list[ns].info.representor ^
1976                                      list[ns].info.master)) {
1977                                 ns++;
1978                         } else if ((nd == 1) &&
1979                                    !list[ns].info.representor &&
1980                                    !list[ns].info.master) {
1981                                 /*
1982                                  * Single IB device with
1983                                  * one physical port and
1984                                  * attached network device.
1985                                  * May be SRIOV is not enabled
1986                                  * or there is no representors.
1987                                  */
1988                                 DRV_LOG(INFO, "no E-Switch support detected");
1989                                 ns++;
1990                                 break;
1991                         }
1992                 }
1993                 if (!ns) {
1994                         DRV_LOG(ERR,
1995                                 "unable to recognize master/representors"
1996                                 " on the multiple IB devices");
1997                         rte_errno = ENOENT;
1998                         ret = -rte_errno;
1999                         goto exit;
2000                 }
2001         }
2002         MLX5_ASSERT(ns);
2003         /*
2004          * Sort list to probe devices in natural order for users convenience
2005          * (i.e. master first, then representors from lowest to highest ID).
2006          */
2007         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2008         /* Device specific configuration. */
2009         switch (pci_dev->id.device_id) {
2010         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2011         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2012         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2013         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2014         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2015         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2016         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2017                 dev_config_vf = 1;
2018                 break;
2019         default:
2020                 dev_config_vf = 0;
2021                 break;
2022         }
2023         for (i = 0; i != ns; ++i) {
2024                 uint32_t restore;
2025
2026                 /* Default configuration. */
2027                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2028                 dev_config.vf = dev_config_vf;
2029                 dev_config.mps = MLX5_ARG_UNSET;
2030                 dev_config.dbnc = MLX5_ARG_UNSET;
2031                 dev_config.rx_vec_en = 1;
2032                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2033                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2034                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2035                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2036                 dev_config.vf_nl_en = 1;
2037                 dev_config.mr_ext_memseg_en = 1;
2038                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2039                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2040                 dev_config.dv_esw_en = 1;
2041                 dev_config.dv_flow_en = 1;
2042                 dev_config.decap_en = 1;
2043                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2044                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2045                                                  &list[i],
2046                                                  &dev_config);
2047                 if (!list[i].eth_dev) {
2048                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2049                                 break;
2050                         /* Device is disabled or already spawned. Ignore it. */
2051                         continue;
2052                 }
2053                 restore = list[i].eth_dev->data->dev_flags;
2054                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2055                 /* Restore non-PCI flags cleared by the above call. */
2056                 list[i].eth_dev->data->dev_flags |= restore;
2057                 rte_eth_dev_probing_finish(list[i].eth_dev);
2058         }
2059         if (i != ns) {
2060                 DRV_LOG(ERR,
2061                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2062                         " encountering an error: %s",
2063                         pci_dev->addr.domain, pci_dev->addr.bus,
2064                         pci_dev->addr.devid, pci_dev->addr.function,
2065                         strerror(rte_errno));
2066                 ret = -rte_errno;
2067                 /* Roll back. */
2068                 while (i--) {
2069                         if (!list[i].eth_dev)
2070                                 continue;
2071                         mlx5_dev_close(list[i].eth_dev);
2072                         /* mac_addrs must not be freed because in dev_private */
2073                         list[i].eth_dev->data->mac_addrs = NULL;
2074                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2075                 }
2076                 /* Restore original error. */
2077                 rte_errno = -ret;
2078         } else {
2079                 ret = 0;
2080         }
2081 exit:
2082         /*
2083          * Do the routine cleanup:
2084          * - close opened Netlink sockets
2085          * - free allocated spawn data array
2086          * - free the Infiniband device list
2087          */
2088         if (nl_rdma >= 0)
2089                 close(nl_rdma);
2090         if (nl_route >= 0)
2091                 close(nl_route);
2092         if (list)
2093                 mlx5_free(list);
2094         MLX5_ASSERT(ibv_list);
2095         mlx5_glue->free_device_list(ibv_list);
2096         return ret;
2097 }
2098
2099 static int
2100 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2101 {
2102         char *env;
2103         int value;
2104
2105         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2106         /* Get environment variable to store. */
2107         env = getenv(MLX5_SHUT_UP_BF);
2108         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2109         if (config->dbnc == MLX5_ARG_UNSET)
2110                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2111         else
2112                 setenv(MLX5_SHUT_UP_BF,
2113                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2114         return value;
2115 }
2116
2117 static void
2118 mlx5_restore_doorbell_mapping_env(int value)
2119 {
2120         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2121         /* Restore the original environment variable state. */
2122         if (value == MLX5_ARG_UNSET)
2123                 unsetenv(MLX5_SHUT_UP_BF);
2124         else
2125                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2126 }
2127
2128 /**
2129  * Extract pdn of PD object using DV API.
2130  *
2131  * @param[in] pd
2132  *   Pointer to the verbs PD object.
2133  * @param[out] pdn
2134  *   Pointer to the PD object number variable.
2135  *
2136  * @return
2137  *   0 on success, error value otherwise.
2138  */
2139 int
2140 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2141 {
2142 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2143         struct mlx5dv_obj obj;
2144         struct mlx5dv_pd pd_info;
2145         int ret = 0;
2146
2147         obj.pd.in = pd;
2148         obj.pd.out = &pd_info;
2149         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2150         if (ret) {
2151                 DRV_LOG(DEBUG, "Fail to get PD object info");
2152                 return ret;
2153         }
2154         *pdn = pd_info.pdn;
2155         return 0;
2156 #else
2157         (void)pd;
2158         (void)pdn;
2159         return -ENOTSUP;
2160 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2161 }
2162
2163 /**
2164  * Function API to open IB device.
2165  *
2166  * This function calls the Linux glue APIs to open a device.
2167  *
2168  * @param[in] spawn
2169  *   Pointer to the IB device attributes (name, port, etc).
2170  * @param[out] config
2171  *   Pointer to device configuration structure.
2172  * @param[out] sh
2173  *   Pointer to shared context structure.
2174  *
2175  * @return
2176  *   0 on success, a positive error value otherwise.
2177  */
2178 int
2179 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2180                      const struct mlx5_dev_config *config,
2181                      struct mlx5_dev_ctx_shared *sh)
2182 {
2183         int dbmap_env;
2184         int err = 0;
2185
2186         sh->numa_node = spawn->pci_dev->device.numa_node;
2187         pthread_mutex_init(&sh->txpp.mutex, NULL);
2188         /*
2189          * Configure environment variable "MLX5_BF_SHUT_UP"
2190          * before the device creation. The rdma_core library
2191          * checks the variable at device creation and
2192          * stores the result internally.
2193          */
2194         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2195         /* Try to open IB device with DV first, then usual Verbs. */
2196         errno = 0;
2197         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2198         if (sh->ctx) {
2199                 sh->devx = 1;
2200                 DRV_LOG(DEBUG, "DevX is supported");
2201                 /* The device is created, no need for environment. */
2202                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2203         } else {
2204                 /* The environment variable is still configured. */
2205                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2206                 err = errno ? errno : ENODEV;
2207                 /*
2208                  * The environment variable is not needed anymore,
2209                  * all device creation attempts are completed.
2210                  */
2211                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2212                 if (!sh->ctx)
2213                         return err;
2214                 DRV_LOG(DEBUG, "DevX is NOT supported");
2215                 err = 0;
2216         }
2217         return err;
2218 }
2219
2220 /**
2221  * Install shared asynchronous device events handler.
2222  * This function is implemented to support event sharing
2223  * between multiple ports of single IB device.
2224  *
2225  * @param sh
2226  *   Pointer to mlx5_dev_ctx_shared object.
2227  */
2228 void
2229 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2230 {
2231         int ret;
2232         int flags;
2233
2234         sh->intr_handle.fd = -1;
2235         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2236         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2237                     F_SETFL, flags | O_NONBLOCK);
2238         if (ret) {
2239                 DRV_LOG(INFO, "failed to change file descriptor async event"
2240                         " queue");
2241         } else {
2242                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2243                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2244                 if (rte_intr_callback_register(&sh->intr_handle,
2245                                         mlx5_dev_interrupt_handler, sh)) {
2246                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2247                         sh->intr_handle.fd = -1;
2248                 }
2249         }
2250         if (sh->devx) {
2251 #ifdef HAVE_IBV_DEVX_ASYNC
2252                 sh->intr_handle_devx.fd = -1;
2253                 sh->devx_comp =
2254                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2255                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2256                 if (!devx_comp) {
2257                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2258                         return;
2259                 }
2260                 flags = fcntl(devx_comp->fd, F_GETFL);
2261                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2262                 if (ret) {
2263                         DRV_LOG(INFO, "failed to change file descriptor"
2264                                 " devx comp");
2265                         return;
2266                 }
2267                 sh->intr_handle_devx.fd = devx_comp->fd;
2268                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2269                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2270                                         mlx5_dev_interrupt_handler_devx, sh)) {
2271                         DRV_LOG(INFO, "Fail to install the devx shared"
2272                                 " interrupt.");
2273                         sh->intr_handle_devx.fd = -1;
2274                 }
2275 #endif /* HAVE_IBV_DEVX_ASYNC */
2276         }
2277 }
2278
2279 /**
2280  * Uninstall shared asynchronous device events handler.
2281  * This function is implemented to support event sharing
2282  * between multiple ports of single IB device.
2283  *
2284  * @param dev
2285  *   Pointer to mlx5_dev_ctx_shared object.
2286  */
2287 void
2288 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2289 {
2290         if (sh->intr_handle.fd >= 0)
2291                 mlx5_intr_callback_unregister(&sh->intr_handle,
2292                                               mlx5_dev_interrupt_handler, sh);
2293 #ifdef HAVE_IBV_DEVX_ASYNC
2294         if (sh->intr_handle_devx.fd >= 0)
2295                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2296                                   mlx5_dev_interrupt_handler_devx, sh);
2297         if (sh->devx_comp)
2298                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2299 #endif
2300 }
2301
2302 /**
2303  * Read statistics by a named counter.
2304  *
2305  * @param[in] priv
2306  *   Pointer to the private device data structure.
2307  * @param[in] ctr_name
2308  *   Pointer to the name of the statistic counter to read
2309  * @param[out] stat
2310  *   Pointer to read statistic value.
2311  * @return
2312  *   0 on success and stat is valud, 1 if failed to read the value
2313  *   rte_errno is set.
2314  *
2315  */
2316 int
2317 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2318                       uint64_t *stat)
2319 {
2320         int fd;
2321
2322         if (priv->sh) {
2323                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2324                       priv->sh->ibdev_path,
2325                       priv->dev_port,
2326                       ctr_name);
2327                 fd = open(path, O_RDONLY);
2328                 /*
2329                  * in switchdev the file location is not per port
2330                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2331                  */
2332                 if (fd == -1) {
2333                         MKSTR(path1, "%s/hw_counters/%s",
2334                               priv->sh->ibdev_path,
2335                               ctr_name);
2336                         fd = open(path1, O_RDONLY);
2337                 }
2338                 if (fd != -1) {
2339                         char buf[21] = {'\0'};
2340                         ssize_t n = read(fd, buf, sizeof(buf));
2341
2342                         close(fd);
2343                         if (n != -1) {
2344                                 *stat = strtoull(buf, NULL, 10);
2345                                 return 0;
2346                         }
2347                 }
2348         }
2349         *stat = 0;
2350         return 1;
2351 }
2352
2353 /**
2354  * Set the reg_mr and dereg_mr call backs
2355  *
2356  * @param reg_mr_cb[out]
2357  *   Pointer to reg_mr func
2358  * @param dereg_mr_cb[out]
2359  *   Pointer to dereg_mr func
2360  *
2361  */
2362 void
2363 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2364                       mlx5_dereg_mr_t *dereg_mr_cb)
2365 {
2366         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2367         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2368 }
2369
2370 /**
2371  * Remove a MAC address from device
2372  *
2373  * @param dev
2374  *   Pointer to Ethernet device structure.
2375  * @param index
2376  *   MAC address index.
2377  */
2378 void
2379 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2380 {
2381         struct mlx5_priv *priv = dev->data->dev_private;
2382         const int vf = priv->config.vf;
2383
2384         if (vf)
2385                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2386                                         mlx5_ifindex(dev), priv->mac_own,
2387                                         &dev->data->mac_addrs[index], index);
2388 }
2389
2390 /**
2391  * Adds a MAC address to the device
2392  *
2393  * @param dev
2394  *   Pointer to Ethernet device structure.
2395  * @param mac_addr
2396  *   MAC address to register.
2397  * @param index
2398  *   MAC address index.
2399  *
2400  * @return
2401  *   0 on success, a negative errno value otherwise
2402  */
2403 int
2404 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2405                      uint32_t index)
2406 {
2407         struct mlx5_priv *priv = dev->data->dev_private;
2408         const int vf = priv->config.vf;
2409         int ret = 0;
2410
2411         if (vf)
2412                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2413                                            mlx5_ifindex(dev), priv->mac_own,
2414                                            mac, index);
2415         return ret;
2416 }
2417
2418 /**
2419  * Modify a VF MAC address
2420  *
2421  * @param priv
2422  *   Pointer to device private data.
2423  * @param mac_addr
2424  *   MAC address to modify into.
2425  * @param iface_idx
2426  *   Net device interface index
2427  * @param vf_index
2428  *   VF index
2429  *
2430  * @return
2431  *   0 on success, a negative errno value otherwise
2432  */
2433 int
2434 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2435                            unsigned int iface_idx,
2436                            struct rte_ether_addr *mac_addr,
2437                            int vf_index)
2438 {
2439         return mlx5_nl_vf_mac_addr_modify
2440                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2441 }
2442
2443 /**
2444  * Set device promiscuous mode
2445  *
2446  * @param dev
2447  *   Pointer to Ethernet device structure.
2448  * @param enable
2449  *   0 - promiscuous is disabled, otherwise - enabled
2450  *
2451  * @return
2452  *   0 on success, a negative error value otherwise
2453  */
2454 int
2455 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2456 {
2457         struct mlx5_priv *priv = dev->data->dev_private;
2458
2459         return mlx5_nl_promisc(priv->nl_socket_route,
2460                                mlx5_ifindex(dev), !!enable);
2461 }
2462
2463 /**
2464  * Set device promiscuous mode
2465  *
2466  * @param dev
2467  *   Pointer to Ethernet device structure.
2468  * @param enable
2469  *   0 - all multicase is disabled, otherwise - enabled
2470  *
2471  * @return
2472  *   0 on success, a negative error value otherwise
2473  */
2474 int
2475 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2476 {
2477         struct mlx5_priv *priv = dev->data->dev_private;
2478
2479         return mlx5_nl_allmulti(priv->nl_socket_route,
2480                                 mlx5_ifindex(dev), !!enable);
2481 }
2482
2483 /**
2484  * Flush device MAC addresses
2485  *
2486  * @param dev
2487  *   Pointer to Ethernet device structure.
2488  *
2489  */
2490 void
2491 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2492 {
2493         struct mlx5_priv *priv = dev->data->dev_private;
2494
2495         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2496                                dev->data->mac_addrs,
2497                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2498 }
2499
2500 const struct eth_dev_ops mlx5_os_dev_ops = {
2501         .dev_configure = mlx5_dev_configure,
2502         .dev_start = mlx5_dev_start,
2503         .dev_stop = mlx5_dev_stop,
2504         .dev_set_link_down = mlx5_set_link_down,
2505         .dev_set_link_up = mlx5_set_link_up,
2506         .dev_close = mlx5_dev_close,
2507         .promiscuous_enable = mlx5_promiscuous_enable,
2508         .promiscuous_disable = mlx5_promiscuous_disable,
2509         .allmulticast_enable = mlx5_allmulticast_enable,
2510         .allmulticast_disable = mlx5_allmulticast_disable,
2511         .link_update = mlx5_link_update,
2512         .stats_get = mlx5_stats_get,
2513         .stats_reset = mlx5_stats_reset,
2514         .xstats_get = mlx5_xstats_get,
2515         .xstats_reset = mlx5_xstats_reset,
2516         .xstats_get_names = mlx5_xstats_get_names,
2517         .fw_version_get = mlx5_fw_version_get,
2518         .dev_infos_get = mlx5_dev_infos_get,
2519         .read_clock = mlx5_txpp_read_clock,
2520         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2521         .vlan_filter_set = mlx5_vlan_filter_set,
2522         .rx_queue_setup = mlx5_rx_queue_setup,
2523         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2524         .tx_queue_setup = mlx5_tx_queue_setup,
2525         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2526         .rx_queue_release = mlx5_rx_queue_release,
2527         .tx_queue_release = mlx5_tx_queue_release,
2528         .rx_queue_start = mlx5_rx_queue_start,
2529         .rx_queue_stop = mlx5_rx_queue_stop,
2530         .tx_queue_start = mlx5_tx_queue_start,
2531         .tx_queue_stop = mlx5_tx_queue_stop,
2532         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2533         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2534         .mac_addr_remove = mlx5_mac_addr_remove,
2535         .mac_addr_add = mlx5_mac_addr_add,
2536         .mac_addr_set = mlx5_mac_addr_set,
2537         .set_mc_addr_list = mlx5_set_mc_addr_list,
2538         .mtu_set = mlx5_dev_set_mtu,
2539         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2540         .vlan_offload_set = mlx5_vlan_offload_set,
2541         .reta_update = mlx5_dev_rss_reta_update,
2542         .reta_query = mlx5_dev_rss_reta_query,
2543         .rss_hash_update = mlx5_rss_hash_update,
2544         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2545         .filter_ctrl = mlx5_dev_filter_ctrl,
2546         .rxq_info_get = mlx5_rxq_info_get,
2547         .txq_info_get = mlx5_txq_info_get,
2548         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2549         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2550         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2551         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2552         .is_removed = mlx5_is_removed,
2553         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2554         .get_module_info = mlx5_get_module_info,
2555         .get_module_eeprom = mlx5_get_module_eeprom,
2556         .hairpin_cap_get = mlx5_hairpin_cap_get,
2557         .mtr_ops_get = mlx5_flow_meter_ops_get,
2558 };
2559
2560 /* Available operations from secondary process. */
2561 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2562         .stats_get = mlx5_stats_get,
2563         .stats_reset = mlx5_stats_reset,
2564         .xstats_get = mlx5_xstats_get,
2565         .xstats_reset = mlx5_xstats_reset,
2566         .xstats_get_names = mlx5_xstats_get_names,
2567         .fw_version_get = mlx5_fw_version_get,
2568         .dev_infos_get = mlx5_dev_infos_get,
2569         .read_clock = mlx5_txpp_read_clock,
2570         .rx_queue_start = mlx5_rx_queue_start,
2571         .rx_queue_stop = mlx5_rx_queue_stop,
2572         .tx_queue_start = mlx5_tx_queue_start,
2573         .tx_queue_stop = mlx5_tx_queue_stop,
2574         .rxq_info_get = mlx5_rxq_info_get,
2575         .txq_info_get = mlx5_txq_info_get,
2576         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2577         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2578         .get_module_info = mlx5_get_module_info,
2579         .get_module_eeprom = mlx5_get_module_eeprom,
2580 };
2581
2582 /* Available operations in flow isolated mode. */
2583 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2584         .dev_configure = mlx5_dev_configure,
2585         .dev_start = mlx5_dev_start,
2586         .dev_stop = mlx5_dev_stop,
2587         .dev_set_link_down = mlx5_set_link_down,
2588         .dev_set_link_up = mlx5_set_link_up,
2589         .dev_close = mlx5_dev_close,
2590         .promiscuous_enable = mlx5_promiscuous_enable,
2591         .promiscuous_disable = mlx5_promiscuous_disable,
2592         .allmulticast_enable = mlx5_allmulticast_enable,
2593         .allmulticast_disable = mlx5_allmulticast_disable,
2594         .link_update = mlx5_link_update,
2595         .stats_get = mlx5_stats_get,
2596         .stats_reset = mlx5_stats_reset,
2597         .xstats_get = mlx5_xstats_get,
2598         .xstats_reset = mlx5_xstats_reset,
2599         .xstats_get_names = mlx5_xstats_get_names,
2600         .fw_version_get = mlx5_fw_version_get,
2601         .dev_infos_get = mlx5_dev_infos_get,
2602         .read_clock = mlx5_txpp_read_clock,
2603         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2604         .vlan_filter_set = mlx5_vlan_filter_set,
2605         .rx_queue_setup = mlx5_rx_queue_setup,
2606         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2607         .tx_queue_setup = mlx5_tx_queue_setup,
2608         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2609         .rx_queue_release = mlx5_rx_queue_release,
2610         .tx_queue_release = mlx5_tx_queue_release,
2611         .rx_queue_start = mlx5_rx_queue_start,
2612         .rx_queue_stop = mlx5_rx_queue_stop,
2613         .tx_queue_start = mlx5_tx_queue_start,
2614         .tx_queue_stop = mlx5_tx_queue_stop,
2615         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2616         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2617         .mac_addr_remove = mlx5_mac_addr_remove,
2618         .mac_addr_add = mlx5_mac_addr_add,
2619         .mac_addr_set = mlx5_mac_addr_set,
2620         .set_mc_addr_list = mlx5_set_mc_addr_list,
2621         .mtu_set = mlx5_dev_set_mtu,
2622         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2623         .vlan_offload_set = mlx5_vlan_offload_set,
2624         .filter_ctrl = mlx5_dev_filter_ctrl,
2625         .rxq_info_get = mlx5_rxq_info_get,
2626         .txq_info_get = mlx5_txq_info_get,
2627         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2628         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2629         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2630         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2631         .is_removed = mlx5_is_removed,
2632         .get_module_info = mlx5_get_module_info,
2633         .get_module_eeprom = mlx5_get_module_eeprom,
2634         .hairpin_cap_get = mlx5_hairpin_cap_get,
2635         .mtr_ops_get = mlx5_flow_meter_ops_get,
2636 };