1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_kvargs.h>
35 #include <rte_rwlock.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_alarm.h>
39 #include <rte_eal_paging.h>
41 #include <mlx5_glue.h>
42 #include <mlx5_devx_cmds.h>
43 #include <mlx5_common.h>
44 #include <mlx5_common_mp.h>
45 #include <mlx5_common_mr.h>
46 #include <mlx5_malloc.h>
48 #include "mlx5_defs.h"
50 #include "mlx5_common_os.h"
51 #include "mlx5_utils.h"
52 #include "mlx5_rxtx.h"
53 #include "mlx5_autoconf.h"
55 #include "mlx5_flow.h"
56 #include "rte_pmd_mlx5.h"
57 #include "mlx5_verbs.h"
59 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
61 #ifndef HAVE_IBV_MLX5_MOD_MPW
62 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
63 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
66 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
67 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
71 * Get mlx5 device attributes. The glue function query_device_ex() is called
72 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
73 * device attributes from the glue out parameter.
76 * Pointer to ibv context.
79 * Pointer to mlx5 device attributes.
82 * 0 on success, non zero error number otherwise
85 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
88 struct ibv_device_attr_ex attr_ex;
89 memset(device_attr, 0, sizeof(*device_attr));
90 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
94 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
95 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
96 device_attr->max_sge = attr_ex.orig_attr.max_sge;
97 device_attr->max_cq = attr_ex.orig_attr.max_cq;
98 device_attr->max_qp = attr_ex.orig_attr.max_qp;
99 device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
100 device_attr->max_rwq_indirection_table_size =
101 attr_ex.rss_caps.max_rwq_indirection_table_size;
102 device_attr->max_tso = attr_ex.tso_caps.max_tso;
103 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
105 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
106 err = mlx5_glue->dv_query_device(ctx, &dv_attr);
110 device_attr->flags = dv_attr.flags;
111 device_attr->comp_mask = dv_attr.comp_mask;
112 #ifdef HAVE_IBV_MLX5_MOD_SWP
113 device_attr->sw_parsing_offloads =
114 dv_attr.sw_parsing_caps.sw_parsing_offloads;
116 device_attr->min_single_stride_log_num_of_bytes =
117 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
118 device_attr->max_single_stride_log_num_of_bytes =
119 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
120 device_attr->min_single_wqe_log_num_of_strides =
121 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
122 device_attr->max_single_wqe_log_num_of_strides =
123 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
124 device_attr->stride_supported_qpts =
125 dv_attr.striding_rq_caps.supported_qpts;
126 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
127 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
134 * Verbs callback to allocate a memory. This function should allocate the space
135 * according to the size provided residing inside a huge page.
136 * Please note that all allocation must respect the alignment from libmlx5
137 * (i.e. currently rte_mem_page_size()).
140 * The size in bytes of the memory to allocate.
142 * A pointer to the callback data.
145 * Allocated buffer, NULL otherwise and rte_errno is set.
148 mlx5_alloc_verbs_buf(size_t size, void *data)
150 struct mlx5_priv *priv = data;
152 unsigned int socket = SOCKET_ID_ANY;
153 size_t alignment = rte_mem_page_size();
154 if (alignment == (size_t)-1) {
155 DRV_LOG(ERR, "Failed to get mem page size");
160 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
161 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
163 socket = ctrl->socket;
164 } else if (priv->verbs_alloc_ctx.type ==
165 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
166 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
168 socket = ctrl->socket;
170 MLX5_ASSERT(data != NULL);
171 ret = mlx5_malloc(0, size, alignment, socket);
178 * Verbs callback to free a memory.
181 * A pointer to the memory to free.
183 * A pointer to the callback data.
186 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
188 MLX5_ASSERT(data != NULL);
193 * Initialize DR related data within private structure.
194 * Routine checks the reference counter and does actual
195 * resources creation/initialization only if counter is zero.
198 * Pointer to the private device data structure.
201 * Zero on success, positive error code otherwise.
204 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
206 struct mlx5_dev_ctx_shared *sh = priv->sh;
207 char s[MLX5_HLIST_NAMESIZE];
211 err = mlx5_alloc_table_hash_list(priv);
213 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
214 (void *)sh->flow_tbls);
217 /* Create tags hash list table. */
218 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
219 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
220 if (!sh->tag_table) {
221 DRV_LOG(ERR, "tags with hash creation failed.");
225 #ifdef HAVE_MLX5DV_DR
229 /* Shared DV/DR structures is already initialized. */
234 /* Reference counter is zero, we should initialize structures. */
235 domain = mlx5_glue->dr_create_domain(sh->ctx,
236 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
238 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
242 sh->rx_domain = domain;
243 domain = mlx5_glue->dr_create_domain(sh->ctx,
244 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
246 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
250 pthread_mutex_init(&sh->dv_mutex, NULL);
251 sh->tx_domain = domain;
252 #ifdef HAVE_MLX5DV_DR_ESWITCH
253 if (priv->config.dv_esw_en) {
254 domain = mlx5_glue->dr_create_domain
255 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
257 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
261 sh->fdb_domain = domain;
262 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
265 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
266 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
267 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
269 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
271 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
272 #endif /* HAVE_MLX5DV_DR */
277 /* Rollback the created objects. */
279 mlx5_glue->dr_destroy_domain(sh->rx_domain);
280 sh->rx_domain = NULL;
283 mlx5_glue->dr_destroy_domain(sh->tx_domain);
284 sh->tx_domain = NULL;
286 if (sh->fdb_domain) {
287 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
288 sh->fdb_domain = NULL;
290 if (sh->esw_drop_action) {
291 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
292 sh->esw_drop_action = NULL;
294 if (sh->pop_vlan_action) {
295 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
296 sh->pop_vlan_action = NULL;
299 /* tags should be destroyed with flow before. */
300 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
301 sh->tag_table = NULL;
303 mlx5_free_table_hash_list(priv);
308 * Destroy DR related data within private structure.
311 * Pointer to the private device data structure.
314 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
316 struct mlx5_dev_ctx_shared *sh;
318 if (!priv->dr_shared)
323 #ifdef HAVE_MLX5DV_DR
324 MLX5_ASSERT(sh->dv_refcnt);
325 if (sh->dv_refcnt && --sh->dv_refcnt)
328 mlx5_glue->dr_destroy_domain(sh->rx_domain);
329 sh->rx_domain = NULL;
332 mlx5_glue->dr_destroy_domain(sh->tx_domain);
333 sh->tx_domain = NULL;
335 #ifdef HAVE_MLX5DV_DR_ESWITCH
336 if (sh->fdb_domain) {
337 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
338 sh->fdb_domain = NULL;
340 if (sh->esw_drop_action) {
341 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
342 sh->esw_drop_action = NULL;
345 if (sh->pop_vlan_action) {
346 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
347 sh->pop_vlan_action = NULL;
349 pthread_mutex_destroy(&sh->dv_mutex);
350 #endif /* HAVE_MLX5DV_DR */
352 /* tags should be destroyed with flow before. */
353 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
354 sh->tag_table = NULL;
356 mlx5_free_table_hash_list(priv);
360 * Spawn an Ethernet device from Verbs information.
363 * Backing DPDK device.
365 * Verbs device parameters (name, port, switch_info) to spawn.
367 * Device configuration parameters.
370 * A valid Ethernet device object on success, NULL otherwise and rte_errno
371 * is set. The following errors are defined:
373 * EBUSY: device is not supposed to be spawned.
374 * EEXIST: device is already spawned
376 static struct rte_eth_dev *
377 mlx5_dev_spawn(struct rte_device *dpdk_dev,
378 struct mlx5_dev_spawn_data *spawn,
379 struct mlx5_dev_config config)
381 const struct mlx5_switch_info *switch_info = &spawn->info;
382 struct mlx5_dev_ctx_shared *sh = NULL;
383 struct ibv_port_attr port_attr;
384 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
385 struct rte_eth_dev *eth_dev = NULL;
386 struct mlx5_priv *priv = NULL;
388 unsigned int hw_padding = 0;
390 unsigned int cqe_comp;
391 unsigned int cqe_pad = 0;
392 unsigned int tunnel_en = 0;
393 unsigned int mpls_en = 0;
394 unsigned int swp = 0;
395 unsigned int mprq = 0;
396 unsigned int mprq_min_stride_size_n = 0;
397 unsigned int mprq_max_stride_size_n = 0;
398 unsigned int mprq_min_stride_num_n = 0;
399 unsigned int mprq_max_stride_num_n = 0;
400 struct rte_ether_addr mac;
401 char name[RTE_ETH_NAME_MAX_LEN];
402 int own_domain_id = 0;
405 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
406 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
409 /* Determine if this port representor is supposed to be spawned. */
410 if (switch_info->representor && dpdk_dev->devargs) {
411 struct rte_eth_devargs eth_da;
413 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
416 DRV_LOG(ERR, "failed to process device arguments: %s",
417 strerror(rte_errno));
420 for (i = 0; i < eth_da.nb_representor_ports; ++i)
421 if (eth_da.representor_ports[i] ==
422 (uint16_t)switch_info->port_name)
424 if (i == eth_da.nb_representor_ports) {
429 /* Build device name. */
430 if (spawn->pf_bond < 0) {
432 if (!switch_info->representor)
433 strlcpy(name, dpdk_dev->name, sizeof(name));
435 snprintf(name, sizeof(name), "%s_representor_%u",
436 dpdk_dev->name, switch_info->port_name);
438 /* Bonding device. */
439 if (!switch_info->representor)
440 snprintf(name, sizeof(name), "%s_%s",
442 mlx5_os_get_dev_device_name(spawn->phys_dev));
444 snprintf(name, sizeof(name), "%s_%s_representor_%u",
446 mlx5_os_get_dev_device_name(spawn->phys_dev),
447 switch_info->port_name);
449 /* check if the device is already spawned */
450 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
454 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
455 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
456 struct mlx5_mp_id mp_id;
458 eth_dev = rte_eth_dev_attach_secondary(name);
459 if (eth_dev == NULL) {
460 DRV_LOG(ERR, "can not attach rte ethdev");
464 eth_dev->device = dpdk_dev;
465 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
466 err = mlx5_proc_priv_init(eth_dev);
469 mp_id.port_id = eth_dev->data->port_id;
470 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
471 /* Receive command fd from primary process */
472 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
475 /* Remap UAR for Tx queues. */
476 err = mlx5_tx_uar_init_secondary(eth_dev, err);
480 * Ethdev pointer is still required as input since
481 * the primary device is not accessible from the
484 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
485 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
488 mlx5_dev_close(eth_dev);
492 * Some parameters ("tx_db_nc" in particularly) are needed in
493 * advance to create dv/verbs device context. We proceed the
494 * devargs here to get ones, and later proceed devargs again
495 * to override some hardware settings.
497 err = mlx5_args(&config, dpdk_dev->devargs);
500 DRV_LOG(ERR, "failed to process device arguments: %s",
501 strerror(rte_errno));
504 mlx5_malloc_mem_select(config.sys_mem_en);
505 sh = mlx5_alloc_shared_dev_ctx(spawn, &config);
508 config.devx = sh->devx;
509 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
512 #ifdef HAVE_IBV_MLX5_MOD_SWP
513 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
516 * Multi-packet send is supported by ConnectX-4 Lx PF as well
517 * as all ConnectX-5 devices.
519 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
520 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
522 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
523 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
525 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
526 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
527 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
528 DRV_LOG(DEBUG, "enhanced MPW is supported");
529 mps = MLX5_MPW_ENHANCED;
531 DRV_LOG(DEBUG, "MPW is supported");
535 DRV_LOG(DEBUG, "MPW isn't supported");
536 mps = MLX5_MPW_DISABLED;
538 #ifdef HAVE_IBV_MLX5_MOD_SWP
539 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
540 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
541 DRV_LOG(DEBUG, "SWP support: %u", swp);
544 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
545 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
546 struct mlx5dv_striding_rq_caps mprq_caps =
547 dv_attr.striding_rq_caps;
549 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
550 mprq_caps.min_single_stride_log_num_of_bytes);
551 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
552 mprq_caps.max_single_stride_log_num_of_bytes);
553 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
554 mprq_caps.min_single_wqe_log_num_of_strides);
555 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
556 mprq_caps.max_single_wqe_log_num_of_strides);
557 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
558 mprq_caps.supported_qpts);
559 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
561 mprq_min_stride_size_n =
562 mprq_caps.min_single_stride_log_num_of_bytes;
563 mprq_max_stride_size_n =
564 mprq_caps.max_single_stride_log_num_of_bytes;
565 mprq_min_stride_num_n =
566 mprq_caps.min_single_wqe_log_num_of_strides;
567 mprq_max_stride_num_n =
568 mprq_caps.max_single_wqe_log_num_of_strides;
571 if (RTE_CACHE_LINE_SIZE == 128 &&
572 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
576 config.cqe_comp = cqe_comp;
577 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
578 /* Whether device supports 128B Rx CQE padding. */
579 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
580 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
582 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
583 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
584 tunnel_en = ((dv_attr.tunnel_offloads_caps &
585 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
586 (dv_attr.tunnel_offloads_caps &
587 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
588 (dv_attr.tunnel_offloads_caps &
589 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
591 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
592 tunnel_en ? "" : "not ");
595 "tunnel offloading disabled due to old OFED/rdma-core version");
597 config.tunnel_en = tunnel_en;
598 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
599 mpls_en = ((dv_attr.tunnel_offloads_caps &
600 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
601 (dv_attr.tunnel_offloads_caps &
602 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
603 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
604 mpls_en ? "" : "not ");
606 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
607 " old OFED/rdma-core version or firmware configuration");
609 config.mpls_en = mpls_en;
610 /* Check port status. */
611 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
613 DRV_LOG(ERR, "port query failed: %s", strerror(err));
616 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
617 DRV_LOG(ERR, "port is not configured in Ethernet mode");
621 if (port_attr.state != IBV_PORT_ACTIVE)
622 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
623 mlx5_glue->port_state_str(port_attr.state),
625 /* Allocate private eth device data. */
626 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
628 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
630 DRV_LOG(ERR, "priv allocation failure");
635 priv->dev_port = spawn->phys_port;
636 priv->pci_dev = spawn->pci_dev;
637 priv->mtu = RTE_ETHER_MTU;
638 priv->mp_id.port_id = port_id;
639 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
640 /* Some internal functions rely on Netlink sockets, open them now. */
641 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
642 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
643 priv->representor = !!switch_info->representor;
644 priv->master = !!switch_info->master;
645 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
646 priv->vport_meta_tag = 0;
647 priv->vport_meta_mask = 0;
648 priv->pf_bond = spawn->pf_bond;
649 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
651 * The DevX port query API is implemented. E-Switch may use
652 * either vport or reg_c[0] metadata register to match on
653 * vport index. The engaged part of metadata register is
656 if (switch_info->representor || switch_info->master) {
657 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
658 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
659 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
663 "can't query devx port %d on device %s",
665 mlx5_os_get_dev_device_name(spawn->phys_dev));
666 devx_port.comp_mask = 0;
669 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
670 priv->vport_meta_tag = devx_port.reg_c_0.value;
671 priv->vport_meta_mask = devx_port.reg_c_0.mask;
672 if (!priv->vport_meta_mask) {
673 DRV_LOG(ERR, "vport zero mask for port %d"
674 " on bonding device %s",
676 mlx5_os_get_dev_device_name
681 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
682 DRV_LOG(ERR, "invalid vport tag for port %d"
683 " on bonding device %s",
685 mlx5_os_get_dev_device_name
691 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
692 priv->vport_id = devx_port.vport_num;
693 } else if (spawn->pf_bond >= 0) {
694 DRV_LOG(ERR, "can't deduce vport index for port %d"
695 " on bonding device %s",
697 mlx5_os_get_dev_device_name(spawn->phys_dev));
701 /* Suppose vport index in compatible way. */
702 priv->vport_id = switch_info->representor ?
703 switch_info->port_name + 1 : -1;
707 * Kernel/rdma_core support single E-Switch per PF configurations
708 * only and vport_id field contains the vport index for
709 * associated VF, which is deduced from representor port name.
710 * For example, let's have the IB device port 10, it has
711 * attached network device eth0, which has port name attribute
712 * pf0vf2, we can deduce the VF number as 2, and set vport index
713 * as 3 (2+1). This assigning schema should be changed if the
714 * multiple E-Switch instances per PF configurations or/and PCI
715 * subfunctions are added.
717 priv->vport_id = switch_info->representor ?
718 switch_info->port_name + 1 : -1;
720 /* representor_id field keeps the unmodified VF index. */
721 priv->representor_id = switch_info->representor ?
722 switch_info->port_name : -1;
724 * Look for sibling devices in order to reuse their switch domain
725 * if any, otherwise allocate one.
727 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
728 const struct mlx5_priv *opriv =
729 rte_eth_devices[port_id].data->dev_private;
732 opriv->sh != priv->sh ||
734 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
736 priv->domain_id = opriv->domain_id;
739 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
740 err = rte_eth_switch_domain_alloc(&priv->domain_id);
743 DRV_LOG(ERR, "unable to allocate switch domain: %s",
744 strerror(rte_errno));
749 /* Override some values set by hardware configuration. */
750 mlx5_args(&config, dpdk_dev->devargs);
751 err = mlx5_dev_check_sibling_config(priv, &config);
754 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
755 IBV_DEVICE_RAW_IP_CSUM);
756 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
757 (config.hw_csum ? "" : "not "));
758 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
759 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
760 DRV_LOG(DEBUG, "counters are not supported");
762 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
763 if (config.dv_flow_en) {
764 DRV_LOG(WARNING, "DV flow is not supported");
765 config.dv_flow_en = 0;
768 config.ind_table_max_size =
769 sh->device_attr.max_rwq_indirection_table_size;
771 * Remove this check once DPDK supports larger/variable
772 * indirection tables.
774 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
775 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
776 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
777 config.ind_table_max_size);
778 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
779 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
780 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
781 (config.hw_vlan_strip ? "" : "not "));
782 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
783 IBV_RAW_PACKET_CAP_SCATTER_FCS);
784 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
785 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
786 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
787 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
788 IBV_DEVICE_PCI_WRITE_END_PADDING);
790 if (config.hw_padding && !hw_padding) {
791 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
792 config.hw_padding = 0;
793 } else if (config.hw_padding) {
794 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
796 config.tso = (sh->device_attr.max_tso > 0 &&
797 (sh->device_attr.tso_supported_qpts &
798 (1 << IBV_QPT_RAW_PACKET)));
800 config.tso_max_payload_sz = sh->device_attr.max_tso;
802 * MPW is disabled by default, while the Enhanced MPW is enabled
805 if (config.mps == MLX5_ARG_UNSET)
806 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
809 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
810 DRV_LOG(INFO, "%sMPS is %s",
811 config.mps == MLX5_MPW_ENHANCED ? "enhanced " :
812 config.mps == MLX5_MPW ? "legacy " : "",
813 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
814 if (config.cqe_comp && !cqe_comp) {
815 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
818 if (config.cqe_pad && !cqe_pad) {
819 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
821 } else if (config.cqe_pad) {
822 DRV_LOG(INFO, "Rx CQE padding is enabled");
825 priv->counter_fallback = 0;
826 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
831 if (!config.hca_attr.flow_counters_dump)
832 priv->counter_fallback = 1;
833 #ifndef HAVE_IBV_DEVX_ASYNC
834 priv->counter_fallback = 1;
836 if (priv->counter_fallback)
837 DRV_LOG(INFO, "Use fall-back DV counter management");
838 /* Check for LRO support. */
839 if (config.dest_tir && config.hca_attr.lro_cap &&
841 /* TBD check tunnel lro caps. */
842 config.lro.supported = config.hca_attr.lro_cap;
843 DRV_LOG(DEBUG, "Device supports LRO");
845 * If LRO timeout is not configured by application,
846 * use the minimal supported value.
848 if (!config.lro.timeout)
850 config.hca_attr.lro_timer_supported_periods[0];
851 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
854 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
855 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
858 config.hca_attr.qos.flow_meter_reg_c_ids;
860 * Meter needs two REG_C's for color match and pre-sfx
861 * flow match. Here get the REG_C for color match.
862 * REG_C_0 and REG_C_1 is reserved for metadata feature.
865 if (__builtin_popcount(reg_c_mask) < 1) {
867 DRV_LOG(WARNING, "No available register for"
870 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
873 priv->mtr_reg_share =
874 config.hca_attr.qos.flow_meter_reg_share;
875 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
876 priv->mtr_color_reg);
882 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
883 config.hca_attr.dev_freq_khz);
884 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
885 config.hca_attr.qos.packet_pacing ? "" : "not ");
886 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
887 config.hca_attr.cross_channel ? "" : "not ");
888 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
889 config.hca_attr.wqe_index_ignore ? "" : "not ");
890 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
891 config.hca_attr.non_wire_sq ? "" : "not ");
892 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
893 config.hca_attr.log_max_static_sq_wq ? "" : "not ",
894 config.hca_attr.log_max_static_sq_wq);
895 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
896 config.hca_attr.qos.wqe_rate_pp ? "" : "not ");
898 DRV_LOG(ERR, "DevX is required for packet pacing");
902 if (!config.hca_attr.qos.packet_pacing) {
903 DRV_LOG(ERR, "Packet pacing is not supported");
907 if (!config.hca_attr.cross_channel) {
908 DRV_LOG(ERR, "Cross channel operations are"
909 " required for packet pacing");
913 if (!config.hca_attr.wqe_index_ignore) {
914 DRV_LOG(ERR, "WQE index ignore feature is"
915 " required for packet pacing");
919 if (!config.hca_attr.non_wire_sq) {
920 DRV_LOG(ERR, "Non-wire SQ feature is"
921 " required for packet pacing");
925 if (!config.hca_attr.log_max_static_sq_wq) {
926 DRV_LOG(ERR, "Static WQE SQ feature is"
927 " required for packet pacing");
931 if (!config.hca_attr.qos.wqe_rate_pp) {
932 DRV_LOG(ERR, "WQE rate mode is required"
933 " for packet pacing");
937 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
938 DRV_LOG(ERR, "DevX does not provide UAR offset,"
939 " can't create queues for packet pacing");
945 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
947 err = mlx5_devx_cmd_register_read
948 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
949 reg, MLX5_ST_SZ_DW(register_mtutc));
953 /* MTUTC register is read successfully. */
954 ts_mode = MLX5_GET(register_mtutc, reg,
956 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
957 config.rt_timestamp = 1;
959 /* Kernel does not support register reading. */
960 if (config.hca_attr.dev_freq_khz ==
961 (NS_PER_S / MS_PER_S))
962 config.rt_timestamp = 1;
966 * If HW has bug working with tunnel packet decapsulation and
967 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
968 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
970 if (config.hca_attr.scatter_fcs_w_decap_disable && config.decap_en)
971 config.hw_fcs_strip = 0;
972 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
973 (config.hw_fcs_strip ? "" : "not "));
974 if (config.mprq.enabled && mprq) {
975 if (config.mprq.stride_num_n &&
976 (config.mprq.stride_num_n > mprq_max_stride_num_n ||
977 config.mprq.stride_num_n < mprq_min_stride_num_n)) {
978 config.mprq.stride_num_n =
979 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
980 mprq_min_stride_num_n),
981 mprq_max_stride_num_n);
983 "the number of strides"
984 " for Multi-Packet RQ is out of range,"
985 " setting default value (%u)",
986 1 << config.mprq.stride_num_n);
988 if (config.mprq.stride_size_n &&
989 (config.mprq.stride_size_n > mprq_max_stride_size_n ||
990 config.mprq.stride_size_n < mprq_min_stride_size_n)) {
991 config.mprq.stride_size_n =
992 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
993 mprq_min_stride_size_n),
994 mprq_max_stride_size_n);
996 "the size of a stride"
997 " for Multi-Packet RQ is out of range,"
998 " setting default value (%u)",
999 1 << config.mprq.stride_size_n);
1001 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1002 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1003 } else if (config.mprq.enabled && !mprq) {
1004 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1005 config.mprq.enabled = 0;
1007 if (config.max_dump_files_num == 0)
1008 config.max_dump_files_num = 128;
1009 eth_dev = rte_eth_dev_allocate(name);
1010 if (eth_dev == NULL) {
1011 DRV_LOG(ERR, "can not allocate rte ethdev");
1015 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1016 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1017 if (priv->representor) {
1018 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1019 eth_dev->data->representor_id = priv->representor_id;
1022 * Store associated network device interface index. This index
1023 * is permanent throughout the lifetime of device. So, we may store
1024 * the ifindex here and use the cached value further.
1026 MLX5_ASSERT(spawn->ifindex);
1027 priv->if_index = spawn->ifindex;
1028 eth_dev->data->dev_private = priv;
1029 priv->dev_data = eth_dev->data;
1030 eth_dev->data->mac_addrs = priv->mac;
1031 eth_dev->device = dpdk_dev;
1032 /* Configure the first MAC address by default. */
1033 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1035 "port %u cannot get MAC address, is mlx5_en"
1036 " loaded? (errno: %s)",
1037 eth_dev->data->port_id, strerror(rte_errno));
1042 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1043 eth_dev->data->port_id,
1044 mac.addr_bytes[0], mac.addr_bytes[1],
1045 mac.addr_bytes[2], mac.addr_bytes[3],
1046 mac.addr_bytes[4], mac.addr_bytes[5]);
1047 #ifdef RTE_LIBRTE_MLX5_DEBUG
1049 char ifname[IF_NAMESIZE];
1051 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1052 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1053 eth_dev->data->port_id, ifname);
1055 DRV_LOG(DEBUG, "port %u ifname is unknown",
1056 eth_dev->data->port_id);
1059 /* Get actual MTU if possible. */
1060 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1065 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1067 /* Initialize burst functions to prevent crashes before link-up. */
1068 eth_dev->rx_pkt_burst = removed_rx_burst;
1069 eth_dev->tx_pkt_burst = removed_tx_burst;
1070 eth_dev->dev_ops = &mlx5_os_dev_ops;
1071 /* Register MAC address. */
1072 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1073 if (config.vf && config.vf_nl_en)
1074 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1075 mlx5_ifindex(eth_dev),
1076 eth_dev->data->mac_addrs,
1077 MLX5_MAX_MAC_ADDRESSES);
1079 priv->ctrl_flows = 0;
1080 TAILQ_INIT(&priv->flow_meters);
1081 TAILQ_INIT(&priv->flow_meter_profiles);
1082 /* Hint libmlx5 to use PMD allocator for data plane resources */
1083 mlx5_glue->dv_set_context_attr(sh->ctx,
1084 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1085 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1086 .alloc = &mlx5_alloc_verbs_buf,
1087 .free = &mlx5_free_verbs_buf,
1090 /* Bring Ethernet device up. */
1091 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1092 eth_dev->data->port_id);
1093 mlx5_set_link_up(eth_dev);
1095 * Even though the interrupt handler is not installed yet,
1096 * interrupts will still trigger on the async_fd from
1097 * Verbs context returned by ibv_open_device().
1099 mlx5_link_update(eth_dev, 0);
1100 #ifdef HAVE_MLX5DV_DR_ESWITCH
1101 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1102 (switch_info->representor || switch_info->master)))
1103 config.dv_esw_en = 0;
1105 config.dv_esw_en = 0;
1107 /* Detect minimal data bytes to inline. */
1108 mlx5_set_min_inline(spawn, &config);
1109 /* Store device configuration on private structure. */
1110 priv->config = config;
1111 /* Create context for virtual machine VLAN workaround. */
1112 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1113 if (config.dv_flow_en) {
1114 err = mlx5_alloc_shared_dr(priv);
1118 * RSS id is shared with meter flow id. Meter flow id can only
1119 * use the 24 MSB of the register.
1121 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1122 MLX5_MTR_COLOR_BITS);
1123 if (!priv->qrss_id_pool) {
1124 DRV_LOG(ERR, "can't create flow id pool");
1129 /* Supported Verbs flow priority number detection. */
1130 err = mlx5_flow_discover_priorities(eth_dev);
1135 priv->config.flow_prio = err;
1136 if (!priv->config.dv_esw_en &&
1137 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1138 DRV_LOG(WARNING, "metadata mode %u is not supported "
1139 "(no E-Switch)", priv->config.dv_xmeta_en);
1140 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1142 mlx5_set_metadata_mask(eth_dev);
1143 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1144 !priv->sh->dv_regc0_mask) {
1145 DRV_LOG(ERR, "metadata mode %u is not supported "
1146 "(no metadata reg_c[0] is available)",
1147 priv->config.dv_xmeta_en);
1152 * Allocate the buffer for flow creating, just once.
1153 * The allocation must be done before any flow creating.
1155 mlx5_flow_alloc_intermediate(eth_dev);
1156 /* Query availability of metadata reg_c's. */
1157 err = mlx5_flow_discover_mreg_c(eth_dev);
1162 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1164 "port %u extensive metadata register is not supported",
1165 eth_dev->data->port_id);
1166 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1167 DRV_LOG(ERR, "metadata mode %u is not supported "
1168 "(no metadata registers available)",
1169 priv->config.dv_xmeta_en);
1174 if (priv->config.dv_flow_en &&
1175 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1176 mlx5_flow_ext_mreg_supported(eth_dev) &&
1177 priv->sh->dv_regc0_mask) {
1178 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1179 MLX5_FLOW_MREG_HTABLE_SZ);
1180 if (!priv->mreg_cp_tbl) {
1188 if (priv->mreg_cp_tbl)
1189 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1191 mlx5_os_free_shared_dr(priv);
1192 if (priv->nl_socket_route >= 0)
1193 close(priv->nl_socket_route);
1194 if (priv->nl_socket_rdma >= 0)
1195 close(priv->nl_socket_rdma);
1196 if (priv->vmwa_context)
1197 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1198 if (priv->qrss_id_pool)
1199 mlx5_flow_id_pool_release(priv->qrss_id_pool);
1201 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1203 if (eth_dev != NULL)
1204 eth_dev->data->dev_private = NULL;
1206 if (eth_dev != NULL) {
1207 /* mac_addrs must not be freed alone because part of
1210 eth_dev->data->mac_addrs = NULL;
1211 rte_eth_dev_release_port(eth_dev);
1214 mlx5_free_shared_dev_ctx(sh);
1215 MLX5_ASSERT(err > 0);
1221 * Comparison callback to sort device data.
1223 * This is meant to be used with qsort().
1226 * Pointer to pointer to first data object.
1228 * Pointer to pointer to second data object.
1231 * 0 if both objects are equal, less than 0 if the first argument is less
1232 * than the second, greater than 0 otherwise.
1235 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1237 const struct mlx5_switch_info *si_a =
1238 &((const struct mlx5_dev_spawn_data *)a)->info;
1239 const struct mlx5_switch_info *si_b =
1240 &((const struct mlx5_dev_spawn_data *)b)->info;
1243 /* Master device first. */
1244 ret = si_b->master - si_a->master;
1247 /* Then representor devices. */
1248 ret = si_b->representor - si_a->representor;
1251 /* Unidentified devices come last in no specific order. */
1252 if (!si_a->representor)
1254 /* Order representors by name. */
1255 return si_a->port_name - si_b->port_name;
1259 * Match PCI information for possible slaves of bonding device.
1261 * @param[in] ibv_dev
1262 * Pointer to Infiniband device structure.
1263 * @param[in] pci_dev
1264 * Pointer to PCI device structure to match PCI address.
1265 * @param[in] nl_rdma
1266 * Netlink RDMA group socket handle.
1269 * negative value if no bonding device found, otherwise
1270 * positive index of slave PF in bonding.
1273 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1274 const struct rte_pci_device *pci_dev,
1277 char ifname[IF_NAMESIZE + 1];
1278 unsigned int ifindex;
1284 * Try to get master device name. If something goes
1285 * wrong suppose the lack of kernel support and no
1290 if (!strstr(ibv_dev->name, "bond"))
1292 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1296 * The Master device might not be on the predefined
1297 * port (not on port index 1, it is not garanted),
1298 * we have to scan all Infiniband device port and
1301 for (i = 1; i <= np; ++i) {
1302 /* Check whether Infiniband port is populated. */
1303 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1306 if (!if_indextoname(ifindex, ifname))
1308 /* Try to read bonding slave names from sysfs. */
1310 "/sys/class/net/%s/master/bonding/slaves", ifname);
1311 file = fopen(slaves, "r");
1317 /* Use safe format to check maximal buffer length. */
1318 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1319 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1320 char tmp_str[IF_NAMESIZE + 32];
1321 struct rte_pci_addr pci_addr;
1322 struct mlx5_switch_info info;
1324 /* Process slave interface names in the loop. */
1325 snprintf(tmp_str, sizeof(tmp_str),
1326 "/sys/class/net/%s", ifname);
1327 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1328 DRV_LOG(WARNING, "can not get PCI address"
1329 " for netdev \"%s\"", ifname);
1332 if (pci_dev->addr.domain != pci_addr.domain ||
1333 pci_dev->addr.bus != pci_addr.bus ||
1334 pci_dev->addr.devid != pci_addr.devid ||
1335 pci_dev->addr.function != pci_addr.function)
1337 /* Slave interface PCI address match found. */
1339 snprintf(tmp_str, sizeof(tmp_str),
1340 "/sys/class/net/%s/phys_port_name", ifname);
1341 file = fopen(tmp_str, "rb");
1344 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1345 if (fscanf(file, "%32s", tmp_str) == 1)
1346 mlx5_translate_port_name(tmp_str, &info);
1347 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1348 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1349 pf = info.port_name;
1358 * DPDK callback to register a PCI device.
1360 * This function spawns Ethernet devices out of a given PCI device.
1362 * @param[in] pci_drv
1363 * PCI driver structure (mlx5_driver).
1364 * @param[in] pci_dev
1365 * PCI device information.
1368 * 0 on success, a negative errno value otherwise and rte_errno is set.
1371 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1372 struct rte_pci_device *pci_dev)
1374 struct ibv_device **ibv_list;
1376 * Number of found IB Devices matching with requested PCI BDF.
1377 * nd != 1 means there are multiple IB devices over the same
1378 * PCI device and we have representors and master.
1380 unsigned int nd = 0;
1382 * Number of found IB device Ports. nd = 1 and np = 1..n means
1383 * we have the single multiport IB device, and there may be
1384 * representors attached to some of found ports.
1386 unsigned int np = 0;
1388 * Number of DPDK ethernet devices to Spawn - either over
1389 * multiple IB devices or multiple ports of single IB device.
1390 * Actually this is the number of iterations to spawn.
1392 unsigned int ns = 0;
1395 * < 0 - no bonding device (single one)
1396 * >= 0 - bonding device (value is slave PF index)
1399 struct mlx5_dev_spawn_data *list = NULL;
1400 struct mlx5_dev_config dev_config;
1403 if (mlx5_class_get(pci_dev->device.devargs) != MLX5_CLASS_NET) {
1404 DRV_LOG(DEBUG, "Skip probing - should be probed by other mlx5"
1408 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1409 mlx5_pmd_socket_init();
1410 ret = mlx5_init_once();
1412 DRV_LOG(ERR, "unable to init PMD global data: %s",
1413 strerror(rte_errno));
1416 MLX5_ASSERT(pci_drv == &mlx5_driver);
1418 ibv_list = mlx5_glue->get_device_list(&ret);
1420 rte_errno = errno ? errno : ENOSYS;
1421 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1425 * First scan the list of all Infiniband devices to find
1426 * matching ones, gathering into the list.
1428 struct ibv_device *ibv_match[ret + 1];
1429 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1430 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1434 struct rte_pci_addr pci_addr;
1436 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1437 bd = mlx5_device_bond_pci_match
1438 (ibv_list[ret], pci_dev, nl_rdma);
1441 * Bonding device detected. Only one match is allowed,
1442 * the bonding is supported over multi-port IB device,
1443 * there should be no matches on representor PCI
1444 * functions or non VF LAG bonding devices with
1445 * specified address.
1449 "multiple PCI match on bonding device"
1450 "\"%s\" found", ibv_list[ret]->name);
1455 DRV_LOG(INFO, "PCI information matches for"
1456 " slave %d bonding device \"%s\"",
1457 bd, ibv_list[ret]->name);
1458 ibv_match[nd++] = ibv_list[ret];
1461 if (mlx5_dev_to_pci_addr
1462 (ibv_list[ret]->ibdev_path, &pci_addr))
1464 if (pci_dev->addr.domain != pci_addr.domain ||
1465 pci_dev->addr.bus != pci_addr.bus ||
1466 pci_dev->addr.devid != pci_addr.devid ||
1467 pci_dev->addr.function != pci_addr.function)
1469 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1470 ibv_list[ret]->name);
1471 ibv_match[nd++] = ibv_list[ret];
1473 ibv_match[nd] = NULL;
1475 /* No device matches, just complain and bail out. */
1477 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1478 " are kernel drivers loaded?",
1479 pci_dev->addr.domain, pci_dev->addr.bus,
1480 pci_dev->addr.devid, pci_dev->addr.function);
1487 * Found single matching device may have multiple ports.
1488 * Each port may be representor, we have to check the port
1489 * number and check the representors existence.
1492 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1494 DRV_LOG(WARNING, "can not get IB device \"%s\""
1495 " ports number", ibv_match[0]->name);
1496 if (bd >= 0 && !np) {
1497 DRV_LOG(ERR, "can not get ports"
1498 " for bonding device");
1504 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1507 * This may happen if there is VF LAG kernel support and
1508 * application is compiled with older rdma_core library.
1511 "No kernel/verbs support for VF LAG bonding found.");
1512 rte_errno = ENOTSUP;
1518 * Now we can determine the maximal
1519 * amount of devices to be spawned.
1521 list = mlx5_malloc(MLX5_MEM_ZERO,
1522 sizeof(struct mlx5_dev_spawn_data) *
1524 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1526 DRV_LOG(ERR, "spawn data array allocation failure");
1531 if (bd >= 0 || np > 1) {
1533 * Single IB device with multiple ports found,
1534 * it may be E-Switch master device and representors.
1535 * We have to perform identification through the ports.
1537 MLX5_ASSERT(nl_rdma >= 0);
1538 MLX5_ASSERT(ns == 0);
1539 MLX5_ASSERT(nd == 1);
1541 for (i = 1; i <= np; ++i) {
1542 list[ns].max_port = np;
1543 list[ns].phys_port = i;
1544 list[ns].phys_dev = ibv_match[0];
1545 list[ns].eth_dev = NULL;
1546 list[ns].pci_dev = pci_dev;
1547 list[ns].pf_bond = bd;
1548 list[ns].ifindex = mlx5_nl_ifindex
1550 mlx5_os_get_dev_device_name
1551 (list[ns].phys_dev), i);
1552 if (!list[ns].ifindex) {
1554 * No network interface index found for the
1555 * specified port, it means there is no
1556 * representor on this port. It's OK,
1557 * there can be disabled ports, for example
1558 * if sriov_numvfs < sriov_totalvfs.
1564 ret = mlx5_nl_switch_info
1568 if (ret || (!list[ns].info.representor &&
1569 !list[ns].info.master)) {
1571 * We failed to recognize representors with
1572 * Netlink, let's try to perform the task
1575 ret = mlx5_sysfs_switch_info
1579 if (!ret && bd >= 0) {
1580 switch (list[ns].info.name_type) {
1581 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1582 if (list[ns].info.port_name == bd)
1585 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1587 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1588 if (list[ns].info.pf_num == bd)
1596 if (!ret && (list[ns].info.representor ^
1597 list[ns].info.master))
1602 "unable to recognize master/representors"
1603 " on the IB device with multiple ports");
1610 * The existence of several matching entries (nd > 1) means
1611 * port representors have been instantiated. No existing Verbs
1612 * call nor sysfs entries can tell them apart, this can only
1613 * be done through Netlink calls assuming kernel drivers are
1614 * recent enough to support them.
1616 * In the event of identification failure through Netlink,
1617 * try again through sysfs, then:
1619 * 1. A single IB device matches (nd == 1) with single
1620 * port (np=0/1) and is not a representor, assume
1621 * no switch support.
1623 * 2. Otherwise no safe assumptions can be made;
1624 * complain louder and bail out.
1626 for (i = 0; i != nd; ++i) {
1627 memset(&list[ns].info, 0, sizeof(list[ns].info));
1628 list[ns].max_port = 1;
1629 list[ns].phys_port = 1;
1630 list[ns].phys_dev = ibv_match[i];
1631 list[ns].eth_dev = NULL;
1632 list[ns].pci_dev = pci_dev;
1633 list[ns].pf_bond = -1;
1634 list[ns].ifindex = 0;
1636 list[ns].ifindex = mlx5_nl_ifindex
1638 mlx5_os_get_dev_device_name
1639 (list[ns].phys_dev), 1);
1640 if (!list[ns].ifindex) {
1641 char ifname[IF_NAMESIZE];
1644 * Netlink failed, it may happen with old
1645 * ib_core kernel driver (before 4.16).
1646 * We can assume there is old driver because
1647 * here we are processing single ports IB
1648 * devices. Let's try sysfs to retrieve
1649 * the ifindex. The method works for
1650 * master device only.
1654 * Multiple devices found, assume
1655 * representors, can not distinguish
1656 * master/representor and retrieve
1657 * ifindex via sysfs.
1661 ret = mlx5_get_ifname_sysfs
1662 (ibv_match[i]->ibdev_path, ifname);
1665 if_nametoindex(ifname);
1666 if (!list[ns].ifindex) {
1668 * No network interface index found
1669 * for the specified device, it means
1670 * there it is neither representor
1678 ret = mlx5_nl_switch_info
1682 if (ret || (!list[ns].info.representor &&
1683 !list[ns].info.master)) {
1685 * We failed to recognize representors with
1686 * Netlink, let's try to perform the task
1689 ret = mlx5_sysfs_switch_info
1693 if (!ret && (list[ns].info.representor ^
1694 list[ns].info.master)) {
1696 } else if ((nd == 1) &&
1697 !list[ns].info.representor &&
1698 !list[ns].info.master) {
1700 * Single IB device with
1701 * one physical port and
1702 * attached network device.
1703 * May be SRIOV is not enabled
1704 * or there is no representors.
1706 DRV_LOG(INFO, "no E-Switch support detected");
1713 "unable to recognize master/representors"
1714 " on the multiple IB devices");
1722 * Sort list to probe devices in natural order for users convenience
1723 * (i.e. master first, then representors from lowest to highest ID).
1725 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1726 /* Default configuration. */
1727 dev_config = (struct mlx5_dev_config){
1729 .mps = MLX5_ARG_UNSET,
1730 .dbnc = MLX5_ARG_UNSET,
1732 .txq_inline_max = MLX5_ARG_UNSET,
1733 .txq_inline_min = MLX5_ARG_UNSET,
1734 .txq_inline_mpw = MLX5_ARG_UNSET,
1735 .txqs_inline = MLX5_ARG_UNSET,
1737 .mr_ext_memseg_en = 1,
1739 .enabled = 0, /* Disabled by default. */
1742 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1743 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1748 .log_hp_size = MLX5_ARG_UNSET,
1750 /* Device specific configuration. */
1751 switch (pci_dev->id.device_id) {
1752 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1753 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1754 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1755 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1756 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1757 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1758 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1764 for (i = 0; i != ns; ++i) {
1767 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1770 if (!list[i].eth_dev) {
1771 if (rte_errno != EBUSY && rte_errno != EEXIST)
1773 /* Device is disabled or already spawned. Ignore it. */
1776 restore = list[i].eth_dev->data->dev_flags;
1777 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1778 /* Restore non-PCI flags cleared by the above call. */
1779 list[i].eth_dev->data->dev_flags |= restore;
1780 rte_eth_dev_probing_finish(list[i].eth_dev);
1784 "probe of PCI device " PCI_PRI_FMT " aborted after"
1785 " encountering an error: %s",
1786 pci_dev->addr.domain, pci_dev->addr.bus,
1787 pci_dev->addr.devid, pci_dev->addr.function,
1788 strerror(rte_errno));
1792 if (!list[i].eth_dev)
1794 mlx5_dev_close(list[i].eth_dev);
1795 /* mac_addrs must not be freed because in dev_private */
1796 list[i].eth_dev->data->mac_addrs = NULL;
1797 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1799 /* Restore original error. */
1806 * Do the routine cleanup:
1807 * - close opened Netlink sockets
1808 * - free allocated spawn data array
1809 * - free the Infiniband device list
1817 MLX5_ASSERT(ibv_list);
1818 mlx5_glue->free_device_list(ibv_list);
1823 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1828 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1829 /* Get environment variable to store. */
1830 env = getenv(MLX5_SHUT_UP_BF);
1831 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
1832 if (config->dbnc == MLX5_ARG_UNSET)
1833 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
1835 setenv(MLX5_SHUT_UP_BF,
1836 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
1841 mlx5_restore_doorbell_mapping_env(int value)
1843 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1844 /* Restore the original environment variable state. */
1845 if (value == MLX5_ARG_UNSET)
1846 unsetenv(MLX5_SHUT_UP_BF);
1848 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
1852 * Extract pdn of PD object using DV API.
1855 * Pointer to the verbs PD object.
1857 * Pointer to the PD object number variable.
1860 * 0 on success, error value otherwise.
1863 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1865 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1866 struct mlx5dv_obj obj;
1867 struct mlx5dv_pd pd_info;
1871 obj.pd.out = &pd_info;
1872 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
1874 DRV_LOG(DEBUG, "Fail to get PD object info");
1883 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
1887 * Function API to open IB device.
1889 * This function calls the Linux glue APIs to open a device.
1892 * Pointer to the IB device attributes (name, port, etc).
1893 * @param[out] config
1894 * Pointer to device configuration structure.
1896 * Pointer to shared context structure.
1899 * 0 on success, a positive error value otherwise.
1902 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
1903 const struct mlx5_dev_config *config,
1904 struct mlx5_dev_ctx_shared *sh)
1909 sh->numa_node = spawn->pci_dev->device.numa_node;
1910 pthread_mutex_init(&sh->txpp.mutex, NULL);
1912 * Configure environment variable "MLX5_BF_SHUT_UP"
1913 * before the device creation. The rdma_core library
1914 * checks the variable at device creation and
1915 * stores the result internally.
1917 dbmap_env = mlx5_config_doorbell_mapping_env(config);
1918 /* Try to open IB device with DV first, then usual Verbs. */
1920 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
1923 DRV_LOG(DEBUG, "DevX is supported");
1924 /* The device is created, no need for environment. */
1925 mlx5_restore_doorbell_mapping_env(dbmap_env);
1927 /* The environment variable is still configured. */
1928 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
1929 err = errno ? errno : ENODEV;
1931 * The environment variable is not needed anymore,
1932 * all device creation attempts are completed.
1934 mlx5_restore_doorbell_mapping_env(dbmap_env);
1937 DRV_LOG(DEBUG, "DevX is NOT supported");
1944 * Install shared asynchronous device events handler.
1945 * This function is implemented to support event sharing
1946 * between multiple ports of single IB device.
1949 * Pointer to mlx5_dev_ctx_shared object.
1952 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
1957 sh->intr_handle.fd = -1;
1958 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
1959 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
1960 F_SETFL, flags | O_NONBLOCK);
1962 DRV_LOG(INFO, "failed to change file descriptor async event"
1965 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
1966 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
1967 if (rte_intr_callback_register(&sh->intr_handle,
1968 mlx5_dev_interrupt_handler, sh)) {
1969 DRV_LOG(INFO, "Fail to install the shared interrupt.");
1970 sh->intr_handle.fd = -1;
1974 #ifdef HAVE_IBV_DEVX_ASYNC
1975 sh->intr_handle_devx.fd = -1;
1977 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
1978 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
1980 DRV_LOG(INFO, "failed to allocate devx_comp.");
1983 flags = fcntl(devx_comp->fd, F_GETFL);
1984 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
1986 DRV_LOG(INFO, "failed to change file descriptor"
1990 sh->intr_handle_devx.fd = devx_comp->fd;
1991 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
1992 if (rte_intr_callback_register(&sh->intr_handle_devx,
1993 mlx5_dev_interrupt_handler_devx, sh)) {
1994 DRV_LOG(INFO, "Fail to install the devx shared"
1996 sh->intr_handle_devx.fd = -1;
1998 #endif /* HAVE_IBV_DEVX_ASYNC */
2003 * Uninstall shared asynchronous device events handler.
2004 * This function is implemented to support event sharing
2005 * between multiple ports of single IB device.
2008 * Pointer to mlx5_dev_ctx_shared object.
2011 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2013 if (sh->intr_handle.fd >= 0)
2014 mlx5_intr_callback_unregister(&sh->intr_handle,
2015 mlx5_dev_interrupt_handler, sh);
2016 #ifdef HAVE_IBV_DEVX_ASYNC
2017 if (sh->intr_handle_devx.fd >= 0)
2018 rte_intr_callback_unregister(&sh->intr_handle_devx,
2019 mlx5_dev_interrupt_handler_devx, sh);
2021 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2026 * Read statistics by a named counter.
2029 * Pointer to the private device data structure.
2030 * @param[in] ctr_name
2031 * Pointer to the name of the statistic counter to read
2033 * Pointer to read statistic value.
2035 * 0 on success and stat is valud, 1 if failed to read the value
2040 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2046 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2047 priv->sh->ibdev_path,
2050 fd = open(path, O_RDONLY);
2052 char buf[21] = {'\0'};
2053 ssize_t n = read(fd, buf, sizeof(buf));
2057 *stat = strtoull(buf, NULL, 10);
2067 * Read device counters table.
2070 * Pointer to Ethernet device.
2072 * Counters table output buffer.
2075 * 0 on success and stats is filled, negative errno value otherwise and
2079 mlx5_os_read_dev_counters(struct rte_eth_dev *dev, uint64_t *stats)
2081 struct mlx5_priv *priv = dev->data->dev_private;
2082 struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl;
2085 unsigned int stats_sz = xstats_ctrl->stats_n * sizeof(uint64_t);
2086 unsigned char et_stat_buf[sizeof(struct ethtool_stats) + stats_sz];
2087 struct ethtool_stats *et_stats = (struct ethtool_stats *)et_stat_buf;
2090 et_stats->cmd = ETHTOOL_GSTATS;
2091 et_stats->n_stats = xstats_ctrl->stats_n;
2092 ifr.ifr_data = (caddr_t)et_stats;
2093 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
2096 "port %u unable to read statistic values from device",
2097 dev->data->port_id);
2100 for (i = 0; i != xstats_ctrl->mlx5_stats_n; ++i) {
2101 if (xstats_ctrl->info[i].dev) {
2102 ret = mlx5_os_read_dev_stat(priv,
2103 xstats_ctrl->info[i].ctr_name,
2105 /* return last xstats counter if fail to read. */
2107 xstats_ctrl->xstats[i] = stats[i];
2109 stats[i] = xstats_ctrl->xstats[i];
2111 stats[i] = (uint64_t)
2112 et_stats->data[xstats_ctrl->dev_table_idx[i]];
2119 * Query the number of statistics provided by ETHTOOL.
2122 * Pointer to Ethernet device.
2125 * Number of statistics on success, negative errno value otherwise and
2129 mlx5_os_get_stats_n(struct rte_eth_dev *dev)
2131 struct ethtool_drvinfo drvinfo;
2135 drvinfo.cmd = ETHTOOL_GDRVINFO;
2136 ifr.ifr_data = (caddr_t)&drvinfo;
2137 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
2139 DRV_LOG(WARNING, "port %u unable to query number of statistics",
2140 dev->data->port_id);
2143 return drvinfo.n_stats;
2146 static const struct mlx5_counter_ctrl mlx5_counters_init[] = {
2148 .dpdk_name = "rx_port_unicast_bytes",
2149 .ctr_name = "rx_vport_unicast_bytes",
2152 .dpdk_name = "rx_port_multicast_bytes",
2153 .ctr_name = "rx_vport_multicast_bytes",
2156 .dpdk_name = "rx_port_broadcast_bytes",
2157 .ctr_name = "rx_vport_broadcast_bytes",
2160 .dpdk_name = "rx_port_unicast_packets",
2161 .ctr_name = "rx_vport_unicast_packets",
2164 .dpdk_name = "rx_port_multicast_packets",
2165 .ctr_name = "rx_vport_multicast_packets",
2168 .dpdk_name = "rx_port_broadcast_packets",
2169 .ctr_name = "rx_vport_broadcast_packets",
2172 .dpdk_name = "tx_port_unicast_bytes",
2173 .ctr_name = "tx_vport_unicast_bytes",
2176 .dpdk_name = "tx_port_multicast_bytes",
2177 .ctr_name = "tx_vport_multicast_bytes",
2180 .dpdk_name = "tx_port_broadcast_bytes",
2181 .ctr_name = "tx_vport_broadcast_bytes",
2184 .dpdk_name = "tx_port_unicast_packets",
2185 .ctr_name = "tx_vport_unicast_packets",
2188 .dpdk_name = "tx_port_multicast_packets",
2189 .ctr_name = "tx_vport_multicast_packets",
2192 .dpdk_name = "tx_port_broadcast_packets",
2193 .ctr_name = "tx_vport_broadcast_packets",
2196 .dpdk_name = "rx_wqe_err",
2197 .ctr_name = "rx_wqe_err",
2200 .dpdk_name = "rx_crc_errors_phy",
2201 .ctr_name = "rx_crc_errors_phy",
2204 .dpdk_name = "rx_in_range_len_errors_phy",
2205 .ctr_name = "rx_in_range_len_errors_phy",
2208 .dpdk_name = "rx_symbol_err_phy",
2209 .ctr_name = "rx_symbol_err_phy",
2212 .dpdk_name = "tx_errors_phy",
2213 .ctr_name = "tx_errors_phy",
2216 .dpdk_name = "rx_out_of_buffer",
2217 .ctr_name = "out_of_buffer",
2221 .dpdk_name = "tx_packets_phy",
2222 .ctr_name = "tx_packets_phy",
2225 .dpdk_name = "rx_packets_phy",
2226 .ctr_name = "rx_packets_phy",
2229 .dpdk_name = "tx_discards_phy",
2230 .ctr_name = "tx_discards_phy",
2233 .dpdk_name = "rx_discards_phy",
2234 .ctr_name = "rx_discards_phy",
2237 .dpdk_name = "tx_bytes_phy",
2238 .ctr_name = "tx_bytes_phy",
2241 .dpdk_name = "rx_bytes_phy",
2242 .ctr_name = "rx_bytes_phy",
2244 /* Representor only */
2246 .dpdk_name = "rx_packets",
2247 .ctr_name = "vport_rx_packets",
2250 .dpdk_name = "rx_bytes",
2251 .ctr_name = "vport_rx_bytes",
2254 .dpdk_name = "tx_packets",
2255 .ctr_name = "vport_tx_packets",
2258 .dpdk_name = "tx_bytes",
2259 .ctr_name = "vport_tx_bytes",
2263 static const unsigned int xstats_n = RTE_DIM(mlx5_counters_init);
2266 * Init the structures to read device counters.
2269 * Pointer to Ethernet device.
2272 mlx5_os_stats_init(struct rte_eth_dev *dev)
2274 struct mlx5_priv *priv = dev->data->dev_private;
2275 struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl;
2276 struct mlx5_stats_ctrl *stats_ctrl = &priv->stats_ctrl;
2280 struct ethtool_gstrings *strings = NULL;
2281 unsigned int dev_stats_n;
2282 unsigned int str_sz;
2285 /* So that it won't aggregate for each init. */
2286 xstats_ctrl->mlx5_stats_n = 0;
2287 ret = mlx5_os_get_stats_n(dev);
2289 DRV_LOG(WARNING, "port %u no extended statistics available",
2290 dev->data->port_id);
2294 /* Allocate memory to grab stat names and values. */
2295 str_sz = dev_stats_n * ETH_GSTRING_LEN;
2296 strings = (struct ethtool_gstrings *)
2297 mlx5_malloc(0, str_sz + sizeof(struct ethtool_gstrings), 0,
2300 DRV_LOG(WARNING, "port %u unable to allocate memory for xstats",
2301 dev->data->port_id);
2304 strings->cmd = ETHTOOL_GSTRINGS;
2305 strings->string_set = ETH_SS_STATS;
2306 strings->len = dev_stats_n;
2307 ifr.ifr_data = (caddr_t)strings;
2308 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
2310 DRV_LOG(WARNING, "port %u unable to get statistic names",
2311 dev->data->port_id);
2314 for (i = 0; i != dev_stats_n; ++i) {
2315 const char *curr_string = (const char *)
2316 &strings->data[i * ETH_GSTRING_LEN];
2318 for (j = 0; j != xstats_n; ++j) {
2319 if (!strcmp(mlx5_counters_init[j].ctr_name,
2321 unsigned int idx = xstats_ctrl->mlx5_stats_n++;
2323 xstats_ctrl->dev_table_idx[idx] = i;
2324 xstats_ctrl->info[idx] = mlx5_counters_init[j];
2329 /* Add dev counters. */
2330 for (i = 0; i != xstats_n; ++i) {
2331 if (mlx5_counters_init[i].dev) {
2332 unsigned int idx = xstats_ctrl->mlx5_stats_n++;
2334 xstats_ctrl->info[idx] = mlx5_counters_init[i];
2335 xstats_ctrl->hw_stats[idx] = 0;
2338 MLX5_ASSERT(xstats_ctrl->mlx5_stats_n <= MLX5_MAX_XSTATS);
2339 xstats_ctrl->stats_n = dev_stats_n;
2340 /* Copy to base at first time. */
2341 ret = mlx5_os_read_dev_counters(dev, xstats_ctrl->base);
2343 DRV_LOG(ERR, "port %u cannot read device counters: %s",
2344 dev->data->port_id, strerror(rte_errno));
2345 mlx5_os_read_dev_stat(priv, "out_of_buffer", &stats_ctrl->imissed_base);
2346 stats_ctrl->imissed = 0;
2352 * Set the reg_mr and dereg_mr call backs
2354 * @param reg_mr_cb[out]
2355 * Pointer to reg_mr func
2356 * @param dereg_mr_cb[out]
2357 * Pointer to dereg_mr func
2361 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2362 mlx5_dereg_mr_t *dereg_mr_cb)
2364 *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2365 *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2368 const struct eth_dev_ops mlx5_os_dev_ops = {
2369 .dev_configure = mlx5_dev_configure,
2370 .dev_start = mlx5_dev_start,
2371 .dev_stop = mlx5_dev_stop,
2372 .dev_set_link_down = mlx5_set_link_down,
2373 .dev_set_link_up = mlx5_set_link_up,
2374 .dev_close = mlx5_dev_close,
2375 .promiscuous_enable = mlx5_promiscuous_enable,
2376 .promiscuous_disable = mlx5_promiscuous_disable,
2377 .allmulticast_enable = mlx5_allmulticast_enable,
2378 .allmulticast_disable = mlx5_allmulticast_disable,
2379 .link_update = mlx5_link_update,
2380 .stats_get = mlx5_stats_get,
2381 .stats_reset = mlx5_stats_reset,
2382 .xstats_get = mlx5_xstats_get,
2383 .xstats_reset = mlx5_xstats_reset,
2384 .xstats_get_names = mlx5_xstats_get_names,
2385 .fw_version_get = mlx5_fw_version_get,
2386 .dev_infos_get = mlx5_dev_infos_get,
2387 .read_clock = mlx5_txpp_read_clock,
2388 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2389 .vlan_filter_set = mlx5_vlan_filter_set,
2390 .rx_queue_setup = mlx5_rx_queue_setup,
2391 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2392 .tx_queue_setup = mlx5_tx_queue_setup,
2393 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2394 .rx_queue_release = mlx5_rx_queue_release,
2395 .tx_queue_release = mlx5_tx_queue_release,
2396 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2397 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2398 .mac_addr_remove = mlx5_mac_addr_remove,
2399 .mac_addr_add = mlx5_mac_addr_add,
2400 .mac_addr_set = mlx5_mac_addr_set,
2401 .set_mc_addr_list = mlx5_set_mc_addr_list,
2402 .mtu_set = mlx5_dev_set_mtu,
2403 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2404 .vlan_offload_set = mlx5_vlan_offload_set,
2405 .reta_update = mlx5_dev_rss_reta_update,
2406 .reta_query = mlx5_dev_rss_reta_query,
2407 .rss_hash_update = mlx5_rss_hash_update,
2408 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2409 .filter_ctrl = mlx5_dev_filter_ctrl,
2410 .rx_descriptor_status = mlx5_rx_descriptor_status,
2411 .tx_descriptor_status = mlx5_tx_descriptor_status,
2412 .rxq_info_get = mlx5_rxq_info_get,
2413 .txq_info_get = mlx5_txq_info_get,
2414 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2415 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2416 .rx_queue_count = mlx5_rx_queue_count,
2417 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2418 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2419 .is_removed = mlx5_is_removed,
2420 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
2421 .get_module_info = mlx5_get_module_info,
2422 .get_module_eeprom = mlx5_get_module_eeprom,
2423 .hairpin_cap_get = mlx5_hairpin_cap_get,
2424 .mtr_ops_get = mlx5_flow_meter_ops_get,
2427 /* Available operations from secondary process. */
2428 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2429 .stats_get = mlx5_stats_get,
2430 .stats_reset = mlx5_stats_reset,
2431 .xstats_get = mlx5_xstats_get,
2432 .xstats_reset = mlx5_xstats_reset,
2433 .xstats_get_names = mlx5_xstats_get_names,
2434 .fw_version_get = mlx5_fw_version_get,
2435 .dev_infos_get = mlx5_dev_infos_get,
2436 .read_clock = mlx5_txpp_read_clock,
2437 .rx_descriptor_status = mlx5_rx_descriptor_status,
2438 .tx_descriptor_status = mlx5_tx_descriptor_status,
2439 .rxq_info_get = mlx5_rxq_info_get,
2440 .txq_info_get = mlx5_txq_info_get,
2441 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2442 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2443 .get_module_info = mlx5_get_module_info,
2444 .get_module_eeprom = mlx5_get_module_eeprom,
2447 /* Available operations in flow isolated mode. */
2448 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2449 .dev_configure = mlx5_dev_configure,
2450 .dev_start = mlx5_dev_start,
2451 .dev_stop = mlx5_dev_stop,
2452 .dev_set_link_down = mlx5_set_link_down,
2453 .dev_set_link_up = mlx5_set_link_up,
2454 .dev_close = mlx5_dev_close,
2455 .promiscuous_enable = mlx5_promiscuous_enable,
2456 .promiscuous_disable = mlx5_promiscuous_disable,
2457 .allmulticast_enable = mlx5_allmulticast_enable,
2458 .allmulticast_disable = mlx5_allmulticast_disable,
2459 .link_update = mlx5_link_update,
2460 .stats_get = mlx5_stats_get,
2461 .stats_reset = mlx5_stats_reset,
2462 .xstats_get = mlx5_xstats_get,
2463 .xstats_reset = mlx5_xstats_reset,
2464 .xstats_get_names = mlx5_xstats_get_names,
2465 .fw_version_get = mlx5_fw_version_get,
2466 .dev_infos_get = mlx5_dev_infos_get,
2467 .read_clock = mlx5_txpp_read_clock,
2468 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2469 .vlan_filter_set = mlx5_vlan_filter_set,
2470 .rx_queue_setup = mlx5_rx_queue_setup,
2471 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2472 .tx_queue_setup = mlx5_tx_queue_setup,
2473 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2474 .rx_queue_release = mlx5_rx_queue_release,
2475 .tx_queue_release = mlx5_tx_queue_release,
2476 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2477 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2478 .mac_addr_remove = mlx5_mac_addr_remove,
2479 .mac_addr_add = mlx5_mac_addr_add,
2480 .mac_addr_set = mlx5_mac_addr_set,
2481 .set_mc_addr_list = mlx5_set_mc_addr_list,
2482 .mtu_set = mlx5_dev_set_mtu,
2483 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2484 .vlan_offload_set = mlx5_vlan_offload_set,
2485 .filter_ctrl = mlx5_dev_filter_ctrl,
2486 .rx_descriptor_status = mlx5_rx_descriptor_status,
2487 .tx_descriptor_status = mlx5_tx_descriptor_status,
2488 .rxq_info_get = mlx5_rxq_info_get,
2489 .txq_info_get = mlx5_txq_info_get,
2490 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2491 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2492 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2493 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2494 .is_removed = mlx5_is_removed,
2495 .get_module_info = mlx5_get_module_info,
2496 .get_module_eeprom = mlx5_get_module_eeprom,
2497 .hairpin_cap_get = mlx5_hairpin_cap_get,
2498 .mtr_ops_get = mlx5_flow_meter_ops_get,