1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
18 #include <rte_malloc.h>
19 #include <ethdev_driver.h>
20 #include <ethdev_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_bus_auxiliary.h>
24 #include <rte_common.h>
25 #include <rte_kvargs.h>
26 #include <rte_rwlock.h>
27 #include <rte_spinlock.h>
28 #include <rte_string_fns.h>
29 #include <rte_alarm.h>
30 #include <rte_eal_paging.h>
32 #include <mlx5_glue.h>
33 #include <mlx5_devx_cmds.h>
34 #include <mlx5_common.h>
35 #include <mlx5_common_mp.h>
36 #include <mlx5_common_mr.h>
37 #include <mlx5_malloc.h>
39 #include "mlx5_defs.h"
41 #include "mlx5_common_os.h"
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
46 #include "mlx5_autoconf.h"
47 #include "mlx5_flow.h"
48 #include "rte_pmd_mlx5.h"
49 #include "mlx5_verbs.h"
51 #include "mlx5_devx.h"
53 #ifndef HAVE_IBV_MLX5_MOD_MPW
54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
64 /* Spinlock for mlx5_shared_data allocation. */
65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
67 /* Process local data for secondary processes. */
68 static struct mlx5_local_data mlx5_local_data;
70 /* rte flow indexed pool configuration. */
71 static struct mlx5_indexed_pool_config icfg[] = {
73 .size = sizeof(struct rte_flow),
77 .malloc = mlx5_malloc,
80 .type = "ctl_flow_ipool",
83 .size = sizeof(struct rte_flow),
89 .malloc = mlx5_malloc,
91 .per_core_cache = 1 << 14,
92 .type = "rte_flow_ipool",
95 .size = sizeof(struct rte_flow),
101 .malloc = mlx5_malloc,
104 .type = "mcp_flow_ipool",
109 * Set the completion channel file descriptor interrupt as non-blocking.
112 * Pointer to RQ channel object, which includes the channel fd
115 * The file descriptor (representing the interrupt) used in this channel.
118 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
121 mlx5_os_set_nonblock_channel_fd(int fd)
125 flags = fcntl(fd, F_GETFL);
126 return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
130 * Get mlx5 device attributes. The glue function query_device_ex() is called
131 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
132 * device attributes from the glue out parameter.
135 * Pointer to shared device context.
138 * 0 on success, a negative errno value otherwise and rte_errno is set.
141 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
144 struct mlx5_common_device *cdev = sh->cdev;
145 struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
146 struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 };
147 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
149 err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex);
154 #ifdef HAVE_IBV_MLX5_MOD_SWP
155 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
157 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
158 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
160 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
161 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
163 err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr);
168 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
169 if (mlx5_dev_is_pci(cdev->dev))
170 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev));
173 sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;
174 sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;
175 sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;
176 sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;
177 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
178 sh->dev_cap.dest_tir = 1;
180 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR)
181 DRV_LOG(DEBUG, "DV flow is supported.");
182 sh->dev_cap.dv_flow_en = 1;
184 #ifdef HAVE_MLX5DV_DR_ESWITCH
185 if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode)
186 sh->dev_cap.dv_esw_en = 1;
189 * Multi-packet send is supported by ConnectX-4 Lx PF as well
190 * as all ConnectX-5 devices.
192 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
193 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
194 DRV_LOG(DEBUG, "Enhanced MPW is supported.");
195 sh->dev_cap.mps = MLX5_MPW_ENHANCED;
197 DRV_LOG(DEBUG, "MPW is supported.");
198 sh->dev_cap.mps = MLX5_MPW;
201 DRV_LOG(DEBUG, "MPW isn't supported.");
202 sh->dev_cap.mps = MLX5_MPW_DISABLED;
204 #if (RTE_CACHE_LINE_SIZE == 128)
205 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)
206 sh->dev_cap.cqe_comp = 1;
207 DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.",
208 sh->dev_cap.cqe_comp ? "" : "not ");
210 sh->dev_cap.cqe_comp = 1;
212 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
213 sh->dev_cap.mpls_en =
214 ((dv_attr.tunnel_offloads_caps &
215 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
216 (dv_attr.tunnel_offloads_caps &
217 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
218 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.",
219 sh->dev_cap.mpls_en ? "" : "not ");
222 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration");
224 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
225 sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align;
226 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
227 sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex &
228 IBV_DEVICE_PCI_WRITE_END_PADDING);
230 sh->dev_cap.hw_csum =
231 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
232 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
233 sh->dev_cap.hw_csum ? "" : "not ");
234 sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps &
235 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
236 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
237 (sh->dev_cap.hw_vlan_strip ? "" : "not "));
238 sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps &
239 IBV_RAW_PACKET_CAP_SCATTER_FCS);
240 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
241 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
242 DRV_LOG(DEBUG, "Counters are not supported.");
245 * DPDK doesn't support larger/variable indirection tables.
246 * Once DPDK supports it, take max size from device attr.
248 sh->dev_cap.ind_table_max_size =
249 RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size,
250 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
251 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
252 sh->dev_cap.ind_table_max_size);
253 sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 &&
254 (attr_ex.tso_caps.supported_qpts &
255 (1 << IBV_QPT_RAW_PACKET)));
257 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso;
258 strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,
259 sizeof(sh->dev_cap.fw_ver));
260 #ifdef HAVE_IBV_MLX5_MOD_SWP
261 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
262 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads &
263 (MLX5_SW_PARSING_CAP |
264 MLX5_SW_PARSING_CSUM_CAP |
265 MLX5_SW_PARSING_TSO_CAP);
266 DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp);
268 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
269 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
270 struct mlx5dv_striding_rq_caps *strd_rq_caps =
271 &dv_attr.striding_rq_caps;
273 sh->dev_cap.mprq.enabled = 1;
274 sh->dev_cap.mprq.log_min_stride_size =
275 strd_rq_caps->min_single_stride_log_num_of_bytes;
276 sh->dev_cap.mprq.log_max_stride_size =
277 strd_rq_caps->max_single_stride_log_num_of_bytes;
278 sh->dev_cap.mprq.log_min_stride_num =
279 strd_rq_caps->min_single_wqe_log_num_of_strides;
280 sh->dev_cap.mprq.log_max_stride_num =
281 strd_rq_caps->max_single_wqe_log_num_of_strides;
282 sh->dev_cap.mprq.log_min_stride_wqe_size =
284 hca_attr->log_min_stride_wqe_sz :
285 MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
286 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u",
287 sh->dev_cap.mprq.log_min_stride_size);
288 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u",
289 sh->dev_cap.mprq.log_max_stride_size);
290 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u",
291 sh->dev_cap.mprq.log_min_stride_num);
292 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u",
293 sh->dev_cap.mprq.log_max_stride_num);
294 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u",
295 sh->dev_cap.mprq.log_min_stride_wqe_size);
296 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
297 strd_rq_caps->supported_qpts);
298 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ.");
301 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
302 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
303 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps &
304 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
305 MLX5_TUNNELED_OFFLOADS_GRE_CAP |
306 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
308 if (sh->dev_cap.tunnel_en) {
309 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
310 sh->dev_cap.tunnel_en &
311 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
312 sh->dev_cap.tunnel_en &
313 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
314 sh->dev_cap.tunnel_en &
315 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
317 DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
321 "Tunnel offloading disabled due to old OFED/rdma-core version");
323 if (!sh->cdev->config.devx)
325 /* Check capabilities for Packet Pacing. */
326 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.",
327 hca_attr->dev_freq_khz);
328 DRV_LOG(DEBUG, "Packet pacing is %ssupported.",
329 hca_attr->qos.packet_pacing ? "" : "not ");
330 DRV_LOG(DEBUG, "Cross channel ops are %ssupported.",
331 hca_attr->cross_channel ? "" : "not ");
332 DRV_LOG(DEBUG, "WQE index ignore is %ssupported.",
333 hca_attr->wqe_index_ignore ? "" : "not ");
334 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.",
335 hca_attr->non_wire_sq ? "" : "not ");
336 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
337 hca_attr->log_max_static_sq_wq ? "" : "not ",
338 hca_attr->log_max_static_sq_wq);
339 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.",
340 hca_attr->qos.wqe_rate_pp ? "" : "not ");
341 sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing;
342 if (!hca_attr->cross_channel) {
344 "Cross channel operations are required for packet pacing.");
345 sh->dev_cap.txpp_en = 0;
347 if (!hca_attr->wqe_index_ignore) {
349 "WQE index ignore feature is required for packet pacing.");
350 sh->dev_cap.txpp_en = 0;
352 if (!hca_attr->non_wire_sq) {
354 "Non-wire SQ feature is required for packet pacing.");
355 sh->dev_cap.txpp_en = 0;
357 if (!hca_attr->log_max_static_sq_wq) {
359 "Static WQE SQ feature is required for packet pacing.");
360 sh->dev_cap.txpp_en = 0;
362 if (!hca_attr->qos.wqe_rate_pp) {
364 "WQE rate mode is required for packet pacing.");
365 sh->dev_cap.txpp_en = 0;
367 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
369 "DevX does not provide UAR offset, can't create queues for packet pacing.");
370 sh->dev_cap.txpp_en = 0;
372 /* Check for LRO support. */
373 if (mlx5_devx_obj_ops_en(sh) && hca_attr->lro_cap) {
374 /* TBD check tunnel lro caps. */
375 sh->dev_cap.lro_supported = 1;
376 DRV_LOG(DEBUG, "Device supports LRO.");
378 "LRO minimal size of TCP segment required for coalescing is %d bytes.",
379 hca_attr->lro_min_mss_size);
381 sh->dev_cap.scatter_fcs_w_decap_disable =
382 hca_attr->scatter_fcs_w_decap_disable;
383 sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop;
384 mlx5_rt_timestamp_config(sh, hca_attr);
389 * Detect misc5 support or not
392 * Device private data pointer
394 #ifdef HAVE_MLX5DV_DR
396 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
398 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
399 /* Dummy VxLAN matcher to detect rdma-core misc5 cap
400 * Case: IPv4--->UDP--->VxLAN--->vni
403 struct mlx5_flow_dv_match_params matcher_mask;
408 uint32_t *tunnel_header_m;
409 struct mlx5dv_flow_matcher_attr dv_attr;
411 memset(&matcher_mask, 0, sizeof(matcher_mask));
412 matcher_mask.size = sizeof(matcher_mask.buf);
413 match_m = matcher_mask.buf;
414 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
415 misc5_m = MLX5_ADDR_OF(fte_match_param,
416 match_m, misc_parameters_5);
417 tunnel_header_m = (uint32_t *)
418 MLX5_ADDR_OF(fte_match_set_misc5,
419 misc5_m, tunnel_header_1);
420 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
421 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
422 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
423 *tunnel_header_m = 0xffffff;
425 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
427 DRV_LOG(INFO, "No SW steering support");
430 dv_attr.type = IBV_FLOW_ATTR_NORMAL,
431 dv_attr.match_mask = (void *)&matcher_mask,
432 dv_attr.match_criteria_enable =
433 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
434 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
435 dv_attr.priority = 3;
436 #ifdef HAVE_MLX5DV_DR_ESWITCH
438 if (priv->sh->config.dv_esw_en) {
439 /* FDB enabled reg_c_0 */
440 dv_attr.match_criteria_enable |=
441 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
442 misc2_m = MLX5_ADDR_OF(fte_match_param,
443 match_m, misc_parameters_2);
444 MLX5_SET(fte_match_set_misc2, misc2_m,
445 metadata_reg_c_0, 0xffff);
448 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
451 priv->sh->misc5_cap = 1;
452 mlx5_glue->dv_destroy_flow_matcher(matcher);
454 mlx5_glue->dr_destroy_flow_tbl(tbl);
462 * Initialize DR related data within private structure.
463 * Routine checks the reference counter and does actual
464 * resources creation/initialization only if counter is zero.
467 * Pointer to the private device data structure.
470 * Zero on success, positive error code otherwise.
473 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
475 struct mlx5_dev_ctx_shared *sh = priv->sh;
476 char s[MLX5_NAME_SIZE] __rte_unused;
479 MLX5_ASSERT(sh && sh->refcnt);
482 err = mlx5_alloc_table_hash_list(priv);
485 if (priv->sh->config.dv_flow_en == 2)
487 /* The resources below are only valid with DV support. */
488 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
489 /* Init port id action list. */
490 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
491 sh->port_id_action_list = mlx5_list_create(s, sh, true,
492 flow_dv_port_id_create_cb,
493 flow_dv_port_id_match_cb,
494 flow_dv_port_id_remove_cb,
495 flow_dv_port_id_clone_cb,
496 flow_dv_port_id_clone_free_cb);
497 if (!sh->port_id_action_list)
499 /* Init push vlan action list. */
500 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
501 sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
502 flow_dv_push_vlan_create_cb,
503 flow_dv_push_vlan_match_cb,
504 flow_dv_push_vlan_remove_cb,
505 flow_dv_push_vlan_clone_cb,
506 flow_dv_push_vlan_clone_free_cb);
507 if (!sh->push_vlan_action_list)
509 /* Init sample action list. */
510 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
511 sh->sample_action_list = mlx5_list_create(s, sh, true,
512 flow_dv_sample_create_cb,
513 flow_dv_sample_match_cb,
514 flow_dv_sample_remove_cb,
515 flow_dv_sample_clone_cb,
516 flow_dv_sample_clone_free_cb);
517 if (!sh->sample_action_list)
519 /* Init dest array action list. */
520 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
521 sh->dest_array_list = mlx5_list_create(s, sh, true,
522 flow_dv_dest_array_create_cb,
523 flow_dv_dest_array_match_cb,
524 flow_dv_dest_array_remove_cb,
525 flow_dv_dest_array_clone_cb,
526 flow_dv_dest_array_clone_free_cb);
527 if (!sh->dest_array_list)
529 /* Init shared flex parsers list, no need lcore_share */
530 snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
531 sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
532 mlx5_flex_parser_create_cb,
533 mlx5_flex_parser_match_cb,
534 mlx5_flex_parser_remove_cb,
535 mlx5_flex_parser_clone_cb,
536 mlx5_flex_parser_clone_free_cb);
537 if (!sh->flex_parsers_dv)
540 #ifdef HAVE_MLX5DV_DR
543 /* Reference counter is zero, we should initialize structures. */
544 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
545 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
547 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
551 sh->rx_domain = domain;
552 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
553 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
555 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
559 sh->tx_domain = domain;
560 #ifdef HAVE_MLX5DV_DR_ESWITCH
561 if (sh->config.dv_esw_en) {
562 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
563 MLX5DV_DR_DOMAIN_TYPE_FDB);
565 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
569 sh->fdb_domain = domain;
572 * The drop action is just some dummy placeholder in rdma-core. It
573 * does not belong to domains and has no any attributes, and, can be
574 * shared by the entire device.
576 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
577 if (!sh->dr_drop_action) {
578 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
583 if (!sh->tunnel_hub && sh->config.dv_miss_info)
584 err = mlx5_alloc_tunnel_hub(sh);
586 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
589 if (sh->config.reclaim_mode == MLX5_RCM_AGGR) {
590 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
591 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
593 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
595 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
596 if (!sh->config.allow_duplicate_pattern) {
597 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
598 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
600 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
601 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
603 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
606 __mlx5_discovery_misc5_cap(priv);
607 #endif /* HAVE_MLX5DV_DR */
608 sh->default_miss_action =
609 mlx5_glue->dr_create_flow_action_default_miss();
610 if (!sh->default_miss_action)
611 DRV_LOG(WARNING, "Default miss action is not supported.");
612 LIST_INIT(&sh->shared_rxqs);
615 /* Rollback the created objects. */
617 mlx5_glue->dr_destroy_domain(sh->rx_domain);
618 sh->rx_domain = NULL;
621 mlx5_glue->dr_destroy_domain(sh->tx_domain);
622 sh->tx_domain = NULL;
624 if (sh->fdb_domain) {
625 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
626 sh->fdb_domain = NULL;
628 if (sh->dr_drop_action) {
629 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
630 sh->dr_drop_action = NULL;
632 if (sh->pop_vlan_action) {
633 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
634 sh->pop_vlan_action = NULL;
636 if (sh->encaps_decaps) {
637 mlx5_hlist_destroy(sh->encaps_decaps);
638 sh->encaps_decaps = NULL;
640 if (sh->modify_cmds) {
641 mlx5_hlist_destroy(sh->modify_cmds);
642 sh->modify_cmds = NULL;
645 /* tags should be destroyed with flow before. */
646 mlx5_hlist_destroy(sh->tag_table);
647 sh->tag_table = NULL;
649 if (sh->tunnel_hub) {
650 mlx5_release_tunnel_hub(sh, priv->dev_port);
651 sh->tunnel_hub = NULL;
653 mlx5_free_table_hash_list(priv);
654 if (sh->port_id_action_list) {
655 mlx5_list_destroy(sh->port_id_action_list);
656 sh->port_id_action_list = NULL;
658 if (sh->push_vlan_action_list) {
659 mlx5_list_destroy(sh->push_vlan_action_list);
660 sh->push_vlan_action_list = NULL;
662 if (sh->sample_action_list) {
663 mlx5_list_destroy(sh->sample_action_list);
664 sh->sample_action_list = NULL;
666 if (sh->dest_array_list) {
667 mlx5_list_destroy(sh->dest_array_list);
668 sh->dest_array_list = NULL;
674 * Destroy DR related data within private structure.
677 * Pointer to the private device data structure.
680 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
682 struct mlx5_dev_ctx_shared *sh = priv->sh;
684 MLX5_ASSERT(sh && sh->refcnt);
687 MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
688 #ifdef HAVE_MLX5DV_DR
690 mlx5_glue->dr_destroy_domain(sh->rx_domain);
691 sh->rx_domain = NULL;
694 mlx5_glue->dr_destroy_domain(sh->tx_domain);
695 sh->tx_domain = NULL;
697 #ifdef HAVE_MLX5DV_DR_ESWITCH
698 if (sh->fdb_domain) {
699 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
700 sh->fdb_domain = NULL;
702 if (sh->dr_drop_action) {
703 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
704 sh->dr_drop_action = NULL;
707 if (sh->pop_vlan_action) {
708 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
709 sh->pop_vlan_action = NULL;
711 #endif /* HAVE_MLX5DV_DR */
712 if (sh->default_miss_action)
713 mlx5_glue->destroy_flow_action
714 (sh->default_miss_action);
715 if (sh->encaps_decaps) {
716 mlx5_hlist_destroy(sh->encaps_decaps);
717 sh->encaps_decaps = NULL;
719 if (sh->modify_cmds) {
720 mlx5_hlist_destroy(sh->modify_cmds);
721 sh->modify_cmds = NULL;
724 /* tags should be destroyed with flow before. */
725 mlx5_hlist_destroy(sh->tag_table);
726 sh->tag_table = NULL;
728 if (sh->tunnel_hub) {
729 mlx5_release_tunnel_hub(sh, priv->dev_port);
730 sh->tunnel_hub = NULL;
732 mlx5_free_table_hash_list(priv);
733 if (sh->port_id_action_list) {
734 mlx5_list_destroy(sh->port_id_action_list);
735 sh->port_id_action_list = NULL;
737 if (sh->push_vlan_action_list) {
738 mlx5_list_destroy(sh->push_vlan_action_list);
739 sh->push_vlan_action_list = NULL;
741 if (sh->sample_action_list) {
742 mlx5_list_destroy(sh->sample_action_list);
743 sh->sample_action_list = NULL;
745 if (sh->dest_array_list) {
746 mlx5_list_destroy(sh->dest_array_list);
747 sh->dest_array_list = NULL;
752 * Initialize shared data between primary and secondary process.
754 * A memzone is reserved by primary process and secondary processes attach to
758 * 0 on success, a negative errno value otherwise and rte_errno is set.
761 mlx5_init_shared_data(void)
763 const struct rte_memzone *mz;
766 rte_spinlock_lock(&mlx5_shared_data_lock);
767 if (mlx5_shared_data == NULL) {
768 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
769 /* Allocate shared memory. */
770 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
771 sizeof(*mlx5_shared_data),
775 "Cannot allocate mlx5 shared data");
779 mlx5_shared_data = mz->addr;
780 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
781 rte_spinlock_init(&mlx5_shared_data->lock);
783 /* Lookup allocated shared memory. */
784 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
787 "Cannot attach mlx5 shared data");
791 mlx5_shared_data = mz->addr;
792 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
796 rte_spinlock_unlock(&mlx5_shared_data_lock);
801 * PMD global initialization.
803 * Independent from individual device, this function initializes global
804 * per-PMD data structures distinguishing primary and secondary processes.
805 * Hence, each initialization is called once per a process.
808 * 0 on success, a negative errno value otherwise and rte_errno is set.
813 struct mlx5_shared_data *sd;
814 struct mlx5_local_data *ld = &mlx5_local_data;
817 if (mlx5_init_shared_data())
819 sd = mlx5_shared_data;
821 rte_spinlock_lock(&sd->lock);
822 switch (rte_eal_process_type()) {
823 case RTE_PROC_PRIMARY:
826 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
827 mlx5_mp_os_primary_handle);
830 sd->init_done = true;
832 case RTE_PROC_SECONDARY:
835 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
836 mlx5_mp_os_secondary_handle);
840 ld->init_done = true;
846 rte_spinlock_unlock(&sd->lock);
851 * DR flow drop action support detect.
854 * Pointer to rte_eth_dev structure.
858 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
860 #ifdef HAVE_MLX5DV_DR
861 struct mlx5_priv *priv = dev->data->dev_private;
863 if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action)
866 * DR supports drop action placeholder when it is supported;
867 * otherwise, use the queue drop action.
869 if (!priv->sh->drop_action_check_flag) {
870 if (!mlx5_flow_discover_dr_action_support(dev))
871 priv->sh->dr_drop_action_en = 1;
872 priv->sh->drop_action_check_flag = 1;
874 if (priv->sh->dr_drop_action_en)
875 priv->root_drop_action = priv->sh->dr_drop_action;
877 priv->root_drop_action = priv->drop_queue.hrxq->action;
882 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
884 struct mlx5_priv *priv = dev->data->dev_private;
885 void *ctx = priv->sh->cdev->ctx;
887 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
888 if (!priv->q_counters) {
889 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
892 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
893 "by DevX - fall-back to use the kernel driver global "
894 "queue counter.", dev->data->port_id);
895 /* Create WQ by kernel and query its queue counter ID. */
897 wq = mlx5_glue->create_wq(ctx,
898 &(struct ibv_wq_init_attr){
899 .wq_type = IBV_WQT_RQ,
902 .pd = priv->sh->cdev->pd,
906 /* Counter is assigned only on RDY state. */
907 int ret = mlx5_glue->modify_wq(wq,
908 &(struct ibv_wq_attr){
909 .attr_mask = IBV_WQ_ATTR_STATE,
910 .wq_state = IBV_WQS_RDY,
914 mlx5_devx_cmd_wq_query(wq,
915 &priv->counter_set_id);
916 claim_zero(mlx5_glue->destroy_wq(wq));
918 claim_zero(mlx5_glue->destroy_cq(cq));
921 priv->counter_set_id = priv->q_counters->id;
923 if (priv->counter_set_id == 0)
924 DRV_LOG(INFO, "Part of the port %d statistics will not be "
925 "available.", dev->data->port_id);
929 * Check if representor spawn info match devargs.
932 * Verbs device parameters (name, port, switch_info) to spawn.
934 * Device devargs to probe.
940 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
941 struct rte_eth_devargs *eth_da)
943 struct mlx5_switch_info *switch_info = &spawn->info;
946 uint16_t repr_id = mlx5_representor_id_encode(switch_info,
949 switch (eth_da->type) {
950 case RTE_ETH_REPRESENTOR_SF:
951 if (!(spawn->info.port_name == -1 &&
952 switch_info->name_type ==
953 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
954 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
959 case RTE_ETH_REPRESENTOR_VF:
960 /* Allows HPF representor index -1 as exception. */
961 if (!(spawn->info.port_name == -1 &&
962 switch_info->name_type ==
963 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
964 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
969 case RTE_ETH_REPRESENTOR_NONE:
974 DRV_LOG(ERR, "unsupported representor type");
977 /* Check representor ID: */
978 for (p = 0; p < eth_da->nb_ports; ++p) {
979 if (spawn->pf_bond < 0) {
980 /* For non-LAG mode, allow and ignore pf. */
981 switch_info->pf_num = eth_da->ports[p];
982 repr_id = mlx5_representor_id_encode(switch_info,
985 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
986 id = MLX5_REPRESENTOR_ID
987 (eth_da->ports[p], eth_da->type,
988 eth_da->representor_ports[f]);
998 * Spawn an Ethernet device from Verbs information.
1001 * Backing DPDK device.
1003 * Verbs device parameters (name, port, switch_info) to spawn.
1007 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
1010 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1011 * is set. The following errors are defined:
1013 * EBUSY: device is not supposed to be spawned.
1014 * EEXIST: device is already spawned
1016 static struct rte_eth_dev *
1017 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1018 struct mlx5_dev_spawn_data *spawn,
1019 struct rte_eth_devargs *eth_da,
1020 struct mlx5_kvargs_ctrl *mkvlist)
1022 const struct mlx5_switch_info *switch_info = &spawn->info;
1023 struct mlx5_dev_ctx_shared *sh = NULL;
1024 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
1025 struct rte_eth_dev *eth_dev = NULL;
1026 struct mlx5_priv *priv = NULL;
1028 struct rte_ether_addr mac;
1029 char name[RTE_ETH_NAME_MAX_LEN];
1030 int own_domain_id = 0;
1032 struct mlx5_port_info vport_info = { .query_flags = 0 };
1036 /* Determine if this port representor is supposed to be spawned. */
1037 if (switch_info->representor && dpdk_dev->devargs &&
1038 !mlx5_representor_match(spawn, eth_da))
1040 /* Build device name. */
1041 if (spawn->pf_bond < 0) {
1042 /* Single device. */
1043 if (!switch_info->representor)
1044 strlcpy(name, dpdk_dev->name, sizeof(name));
1046 err = snprintf(name, sizeof(name), "%s_representor_%s%u",
1048 switch_info->name_type ==
1049 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1050 switch_info->port_name);
1052 /* Bonding device. */
1053 if (!switch_info->representor) {
1054 err = snprintf(name, sizeof(name), "%s_%s",
1055 dpdk_dev->name, spawn->phys_dev_name);
1057 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
1058 dpdk_dev->name, spawn->phys_dev_name,
1059 switch_info->ctrl_num,
1060 switch_info->pf_num,
1061 switch_info->name_type ==
1062 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1063 switch_info->port_name);
1066 if (err >= (int)sizeof(name))
1067 DRV_LOG(WARNING, "device name overflow %s", name);
1068 /* check if the device is already spawned */
1069 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1071 * When device is already spawned, its devargs should be set
1072 * as used. otherwise, mlx5_kvargs_validate() will fail.
1075 mlx5_port_args_set_used(name, port_id, mkvlist);
1079 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1080 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1081 struct mlx5_mp_id mp_id;
1083 eth_dev = rte_eth_dev_attach_secondary(name);
1084 if (eth_dev == NULL) {
1085 DRV_LOG(ERR, "can not attach rte ethdev");
1089 eth_dev->device = dpdk_dev;
1090 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1091 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1092 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1093 err = mlx5_proc_priv_init(eth_dev);
1096 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
1097 /* Receive command fd from primary process */
1098 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
1101 /* Remap UAR for Tx queues. */
1102 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1106 * Ethdev pointer is still required as input since
1107 * the primary device is not accessible from the
1108 * secondary process.
1110 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1111 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1114 mlx5_dev_close(eth_dev);
1117 sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist);
1120 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1121 /* Check port status. */
1122 if (spawn->phys_port <= UINT8_MAX) {
1123 /* Legacy Verbs api only support u8 port number. */
1124 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1127 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1130 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1131 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1135 } else if (nl_rdma >= 0) {
1136 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1137 err = mlx5_nl_port_state(nl_rdma,
1138 spawn->phys_dev_name,
1141 DRV_LOG(INFO, "Failed to get netlink port state: %s",
1142 strerror(rte_errno));
1146 port_attr.state = (enum ibv_port_state)err;
1148 if (port_attr.state != IBV_PORT_ACTIVE)
1149 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1150 mlx5_glue->port_state_str(port_attr.state),
1152 /* Allocate private eth device data. */
1153 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1155 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1157 DRV_LOG(ERR, "priv allocation failure");
1162 priv->dev_port = spawn->phys_port;
1163 priv->pci_dev = spawn->pci_dev;
1164 priv->mtu = RTE_ETHER_MTU;
1165 /* Some internal functions rely on Netlink sockets, open them now. */
1166 priv->nl_socket_rdma = nl_rdma;
1167 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1168 priv->representor = !!switch_info->representor;
1169 priv->master = !!switch_info->master;
1170 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1171 priv->vport_meta_tag = 0;
1172 priv->vport_meta_mask = 0;
1173 priv->pf_bond = spawn->pf_bond;
1176 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1177 priv->dev_port, dpdk_dev->bus->name,
1178 priv->pci_dev ? priv->pci_dev->name : "NONE",
1179 priv->master, priv->representor, priv->pf_bond);
1182 * If we have E-Switch we should determine the vport attributes.
1183 * E-Switch may use either source vport field or reg_c[0] metadata
1184 * register to match on vport index. The engaged part of metadata
1185 * register is defined by mask.
1188 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1193 "Cannot query devx port %d on device %s",
1194 spawn->phys_port, spawn->phys_dev_name);
1195 vport_info.query_flags = 0;
1198 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1199 priv->vport_meta_tag = vport_info.vport_meta_tag;
1200 priv->vport_meta_mask = vport_info.vport_meta_mask;
1201 if (!priv->vport_meta_mask) {
1203 "vport zero mask for port %d on bonding device %s",
1204 spawn->phys_port, spawn->phys_dev_name);
1208 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1210 "Invalid vport tag for port %d on bonding device %s",
1211 spawn->phys_port, spawn->phys_dev_name);
1216 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1217 priv->vport_id = vport_info.vport_id;
1218 } else if (spawn->pf_bond >= 0 && sh->esw_mode) {
1220 "Cannot deduce vport index for port %d on bonding device %s",
1221 spawn->phys_port, spawn->phys_dev_name);
1226 * Suppose vport index in compatible way. Kernel/rdma_core
1227 * support single E-Switch per PF configurations only and
1228 * vport_id field contains the vport index for associated VF,
1229 * which is deduced from representor port name.
1230 * For example, let's have the IB device port 10, it has
1231 * attached network device eth0, which has port name attribute
1232 * pf0vf2, we can deduce the VF number as 2, and set vport index
1233 * as 3 (2+1). This assigning schema should be changed if the
1234 * multiple E-Switch instances per PF configurations or/and PCI
1235 * subfunctions are added.
1237 priv->vport_id = switch_info->representor ?
1238 switch_info->port_name + 1 : -1;
1240 priv->representor_id = mlx5_representor_id_encode(switch_info,
1243 * Look for sibling devices in order to reuse their switch domain
1244 * if any, otherwise allocate one.
1246 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1247 const struct mlx5_priv *opriv =
1248 rte_eth_devices[port_id].data->dev_private;
1251 opriv->sh != priv->sh ||
1253 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1255 priv->domain_id = opriv->domain_id;
1256 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1257 priv->dev_port, priv->domain_id);
1260 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1261 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1264 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1265 strerror(rte_errno));
1269 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1270 priv->dev_port, priv->domain_id);
1272 if (sh->cdev->config.devx) {
1273 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
1275 sh->steering_format_version = hca_attr->steering_format_version;
1276 #if defined(HAVE_MLX5DV_DR) && \
1277 (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1278 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1279 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1280 sh->config.dv_flow_en) {
1281 uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
1283 * Meter needs two REG_C's for color match and pre-sfx
1284 * flow match. Here get the REG_C for color match.
1285 * REG_C_0 and REG_C_1 is reserved for metadata feature.
1288 if (__builtin_popcount(reg_c_mask) < 1) {
1290 DRV_LOG(WARNING, "No available register for"
1294 * The meter color register is used by the
1295 * flow-hit feature as well.
1296 * The flow-hit feature must use REG_C_3
1297 * Prefer REG_C_3 if it is available.
1299 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1300 priv->mtr_color_reg = REG_C_3;
1302 priv->mtr_color_reg = ffs(reg_c_mask)
1305 priv->mtr_reg_share = hca_attr->qos.flow_meter;
1306 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1307 priv->mtr_color_reg);
1310 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
1311 uint32_t log_obj_size =
1312 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1314 hca_attr->qos.log_meter_aso_granularity &&
1316 hca_attr->qos.log_meter_aso_max_alloc)
1317 sh->meter_aso_en = 1;
1320 err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1326 if (hca_attr->flow.tunnel_header_0_1)
1327 sh->tunnel_header_0_1 = 1;
1329 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1330 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) {
1331 sh->flow_hit_aso_en = 1;
1332 err = mlx5_flow_aso_age_mng_init(sh);
1337 DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1339 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1340 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1341 defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1342 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) {
1343 err = mlx5_flow_aso_ct_mng_init(sh);
1348 DRV_LOG(DEBUG, "CT ASO is supported.");
1351 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1352 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1353 if (hca_attr->log_max_ft_sampler_num > 0 &&
1354 sh->config.dv_flow_en) {
1355 priv->sampler_en = 1;
1356 DRV_LOG(DEBUG, "Sampler enabled!");
1358 priv->sampler_en = 0;
1359 if (!hca_attr->log_max_ft_sampler_num)
1361 "No available register for sampler.");
1363 DRV_LOG(DEBUG, "DV flow is not supported!");
1367 /* Process parameters and store port configuration on priv structure. */
1368 err = mlx5_port_args_config(priv, mkvlist, &priv->config);
1371 DRV_LOG(ERR, "Failed to process port configure: %s",
1372 strerror(rte_errno));
1375 eth_dev = rte_eth_dev_allocate(name);
1376 if (eth_dev == NULL) {
1377 DRV_LOG(ERR, "can not allocate rte ethdev");
1381 if (priv->representor) {
1382 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1383 eth_dev->data->representor_id = priv->representor_id;
1384 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1385 struct mlx5_priv *opriv =
1386 rte_eth_devices[port_id].data->dev_private;
1389 opriv->domain_id == priv->domain_id &&
1390 opriv->sh == priv->sh) {
1391 eth_dev->data->backer_port_id = port_id;
1395 if (port_id >= RTE_MAX_ETHPORTS)
1396 eth_dev->data->backer_port_id = eth_dev->data->port_id;
1398 priv->mp_id.port_id = eth_dev->data->port_id;
1399 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1401 * Store associated network device interface index. This index
1402 * is permanent throughout the lifetime of device. So, we may store
1403 * the ifindex here and use the cached value further.
1405 MLX5_ASSERT(spawn->ifindex);
1406 priv->if_index = spawn->ifindex;
1407 priv->lag_affinity_idx = sh->refcnt - 1;
1408 eth_dev->data->dev_private = priv;
1409 priv->dev_data = eth_dev->data;
1410 eth_dev->data->mac_addrs = priv->mac;
1411 eth_dev->device = dpdk_dev;
1412 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1413 /* Configure the first MAC address by default. */
1414 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1416 "port %u cannot get MAC address, is mlx5_en"
1417 " loaded? (errno: %s)",
1418 eth_dev->data->port_id, strerror(rte_errno));
1423 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1424 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1425 #ifdef RTE_LIBRTE_MLX5_DEBUG
1427 char ifname[MLX5_NAMESIZE];
1429 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1430 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1431 eth_dev->data->port_id, ifname);
1433 DRV_LOG(DEBUG, "port %u ifname is unknown",
1434 eth_dev->data->port_id);
1437 /* Get actual MTU if possible. */
1438 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1443 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1445 /* Initialize burst functions to prevent crashes before link-up. */
1446 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1447 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1448 eth_dev->dev_ops = &mlx5_dev_ops;
1449 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1450 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1451 eth_dev->rx_queue_count = mlx5_rx_queue_count;
1452 /* Register MAC address. */
1453 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1454 if (sh->dev_cap.vf && sh->config.vf_nl_en)
1455 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1456 mlx5_ifindex(eth_dev),
1457 eth_dev->data->mac_addrs,
1458 MLX5_MAX_MAC_ADDRESSES);
1459 priv->ctrl_flows = 0;
1460 rte_spinlock_init(&priv->flow_list_lock);
1461 TAILQ_INIT(&priv->flow_meters);
1462 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1463 if (!priv->mtr_profile_tbl)
1465 /* Bring Ethernet device up. */
1466 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1467 eth_dev->data->port_id);
1468 mlx5_set_link_up(eth_dev);
1470 * Even though the interrupt handler is not installed yet,
1471 * interrupts will still trigger on the async_fd from
1472 * Verbs context returned by ibv_open_device().
1474 mlx5_link_update(eth_dev, 0);
1475 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1476 icfg[i].release_mem_en = !!sh->config.reclaim_mode;
1477 if (sh->config.reclaim_mode)
1478 icfg[i].per_core_cache = 0;
1479 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1480 if (!priv->flows[i])
1483 /* Create context for virtual machine VLAN workaround. */
1484 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1485 if (sh->config.dv_flow_en) {
1486 err = mlx5_alloc_shared_dr(priv);
1489 if (mlx5_flex_item_port_init(eth_dev) < 0)
1492 if (mlx5_devx_obj_ops_en(sh)) {
1493 priv->obj_ops = devx_obj_ops;
1494 mlx5_queue_counter_id_prepare(eth_dev);
1495 priv->obj_ops.lb_dummy_queue_create =
1496 mlx5_rxq_ibv_obj_dummy_lb_create;
1497 priv->obj_ops.lb_dummy_queue_release =
1498 mlx5_rxq_ibv_obj_dummy_lb_release;
1499 } else if (spawn->max_port > UINT8_MAX) {
1500 /* Verbs can't support ports larger than 255 by design. */
1501 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1505 priv->obj_ops = ibv_obj_ops;
1507 if (sh->config.tx_pp &&
1508 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1510 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1511 * packet pacing and already checked above.
1512 * Hence, we should only make sure the SQs will be created
1513 * with DevX, not with Verbs.
1514 * Verbs allocates the SQ UAR on its own and it can't be shared
1515 * with Clock Queue UAR as required for Tx scheduling.
1517 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1521 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1522 if (!priv->drop_queue.hrxq)
1524 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1525 mlx5_hrxq_create_cb,
1527 mlx5_hrxq_remove_cb,
1529 mlx5_hrxq_clone_free_cb);
1532 rte_rwlock_init(&priv->ind_tbls_lock);
1533 if (priv->sh->config.dv_flow_en == 2)
1535 /* Port representor shares the same max priority with pf port. */
1536 if (!priv->sh->flow_priority_check_flag) {
1537 /* Supported Verbs flow priority number detection. */
1538 err = mlx5_flow_discover_priorities(eth_dev);
1539 priv->sh->flow_max_priority = err;
1540 priv->sh->flow_priority_check_flag = 1;
1542 err = priv->sh->flow_max_priority;
1548 mlx5_set_metadata_mask(eth_dev);
1549 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1550 !priv->sh->dv_regc0_mask) {
1551 DRV_LOG(ERR, "metadata mode %u is not supported "
1552 "(no metadata reg_c[0] is available)",
1553 sh->config.dv_xmeta_en);
1557 /* Query availability of metadata reg_c's. */
1558 if (!priv->sh->metadata_regc_check_flag) {
1559 err = mlx5_flow_discover_mreg_c(eth_dev);
1565 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1567 "port %u extensive metadata register is not supported",
1568 eth_dev->data->port_id);
1569 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1570 DRV_LOG(ERR, "metadata mode %u is not supported "
1571 "(no metadata registers available)",
1572 sh->config.dv_xmeta_en);
1577 if (sh->config.dv_flow_en &&
1578 sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1579 mlx5_flow_ext_mreg_supported(eth_dev) &&
1580 priv->sh->dv_regc0_mask) {
1581 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1582 MLX5_FLOW_MREG_HTABLE_SZ,
1583 false, true, eth_dev,
1584 flow_dv_mreg_create_cb,
1585 flow_dv_mreg_match_cb,
1586 flow_dv_mreg_remove_cb,
1587 flow_dv_mreg_clone_cb,
1588 flow_dv_mreg_clone_free_cb);
1589 if (!priv->mreg_cp_tbl) {
1594 rte_spinlock_init(&priv->shared_act_sl);
1595 mlx5_flow_counter_mode_config(eth_dev);
1596 mlx5_flow_drop_action_config(eth_dev);
1597 if (sh->config.dv_flow_en)
1598 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1602 if (priv->mreg_cp_tbl)
1603 mlx5_hlist_destroy(priv->mreg_cp_tbl);
1605 mlx5_os_free_shared_dr(priv);
1606 if (priv->nl_socket_route >= 0)
1607 close(priv->nl_socket_route);
1608 if (priv->vmwa_context)
1609 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1610 if (eth_dev && priv->drop_queue.hrxq)
1611 mlx5_drop_action_destroy(eth_dev);
1612 if (priv->mtr_profile_tbl)
1613 mlx5_l3t_destroy(priv->mtr_profile_tbl);
1615 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1617 mlx5_list_destroy(priv->hrxqs);
1618 if (eth_dev && priv->flex_item_map)
1619 mlx5_flex_item_port_cleanup(eth_dev);
1621 if (eth_dev != NULL)
1622 eth_dev->data->dev_private = NULL;
1624 if (eth_dev != NULL) {
1625 /* mac_addrs must not be freed alone because part of
1628 eth_dev->data->mac_addrs = NULL;
1629 rte_eth_dev_release_port(eth_dev);
1632 mlx5_free_shared_dev_ctx(sh);
1635 MLX5_ASSERT(err > 0);
1641 * Comparison callback to sort device data.
1643 * This is meant to be used with qsort().
1646 * Pointer to pointer to first data object.
1648 * Pointer to pointer to second data object.
1651 * 0 if both objects are equal, less than 0 if the first argument is less
1652 * than the second, greater than 0 otherwise.
1655 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1657 const struct mlx5_switch_info *si_a =
1658 &((const struct mlx5_dev_spawn_data *)a)->info;
1659 const struct mlx5_switch_info *si_b =
1660 &((const struct mlx5_dev_spawn_data *)b)->info;
1663 /* Master device first. */
1664 ret = si_b->master - si_a->master;
1667 /* Then representor devices. */
1668 ret = si_b->representor - si_a->representor;
1671 /* Unidentified devices come last in no specific order. */
1672 if (!si_a->representor)
1674 /* Order representors by name. */
1675 return si_a->port_name - si_b->port_name;
1679 * Match PCI information for possible slaves of bonding device.
1681 * @param[in] ibdev_name
1682 * Name of Infiniband device.
1683 * @param[in] pci_dev
1684 * Pointer to primary PCI address structure to match.
1685 * @param[in] nl_rdma
1686 * Netlink RDMA group socket handle.
1688 * Representor owner PF index.
1689 * @param[out] bond_info
1690 * Pointer to bonding information.
1693 * negative value if no bonding device found, otherwise
1694 * positive index of slave PF in bonding.
1697 mlx5_device_bond_pci_match(const char *ibdev_name,
1698 const struct rte_pci_addr *pci_dev,
1699 int nl_rdma, uint16_t owner,
1700 struct mlx5_bond_info *bond_info)
1702 char ifname[IF_NAMESIZE + 1];
1703 unsigned int ifindex;
1705 FILE *bond_file = NULL, *file;
1708 uint8_t cur_guid[32] = {0};
1709 uint8_t guid[32] = {0};
1712 * Try to get master device name. If something goes wrong suppose
1713 * the lack of kernel support and no bonding devices.
1715 memset(bond_info, 0, sizeof(*bond_info));
1718 if (!strstr(ibdev_name, "bond"))
1720 np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1723 if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
1726 * The master device might not be on the predefined port(not on port
1727 * index 1, it is not guaranteed), we have to scan all Infiniband
1728 * device ports and find master.
1730 for (i = 1; i <= np; ++i) {
1731 /* Check whether Infiniband port is populated. */
1732 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1735 if (!if_indextoname(ifindex, ifname))
1737 /* Try to read bonding slave names from sysfs. */
1739 "/sys/class/net/%s/master/bonding/slaves", ifname);
1740 bond_file = fopen(slaves, "r");
1746 /* Use safe format to check maximal buffer length. */
1747 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1748 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1749 char tmp_str[IF_NAMESIZE + 32];
1750 struct rte_pci_addr pci_addr;
1751 struct mlx5_switch_info info;
1754 /* Process slave interface names in the loop. */
1755 snprintf(tmp_str, sizeof(tmp_str),
1756 "/sys/class/net/%s", ifname);
1757 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1759 "Cannot get PCI address for netdev \"%s\".",
1763 /* Slave interface PCI address match found. */
1764 snprintf(tmp_str, sizeof(tmp_str),
1765 "/sys/class/net/%s/phys_port_name", ifname);
1766 file = fopen(tmp_str, "rb");
1769 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1770 if (fscanf(file, "%32s", tmp_str) == 1)
1771 mlx5_translate_port_name(tmp_str, &info);
1773 /* Only process PF ports. */
1774 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1775 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1777 /* Check max bonding member. */
1778 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1779 DRV_LOG(WARNING, "bonding index out of range, "
1780 "please increase MLX5_BOND_MAX_PORTS: %s",
1785 snprintf(tmp_str, sizeof(tmp_str),
1786 "/sys/class/net/%s/ifindex", ifname);
1787 file = fopen(tmp_str, "rb");
1790 ret = fscanf(file, "%u", &ifindex);
1794 /* Save bonding info. */
1795 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1796 sizeof(bond_info->ports[0].ifname));
1797 bond_info->ports[info.port_name].pci_addr = pci_addr;
1798 bond_info->ports[info.port_name].ifindex = ifindex;
1799 bond_info->n_port++;
1801 * Under socket direct mode, bonding will use
1802 * system_image_guid as identification.
1803 * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
1804 * All bonding members should have the same guid even if driver
1805 * is using PCIe BDF.
1807 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
1811 if (!memcmp(guid, cur_guid, sizeof(guid)) &&
1812 owner == info.port_name &&
1813 (owner != 0 || (owner == 0 &&
1814 !rte_pci_addr_cmp(pci_dev, &pci_addr))))
1815 pf = info.port_name;
1816 } else if (pci_dev->domain == pci_addr.domain &&
1817 pci_dev->bus == pci_addr.bus &&
1818 pci_dev->devid == pci_addr.devid &&
1819 ((pci_dev->function == 0 &&
1820 pci_dev->function + owner == pci_addr.function) ||
1821 (pci_dev->function == owner &&
1822 pci_addr.function == owner)))
1823 pf = info.port_name;
1826 /* Get bond interface info */
1827 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1830 DRV_LOG(ERR, "unable to get bond info: %s",
1831 strerror(rte_errno));
1833 DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1834 ifindex, bond_info->ifindex, bond_info->ifname);
1836 if (owner == 0 && pf != 0) {
1837 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner",
1838 pci_dev->domain, pci_dev->bus, pci_dev->devid,
1845 * Register a PCI device within bonding.
1847 * This function spawns Ethernet devices out of a given PCI device and
1848 * bonding owner PF index.
1851 * Pointer to common mlx5 device structure.
1852 * @param[in] req_eth_da
1853 * Requested ethdev device argument.
1854 * @param[in] owner_id
1855 * Requested owner PF port ID within bonding device, default to 0.
1856 * @param[in, out] mkvlist
1857 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
1860 * 0 on success, a negative errno value otherwise and rte_errno is set.
1863 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
1864 struct rte_eth_devargs *req_eth_da,
1865 uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist)
1867 struct ibv_device **ibv_list;
1869 * Number of found IB Devices matching with requested PCI BDF.
1870 * nd != 1 means there are multiple IB devices over the same
1871 * PCI device and we have representors and master.
1873 unsigned int nd = 0;
1875 * Number of found IB device Ports. nd = 1 and np = 1..n means
1876 * we have the single multiport IB device, and there may be
1877 * representors attached to some of found ports.
1879 unsigned int np = 0;
1881 * Number of DPDK ethernet devices to Spawn - either over
1882 * multiple IB devices or multiple ports of single IB device.
1883 * Actually this is the number of iterations to spawn.
1885 unsigned int ns = 0;
1888 * < 0 - no bonding device (single one)
1889 * >= 0 - bonding device (value is slave PF index)
1892 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
1893 struct mlx5_dev_spawn_data *list = NULL;
1894 struct rte_eth_devargs eth_da = *req_eth_da;
1895 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
1896 struct mlx5_bond_info bond_info;
1900 ibv_list = mlx5_glue->get_device_list(&ret);
1902 rte_errno = errno ? errno : ENOSYS;
1903 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
1907 * First scan the list of all Infiniband devices to find
1908 * matching ones, gathering into the list.
1910 struct ibv_device *ibv_match[ret + 1];
1911 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1912 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1916 struct rte_pci_addr pci_addr;
1918 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
1919 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
1920 nl_rdma, owner_id, &bond_info);
1923 * Bonding device detected. Only one match is allowed,
1924 * the bonding is supported over multi-port IB device,
1925 * there should be no matches on representor PCI
1926 * functions or non VF LAG bonding devices with
1927 * specified address.
1931 "multiple PCI match on bonding device"
1932 "\"%s\" found", ibv_list[ret]->name);
1937 /* Amend owner pci address if owner PF ID specified. */
1938 if (eth_da.nb_representor_ports)
1939 owner_pci.function += owner_id;
1941 "PCI information matches for slave %d bonding device \"%s\"",
1942 bd, ibv_list[ret]->name);
1943 ibv_match[nd++] = ibv_list[ret];
1946 /* Bonding device not found. */
1947 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
1950 if (owner_pci.domain != pci_addr.domain ||
1951 owner_pci.bus != pci_addr.bus ||
1952 owner_pci.devid != pci_addr.devid ||
1953 owner_pci.function != pci_addr.function)
1955 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1956 ibv_list[ret]->name);
1957 ibv_match[nd++] = ibv_list[ret];
1960 ibv_match[nd] = NULL;
1962 /* No device matches, just complain and bail out. */
1964 "No Verbs device matches PCI device " PCI_PRI_FMT ","
1965 " are kernel drivers loaded?",
1966 owner_pci.domain, owner_pci.bus,
1967 owner_pci.devid, owner_pci.function);
1974 * Found single matching device may have multiple ports.
1975 * Each port may be representor, we have to check the port
1976 * number and check the representors existence.
1979 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1982 "Cannot get IB device \"%s\" ports number.",
1983 ibv_match[0]->name);
1984 if (bd >= 0 && !np) {
1985 DRV_LOG(ERR, "Cannot get ports for bonding device.");
1991 /* Now we can determine the maximal amount of devices to be spawned. */
1992 list = mlx5_malloc(MLX5_MEM_ZERO,
1993 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
1994 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1996 DRV_LOG(ERR, "Spawn data array allocation failure.");
2001 if (bd >= 0 || np > 1) {
2003 * Single IB device with multiple ports found,
2004 * it may be E-Switch master device and representors.
2005 * We have to perform identification through the ports.
2007 MLX5_ASSERT(nl_rdma >= 0);
2008 MLX5_ASSERT(ns == 0);
2009 MLX5_ASSERT(nd == 1);
2011 for (i = 1; i <= np; ++i) {
2012 list[ns].bond_info = &bond_info;
2013 list[ns].max_port = np;
2014 list[ns].phys_port = i;
2015 list[ns].phys_dev_name = ibv_match[0]->name;
2016 list[ns].eth_dev = NULL;
2017 list[ns].pci_dev = pci_dev;
2018 list[ns].cdev = cdev;
2019 list[ns].pf_bond = bd;
2020 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2023 if (!list[ns].ifindex) {
2025 * No network interface index found for the
2026 * specified port, it means there is no
2027 * representor on this port. It's OK,
2028 * there can be disabled ports, for example
2029 * if sriov_numvfs < sriov_totalvfs.
2035 ret = mlx5_nl_switch_info(nl_route,
2038 if (ret || (!list[ns].info.representor &&
2039 !list[ns].info.master)) {
2041 * We failed to recognize representors with
2042 * Netlink, let's try to perform the task
2045 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2048 if (!ret && bd >= 0) {
2049 switch (list[ns].info.name_type) {
2050 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2053 * Force standalone bonding
2054 * device for ROCE LAG
2057 list[ns].info.master = 0;
2058 list[ns].info.representor = 0;
2060 if (list[ns].info.port_name == bd)
2063 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2065 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2067 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2068 if (list[ns].info.pf_num == bd)
2076 if (!ret && (list[ns].info.representor ^
2077 list[ns].info.master))
2082 "Unable to recognize master/representors on the IB device with multiple ports.");
2089 * The existence of several matching entries (nd > 1) means
2090 * port representors have been instantiated. No existing Verbs
2091 * call nor sysfs entries can tell them apart, this can only
2092 * be done through Netlink calls assuming kernel drivers are
2093 * recent enough to support them.
2095 * In the event of identification failure through Netlink,
2096 * try again through sysfs, then:
2098 * 1. A single IB device matches (nd == 1) with single
2099 * port (np=0/1) and is not a representor, assume
2100 * no switch support.
2102 * 2. Otherwise no safe assumptions can be made;
2103 * complain louder and bail out.
2105 for (i = 0; i != nd; ++i) {
2106 memset(&list[ns].info, 0, sizeof(list[ns].info));
2107 list[ns].bond_info = NULL;
2108 list[ns].max_port = 1;
2109 list[ns].phys_port = 1;
2110 list[ns].phys_dev_name = ibv_match[i]->name;
2111 list[ns].eth_dev = NULL;
2112 list[ns].pci_dev = pci_dev;
2113 list[ns].cdev = cdev;
2114 list[ns].pf_bond = -1;
2115 list[ns].ifindex = 0;
2117 list[ns].ifindex = mlx5_nl_ifindex
2121 if (!list[ns].ifindex) {
2122 char ifname[IF_NAMESIZE];
2125 * Netlink failed, it may happen with old
2126 * ib_core kernel driver (before 4.16).
2127 * We can assume there is old driver because
2128 * here we are processing single ports IB
2129 * devices. Let's try sysfs to retrieve
2130 * the ifindex. The method works for
2131 * master device only.
2135 * Multiple devices found, assume
2136 * representors, can not distinguish
2137 * master/representor and retrieve
2138 * ifindex via sysfs.
2142 ret = mlx5_get_ifname_sysfs
2143 (ibv_match[i]->ibdev_path, ifname);
2146 if_nametoindex(ifname);
2147 if (!list[ns].ifindex) {
2149 * No network interface index found
2150 * for the specified device, it means
2151 * there it is neither representor
2159 ret = mlx5_nl_switch_info(nl_route,
2162 if (ret || (!list[ns].info.representor &&
2163 !list[ns].info.master)) {
2165 * We failed to recognize representors with
2166 * Netlink, let's try to perform the task
2169 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2172 if (!ret && (list[ns].info.representor ^
2173 list[ns].info.master)) {
2175 } else if ((nd == 1) &&
2176 !list[ns].info.representor &&
2177 !list[ns].info.master) {
2179 * Single IB device with one physical port and
2180 * attached network device.
2181 * May be SRIOV is not enabled or there is no
2184 DRV_LOG(INFO, "No E-Switch support detected.");
2191 "Unable to recognize master/representors on the multiple IB devices.");
2197 * New kernels may add the switch_id attribute for the case
2198 * there is no E-Switch and we wrongly recognized the only
2199 * device as master. Override this if there is the single
2200 * device with single port and new device name format present.
2203 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2204 list[0].info.master = 0;
2205 list[0].info.representor = 0;
2210 * Sort list to probe devices in natural order for users convenience
2211 * (i.e. master first, then representors from lowest to highest ID).
2213 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2214 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2215 /* Set devargs default values. */
2216 if (eth_da.nb_mh_controllers == 0) {
2217 eth_da.nb_mh_controllers = 1;
2218 eth_da.mh_controllers[0] = 0;
2220 if (eth_da.nb_ports == 0 && ns > 0) {
2221 if (list[0].pf_bond >= 0 && list[0].info.representor)
2222 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2223 pci_dev->device.devargs->args);
2224 eth_da.nb_ports = 1;
2225 eth_da.ports[0] = list[0].info.pf_num;
2227 if (eth_da.nb_representor_ports == 0) {
2228 eth_da.nb_representor_ports = 1;
2229 eth_da.representor_ports[0] = 0;
2232 for (i = 0; i != ns; ++i) {
2235 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da,
2237 if (!list[i].eth_dev) {
2238 if (rte_errno != EBUSY && rte_errno != EEXIST)
2240 /* Device is disabled or already spawned. Ignore it. */
2243 restore = list[i].eth_dev->data->dev_flags;
2244 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2246 * Each representor has a dedicated interrupts vector.
2247 * rte_eth_copy_pci_info() assigns PF interrupts handle to
2248 * representor eth_dev object because representor and PF
2249 * share the same PCI address.
2250 * Override representor device with a dedicated
2251 * interrupts handle here.
2252 * Representor interrupts handle is released in mlx5_dev_stop().
2254 if (list[i].info.representor) {
2255 struct rte_intr_handle *intr_handle =
2256 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2257 if (intr_handle == NULL) {
2259 "port %u failed to allocate memory for interrupt handler "
2260 "Rx interrupts will not be supported",
2266 list[i].eth_dev->intr_handle = intr_handle;
2268 /* Restore non-PCI flags cleared by the above call. */
2269 list[i].eth_dev->data->dev_flags |= restore;
2270 rte_eth_dev_probing_finish(list[i].eth_dev);
2274 "probe of PCI device " PCI_PRI_FMT " aborted after"
2275 " encountering an error: %s",
2276 owner_pci.domain, owner_pci.bus,
2277 owner_pci.devid, owner_pci.function,
2278 strerror(rte_errno));
2282 if (!list[i].eth_dev)
2284 mlx5_dev_close(list[i].eth_dev);
2285 /* mac_addrs must not be freed because in dev_private */
2286 list[i].eth_dev->data->mac_addrs = NULL;
2287 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2289 /* Restore original error. */
2296 * Do the routine cleanup:
2297 * - close opened Netlink sockets
2298 * - free allocated spawn data array
2299 * - free the Infiniband device list
2307 MLX5_ASSERT(ibv_list);
2308 mlx5_glue->free_device_list(ibv_list);
2313 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2314 struct rte_eth_devargs *eth_da)
2318 if (dev->devargs == NULL)
2320 memset(eth_da, 0, sizeof(*eth_da));
2321 /* Parse representor information first from class argument. */
2322 if (dev->devargs->cls_str)
2323 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2325 DRV_LOG(ERR, "failed to parse device arguments: %s",
2326 dev->devargs->cls_str);
2329 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2330 /* Parse legacy device argument */
2331 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2333 DRV_LOG(ERR, "failed to parse device arguments: %s",
2334 dev->devargs->args);
2342 * Callback to register a PCI device.
2344 * This function spawns Ethernet devices out of a given PCI device.
2347 * Pointer to common mlx5 device structure.
2348 * @param[in, out] mkvlist
2349 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2352 * 0 on success, a negative errno value otherwise and rte_errno is set.
2355 mlx5_os_pci_probe(struct mlx5_common_device *cdev,
2356 struct mlx5_kvargs_ctrl *mkvlist)
2358 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2359 struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2363 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da);
2367 if (eth_da.nb_ports > 0) {
2368 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2369 for (p = 0; p < eth_da.nb_ports; p++) {
2370 ret = mlx5_os_pci_probe_pf(cdev, ð_da,
2371 eth_da.ports[p], mkvlist);
2376 DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2377 "aborted due to prodding failure of PF %u",
2378 pci_dev->addr.domain, pci_dev->addr.bus,
2379 pci_dev->addr.devid, pci_dev->addr.function,
2381 mlx5_net_remove(cdev);
2384 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist);
2389 /* Probe a single SF device on auxiliary bus, no representor support. */
2391 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev,
2392 struct mlx5_kvargs_ctrl *mkvlist)
2394 struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2395 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2396 struct rte_device *dev = cdev->dev;
2397 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2398 struct rte_eth_dev *eth_dev;
2401 /* Parse ethdev devargs. */
2402 ret = mlx5_os_parse_eth_devargs(dev, ð_da);
2405 /* Init spawn data. */
2407 spawn.phys_port = 1;
2408 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2409 ret = mlx5_auxiliary_get_ifindex(dev->name);
2411 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2414 spawn.ifindex = ret;
2417 eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist);
2418 if (eth_dev == NULL)
2421 eth_dev->intr_handle = adev->intr_handle;
2422 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2423 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2424 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2425 eth_dev->data->numa_node = dev->numa_node;
2427 rte_eth_dev_probing_finish(eth_dev);
2432 * Net class driver callback to probe a device.
2434 * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2437 * Pointer to the common mlx5 device.
2438 * @param[in, out] mkvlist
2439 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2442 * 0 on success, a negative errno value otherwise and rte_errno is set.
2445 mlx5_os_net_probe(struct mlx5_common_device *cdev,
2446 struct mlx5_kvargs_ctrl *mkvlist)
2450 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2451 mlx5_pmd_socket_init();
2452 ret = mlx5_init_once();
2454 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2455 strerror(rte_errno));
2458 ret = mlx5_probe_again_args_validate(cdev, mkvlist);
2460 DRV_LOG(ERR, "Probe again parameters are not compatible : %s",
2461 strerror(rte_errno));
2464 if (mlx5_dev_is_pci(cdev->dev))
2465 return mlx5_os_pci_probe(cdev, mkvlist);
2467 return mlx5_os_auxiliary_probe(cdev, mkvlist);
2471 * Cleanup resources when the last device is closed.
2474 mlx5_os_net_cleanup(void)
2476 mlx5_pmd_socket_uninit();
2480 * Install shared asynchronous device events handler.
2481 * This function is implemented to support event sharing
2482 * between multiple ports of single IB device.
2485 * Pointer to mlx5_dev_ctx_shared object.
2488 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2492 struct ibv_context *ctx = sh->cdev->ctx;
2494 sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2495 if (sh->intr_handle == NULL) {
2496 DRV_LOG(ERR, "Fail to allocate intr_handle");
2500 rte_intr_fd_set(sh->intr_handle, -1);
2502 flags = fcntl(ctx->async_fd, F_GETFL);
2503 ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2505 DRV_LOG(INFO, "failed to change file descriptor async event"
2508 rte_intr_fd_set(sh->intr_handle, ctx->async_fd);
2509 rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);
2510 if (rte_intr_callback_register(sh->intr_handle,
2511 mlx5_dev_interrupt_handler, sh)) {
2512 DRV_LOG(INFO, "Fail to install the shared interrupt.");
2513 rte_intr_fd_set(sh->intr_handle, -1);
2516 if (sh->cdev->config.devx) {
2517 #ifdef HAVE_IBV_DEVX_ASYNC
2518 sh->intr_handle_devx =
2519 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2520 if (!sh->intr_handle_devx) {
2521 DRV_LOG(ERR, "Fail to allocate intr_handle");
2525 rte_intr_fd_set(sh->intr_handle_devx, -1);
2526 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2527 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2529 DRV_LOG(INFO, "failed to allocate devx_comp.");
2532 flags = fcntl(devx_comp->fd, F_GETFL);
2533 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2535 DRV_LOG(INFO, "failed to change file descriptor"
2539 rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);
2540 rte_intr_type_set(sh->intr_handle_devx,
2541 RTE_INTR_HANDLE_EXT);
2542 if (rte_intr_callback_register(sh->intr_handle_devx,
2543 mlx5_dev_interrupt_handler_devx, sh)) {
2544 DRV_LOG(INFO, "Fail to install the devx shared"
2546 rte_intr_fd_set(sh->intr_handle_devx, -1);
2548 #endif /* HAVE_IBV_DEVX_ASYNC */
2553 * Uninstall shared asynchronous device events handler.
2554 * This function is implemented to support event sharing
2555 * between multiple ports of single IB device.
2558 * Pointer to mlx5_dev_ctx_shared object.
2561 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2563 if (rte_intr_fd_get(sh->intr_handle) >= 0)
2564 mlx5_intr_callback_unregister(sh->intr_handle,
2565 mlx5_dev_interrupt_handler, sh);
2566 rte_intr_instance_free(sh->intr_handle);
2567 #ifdef HAVE_IBV_DEVX_ASYNC
2568 if (rte_intr_fd_get(sh->intr_handle_devx) >= 0)
2569 rte_intr_callback_unregister(sh->intr_handle_devx,
2570 mlx5_dev_interrupt_handler_devx, sh);
2571 rte_intr_instance_free(sh->intr_handle_devx);
2573 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2578 * Read statistics by a named counter.
2581 * Pointer to the private device data structure.
2582 * @param[in] ctr_name
2583 * Pointer to the name of the statistic counter to read
2585 * Pointer to read statistic value.
2587 * 0 on success and stat is valud, 1 if failed to read the value
2592 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2598 if (priv->q_counters != NULL &&
2599 strcmp(ctr_name, "out_of_buffer") == 0)
2600 return mlx5_devx_cmd_queue_counter_query
2601 (priv->q_counters, 0, (uint32_t *)stat);
2602 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2603 priv->sh->ibdev_path,
2606 fd = open(path, O_RDONLY);
2608 * in switchdev the file location is not per port
2609 * but rather in <ibdev_path>/hw_counters/<file_name>.
2612 MKSTR(path1, "%s/hw_counters/%s",
2613 priv->sh->ibdev_path,
2615 fd = open(path1, O_RDONLY);
2618 char buf[21] = {'\0'};
2619 ssize_t n = read(fd, buf, sizeof(buf));
2623 *stat = strtoull(buf, NULL, 10);
2633 * Remove a MAC address from device
2636 * Pointer to Ethernet device structure.
2638 * MAC address index.
2641 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2643 struct mlx5_priv *priv = dev->data->dev_private;
2644 const int vf = priv->sh->dev_cap.vf;
2647 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2648 mlx5_ifindex(dev), priv->mac_own,
2649 &dev->data->mac_addrs[index], index);
2653 * Adds a MAC address to the device
2656 * Pointer to Ethernet device structure.
2658 * MAC address to register.
2660 * MAC address index.
2663 * 0 on success, a negative errno value otherwise
2666 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2669 struct mlx5_priv *priv = dev->data->dev_private;
2670 const int vf = priv->sh->dev_cap.vf;
2674 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2675 mlx5_ifindex(dev), priv->mac_own,
2681 * Modify a VF MAC address
2684 * Pointer to device private data.
2686 * MAC address to modify into.
2688 * Net device interface index
2693 * 0 on success, a negative errno value otherwise
2696 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2697 unsigned int iface_idx,
2698 struct rte_ether_addr *mac_addr,
2701 return mlx5_nl_vf_mac_addr_modify
2702 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2706 * Set device promiscuous mode
2709 * Pointer to Ethernet device structure.
2711 * 0 - promiscuous is disabled, otherwise - enabled
2714 * 0 on success, a negative error value otherwise
2717 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2719 struct mlx5_priv *priv = dev->data->dev_private;
2721 return mlx5_nl_promisc(priv->nl_socket_route,
2722 mlx5_ifindex(dev), !!enable);
2726 * Set device promiscuous mode
2729 * Pointer to Ethernet device structure.
2731 * 0 - all multicase is disabled, otherwise - enabled
2734 * 0 on success, a negative error value otherwise
2737 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2739 struct mlx5_priv *priv = dev->data->dev_private;
2741 return mlx5_nl_allmulti(priv->nl_socket_route,
2742 mlx5_ifindex(dev), !!enable);
2746 * Flush device MAC addresses
2749 * Pointer to Ethernet device structure.
2753 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2755 struct mlx5_priv *priv = dev->data->dev_private;
2757 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2758 dev->data->mac_addrs,
2759 MLX5_MAX_MAC_ADDRESSES, priv->mac_own);