drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /* rte flow indexed pool configuration. */
  71 static struct mlx5_indexed_pool_config icfg[] = {
  72         {
  73                 .size = sizeof(struct rte_flow),
  74                 .trunk_size = 64,
  75                 .need_lock = 1,
  76                 .release_mem_en = 0,
  77                 .malloc = mlx5_malloc,
  78                 .free = mlx5_free,
  79                 .per_core_cache = 0,
  80                 .type = "ctl_flow_ipool",
  81         },
  82         {
  83                 .size = sizeof(struct rte_flow),
  84                 .trunk_size = 64,
  85                 .grow_trunk = 3,
  86                 .grow_shift = 2,
  87                 .need_lock = 1,
  88                 .release_mem_en = 0,
  89                 .malloc = mlx5_malloc,
  90                 .free = mlx5_free,
  91                 .per_core_cache = 1 << 14,
  92                 .type = "rte_flow_ipool",
  93         },
  94         {
  95                 .size = sizeof(struct rte_flow),
  96                 .trunk_size = 64,
  97                 .grow_trunk = 3,
  98                 .grow_shift = 2,
  99                 .need_lock = 1,
 100                 .release_mem_en = 0,
 101                 .malloc = mlx5_malloc,
 102                 .free = mlx5_free,
 103                 .per_core_cache = 0,
 104                 .type = "mcp_flow_ipool",
 105         },
 106 };
 107
 108 /**
 109  * Set the completion channel file descriptor interrupt as non-blocking.
 110  *
 111  * @param[in] rxq_obj
 112  *   Pointer to RQ channel object, which includes the channel fd
 113  *
 114  * @param[out] fd
 115  *   The file descriptor (representing the interrupt) used in this channel.
 116  *
 117  * @return
 118  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 119  */
 120 int
 121 mlx5_os_set_nonblock_channel_fd(int fd)
 122 {
 123         int flags;
 124
 125         flags = fcntl(fd, F_GETFL);
 126         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 127 }
 128
 129 /**
 130  * Get mlx5 device attributes. The glue function query_device_ex() is called
 131  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 132  * device attributes from the glue out parameter.
 133  *
 134  * @param cdev
 135  *   Pointer to mlx5 device.
 136  *
 137  * @param device_attr
 138  *   Pointer to mlx5 device attributes.
 139  *
 140  * @return
 141  *   0 on success, a negative errno value otherwise and rte_errno is set.
 142  */
 143 int
 144 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
 145                      struct mlx5_dev_attr *device_attr)
 146 {
 147         int err;
 148         struct ibv_context *ctx = cdev->ctx;
 149         struct ibv_device_attr_ex attr_ex;
 150
 151         memset(device_attr, 0, sizeof(*device_attr));
 152         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 153         if (err) {
 154                 rte_errno = errno;
 155                 return -rte_errno;
 156         }
 157         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 158         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 159         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 160         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 161         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 162         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 163         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 164         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 165         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 166         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 167         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 168         device_attr->max_rwq_indirection_table_size =
 169                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 170         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 171         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 172
 173         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 174         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 175         if (err) {
 176                 rte_errno = errno;
 177                 return -rte_errno;
 178         }
 179
 180         device_attr->flags = dv_attr.flags;
 181         device_attr->comp_mask = dv_attr.comp_mask;
 182 #ifdef HAVE_IBV_MLX5_MOD_SWP
 183         device_attr->sw_parsing_offloads =
 184                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 185 #endif
 186         device_attr->min_single_stride_log_num_of_bytes =
 187                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 188         device_attr->max_single_stride_log_num_of_bytes =
 189                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 190         device_attr->min_single_wqe_log_num_of_strides =
 191                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 192         device_attr->max_single_wqe_log_num_of_strides =
 193                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 194         device_attr->stride_supported_qpts =
 195                 dv_attr.striding_rq_caps.supported_qpts;
 196 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 197         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 198 #endif
 199         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 200                 sizeof(device_attr->fw_ver));
 201
 202         return 0;
 203 }
 204
 205 /**
 206  * Detect misc5 support or not
 207  *
 208  * @param[in] priv
 209  *   Device private data pointer
 210  */
 211 #ifdef HAVE_MLX5DV_DR
 212 static void
 213 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 214 {
 215 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 216         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 217          * Case: IPv4--->UDP--->VxLAN--->vni
 218          */
 219         void *tbl;
 220         struct mlx5_flow_dv_match_params matcher_mask;
 221         void *match_m;
 222         void *matcher;
 223         void *headers_m;
 224         void *misc5_m;
 225         uint32_t *tunnel_header_m;
 226         struct mlx5dv_flow_matcher_attr dv_attr;
 227
 228         memset(&matcher_mask, 0, sizeof(matcher_mask));
 229         matcher_mask.size = sizeof(matcher_mask.buf);
 230         match_m = matcher_mask.buf;
 231         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 232         misc5_m = MLX5_ADDR_OF(fte_match_param,
 233                                match_m, misc_parameters_5);
 234         tunnel_header_m = (uint32_t *)
 235                                 MLX5_ADDR_OF(fte_match_set_misc5,
 236                                 misc5_m, tunnel_header_1);
 237         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 238         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 239         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 240         *tunnel_header_m = 0xffffff;
 241
 242         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 243         if (!tbl) {
 244                 DRV_LOG(INFO, "No SW steering support");
 245                 return;
 246         }
 247         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 248         dv_attr.match_mask = (void *)&matcher_mask,
 249         dv_attr.match_criteria_enable =
 250                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 251                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 252         dv_attr.priority = 3;
 253 #ifdef HAVE_MLX5DV_DR_ESWITCH
 254         void *misc2_m;
 255         if (priv->config.dv_esw_en) {
 256                 /* FDB enabled reg_c_0 */
 257                 dv_attr.match_criteria_enable |=
 258                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 259                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 260                                        match_m, misc_parameters_2);
 261                 MLX5_SET(fte_match_set_misc2, misc2_m,
 262                          metadata_reg_c_0, 0xffff);
 263         }
 264 #endif
 265         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 266                                                     &dv_attr, tbl);
 267         if (matcher) {
 268                 priv->sh->misc5_cap = 1;
 269                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 270         }
 271         mlx5_glue->dr_destroy_flow_tbl(tbl);
 272 #else
 273         RTE_SET_USED(priv);
 274 #endif
 275 }
 276 #endif
 277
 278 /**
 279  * Initialize DR related data within private structure.
 280  * Routine checks the reference counter and does actual
 281  * resources creation/initialization only if counter is zero.
 282  *
 283  * @param[in] priv
 284  *   Pointer to the private device data structure.
 285  *
 286  * @return
 287  *   Zero on success, positive error code otherwise.
 288  */
 289 static int
 290 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 291 {
 292         struct mlx5_dev_ctx_shared *sh = priv->sh;
 293         char s[MLX5_NAME_SIZE] __rte_unused;
 294         int err;
 295
 296         MLX5_ASSERT(sh && sh->refcnt);
 297         if (sh->refcnt > 1)
 298                 return 0;
 299         err = mlx5_alloc_table_hash_list(priv);
 300         if (err)
 301                 goto error;
 302         /* The resources below are only valid with DV support. */
 303 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 304         /* Init port id action list. */
 305         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 306         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 307                                                    flow_dv_port_id_create_cb,
 308                                                    flow_dv_port_id_match_cb,
 309                                                    flow_dv_port_id_remove_cb,
 310                                                    flow_dv_port_id_clone_cb,
 311                                                  flow_dv_port_id_clone_free_cb);
 312         if (!sh->port_id_action_list)
 313                 goto error;
 314         /* Init push vlan action list. */
 315         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 316         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 317                                                     flow_dv_push_vlan_create_cb,
 318                                                     flow_dv_push_vlan_match_cb,
 319                                                     flow_dv_push_vlan_remove_cb,
 320                                                     flow_dv_push_vlan_clone_cb,
 321                                                flow_dv_push_vlan_clone_free_cb);
 322         if (!sh->push_vlan_action_list)
 323                 goto error;
 324         /* Init sample action list. */
 325         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 326         sh->sample_action_list = mlx5_list_create(s, sh, true,
 327                                                   flow_dv_sample_create_cb,
 328                                                   flow_dv_sample_match_cb,
 329                                                   flow_dv_sample_remove_cb,
 330                                                   flow_dv_sample_clone_cb,
 331                                                   flow_dv_sample_clone_free_cb);
 332         if (!sh->sample_action_list)
 333                 goto error;
 334         /* Init dest array action list. */
 335         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 336         sh->dest_array_list = mlx5_list_create(s, sh, true,
 337                                                flow_dv_dest_array_create_cb,
 338                                                flow_dv_dest_array_match_cb,
 339                                                flow_dv_dest_array_remove_cb,
 340                                                flow_dv_dest_array_clone_cb,
 341                                               flow_dv_dest_array_clone_free_cb);
 342         if (!sh->dest_array_list)
 343                 goto error;
 344         /* Init shared flex parsers list, no need lcore_share */
 345         snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
 346         sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
 347                                                mlx5_flex_parser_create_cb,
 348                                                mlx5_flex_parser_match_cb,
 349                                                mlx5_flex_parser_remove_cb,
 350                                                mlx5_flex_parser_clone_cb,
 351                                                mlx5_flex_parser_clone_free_cb);
 352         if (!sh->flex_parsers_dv)
 353                 goto error;
 354 #endif
 355 #ifdef HAVE_MLX5DV_DR
 356         void *domain;
 357
 358         /* Reference counter is zero, we should initialize structures. */
 359         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 360                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 361         if (!domain) {
 362                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 363                 err = errno;
 364                 goto error;
 365         }
 366         sh->rx_domain = domain;
 367         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 368                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 369         if (!domain) {
 370                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 371                 err = errno;
 372                 goto error;
 373         }
 374         sh->tx_domain = domain;
 375 #ifdef HAVE_MLX5DV_DR_ESWITCH
 376         if (priv->config.dv_esw_en) {
 377                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 378                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 379                 if (!domain) {
 380                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 381                         err = errno;
 382                         goto error;
 383                 }
 384                 sh->fdb_domain = domain;
 385         }
 386         /*
 387          * The drop action is just some dummy placeholder in rdma-core. It
 388          * does not belong to domains and has no any attributes, and, can be
 389          * shared by the entire device.
 390          */
 391         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 392         if (!sh->dr_drop_action) {
 393                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 394                 err = errno;
 395                 goto error;
 396         }
 397 #endif
 398         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 399                 err = mlx5_alloc_tunnel_hub(sh);
 400         if (err) {
 401                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 402                 goto error;
 403         }
 404         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 405                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 406                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 407                 if (sh->fdb_domain)
 408                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 409         }
 410         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 411         if (!priv->config.allow_duplicate_pattern) {
 412 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 413                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 414 #endif
 415                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 416                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 417                 if (sh->fdb_domain)
 418                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 419         }
 420
 421         __mlx5_discovery_misc5_cap(priv);
 422 #endif /* HAVE_MLX5DV_DR */
 423         sh->default_miss_action =
 424                         mlx5_glue->dr_create_flow_action_default_miss();
 425         if (!sh->default_miss_action)
 426                 DRV_LOG(WARNING, "Default miss action is not supported.");
 427         LIST_INIT(&sh->shared_rxqs);
 428         return 0;
 429 error:
 430         /* Rollback the created objects. */
 431         if (sh->rx_domain) {
 432                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 433                 sh->rx_domain = NULL;
 434         }
 435         if (sh->tx_domain) {
 436                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 437                 sh->tx_domain = NULL;
 438         }
 439         if (sh->fdb_domain) {
 440                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 441                 sh->fdb_domain = NULL;
 442         }
 443         if (sh->dr_drop_action) {
 444                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 445                 sh->dr_drop_action = NULL;
 446         }
 447         if (sh->pop_vlan_action) {
 448                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 449                 sh->pop_vlan_action = NULL;
 450         }
 451         if (sh->encaps_decaps) {
 452                 mlx5_hlist_destroy(sh->encaps_decaps);
 453                 sh->encaps_decaps = NULL;
 454         }
 455         if (sh->modify_cmds) {
 456                 mlx5_hlist_destroy(sh->modify_cmds);
 457                 sh->modify_cmds = NULL;
 458         }
 459         if (sh->tag_table) {
 460                 /* tags should be destroyed with flow before. */
 461                 mlx5_hlist_destroy(sh->tag_table);
 462                 sh->tag_table = NULL;
 463         }
 464         if (sh->tunnel_hub) {
 465                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 466                 sh->tunnel_hub = NULL;
 467         }
 468         mlx5_free_table_hash_list(priv);
 469         if (sh->port_id_action_list) {
 470                 mlx5_list_destroy(sh->port_id_action_list);
 471                 sh->port_id_action_list = NULL;
 472         }
 473         if (sh->push_vlan_action_list) {
 474                 mlx5_list_destroy(sh->push_vlan_action_list);
 475                 sh->push_vlan_action_list = NULL;
 476         }
 477         if (sh->sample_action_list) {
 478                 mlx5_list_destroy(sh->sample_action_list);
 479                 sh->sample_action_list = NULL;
 480         }
 481         if (sh->dest_array_list) {
 482                 mlx5_list_destroy(sh->dest_array_list);
 483                 sh->dest_array_list = NULL;
 484         }
 485         return err;
 486 }
 487
 488 /**
 489  * Destroy DR related data within private structure.
 490  *
 491  * @param[in] priv
 492  *   Pointer to the private device data structure.
 493  */
 494 void
 495 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 496 {
 497         struct mlx5_dev_ctx_shared *sh = priv->sh;
 498
 499         MLX5_ASSERT(sh && sh->refcnt);
 500         if (sh->refcnt > 1)
 501                 return;
 502         MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
 503 #ifdef HAVE_MLX5DV_DR
 504         if (sh->rx_domain) {
 505                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 506                 sh->rx_domain = NULL;
 507         }
 508         if (sh->tx_domain) {
 509                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 510                 sh->tx_domain = NULL;
 511         }
 512 #ifdef HAVE_MLX5DV_DR_ESWITCH
 513         if (sh->fdb_domain) {
 514                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 515                 sh->fdb_domain = NULL;
 516         }
 517         if (sh->dr_drop_action) {
 518                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 519                 sh->dr_drop_action = NULL;
 520         }
 521 #endif
 522         if (sh->pop_vlan_action) {
 523                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 524                 sh->pop_vlan_action = NULL;
 525         }
 526 #endif /* HAVE_MLX5DV_DR */
 527         if (sh->default_miss_action)
 528                 mlx5_glue->destroy_flow_action
 529                                 (sh->default_miss_action);
 530         if (sh->encaps_decaps) {
 531                 mlx5_hlist_destroy(sh->encaps_decaps);
 532                 sh->encaps_decaps = NULL;
 533         }
 534         if (sh->modify_cmds) {
 535                 mlx5_hlist_destroy(sh->modify_cmds);
 536                 sh->modify_cmds = NULL;
 537         }
 538         if (sh->tag_table) {
 539                 /* tags should be destroyed with flow before. */
 540                 mlx5_hlist_destroy(sh->tag_table);
 541                 sh->tag_table = NULL;
 542         }
 543         if (sh->tunnel_hub) {
 544                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 545                 sh->tunnel_hub = NULL;
 546         }
 547         mlx5_free_table_hash_list(priv);
 548         if (sh->port_id_action_list) {
 549                 mlx5_list_destroy(sh->port_id_action_list);
 550                 sh->port_id_action_list = NULL;
 551         }
 552         if (sh->push_vlan_action_list) {
 553                 mlx5_list_destroy(sh->push_vlan_action_list);
 554                 sh->push_vlan_action_list = NULL;
 555         }
 556         if (sh->sample_action_list) {
 557                 mlx5_list_destroy(sh->sample_action_list);
 558                 sh->sample_action_list = NULL;
 559         }
 560         if (sh->dest_array_list) {
 561                 mlx5_list_destroy(sh->dest_array_list);
 562                 sh->dest_array_list = NULL;
 563         }
 564 }
 565
 566 /**
 567  * Initialize shared data between primary and secondary process.
 568  *
 569  * A memzone is reserved by primary process and secondary processes attach to
 570  * the memzone.
 571  *
 572  * @return
 573  *   0 on success, a negative errno value otherwise and rte_errno is set.
 574  */
 575 static int
 576 mlx5_init_shared_data(void)
 577 {
 578         const struct rte_memzone *mz;
 579         int ret = 0;
 580
 581         rte_spinlock_lock(&mlx5_shared_data_lock);
 582         if (mlx5_shared_data == NULL) {
 583                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 584                         /* Allocate shared memory. */
 585                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 586                                                  sizeof(*mlx5_shared_data),
 587                                                  SOCKET_ID_ANY, 0);
 588                         if (mz == NULL) {
 589                                 DRV_LOG(ERR,
 590                                         "Cannot allocate mlx5 shared data");
 591                                 ret = -rte_errno;
 592                                 goto error;
 593                         }
 594                         mlx5_shared_data = mz->addr;
 595                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 596                         rte_spinlock_init(&mlx5_shared_data->lock);
 597                 } else {
 598                         /* Lookup allocated shared memory. */
 599                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 600                         if (mz == NULL) {
 601                                 DRV_LOG(ERR,
 602                                         "Cannot attach mlx5 shared data");
 603                                 ret = -rte_errno;
 604                                 goto error;
 605                         }
 606                         mlx5_shared_data = mz->addr;
 607                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 608                 }
 609         }
 610 error:
 611         rte_spinlock_unlock(&mlx5_shared_data_lock);
 612         return ret;
 613 }
 614
 615 /**
 616  * PMD global initialization.
 617  *
 618  * Independent from individual device, this function initializes global
 619  * per-PMD data structures distinguishing primary and secondary processes.
 620  * Hence, each initialization is called once per a process.
 621  *
 622  * @return
 623  *   0 on success, a negative errno value otherwise and rte_errno is set.
 624  */
 625 static int
 626 mlx5_init_once(void)
 627 {
 628         struct mlx5_shared_data *sd;
 629         struct mlx5_local_data *ld = &mlx5_local_data;
 630         int ret = 0;
 631
 632         if (mlx5_init_shared_data())
 633                 return -rte_errno;
 634         sd = mlx5_shared_data;
 635         MLX5_ASSERT(sd);
 636         rte_spinlock_lock(&sd->lock);
 637         switch (rte_eal_process_type()) {
 638         case RTE_PROC_PRIMARY:
 639                 if (sd->init_done)
 640                         break;
 641                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 642                                            mlx5_mp_os_primary_handle);
 643                 if (ret)
 644                         goto out;
 645                 sd->init_done = true;
 646                 break;
 647         case RTE_PROC_SECONDARY:
 648                 if (ld->init_done)
 649                         break;
 650                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 651                                              mlx5_mp_os_secondary_handle);
 652                 if (ret)
 653                         goto out;
 654                 ++sd->secondary_cnt;
 655                 ld->init_done = true;
 656                 break;
 657         default:
 658                 break;
 659         }
 660 out:
 661         rte_spinlock_unlock(&sd->lock);
 662         return ret;
 663 }
 664
 665 /**
 666  * DV flow counter mode detect and config.
 667  *
 668  * @param dev
 669  *   Pointer to rte_eth_dev structure.
 670  *
 671  */
 672 static void
 673 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 674 {
 675 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 676         struct mlx5_priv *priv = dev->data->dev_private;
 677         struct mlx5_dev_ctx_shared *sh = priv->sh;
 678         struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
 679         bool fallback;
 680
 681 #ifndef HAVE_IBV_DEVX_ASYNC
 682         fallback = true;
 683 #else
 684         fallback = false;
 685         if (!sh->devx || !priv->config.dv_flow_en ||
 686             !hca_attr->flow_counters_dump ||
 687             !(hca_attr->flow_counter_bulk_alloc_bitmap & 0x4) ||
 688             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 689                 fallback = true;
 690 #endif
 691         if (fallback)
 692                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 693                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 694                         hca_attr->flow_counters_dump,
 695                         hca_attr->flow_counter_bulk_alloc_bitmap);
 696         /* Initialize fallback mode only on the port initializes sh. */
 697         if (sh->refcnt == 1)
 698                 sh->cmng.counter_fallback = fallback;
 699         else if (fallback != sh->cmng.counter_fallback)
 700                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 701                         "with others:%d.", PORT_ID(priv), fallback);
 702 #endif
 703 }
 704
 705 /**
 706  * DR flow drop action support detect.
 707  *
 708  * @param dev
 709  *   Pointer to rte_eth_dev structure.
 710  *
 711  */
 712 static void
 713 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 714 {
 715 #ifdef HAVE_MLX5DV_DR
 716         struct mlx5_priv *priv = dev->data->dev_private;
 717
 718         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 719                 return;
 720         /**
 721          * DR supports drop action placeholder when it is supported;
 722          * otherwise, use the queue drop action.
 723          */
 724         if (!priv->sh->drop_action_check_flag) {
 725                 if (!mlx5_flow_discover_dr_action_support(dev))
 726                         priv->sh->dr_drop_action_en = 1;
 727                 priv->sh->drop_action_check_flag = 1;
 728         }
 729         if (priv->sh->dr_drop_action_en)
 730                 priv->root_drop_action = priv->sh->dr_drop_action;
 731         else
 732                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 733 #endif
 734 }
 735
 736 static void
 737 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 738 {
 739         struct mlx5_priv *priv = dev->data->dev_private;
 740         void *ctx = priv->sh->cdev->ctx;
 741
 742         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 743         if (!priv->q_counters) {
 744                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 745                 struct ibv_wq *wq;
 746
 747                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 748                         "by DevX - fall-back to use the kernel driver global "
 749                         "queue counter.", dev->data->port_id);
 750                 /* Create WQ by kernel and query its queue counter ID. */
 751                 if (cq) {
 752                         wq = mlx5_glue->create_wq(ctx,
 753                                                   &(struct ibv_wq_init_attr){
 754                                                     .wq_type = IBV_WQT_RQ,
 755                                                     .max_wr = 1,
 756                                                     .max_sge = 1,
 757                                                     .pd = priv->sh->cdev->pd,
 758                                                     .cq = cq,
 759                                                 });
 760                         if (wq) {
 761                                 /* Counter is assigned only on RDY state. */
 762                                 int ret = mlx5_glue->modify_wq(wq,
 763                                                  &(struct ibv_wq_attr){
 764                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 765                                                  .wq_state = IBV_WQS_RDY,
 766                                                 });
 767
 768                                 if (ret == 0)
 769                                         mlx5_devx_cmd_wq_query(wq,
 770                                                          &priv->counter_set_id);
 771                                 claim_zero(mlx5_glue->destroy_wq(wq));
 772                         }
 773                         claim_zero(mlx5_glue->destroy_cq(cq));
 774                 }
 775         } else {
 776                 priv->counter_set_id = priv->q_counters->id;
 777         }
 778         if (priv->counter_set_id == 0)
 779                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 780                         "available.", dev->data->port_id);
 781 }
 782
 783 /**
 784  * Check if representor spawn info match devargs.
 785  *
 786  * @param spawn
 787  *   Verbs device parameters (name, port, switch_info) to spawn.
 788  * @param eth_da
 789  *   Device devargs to probe.
 790  *
 791  * @return
 792  *   Match result.
 793  */
 794 static bool
 795 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 796                        struct rte_eth_devargs *eth_da)
 797 {
 798         struct mlx5_switch_info *switch_info = &spawn->info;
 799         unsigned int p, f;
 800         uint16_t id;
 801         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 802                                                       eth_da->type);
 803
 804         switch (eth_da->type) {
 805         case RTE_ETH_REPRESENTOR_SF:
 806                 if (!(spawn->info.port_name == -1 &&
 807                       switch_info->name_type ==
 808                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 809                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 810                         rte_errno = EBUSY;
 811                         return false;
 812                 }
 813                 break;
 814         case RTE_ETH_REPRESENTOR_VF:
 815                 /* Allows HPF representor index -1 as exception. */
 816                 if (!(spawn->info.port_name == -1 &&
 817                       switch_info->name_type ==
 818                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 819                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 820                         rte_errno = EBUSY;
 821                         return false;
 822                 }
 823                 break;
 824         case RTE_ETH_REPRESENTOR_NONE:
 825                 rte_errno = EBUSY;
 826                 return false;
 827         default:
 828                 rte_errno = ENOTSUP;
 829                 DRV_LOG(ERR, "unsupported representor type");
 830                 return false;
 831         }
 832         /* Check representor ID: */
 833         for (p = 0; p < eth_da->nb_ports; ++p) {
 834                 if (spawn->pf_bond < 0) {
 835                         /* For non-LAG mode, allow and ignore pf. */
 836                         switch_info->pf_num = eth_da->ports[p];
 837                         repr_id = mlx5_representor_id_encode(switch_info,
 838                                                              eth_da->type);
 839                 }
 840                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 841                         id = MLX5_REPRESENTOR_ID
 842                                 (eth_da->ports[p], eth_da->type,
 843                                  eth_da->representor_ports[f]);
 844                         if (repr_id == id)
 845                                 return true;
 846                 }
 847         }
 848         rte_errno = EBUSY;
 849         return false;
 850 }
 851
 852 /**
 853  * Spawn an Ethernet device from Verbs information.
 854  *
 855  * @param dpdk_dev
 856  *   Backing DPDK device.
 857  * @param spawn
 858  *   Verbs device parameters (name, port, switch_info) to spawn.
 859  * @param config
 860  *   Device configuration parameters.
 861  * @param eth_da
 862  *   Device arguments.
 863  *
 864  * @return
 865  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 866  *   is set. The following errors are defined:
 867  *
 868  *   EBUSY: device is not supposed to be spawned.
 869  *   EEXIST: device is already spawned
 870  */
 871 static struct rte_eth_dev *
 872 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 873                struct mlx5_dev_spawn_data *spawn,
 874                struct mlx5_dev_config *config,
 875                struct rte_eth_devargs *eth_da)
 876 {
 877         const struct mlx5_switch_info *switch_info = &spawn->info;
 878         struct mlx5_dev_ctx_shared *sh = NULL;
 879         struct mlx5_hca_attr *hca_attr = &spawn->cdev->config.hca_attr;
 880         struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 881         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 882         struct rte_eth_dev *eth_dev = NULL;
 883         struct mlx5_priv *priv = NULL;
 884         int err = 0;
 885         unsigned int hw_padding = 0;
 886         unsigned int mps;
 887         unsigned int mpls_en = 0;
 888         unsigned int swp = 0;
 889         unsigned int mprq = 0;
 890         struct rte_ether_addr mac;
 891         char name[RTE_ETH_NAME_MAX_LEN];
 892         int own_domain_id = 0;
 893         uint16_t port_id;
 894         struct mlx5_port_info vport_info = { .query_flags = 0 };
 895         int nl_rdma = -1;
 896         int i;
 897
 898         /* Determine if this port representor is supposed to be spawned. */
 899         if (switch_info->representor && dpdk_dev->devargs &&
 900             !mlx5_representor_match(spawn, eth_da))
 901                 return NULL;
 902         /* Build device name. */
 903         if (spawn->pf_bond < 0) {
 904                 /* Single device. */
 905                 if (!switch_info->representor)
 906                         strlcpy(name, dpdk_dev->name, sizeof(name));
 907                 else
 908                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 909                                  dpdk_dev->name,
 910                                  switch_info->name_type ==
 911                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 912                                  switch_info->port_name);
 913         } else {
 914                 /* Bonding device. */
 915                 if (!switch_info->representor) {
 916                         err = snprintf(name, sizeof(name), "%s_%s",
 917                                        dpdk_dev->name, spawn->phys_dev_name);
 918                 } else {
 919                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 920                                 dpdk_dev->name, spawn->phys_dev_name,
 921                                 switch_info->ctrl_num,
 922                                 switch_info->pf_num,
 923                                 switch_info->name_type ==
 924                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 925                                 switch_info->port_name);
 926                 }
 927         }
 928         if (err >= (int)sizeof(name))
 929                 DRV_LOG(WARNING, "device name overflow %s", name);
 930         /* check if the device is already spawned */
 931         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 932                 rte_errno = EEXIST;
 933                 return NULL;
 934         }
 935         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 936         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 937                 struct mlx5_mp_id mp_id;
 938
 939                 eth_dev = rte_eth_dev_attach_secondary(name);
 940                 if (eth_dev == NULL) {
 941                         DRV_LOG(ERR, "can not attach rte ethdev");
 942                         rte_errno = ENOMEM;
 943                         return NULL;
 944                 }
 945                 eth_dev->device = dpdk_dev;
 946                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 947                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 948                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 949                 err = mlx5_proc_priv_init(eth_dev);
 950                 if (err)
 951                         return NULL;
 952                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
 953                 /* Receive command fd from primary process */
 954                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 955                 if (err < 0)
 956                         goto err_secondary;
 957                 /* Remap UAR for Tx queues. */
 958                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 959                 if (err)
 960                         goto err_secondary;
 961                 /*
 962                  * Ethdev pointer is still required as input since
 963                  * the primary device is not accessible from the
 964                  * secondary process.
 965                  */
 966                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 967                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 968                 return eth_dev;
 969 err_secondary:
 970                 mlx5_dev_close(eth_dev);
 971                 return NULL;
 972         }
 973         /* Process parameters. */
 974         err = mlx5_args(config, dpdk_dev->devargs);
 975         if (err) {
 976                 DRV_LOG(ERR, "failed to process device arguments: %s",
 977                         strerror(rte_errno));
 978                 return NULL;
 979         }
 980         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 981         if (!sh)
 982                 return NULL;
 983         /* Update final values for devargs before check sibling config. */
 984         if (config->dv_miss_info) {
 985                 if (switch_info->master || switch_info->representor)
 986                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 987         }
 988 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
 989         if (config->dv_flow_en) {
 990                 DRV_LOG(WARNING, "DV flow is not supported.");
 991                 config->dv_flow_en = 0;
 992         }
 993 #endif
 994 #ifdef HAVE_MLX5DV_DR_ESWITCH
 995         if (!(hca_attr->eswitch_manager && config->dv_flow_en &&
 996               (switch_info->representor || switch_info->master)))
 997                 config->dv_esw_en = 0;
 998 #else
 999         config->dv_esw_en = 0;
1000 #endif
1001         if (!config->dv_esw_en &&
1002             config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1003                 DRV_LOG(WARNING,
1004                         "Metadata mode %u is not supported (no E-Switch).",
1005                         config->dv_xmeta_en);
1006                 config->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1007         }
1008         /* Check sibling device configurations. */
1009         err = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);
1010         if (err)
1011                 goto error;
1012 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1013         config->dest_tir = 1;
1014 #endif
1015 #ifdef HAVE_IBV_MLX5_MOD_SWP
1016         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1017 #endif
1018         /*
1019          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1020          * as all ConnectX-5 devices.
1021          */
1022 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1023         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1024 #endif
1025 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1026         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1027 #endif
1028         mlx5_glue->dv_query_device(sh->cdev->ctx, &dv_attr);
1029         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1030                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1031                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1032                         mps = MLX5_MPW_ENHANCED;
1033                 } else {
1034                         DRV_LOG(DEBUG, "MPW is supported");
1035                         mps = MLX5_MPW;
1036                 }
1037         } else {
1038                 DRV_LOG(DEBUG, "MPW isn't supported");
1039                 mps = MLX5_MPW_DISABLED;
1040         }
1041 #ifdef HAVE_IBV_MLX5_MOD_SWP
1042         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1043                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1044         DRV_LOG(DEBUG, "SWP support: %u", swp);
1045 #endif
1046         config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1047                 MLX5_SW_PARSING_TSO_CAP);
1048 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1049         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1050                 struct mlx5dv_striding_rq_caps mprq_caps =
1051                         dv_attr.striding_rq_caps;
1052
1053                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1054                         mprq_caps.min_single_stride_log_num_of_bytes);
1055                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1056                         mprq_caps.max_single_stride_log_num_of_bytes);
1057                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1058                         mprq_caps.min_single_wqe_log_num_of_strides);
1059                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1060                         mprq_caps.max_single_wqe_log_num_of_strides);
1061                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1062                         mprq_caps.supported_qpts);
1063                 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %d",
1064                         config->mprq.log_min_stride_wqe_size);
1065                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1066                 mprq = 1;
1067                 config->mprq.log_min_stride_size =
1068                         mprq_caps.min_single_stride_log_num_of_bytes;
1069                 config->mprq.log_max_stride_size =
1070                         mprq_caps.max_single_stride_log_num_of_bytes;
1071                 config->mprq.log_min_stride_num =
1072                         mprq_caps.min_single_wqe_log_num_of_strides;
1073                 config->mprq.log_max_stride_num =
1074                         mprq_caps.max_single_wqe_log_num_of_strides;
1075         }
1076 #endif
1077 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1078         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1079                 config->tunnel_en = dv_attr.tunnel_offloads_caps &
1080                              (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1081                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1082                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1083         }
1084         if (config->tunnel_en) {
1085                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1086                 config->tunnel_en &
1087                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1088                 config->tunnel_en &
1089                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1090                 config->tunnel_en &
1091                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1092                 );
1093         } else {
1094                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1095         }
1096 #else
1097         DRV_LOG(WARNING,
1098                 "tunnel offloading disabled due to old OFED/rdma-core version");
1099 #endif
1100 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1101         mpls_en = ((dv_attr.tunnel_offloads_caps &
1102                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1103                    (dv_attr.tunnel_offloads_caps &
1104                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1105         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1106                 mpls_en ? "" : "not ");
1107 #else
1108         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1109                 " old OFED/rdma-core version or firmware configuration");
1110 #endif
1111         config->mpls_en = mpls_en;
1112         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1113         /* Check port status. */
1114         if (spawn->phys_port <= UINT8_MAX) {
1115                 /* Legacy Verbs api only support u8 port number. */
1116                 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1117                                             &port_attr);
1118                 if (err) {
1119                         DRV_LOG(ERR, "port query failed: %s", strerror(err));
1120                         goto error;
1121                 }
1122                 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1123                         DRV_LOG(ERR, "port is not configured in Ethernet mode");
1124                         err = EINVAL;
1125                         goto error;
1126                 }
1127         } else if (nl_rdma >= 0) {
1128                 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1129                 err = mlx5_nl_port_state(nl_rdma,
1130                         spawn->phys_dev_name,
1131                         spawn->phys_port);
1132                 if (err < 0) {
1133                         DRV_LOG(INFO, "Failed to get netlink port state: %s",
1134                                 strerror(rte_errno));
1135                         err = -rte_errno;
1136                         goto error;
1137                 }
1138                 port_attr.state = (enum ibv_port_state)err;
1139         }
1140         if (port_attr.state != IBV_PORT_ACTIVE)
1141                 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1142                         mlx5_glue->port_state_str(port_attr.state),
1143                         port_attr.state);
1144         /* Allocate private eth device data. */
1145         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1146                            sizeof(*priv),
1147                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1148         if (priv == NULL) {
1149                 DRV_LOG(ERR, "priv allocation failure");
1150                 err = ENOMEM;
1151                 goto error;
1152         }
1153         priv->sh = sh;
1154         priv->dev_port = spawn->phys_port;
1155         priv->pci_dev = spawn->pci_dev;
1156         priv->mtu = RTE_ETHER_MTU;
1157         /* Some internal functions rely on Netlink sockets, open them now. */
1158         priv->nl_socket_rdma = nl_rdma;
1159         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1160         priv->representor = !!switch_info->representor;
1161         priv->master = !!switch_info->master;
1162         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1163         priv->vport_meta_tag = 0;
1164         priv->vport_meta_mask = 0;
1165         priv->pf_bond = spawn->pf_bond;
1166
1167         DRV_LOG(DEBUG,
1168                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1169                 priv->dev_port, dpdk_dev->bus->name,
1170                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1171                 priv->master, priv->representor, priv->pf_bond);
1172
1173         /*
1174          * If we have E-Switch we should determine the vport attributes.
1175          * E-Switch may use either source vport field or reg_c[0] metadata
1176          * register to match on vport index. The engaged part of metadata
1177          * register is defined by mask.
1178          */
1179         if (switch_info->representor || switch_info->master) {
1180                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1181                                                  spawn->phys_port,
1182                                                  &vport_info);
1183                 if (err) {
1184                         DRV_LOG(WARNING,
1185                                 "Cannot query devx port %d on device %s",
1186                                 spawn->phys_port, spawn->phys_dev_name);
1187                         vport_info.query_flags = 0;
1188                 }
1189         }
1190         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1191                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1192                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1193                 if (!priv->vport_meta_mask) {
1194                         DRV_LOG(ERR,
1195                                 "vport zero mask for port %d on bonding device %s",
1196                                 spawn->phys_port, spawn->phys_dev_name);
1197                         err = ENOTSUP;
1198                         goto error;
1199                 }
1200                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1201                         DRV_LOG(ERR,
1202                                 "Invalid vport tag for port %d on bonding device %s",
1203                                 spawn->phys_port, spawn->phys_dev_name);
1204                         err = ENOTSUP;
1205                         goto error;
1206                 }
1207         }
1208         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1209                 priv->vport_id = vport_info.vport_id;
1210         } else if (spawn->pf_bond >= 0 &&
1211                    (switch_info->representor || switch_info->master)) {
1212                 DRV_LOG(ERR,
1213                         "Cannot deduce vport index for port %d on bonding device %s",
1214                         spawn->phys_port, spawn->phys_dev_name);
1215                 err = ENOTSUP;
1216                 goto error;
1217         } else {
1218                 /*
1219                  * Suppose vport index in compatible way. Kernel/rdma_core
1220                  * support single E-Switch per PF configurations only and
1221                  * vport_id field contains the vport index for associated VF,
1222                  * which is deduced from representor port name.
1223                  * For example, let's have the IB device port 10, it has
1224                  * attached network device eth0, which has port name attribute
1225                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1226                  * as 3 (2+1). This assigning schema should be changed if the
1227                  * multiple E-Switch instances per PF configurations or/and PCI
1228                  * subfunctions are added.
1229                  */
1230                 priv->vport_id = switch_info->representor ?
1231                                  switch_info->port_name + 1 : -1;
1232         }
1233         priv->representor_id = mlx5_representor_id_encode(switch_info,
1234                                                           eth_da->type);
1235         /*
1236          * Look for sibling devices in order to reuse their switch domain
1237          * if any, otherwise allocate one.
1238          */
1239         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1240                 const struct mlx5_priv *opriv =
1241                         rte_eth_devices[port_id].data->dev_private;
1242
1243                 if (!opriv ||
1244                     opriv->sh != priv->sh ||
1245                         opriv->domain_id ==
1246                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1247                         continue;
1248                 priv->domain_id = opriv->domain_id;
1249                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1250                         priv->dev_port, priv->domain_id);
1251                 break;
1252         }
1253         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1254                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1255                 if (err) {
1256                         err = rte_errno;
1257                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1258                                 strerror(rte_errno));
1259                         goto error;
1260                 }
1261                 own_domain_id = 1;
1262                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1263                         priv->dev_port, priv->domain_id);
1264         }
1265         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1266                             IBV_DEVICE_RAW_IP_CSUM);
1267         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1268                 (config->hw_csum ? "" : "not "));
1269 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1270         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1271         DRV_LOG(DEBUG, "counters are not supported");
1272 #endif
1273         config->ind_table_max_size =
1274                 sh->device_attr.max_rwq_indirection_table_size;
1275         /*
1276          * Remove this check once DPDK supports larger/variable
1277          * indirection tables.
1278          */
1279         if (config->ind_table_max_size > (unsigned int)RTE_ETH_RSS_RETA_SIZE_512)
1280                 config->ind_table_max_size = RTE_ETH_RSS_RETA_SIZE_512;
1281         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1282                 config->ind_table_max_size);
1283         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1284                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1285         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1286                 (config->hw_vlan_strip ? "" : "not "));
1287         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1288                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1289 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1290         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1291 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1292         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1293                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1294 #endif
1295         if (config->hw_padding && !hw_padding) {
1296                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1297                 config->hw_padding = 0;
1298         } else if (config->hw_padding) {
1299                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1300         }
1301         config->tso = (sh->device_attr.max_tso > 0 &&
1302                       (sh->device_attr.tso_supported_qpts &
1303                        (1 << IBV_QPT_RAW_PACKET)));
1304         if (config->tso)
1305                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1306         /*
1307          * MPW is disabled by default, while the Enhanced MPW is enabled
1308          * by default.
1309          */
1310         if (config->mps == MLX5_ARG_UNSET)
1311                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1312                                                           MLX5_MPW_DISABLED;
1313         else
1314                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1315         DRV_LOG(INFO, "%sMPS is %s",
1316                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1317                 config->mps == MLX5_MPW ? "legacy " : "",
1318                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1319         if (sh->devx) {
1320                 sh->steering_format_version = hca_attr->steering_format_version;
1321                 /* Check for LRO support. */
1322                 if (config->dest_tir && hca_attr->lro_cap &&
1323                     config->dv_flow_en) {
1324                         /* TBD check tunnel lro caps. */
1325                         config->lro.supported = hca_attr->lro_cap;
1326                         DRV_LOG(DEBUG, "Device supports LRO");
1327                         /*
1328                          * If LRO timeout is not configured by application,
1329                          * use the minimal supported value.
1330                          */
1331                         if (!config->lro.timeout)
1332                                 config->lro.timeout =
1333                                        hca_attr->lro_timer_supported_periods[0];
1334                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1335                                 config->lro.timeout);
1336                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1337                                 "required for coalescing is %d bytes",
1338                                 hca_attr->lro_min_mss_size);
1339                 }
1340 #if defined(HAVE_MLX5DV_DR) && \
1341         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1342          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1343                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1344                     config->dv_flow_en) {
1345                         uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
1346                         /*
1347                          * Meter needs two REG_C's for color match and pre-sfx
1348                          * flow match. Here get the REG_C for color match.
1349                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1350                          */
1351                         reg_c_mask &= 0xfc;
1352                         if (__builtin_popcount(reg_c_mask) < 1) {
1353                                 priv->mtr_en = 0;
1354                                 DRV_LOG(WARNING, "No available register for"
1355                                         " meter.");
1356                         } else {
1357                                 /*
1358                                  * The meter color register is used by the
1359                                  * flow-hit feature as well.
1360                                  * The flow-hit feature must use REG_C_3
1361                                  * Prefer REG_C_3 if it is available.
1362                                  */
1363                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1364                                         priv->mtr_color_reg = REG_C_3;
1365                                 else
1366                                         priv->mtr_color_reg = ffs(reg_c_mask)
1367                                                               - 1 + REG_C_0;
1368                                 priv->mtr_en = 1;
1369                                 priv->mtr_reg_share = hca_attr->qos.flow_meter;
1370                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1371                                         priv->mtr_color_reg);
1372                         }
1373                 }
1374                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
1375                         uint32_t log_obj_size =
1376                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1377                         if (log_obj_size >=
1378                             hca_attr->qos.log_meter_aso_granularity &&
1379                             log_obj_size <=
1380                             hca_attr->qos.log_meter_aso_max_alloc)
1381                                 sh->meter_aso_en = 1;
1382                 }
1383                 if (priv->mtr_en) {
1384                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1385                         if (err) {
1386                                 err = -err;
1387                                 goto error;
1388                         }
1389                 }
1390                 if (hca_attr->flow.tunnel_header_0_1)
1391                         sh->tunnel_header_0_1 = 1;
1392 #endif
1393 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1394                 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) {
1395                         sh->flow_hit_aso_en = 1;
1396                         err = mlx5_flow_aso_age_mng_init(sh);
1397                         if (err) {
1398                                 err = -err;
1399                                 goto error;
1400                         }
1401                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1402                 }
1403 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1404 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1405         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1406                 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) {
1407                         err = mlx5_flow_aso_ct_mng_init(sh);
1408                         if (err) {
1409                                 err = -err;
1410                                 goto error;
1411                         }
1412                         DRV_LOG(DEBUG, "CT ASO is supported.");
1413                         sh->ct_aso_en = 1;
1414                 }
1415 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1416 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1417                 if (hca_attr->log_max_ft_sampler_num > 0  &&
1418                     config->dv_flow_en) {
1419                         priv->sampler_en = 1;
1420                         DRV_LOG(DEBUG, "Sampler enabled!");
1421                 } else {
1422                         priv->sampler_en = 0;
1423                         if (!hca_attr->log_max_ft_sampler_num)
1424                                 DRV_LOG(WARNING,
1425                                         "No available register for sampler.");
1426                         else
1427                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1428                 }
1429 #endif
1430         }
1431         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1432             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1433                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1434                 config->cqe_comp = 0;
1435         }
1436         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1437             (!sh->devx || !hca_attr->mini_cqe_resp_flow_tag)) {
1438                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1439                                  " format isn't supported.");
1440                 config->cqe_comp = 0;
1441         }
1442         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1443             (!sh->devx || !hca_attr->mini_cqe_resp_l3_l4_tag)) {
1444                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1445                                  " format isn't supported.");
1446                 config->cqe_comp = 0;
1447         }
1448         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1449                         config->cqe_comp ? "" : "not ");
1450         if (config->tx_pp) {
1451                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1452                         hca_attr->dev_freq_khz);
1453                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1454                         hca_attr->qos.packet_pacing ? "" : "not ");
1455                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1456                         hca_attr->cross_channel ? "" : "not ");
1457                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1458                         hca_attr->wqe_index_ignore ? "" : "not ");
1459                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1460                         hca_attr->non_wire_sq ? "" : "not ");
1461                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1462                         hca_attr->log_max_static_sq_wq ? "" : "not ",
1463                         hca_attr->log_max_static_sq_wq);
1464                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1465                         hca_attr->qos.wqe_rate_pp ? "" : "not ");
1466                 if (!sh->devx) {
1467                         DRV_LOG(ERR, "DevX is required for packet pacing");
1468                         err = ENODEV;
1469                         goto error;
1470                 }
1471                 if (!hca_attr->qos.packet_pacing) {
1472                         DRV_LOG(ERR, "Packet pacing is not supported");
1473                         err = ENODEV;
1474                         goto error;
1475                 }
1476                 if (!hca_attr->cross_channel) {
1477                         DRV_LOG(ERR, "Cross channel operations are"
1478                                      " required for packet pacing");
1479                         err = ENODEV;
1480                         goto error;
1481                 }
1482                 if (!hca_attr->wqe_index_ignore) {
1483                         DRV_LOG(ERR, "WQE index ignore feature is"
1484                                      " required for packet pacing");
1485                         err = ENODEV;
1486                         goto error;
1487                 }
1488                 if (!hca_attr->non_wire_sq) {
1489                         DRV_LOG(ERR, "Non-wire SQ feature is"
1490                                      " required for packet pacing");
1491                         err = ENODEV;
1492                         goto error;
1493                 }
1494                 if (!hca_attr->log_max_static_sq_wq) {
1495                         DRV_LOG(ERR, "Static WQE SQ feature is"
1496                                      " required for packet pacing");
1497                         err = ENODEV;
1498                         goto error;
1499                 }
1500                 if (!hca_attr->qos.wqe_rate_pp) {
1501                         DRV_LOG(ERR, "WQE rate mode is required"
1502                                      " for packet pacing");
1503                         err = ENODEV;
1504                         goto error;
1505                 }
1506 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1507                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1508                              " can't create queues for packet pacing");
1509                 err = ENODEV;
1510                 goto error;
1511 #endif
1512         }
1513         if (config->std_delay_drop || config->hp_delay_drop) {
1514                 if (!hca_attr->rq_delay_drop) {
1515                         config->std_delay_drop = 0;
1516                         config->hp_delay_drop = 0;
1517                         DRV_LOG(WARNING,
1518                                 "dev_port-%u: Rxq delay drop is not supported",
1519                                 priv->dev_port);
1520                 }
1521         }
1522         if (sh->devx) {
1523                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1524
1525                 err = hca_attr->access_register_user ?
1526                         mlx5_devx_cmd_register_read
1527                                 (sh->cdev->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1528                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1529                 if (!err) {
1530                         uint32_t ts_mode;
1531
1532                         /* MTUTC register is read successfully. */
1533                         ts_mode = MLX5_GET(register_mtutc, reg,
1534                                            time_stamp_mode);
1535                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1536                                 config->rt_timestamp = 1;
1537                 } else {
1538                         /* Kernel does not support register reading. */
1539                         if (hca_attr->dev_freq_khz == (NS_PER_S / MS_PER_S))
1540                                 config->rt_timestamp = 1;
1541                 }
1542         }
1543         /*
1544          * If HW has bug working with tunnel packet decapsulation and
1545          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1546          * bit. Then RTE_ETH_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1547          */
1548         if (hca_attr->scatter_fcs_w_decap_disable && config->decap_en)
1549                 config->hw_fcs_strip = 0;
1550         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1551                 (config->hw_fcs_strip ? "" : "not "));
1552         if (config->mprq.enabled && !mprq) {
1553                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1554                 config->mprq.enabled = 0;
1555         }
1556         if (config->max_dump_files_num == 0)
1557                 config->max_dump_files_num = 128;
1558         eth_dev = rte_eth_dev_allocate(name);
1559         if (eth_dev == NULL) {
1560                 DRV_LOG(ERR, "can not allocate rte ethdev");
1561                 err = ENOMEM;
1562                 goto error;
1563         }
1564         if (priv->representor) {
1565                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1566                 eth_dev->data->representor_id = priv->representor_id;
1567                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1568                         struct mlx5_priv *opriv =
1569                                 rte_eth_devices[port_id].data->dev_private;
1570                         if (opriv &&
1571                             opriv->master &&
1572                             opriv->domain_id == priv->domain_id &&
1573                             opriv->sh == priv->sh) {
1574                                 eth_dev->data->backer_port_id = port_id;
1575                                 break;
1576                         }
1577                 }
1578                 if (port_id >= RTE_MAX_ETHPORTS)
1579                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1580         }
1581         priv->mp_id.port_id = eth_dev->data->port_id;
1582         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1583         /*
1584          * Store associated network device interface index. This index
1585          * is permanent throughout the lifetime of device. So, we may store
1586          * the ifindex here and use the cached value further.
1587          */
1588         MLX5_ASSERT(spawn->ifindex);
1589         priv->if_index = spawn->ifindex;
1590         priv->lag_affinity_idx = sh->refcnt - 1;
1591         eth_dev->data->dev_private = priv;
1592         priv->dev_data = eth_dev->data;
1593         eth_dev->data->mac_addrs = priv->mac;
1594         eth_dev->device = dpdk_dev;
1595         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1596         /* Configure the first MAC address by default. */
1597         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1598                 DRV_LOG(ERR,
1599                         "port %u cannot get MAC address, is mlx5_en"
1600                         " loaded? (errno: %s)",
1601                         eth_dev->data->port_id, strerror(rte_errno));
1602                 err = ENODEV;
1603                 goto error;
1604         }
1605         DRV_LOG(INFO,
1606                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1607                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1608 #ifdef RTE_LIBRTE_MLX5_DEBUG
1609         {
1610                 char ifname[MLX5_NAMESIZE];
1611
1612                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1613                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1614                                 eth_dev->data->port_id, ifname);
1615                 else
1616                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1617                                 eth_dev->data->port_id);
1618         }
1619 #endif
1620         /* Get actual MTU if possible. */
1621         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1622         if (err) {
1623                 err = rte_errno;
1624                 goto error;
1625         }
1626         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1627                 priv->mtu);
1628         /* Initialize burst functions to prevent crashes before link-up. */
1629         eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1630         eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1631         eth_dev->dev_ops = &mlx5_dev_ops;
1632         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1633         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1634         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1635         /* Register MAC address. */
1636         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1637         if (config->vf && config->vf_nl_en)
1638                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1639                                       mlx5_ifindex(eth_dev),
1640                                       eth_dev->data->mac_addrs,
1641                                       MLX5_MAX_MAC_ADDRESSES);
1642         priv->ctrl_flows = 0;
1643         rte_spinlock_init(&priv->flow_list_lock);
1644         TAILQ_INIT(&priv->flow_meters);
1645         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1646         if (!priv->mtr_profile_tbl)
1647                 goto error;
1648         /* Bring Ethernet device up. */
1649         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1650                 eth_dev->data->port_id);
1651         mlx5_set_link_up(eth_dev);
1652         /*
1653          * Even though the interrupt handler is not installed yet,
1654          * interrupts will still trigger on the async_fd from
1655          * Verbs context returned by ibv_open_device().
1656          */
1657         mlx5_link_update(eth_dev, 0);
1658         /* Detect minimal data bytes to inline. */
1659         mlx5_set_min_inline(spawn, config);
1660         /* Store device configuration on private structure. */
1661         priv->config = *config;
1662         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1663                 icfg[i].release_mem_en = !!config->reclaim_mode;
1664                 if (config->reclaim_mode)
1665                         icfg[i].per_core_cache = 0;
1666                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1667                 if (!priv->flows[i])
1668                         goto error;
1669         }
1670         /* Create context for virtual machine VLAN workaround. */
1671         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1672         if (config->dv_flow_en) {
1673                 err = mlx5_alloc_shared_dr(priv);
1674                 if (err)
1675                         goto error;
1676                 if (mlx5_flex_item_port_init(eth_dev) < 0)
1677                         goto error;
1678         }
1679         if (sh->devx && config->dv_flow_en && config->dest_tir) {
1680                 priv->obj_ops = devx_obj_ops;
1681                 mlx5_queue_counter_id_prepare(eth_dev);
1682                 priv->obj_ops.lb_dummy_queue_create =
1683                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1684                 priv->obj_ops.lb_dummy_queue_release =
1685                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1686         } else if (spawn->max_port > UINT8_MAX) {
1687                 /* Verbs can't support ports larger than 255 by design. */
1688                 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1689                 err = ENOTSUP;
1690                 goto error;
1691         } else {
1692                 priv->obj_ops = ibv_obj_ops;
1693         }
1694         if (config->tx_pp &&
1695             priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1696                 /*
1697                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1698                  * packet pacing and already checked above.
1699                  * Hence, we should only make sure the SQs will be created
1700                  * with DevX, not with Verbs.
1701                  * Verbs allocates the SQ UAR on its own and it can't be shared
1702                  * with Clock Queue UAR as required for Tx scheduling.
1703                  */
1704                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1705                 err = ENODEV;
1706                 goto error;
1707         }
1708         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1709         if (!priv->drop_queue.hrxq)
1710                 goto error;
1711         /* Port representor shares the same max priority with pf port. */
1712         if (!priv->sh->flow_priority_check_flag) {
1713                 /* Supported Verbs flow priority number detection. */
1714                 err = mlx5_flow_discover_priorities(eth_dev);
1715                 priv->sh->flow_max_priority = err;
1716                 priv->sh->flow_priority_check_flag = 1;
1717         } else {
1718                 err = priv->sh->flow_max_priority;
1719         }
1720         if (err < 0) {
1721                 err = -err;
1722                 goto error;
1723         }
1724         mlx5_set_metadata_mask(eth_dev);
1725         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1726             !priv->sh->dv_regc0_mask) {
1727                 DRV_LOG(ERR, "metadata mode %u is not supported "
1728                              "(no metadata reg_c[0] is available)",
1729                              priv->config.dv_xmeta_en);
1730                         err = ENOTSUP;
1731                         goto error;
1732         }
1733         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1734                                        mlx5_hrxq_create_cb,
1735                                        mlx5_hrxq_match_cb,
1736                                        mlx5_hrxq_remove_cb,
1737                                        mlx5_hrxq_clone_cb,
1738                                        mlx5_hrxq_clone_free_cb);
1739         if (!priv->hrxqs)
1740                 goto error;
1741         rte_rwlock_init(&priv->ind_tbls_lock);
1742         /* Query availability of metadata reg_c's. */
1743         if (!priv->sh->metadata_regc_check_flag) {
1744                 err = mlx5_flow_discover_mreg_c(eth_dev);
1745                 if (err < 0) {
1746                         err = -err;
1747                         goto error;
1748                 }
1749         }
1750         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1751                 DRV_LOG(DEBUG,
1752                         "port %u extensive metadata register is not supported",
1753                         eth_dev->data->port_id);
1754                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1755                         DRV_LOG(ERR, "metadata mode %u is not supported "
1756                                      "(no metadata registers available)",
1757                                      priv->config.dv_xmeta_en);
1758                         err = ENOTSUP;
1759                         goto error;
1760                 }
1761         }
1762         if (priv->config.dv_flow_en &&
1763             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1764             mlx5_flow_ext_mreg_supported(eth_dev) &&
1765             priv->sh->dv_regc0_mask) {
1766                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1767                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1768                                                       false, true, eth_dev,
1769                                                       flow_dv_mreg_create_cb,
1770                                                       flow_dv_mreg_match_cb,
1771                                                       flow_dv_mreg_remove_cb,
1772                                                       flow_dv_mreg_clone_cb,
1773                                                     flow_dv_mreg_clone_free_cb);
1774                 if (!priv->mreg_cp_tbl) {
1775                         err = ENOMEM;
1776                         goto error;
1777                 }
1778         }
1779         rte_spinlock_init(&priv->shared_act_sl);
1780         mlx5_flow_counter_mode_config(eth_dev);
1781         mlx5_flow_drop_action_config(eth_dev);
1782         if (priv->config.dv_flow_en)
1783                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1784         return eth_dev;
1785 error:
1786         if (priv) {
1787                 if (priv->mreg_cp_tbl)
1788                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1789                 if (priv->sh)
1790                         mlx5_os_free_shared_dr(priv);
1791                 if (priv->nl_socket_route >= 0)
1792                         close(priv->nl_socket_route);
1793                 if (priv->vmwa_context)
1794                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1795                 if (eth_dev && priv->drop_queue.hrxq)
1796                         mlx5_drop_action_destroy(eth_dev);
1797                 if (priv->mtr_profile_tbl)
1798                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1799                 if (own_domain_id)
1800                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1801                 if (priv->hrxqs)
1802                         mlx5_list_destroy(priv->hrxqs);
1803                 if (eth_dev && priv->flex_item_map)
1804                         mlx5_flex_item_port_cleanup(eth_dev);
1805                 mlx5_free(priv);
1806                 if (eth_dev != NULL)
1807                         eth_dev->data->dev_private = NULL;
1808         }
1809         if (eth_dev != NULL) {
1810                 /* mac_addrs must not be freed alone because part of
1811                  * dev_private
1812                  **/
1813                 eth_dev->data->mac_addrs = NULL;
1814                 rte_eth_dev_release_port(eth_dev);
1815         }
1816         if (sh)
1817                 mlx5_free_shared_dev_ctx(sh);
1818         if (nl_rdma >= 0)
1819                 close(nl_rdma);
1820         MLX5_ASSERT(err > 0);
1821         rte_errno = err;
1822         return NULL;
1823 }
1824
1825 /**
1826  * Comparison callback to sort device data.
1827  *
1828  * This is meant to be used with qsort().
1829  *
1830  * @param a[in]
1831  *   Pointer to pointer to first data object.
1832  * @param b[in]
1833  *   Pointer to pointer to second data object.
1834  *
1835  * @return
1836  *   0 if both objects are equal, less than 0 if the first argument is less
1837  *   than the second, greater than 0 otherwise.
1838  */
1839 static int
1840 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1841 {
1842         const struct mlx5_switch_info *si_a =
1843                 &((const struct mlx5_dev_spawn_data *)a)->info;
1844         const struct mlx5_switch_info *si_b =
1845                 &((const struct mlx5_dev_spawn_data *)b)->info;
1846         int ret;
1847
1848         /* Master device first. */
1849         ret = si_b->master - si_a->master;
1850         if (ret)
1851                 return ret;
1852         /* Then representor devices. */
1853         ret = si_b->representor - si_a->representor;
1854         if (ret)
1855                 return ret;
1856         /* Unidentified devices come last in no specific order. */
1857         if (!si_a->representor)
1858                 return 0;
1859         /* Order representors by name. */
1860         return si_a->port_name - si_b->port_name;
1861 }
1862
1863 /**
1864  * Match PCI information for possible slaves of bonding device.
1865  *
1866  * @param[in] ibdev_name
1867  *   Name of Infiniband device.
1868  * @param[in] pci_dev
1869  *   Pointer to primary PCI address structure to match.
1870  * @param[in] nl_rdma
1871  *   Netlink RDMA group socket handle.
1872  * @param[in] owner
1873  *   Representor owner PF index.
1874  * @param[out] bond_info
1875  *   Pointer to bonding information.
1876  *
1877  * @return
1878  *   negative value if no bonding device found, otherwise
1879  *   positive index of slave PF in bonding.
1880  */
1881 static int
1882 mlx5_device_bond_pci_match(const char *ibdev_name,
1883                            const struct rte_pci_addr *pci_dev,
1884                            int nl_rdma, uint16_t owner,
1885                            struct mlx5_bond_info *bond_info)
1886 {
1887         char ifname[IF_NAMESIZE + 1];
1888         unsigned int ifindex;
1889         unsigned int np, i;
1890         FILE *bond_file = NULL, *file;
1891         int pf = -1;
1892         int ret;
1893         uint8_t cur_guid[32] = {0};
1894         uint8_t guid[32] = {0};
1895
1896         /*
1897          * Try to get master device name. If something goes wrong suppose
1898          * the lack of kernel support and no bonding devices.
1899          */
1900         memset(bond_info, 0, sizeof(*bond_info));
1901         if (nl_rdma < 0)
1902                 return -1;
1903         if (!strstr(ibdev_name, "bond"))
1904                 return -1;
1905         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1906         if (!np)
1907                 return -1;
1908         if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
1909                 return -1;
1910         /*
1911          * The master device might not be on the predefined port(not on port
1912          * index 1, it is not guaranteed), we have to scan all Infiniband
1913          * device ports and find master.
1914          */
1915         for (i = 1; i <= np; ++i) {
1916                 /* Check whether Infiniband port is populated. */
1917                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1918                 if (!ifindex)
1919                         continue;
1920                 if (!if_indextoname(ifindex, ifname))
1921                         continue;
1922                 /* Try to read bonding slave names from sysfs. */
1923                 MKSTR(slaves,
1924                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1925                 bond_file = fopen(slaves, "r");
1926                 if (bond_file)
1927                         break;
1928         }
1929         if (!bond_file)
1930                 return -1;
1931         /* Use safe format to check maximal buffer length. */
1932         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1933         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1934                 char tmp_str[IF_NAMESIZE + 32];
1935                 struct rte_pci_addr pci_addr;
1936                 struct mlx5_switch_info info;
1937                 int ret;
1938
1939                 /* Process slave interface names in the loop. */
1940                 snprintf(tmp_str, sizeof(tmp_str),
1941                          "/sys/class/net/%s", ifname);
1942                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1943                         DRV_LOG(WARNING,
1944                                 "Cannot get PCI address for netdev \"%s\".",
1945                                 ifname);
1946                         continue;
1947                 }
1948                 /* Slave interface PCI address match found. */
1949                 snprintf(tmp_str, sizeof(tmp_str),
1950                          "/sys/class/net/%s/phys_port_name", ifname);
1951                 file = fopen(tmp_str, "rb");
1952                 if (!file)
1953                         break;
1954                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1955                 if (fscanf(file, "%32s", tmp_str) == 1)
1956                         mlx5_translate_port_name(tmp_str, &info);
1957                 fclose(file);
1958                 /* Only process PF ports. */
1959                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1960                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1961                         continue;
1962                 /* Check max bonding member. */
1963                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1964                         DRV_LOG(WARNING, "bonding index out of range, "
1965                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1966                                 tmp_str);
1967                         break;
1968                 }
1969                 /* Get ifindex. */
1970                 snprintf(tmp_str, sizeof(tmp_str),
1971                          "/sys/class/net/%s/ifindex", ifname);
1972                 file = fopen(tmp_str, "rb");
1973                 if (!file)
1974                         break;
1975                 ret = fscanf(file, "%u", &ifindex);
1976                 fclose(file);
1977                 if (ret != 1)
1978                         break;
1979                 /* Save bonding info. */
1980                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1981                         sizeof(bond_info->ports[0].ifname));
1982                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1983                 bond_info->ports[info.port_name].ifindex = ifindex;
1984                 bond_info->n_port++;
1985                 /*
1986                  * Under socket direct mode, bonding will use
1987                  * system_image_guid as identification.
1988                  * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
1989                  * All bonding members should have the same guid even if driver
1990                  * is using PCIe BDF.
1991                  */
1992                 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
1993                 if (ret < 0)
1994                         break;
1995                 else if (ret > 0) {
1996                         if (!memcmp(guid, cur_guid, sizeof(guid)) &&
1997                             owner == info.port_name &&
1998                             (owner != 0 || (owner == 0 &&
1999                             !rte_pci_addr_cmp(pci_dev, &pci_addr))))
2000                                 pf = info.port_name;
2001                 } else if (pci_dev->domain == pci_addr.domain &&
2002                     pci_dev->bus == pci_addr.bus &&
2003                     pci_dev->devid == pci_addr.devid &&
2004                     ((pci_dev->function == 0 &&
2005                       pci_dev->function + owner == pci_addr.function) ||
2006                      (pci_dev->function == owner &&
2007                       pci_addr.function == owner)))
2008                         pf = info.port_name;
2009         }
2010         if (pf >= 0) {
2011                 /* Get bond interface info */
2012                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2013                                            bond_info->ifname);
2014                 if (ret)
2015                         DRV_LOG(ERR, "unable to get bond info: %s",
2016                                 strerror(rte_errno));
2017                 else
2018                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2019                                 ifindex, bond_info->ifindex, bond_info->ifname);
2020         }
2021         if (owner == 0 && pf != 0) {
2022                 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner",
2023                                 pci_dev->domain, pci_dev->bus, pci_dev->devid,
2024                                 pci_dev->function);
2025         }
2026         return pf;
2027 }
2028
2029 static void
2030 mlx5_os_config_default(struct mlx5_dev_config *config,
2031                        struct mlx5_common_dev_config *cconf)
2032 {
2033         memset(config, 0, sizeof(*config));
2034         config->mps = MLX5_ARG_UNSET;
2035         config->cqe_comp = 1;
2036         config->rx_vec_en = 1;
2037         config->txq_inline_max = MLX5_ARG_UNSET;
2038         config->txq_inline_min = MLX5_ARG_UNSET;
2039         config->txq_inline_mpw = MLX5_ARG_UNSET;
2040         config->txqs_inline = MLX5_ARG_UNSET;
2041         config->vf_nl_en = 1;
2042         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2043         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2044         config->mprq.log_min_stride_wqe_size = cconf->devx ?
2045                                         cconf->hca_attr.log_min_stride_wqe_sz :
2046                                         MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
2047         config->mprq.log_stride_num = MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;
2048         config->dv_esw_en = 1;
2049         config->dv_flow_en = 1;
2050         config->decap_en = 1;
2051         config->log_hp_size = MLX5_ARG_UNSET;
2052         config->allow_duplicate_pattern = 1;
2053         config->std_delay_drop = 0;
2054         config->hp_delay_drop = 0;
2055 }
2056
2057 /**
2058  * Register a PCI device within bonding.
2059  *
2060  * This function spawns Ethernet devices out of a given PCI device and
2061  * bonding owner PF index.
2062  *
2063  * @param[in] cdev
2064  *   Pointer to common mlx5 device structure.
2065  * @param[in] req_eth_da
2066  *   Requested ethdev device argument.
2067  * @param[in] owner_id
2068  *   Requested owner PF port ID within bonding device, default to 0.
2069  *
2070  * @return
2071  *   0 on success, a negative errno value otherwise and rte_errno is set.
2072  */
2073 static int
2074 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2075                      struct rte_eth_devargs *req_eth_da,
2076                      uint16_t owner_id)
2077 {
2078         struct ibv_device **ibv_list;
2079         /*
2080          * Number of found IB Devices matching with requested PCI BDF.
2081          * nd != 1 means there are multiple IB devices over the same
2082          * PCI device and we have representors and master.
2083          */
2084         unsigned int nd = 0;
2085         /*
2086          * Number of found IB device Ports. nd = 1 and np = 1..n means
2087          * we have the single multiport IB device, and there may be
2088          * representors attached to some of found ports.
2089          */
2090         unsigned int np = 0;
2091         /*
2092          * Number of DPDK ethernet devices to Spawn - either over
2093          * multiple IB devices or multiple ports of single IB device.
2094          * Actually this is the number of iterations to spawn.
2095          */
2096         unsigned int ns = 0;
2097         /*
2098          * Bonding device
2099          *   < 0 - no bonding device (single one)
2100          *  >= 0 - bonding device (value is slave PF index)
2101          */
2102         int bd = -1;
2103         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2104         struct mlx5_dev_spawn_data *list = NULL;
2105         struct mlx5_dev_config dev_config;
2106         unsigned int dev_config_vf;
2107         struct rte_eth_devargs eth_da = *req_eth_da;
2108         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2109         struct mlx5_bond_info bond_info;
2110         int ret = -1;
2111
2112         errno = 0;
2113         ibv_list = mlx5_glue->get_device_list(&ret);
2114         if (!ibv_list) {
2115                 rte_errno = errno ? errno : ENOSYS;
2116                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2117                 return -rte_errno;
2118         }
2119         /*
2120          * First scan the list of all Infiniband devices to find
2121          * matching ones, gathering into the list.
2122          */
2123         struct ibv_device *ibv_match[ret + 1];
2124         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2125         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2126         unsigned int i;
2127
2128         while (ret-- > 0) {
2129                 struct rte_pci_addr pci_addr;
2130
2131                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2132                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2133                                                 nl_rdma, owner_id, &bond_info);
2134                 if (bd >= 0) {
2135                         /*
2136                          * Bonding device detected. Only one match is allowed,
2137                          * the bonding is supported over multi-port IB device,
2138                          * there should be no matches on representor PCI
2139                          * functions or non VF LAG bonding devices with
2140                          * specified address.
2141                          */
2142                         if (nd) {
2143                                 DRV_LOG(ERR,
2144                                         "multiple PCI match on bonding device"
2145                                         "\"%s\" found", ibv_list[ret]->name);
2146                                 rte_errno = ENOENT;
2147                                 ret = -rte_errno;
2148                                 goto exit;
2149                         }
2150                         /* Amend owner pci address if owner PF ID specified. */
2151                         if (eth_da.nb_representor_ports)
2152                                 owner_pci.function += owner_id;
2153                         DRV_LOG(INFO,
2154                                 "PCI information matches for slave %d bonding device \"%s\"",
2155                                 bd, ibv_list[ret]->name);
2156                         ibv_match[nd++] = ibv_list[ret];
2157                         break;
2158                 } else {
2159                         /* Bonding device not found. */
2160                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2161                                               &pci_addr))
2162                                 continue;
2163                         if (owner_pci.domain != pci_addr.domain ||
2164                             owner_pci.bus != pci_addr.bus ||
2165                             owner_pci.devid != pci_addr.devid ||
2166                             owner_pci.function != pci_addr.function)
2167                                 continue;
2168                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2169                                 ibv_list[ret]->name);
2170                         ibv_match[nd++] = ibv_list[ret];
2171                 }
2172         }
2173         ibv_match[nd] = NULL;
2174         if (!nd) {
2175                 /* No device matches, just complain and bail out. */
2176                 DRV_LOG(WARNING,
2177                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2178                         " are kernel drivers loaded?",
2179                         owner_pci.domain, owner_pci.bus,
2180                         owner_pci.devid, owner_pci.function);
2181                 rte_errno = ENOENT;
2182                 ret = -rte_errno;
2183                 goto exit;
2184         }
2185         if (nd == 1) {
2186                 /*
2187                  * Found single matching device may have multiple ports.
2188                  * Each port may be representor, we have to check the port
2189                  * number and check the representors existence.
2190                  */
2191                 if (nl_rdma >= 0)
2192                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2193                 if (!np)
2194                         DRV_LOG(WARNING,
2195                                 "Cannot get IB device \"%s\" ports number.",
2196                                 ibv_match[0]->name);
2197                 if (bd >= 0 && !np) {
2198                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2199                         rte_errno = ENOENT;
2200                         ret = -rte_errno;
2201                         goto exit;
2202                 }
2203         }
2204         /* Now we can determine the maximal amount of devices to be spawned. */
2205         list = mlx5_malloc(MLX5_MEM_ZERO,
2206                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2207                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2208         if (!list) {
2209                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2210                 rte_errno = ENOMEM;
2211                 ret = -rte_errno;
2212                 goto exit;
2213         }
2214         if (bd >= 0 || np > 1) {
2215                 /*
2216                  * Single IB device with multiple ports found,
2217                  * it may be E-Switch master device and representors.
2218                  * We have to perform identification through the ports.
2219                  */
2220                 MLX5_ASSERT(nl_rdma >= 0);
2221                 MLX5_ASSERT(ns == 0);
2222                 MLX5_ASSERT(nd == 1);
2223                 MLX5_ASSERT(np);
2224                 for (i = 1; i <= np; ++i) {
2225                         list[ns].bond_info = &bond_info;
2226                         list[ns].max_port = np;
2227                         list[ns].phys_port = i;
2228                         list[ns].phys_dev_name = ibv_match[0]->name;
2229                         list[ns].eth_dev = NULL;
2230                         list[ns].pci_dev = pci_dev;
2231                         list[ns].cdev = cdev;
2232                         list[ns].pf_bond = bd;
2233                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2234                                                            ibv_match[0]->name,
2235                                                            i);
2236                         if (!list[ns].ifindex) {
2237                                 /*
2238                                  * No network interface index found for the
2239                                  * specified port, it means there is no
2240                                  * representor on this port. It's OK,
2241                                  * there can be disabled ports, for example
2242                                  * if sriov_numvfs < sriov_totalvfs.
2243                                  */
2244                                 continue;
2245                         }
2246                         ret = -1;
2247                         if (nl_route >= 0)
2248                                 ret = mlx5_nl_switch_info(nl_route,
2249                                                           list[ns].ifindex,
2250                                                           &list[ns].info);
2251                         if (ret || (!list[ns].info.representor &&
2252                                     !list[ns].info.master)) {
2253                                 /*
2254                                  * We failed to recognize representors with
2255                                  * Netlink, let's try to perform the task
2256                                  * with sysfs.
2257                                  */
2258                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2259                                                              &list[ns].info);
2260                         }
2261                         if (!ret && bd >= 0) {
2262                                 switch (list[ns].info.name_type) {
2263                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2264                                         if (np == 1) {
2265                                                 /*
2266                                                  * Force standalone bonding
2267                                                  * device for ROCE LAG
2268                                                  * configurations.
2269                                                  */
2270                                                 list[ns].info.master = 0;
2271                                                 list[ns].info.representor = 0;
2272                                         }
2273                                         if (list[ns].info.port_name == bd)
2274                                                 ns++;
2275                                         break;
2276                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2277                                         /* Fallthrough */
2278                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2279                                         /* Fallthrough */
2280                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2281                                         if (list[ns].info.pf_num == bd)
2282                                                 ns++;
2283                                         break;
2284                                 default:
2285                                         break;
2286                                 }
2287                                 continue;
2288                         }
2289                         if (!ret && (list[ns].info.representor ^
2290                                      list[ns].info.master))
2291                                 ns++;
2292                 }
2293                 if (!ns) {
2294                         DRV_LOG(ERR,
2295                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2296                         rte_errno = ENOENT;
2297                         ret = -rte_errno;
2298                         goto exit;
2299                 }
2300         } else {
2301                 /*
2302                  * The existence of several matching entries (nd > 1) means
2303                  * port representors have been instantiated. No existing Verbs
2304                  * call nor sysfs entries can tell them apart, this can only
2305                  * be done through Netlink calls assuming kernel drivers are
2306                  * recent enough to support them.
2307                  *
2308                  * In the event of identification failure through Netlink,
2309                  * try again through sysfs, then:
2310                  *
2311                  * 1. A single IB device matches (nd == 1) with single
2312                  *    port (np=0/1) and is not a representor, assume
2313                  *    no switch support.
2314                  *
2315                  * 2. Otherwise no safe assumptions can be made;
2316                  *    complain louder and bail out.
2317                  */
2318                 for (i = 0; i != nd; ++i) {
2319                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2320                         list[ns].bond_info = NULL;
2321                         list[ns].max_port = 1;
2322                         list[ns].phys_port = 1;
2323                         list[ns].phys_dev_name = ibv_match[i]->name;
2324                         list[ns].eth_dev = NULL;
2325                         list[ns].pci_dev = pci_dev;
2326                         list[ns].cdev = cdev;
2327                         list[ns].pf_bond = -1;
2328                         list[ns].ifindex = 0;
2329                         if (nl_rdma >= 0)
2330                                 list[ns].ifindex = mlx5_nl_ifindex
2331                                                             (nl_rdma,
2332                                                              ibv_match[i]->name,
2333                                                              1);
2334                         if (!list[ns].ifindex) {
2335                                 char ifname[IF_NAMESIZE];
2336
2337                                 /*
2338                                  * Netlink failed, it may happen with old
2339                                  * ib_core kernel driver (before 4.16).
2340                                  * We can assume there is old driver because
2341                                  * here we are processing single ports IB
2342                                  * devices. Let's try sysfs to retrieve
2343                                  * the ifindex. The method works for
2344                                  * master device only.
2345                                  */
2346                                 if (nd > 1) {
2347                                         /*
2348                                          * Multiple devices found, assume
2349                                          * representors, can not distinguish
2350                                          * master/representor and retrieve
2351                                          * ifindex via sysfs.
2352                                          */
2353                                         continue;
2354                                 }
2355                                 ret = mlx5_get_ifname_sysfs
2356                                         (ibv_match[i]->ibdev_path, ifname);
2357                                 if (!ret)
2358                                         list[ns].ifindex =
2359                                                 if_nametoindex(ifname);
2360                                 if (!list[ns].ifindex) {
2361                                         /*
2362                                          * No network interface index found
2363                                          * for the specified device, it means
2364                                          * there it is neither representor
2365                                          * nor master.
2366                                          */
2367                                         continue;
2368                                 }
2369                         }
2370                         ret = -1;
2371                         if (nl_route >= 0)
2372                                 ret = mlx5_nl_switch_info(nl_route,
2373                                                           list[ns].ifindex,
2374                                                           &list[ns].info);
2375                         if (ret || (!list[ns].info.representor &&
2376                                     !list[ns].info.master)) {
2377                                 /*
2378                                  * We failed to recognize representors with
2379                                  * Netlink, let's try to perform the task
2380                                  * with sysfs.
2381                                  */
2382                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2383                                                              &list[ns].info);
2384                         }
2385                         if (!ret && (list[ns].info.representor ^
2386                                      list[ns].info.master)) {
2387                                 ns++;
2388                         } else if ((nd == 1) &&
2389                                    !list[ns].info.representor &&
2390                                    !list[ns].info.master) {
2391                                 /*
2392                                  * Single IB device with one physical port and
2393                                  * attached network device.
2394                                  * May be SRIOV is not enabled or there is no
2395                                  * representors.
2396                                  */
2397                                 DRV_LOG(INFO, "No E-Switch support detected.");
2398                                 ns++;
2399                                 break;
2400                         }
2401                 }
2402                 if (!ns) {
2403                         DRV_LOG(ERR,
2404                                 "Unable to recognize master/representors on the multiple IB devices.");
2405                         rte_errno = ENOENT;
2406                         ret = -rte_errno;
2407                         goto exit;
2408                 }
2409                 /*
2410                  * New kernels may add the switch_id attribute for the case
2411                  * there is no E-Switch and we wrongly recognized the only
2412                  * device as master. Override this if there is the single
2413                  * device with single port and new device name format present.
2414                  */
2415                 if (nd == 1 &&
2416                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2417                         list[0].info.master = 0;
2418                         list[0].info.representor = 0;
2419                 }
2420         }
2421         MLX5_ASSERT(ns);
2422         /*
2423          * Sort list to probe devices in natural order for users convenience
2424          * (i.e. master first, then representors from lowest to highest ID).
2425          */
2426         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2427         /* Device specific configuration. */
2428         switch (pci_dev->id.device_id) {
2429         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2430         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2431         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2432         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2433         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2434         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2435         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2436                 dev_config_vf = 1;
2437                 break;
2438         default:
2439                 dev_config_vf = 0;
2440                 break;
2441         }
2442         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2443                 /* Set devargs default values. */
2444                 if (eth_da.nb_mh_controllers == 0) {
2445                         eth_da.nb_mh_controllers = 1;
2446                         eth_da.mh_controllers[0] = 0;
2447                 }
2448                 if (eth_da.nb_ports == 0 && ns > 0) {
2449                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2450                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2451                                         pci_dev->device.devargs->args);
2452                         eth_da.nb_ports = 1;
2453                         eth_da.ports[0] = list[0].info.pf_num;
2454                 }
2455                 if (eth_da.nb_representor_ports == 0) {
2456                         eth_da.nb_representor_ports = 1;
2457                         eth_da.representor_ports[0] = 0;
2458                 }
2459         }
2460         for (i = 0; i != ns; ++i) {
2461                 uint32_t restore;
2462
2463                 /* Default configuration. */
2464                 mlx5_os_config_default(&dev_config, &cdev->config);
2465                 dev_config.vf = dev_config_vf;
2466                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2467                                                  &dev_config, &eth_da);
2468                 if (!list[i].eth_dev) {
2469                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2470                                 break;
2471                         /* Device is disabled or already spawned. Ignore it. */
2472                         continue;
2473                 }
2474                 restore = list[i].eth_dev->data->dev_flags;
2475                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2476                 /**
2477                  * Each representor has a dedicated interrupts vector.
2478                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2479                  * representor eth_dev object because representor and PF
2480                  * share the same PCI address.
2481                  * Override representor device with a dedicated
2482                  * interrupts handle here.
2483                  * Representor interrupts handle is released in mlx5_dev_stop().
2484                  */
2485                 if (list[i].info.representor) {
2486                         struct rte_intr_handle *intr_handle =
2487                                 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2488                         if (intr_handle == NULL) {
2489                                 DRV_LOG(ERR,
2490                                         "port %u failed to allocate memory for interrupt handler "
2491                                         "Rx interrupts will not be supported",
2492                                         i);
2493                                 rte_errno = ENOMEM;
2494                                 ret = -rte_errno;
2495                                 goto exit;
2496                         }
2497                         list[i].eth_dev->intr_handle = intr_handle;
2498                 }
2499                 /* Restore non-PCI flags cleared by the above call. */
2500                 list[i].eth_dev->data->dev_flags |= restore;
2501                 rte_eth_dev_probing_finish(list[i].eth_dev);
2502         }
2503         if (i != ns) {
2504                 DRV_LOG(ERR,
2505                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2506                         " encountering an error: %s",
2507                         owner_pci.domain, owner_pci.bus,
2508                         owner_pci.devid, owner_pci.function,
2509                         strerror(rte_errno));
2510                 ret = -rte_errno;
2511                 /* Roll back. */
2512                 while (i--) {
2513                         if (!list[i].eth_dev)
2514                                 continue;
2515                         mlx5_dev_close(list[i].eth_dev);
2516                         /* mac_addrs must not be freed because in dev_private */
2517                         list[i].eth_dev->data->mac_addrs = NULL;
2518                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2519                 }
2520                 /* Restore original error. */
2521                 rte_errno = -ret;
2522         } else {
2523                 ret = 0;
2524         }
2525 exit:
2526         /*
2527          * Do the routine cleanup:
2528          * - close opened Netlink sockets
2529          * - free allocated spawn data array
2530          * - free the Infiniband device list
2531          */
2532         if (nl_rdma >= 0)
2533                 close(nl_rdma);
2534         if (nl_route >= 0)
2535                 close(nl_route);
2536         if (list)
2537                 mlx5_free(list);
2538         MLX5_ASSERT(ibv_list);
2539         mlx5_glue->free_device_list(ibv_list);
2540         return ret;
2541 }
2542
2543 static int
2544 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2545                           struct rte_eth_devargs *eth_da)
2546 {
2547         int ret = 0;
2548
2549         if (dev->devargs == NULL)
2550                 return 0;
2551         memset(eth_da, 0, sizeof(*eth_da));
2552         /* Parse representor information first from class argument. */
2553         if (dev->devargs->cls_str)
2554                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2555         if (ret != 0) {
2556                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2557                         dev->devargs->cls_str);
2558                 return -rte_errno;
2559         }
2560         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2561                 /* Parse legacy device argument */
2562                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2563                 if (ret) {
2564                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2565                                 dev->devargs->args);
2566                         return -rte_errno;
2567                 }
2568         }
2569         return 0;
2570 }
2571
2572 /**
2573  * Callback to register a PCI device.
2574  *
2575  * This function spawns Ethernet devices out of a given PCI device.
2576  *
2577  * @param[in] cdev
2578  *   Pointer to common mlx5 device structure.
2579  *
2580  * @return
2581  *   0 on success, a negative errno value otherwise and rte_errno is set.
2582  */
2583 static int
2584 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2585 {
2586         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2587         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2588         int ret = 0;
2589         uint16_t p;
2590
2591         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2592         if (ret != 0)
2593                 return ret;
2594
2595         if (eth_da.nb_ports > 0) {
2596                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2597                 for (p = 0; p < eth_da.nb_ports; p++) {
2598                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2599                                                    eth_da.ports[p]);
2600                         if (ret)
2601                                 break;
2602                 }
2603                 if (ret) {
2604                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2605                                 "aborted due to prodding failure of PF %u",
2606                                 pci_dev->addr.domain, pci_dev->addr.bus,
2607                                 pci_dev->addr.devid, pci_dev->addr.function,
2608                                 eth_da.ports[p]);
2609                         mlx5_net_remove(cdev);
2610                 }
2611         } else {
2612                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2613         }
2614         return ret;
2615 }
2616
2617 /* Probe a single SF device on auxiliary bus, no representor support. */
2618 static int
2619 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2620 {
2621         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2622         struct mlx5_dev_config config;
2623         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2624         struct rte_device *dev = cdev->dev;
2625         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2626         struct rte_eth_dev *eth_dev;
2627         int ret = 0;
2628
2629         /* Parse ethdev devargs. */
2630         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2631         if (ret != 0)
2632                 return ret;
2633         /* Set default config data. */
2634         mlx5_os_config_default(&config, &cdev->config);
2635         config.sf = 1;
2636         /* Init spawn data. */
2637         spawn.max_port = 1;
2638         spawn.phys_port = 1;
2639         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2640         ret = mlx5_auxiliary_get_ifindex(dev->name);
2641         if (ret < 0) {
2642                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2643                 return ret;
2644         }
2645         spawn.ifindex = ret;
2646         spawn.cdev = cdev;
2647         /* Spawn device. */
2648         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2649         if (eth_dev == NULL)
2650                 return -rte_errno;
2651         /* Post create. */
2652         eth_dev->intr_handle = adev->intr_handle;
2653         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2654                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2655                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2656                 eth_dev->data->numa_node = dev->numa_node;
2657         }
2658         rte_eth_dev_probing_finish(eth_dev);
2659         return 0;
2660 }
2661
2662 /**
2663  * Net class driver callback to probe a device.
2664  *
2665  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2666  *
2667  * @param[in] cdev
2668  *   Pointer to the common mlx5 device.
2669  *
2670  * @return
2671  *   0 on success, a negative errno value otherwise and rte_errno is set.
2672  */
2673 int
2674 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2675 {
2676         int ret;
2677
2678         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2679                 mlx5_pmd_socket_init();
2680         ret = mlx5_init_once();
2681         if (ret) {
2682                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2683                         strerror(rte_errno));
2684                 return -rte_errno;
2685         }
2686         if (mlx5_dev_is_pci(cdev->dev))
2687                 return mlx5_os_pci_probe(cdev);
2688         else
2689                 return mlx5_os_auxiliary_probe(cdev);
2690 }
2691
2692 /**
2693  * Cleanup resources when the last device is closed.
2694  */
2695 void
2696 mlx5_os_net_cleanup(void)
2697 {
2698         mlx5_pmd_socket_uninit();
2699 }
2700
2701 /**
2702  * Install shared asynchronous device events handler.
2703  * This function is implemented to support event sharing
2704  * between multiple ports of single IB device.
2705  *
2706  * @param sh
2707  *   Pointer to mlx5_dev_ctx_shared object.
2708  */
2709 void
2710 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2711 {
2712         int ret;
2713         int flags;
2714         struct ibv_context *ctx = sh->cdev->ctx;
2715
2716         sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2717         if (sh->intr_handle == NULL) {
2718                 DRV_LOG(ERR, "Fail to allocate intr_handle");
2719                 rte_errno = ENOMEM;
2720                 return;
2721         }
2722         rte_intr_fd_set(sh->intr_handle, -1);
2723
2724         flags = fcntl(ctx->async_fd, F_GETFL);
2725         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2726         if (ret) {
2727                 DRV_LOG(INFO, "failed to change file descriptor async event"
2728                         " queue");
2729         } else {
2730                 rte_intr_fd_set(sh->intr_handle, ctx->async_fd);
2731                 rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);
2732                 if (rte_intr_callback_register(sh->intr_handle,
2733                                         mlx5_dev_interrupt_handler, sh)) {
2734                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2735                         rte_intr_fd_set(sh->intr_handle, -1);
2736                 }
2737         }
2738         if (sh->devx) {
2739 #ifdef HAVE_IBV_DEVX_ASYNC
2740                 sh->intr_handle_devx =
2741                         rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2742                 if (!sh->intr_handle_devx) {
2743                         DRV_LOG(ERR, "Fail to allocate intr_handle");
2744                         rte_errno = ENOMEM;
2745                         return;
2746                 }
2747                 rte_intr_fd_set(sh->intr_handle_devx, -1);
2748                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2749                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2750                 if (!devx_comp) {
2751                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2752                         return;
2753                 }
2754                 flags = fcntl(devx_comp->fd, F_GETFL);
2755                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2756                 if (ret) {
2757                         DRV_LOG(INFO, "failed to change file descriptor"
2758                                 " devx comp");
2759                         return;
2760                 }
2761                 rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);
2762                 rte_intr_type_set(sh->intr_handle_devx,
2763                                          RTE_INTR_HANDLE_EXT);
2764                 if (rte_intr_callback_register(sh->intr_handle_devx,
2765                                         mlx5_dev_interrupt_handler_devx, sh)) {
2766                         DRV_LOG(INFO, "Fail to install the devx shared"
2767                                 " interrupt.");
2768                         rte_intr_fd_set(sh->intr_handle_devx, -1);
2769                 }
2770 #endif /* HAVE_IBV_DEVX_ASYNC */
2771         }
2772 }
2773
2774 /**
2775  * Uninstall shared asynchronous device events handler.
2776  * This function is implemented to support event sharing
2777  * between multiple ports of single IB device.
2778  *
2779  * @param dev
2780  *   Pointer to mlx5_dev_ctx_shared object.
2781  */
2782 void
2783 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2784 {
2785         if (rte_intr_fd_get(sh->intr_handle) >= 0)
2786                 mlx5_intr_callback_unregister(sh->intr_handle,
2787                                               mlx5_dev_interrupt_handler, sh);
2788         rte_intr_instance_free(sh->intr_handle);
2789 #ifdef HAVE_IBV_DEVX_ASYNC
2790         if (rte_intr_fd_get(sh->intr_handle_devx) >= 0)
2791                 rte_intr_callback_unregister(sh->intr_handle_devx,
2792                                   mlx5_dev_interrupt_handler_devx, sh);
2793         rte_intr_instance_free(sh->intr_handle_devx);
2794         if (sh->devx_comp)
2795                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2796 #endif
2797 }
2798
2799 /**
2800  * Read statistics by a named counter.
2801  *
2802  * @param[in] priv
2803  *   Pointer to the private device data structure.
2804  * @param[in] ctr_name
2805  *   Pointer to the name of the statistic counter to read
2806  * @param[out] stat
2807  *   Pointer to read statistic value.
2808  * @return
2809  *   0 on success and stat is valud, 1 if failed to read the value
2810  *   rte_errno is set.
2811  *
2812  */
2813 int
2814 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2815                       uint64_t *stat)
2816 {
2817         int fd;
2818
2819         if (priv->sh) {
2820                 if (priv->q_counters != NULL &&
2821                     strcmp(ctr_name, "out_of_buffer") == 0)
2822                         return mlx5_devx_cmd_queue_counter_query
2823                                         (priv->q_counters, 0, (uint32_t *)stat);
2824                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2825                       priv->sh->ibdev_path,
2826                       priv->dev_port,
2827                       ctr_name);
2828                 fd = open(path, O_RDONLY);
2829                 /*
2830                  * in switchdev the file location is not per port
2831                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2832                  */
2833                 if (fd == -1) {
2834                         MKSTR(path1, "%s/hw_counters/%s",
2835                               priv->sh->ibdev_path,
2836                               ctr_name);
2837                         fd = open(path1, O_RDONLY);
2838                 }
2839                 if (fd != -1) {
2840                         char buf[21] = {'\0'};
2841                         ssize_t n = read(fd, buf, sizeof(buf));
2842
2843                         close(fd);
2844                         if (n != -1) {
2845                                 *stat = strtoull(buf, NULL, 10);
2846                                 return 0;
2847                         }
2848                 }
2849         }
2850         *stat = 0;
2851         return 1;
2852 }
2853
2854 /**
2855  * Remove a MAC address from device
2856  *
2857  * @param dev
2858  *   Pointer to Ethernet device structure.
2859  * @param index
2860  *   MAC address index.
2861  */
2862 void
2863 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2864 {
2865         struct mlx5_priv *priv = dev->data->dev_private;
2866         const int vf = priv->config.vf;
2867
2868         if (vf)
2869                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2870                                         mlx5_ifindex(dev), priv->mac_own,
2871                                         &dev->data->mac_addrs[index], index);
2872 }
2873
2874 /**
2875  * Adds a MAC address to the device
2876  *
2877  * @param dev
2878  *   Pointer to Ethernet device structure.
2879  * @param mac_addr
2880  *   MAC address to register.
2881  * @param index
2882  *   MAC address index.
2883  *
2884  * @return
2885  *   0 on success, a negative errno value otherwise
2886  */
2887 int
2888 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2889                      uint32_t index)
2890 {
2891         struct mlx5_priv *priv = dev->data->dev_private;
2892         const int vf = priv->config.vf;
2893         int ret = 0;
2894
2895         if (vf)
2896                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2897                                            mlx5_ifindex(dev), priv->mac_own,
2898                                            mac, index);
2899         return ret;
2900 }
2901
2902 /**
2903  * Modify a VF MAC address
2904  *
2905  * @param priv
2906  *   Pointer to device private data.
2907  * @param mac_addr
2908  *   MAC address to modify into.
2909  * @param iface_idx
2910  *   Net device interface index
2911  * @param vf_index
2912  *   VF index
2913  *
2914  * @return
2915  *   0 on success, a negative errno value otherwise
2916  */
2917 int
2918 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2919                            unsigned int iface_idx,
2920                            struct rte_ether_addr *mac_addr,
2921                            int vf_index)
2922 {
2923         return mlx5_nl_vf_mac_addr_modify
2924                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2925 }
2926
2927 /**
2928  * Set device promiscuous mode
2929  *
2930  * @param dev
2931  *   Pointer to Ethernet device structure.
2932  * @param enable
2933  *   0 - promiscuous is disabled, otherwise - enabled
2934  *
2935  * @return
2936  *   0 on success, a negative error value otherwise
2937  */
2938 int
2939 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2940 {
2941         struct mlx5_priv *priv = dev->data->dev_private;
2942
2943         return mlx5_nl_promisc(priv->nl_socket_route,
2944                                mlx5_ifindex(dev), !!enable);
2945 }
2946
2947 /**
2948  * Set device promiscuous mode
2949  *
2950  * @param dev
2951  *   Pointer to Ethernet device structure.
2952  * @param enable
2953  *   0 - all multicase is disabled, otherwise - enabled
2954  *
2955  * @return
2956  *   0 on success, a negative error value otherwise
2957  */
2958 int
2959 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2960 {
2961         struct mlx5_priv *priv = dev->data->dev_private;
2962
2963         return mlx5_nl_allmulti(priv->nl_socket_route,
2964                                 mlx5_ifindex(dev), !!enable);
2965 }
2966
2967 /**
2968  * Flush device MAC addresses
2969  *
2970  * @param dev
2971  *   Pointer to Ethernet device structure.
2972  *
2973  */
2974 void
2975 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2976 {
2977         struct mlx5_priv *priv = dev->data->dev_private;
2978
2979         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2980                                dev->data->mac_addrs,
2981                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2982 }