drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /* rte flow indexed pool configuration. */
  71 static struct mlx5_indexed_pool_config icfg[] = {
  72         {
  73                 .size = sizeof(struct rte_flow),
  74                 .trunk_size = 64,
  75                 .need_lock = 1,
  76                 .release_mem_en = 0,
  77                 .malloc = mlx5_malloc,
  78                 .free = mlx5_free,
  79                 .per_core_cache = 0,
  80                 .type = "ctl_flow_ipool",
  81         },
  82         {
  83                 .size = sizeof(struct rte_flow),
  84                 .trunk_size = 64,
  85                 .grow_trunk = 3,
  86                 .grow_shift = 2,
  87                 .need_lock = 1,
  88                 .release_mem_en = 0,
  89                 .malloc = mlx5_malloc,
  90                 .free = mlx5_free,
  91                 .per_core_cache = 1 << 14,
  92                 .type = "rte_flow_ipool",
  93         },
  94         {
  95                 .size = sizeof(struct rte_flow),
  96                 .trunk_size = 64,
  97                 .grow_trunk = 3,
  98                 .grow_shift = 2,
  99                 .need_lock = 1,
 100                 .release_mem_en = 0,
 101                 .malloc = mlx5_malloc,
 102                 .free = mlx5_free,
 103                 .per_core_cache = 0,
 104                 .type = "mcp_flow_ipool",
 105         },
 106 };
 107
 108 /**
 109  * Set the completion channel file descriptor interrupt as non-blocking.
 110  *
 111  * @param[in] rxq_obj
 112  *   Pointer to RQ channel object, which includes the channel fd
 113  *
 114  * @param[out] fd
 115  *   The file descriptor (representing the intetrrupt) used in this channel.
 116  *
 117  * @return
 118  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 119  */
 120 int
 121 mlx5_os_set_nonblock_channel_fd(int fd)
 122 {
 123         int flags;
 124
 125         flags = fcntl(fd, F_GETFL);
 126         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 127 }
 128
 129 /**
 130  * Get mlx5 device attributes. The glue function query_device_ex() is called
 131  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 132  * device attributes from the glue out parameter.
 133  *
 134  * @param cdev
 135  *   Pointer to mlx5 device.
 136  *
 137  * @param device_attr
 138  *   Pointer to mlx5 device attributes.
 139  *
 140  * @return
 141  *   0 on success, non zero error number otherwise
 142  */
 143 int
 144 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
 145                      struct mlx5_dev_attr *device_attr)
 146 {
 147         int err;
 148         struct ibv_context *ctx = cdev->ctx;
 149         struct ibv_device_attr_ex attr_ex;
 150
 151         memset(device_attr, 0, sizeof(*device_attr));
 152         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 153         if (err)
 154                 return err;
 155         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 156         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 157         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 158         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 159         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 160         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 161         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 162         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 163         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 164         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 165         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 166         device_attr->max_rwq_indirection_table_size =
 167                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 168         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 169         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 170
 171         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 172         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 173         if (err)
 174                 return err;
 175
 176         device_attr->flags = dv_attr.flags;
 177         device_attr->comp_mask = dv_attr.comp_mask;
 178 #ifdef HAVE_IBV_MLX5_MOD_SWP
 179         device_attr->sw_parsing_offloads =
 180                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 181 #endif
 182         device_attr->min_single_stride_log_num_of_bytes =
 183                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 184         device_attr->max_single_stride_log_num_of_bytes =
 185                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 186         device_attr->min_single_wqe_log_num_of_strides =
 187                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 188         device_attr->max_single_wqe_log_num_of_strides =
 189                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 190         device_attr->stride_supported_qpts =
 191                 dv_attr.striding_rq_caps.supported_qpts;
 192 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 193         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 194 #endif
 195         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 196                 sizeof(device_attr->fw_ver));
 197
 198         return err;
 199 }
 200
 201 /**
 202  * Detect misc5 support or not
 203  *
 204  * @param[in] priv
 205  *   Device private data pointer
 206  */
 207 #ifdef HAVE_MLX5DV_DR
 208 static void
 209 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 210 {
 211 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 212         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 213          * Case: IPv4--->UDP--->VxLAN--->vni
 214          */
 215         void *tbl;
 216         struct mlx5_flow_dv_match_params matcher_mask;
 217         void *match_m;
 218         void *matcher;
 219         void *headers_m;
 220         void *misc5_m;
 221         uint32_t *tunnel_header_m;
 222         struct mlx5dv_flow_matcher_attr dv_attr;
 223
 224         memset(&matcher_mask, 0, sizeof(matcher_mask));
 225         matcher_mask.size = sizeof(matcher_mask.buf);
 226         match_m = matcher_mask.buf;
 227         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 228         misc5_m = MLX5_ADDR_OF(fte_match_param,
 229                                match_m, misc_parameters_5);
 230         tunnel_header_m = (uint32_t *)
 231                                 MLX5_ADDR_OF(fte_match_set_misc5,
 232                                 misc5_m, tunnel_header_1);
 233         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 234         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 235         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 236         *tunnel_header_m = 0xffffff;
 237
 238         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 239         if (!tbl) {
 240                 DRV_LOG(INFO, "No SW steering support");
 241                 return;
 242         }
 243         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 244         dv_attr.match_mask = (void *)&matcher_mask,
 245         dv_attr.match_criteria_enable =
 246                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 247                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 248         dv_attr.priority = 3;
 249 #ifdef HAVE_MLX5DV_DR_ESWITCH
 250         void *misc2_m;
 251         if (priv->config.dv_esw_en) {
 252                 /* FDB enabled reg_c_0 */
 253                 dv_attr.match_criteria_enable |=
 254                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 255                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 256                                        match_m, misc_parameters_2);
 257                 MLX5_SET(fte_match_set_misc2, misc2_m,
 258                          metadata_reg_c_0, 0xffff);
 259         }
 260 #endif
 261         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 262                                                     &dv_attr, tbl);
 263         if (matcher) {
 264                 priv->sh->misc5_cap = 1;
 265                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 266         }
 267         mlx5_glue->dr_destroy_flow_tbl(tbl);
 268 #else
 269         RTE_SET_USED(priv);
 270 #endif
 271 }
 272 #endif
 273
 274 /**
 275  * Initialize DR related data within private structure.
 276  * Routine checks the reference counter and does actual
 277  * resources creation/initialization only if counter is zero.
 278  *
 279  * @param[in] priv
 280  *   Pointer to the private device data structure.
 281  *
 282  * @return
 283  *   Zero on success, positive error code otherwise.
 284  */
 285 static int
 286 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 287 {
 288         struct mlx5_dev_ctx_shared *sh = priv->sh;
 289         char s[MLX5_NAME_SIZE] __rte_unused;
 290         int err;
 291
 292         MLX5_ASSERT(sh && sh->refcnt);
 293         if (sh->refcnt > 1)
 294                 return 0;
 295         err = mlx5_alloc_table_hash_list(priv);
 296         if (err)
 297                 goto error;
 298         /* The resources below are only valid with DV support. */
 299 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 300         /* Init port id action list. */
 301         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 302         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 303                                                    flow_dv_port_id_create_cb,
 304                                                    flow_dv_port_id_match_cb,
 305                                                    flow_dv_port_id_remove_cb,
 306                                                    flow_dv_port_id_clone_cb,
 307                                                  flow_dv_port_id_clone_free_cb);
 308         if (!sh->port_id_action_list)
 309                 goto error;
 310         /* Init push vlan action list. */
 311         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 312         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 313                                                     flow_dv_push_vlan_create_cb,
 314                                                     flow_dv_push_vlan_match_cb,
 315                                                     flow_dv_push_vlan_remove_cb,
 316                                                     flow_dv_push_vlan_clone_cb,
 317                                                flow_dv_push_vlan_clone_free_cb);
 318         if (!sh->push_vlan_action_list)
 319                 goto error;
 320         /* Init sample action list. */
 321         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 322         sh->sample_action_list = mlx5_list_create(s, sh, true,
 323                                                   flow_dv_sample_create_cb,
 324                                                   flow_dv_sample_match_cb,
 325                                                   flow_dv_sample_remove_cb,
 326                                                   flow_dv_sample_clone_cb,
 327                                                   flow_dv_sample_clone_free_cb);
 328         if (!sh->sample_action_list)
 329                 goto error;
 330         /* Init dest array action list. */
 331         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 332         sh->dest_array_list = mlx5_list_create(s, sh, true,
 333                                                flow_dv_dest_array_create_cb,
 334                                                flow_dv_dest_array_match_cb,
 335                                                flow_dv_dest_array_remove_cb,
 336                                                flow_dv_dest_array_clone_cb,
 337                                               flow_dv_dest_array_clone_free_cb);
 338         if (!sh->dest_array_list)
 339                 goto error;
 340 #endif
 341 #ifdef HAVE_MLX5DV_DR
 342         void *domain;
 343
 344         /* Reference counter is zero, we should initialize structures. */
 345         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 346                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 347         if (!domain) {
 348                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 349                 err = errno;
 350                 goto error;
 351         }
 352         sh->rx_domain = domain;
 353         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 354                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 355         if (!domain) {
 356                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 357                 err = errno;
 358                 goto error;
 359         }
 360         sh->tx_domain = domain;
 361 #ifdef HAVE_MLX5DV_DR_ESWITCH
 362         if (priv->config.dv_esw_en) {
 363                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 364                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 365                 if (!domain) {
 366                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 367                         err = errno;
 368                         goto error;
 369                 }
 370                 sh->fdb_domain = domain;
 371         }
 372         /*
 373          * The drop action is just some dummy placeholder in rdma-core. It
 374          * does not belong to domains and has no any attributes, and, can be
 375          * shared by the entire device.
 376          */
 377         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 378         if (!sh->dr_drop_action) {
 379                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 380                 err = errno;
 381                 goto error;
 382         }
 383 #endif
 384         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 385                 err = mlx5_alloc_tunnel_hub(sh);
 386         if (err) {
 387                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 388                 goto error;
 389         }
 390         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 391                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 392                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 393                 if (sh->fdb_domain)
 394                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 395         }
 396         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 397         if (!priv->config.allow_duplicate_pattern) {
 398 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 399                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 400 #endif
 401                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 402                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 403                 if (sh->fdb_domain)
 404                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 405         }
 406
 407         __mlx5_discovery_misc5_cap(priv);
 408 #endif /* HAVE_MLX5DV_DR */
 409         sh->default_miss_action =
 410                         mlx5_glue->dr_create_flow_action_default_miss();
 411         if (!sh->default_miss_action)
 412                 DRV_LOG(WARNING, "Default miss action is not supported.");
 413         return 0;
 414 error:
 415         /* Rollback the created objects. */
 416         if (sh->rx_domain) {
 417                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 418                 sh->rx_domain = NULL;
 419         }
 420         if (sh->tx_domain) {
 421                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 422                 sh->tx_domain = NULL;
 423         }
 424         if (sh->fdb_domain) {
 425                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 426                 sh->fdb_domain = NULL;
 427         }
 428         if (sh->dr_drop_action) {
 429                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 430                 sh->dr_drop_action = NULL;
 431         }
 432         if (sh->pop_vlan_action) {
 433                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 434                 sh->pop_vlan_action = NULL;
 435         }
 436         if (sh->encaps_decaps) {
 437                 mlx5_hlist_destroy(sh->encaps_decaps);
 438                 sh->encaps_decaps = NULL;
 439         }
 440         if (sh->modify_cmds) {
 441                 mlx5_hlist_destroy(sh->modify_cmds);
 442                 sh->modify_cmds = NULL;
 443         }
 444         if (sh->tag_table) {
 445                 /* tags should be destroyed with flow before. */
 446                 mlx5_hlist_destroy(sh->tag_table);
 447                 sh->tag_table = NULL;
 448         }
 449         if (sh->tunnel_hub) {
 450                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 451                 sh->tunnel_hub = NULL;
 452         }
 453         mlx5_free_table_hash_list(priv);
 454         if (sh->port_id_action_list) {
 455                 mlx5_list_destroy(sh->port_id_action_list);
 456                 sh->port_id_action_list = NULL;
 457         }
 458         if (sh->push_vlan_action_list) {
 459                 mlx5_list_destroy(sh->push_vlan_action_list);
 460                 sh->push_vlan_action_list = NULL;
 461         }
 462         if (sh->sample_action_list) {
 463                 mlx5_list_destroy(sh->sample_action_list);
 464                 sh->sample_action_list = NULL;
 465         }
 466         if (sh->dest_array_list) {
 467                 mlx5_list_destroy(sh->dest_array_list);
 468                 sh->dest_array_list = NULL;
 469         }
 470         return err;
 471 }
 472
 473 /**
 474  * Destroy DR related data within private structure.
 475  *
 476  * @param[in] priv
 477  *   Pointer to the private device data structure.
 478  */
 479 void
 480 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 481 {
 482         struct mlx5_dev_ctx_shared *sh = priv->sh;
 483
 484         MLX5_ASSERT(sh && sh->refcnt);
 485         if (sh->refcnt > 1)
 486                 return;
 487 #ifdef HAVE_MLX5DV_DR
 488         if (sh->rx_domain) {
 489                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 490                 sh->rx_domain = NULL;
 491         }
 492         if (sh->tx_domain) {
 493                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 494                 sh->tx_domain = NULL;
 495         }
 496 #ifdef HAVE_MLX5DV_DR_ESWITCH
 497         if (sh->fdb_domain) {
 498                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 499                 sh->fdb_domain = NULL;
 500         }
 501         if (sh->dr_drop_action) {
 502                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 503                 sh->dr_drop_action = NULL;
 504         }
 505 #endif
 506         if (sh->pop_vlan_action) {
 507                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 508                 sh->pop_vlan_action = NULL;
 509         }
 510 #endif /* HAVE_MLX5DV_DR */
 511         if (sh->default_miss_action)
 512                 mlx5_glue->destroy_flow_action
 513                                 (sh->default_miss_action);
 514         if (sh->encaps_decaps) {
 515                 mlx5_hlist_destroy(sh->encaps_decaps);
 516                 sh->encaps_decaps = NULL;
 517         }
 518         if (sh->modify_cmds) {
 519                 mlx5_hlist_destroy(sh->modify_cmds);
 520                 sh->modify_cmds = NULL;
 521         }
 522         if (sh->tag_table) {
 523                 /* tags should be destroyed with flow before. */
 524                 mlx5_hlist_destroy(sh->tag_table);
 525                 sh->tag_table = NULL;
 526         }
 527         if (sh->tunnel_hub) {
 528                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 529                 sh->tunnel_hub = NULL;
 530         }
 531         mlx5_free_table_hash_list(priv);
 532         if (sh->port_id_action_list) {
 533                 mlx5_list_destroy(sh->port_id_action_list);
 534                 sh->port_id_action_list = NULL;
 535         }
 536         if (sh->push_vlan_action_list) {
 537                 mlx5_list_destroy(sh->push_vlan_action_list);
 538                 sh->push_vlan_action_list = NULL;
 539         }
 540         if (sh->sample_action_list) {
 541                 mlx5_list_destroy(sh->sample_action_list);
 542                 sh->sample_action_list = NULL;
 543         }
 544         if (sh->dest_array_list) {
 545                 mlx5_list_destroy(sh->dest_array_list);
 546                 sh->dest_array_list = NULL;
 547         }
 548 }
 549
 550 /**
 551  * Initialize shared data between primary and secondary process.
 552  *
 553  * A memzone is reserved by primary process and secondary processes attach to
 554  * the memzone.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 mlx5_init_shared_data(void)
 561 {
 562         const struct rte_memzone *mz;
 563         int ret = 0;
 564
 565         rte_spinlock_lock(&mlx5_shared_data_lock);
 566         if (mlx5_shared_data == NULL) {
 567                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 568                         /* Allocate shared memory. */
 569                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 570                                                  sizeof(*mlx5_shared_data),
 571                                                  SOCKET_ID_ANY, 0);
 572                         if (mz == NULL) {
 573                                 DRV_LOG(ERR,
 574                                         "Cannot allocate mlx5 shared data");
 575                                 ret = -rte_errno;
 576                                 goto error;
 577                         }
 578                         mlx5_shared_data = mz->addr;
 579                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 580                         rte_spinlock_init(&mlx5_shared_data->lock);
 581                 } else {
 582                         /* Lookup allocated shared memory. */
 583                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 584                         if (mz == NULL) {
 585                                 DRV_LOG(ERR,
 586                                         "Cannot attach mlx5 shared data");
 587                                 ret = -rte_errno;
 588                                 goto error;
 589                         }
 590                         mlx5_shared_data = mz->addr;
 591                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 592                 }
 593         }
 594 error:
 595         rte_spinlock_unlock(&mlx5_shared_data_lock);
 596         return ret;
 597 }
 598
 599 /**
 600  * PMD global initialization.
 601  *
 602  * Independent from individual device, this function initializes global
 603  * per-PMD data structures distinguishing primary and secondary processes.
 604  * Hence, each initialization is called once per a process.
 605  *
 606  * @return
 607  *   0 on success, a negative errno value otherwise and rte_errno is set.
 608  */
 609 static int
 610 mlx5_init_once(void)
 611 {
 612         struct mlx5_shared_data *sd;
 613         struct mlx5_local_data *ld = &mlx5_local_data;
 614         int ret = 0;
 615
 616         if (mlx5_init_shared_data())
 617                 return -rte_errno;
 618         sd = mlx5_shared_data;
 619         MLX5_ASSERT(sd);
 620         rte_spinlock_lock(&sd->lock);
 621         switch (rte_eal_process_type()) {
 622         case RTE_PROC_PRIMARY:
 623                 if (sd->init_done)
 624                         break;
 625                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 626                                            mlx5_mp_os_primary_handle);
 627                 if (ret)
 628                         goto out;
 629                 sd->init_done = true;
 630                 break;
 631         case RTE_PROC_SECONDARY:
 632                 if (ld->init_done)
 633                         break;
 634                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 635                                              mlx5_mp_os_secondary_handle);
 636                 if (ret)
 637                         goto out;
 638                 ++sd->secondary_cnt;
 639                 ld->init_done = true;
 640                 break;
 641         default:
 642                 break;
 643         }
 644 out:
 645         rte_spinlock_unlock(&sd->lock);
 646         return ret;
 647 }
 648
 649 /**
 650  * DV flow counter mode detect and config.
 651  *
 652  * @param dev
 653  *   Pointer to rte_eth_dev structure.
 654  *
 655  */
 656 static void
 657 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 658 {
 659 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 660         struct mlx5_priv *priv = dev->data->dev_private;
 661         struct mlx5_dev_ctx_shared *sh = priv->sh;
 662         bool fallback;
 663
 664 #ifndef HAVE_IBV_DEVX_ASYNC
 665         fallback = true;
 666 #else
 667         fallback = false;
 668         if (!sh->devx || !priv->config.dv_flow_en ||
 669             !priv->config.hca_attr.flow_counters_dump ||
 670             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 671             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 672                 fallback = true;
 673 #endif
 674         if (fallback)
 675                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 676                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 677                         priv->config.hca_attr.flow_counters_dump,
 678                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 679         /* Initialize fallback mode only on the port initializes sh. */
 680         if (sh->refcnt == 1)
 681                 sh->cmng.counter_fallback = fallback;
 682         else if (fallback != sh->cmng.counter_fallback)
 683                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 684                         "with others:%d.", PORT_ID(priv), fallback);
 685 #endif
 686 }
 687
 688 /**
 689  * DR flow drop action support detect.
 690  *
 691  * @param dev
 692  *   Pointer to rte_eth_dev structure.
 693  *
 694  */
 695 static void
 696 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 697 {
 698 #ifdef HAVE_MLX5DV_DR
 699         struct mlx5_priv *priv = dev->data->dev_private;
 700
 701         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 702                 return;
 703         /**
 704          * DR supports drop action placeholder when it is supported;
 705          * otherwise, use the queue drop action.
 706          */
 707         if (mlx5_flow_discover_dr_action_support(dev))
 708                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 709         else
 710                 priv->root_drop_action = priv->sh->dr_drop_action;
 711 #endif
 712 }
 713
 714 static void
 715 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 716 {
 717         struct mlx5_priv *priv = dev->data->dev_private;
 718         void *ctx = priv->sh->cdev->ctx;
 719
 720         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 721         if (!priv->q_counters) {
 722                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 723                 struct ibv_wq *wq;
 724
 725                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 726                         "by DevX - fall-back to use the kernel driver global "
 727                         "queue counter.", dev->data->port_id);
 728                 /* Create WQ by kernel and query its queue counter ID. */
 729                 if (cq) {
 730                         wq = mlx5_glue->create_wq(ctx,
 731                                                   &(struct ibv_wq_init_attr){
 732                                                     .wq_type = IBV_WQT_RQ,
 733                                                     .max_wr = 1,
 734                                                     .max_sge = 1,
 735                                                     .pd = priv->sh->cdev->pd,
 736                                                     .cq = cq,
 737                                                 });
 738                         if (wq) {
 739                                 /* Counter is assigned only on RDY state. */
 740                                 int ret = mlx5_glue->modify_wq(wq,
 741                                                  &(struct ibv_wq_attr){
 742                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 743                                                  .wq_state = IBV_WQS_RDY,
 744                                                 });
 745
 746                                 if (ret == 0)
 747                                         mlx5_devx_cmd_wq_query(wq,
 748                                                          &priv->counter_set_id);
 749                                 claim_zero(mlx5_glue->destroy_wq(wq));
 750                         }
 751                         claim_zero(mlx5_glue->destroy_cq(cq));
 752                 }
 753         } else {
 754                 priv->counter_set_id = priv->q_counters->id;
 755         }
 756         if (priv->counter_set_id == 0)
 757                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 758                         "available.", dev->data->port_id);
 759 }
 760
 761 /**
 762  * Check if representor spawn info match devargs.
 763  *
 764  * @param spawn
 765  *   Verbs device parameters (name, port, switch_info) to spawn.
 766  * @param eth_da
 767  *   Device devargs to probe.
 768  *
 769  * @return
 770  *   Match result.
 771  */
 772 static bool
 773 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 774                        struct rte_eth_devargs *eth_da)
 775 {
 776         struct mlx5_switch_info *switch_info = &spawn->info;
 777         unsigned int p, f;
 778         uint16_t id;
 779         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 780                                                       eth_da->type);
 781
 782         switch (eth_da->type) {
 783         case RTE_ETH_REPRESENTOR_SF:
 784                 if (!(spawn->info.port_name == -1 &&
 785                       switch_info->name_type ==
 786                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 787                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 788                         rte_errno = EBUSY;
 789                         return false;
 790                 }
 791                 break;
 792         case RTE_ETH_REPRESENTOR_VF:
 793                 /* Allows HPF representor index -1 as exception. */
 794                 if (!(spawn->info.port_name == -1 &&
 795                       switch_info->name_type ==
 796                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 797                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 798                         rte_errno = EBUSY;
 799                         return false;
 800                 }
 801                 break;
 802         case RTE_ETH_REPRESENTOR_NONE:
 803                 rte_errno = EBUSY;
 804                 return false;
 805         default:
 806                 rte_errno = ENOTSUP;
 807                 DRV_LOG(ERR, "unsupported representor type");
 808                 return false;
 809         }
 810         /* Check representor ID: */
 811         for (p = 0; p < eth_da->nb_ports; ++p) {
 812                 if (spawn->pf_bond < 0) {
 813                         /* For non-LAG mode, allow and ignore pf. */
 814                         switch_info->pf_num = eth_da->ports[p];
 815                         repr_id = mlx5_representor_id_encode(switch_info,
 816                                                              eth_da->type);
 817                 }
 818                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 819                         id = MLX5_REPRESENTOR_ID
 820                                 (eth_da->ports[p], eth_da->type,
 821                                  eth_da->representor_ports[f]);
 822                         if (repr_id == id)
 823                                 return true;
 824                 }
 825         }
 826         rte_errno = EBUSY;
 827         return false;
 828 }
 829
 830
 831 /**
 832  * Spawn an Ethernet device from Verbs information.
 833  *
 834  * @param dpdk_dev
 835  *   Backing DPDK device.
 836  * @param spawn
 837  *   Verbs device parameters (name, port, switch_info) to spawn.
 838  * @param config
 839  *   Device configuration parameters.
 840  * @param eth_da
 841  *   Device arguments.
 842  *
 843  * @return
 844  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 845  *   is set. The following errors are defined:
 846  *
 847  *   EBUSY: device is not supposed to be spawned.
 848  *   EEXIST: device is already spawned
 849  */
 850 static struct rte_eth_dev *
 851 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 852                struct mlx5_dev_spawn_data *spawn,
 853                struct mlx5_dev_config *config,
 854                struct rte_eth_devargs *eth_da)
 855 {
 856         const struct mlx5_switch_info *switch_info = &spawn->info;
 857         struct mlx5_dev_ctx_shared *sh = NULL;
 858         struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 859         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 860         struct rte_eth_dev *eth_dev = NULL;
 861         struct mlx5_priv *priv = NULL;
 862         int err = 0;
 863         unsigned int hw_padding = 0;
 864         unsigned int mps;
 865         unsigned int mpls_en = 0;
 866         unsigned int swp = 0;
 867         unsigned int mprq = 0;
 868         unsigned int mprq_min_stride_size_n = 0;
 869         unsigned int mprq_max_stride_size_n = 0;
 870         unsigned int mprq_min_stride_num_n = 0;
 871         unsigned int mprq_max_stride_num_n = 0;
 872         struct rte_ether_addr mac;
 873         char name[RTE_ETH_NAME_MAX_LEN];
 874         int own_domain_id = 0;
 875         uint16_t port_id;
 876         struct mlx5_port_info vport_info = { .query_flags = 0 };
 877         int nl_rdma = -1;
 878         int i;
 879
 880         /* Determine if this port representor is supposed to be spawned. */
 881         if (switch_info->representor && dpdk_dev->devargs &&
 882             !mlx5_representor_match(spawn, eth_da))
 883                 return NULL;
 884         /* Build device name. */
 885         if (spawn->pf_bond < 0) {
 886                 /* Single device. */
 887                 if (!switch_info->representor)
 888                         strlcpy(name, dpdk_dev->name, sizeof(name));
 889                 else
 890                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 891                                  dpdk_dev->name,
 892                                  switch_info->name_type ==
 893                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 894                                  switch_info->port_name);
 895         } else {
 896                 /* Bonding device. */
 897                 if (!switch_info->representor) {
 898                         err = snprintf(name, sizeof(name), "%s_%s",
 899                                        dpdk_dev->name, spawn->phys_dev_name);
 900                 } else {
 901                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 902                                 dpdk_dev->name, spawn->phys_dev_name,
 903                                 switch_info->ctrl_num,
 904                                 switch_info->pf_num,
 905                                 switch_info->name_type ==
 906                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 907                                 switch_info->port_name);
 908                 }
 909         }
 910         if (err >= (int)sizeof(name))
 911                 DRV_LOG(WARNING, "device name overflow %s", name);
 912         /* check if the device is already spawned */
 913         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 914                 rte_errno = EEXIST;
 915                 return NULL;
 916         }
 917         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 918         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 919                 struct mlx5_mp_id mp_id;
 920
 921                 eth_dev = rte_eth_dev_attach_secondary(name);
 922                 if (eth_dev == NULL) {
 923                         DRV_LOG(ERR, "can not attach rte ethdev");
 924                         rte_errno = ENOMEM;
 925                         return NULL;
 926                 }
 927                 eth_dev->device = dpdk_dev;
 928                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 929                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 930                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 931                 err = mlx5_proc_priv_init(eth_dev);
 932                 if (err)
 933                         return NULL;
 934                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
 935                 /* Receive command fd from primary process */
 936                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 937                 if (err < 0)
 938                         goto err_secondary;
 939                 /* Remap UAR for Tx queues. */
 940                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 941                 if (err)
 942                         goto err_secondary;
 943                 /*
 944                  * Ethdev pointer is still required as input since
 945                  * the primary device is not accessible from the
 946                  * secondary process.
 947                  */
 948                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 949                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 950                 return eth_dev;
 951 err_secondary:
 952                 mlx5_dev_close(eth_dev);
 953                 return NULL;
 954         }
 955         /*
 956          * Some parameters ("tx_db_nc" in particularly) are needed in
 957          * advance to create dv/verbs device context. We proceed the
 958          * devargs here to get ones, and later proceed devargs again
 959          * to override some hardware settings.
 960          */
 961         err = mlx5_args(config, dpdk_dev->devargs);
 962         if (err) {
 963                 err = rte_errno;
 964                 DRV_LOG(ERR, "failed to process device arguments: %s",
 965                         strerror(rte_errno));
 966                 goto error;
 967         }
 968         if (config->dv_miss_info) {
 969                 if (switch_info->master || switch_info->representor)
 970                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 971         }
 972         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 973         if (!sh)
 974                 return NULL;
 975 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 976         config->dest_tir = 1;
 977 #endif
 978 #ifdef HAVE_IBV_MLX5_MOD_SWP
 979         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 980 #endif
 981         /*
 982          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 983          * as all ConnectX-5 devices.
 984          */
 985 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 986         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 987 #endif
 988 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 989         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 990 #endif
 991         mlx5_glue->dv_query_device(sh->cdev->ctx, &dv_attr);
 992         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 993                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 994                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 995                         mps = MLX5_MPW_ENHANCED;
 996                 } else {
 997                         DRV_LOG(DEBUG, "MPW is supported");
 998                         mps = MLX5_MPW;
 999                 }
1000         } else {
1001                 DRV_LOG(DEBUG, "MPW isn't supported");
1002                 mps = MLX5_MPW_DISABLED;
1003         }
1004 #ifdef HAVE_IBV_MLX5_MOD_SWP
1005         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1006                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1007         DRV_LOG(DEBUG, "SWP support: %u", swp);
1008 #endif
1009         config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1010                 MLX5_SW_PARSING_TSO_CAP);
1011 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1012         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1013                 struct mlx5dv_striding_rq_caps mprq_caps =
1014                         dv_attr.striding_rq_caps;
1015
1016                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1017                         mprq_caps.min_single_stride_log_num_of_bytes);
1018                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1019                         mprq_caps.max_single_stride_log_num_of_bytes);
1020                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1021                         mprq_caps.min_single_wqe_log_num_of_strides);
1022                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1023                         mprq_caps.max_single_wqe_log_num_of_strides);
1024                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1025                         mprq_caps.supported_qpts);
1026                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1027                 mprq = 1;
1028                 mprq_min_stride_size_n =
1029                         mprq_caps.min_single_stride_log_num_of_bytes;
1030                 mprq_max_stride_size_n =
1031                         mprq_caps.max_single_stride_log_num_of_bytes;
1032                 mprq_min_stride_num_n =
1033                         mprq_caps.min_single_wqe_log_num_of_strides;
1034                 mprq_max_stride_num_n =
1035                         mprq_caps.max_single_wqe_log_num_of_strides;
1036         }
1037 #endif
1038         /* Rx CQE compression is enabled by default. */
1039         config->cqe_comp = 1;
1040 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1041         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1042                 config->tunnel_en = dv_attr.tunnel_offloads_caps &
1043                              (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1044                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1045                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1046         }
1047         if (config->tunnel_en) {
1048                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1049                 config->tunnel_en &
1050                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1051                 config->tunnel_en &
1052                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1053                 config->tunnel_en &
1054                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1055                 );
1056         } else {
1057                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1058         }
1059 #else
1060         DRV_LOG(WARNING,
1061                 "tunnel offloading disabled due to old OFED/rdma-core version");
1062 #endif
1063 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1064         mpls_en = ((dv_attr.tunnel_offloads_caps &
1065                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1066                    (dv_attr.tunnel_offloads_caps &
1067                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1068         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1069                 mpls_en ? "" : "not ");
1070 #else
1071         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1072                 " old OFED/rdma-core version or firmware configuration");
1073 #endif
1074         config->mpls_en = mpls_en;
1075         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1076         /* Check port status. */
1077         if (spawn->phys_port <= UINT8_MAX) {
1078                 /* Legacy Verbs api only support u8 port number. */
1079                 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1080                                             &port_attr);
1081                 if (err) {
1082                         DRV_LOG(ERR, "port query failed: %s", strerror(err));
1083                         goto error;
1084                 }
1085                 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1086                         DRV_LOG(ERR, "port is not configured in Ethernet mode");
1087                         err = EINVAL;
1088                         goto error;
1089                 }
1090         } else if (nl_rdma >= 0) {
1091                 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1092                 err = mlx5_nl_port_state(nl_rdma,
1093                         spawn->phys_dev_name,
1094                         spawn->phys_port);
1095                 if (err < 0) {
1096                         DRV_LOG(INFO, "Failed to get netlink port state: %s",
1097                                 strerror(rte_errno));
1098                         err = -rte_errno;
1099                         goto error;
1100                 }
1101                 port_attr.state = (enum ibv_port_state)err;
1102         }
1103         if (port_attr.state != IBV_PORT_ACTIVE)
1104                 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1105                         mlx5_glue->port_state_str(port_attr.state),
1106                         port_attr.state);
1107         /* Allocate private eth device data. */
1108         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1109                            sizeof(*priv),
1110                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1111         if (priv == NULL) {
1112                 DRV_LOG(ERR, "priv allocation failure");
1113                 err = ENOMEM;
1114                 goto error;
1115         }
1116         priv->sh = sh;
1117         priv->dev_port = spawn->phys_port;
1118         priv->pci_dev = spawn->pci_dev;
1119         priv->mtu = RTE_ETHER_MTU;
1120         /* Some internal functions rely on Netlink sockets, open them now. */
1121         priv->nl_socket_rdma = nl_rdma;
1122         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1123         priv->representor = !!switch_info->representor;
1124         priv->master = !!switch_info->master;
1125         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1126         priv->vport_meta_tag = 0;
1127         priv->vport_meta_mask = 0;
1128         priv->pf_bond = spawn->pf_bond;
1129
1130         DRV_LOG(DEBUG,
1131                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1132                 priv->dev_port, dpdk_dev->bus->name,
1133                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1134                 priv->master, priv->representor, priv->pf_bond);
1135
1136         /*
1137          * If we have E-Switch we should determine the vport attributes.
1138          * E-Switch may use either source vport field or reg_c[0] metadata
1139          * register to match on vport index. The engaged part of metadata
1140          * register is defined by mask.
1141          */
1142         if (switch_info->representor || switch_info->master) {
1143                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1144                                                  spawn->phys_port,
1145                                                  &vport_info);
1146                 if (err) {
1147                         DRV_LOG(WARNING,
1148                                 "Cannot query devx port %d on device %s",
1149                                 spawn->phys_port, spawn->phys_dev_name);
1150                         vport_info.query_flags = 0;
1151                 }
1152         }
1153         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1154                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1155                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1156                 if (!priv->vport_meta_mask) {
1157                         DRV_LOG(ERR,
1158                                 "vport zero mask for port %d on bonding device %s",
1159                                 spawn->phys_port, spawn->phys_dev_name);
1160                         err = ENOTSUP;
1161                         goto error;
1162                 }
1163                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1164                         DRV_LOG(ERR,
1165                                 "Invalid vport tag for port %d on bonding device %s",
1166                                 spawn->phys_port, spawn->phys_dev_name);
1167                         err = ENOTSUP;
1168                         goto error;
1169                 }
1170         }
1171         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1172                 priv->vport_id = vport_info.vport_id;
1173         } else if (spawn->pf_bond >= 0 &&
1174                    (switch_info->representor || switch_info->master)) {
1175                 DRV_LOG(ERR,
1176                         "Cannot deduce vport index for port %d on bonding device %s",
1177                         spawn->phys_port, spawn->phys_dev_name);
1178                 err = ENOTSUP;
1179                 goto error;
1180         } else {
1181                 /*
1182                  * Suppose vport index in compatible way. Kernel/rdma_core
1183                  * support single E-Switch per PF configurations only and
1184                  * vport_id field contains the vport index for associated VF,
1185                  * which is deduced from representor port name.
1186                  * For example, let's have the IB device port 10, it has
1187                  * attached network device eth0, which has port name attribute
1188                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1189                  * as 3 (2+1). This assigning schema should be changed if the
1190                  * multiple E-Switch instances per PF configurations or/and PCI
1191                  * subfunctions are added.
1192                  */
1193                 priv->vport_id = switch_info->representor ?
1194                                  switch_info->port_name + 1 : -1;
1195         }
1196         priv->representor_id = mlx5_representor_id_encode(switch_info,
1197                                                           eth_da->type);
1198         /*
1199          * Look for sibling devices in order to reuse their switch domain
1200          * if any, otherwise allocate one.
1201          */
1202         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1203                 const struct mlx5_priv *opriv =
1204                         rte_eth_devices[port_id].data->dev_private;
1205
1206                 if (!opriv ||
1207                     opriv->sh != priv->sh ||
1208                         opriv->domain_id ==
1209                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1210                         continue;
1211                 priv->domain_id = opriv->domain_id;
1212                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1213                         priv->dev_port, priv->domain_id);
1214                 break;
1215         }
1216         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1217                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1218                 if (err) {
1219                         err = rte_errno;
1220                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1221                                 strerror(rte_errno));
1222                         goto error;
1223                 }
1224                 own_domain_id = 1;
1225                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1226                         priv->dev_port, priv->domain_id);
1227         }
1228         /* Override some values set by hardware configuration. */
1229         mlx5_args(config, dpdk_dev->devargs);
1230         err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev);
1231         if (err)
1232                 goto error;
1233         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1234                             IBV_DEVICE_RAW_IP_CSUM);
1235         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1236                 (config->hw_csum ? "" : "not "));
1237 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1238         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1239         DRV_LOG(DEBUG, "counters are not supported");
1240 #endif
1241 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1242         if (config->dv_flow_en) {
1243                 DRV_LOG(WARNING, "DV flow is not supported");
1244                 config->dv_flow_en = 0;
1245         }
1246 #endif
1247         if (spawn->max_port > UINT8_MAX) {
1248                 /* Verbs can't support ports larger than 255 by design. */
1249                 DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
1250                 err = EINVAL;
1251                 goto error;
1252         }
1253         config->ind_table_max_size =
1254                 sh->device_attr.max_rwq_indirection_table_size;
1255         /*
1256          * Remove this check once DPDK supports larger/variable
1257          * indirection tables.
1258          */
1259         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1260                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1261         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1262                 config->ind_table_max_size);
1263         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1264                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1265         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1266                 (config->hw_vlan_strip ? "" : "not "));
1267         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1268                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1269 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1270         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1271 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1272         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1273                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1274 #endif
1275         if (config->hw_padding && !hw_padding) {
1276                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1277                 config->hw_padding = 0;
1278         } else if (config->hw_padding) {
1279                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1280         }
1281         config->tso = (sh->device_attr.max_tso > 0 &&
1282                       (sh->device_attr.tso_supported_qpts &
1283                        (1 << IBV_QPT_RAW_PACKET)));
1284         if (config->tso)
1285                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1286         /*
1287          * MPW is disabled by default, while the Enhanced MPW is enabled
1288          * by default.
1289          */
1290         if (config->mps == MLX5_ARG_UNSET)
1291                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1292                                                           MLX5_MPW_DISABLED;
1293         else
1294                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1295         DRV_LOG(INFO, "%sMPS is %s",
1296                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1297                 config->mps == MLX5_MPW ? "legacy " : "",
1298                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1299         if (sh->devx) {
1300                 config->hca_attr = sh->cdev->config.hca_attr;
1301                 sh->steering_format_version =
1302                         config->hca_attr.steering_format_version;
1303                 /* Check for LRO support. */
1304                 if (config->dest_tir && config->hca_attr.lro_cap &&
1305                     config->dv_flow_en) {
1306                         /* TBD check tunnel lro caps. */
1307                         config->lro.supported = config->hca_attr.lro_cap;
1308                         DRV_LOG(DEBUG, "Device supports LRO");
1309                         /*
1310                          * If LRO timeout is not configured by application,
1311                          * use the minimal supported value.
1312                          */
1313                         if (!config->lro.timeout)
1314                                 config->lro.timeout =
1315                                 config->hca_attr.lro_timer_supported_periods[0];
1316                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1317                                 config->lro.timeout);
1318                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1319                                 "required for coalescing is %d bytes",
1320                                 config->hca_attr.lro_min_mss_size);
1321                 }
1322 #if defined(HAVE_MLX5DV_DR) && \
1323         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1324          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1325                 if (config->hca_attr.qos.sup &&
1326                     config->hca_attr.qos.flow_meter_old &&
1327                     config->dv_flow_en) {
1328                         uint8_t reg_c_mask =
1329                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1330                         /*
1331                          * Meter needs two REG_C's for color match and pre-sfx
1332                          * flow match. Here get the REG_C for color match.
1333                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1334                          */
1335                         reg_c_mask &= 0xfc;
1336                         if (__builtin_popcount(reg_c_mask) < 1) {
1337                                 priv->mtr_en = 0;
1338                                 DRV_LOG(WARNING, "No available register for"
1339                                         " meter.");
1340                         } else {
1341                                 /*
1342                                  * The meter color register is used by the
1343                                  * flow-hit feature as well.
1344                                  * The flow-hit feature must use REG_C_3
1345                                  * Prefer REG_C_3 if it is available.
1346                                  */
1347                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1348                                         priv->mtr_color_reg = REG_C_3;
1349                                 else
1350                                         priv->mtr_color_reg = ffs(reg_c_mask)
1351                                                               - 1 + REG_C_0;
1352                                 priv->mtr_en = 1;
1353                                 priv->mtr_reg_share =
1354                                       config->hca_attr.qos.flow_meter;
1355                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1356                                         priv->mtr_color_reg);
1357                         }
1358                 }
1359                 if (config->hca_attr.qos.sup &&
1360                         config->hca_attr.qos.flow_meter_aso_sup) {
1361                         uint32_t log_obj_size =
1362                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1363                         if (log_obj_size >=
1364                         config->hca_attr.qos.log_meter_aso_granularity &&
1365                         log_obj_size <=
1366                         config->hca_attr.qos.log_meter_aso_max_alloc)
1367                                 sh->meter_aso_en = 1;
1368                 }
1369                 if (priv->mtr_en) {
1370                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1371                         if (err) {
1372                                 err = -err;
1373                                 goto error;
1374                         }
1375                 }
1376                 if (config->hca_attr.flow.tunnel_header_0_1)
1377                         sh->tunnel_header_0_1 = 1;
1378 #endif
1379 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1380                 if (config->hca_attr.flow_hit_aso &&
1381                     priv->mtr_color_reg == REG_C_3) {
1382                         sh->flow_hit_aso_en = 1;
1383                         err = mlx5_flow_aso_age_mng_init(sh);
1384                         if (err) {
1385                                 err = -err;
1386                                 goto error;
1387                         }
1388                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1389                 }
1390 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1391 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1392         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1393                 if (config->hca_attr.ct_offload &&
1394                     priv->mtr_color_reg == REG_C_3) {
1395                         err = mlx5_flow_aso_ct_mng_init(sh);
1396                         if (err) {
1397                                 err = -err;
1398                                 goto error;
1399                         }
1400                         DRV_LOG(DEBUG, "CT ASO is supported.");
1401                         sh->ct_aso_en = 1;
1402                 }
1403 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1404 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1405                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1406                     config->dv_flow_en) {
1407                         priv->sampler_en = 1;
1408                         DRV_LOG(DEBUG, "Sampler enabled!");
1409                 } else {
1410                         priv->sampler_en = 0;
1411                         if (!config->hca_attr.log_max_ft_sampler_num)
1412                                 DRV_LOG(WARNING,
1413                                         "No available register for sampler.");
1414                         else
1415                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1416                 }
1417 #endif
1418         }
1419         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1420             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1421                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1422                 config->cqe_comp = 0;
1423         }
1424         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1425             (!sh->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1426                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1427                                  " format isn't supported.");
1428                 config->cqe_comp = 0;
1429         }
1430         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1431             (!sh->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1432                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1433                                  " format isn't supported.");
1434                 config->cqe_comp = 0;
1435         }
1436         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1437                         config->cqe_comp ? "" : "not ");
1438         if (config->tx_pp) {
1439                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1440                         config->hca_attr.dev_freq_khz);
1441                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1442                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1443                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1444                         config->hca_attr.cross_channel ? "" : "not ");
1445                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1446                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1447                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1448                         config->hca_attr.non_wire_sq ? "" : "not ");
1449                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1450                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1451                         config->hca_attr.log_max_static_sq_wq);
1452                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1453                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1454                 if (!sh->devx) {
1455                         DRV_LOG(ERR, "DevX is required for packet pacing");
1456                         err = ENODEV;
1457                         goto error;
1458                 }
1459                 if (!config->hca_attr.qos.packet_pacing) {
1460                         DRV_LOG(ERR, "Packet pacing is not supported");
1461                         err = ENODEV;
1462                         goto error;
1463                 }
1464                 if (!config->hca_attr.cross_channel) {
1465                         DRV_LOG(ERR, "Cross channel operations are"
1466                                      " required for packet pacing");
1467                         err = ENODEV;
1468                         goto error;
1469                 }
1470                 if (!config->hca_attr.wqe_index_ignore) {
1471                         DRV_LOG(ERR, "WQE index ignore feature is"
1472                                      " required for packet pacing");
1473                         err = ENODEV;
1474                         goto error;
1475                 }
1476                 if (!config->hca_attr.non_wire_sq) {
1477                         DRV_LOG(ERR, "Non-wire SQ feature is"
1478                                      " required for packet pacing");
1479                         err = ENODEV;
1480                         goto error;
1481                 }
1482                 if (!config->hca_attr.log_max_static_sq_wq) {
1483                         DRV_LOG(ERR, "Static WQE SQ feature is"
1484                                      " required for packet pacing");
1485                         err = ENODEV;
1486                         goto error;
1487                 }
1488                 if (!config->hca_attr.qos.wqe_rate_pp) {
1489                         DRV_LOG(ERR, "WQE rate mode is required"
1490                                      " for packet pacing");
1491                         err = ENODEV;
1492                         goto error;
1493                 }
1494 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1495                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1496                              " can't create queues for packet pacing");
1497                 err = ENODEV;
1498                 goto error;
1499 #endif
1500         }
1501         if (sh->devx) {
1502                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1503
1504                 err = config->hca_attr.access_register_user ?
1505                         mlx5_devx_cmd_register_read
1506                                 (sh->cdev->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1507                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1508                 if (!err) {
1509                         uint32_t ts_mode;
1510
1511                         /* MTUTC register is read successfully. */
1512                         ts_mode = MLX5_GET(register_mtutc, reg,
1513                                            time_stamp_mode);
1514                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1515                                 config->rt_timestamp = 1;
1516                 } else {
1517                         /* Kernel does not support register reading. */
1518                         if (config->hca_attr.dev_freq_khz ==
1519                                                  (NS_PER_S / MS_PER_S))
1520                                 config->rt_timestamp = 1;
1521                 }
1522         }
1523         /*
1524          * If HW has bug working with tunnel packet decapsulation and
1525          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1526          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1527          */
1528         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1529                 config->hw_fcs_strip = 0;
1530         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1531                 (config->hw_fcs_strip ? "" : "not "));
1532         if (config->mprq.enabled && mprq) {
1533                 if (config->mprq.stride_num_n &&
1534                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1535                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1536                         config->mprq.stride_num_n =
1537                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1538                                                 mprq_min_stride_num_n),
1539                                         mprq_max_stride_num_n);
1540                         DRV_LOG(WARNING,
1541                                 "the number of strides"
1542                                 " for Multi-Packet RQ is out of range,"
1543                                 " setting default value (%u)",
1544                                 1 << config->mprq.stride_num_n);
1545                 }
1546                 if (config->mprq.stride_size_n &&
1547                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1548                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1549                         config->mprq.stride_size_n =
1550                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1551                                                 mprq_min_stride_size_n),
1552                                         mprq_max_stride_size_n);
1553                         DRV_LOG(WARNING,
1554                                 "the size of a stride"
1555                                 " for Multi-Packet RQ is out of range,"
1556                                 " setting default value (%u)",
1557                                 1 << config->mprq.stride_size_n);
1558                 }
1559                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1560                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1561         } else if (config->mprq.enabled && !mprq) {
1562                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1563                 config->mprq.enabled = 0;
1564         }
1565         if (config->max_dump_files_num == 0)
1566                 config->max_dump_files_num = 128;
1567         eth_dev = rte_eth_dev_allocate(name);
1568         if (eth_dev == NULL) {
1569                 DRV_LOG(ERR, "can not allocate rte ethdev");
1570                 err = ENOMEM;
1571                 goto error;
1572         }
1573         if (priv->representor) {
1574                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1575                 eth_dev->data->representor_id = priv->representor_id;
1576                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1577                         struct mlx5_priv *opriv =
1578                                 rte_eth_devices[port_id].data->dev_private;
1579                         if (opriv &&
1580                             opriv->master &&
1581                             opriv->domain_id == priv->domain_id &&
1582                             opriv->sh == priv->sh) {
1583                                 eth_dev->data->backer_port_id = port_id;
1584                                 break;
1585                         }
1586                 }
1587                 if (port_id >= RTE_MAX_ETHPORTS)
1588                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1589         }
1590         priv->mp_id.port_id = eth_dev->data->port_id;
1591         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1592         /*
1593          * Store associated network device interface index. This index
1594          * is permanent throughout the lifetime of device. So, we may store
1595          * the ifindex here and use the cached value further.
1596          */
1597         MLX5_ASSERT(spawn->ifindex);
1598         priv->if_index = spawn->ifindex;
1599         eth_dev->data->dev_private = priv;
1600         priv->dev_data = eth_dev->data;
1601         eth_dev->data->mac_addrs = priv->mac;
1602         eth_dev->device = dpdk_dev;
1603         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1604         /* Configure the first MAC address by default. */
1605         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1606                 DRV_LOG(ERR,
1607                         "port %u cannot get MAC address, is mlx5_en"
1608                         " loaded? (errno: %s)",
1609                         eth_dev->data->port_id, strerror(rte_errno));
1610                 err = ENODEV;
1611                 goto error;
1612         }
1613         DRV_LOG(INFO,
1614                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1615                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1616 #ifdef RTE_LIBRTE_MLX5_DEBUG
1617         {
1618                 char ifname[MLX5_NAMESIZE];
1619
1620                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1621                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1622                                 eth_dev->data->port_id, ifname);
1623                 else
1624                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1625                                 eth_dev->data->port_id);
1626         }
1627 #endif
1628         /* Get actual MTU if possible. */
1629         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1630         if (err) {
1631                 err = rte_errno;
1632                 goto error;
1633         }
1634         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1635                 priv->mtu);
1636         /* Initialize burst functions to prevent crashes before link-up. */
1637         eth_dev->rx_pkt_burst = removed_rx_burst;
1638         eth_dev->tx_pkt_burst = removed_tx_burst;
1639         eth_dev->dev_ops = &mlx5_dev_ops;
1640         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1641         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1642         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1643         /* Register MAC address. */
1644         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1645         if (config->vf && config->vf_nl_en)
1646                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1647                                       mlx5_ifindex(eth_dev),
1648                                       eth_dev->data->mac_addrs,
1649                                       MLX5_MAX_MAC_ADDRESSES);
1650         priv->ctrl_flows = 0;
1651         rte_spinlock_init(&priv->flow_list_lock);
1652         TAILQ_INIT(&priv->flow_meters);
1653         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1654         if (!priv->mtr_profile_tbl)
1655                 goto error;
1656         /* Bring Ethernet device up. */
1657         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1658                 eth_dev->data->port_id);
1659         mlx5_set_link_up(eth_dev);
1660         /*
1661          * Even though the interrupt handler is not installed yet,
1662          * interrupts will still trigger on the async_fd from
1663          * Verbs context returned by ibv_open_device().
1664          */
1665         mlx5_link_update(eth_dev, 0);
1666 #ifdef HAVE_MLX5DV_DR_ESWITCH
1667         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1668               (switch_info->representor || switch_info->master)))
1669                 config->dv_esw_en = 0;
1670 #else
1671         config->dv_esw_en = 0;
1672 #endif
1673         /* Detect minimal data bytes to inline. */
1674         mlx5_set_min_inline(spawn, config);
1675         /* Store device configuration on private structure. */
1676         priv->config = *config;
1677         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1678                 icfg[i].release_mem_en = !!config->reclaim_mode;
1679                 if (config->reclaim_mode)
1680                         icfg[i].per_core_cache = 0;
1681                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1682                 if (!priv->flows[i])
1683                         goto error;
1684         }
1685         /* Create context for virtual machine VLAN workaround. */
1686         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1687         if (config->dv_flow_en) {
1688                 err = mlx5_alloc_shared_dr(priv);
1689                 if (err)
1690                         goto error;
1691         }
1692         if (sh->devx && config->dv_flow_en && config->dest_tir) {
1693                 priv->obj_ops = devx_obj_ops;
1694                 priv->obj_ops.drop_action_create =
1695                                                 ibv_obj_ops.drop_action_create;
1696                 priv->obj_ops.drop_action_destroy =
1697                                                 ibv_obj_ops.drop_action_destroy;
1698                 mlx5_queue_counter_id_prepare(eth_dev);
1699                 priv->obj_ops.lb_dummy_queue_create =
1700                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1701                 priv->obj_ops.lb_dummy_queue_release =
1702                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1703         } else {
1704                 priv->obj_ops = ibv_obj_ops;
1705         }
1706         if (config->tx_pp &&
1707             (priv->config.dv_esw_en ||
1708              priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new)) {
1709                 /*
1710                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1711                  * packet pacing and already checked above.
1712                  * Hence, we should only make sure the SQs will be created
1713                  * with DevX, not with Verbs.
1714                  * Verbs allocates the SQ UAR on its own and it can't be shared
1715                  * with Clock Queue UAR as required for Tx scheduling.
1716                  */
1717                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1718                 err = ENODEV;
1719                 goto error;
1720         }
1721         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1722         if (!priv->drop_queue.hrxq)
1723                 goto error;
1724         /* Supported Verbs flow priority number detection. */
1725         err = mlx5_flow_discover_priorities(eth_dev);
1726         if (err < 0) {
1727                 err = -err;
1728                 goto error;
1729         }
1730         priv->config.flow_prio = err;
1731         if (!priv->config.dv_esw_en &&
1732             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1733                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1734                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1735                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1736         }
1737         mlx5_set_metadata_mask(eth_dev);
1738         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1739             !priv->sh->dv_regc0_mask) {
1740                 DRV_LOG(ERR, "metadata mode %u is not supported "
1741                              "(no metadata reg_c[0] is available)",
1742                              priv->config.dv_xmeta_en);
1743                         err = ENOTSUP;
1744                         goto error;
1745         }
1746         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1747                                        mlx5_hrxq_create_cb,
1748                                        mlx5_hrxq_match_cb,
1749                                        mlx5_hrxq_remove_cb,
1750                                        mlx5_hrxq_clone_cb,
1751                                        mlx5_hrxq_clone_free_cb);
1752         if (!priv->hrxqs)
1753                 goto error;
1754         rte_rwlock_init(&priv->ind_tbls_lock);
1755         /* Query availability of metadata reg_c's. */
1756         err = mlx5_flow_discover_mreg_c(eth_dev);
1757         if (err < 0) {
1758                 err = -err;
1759                 goto error;
1760         }
1761         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1762                 DRV_LOG(DEBUG,
1763                         "port %u extensive metadata register is not supported",
1764                         eth_dev->data->port_id);
1765                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1766                         DRV_LOG(ERR, "metadata mode %u is not supported "
1767                                      "(no metadata registers available)",
1768                                      priv->config.dv_xmeta_en);
1769                         err = ENOTSUP;
1770                         goto error;
1771                 }
1772         }
1773         if (priv->config.dv_flow_en &&
1774             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1775             mlx5_flow_ext_mreg_supported(eth_dev) &&
1776             priv->sh->dv_regc0_mask) {
1777                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1778                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1779                                                       false, true, eth_dev,
1780                                                       flow_dv_mreg_create_cb,
1781                                                       flow_dv_mreg_match_cb,
1782                                                       flow_dv_mreg_remove_cb,
1783                                                       flow_dv_mreg_clone_cb,
1784                                                     flow_dv_mreg_clone_free_cb);
1785                 if (!priv->mreg_cp_tbl) {
1786                         err = ENOMEM;
1787                         goto error;
1788                 }
1789         }
1790         rte_spinlock_init(&priv->shared_act_sl);
1791         mlx5_flow_counter_mode_config(eth_dev);
1792         mlx5_flow_drop_action_config(eth_dev);
1793         if (priv->config.dv_flow_en)
1794                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1795         return eth_dev;
1796 error:
1797         if (priv) {
1798                 if (priv->mreg_cp_tbl)
1799                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1800                 if (priv->sh)
1801                         mlx5_os_free_shared_dr(priv);
1802                 if (priv->nl_socket_route >= 0)
1803                         close(priv->nl_socket_route);
1804                 if (priv->vmwa_context)
1805                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1806                 if (eth_dev && priv->drop_queue.hrxq)
1807                         mlx5_drop_action_destroy(eth_dev);
1808                 if (priv->mtr_profile_tbl)
1809                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1810                 if (own_domain_id)
1811                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1812                 if (priv->hrxqs)
1813                         mlx5_list_destroy(priv->hrxqs);
1814                 mlx5_free(priv);
1815                 if (eth_dev != NULL)
1816                         eth_dev->data->dev_private = NULL;
1817         }
1818         if (eth_dev != NULL) {
1819                 /* mac_addrs must not be freed alone because part of
1820                  * dev_private
1821                  **/
1822                 eth_dev->data->mac_addrs = NULL;
1823                 rte_eth_dev_release_port(eth_dev);
1824         }
1825         if (sh)
1826                 mlx5_free_shared_dev_ctx(sh);
1827         if (nl_rdma >= 0)
1828                 close(nl_rdma);
1829         MLX5_ASSERT(err > 0);
1830         rte_errno = err;
1831         return NULL;
1832 }
1833
1834 /**
1835  * Comparison callback to sort device data.
1836  *
1837  * This is meant to be used with qsort().
1838  *
1839  * @param a[in]
1840  *   Pointer to pointer to first data object.
1841  * @param b[in]
1842  *   Pointer to pointer to second data object.
1843  *
1844  * @return
1845  *   0 if both objects are equal, less than 0 if the first argument is less
1846  *   than the second, greater than 0 otherwise.
1847  */
1848 static int
1849 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1850 {
1851         const struct mlx5_switch_info *si_a =
1852                 &((const struct mlx5_dev_spawn_data *)a)->info;
1853         const struct mlx5_switch_info *si_b =
1854                 &((const struct mlx5_dev_spawn_data *)b)->info;
1855         int ret;
1856
1857         /* Master device first. */
1858         ret = si_b->master - si_a->master;
1859         if (ret)
1860                 return ret;
1861         /* Then representor devices. */
1862         ret = si_b->representor - si_a->representor;
1863         if (ret)
1864                 return ret;
1865         /* Unidentified devices come last in no specific order. */
1866         if (!si_a->representor)
1867                 return 0;
1868         /* Order representors by name. */
1869         return si_a->port_name - si_b->port_name;
1870 }
1871
1872 /**
1873  * Match PCI information for possible slaves of bonding device.
1874  *
1875  * @param[in] ibdev_name
1876  *   Name of Infiniband device.
1877  * @param[in] pci_dev
1878  *   Pointer to primary PCI address structure to match.
1879  * @param[in] nl_rdma
1880  *   Netlink RDMA group socket handle.
1881  * @param[in] owner
1882  *   Representor owner PF index.
1883  * @param[out] bond_info
1884  *   Pointer to bonding information.
1885  *
1886  * @return
1887  *   negative value if no bonding device found, otherwise
1888  *   positive index of slave PF in bonding.
1889  */
1890 static int
1891 mlx5_device_bond_pci_match(const char *ibdev_name,
1892                            const struct rte_pci_addr *pci_dev,
1893                            int nl_rdma, uint16_t owner,
1894                            struct mlx5_bond_info *bond_info)
1895 {
1896         char ifname[IF_NAMESIZE + 1];
1897         unsigned int ifindex;
1898         unsigned int np, i;
1899         FILE *bond_file = NULL, *file;
1900         int pf = -1;
1901         int ret;
1902
1903         /*
1904          * Try to get master device name. If something goes wrong suppose
1905          * the lack of kernel support and no bonding devices.
1906          */
1907         memset(bond_info, 0, sizeof(*bond_info));
1908         if (nl_rdma < 0)
1909                 return -1;
1910         if (!strstr(ibdev_name, "bond"))
1911                 return -1;
1912         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1913         if (!np)
1914                 return -1;
1915         /*
1916          * The master device might not be on the predefined port(not on port
1917          * index 1, it is not guaranteed), we have to scan all Infiniband
1918          * device ports and find master.
1919          */
1920         for (i = 1; i <= np; ++i) {
1921                 /* Check whether Infiniband port is populated. */
1922                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1923                 if (!ifindex)
1924                         continue;
1925                 if (!if_indextoname(ifindex, ifname))
1926                         continue;
1927                 /* Try to read bonding slave names from sysfs. */
1928                 MKSTR(slaves,
1929                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1930                 bond_file = fopen(slaves, "r");
1931                 if (bond_file)
1932                         break;
1933         }
1934         if (!bond_file)
1935                 return -1;
1936         /* Use safe format to check maximal buffer length. */
1937         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1938         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1939                 char tmp_str[IF_NAMESIZE + 32];
1940                 struct rte_pci_addr pci_addr;
1941                 struct mlx5_switch_info info;
1942
1943                 /* Process slave interface names in the loop. */
1944                 snprintf(tmp_str, sizeof(tmp_str),
1945                          "/sys/class/net/%s", ifname);
1946                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1947                         DRV_LOG(WARNING,
1948                                 "Cannot get PCI address for netdev \"%s\".",
1949                                 ifname);
1950                         continue;
1951                 }
1952                 /* Slave interface PCI address match found. */
1953                 snprintf(tmp_str, sizeof(tmp_str),
1954                          "/sys/class/net/%s/phys_port_name", ifname);
1955                 file = fopen(tmp_str, "rb");
1956                 if (!file)
1957                         break;
1958                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1959                 if (fscanf(file, "%32s", tmp_str) == 1)
1960                         mlx5_translate_port_name(tmp_str, &info);
1961                 fclose(file);
1962                 /* Only process PF ports. */
1963                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1964                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1965                         continue;
1966                 /* Check max bonding member. */
1967                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1968                         DRV_LOG(WARNING, "bonding index out of range, "
1969                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1970                                 tmp_str);
1971                         break;
1972                 }
1973                 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
1974                 if (pci_dev->domain == pci_addr.domain &&
1975                     pci_dev->bus == pci_addr.bus &&
1976                     pci_dev->devid == pci_addr.devid &&
1977                     ((pci_dev->function == 0 &&
1978                       pci_dev->function + owner == pci_addr.function) ||
1979                      (pci_dev->function == owner &&
1980                       pci_addr.function == owner)))
1981                         pf = info.port_name;
1982                 /* Get ifindex. */
1983                 snprintf(tmp_str, sizeof(tmp_str),
1984                          "/sys/class/net/%s/ifindex", ifname);
1985                 file = fopen(tmp_str, "rb");
1986                 if (!file)
1987                         break;
1988                 ret = fscanf(file, "%u", &ifindex);
1989                 fclose(file);
1990                 if (ret != 1)
1991                         break;
1992                 /* Save bonding info. */
1993                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1994                         sizeof(bond_info->ports[0].ifname));
1995                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1996                 bond_info->ports[info.port_name].ifindex = ifindex;
1997                 bond_info->n_port++;
1998         }
1999         if (pf >= 0) {
2000                 /* Get bond interface info */
2001                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2002                                            bond_info->ifname);
2003                 if (ret)
2004                         DRV_LOG(ERR, "unable to get bond info: %s",
2005                                 strerror(rte_errno));
2006                 else
2007                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2008                                 ifindex, bond_info->ifindex, bond_info->ifname);
2009         }
2010         return pf;
2011 }
2012
2013 static void
2014 mlx5_os_config_default(struct mlx5_dev_config *config)
2015 {
2016         memset(config, 0, sizeof(*config));
2017         config->mps = MLX5_ARG_UNSET;
2018         config->rx_vec_en = 1;
2019         config->txq_inline_max = MLX5_ARG_UNSET;
2020         config->txq_inline_min = MLX5_ARG_UNSET;
2021         config->txq_inline_mpw = MLX5_ARG_UNSET;
2022         config->txqs_inline = MLX5_ARG_UNSET;
2023         config->vf_nl_en = 1;
2024         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2025         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2026         config->dv_esw_en = 1;
2027         config->dv_flow_en = 1;
2028         config->decap_en = 1;
2029         config->log_hp_size = MLX5_ARG_UNSET;
2030         config->allow_duplicate_pattern = 1;
2031 }
2032
2033 /**
2034  * Register a PCI device within bonding.
2035  *
2036  * This function spawns Ethernet devices out of a given PCI device and
2037  * bonding owner PF index.
2038  *
2039  * @param[in] cdev
2040  *   Pointer to common mlx5 device structure.
2041  * @param[in] req_eth_da
2042  *   Requested ethdev device argument.
2043  * @param[in] owner_id
2044  *   Requested owner PF port ID within bonding device, default to 0.
2045  *
2046  * @return
2047  *   0 on success, a negative errno value otherwise and rte_errno is set.
2048  */
2049 static int
2050 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2051                      struct rte_eth_devargs *req_eth_da,
2052                      uint16_t owner_id)
2053 {
2054         struct ibv_device **ibv_list;
2055         /*
2056          * Number of found IB Devices matching with requested PCI BDF.
2057          * nd != 1 means there are multiple IB devices over the same
2058          * PCI device and we have representors and master.
2059          */
2060         unsigned int nd = 0;
2061         /*
2062          * Number of found IB device Ports. nd = 1 and np = 1..n means
2063          * we have the single multiport IB device, and there may be
2064          * representors attached to some of found ports.
2065          */
2066         unsigned int np = 0;
2067         /*
2068          * Number of DPDK ethernet devices to Spawn - either over
2069          * multiple IB devices or multiple ports of single IB device.
2070          * Actually this is the number of iterations to spawn.
2071          */
2072         unsigned int ns = 0;
2073         /*
2074          * Bonding device
2075          *   < 0 - no bonding device (single one)
2076          *  >= 0 - bonding device (value is slave PF index)
2077          */
2078         int bd = -1;
2079         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2080         struct mlx5_dev_spawn_data *list = NULL;
2081         struct mlx5_dev_config dev_config;
2082         unsigned int dev_config_vf;
2083         struct rte_eth_devargs eth_da = *req_eth_da;
2084         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2085         struct mlx5_bond_info bond_info;
2086         int ret = -1;
2087
2088         errno = 0;
2089         ibv_list = mlx5_glue->get_device_list(&ret);
2090         if (!ibv_list) {
2091                 rte_errno = errno ? errno : ENOSYS;
2092                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2093                 return -rte_errno;
2094         }
2095         /*
2096          * First scan the list of all Infiniband devices to find
2097          * matching ones, gathering into the list.
2098          */
2099         struct ibv_device *ibv_match[ret + 1];
2100         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2101         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2102         unsigned int i;
2103
2104         while (ret-- > 0) {
2105                 struct rte_pci_addr pci_addr;
2106
2107                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2108                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2109                                                 nl_rdma, owner_id, &bond_info);
2110                 if (bd >= 0) {
2111                         /*
2112                          * Bonding device detected. Only one match is allowed,
2113                          * the bonding is supported over multi-port IB device,
2114                          * there should be no matches on representor PCI
2115                          * functions or non VF LAG bonding devices with
2116                          * specified address.
2117                          */
2118                         if (nd) {
2119                                 DRV_LOG(ERR,
2120                                         "multiple PCI match on bonding device"
2121                                         "\"%s\" found", ibv_list[ret]->name);
2122                                 rte_errno = ENOENT;
2123                                 ret = -rte_errno;
2124                                 goto exit;
2125                         }
2126                         /* Amend owner pci address if owner PF ID specified. */
2127                         if (eth_da.nb_representor_ports)
2128                                 owner_pci.function += owner_id;
2129                         DRV_LOG(INFO,
2130                                 "PCI information matches for slave %d bonding device \"%s\"",
2131                                 bd, ibv_list[ret]->name);
2132                         ibv_match[nd++] = ibv_list[ret];
2133                         break;
2134                 } else {
2135                         /* Bonding device not found. */
2136                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2137                                               &pci_addr))
2138                                 continue;
2139                         if (owner_pci.domain != pci_addr.domain ||
2140                             owner_pci.bus != pci_addr.bus ||
2141                             owner_pci.devid != pci_addr.devid ||
2142                             owner_pci.function != pci_addr.function)
2143                                 continue;
2144                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2145                                 ibv_list[ret]->name);
2146                         ibv_match[nd++] = ibv_list[ret];
2147                 }
2148         }
2149         ibv_match[nd] = NULL;
2150         if (!nd) {
2151                 /* No device matches, just complain and bail out. */
2152                 DRV_LOG(WARNING,
2153                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2154                         " are kernel drivers loaded?",
2155                         owner_pci.domain, owner_pci.bus,
2156                         owner_pci.devid, owner_pci.function);
2157                 rte_errno = ENOENT;
2158                 ret = -rte_errno;
2159                 goto exit;
2160         }
2161         if (nd == 1) {
2162                 /*
2163                  * Found single matching device may have multiple ports.
2164                  * Each port may be representor, we have to check the port
2165                  * number and check the representors existence.
2166                  */
2167                 if (nl_rdma >= 0)
2168                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2169                 if (!np)
2170                         DRV_LOG(WARNING,
2171                                 "Cannot get IB device \"%s\" ports number.",
2172                                 ibv_match[0]->name);
2173                 if (bd >= 0 && !np) {
2174                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2175                         rte_errno = ENOENT;
2176                         ret = -rte_errno;
2177                         goto exit;
2178                 }
2179         }
2180         /* Now we can determine the maximal amount of devices to be spawned. */
2181         list = mlx5_malloc(MLX5_MEM_ZERO,
2182                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2183                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2184         if (!list) {
2185                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2186                 rte_errno = ENOMEM;
2187                 ret = -rte_errno;
2188                 goto exit;
2189         }
2190         if (bd >= 0 || np > 1) {
2191                 /*
2192                  * Single IB device with multiple ports found,
2193                  * it may be E-Switch master device and representors.
2194                  * We have to perform identification through the ports.
2195                  */
2196                 MLX5_ASSERT(nl_rdma >= 0);
2197                 MLX5_ASSERT(ns == 0);
2198                 MLX5_ASSERT(nd == 1);
2199                 MLX5_ASSERT(np);
2200                 for (i = 1; i <= np; ++i) {
2201                         list[ns].bond_info = &bond_info;
2202                         list[ns].max_port = np;
2203                         list[ns].phys_port = i;
2204                         list[ns].phys_dev_name = ibv_match[0]->name;
2205                         list[ns].eth_dev = NULL;
2206                         list[ns].pci_dev = pci_dev;
2207                         list[ns].cdev = cdev;
2208                         list[ns].pf_bond = bd;
2209                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2210                                                            ibv_match[0]->name,
2211                                                            i);
2212                         if (!list[ns].ifindex) {
2213                                 /*
2214                                  * No network interface index found for the
2215                                  * specified port, it means there is no
2216                                  * representor on this port. It's OK,
2217                                  * there can be disabled ports, for example
2218                                  * if sriov_numvfs < sriov_totalvfs.
2219                                  */
2220                                 continue;
2221                         }
2222                         ret = -1;
2223                         if (nl_route >= 0)
2224                                 ret = mlx5_nl_switch_info(nl_route,
2225                                                           list[ns].ifindex,
2226                                                           &list[ns].info);
2227                         if (ret || (!list[ns].info.representor &&
2228                                     !list[ns].info.master)) {
2229                                 /*
2230                                  * We failed to recognize representors with
2231                                  * Netlink, let's try to perform the task
2232                                  * with sysfs.
2233                                  */
2234                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2235                                                              &list[ns].info);
2236                         }
2237                         if (!ret && bd >= 0) {
2238                                 switch (list[ns].info.name_type) {
2239                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2240                                         if (np == 1) {
2241                                                 /*
2242                                                  * Force standalone bonding
2243                                                  * device for ROCE LAG
2244                                                  * confgiurations.
2245                                                  */
2246                                                 list[ns].info.master = 0;
2247                                                 list[ns].info.representor = 0;
2248                                         }
2249                                         if (list[ns].info.port_name == bd)
2250                                                 ns++;
2251                                         break;
2252                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2253                                         /* Fallthrough */
2254                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2255                                         /* Fallthrough */
2256                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2257                                         if (list[ns].info.pf_num == bd)
2258                                                 ns++;
2259                                         break;
2260                                 default:
2261                                         break;
2262                                 }
2263                                 continue;
2264                         }
2265                         if (!ret && (list[ns].info.representor ^
2266                                      list[ns].info.master))
2267                                 ns++;
2268                 }
2269                 if (!ns) {
2270                         DRV_LOG(ERR,
2271                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2272                         rte_errno = ENOENT;
2273                         ret = -rte_errno;
2274                         goto exit;
2275                 }
2276         } else {
2277                 /*
2278                  * The existence of several matching entries (nd > 1) means
2279                  * port representors have been instantiated. No existing Verbs
2280                  * call nor sysfs entries can tell them apart, this can only
2281                  * be done through Netlink calls assuming kernel drivers are
2282                  * recent enough to support them.
2283                  *
2284                  * In the event of identification failure through Netlink,
2285                  * try again through sysfs, then:
2286                  *
2287                  * 1. A single IB device matches (nd == 1) with single
2288                  *    port (np=0/1) and is not a representor, assume
2289                  *    no switch support.
2290                  *
2291                  * 2. Otherwise no safe assumptions can be made;
2292                  *    complain louder and bail out.
2293                  */
2294                 for (i = 0; i != nd; ++i) {
2295                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2296                         list[ns].bond_info = NULL;
2297                         list[ns].max_port = 1;
2298                         list[ns].phys_port = 1;
2299                         list[ns].phys_dev_name = ibv_match[i]->name;
2300                         list[ns].eth_dev = NULL;
2301                         list[ns].pci_dev = pci_dev;
2302                         list[ns].cdev = cdev;
2303                         list[ns].pf_bond = -1;
2304                         list[ns].ifindex = 0;
2305                         if (nl_rdma >= 0)
2306                                 list[ns].ifindex = mlx5_nl_ifindex
2307                                                             (nl_rdma,
2308                                                              ibv_match[i]->name,
2309                                                              1);
2310                         if (!list[ns].ifindex) {
2311                                 char ifname[IF_NAMESIZE];
2312
2313                                 /*
2314                                  * Netlink failed, it may happen with old
2315                                  * ib_core kernel driver (before 4.16).
2316                                  * We can assume there is old driver because
2317                                  * here we are processing single ports IB
2318                                  * devices. Let's try sysfs to retrieve
2319                                  * the ifindex. The method works for
2320                                  * master device only.
2321                                  */
2322                                 if (nd > 1) {
2323                                         /*
2324                                          * Multiple devices found, assume
2325                                          * representors, can not distinguish
2326                                          * master/representor and retrieve
2327                                          * ifindex via sysfs.
2328                                          */
2329                                         continue;
2330                                 }
2331                                 ret = mlx5_get_ifname_sysfs
2332                                         (ibv_match[i]->ibdev_path, ifname);
2333                                 if (!ret)
2334                                         list[ns].ifindex =
2335                                                 if_nametoindex(ifname);
2336                                 if (!list[ns].ifindex) {
2337                                         /*
2338                                          * No network interface index found
2339                                          * for the specified device, it means
2340                                          * there it is neither representor
2341                                          * nor master.
2342                                          */
2343                                         continue;
2344                                 }
2345                         }
2346                         ret = -1;
2347                         if (nl_route >= 0)
2348                                 ret = mlx5_nl_switch_info(nl_route,
2349                                                           list[ns].ifindex,
2350                                                           &list[ns].info);
2351                         if (ret || (!list[ns].info.representor &&
2352                                     !list[ns].info.master)) {
2353                                 /*
2354                                  * We failed to recognize representors with
2355                                  * Netlink, let's try to perform the task
2356                                  * with sysfs.
2357                                  */
2358                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2359                                                              &list[ns].info);
2360                         }
2361                         if (!ret && (list[ns].info.representor ^
2362                                      list[ns].info.master)) {
2363                                 ns++;
2364                         } else if ((nd == 1) &&
2365                                    !list[ns].info.representor &&
2366                                    !list[ns].info.master) {
2367                                 /*
2368                                  * Single IB device with one physical port and
2369                                  * attached network device.
2370                                  * May be SRIOV is not enabled or there is no
2371                                  * representors.
2372                                  */
2373                                 DRV_LOG(INFO, "No E-Switch support detected.");
2374                                 ns++;
2375                                 break;
2376                         }
2377                 }
2378                 if (!ns) {
2379                         DRV_LOG(ERR,
2380                                 "Unable to recognize master/representors on the multiple IB devices.");
2381                         rte_errno = ENOENT;
2382                         ret = -rte_errno;
2383                         goto exit;
2384                 }
2385                 /*
2386                  * New kernels may add the switch_id attribute for the case
2387                  * there is no E-Switch and we wrongly recognized the only
2388                  * device as master. Override this if there is the single
2389                  * device with single port and new device name format present.
2390                  */
2391                 if (nd == 1 &&
2392                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2393                         list[0].info.master = 0;
2394                         list[0].info.representor = 0;
2395                 }
2396         }
2397         MLX5_ASSERT(ns);
2398         /*
2399          * Sort list to probe devices in natural order for users convenience
2400          * (i.e. master first, then representors from lowest to highest ID).
2401          */
2402         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2403         /* Device specific configuration. */
2404         switch (pci_dev->id.device_id) {
2405         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2406         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2407         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2408         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2409         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2410         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2411         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2412                 dev_config_vf = 1;
2413                 break;
2414         default:
2415                 dev_config_vf = 0;
2416                 break;
2417         }
2418         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2419                 /* Set devargs default values. */
2420                 if (eth_da.nb_mh_controllers == 0) {
2421                         eth_da.nb_mh_controllers = 1;
2422                         eth_da.mh_controllers[0] = 0;
2423                 }
2424                 if (eth_da.nb_ports == 0 && ns > 0) {
2425                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2426                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2427                                         pci_dev->device.devargs->args);
2428                         eth_da.nb_ports = 1;
2429                         eth_da.ports[0] = list[0].info.pf_num;
2430                 }
2431                 if (eth_da.nb_representor_ports == 0) {
2432                         eth_da.nb_representor_ports = 1;
2433                         eth_da.representor_ports[0] = 0;
2434                 }
2435         }
2436         for (i = 0; i != ns; ++i) {
2437                 uint32_t restore;
2438
2439                 /* Default configuration. */
2440                 mlx5_os_config_default(&dev_config);
2441                 dev_config.vf = dev_config_vf;
2442                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2443                                                  &dev_config, &eth_da);
2444                 if (!list[i].eth_dev) {
2445                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2446                                 break;
2447                         /* Device is disabled or already spawned. Ignore it. */
2448                         continue;
2449                 }
2450                 restore = list[i].eth_dev->data->dev_flags;
2451                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2452                 /**
2453                  * Each representor has a dedicated interrupts vector.
2454                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2455                  * representor eth_dev object because representor and PF
2456                  * share the same PCI address.
2457                  * Override representor device with a dedicated
2458                  * interrupts handle here.
2459                  * Representor interrupts handle is released in mlx5_dev_stop().
2460                  */
2461                 if (list[i].info.representor) {
2462                         struct rte_intr_handle *intr_handle;
2463                         intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
2464                                                   sizeof(*intr_handle), 0,
2465                                                   SOCKET_ID_ANY);
2466                         if (!intr_handle) {
2467                                 DRV_LOG(ERR,
2468                                         "port %u failed to allocate memory for interrupt handler "
2469                                         "Rx interrupts will not be supported",
2470                                         i);
2471                                 rte_errno = ENOMEM;
2472                                 ret = -rte_errno;
2473                                 goto exit;
2474                         }
2475                         list[i].eth_dev->intr_handle = intr_handle;
2476                 }
2477                 /* Restore non-PCI flags cleared by the above call. */
2478                 list[i].eth_dev->data->dev_flags |= restore;
2479                 rte_eth_dev_probing_finish(list[i].eth_dev);
2480         }
2481         if (i != ns) {
2482                 DRV_LOG(ERR,
2483                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2484                         " encountering an error: %s",
2485                         owner_pci.domain, owner_pci.bus,
2486                         owner_pci.devid, owner_pci.function,
2487                         strerror(rte_errno));
2488                 ret = -rte_errno;
2489                 /* Roll back. */
2490                 while (i--) {
2491                         if (!list[i].eth_dev)
2492                                 continue;
2493                         mlx5_dev_close(list[i].eth_dev);
2494                         /* mac_addrs must not be freed because in dev_private */
2495                         list[i].eth_dev->data->mac_addrs = NULL;
2496                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2497                 }
2498                 /* Restore original error. */
2499                 rte_errno = -ret;
2500         } else {
2501                 ret = 0;
2502         }
2503 exit:
2504         /*
2505          * Do the routine cleanup:
2506          * - close opened Netlink sockets
2507          * - free allocated spawn data array
2508          * - free the Infiniband device list
2509          */
2510         if (nl_rdma >= 0)
2511                 close(nl_rdma);
2512         if (nl_route >= 0)
2513                 close(nl_route);
2514         if (list)
2515                 mlx5_free(list);
2516         MLX5_ASSERT(ibv_list);
2517         mlx5_glue->free_device_list(ibv_list);
2518         return ret;
2519 }
2520
2521 static int
2522 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2523                           struct rte_eth_devargs *eth_da)
2524 {
2525         int ret = 0;
2526
2527         if (dev->devargs == NULL)
2528                 return 0;
2529         memset(eth_da, 0, sizeof(*eth_da));
2530         /* Parse representor information first from class argument. */
2531         if (dev->devargs->cls_str)
2532                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2533         if (ret != 0) {
2534                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2535                         dev->devargs->cls_str);
2536                 return -rte_errno;
2537         }
2538         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2539                 /* Parse legacy device argument */
2540                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2541                 if (ret) {
2542                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2543                                 dev->devargs->args);
2544                         return -rte_errno;
2545                 }
2546         }
2547         return 0;
2548 }
2549
2550 /**
2551  * Callback to register a PCI device.
2552  *
2553  * This function spawns Ethernet devices out of a given PCI device.
2554  *
2555  * @param[in] cdev
2556  *   Pointer to common mlx5 device structure.
2557  *
2558  * @return
2559  *   0 on success, a negative errno value otherwise and rte_errno is set.
2560  */
2561 static int
2562 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2563 {
2564         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2565         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2566         int ret = 0;
2567         uint16_t p;
2568
2569         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2570         if (ret != 0)
2571                 return ret;
2572
2573         if (eth_da.nb_ports > 0) {
2574                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2575                 for (p = 0; p < eth_da.nb_ports; p++) {
2576                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2577                                                    eth_da.ports[p]);
2578                         if (ret)
2579                                 break;
2580                 }
2581                 if (ret) {
2582                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2583                                 "aborted due to proding failure of PF %u",
2584                                 pci_dev->addr.domain, pci_dev->addr.bus,
2585                                 pci_dev->addr.devid, pci_dev->addr.function,
2586                                 eth_da.ports[p]);
2587                         mlx5_net_remove(cdev);
2588                 }
2589         } else {
2590                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2591         }
2592         return ret;
2593 }
2594
2595 /* Probe a single SF device on auxiliary bus, no representor support. */
2596 static int
2597 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2598 {
2599         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2600         struct mlx5_dev_config config;
2601         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2602         struct rte_device *dev = cdev->dev;
2603         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2604         struct rte_eth_dev *eth_dev;
2605         int ret = 0;
2606
2607         /* Parse ethdev devargs. */
2608         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2609         if (ret != 0)
2610                 return ret;
2611         /* Set default config data. */
2612         mlx5_os_config_default(&config);
2613         config.sf = 1;
2614         /* Init spawn data. */
2615         spawn.max_port = 1;
2616         spawn.phys_port = 1;
2617         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2618         ret = mlx5_auxiliary_get_ifindex(dev->name);
2619         if (ret < 0) {
2620                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2621                 return ret;
2622         }
2623         spawn.ifindex = ret;
2624         spawn.cdev = cdev;
2625         /* Spawn device. */
2626         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2627         if (eth_dev == NULL)
2628                 return -rte_errno;
2629         /* Post create. */
2630         eth_dev->intr_handle = &adev->intr_handle;
2631         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2632                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2633                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2634                 eth_dev->data->numa_node = dev->numa_node;
2635         }
2636         rte_eth_dev_probing_finish(eth_dev);
2637         return 0;
2638 }
2639
2640 /**
2641  * Net class driver callback to probe a device.
2642  *
2643  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2644  *
2645  * @param[in] cdev
2646  *   Pointer to the common mlx5 device.
2647  *
2648  * @return
2649  *   0 on success, a negative errno value otherwise and rte_errno is set.
2650  */
2651 int
2652 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2653 {
2654         int ret;
2655
2656         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2657                 mlx5_pmd_socket_init();
2658         ret = mlx5_init_once();
2659         if (ret) {
2660                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2661                         strerror(rte_errno));
2662                 return -rte_errno;
2663         }
2664         if (mlx5_dev_is_pci(cdev->dev))
2665                 return mlx5_os_pci_probe(cdev);
2666         else
2667                 return mlx5_os_auxiliary_probe(cdev);
2668 }
2669
2670 /**
2671  * Install shared asynchronous device events handler.
2672  * This function is implemented to support event sharing
2673  * between multiple ports of single IB device.
2674  *
2675  * @param sh
2676  *   Pointer to mlx5_dev_ctx_shared object.
2677  */
2678 void
2679 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2680 {
2681         int ret;
2682         int flags;
2683         struct ibv_context *ctx = sh->cdev->ctx;
2684
2685         sh->intr_handle.fd = -1;
2686         flags = fcntl(ctx->async_fd, F_GETFL);
2687         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2688         if (ret) {
2689                 DRV_LOG(INFO, "failed to change file descriptor async event"
2690                         " queue");
2691         } else {
2692                 sh->intr_handle.fd = ctx->async_fd;
2693                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2694                 if (rte_intr_callback_register(&sh->intr_handle,
2695                                         mlx5_dev_interrupt_handler, sh)) {
2696                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2697                         sh->intr_handle.fd = -1;
2698                 }
2699         }
2700         if (sh->devx) {
2701 #ifdef HAVE_IBV_DEVX_ASYNC
2702                 sh->intr_handle_devx.fd = -1;
2703                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2704                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2705                 if (!devx_comp) {
2706                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2707                         return;
2708                 }
2709                 flags = fcntl(devx_comp->fd, F_GETFL);
2710                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2711                 if (ret) {
2712                         DRV_LOG(INFO, "failed to change file descriptor"
2713                                 " devx comp");
2714                         return;
2715                 }
2716                 sh->intr_handle_devx.fd = devx_comp->fd;
2717                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2718                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2719                                         mlx5_dev_interrupt_handler_devx, sh)) {
2720                         DRV_LOG(INFO, "Fail to install the devx shared"
2721                                 " interrupt.");
2722                         sh->intr_handle_devx.fd = -1;
2723                 }
2724 #endif /* HAVE_IBV_DEVX_ASYNC */
2725         }
2726 }
2727
2728 /**
2729  * Uninstall shared asynchronous device events handler.
2730  * This function is implemented to support event sharing
2731  * between multiple ports of single IB device.
2732  *
2733  * @param dev
2734  *   Pointer to mlx5_dev_ctx_shared object.
2735  */
2736 void
2737 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2738 {
2739         if (sh->intr_handle.fd >= 0)
2740                 mlx5_intr_callback_unregister(&sh->intr_handle,
2741                                               mlx5_dev_interrupt_handler, sh);
2742 #ifdef HAVE_IBV_DEVX_ASYNC
2743         if (sh->intr_handle_devx.fd >= 0)
2744                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2745                                   mlx5_dev_interrupt_handler_devx, sh);
2746         if (sh->devx_comp)
2747                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2748 #endif
2749 }
2750
2751 /**
2752  * Read statistics by a named counter.
2753  *
2754  * @param[in] priv
2755  *   Pointer to the private device data structure.
2756  * @param[in] ctr_name
2757  *   Pointer to the name of the statistic counter to read
2758  * @param[out] stat
2759  *   Pointer to read statistic value.
2760  * @return
2761  *   0 on success and stat is valud, 1 if failed to read the value
2762  *   rte_errno is set.
2763  *
2764  */
2765 int
2766 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2767                       uint64_t *stat)
2768 {
2769         int fd;
2770
2771         if (priv->sh) {
2772                 if (priv->q_counters != NULL &&
2773                     strcmp(ctr_name, "out_of_buffer") == 0)
2774                         return mlx5_devx_cmd_queue_counter_query
2775                                         (priv->q_counters, 0, (uint32_t *)stat);
2776                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2777                       priv->sh->ibdev_path,
2778                       priv->dev_port,
2779                       ctr_name);
2780                 fd = open(path, O_RDONLY);
2781                 /*
2782                  * in switchdev the file location is not per port
2783                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2784                  */
2785                 if (fd == -1) {
2786                         MKSTR(path1, "%s/hw_counters/%s",
2787                               priv->sh->ibdev_path,
2788                               ctr_name);
2789                         fd = open(path1, O_RDONLY);
2790                 }
2791                 if (fd != -1) {
2792                         char buf[21] = {'\0'};
2793                         ssize_t n = read(fd, buf, sizeof(buf));
2794
2795                         close(fd);
2796                         if (n != -1) {
2797                                 *stat = strtoull(buf, NULL, 10);
2798                                 return 0;
2799                         }
2800                 }
2801         }
2802         *stat = 0;
2803         return 1;
2804 }
2805
2806 /**
2807  * Remove a MAC address from device
2808  *
2809  * @param dev
2810  *   Pointer to Ethernet device structure.
2811  * @param index
2812  *   MAC address index.
2813  */
2814 void
2815 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2816 {
2817         struct mlx5_priv *priv = dev->data->dev_private;
2818         const int vf = priv->config.vf;
2819
2820         if (vf)
2821                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2822                                         mlx5_ifindex(dev), priv->mac_own,
2823                                         &dev->data->mac_addrs[index], index);
2824 }
2825
2826 /**
2827  * Adds a MAC address to the device
2828  *
2829  * @param dev
2830  *   Pointer to Ethernet device structure.
2831  * @param mac_addr
2832  *   MAC address to register.
2833  * @param index
2834  *   MAC address index.
2835  *
2836  * @return
2837  *   0 on success, a negative errno value otherwise
2838  */
2839 int
2840 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2841                      uint32_t index)
2842 {
2843         struct mlx5_priv *priv = dev->data->dev_private;
2844         const int vf = priv->config.vf;
2845         int ret = 0;
2846
2847         if (vf)
2848                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2849                                            mlx5_ifindex(dev), priv->mac_own,
2850                                            mac, index);
2851         return ret;
2852 }
2853
2854 /**
2855  * Modify a VF MAC address
2856  *
2857  * @param priv
2858  *   Pointer to device private data.
2859  * @param mac_addr
2860  *   MAC address to modify into.
2861  * @param iface_idx
2862  *   Net device interface index
2863  * @param vf_index
2864  *   VF index
2865  *
2866  * @return
2867  *   0 on success, a negative errno value otherwise
2868  */
2869 int
2870 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2871                            unsigned int iface_idx,
2872                            struct rte_ether_addr *mac_addr,
2873                            int vf_index)
2874 {
2875         return mlx5_nl_vf_mac_addr_modify
2876                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2877 }
2878
2879 /**
2880  * Set device promiscuous mode
2881  *
2882  * @param dev
2883  *   Pointer to Ethernet device structure.
2884  * @param enable
2885  *   0 - promiscuous is disabled, otherwise - enabled
2886  *
2887  * @return
2888  *   0 on success, a negative error value otherwise
2889  */
2890 int
2891 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2892 {
2893         struct mlx5_priv *priv = dev->data->dev_private;
2894
2895         return mlx5_nl_promisc(priv->nl_socket_route,
2896                                mlx5_ifindex(dev), !!enable);
2897 }
2898
2899 /**
2900  * Set device promiscuous mode
2901  *
2902  * @param dev
2903  *   Pointer to Ethernet device structure.
2904  * @param enable
2905  *   0 - all multicase is disabled, otherwise - enabled
2906  *
2907  * @return
2908  *   0 on success, a negative error value otherwise
2909  */
2910 int
2911 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2912 {
2913         struct mlx5_priv *priv = dev->data->dev_private;
2914
2915         return mlx5_nl_allmulti(priv->nl_socket_route,
2916                                 mlx5_ifindex(dev), !!enable);
2917 }
2918
2919 /**
2920  * Flush device MAC addresses
2921  *
2922  * @param dev
2923  *   Pointer to Ethernet device structure.
2924  *
2925  */
2926 void
2927 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2928 {
2929         struct mlx5_priv *priv = dev->data->dev_private;
2930
2931         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2932                                dev->data->mac_addrs,
2933                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2934 }