drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /* rte flow indexed pool configuration. */
  71 static struct mlx5_indexed_pool_config icfg[] = {
  72         {
  73                 .size = sizeof(struct rte_flow),
  74                 .trunk_size = 64,
  75                 .need_lock = 1,
  76                 .release_mem_en = 0,
  77                 .malloc = mlx5_malloc,
  78                 .free = mlx5_free,
  79                 .per_core_cache = 0,
  80                 .type = "ctl_flow_ipool",
  81         },
  82         {
  83                 .size = sizeof(struct rte_flow),
  84                 .trunk_size = 64,
  85                 .grow_trunk = 3,
  86                 .grow_shift = 2,
  87                 .need_lock = 1,
  88                 .release_mem_en = 0,
  89                 .malloc = mlx5_malloc,
  90                 .free = mlx5_free,
  91                 .per_core_cache = 1 << 14,
  92                 .type = "rte_flow_ipool",
  93         },
  94         {
  95                 .size = sizeof(struct rte_flow),
  96                 .trunk_size = 64,
  97                 .grow_trunk = 3,
  98                 .grow_shift = 2,
  99                 .need_lock = 1,
 100                 .release_mem_en = 0,
 101                 .malloc = mlx5_malloc,
 102                 .free = mlx5_free,
 103                 .per_core_cache = 0,
 104                 .type = "mcp_flow_ipool",
 105         },
 106 };
 107
 108 /**
 109  * Set the completion channel file descriptor interrupt as non-blocking.
 110  *
 111  * @param[in] rxq_obj
 112  *   Pointer to RQ channel object, which includes the channel fd
 113  *
 114  * @param[out] fd
 115  *   The file descriptor (representing the interrupt) used in this channel.
 116  *
 117  * @return
 118  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 119  */
 120 int
 121 mlx5_os_set_nonblock_channel_fd(int fd)
 122 {
 123         int flags;
 124
 125         flags = fcntl(fd, F_GETFL);
 126         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 127 }
 128
 129 /**
 130  * Get mlx5 device attributes. The glue function query_device_ex() is called
 131  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 132  * device attributes from the glue out parameter.
 133  *
 134  * @param sh
 135  *   Pointer to shared device context.
 136  *
 137  * @return
 138  *   0 on success, a negative errno value otherwise and rte_errno is set.
 139  */
 140 int
 141 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
 142 {
 143         int err;
 144         struct mlx5_common_device *cdev = sh->cdev;
 145         struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
 146         struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 };
 147         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 148
 149         err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex);
 150         if (err) {
 151                 rte_errno = errno;
 152                 return -rte_errno;
 153         }
 154 #ifdef HAVE_IBV_MLX5_MOD_SWP
 155         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 156 #endif
 157 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 158         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 159 #endif
 160 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 161         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 162 #endif
 163         err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr);
 164         if (err) {
 165                 rte_errno = errno;
 166                 return -rte_errno;
 167         }
 168         memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
 169         if (mlx5_dev_is_pci(cdev->dev))
 170                 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev));
 171         else
 172                 sh->dev_cap.sf = 1;
 173         sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 174         sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;
 175         sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;
 176         sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;
 177 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 178         sh->dev_cap.dest_tir = 1;
 179 #endif
 180 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR)
 181         DRV_LOG(DEBUG, "DV flow is supported.");
 182         sh->dev_cap.dv_flow_en = 1;
 183 #endif
 184 #ifdef HAVE_MLX5DV_DR_ESWITCH
 185         if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode)
 186                 sh->dev_cap.dv_esw_en = 1;
 187 #endif
 188         /*
 189          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 190          * as all ConnectX-5 devices.
 191          */
 192         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 193                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 194                         DRV_LOG(DEBUG, "Enhanced MPW is supported.");
 195                         sh->dev_cap.mps = MLX5_MPW_ENHANCED;
 196                 } else {
 197                         DRV_LOG(DEBUG, "MPW is supported.");
 198                         sh->dev_cap.mps = MLX5_MPW;
 199                 }
 200         } else {
 201                 DRV_LOG(DEBUG, "MPW isn't supported.");
 202                 sh->dev_cap.mps = MLX5_MPW_DISABLED;
 203         }
 204 #if (RTE_CACHE_LINE_SIZE == 128)
 205         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)
 206                 sh->dev_cap.cqe_comp = 1;
 207         DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.",
 208                 sh->dev_cap.cqe_comp ? "" : "not ");
 209 #else
 210         sh->dev_cap.cqe_comp = 1;
 211 #endif
 212 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 213         sh->dev_cap.mpls_en =
 214                 ((dv_attr.tunnel_offloads_caps &
 215                   MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 216                  (dv_attr.tunnel_offloads_caps &
 217                   MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 218         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.",
 219                 sh->dev_cap.mpls_en ? "" : "not ");
 220 #else
 221         DRV_LOG(WARNING,
 222                 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration");
 223 #endif
 224 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
 225         sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align;
 226 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
 227         sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex &
 228                                     IBV_DEVICE_PCI_WRITE_END_PADDING);
 229 #endif
 230         sh->dev_cap.hw_csum =
 231                 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
 232         DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
 233                 sh->dev_cap.hw_csum ? "" : "not ");
 234         sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps &
 235                                        IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
 236         DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
 237                 (sh->dev_cap.hw_vlan_strip ? "" : "not "));
 238         sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps &
 239                                       IBV_RAW_PACKET_CAP_SCATTER_FCS);
 240 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
 241         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
 242         DRV_LOG(DEBUG, "Counters are not supported.");
 243 #endif
 244         /*
 245          * DPDK doesn't support larger/variable indirection tables.
 246          * Once DPDK supports it, take max size from device attr.
 247          */
 248         sh->dev_cap.ind_table_max_size =
 249                         RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size,
 250                                 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
 251         DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
 252                 sh->dev_cap.ind_table_max_size);
 253         sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 &&
 254                            (attr_ex.tso_caps.supported_qpts &
 255                             (1 << IBV_QPT_RAW_PACKET)));
 256         if (sh->dev_cap.tso)
 257                 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso;
 258         strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,
 259                 sizeof(sh->dev_cap.fw_ver));
 260 #ifdef HAVE_IBV_MLX5_MOD_SWP
 261         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 262                 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads &
 263                                   (MLX5_SW_PARSING_CAP |
 264                                    MLX5_SW_PARSING_CSUM_CAP |
 265                                    MLX5_SW_PARSING_TSO_CAP);
 266         DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp);
 267 #endif
 268 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 269         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 270                 struct mlx5dv_striding_rq_caps *strd_rq_caps =
 271                                 &dv_attr.striding_rq_caps;
 272
 273                 sh->dev_cap.mprq.enabled = 1;
 274                 sh->dev_cap.mprq.log_min_stride_size =
 275                         strd_rq_caps->min_single_stride_log_num_of_bytes;
 276                 sh->dev_cap.mprq.log_max_stride_size =
 277                         strd_rq_caps->max_single_stride_log_num_of_bytes;
 278                 sh->dev_cap.mprq.log_min_stride_num =
 279                         strd_rq_caps->min_single_wqe_log_num_of_strides;
 280                 sh->dev_cap.mprq.log_max_stride_num =
 281                         strd_rq_caps->max_single_wqe_log_num_of_strides;
 282                 sh->dev_cap.mprq.log_min_stride_wqe_size =
 283                                         cdev->config.devx ?
 284                                         hca_attr->log_min_stride_wqe_sz :
 285                                         MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
 286                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u",
 287                         sh->dev_cap.mprq.log_min_stride_size);
 288                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u",
 289                         sh->dev_cap.mprq.log_max_stride_size);
 290                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u",
 291                         sh->dev_cap.mprq.log_min_stride_num);
 292                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u",
 293                         sh->dev_cap.mprq.log_max_stride_num);
 294                 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u",
 295                         sh->dev_cap.mprq.log_min_stride_wqe_size);
 296                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 297                         strd_rq_caps->supported_qpts);
 298                 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ.");
 299         }
 300 #endif
 301 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 302         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 303                 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps &
 304                                         (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
 305                                          MLX5_TUNNELED_OFFLOADS_GRE_CAP |
 306                                          MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
 307         }
 308         if (sh->dev_cap.tunnel_en) {
 309                 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
 310                         sh->dev_cap.tunnel_en &
 311                         MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
 312                         sh->dev_cap.tunnel_en &
 313                         MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
 314                         sh->dev_cap.tunnel_en &
 315                         MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
 316         } else {
 317                 DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
 318         }
 319 #else
 320         DRV_LOG(WARNING,
 321                 "Tunnel offloading disabled due to old OFED/rdma-core version");
 322 #endif
 323         if (!sh->cdev->config.devx)
 324                 return 0;
 325         /* Check capabilities for Packet Pacing. */
 326         DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.",
 327                 hca_attr->dev_freq_khz);
 328         DRV_LOG(DEBUG, "Packet pacing is %ssupported.",
 329                 hca_attr->qos.packet_pacing ? "" : "not ");
 330         DRV_LOG(DEBUG, "Cross channel ops are %ssupported.",
 331                 hca_attr->cross_channel ? "" : "not ");
 332         DRV_LOG(DEBUG, "WQE index ignore is %ssupported.",
 333                 hca_attr->wqe_index_ignore ? "" : "not ");
 334         DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.",
 335                 hca_attr->non_wire_sq ? "" : "not ");
 336         DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
 337                 hca_attr->log_max_static_sq_wq ? "" : "not ",
 338                 hca_attr->log_max_static_sq_wq);
 339         DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.",
 340                 hca_attr->qos.wqe_rate_pp ? "" : "not ");
 341         sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing;
 342         if (!hca_attr->cross_channel) {
 343                 DRV_LOG(DEBUG,
 344                         "Cross channel operations are required for packet pacing.");
 345                 sh->dev_cap.txpp_en = 0;
 346         }
 347         if (!hca_attr->wqe_index_ignore) {
 348                 DRV_LOG(DEBUG,
 349                         "WQE index ignore feature is required for packet pacing.");
 350                 sh->dev_cap.txpp_en = 0;
 351         }
 352         if (!hca_attr->non_wire_sq) {
 353                 DRV_LOG(DEBUG,
 354                         "Non-wire SQ feature is required for packet pacing.");
 355                 sh->dev_cap.txpp_en = 0;
 356         }
 357         if (!hca_attr->log_max_static_sq_wq) {
 358                 DRV_LOG(DEBUG,
 359                         "Static WQE SQ feature is required for packet pacing.");
 360                 sh->dev_cap.txpp_en = 0;
 361         }
 362         if (!hca_attr->qos.wqe_rate_pp) {
 363                 DRV_LOG(DEBUG,
 364                         "WQE rate mode is required for packet pacing.");
 365                 sh->dev_cap.txpp_en = 0;
 366         }
 367 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
 368         DRV_LOG(DEBUG,
 369                 "DevX does not provide UAR offset, can't create queues for packet pacing.");
 370         sh->dev_cap.txpp_en = 0;
 371 #endif
 372         /* Check for LRO support. */
 373         if (mlx5_devx_obj_ops_en(sh) && hca_attr->lro_cap) {
 374                 /* TBD check tunnel lro caps. */
 375                 sh->dev_cap.lro_supported = 1;
 376                 DRV_LOG(DEBUG, "Device supports LRO.");
 377                 DRV_LOG(DEBUG,
 378                         "LRO minimal size of TCP segment required for coalescing is %d bytes.",
 379                         hca_attr->lro_min_mss_size);
 380         }
 381         sh->dev_cap.scatter_fcs_w_decap_disable =
 382                                         hca_attr->scatter_fcs_w_decap_disable;
 383         sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop;
 384         mlx5_rt_timestamp_config(sh, hca_attr);
 385         return 0;
 386 }
 387
 388 /**
 389  * Detect misc5 support or not
 390  *
 391  * @param[in] priv
 392  *   Device private data pointer
 393  */
 394 #ifdef HAVE_MLX5DV_DR
 395 static void
 396 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 397 {
 398 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 399         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 400          * Case: IPv4--->UDP--->VxLAN--->vni
 401          */
 402         void *tbl;
 403         struct mlx5_flow_dv_match_params matcher_mask;
 404         void *match_m;
 405         void *matcher;
 406         void *headers_m;
 407         void *misc5_m;
 408         uint32_t *tunnel_header_m;
 409         struct mlx5dv_flow_matcher_attr dv_attr;
 410
 411         memset(&matcher_mask, 0, sizeof(matcher_mask));
 412         matcher_mask.size = sizeof(matcher_mask.buf);
 413         match_m = matcher_mask.buf;
 414         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 415         misc5_m = MLX5_ADDR_OF(fte_match_param,
 416                                match_m, misc_parameters_5);
 417         tunnel_header_m = (uint32_t *)
 418                                 MLX5_ADDR_OF(fte_match_set_misc5,
 419                                 misc5_m, tunnel_header_1);
 420         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 421         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 422         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 423         *tunnel_header_m = 0xffffff;
 424
 425         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 426         if (!tbl) {
 427                 DRV_LOG(INFO, "No SW steering support");
 428                 return;
 429         }
 430         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 431         dv_attr.match_mask = (void *)&matcher_mask,
 432         dv_attr.match_criteria_enable =
 433                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 434                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 435         dv_attr.priority = 3;
 436 #ifdef HAVE_MLX5DV_DR_ESWITCH
 437         void *misc2_m;
 438         if (priv->sh->config.dv_esw_en) {
 439                 /* FDB enabled reg_c_0 */
 440                 dv_attr.match_criteria_enable |=
 441                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 442                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 443                                        match_m, misc_parameters_2);
 444                 MLX5_SET(fte_match_set_misc2, misc2_m,
 445                          metadata_reg_c_0, 0xffff);
 446         }
 447 #endif
 448         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 449                                                     &dv_attr, tbl);
 450         if (matcher) {
 451                 priv->sh->misc5_cap = 1;
 452                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 453         }
 454         mlx5_glue->dr_destroy_flow_tbl(tbl);
 455 #else
 456         RTE_SET_USED(priv);
 457 #endif
 458 }
 459 #endif
 460
 461 /**
 462  * Initialize DR related data within private structure.
 463  * Routine checks the reference counter and does actual
 464  * resources creation/initialization only if counter is zero.
 465  *
 466  * @param[in] priv
 467  *   Pointer to the private device data structure.
 468  *
 469  * @return
 470  *   Zero on success, positive error code otherwise.
 471  */
 472 static int
 473 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 474 {
 475         struct mlx5_dev_ctx_shared *sh = priv->sh;
 476         char s[MLX5_NAME_SIZE] __rte_unused;
 477         int err;
 478
 479         MLX5_ASSERT(sh && sh->refcnt);
 480         if (sh->refcnt > 1)
 481                 return 0;
 482         err = mlx5_alloc_table_hash_list(priv);
 483         if (err)
 484                 goto error;
 485         /* The resources below are only valid with DV support. */
 486 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 487         /* Init port id action list. */
 488         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 489         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 490                                                    flow_dv_port_id_create_cb,
 491                                                    flow_dv_port_id_match_cb,
 492                                                    flow_dv_port_id_remove_cb,
 493                                                    flow_dv_port_id_clone_cb,
 494                                                  flow_dv_port_id_clone_free_cb);
 495         if (!sh->port_id_action_list)
 496                 goto error;
 497         /* Init push vlan action list. */
 498         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 499         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 500                                                     flow_dv_push_vlan_create_cb,
 501                                                     flow_dv_push_vlan_match_cb,
 502                                                     flow_dv_push_vlan_remove_cb,
 503                                                     flow_dv_push_vlan_clone_cb,
 504                                                flow_dv_push_vlan_clone_free_cb);
 505         if (!sh->push_vlan_action_list)
 506                 goto error;
 507         /* Init sample action list. */
 508         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 509         sh->sample_action_list = mlx5_list_create(s, sh, true,
 510                                                   flow_dv_sample_create_cb,
 511                                                   flow_dv_sample_match_cb,
 512                                                   flow_dv_sample_remove_cb,
 513                                                   flow_dv_sample_clone_cb,
 514                                                   flow_dv_sample_clone_free_cb);
 515         if (!sh->sample_action_list)
 516                 goto error;
 517         /* Init dest array action list. */
 518         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 519         sh->dest_array_list = mlx5_list_create(s, sh, true,
 520                                                flow_dv_dest_array_create_cb,
 521                                                flow_dv_dest_array_match_cb,
 522                                                flow_dv_dest_array_remove_cb,
 523                                                flow_dv_dest_array_clone_cb,
 524                                               flow_dv_dest_array_clone_free_cb);
 525         if (!sh->dest_array_list)
 526                 goto error;
 527         /* Init shared flex parsers list, no need lcore_share */
 528         snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
 529         sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
 530                                                mlx5_flex_parser_create_cb,
 531                                                mlx5_flex_parser_match_cb,
 532                                                mlx5_flex_parser_remove_cb,
 533                                                mlx5_flex_parser_clone_cb,
 534                                                mlx5_flex_parser_clone_free_cb);
 535         if (!sh->flex_parsers_dv)
 536                 goto error;
 537 #endif
 538 #ifdef HAVE_MLX5DV_DR
 539         void *domain;
 540
 541         /* Reference counter is zero, we should initialize structures. */
 542         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 543                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 544         if (!domain) {
 545                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 546                 err = errno;
 547                 goto error;
 548         }
 549         sh->rx_domain = domain;
 550         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 551                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 552         if (!domain) {
 553                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 554                 err = errno;
 555                 goto error;
 556         }
 557         sh->tx_domain = domain;
 558 #ifdef HAVE_MLX5DV_DR_ESWITCH
 559         if (sh->config.dv_esw_en) {
 560                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 561                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 562                 if (!domain) {
 563                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 564                         err = errno;
 565                         goto error;
 566                 }
 567                 sh->fdb_domain = domain;
 568         }
 569         /*
 570          * The drop action is just some dummy placeholder in rdma-core. It
 571          * does not belong to domains and has no any attributes, and, can be
 572          * shared by the entire device.
 573          */
 574         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 575         if (!sh->dr_drop_action) {
 576                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 577                 err = errno;
 578                 goto error;
 579         }
 580 #endif
 581         if (!sh->tunnel_hub && sh->config.dv_miss_info)
 582                 err = mlx5_alloc_tunnel_hub(sh);
 583         if (err) {
 584                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 585                 goto error;
 586         }
 587         if (sh->config.reclaim_mode == MLX5_RCM_AGGR) {
 588                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 589                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 590                 if (sh->fdb_domain)
 591                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 592         }
 593         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 594         if (!sh->config.allow_duplicate_pattern) {
 595 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 596                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 597 #endif
 598                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 599                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 600                 if (sh->fdb_domain)
 601                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 602         }
 603
 604         __mlx5_discovery_misc5_cap(priv);
 605 #endif /* HAVE_MLX5DV_DR */
 606         sh->default_miss_action =
 607                         mlx5_glue->dr_create_flow_action_default_miss();
 608         if (!sh->default_miss_action)
 609                 DRV_LOG(WARNING, "Default miss action is not supported.");
 610         LIST_INIT(&sh->shared_rxqs);
 611         return 0;
 612 error:
 613         /* Rollback the created objects. */
 614         if (sh->rx_domain) {
 615                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 616                 sh->rx_domain = NULL;
 617         }
 618         if (sh->tx_domain) {
 619                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 620                 sh->tx_domain = NULL;
 621         }
 622         if (sh->fdb_domain) {
 623                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 624                 sh->fdb_domain = NULL;
 625         }
 626         if (sh->dr_drop_action) {
 627                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 628                 sh->dr_drop_action = NULL;
 629         }
 630         if (sh->pop_vlan_action) {
 631                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 632                 sh->pop_vlan_action = NULL;
 633         }
 634         if (sh->encaps_decaps) {
 635                 mlx5_hlist_destroy(sh->encaps_decaps);
 636                 sh->encaps_decaps = NULL;
 637         }
 638         if (sh->modify_cmds) {
 639                 mlx5_hlist_destroy(sh->modify_cmds);
 640                 sh->modify_cmds = NULL;
 641         }
 642         if (sh->tag_table) {
 643                 /* tags should be destroyed with flow before. */
 644                 mlx5_hlist_destroy(sh->tag_table);
 645                 sh->tag_table = NULL;
 646         }
 647         if (sh->tunnel_hub) {
 648                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 649                 sh->tunnel_hub = NULL;
 650         }
 651         mlx5_free_table_hash_list(priv);
 652         if (sh->port_id_action_list) {
 653                 mlx5_list_destroy(sh->port_id_action_list);
 654                 sh->port_id_action_list = NULL;
 655         }
 656         if (sh->push_vlan_action_list) {
 657                 mlx5_list_destroy(sh->push_vlan_action_list);
 658                 sh->push_vlan_action_list = NULL;
 659         }
 660         if (sh->sample_action_list) {
 661                 mlx5_list_destroy(sh->sample_action_list);
 662                 sh->sample_action_list = NULL;
 663         }
 664         if (sh->dest_array_list) {
 665                 mlx5_list_destroy(sh->dest_array_list);
 666                 sh->dest_array_list = NULL;
 667         }
 668         return err;
 669 }
 670
 671 /**
 672  * Destroy DR related data within private structure.
 673  *
 674  * @param[in] priv
 675  *   Pointer to the private device data structure.
 676  */
 677 void
 678 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 679 {
 680         struct mlx5_dev_ctx_shared *sh = priv->sh;
 681
 682         MLX5_ASSERT(sh && sh->refcnt);
 683         if (sh->refcnt > 1)
 684                 return;
 685         MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
 686 #ifdef HAVE_MLX5DV_DR
 687         if (sh->rx_domain) {
 688                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 689                 sh->rx_domain = NULL;
 690         }
 691         if (sh->tx_domain) {
 692                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 693                 sh->tx_domain = NULL;
 694         }
 695 #ifdef HAVE_MLX5DV_DR_ESWITCH
 696         if (sh->fdb_domain) {
 697                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 698                 sh->fdb_domain = NULL;
 699         }
 700         if (sh->dr_drop_action) {
 701                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 702                 sh->dr_drop_action = NULL;
 703         }
 704 #endif
 705         if (sh->pop_vlan_action) {
 706                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 707                 sh->pop_vlan_action = NULL;
 708         }
 709 #endif /* HAVE_MLX5DV_DR */
 710         if (sh->default_miss_action)
 711                 mlx5_glue->destroy_flow_action
 712                                 (sh->default_miss_action);
 713         if (sh->encaps_decaps) {
 714                 mlx5_hlist_destroy(sh->encaps_decaps);
 715                 sh->encaps_decaps = NULL;
 716         }
 717         if (sh->modify_cmds) {
 718                 mlx5_hlist_destroy(sh->modify_cmds);
 719                 sh->modify_cmds = NULL;
 720         }
 721         if (sh->tag_table) {
 722                 /* tags should be destroyed with flow before. */
 723                 mlx5_hlist_destroy(sh->tag_table);
 724                 sh->tag_table = NULL;
 725         }
 726         if (sh->tunnel_hub) {
 727                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 728                 sh->tunnel_hub = NULL;
 729         }
 730         mlx5_free_table_hash_list(priv);
 731         if (sh->port_id_action_list) {
 732                 mlx5_list_destroy(sh->port_id_action_list);
 733                 sh->port_id_action_list = NULL;
 734         }
 735         if (sh->push_vlan_action_list) {
 736                 mlx5_list_destroy(sh->push_vlan_action_list);
 737                 sh->push_vlan_action_list = NULL;
 738         }
 739         if (sh->sample_action_list) {
 740                 mlx5_list_destroy(sh->sample_action_list);
 741                 sh->sample_action_list = NULL;
 742         }
 743         if (sh->dest_array_list) {
 744                 mlx5_list_destroy(sh->dest_array_list);
 745                 sh->dest_array_list = NULL;
 746         }
 747 }
 748
 749 /**
 750  * Initialize shared data between primary and secondary process.
 751  *
 752  * A memzone is reserved by primary process and secondary processes attach to
 753  * the memzone.
 754  *
 755  * @return
 756  *   0 on success, a negative errno value otherwise and rte_errno is set.
 757  */
 758 static int
 759 mlx5_init_shared_data(void)
 760 {
 761         const struct rte_memzone *mz;
 762         int ret = 0;
 763
 764         rte_spinlock_lock(&mlx5_shared_data_lock);
 765         if (mlx5_shared_data == NULL) {
 766                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 767                         /* Allocate shared memory. */
 768                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 769                                                  sizeof(*mlx5_shared_data),
 770                                                  SOCKET_ID_ANY, 0);
 771                         if (mz == NULL) {
 772                                 DRV_LOG(ERR,
 773                                         "Cannot allocate mlx5 shared data");
 774                                 ret = -rte_errno;
 775                                 goto error;
 776                         }
 777                         mlx5_shared_data = mz->addr;
 778                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 779                         rte_spinlock_init(&mlx5_shared_data->lock);
 780                 } else {
 781                         /* Lookup allocated shared memory. */
 782                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 783                         if (mz == NULL) {
 784                                 DRV_LOG(ERR,
 785                                         "Cannot attach mlx5 shared data");
 786                                 ret = -rte_errno;
 787                                 goto error;
 788                         }
 789                         mlx5_shared_data = mz->addr;
 790                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 791                 }
 792         }
 793 error:
 794         rte_spinlock_unlock(&mlx5_shared_data_lock);
 795         return ret;
 796 }
 797
 798 /**
 799  * PMD global initialization.
 800  *
 801  * Independent from individual device, this function initializes global
 802  * per-PMD data structures distinguishing primary and secondary processes.
 803  * Hence, each initialization is called once per a process.
 804  *
 805  * @return
 806  *   0 on success, a negative errno value otherwise and rte_errno is set.
 807  */
 808 static int
 809 mlx5_init_once(void)
 810 {
 811         struct mlx5_shared_data *sd;
 812         struct mlx5_local_data *ld = &mlx5_local_data;
 813         int ret = 0;
 814
 815         if (mlx5_init_shared_data())
 816                 return -rte_errno;
 817         sd = mlx5_shared_data;
 818         MLX5_ASSERT(sd);
 819         rte_spinlock_lock(&sd->lock);
 820         switch (rte_eal_process_type()) {
 821         case RTE_PROC_PRIMARY:
 822                 if (sd->init_done)
 823                         break;
 824                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 825                                            mlx5_mp_os_primary_handle);
 826                 if (ret)
 827                         goto out;
 828                 sd->init_done = true;
 829                 break;
 830         case RTE_PROC_SECONDARY:
 831                 if (ld->init_done)
 832                         break;
 833                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 834                                              mlx5_mp_os_secondary_handle);
 835                 if (ret)
 836                         goto out;
 837                 ++sd->secondary_cnt;
 838                 ld->init_done = true;
 839                 break;
 840         default:
 841                 break;
 842         }
 843 out:
 844         rte_spinlock_unlock(&sd->lock);
 845         return ret;
 846 }
 847
 848 /**
 849  * DR flow drop action support detect.
 850  *
 851  * @param dev
 852  *   Pointer to rte_eth_dev structure.
 853  *
 854  */
 855 static void
 856 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 857 {
 858 #ifdef HAVE_MLX5DV_DR
 859         struct mlx5_priv *priv = dev->data->dev_private;
 860
 861         if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action)
 862                 return;
 863         /**
 864          * DR supports drop action placeholder when it is supported;
 865          * otherwise, use the queue drop action.
 866          */
 867         if (!priv->sh->drop_action_check_flag) {
 868                 if (!mlx5_flow_discover_dr_action_support(dev))
 869                         priv->sh->dr_drop_action_en = 1;
 870                 priv->sh->drop_action_check_flag = 1;
 871         }
 872         if (priv->sh->dr_drop_action_en)
 873                 priv->root_drop_action = priv->sh->dr_drop_action;
 874         else
 875                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 876 #endif
 877 }
 878
 879 static void
 880 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 881 {
 882         struct mlx5_priv *priv = dev->data->dev_private;
 883         void *ctx = priv->sh->cdev->ctx;
 884
 885         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 886         if (!priv->q_counters) {
 887                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 888                 struct ibv_wq *wq;
 889
 890                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 891                         "by DevX - fall-back to use the kernel driver global "
 892                         "queue counter.", dev->data->port_id);
 893                 /* Create WQ by kernel and query its queue counter ID. */
 894                 if (cq) {
 895                         wq = mlx5_glue->create_wq(ctx,
 896                                                   &(struct ibv_wq_init_attr){
 897                                                     .wq_type = IBV_WQT_RQ,
 898                                                     .max_wr = 1,
 899                                                     .max_sge = 1,
 900                                                     .pd = priv->sh->cdev->pd,
 901                                                     .cq = cq,
 902                                                 });
 903                         if (wq) {
 904                                 /* Counter is assigned only on RDY state. */
 905                                 int ret = mlx5_glue->modify_wq(wq,
 906                                                  &(struct ibv_wq_attr){
 907                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 908                                                  .wq_state = IBV_WQS_RDY,
 909                                                 });
 910
 911                                 if (ret == 0)
 912                                         mlx5_devx_cmd_wq_query(wq,
 913                                                          &priv->counter_set_id);
 914                                 claim_zero(mlx5_glue->destroy_wq(wq));
 915                         }
 916                         claim_zero(mlx5_glue->destroy_cq(cq));
 917                 }
 918         } else {
 919                 priv->counter_set_id = priv->q_counters->id;
 920         }
 921         if (priv->counter_set_id == 0)
 922                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 923                         "available.", dev->data->port_id);
 924 }
 925
 926 /**
 927  * Check if representor spawn info match devargs.
 928  *
 929  * @param spawn
 930  *   Verbs device parameters (name, port, switch_info) to spawn.
 931  * @param eth_da
 932  *   Device devargs to probe.
 933  *
 934  * @return
 935  *   Match result.
 936  */
 937 static bool
 938 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 939                        struct rte_eth_devargs *eth_da)
 940 {
 941         struct mlx5_switch_info *switch_info = &spawn->info;
 942         unsigned int p, f;
 943         uint16_t id;
 944         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 945                                                       eth_da->type);
 946
 947         switch (eth_da->type) {
 948         case RTE_ETH_REPRESENTOR_SF:
 949                 if (!(spawn->info.port_name == -1 &&
 950                       switch_info->name_type ==
 951                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 952                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 953                         rte_errno = EBUSY;
 954                         return false;
 955                 }
 956                 break;
 957         case RTE_ETH_REPRESENTOR_VF:
 958                 /* Allows HPF representor index -1 as exception. */
 959                 if (!(spawn->info.port_name == -1 &&
 960                       switch_info->name_type ==
 961                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 962                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 963                         rte_errno = EBUSY;
 964                         return false;
 965                 }
 966                 break;
 967         case RTE_ETH_REPRESENTOR_NONE:
 968                 rte_errno = EBUSY;
 969                 return false;
 970         default:
 971                 rte_errno = ENOTSUP;
 972                 DRV_LOG(ERR, "unsupported representor type");
 973                 return false;
 974         }
 975         /* Check representor ID: */
 976         for (p = 0; p < eth_da->nb_ports; ++p) {
 977                 if (spawn->pf_bond < 0) {
 978                         /* For non-LAG mode, allow and ignore pf. */
 979                         switch_info->pf_num = eth_da->ports[p];
 980                         repr_id = mlx5_representor_id_encode(switch_info,
 981                                                              eth_da->type);
 982                 }
 983                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 984                         id = MLX5_REPRESENTOR_ID
 985                                 (eth_da->ports[p], eth_da->type,
 986                                  eth_da->representor_ports[f]);
 987                         if (repr_id == id)
 988                                 return true;
 989                 }
 990         }
 991         rte_errno = EBUSY;
 992         return false;
 993 }
 994
 995 /**
 996  * Spawn an Ethernet device from Verbs information.
 997  *
 998  * @param dpdk_dev
 999  *   Backing DPDK device.
1000  * @param spawn
1001  *   Verbs device parameters (name, port, switch_info) to spawn.
1002  * @param config
1003  *   Device configuration parameters.
1004  * @param eth_da
1005  *   Device arguments.
1006  *
1007  * @return
1008  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1009  *   is set. The following errors are defined:
1010  *
1011  *   EBUSY: device is not supposed to be spawned.
1012  *   EEXIST: device is already spawned
1013  */
1014 static struct rte_eth_dev *
1015 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1016                struct mlx5_dev_spawn_data *spawn,
1017                struct mlx5_dev_config *config,
1018                struct rte_eth_devargs *eth_da)
1019 {
1020         const struct mlx5_switch_info *switch_info = &spawn->info;
1021         struct mlx5_dev_ctx_shared *sh = NULL;
1022         struct mlx5_hca_attr *hca_attr = &spawn->cdev->config.hca_attr;
1023         struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
1024         struct rte_eth_dev *eth_dev = NULL;
1025         struct mlx5_priv *priv = NULL;
1026         int err = 0;
1027         struct rte_ether_addr mac;
1028         char name[RTE_ETH_NAME_MAX_LEN];
1029         int own_domain_id = 0;
1030         uint16_t port_id;
1031         struct mlx5_port_info vport_info = { .query_flags = 0 };
1032         int nl_rdma = -1;
1033         int i;
1034
1035         /* Determine if this port representor is supposed to be spawned. */
1036         if (switch_info->representor && dpdk_dev->devargs &&
1037             !mlx5_representor_match(spawn, eth_da))
1038                 return NULL;
1039         /* Build device name. */
1040         if (spawn->pf_bond < 0) {
1041                 /* Single device. */
1042                 if (!switch_info->representor)
1043                         strlcpy(name, dpdk_dev->name, sizeof(name));
1044                 else
1045                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
1046                                  dpdk_dev->name,
1047                                  switch_info->name_type ==
1048                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1049                                  switch_info->port_name);
1050         } else {
1051                 /* Bonding device. */
1052                 if (!switch_info->representor) {
1053                         err = snprintf(name, sizeof(name), "%s_%s",
1054                                        dpdk_dev->name, spawn->phys_dev_name);
1055                 } else {
1056                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
1057                                 dpdk_dev->name, spawn->phys_dev_name,
1058                                 switch_info->ctrl_num,
1059                                 switch_info->pf_num,
1060                                 switch_info->name_type ==
1061                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1062                                 switch_info->port_name);
1063                 }
1064         }
1065         if (err >= (int)sizeof(name))
1066                 DRV_LOG(WARNING, "device name overflow %s", name);
1067         /* check if the device is already spawned */
1068         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1069                 rte_errno = EEXIST;
1070                 return NULL;
1071         }
1072         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1073         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1074                 struct mlx5_mp_id mp_id;
1075
1076                 eth_dev = rte_eth_dev_attach_secondary(name);
1077                 if (eth_dev == NULL) {
1078                         DRV_LOG(ERR, "can not attach rte ethdev");
1079                         rte_errno = ENOMEM;
1080                         return NULL;
1081                 }
1082                 eth_dev->device = dpdk_dev;
1083                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1084                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1085                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1086                 err = mlx5_proc_priv_init(eth_dev);
1087                 if (err)
1088                         return NULL;
1089                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
1090                 /* Receive command fd from primary process */
1091                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
1092                 if (err < 0)
1093                         goto err_secondary;
1094                 /* Remap UAR for Tx queues. */
1095                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1096                 if (err)
1097                         goto err_secondary;
1098                 /*
1099                  * Ethdev pointer is still required as input since
1100                  * the primary device is not accessible from the
1101                  * secondary process.
1102                  */
1103                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1104                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1105                 return eth_dev;
1106 err_secondary:
1107                 mlx5_dev_close(eth_dev);
1108                 return NULL;
1109         }
1110         /* Process parameters. */
1111         err = mlx5_args(config, dpdk_dev->devargs);
1112         if (err) {
1113                 DRV_LOG(ERR, "failed to process device arguments: %s",
1114                         strerror(rte_errno));
1115                 return NULL;
1116         }
1117         sh = mlx5_alloc_shared_dev_ctx(spawn);
1118         if (!sh)
1119                 return NULL;
1120         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1121         /* Check port status. */
1122         if (spawn->phys_port <= UINT8_MAX) {
1123                 /* Legacy Verbs api only support u8 port number. */
1124                 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1125                                             &port_attr);
1126                 if (err) {
1127                         DRV_LOG(ERR, "port query failed: %s", strerror(err));
1128                         goto error;
1129                 }
1130                 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1131                         DRV_LOG(ERR, "port is not configured in Ethernet mode");
1132                         err = EINVAL;
1133                         goto error;
1134                 }
1135         } else if (nl_rdma >= 0) {
1136                 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1137                 err = mlx5_nl_port_state(nl_rdma,
1138                         spawn->phys_dev_name,
1139                         spawn->phys_port);
1140                 if (err < 0) {
1141                         DRV_LOG(INFO, "Failed to get netlink port state: %s",
1142                                 strerror(rte_errno));
1143                         err = -rte_errno;
1144                         goto error;
1145                 }
1146                 port_attr.state = (enum ibv_port_state)err;
1147         }
1148         if (port_attr.state != IBV_PORT_ACTIVE)
1149                 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1150                         mlx5_glue->port_state_str(port_attr.state),
1151                         port_attr.state);
1152         /* Allocate private eth device data. */
1153         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1154                            sizeof(*priv),
1155                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1156         if (priv == NULL) {
1157                 DRV_LOG(ERR, "priv allocation failure");
1158                 err = ENOMEM;
1159                 goto error;
1160         }
1161         priv->sh = sh;
1162         priv->dev_port = spawn->phys_port;
1163         priv->pci_dev = spawn->pci_dev;
1164         priv->mtu = RTE_ETHER_MTU;
1165         /* Some internal functions rely on Netlink sockets, open them now. */
1166         priv->nl_socket_rdma = nl_rdma;
1167         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1168         priv->representor = !!switch_info->representor;
1169         priv->master = !!switch_info->master;
1170         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1171         priv->vport_meta_tag = 0;
1172         priv->vport_meta_mask = 0;
1173         priv->pf_bond = spawn->pf_bond;
1174
1175         DRV_LOG(DEBUG,
1176                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1177                 priv->dev_port, dpdk_dev->bus->name,
1178                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1179                 priv->master, priv->representor, priv->pf_bond);
1180
1181         /*
1182          * If we have E-Switch we should determine the vport attributes.
1183          * E-Switch may use either source vport field or reg_c[0] metadata
1184          * register to match on vport index. The engaged part of metadata
1185          * register is defined by mask.
1186          */
1187         if (sh->esw_mode) {
1188                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1189                                                  spawn->phys_port,
1190                                                  &vport_info);
1191                 if (err) {
1192                         DRV_LOG(WARNING,
1193                                 "Cannot query devx port %d on device %s",
1194                                 spawn->phys_port, spawn->phys_dev_name);
1195                         vport_info.query_flags = 0;
1196                 }
1197         }
1198         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1199                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1200                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1201                 if (!priv->vport_meta_mask) {
1202                         DRV_LOG(ERR,
1203                                 "vport zero mask for port %d on bonding device %s",
1204                                 spawn->phys_port, spawn->phys_dev_name);
1205                         err = ENOTSUP;
1206                         goto error;
1207                 }
1208                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1209                         DRV_LOG(ERR,
1210                                 "Invalid vport tag for port %d on bonding device %s",
1211                                 spawn->phys_port, spawn->phys_dev_name);
1212                         err = ENOTSUP;
1213                         goto error;
1214                 }
1215         }
1216         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1217                 priv->vport_id = vport_info.vport_id;
1218         } else if (spawn->pf_bond >= 0 && sh->esw_mode) {
1219                 DRV_LOG(ERR,
1220                         "Cannot deduce vport index for port %d on bonding device %s",
1221                         spawn->phys_port, spawn->phys_dev_name);
1222                 err = ENOTSUP;
1223                 goto error;
1224         } else {
1225                 /*
1226                  * Suppose vport index in compatible way. Kernel/rdma_core
1227                  * support single E-Switch per PF configurations only and
1228                  * vport_id field contains the vport index for associated VF,
1229                  * which is deduced from representor port name.
1230                  * For example, let's have the IB device port 10, it has
1231                  * attached network device eth0, which has port name attribute
1232                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1233                  * as 3 (2+1). This assigning schema should be changed if the
1234                  * multiple E-Switch instances per PF configurations or/and PCI
1235                  * subfunctions are added.
1236                  */
1237                 priv->vport_id = switch_info->representor ?
1238                                  switch_info->port_name + 1 : -1;
1239         }
1240         priv->representor_id = mlx5_representor_id_encode(switch_info,
1241                                                           eth_da->type);
1242         /*
1243          * Look for sibling devices in order to reuse their switch domain
1244          * if any, otherwise allocate one.
1245          */
1246         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1247                 const struct mlx5_priv *opriv =
1248                         rte_eth_devices[port_id].data->dev_private;
1249
1250                 if (!opriv ||
1251                     opriv->sh != priv->sh ||
1252                         opriv->domain_id ==
1253                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1254                         continue;
1255                 priv->domain_id = opriv->domain_id;
1256                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1257                         priv->dev_port, priv->domain_id);
1258                 break;
1259         }
1260         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1261                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1262                 if (err) {
1263                         err = rte_errno;
1264                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1265                                 strerror(rte_errno));
1266                         goto error;
1267                 }
1268                 own_domain_id = 1;
1269                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1270                         priv->dev_port, priv->domain_id);
1271         }
1272         if (config->hw_padding && !sh->dev_cap.hw_padding) {
1273                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1274                 config->hw_padding = 0;
1275         } else if (config->hw_padding) {
1276                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1277         }
1278         /*
1279          * MPW is disabled by default, while the Enhanced MPW is enabled
1280          * by default.
1281          */
1282         if (config->mps == MLX5_ARG_UNSET)
1283                 config->mps = (sh->dev_cap.mps == MLX5_MPW_ENHANCED) ?
1284                               MLX5_MPW_ENHANCED : MLX5_MPW_DISABLED;
1285         else
1286                 config->mps = config->mps ? sh->dev_cap.mps : MLX5_MPW_DISABLED;
1287         DRV_LOG(INFO, "%sMPS is %s",
1288                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1289                 config->mps == MLX5_MPW ? "legacy " : "",
1290                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1291         if (sh->cdev->config.devx) {
1292                 sh->steering_format_version = hca_attr->steering_format_version;
1293                 /* LRO is supported only when DV flow enabled. */
1294                 if (sh->dev_cap.lro_supported && sh->config.dv_flow_en)
1295                         sh->dev_cap.lro_supported = 0;
1296                 if (sh->dev_cap.lro_supported) {
1297                         /*
1298                          * If LRO timeout is not configured by application,
1299                          * use the minimal supported value.
1300                          */
1301                         if (!config->lro_timeout)
1302                                 config->lro_timeout =
1303                                        hca_attr->lro_timer_supported_periods[0];
1304                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1305                                 config->lro_timeout);
1306                 }
1307 #if defined(HAVE_MLX5DV_DR) && \
1308         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1309          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1310                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1311                     sh->config.dv_flow_en) {
1312                         uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
1313                         /*
1314                          * Meter needs two REG_C's for color match and pre-sfx
1315                          * flow match. Here get the REG_C for color match.
1316                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1317                          */
1318                         reg_c_mask &= 0xfc;
1319                         if (__builtin_popcount(reg_c_mask) < 1) {
1320                                 priv->mtr_en = 0;
1321                                 DRV_LOG(WARNING, "No available register for"
1322                                         " meter.");
1323                         } else {
1324                                 /*
1325                                  * The meter color register is used by the
1326                                  * flow-hit feature as well.
1327                                  * The flow-hit feature must use REG_C_3
1328                                  * Prefer REG_C_3 if it is available.
1329                                  */
1330                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1331                                         priv->mtr_color_reg = REG_C_3;
1332                                 else
1333                                         priv->mtr_color_reg = ffs(reg_c_mask)
1334                                                               - 1 + REG_C_0;
1335                                 priv->mtr_en = 1;
1336                                 priv->mtr_reg_share = hca_attr->qos.flow_meter;
1337                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1338                                         priv->mtr_color_reg);
1339                         }
1340                 }
1341                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
1342                         uint32_t log_obj_size =
1343                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1344                         if (log_obj_size >=
1345                             hca_attr->qos.log_meter_aso_granularity &&
1346                             log_obj_size <=
1347                             hca_attr->qos.log_meter_aso_max_alloc)
1348                                 sh->meter_aso_en = 1;
1349                 }
1350                 if (priv->mtr_en) {
1351                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1352                         if (err) {
1353                                 err = -err;
1354                                 goto error;
1355                         }
1356                 }
1357                 if (hca_attr->flow.tunnel_header_0_1)
1358                         sh->tunnel_header_0_1 = 1;
1359 #endif
1360 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1361                 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) {
1362                         sh->flow_hit_aso_en = 1;
1363                         err = mlx5_flow_aso_age_mng_init(sh);
1364                         if (err) {
1365                                 err = -err;
1366                                 goto error;
1367                         }
1368                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1369                 }
1370 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1371 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1372         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1373                 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) {
1374                         err = mlx5_flow_aso_ct_mng_init(sh);
1375                         if (err) {
1376                                 err = -err;
1377                                 goto error;
1378                         }
1379                         DRV_LOG(DEBUG, "CT ASO is supported.");
1380                         sh->ct_aso_en = 1;
1381                 }
1382 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1383 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1384                 if (hca_attr->log_max_ft_sampler_num > 0  &&
1385                     sh->config.dv_flow_en) {
1386                         priv->sampler_en = 1;
1387                         DRV_LOG(DEBUG, "Sampler enabled!");
1388                 } else {
1389                         priv->sampler_en = 0;
1390                         if (!hca_attr->log_max_ft_sampler_num)
1391                                 DRV_LOG(WARNING,
1392                                         "No available register for sampler.");
1393                         else
1394                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1395                 }
1396 #endif
1397         }
1398         if (config->cqe_comp && !sh->dev_cap.cqe_comp) {
1399                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported.");
1400                 config->cqe_comp = 0;
1401         }
1402         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1403             (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_flow_tag)) {
1404                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1405                                  " format isn't supported.");
1406                 config->cqe_comp = 0;
1407         }
1408         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1409             (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_l3_l4_tag)) {
1410                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1411                                  " format isn't supported.");
1412                 config->cqe_comp = 0;
1413         }
1414         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1415                         config->cqe_comp ? "" : "not ");
1416         if (config->std_delay_drop || config->hp_delay_drop) {
1417                 if (!hca_attr->rq_delay_drop) {
1418                         config->std_delay_drop = 0;
1419                         config->hp_delay_drop = 0;
1420                         DRV_LOG(WARNING,
1421                                 "dev_port-%u: Rxq delay drop is not supported",
1422                                 priv->dev_port);
1423                 }
1424         }
1425         if (config->mprq.enabled && !sh->dev_cap.mprq.enabled) {
1426                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported.");
1427                 config->mprq.enabled = 0;
1428         }
1429         if (config->max_dump_files_num == 0)
1430                 config->max_dump_files_num = 128;
1431         eth_dev = rte_eth_dev_allocate(name);
1432         if (eth_dev == NULL) {
1433                 DRV_LOG(ERR, "can not allocate rte ethdev");
1434                 err = ENOMEM;
1435                 goto error;
1436         }
1437         if (priv->representor) {
1438                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1439                 eth_dev->data->representor_id = priv->representor_id;
1440                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1441                         struct mlx5_priv *opriv =
1442                                 rte_eth_devices[port_id].data->dev_private;
1443                         if (opriv &&
1444                             opriv->master &&
1445                             opriv->domain_id == priv->domain_id &&
1446                             opriv->sh == priv->sh) {
1447                                 eth_dev->data->backer_port_id = port_id;
1448                                 break;
1449                         }
1450                 }
1451                 if (port_id >= RTE_MAX_ETHPORTS)
1452                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1453         }
1454         priv->mp_id.port_id = eth_dev->data->port_id;
1455         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1456         /*
1457          * Store associated network device interface index. This index
1458          * is permanent throughout the lifetime of device. So, we may store
1459          * the ifindex here and use the cached value further.
1460          */
1461         MLX5_ASSERT(spawn->ifindex);
1462         priv->if_index = spawn->ifindex;
1463         priv->lag_affinity_idx = sh->refcnt - 1;
1464         eth_dev->data->dev_private = priv;
1465         priv->dev_data = eth_dev->data;
1466         eth_dev->data->mac_addrs = priv->mac;
1467         eth_dev->device = dpdk_dev;
1468         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1469         /* Configure the first MAC address by default. */
1470         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1471                 DRV_LOG(ERR,
1472                         "port %u cannot get MAC address, is mlx5_en"
1473                         " loaded? (errno: %s)",
1474                         eth_dev->data->port_id, strerror(rte_errno));
1475                 err = ENODEV;
1476                 goto error;
1477         }
1478         DRV_LOG(INFO,
1479                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1480                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1481 #ifdef RTE_LIBRTE_MLX5_DEBUG
1482         {
1483                 char ifname[MLX5_NAMESIZE];
1484
1485                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1486                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1487                                 eth_dev->data->port_id, ifname);
1488                 else
1489                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1490                                 eth_dev->data->port_id);
1491         }
1492 #endif
1493         /* Get actual MTU if possible. */
1494         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1495         if (err) {
1496                 err = rte_errno;
1497                 goto error;
1498         }
1499         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1500                 priv->mtu);
1501         /* Initialize burst functions to prevent crashes before link-up. */
1502         eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1503         eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1504         eth_dev->dev_ops = &mlx5_dev_ops;
1505         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1506         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1507         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1508         /* Register MAC address. */
1509         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1510         if (sh->dev_cap.vf && sh->config.vf_nl_en)
1511                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1512                                       mlx5_ifindex(eth_dev),
1513                                       eth_dev->data->mac_addrs,
1514                                       MLX5_MAX_MAC_ADDRESSES);
1515         priv->ctrl_flows = 0;
1516         rte_spinlock_init(&priv->flow_list_lock);
1517         TAILQ_INIT(&priv->flow_meters);
1518         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1519         if (!priv->mtr_profile_tbl)
1520                 goto error;
1521         /* Bring Ethernet device up. */
1522         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1523                 eth_dev->data->port_id);
1524         mlx5_set_link_up(eth_dev);
1525         /*
1526          * Even though the interrupt handler is not installed yet,
1527          * interrupts will still trigger on the async_fd from
1528          * Verbs context returned by ibv_open_device().
1529          */
1530         mlx5_link_update(eth_dev, 0);
1531         /* Detect minimal data bytes to inline. */
1532         mlx5_set_min_inline(spawn, config);
1533         /* Store device configuration on private structure. */
1534         priv->config = *config;
1535         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1536                 icfg[i].release_mem_en = !!sh->config.reclaim_mode;
1537                 if (sh->config.reclaim_mode)
1538                         icfg[i].per_core_cache = 0;
1539                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1540                 if (!priv->flows[i])
1541                         goto error;
1542         }
1543         /* Create context for virtual machine VLAN workaround. */
1544         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1545         if (sh->config.dv_flow_en) {
1546                 err = mlx5_alloc_shared_dr(priv);
1547                 if (err)
1548                         goto error;
1549                 if (mlx5_flex_item_port_init(eth_dev) < 0)
1550                         goto error;
1551         }
1552         if (mlx5_devx_obj_ops_en(sh)) {
1553                 priv->obj_ops = devx_obj_ops;
1554                 mlx5_queue_counter_id_prepare(eth_dev);
1555                 priv->obj_ops.lb_dummy_queue_create =
1556                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1557                 priv->obj_ops.lb_dummy_queue_release =
1558                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1559         } else if (spawn->max_port > UINT8_MAX) {
1560                 /* Verbs can't support ports larger than 255 by design. */
1561                 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1562                 err = ENOTSUP;
1563                 goto error;
1564         } else {
1565                 priv->obj_ops = ibv_obj_ops;
1566         }
1567         if (sh->config.tx_pp &&
1568             priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1569                 /*
1570                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1571                  * packet pacing and already checked above.
1572                  * Hence, we should only make sure the SQs will be created
1573                  * with DevX, not with Verbs.
1574                  * Verbs allocates the SQ UAR on its own and it can't be shared
1575                  * with Clock Queue UAR as required for Tx scheduling.
1576                  */
1577                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1578                 err = ENODEV;
1579                 goto error;
1580         }
1581         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1582         if (!priv->drop_queue.hrxq)
1583                 goto error;
1584         /* Port representor shares the same max priority with pf port. */
1585         if (!priv->sh->flow_priority_check_flag) {
1586                 /* Supported Verbs flow priority number detection. */
1587                 err = mlx5_flow_discover_priorities(eth_dev);
1588                 priv->sh->flow_max_priority = err;
1589                 priv->sh->flow_priority_check_flag = 1;
1590         } else {
1591                 err = priv->sh->flow_max_priority;
1592         }
1593         if (err < 0) {
1594                 err = -err;
1595                 goto error;
1596         }
1597         mlx5_set_metadata_mask(eth_dev);
1598         if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1599             !priv->sh->dv_regc0_mask) {
1600                 DRV_LOG(ERR, "metadata mode %u is not supported "
1601                              "(no metadata reg_c[0] is available)",
1602                              sh->config.dv_xmeta_en);
1603                         err = ENOTSUP;
1604                         goto error;
1605         }
1606         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1607                                        mlx5_hrxq_create_cb,
1608                                        mlx5_hrxq_match_cb,
1609                                        mlx5_hrxq_remove_cb,
1610                                        mlx5_hrxq_clone_cb,
1611                                        mlx5_hrxq_clone_free_cb);
1612         if (!priv->hrxqs)
1613                 goto error;
1614         rte_rwlock_init(&priv->ind_tbls_lock);
1615         /* Query availability of metadata reg_c's. */
1616         if (!priv->sh->metadata_regc_check_flag) {
1617                 err = mlx5_flow_discover_mreg_c(eth_dev);
1618                 if (err < 0) {
1619                         err = -err;
1620                         goto error;
1621                 }
1622         }
1623         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1624                 DRV_LOG(DEBUG,
1625                         "port %u extensive metadata register is not supported",
1626                         eth_dev->data->port_id);
1627                 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1628                         DRV_LOG(ERR, "metadata mode %u is not supported "
1629                                      "(no metadata registers available)",
1630                                      sh->config.dv_xmeta_en);
1631                         err = ENOTSUP;
1632                         goto error;
1633                 }
1634         }
1635         if (sh->config.dv_flow_en &&
1636             sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1637             mlx5_flow_ext_mreg_supported(eth_dev) &&
1638             priv->sh->dv_regc0_mask) {
1639                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1640                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1641                                                       false, true, eth_dev,
1642                                                       flow_dv_mreg_create_cb,
1643                                                       flow_dv_mreg_match_cb,
1644                                                       flow_dv_mreg_remove_cb,
1645                                                       flow_dv_mreg_clone_cb,
1646                                                     flow_dv_mreg_clone_free_cb);
1647                 if (!priv->mreg_cp_tbl) {
1648                         err = ENOMEM;
1649                         goto error;
1650                 }
1651         }
1652         rte_spinlock_init(&priv->shared_act_sl);
1653         mlx5_flow_counter_mode_config(eth_dev);
1654         mlx5_flow_drop_action_config(eth_dev);
1655         if (sh->config.dv_flow_en)
1656                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1657         return eth_dev;
1658 error:
1659         if (priv) {
1660                 if (priv->mreg_cp_tbl)
1661                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1662                 if (priv->sh)
1663                         mlx5_os_free_shared_dr(priv);
1664                 if (priv->nl_socket_route >= 0)
1665                         close(priv->nl_socket_route);
1666                 if (priv->vmwa_context)
1667                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1668                 if (eth_dev && priv->drop_queue.hrxq)
1669                         mlx5_drop_action_destroy(eth_dev);
1670                 if (priv->mtr_profile_tbl)
1671                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1672                 if (own_domain_id)
1673                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1674                 if (priv->hrxqs)
1675                         mlx5_list_destroy(priv->hrxqs);
1676                 if (eth_dev && priv->flex_item_map)
1677                         mlx5_flex_item_port_cleanup(eth_dev);
1678                 mlx5_free(priv);
1679                 if (eth_dev != NULL)
1680                         eth_dev->data->dev_private = NULL;
1681         }
1682         if (eth_dev != NULL) {
1683                 /* mac_addrs must not be freed alone because part of
1684                  * dev_private
1685                  **/
1686                 eth_dev->data->mac_addrs = NULL;
1687                 rte_eth_dev_release_port(eth_dev);
1688         }
1689         if (sh)
1690                 mlx5_free_shared_dev_ctx(sh);
1691         if (nl_rdma >= 0)
1692                 close(nl_rdma);
1693         MLX5_ASSERT(err > 0);
1694         rte_errno = err;
1695         return NULL;
1696 }
1697
1698 /**
1699  * Comparison callback to sort device data.
1700  *
1701  * This is meant to be used with qsort().
1702  *
1703  * @param a[in]
1704  *   Pointer to pointer to first data object.
1705  * @param b[in]
1706  *   Pointer to pointer to second data object.
1707  *
1708  * @return
1709  *   0 if both objects are equal, less than 0 if the first argument is less
1710  *   than the second, greater than 0 otherwise.
1711  */
1712 static int
1713 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1714 {
1715         const struct mlx5_switch_info *si_a =
1716                 &((const struct mlx5_dev_spawn_data *)a)->info;
1717         const struct mlx5_switch_info *si_b =
1718                 &((const struct mlx5_dev_spawn_data *)b)->info;
1719         int ret;
1720
1721         /* Master device first. */
1722         ret = si_b->master - si_a->master;
1723         if (ret)
1724                 return ret;
1725         /* Then representor devices. */
1726         ret = si_b->representor - si_a->representor;
1727         if (ret)
1728                 return ret;
1729         /* Unidentified devices come last in no specific order. */
1730         if (!si_a->representor)
1731                 return 0;
1732         /* Order representors by name. */
1733         return si_a->port_name - si_b->port_name;
1734 }
1735
1736 /**
1737  * Match PCI information for possible slaves of bonding device.
1738  *
1739  * @param[in] ibdev_name
1740  *   Name of Infiniband device.
1741  * @param[in] pci_dev
1742  *   Pointer to primary PCI address structure to match.
1743  * @param[in] nl_rdma
1744  *   Netlink RDMA group socket handle.
1745  * @param[in] owner
1746  *   Representor owner PF index.
1747  * @param[out] bond_info
1748  *   Pointer to bonding information.
1749  *
1750  * @return
1751  *   negative value if no bonding device found, otherwise
1752  *   positive index of slave PF in bonding.
1753  */
1754 static int
1755 mlx5_device_bond_pci_match(const char *ibdev_name,
1756                            const struct rte_pci_addr *pci_dev,
1757                            int nl_rdma, uint16_t owner,
1758                            struct mlx5_bond_info *bond_info)
1759 {
1760         char ifname[IF_NAMESIZE + 1];
1761         unsigned int ifindex;
1762         unsigned int np, i;
1763         FILE *bond_file = NULL, *file;
1764         int pf = -1;
1765         int ret;
1766         uint8_t cur_guid[32] = {0};
1767         uint8_t guid[32] = {0};
1768
1769         /*
1770          * Try to get master device name. If something goes wrong suppose
1771          * the lack of kernel support and no bonding devices.
1772          */
1773         memset(bond_info, 0, sizeof(*bond_info));
1774         if (nl_rdma < 0)
1775                 return -1;
1776         if (!strstr(ibdev_name, "bond"))
1777                 return -1;
1778         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1779         if (!np)
1780                 return -1;
1781         if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
1782                 return -1;
1783         /*
1784          * The master device might not be on the predefined port(not on port
1785          * index 1, it is not guaranteed), we have to scan all Infiniband
1786          * device ports and find master.
1787          */
1788         for (i = 1; i <= np; ++i) {
1789                 /* Check whether Infiniband port is populated. */
1790                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1791                 if (!ifindex)
1792                         continue;
1793                 if (!if_indextoname(ifindex, ifname))
1794                         continue;
1795                 /* Try to read bonding slave names from sysfs. */
1796                 MKSTR(slaves,
1797                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1798                 bond_file = fopen(slaves, "r");
1799                 if (bond_file)
1800                         break;
1801         }
1802         if (!bond_file)
1803                 return -1;
1804         /* Use safe format to check maximal buffer length. */
1805         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1806         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1807                 char tmp_str[IF_NAMESIZE + 32];
1808                 struct rte_pci_addr pci_addr;
1809                 struct mlx5_switch_info info;
1810                 int ret;
1811
1812                 /* Process slave interface names in the loop. */
1813                 snprintf(tmp_str, sizeof(tmp_str),
1814                          "/sys/class/net/%s", ifname);
1815                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1816                         DRV_LOG(WARNING,
1817                                 "Cannot get PCI address for netdev \"%s\".",
1818                                 ifname);
1819                         continue;
1820                 }
1821                 /* Slave interface PCI address match found. */
1822                 snprintf(tmp_str, sizeof(tmp_str),
1823                          "/sys/class/net/%s/phys_port_name", ifname);
1824                 file = fopen(tmp_str, "rb");
1825                 if (!file)
1826                         break;
1827                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1828                 if (fscanf(file, "%32s", tmp_str) == 1)
1829                         mlx5_translate_port_name(tmp_str, &info);
1830                 fclose(file);
1831                 /* Only process PF ports. */
1832                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1833                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1834                         continue;
1835                 /* Check max bonding member. */
1836                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1837                         DRV_LOG(WARNING, "bonding index out of range, "
1838                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1839                                 tmp_str);
1840                         break;
1841                 }
1842                 /* Get ifindex. */
1843                 snprintf(tmp_str, sizeof(tmp_str),
1844                          "/sys/class/net/%s/ifindex", ifname);
1845                 file = fopen(tmp_str, "rb");
1846                 if (!file)
1847                         break;
1848                 ret = fscanf(file, "%u", &ifindex);
1849                 fclose(file);
1850                 if (ret != 1)
1851                         break;
1852                 /* Save bonding info. */
1853                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1854                         sizeof(bond_info->ports[0].ifname));
1855                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1856                 bond_info->ports[info.port_name].ifindex = ifindex;
1857                 bond_info->n_port++;
1858                 /*
1859                  * Under socket direct mode, bonding will use
1860                  * system_image_guid as identification.
1861                  * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
1862                  * All bonding members should have the same guid even if driver
1863                  * is using PCIe BDF.
1864                  */
1865                 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
1866                 if (ret < 0)
1867                         break;
1868                 else if (ret > 0) {
1869                         if (!memcmp(guid, cur_guid, sizeof(guid)) &&
1870                             owner == info.port_name &&
1871                             (owner != 0 || (owner == 0 &&
1872                             !rte_pci_addr_cmp(pci_dev, &pci_addr))))
1873                                 pf = info.port_name;
1874                 } else if (pci_dev->domain == pci_addr.domain &&
1875                     pci_dev->bus == pci_addr.bus &&
1876                     pci_dev->devid == pci_addr.devid &&
1877                     ((pci_dev->function == 0 &&
1878                       pci_dev->function + owner == pci_addr.function) ||
1879                      (pci_dev->function == owner &&
1880                       pci_addr.function == owner)))
1881                         pf = info.port_name;
1882         }
1883         if (pf >= 0) {
1884                 /* Get bond interface info */
1885                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1886                                            bond_info->ifname);
1887                 if (ret)
1888                         DRV_LOG(ERR, "unable to get bond info: %s",
1889                                 strerror(rte_errno));
1890                 else
1891                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1892                                 ifindex, bond_info->ifindex, bond_info->ifname);
1893         }
1894         if (owner == 0 && pf != 0) {
1895                 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner",
1896                                 pci_dev->domain, pci_dev->bus, pci_dev->devid,
1897                                 pci_dev->function);
1898         }
1899         return pf;
1900 }
1901
1902 static void
1903 mlx5_os_config_default(struct mlx5_dev_config *config)
1904 {
1905         memset(config, 0, sizeof(*config));
1906         config->mps = MLX5_ARG_UNSET;
1907         config->cqe_comp = 1;
1908         config->rx_vec_en = 1;
1909         config->txq_inline_max = MLX5_ARG_UNSET;
1910         config->txq_inline_min = MLX5_ARG_UNSET;
1911         config->txq_inline_mpw = MLX5_ARG_UNSET;
1912         config->txqs_inline = MLX5_ARG_UNSET;
1913         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1914         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1915         config->mprq.log_stride_num = MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;
1916         config->log_hp_size = MLX5_ARG_UNSET;
1917         config->std_delay_drop = 0;
1918         config->hp_delay_drop = 0;
1919 }
1920
1921 /**
1922  * Register a PCI device within bonding.
1923  *
1924  * This function spawns Ethernet devices out of a given PCI device and
1925  * bonding owner PF index.
1926  *
1927  * @param[in] cdev
1928  *   Pointer to common mlx5 device structure.
1929  * @param[in] req_eth_da
1930  *   Requested ethdev device argument.
1931  * @param[in] owner_id
1932  *   Requested owner PF port ID within bonding device, default to 0.
1933  *
1934  * @return
1935  *   0 on success, a negative errno value otherwise and rte_errno is set.
1936  */
1937 static int
1938 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
1939                      struct rte_eth_devargs *req_eth_da,
1940                      uint16_t owner_id)
1941 {
1942         struct ibv_device **ibv_list;
1943         /*
1944          * Number of found IB Devices matching with requested PCI BDF.
1945          * nd != 1 means there are multiple IB devices over the same
1946          * PCI device and we have representors and master.
1947          */
1948         unsigned int nd = 0;
1949         /*
1950          * Number of found IB device Ports. nd = 1 and np = 1..n means
1951          * we have the single multiport IB device, and there may be
1952          * representors attached to some of found ports.
1953          */
1954         unsigned int np = 0;
1955         /*
1956          * Number of DPDK ethernet devices to Spawn - either over
1957          * multiple IB devices or multiple ports of single IB device.
1958          * Actually this is the number of iterations to spawn.
1959          */
1960         unsigned int ns = 0;
1961         /*
1962          * Bonding device
1963          *   < 0 - no bonding device (single one)
1964          *  >= 0 - bonding device (value is slave PF index)
1965          */
1966         int bd = -1;
1967         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
1968         struct mlx5_dev_spawn_data *list = NULL;
1969         struct mlx5_dev_config dev_config;
1970         struct rte_eth_devargs eth_da = *req_eth_da;
1971         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
1972         struct mlx5_bond_info bond_info;
1973         int ret = -1;
1974
1975         errno = 0;
1976         ibv_list = mlx5_glue->get_device_list(&ret);
1977         if (!ibv_list) {
1978                 rte_errno = errno ? errno : ENOSYS;
1979                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
1980                 return -rte_errno;
1981         }
1982         /*
1983          * First scan the list of all Infiniband devices to find
1984          * matching ones, gathering into the list.
1985          */
1986         struct ibv_device *ibv_match[ret + 1];
1987         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1988         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1989         unsigned int i;
1990
1991         while (ret-- > 0) {
1992                 struct rte_pci_addr pci_addr;
1993
1994                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
1995                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
1996                                                 nl_rdma, owner_id, &bond_info);
1997                 if (bd >= 0) {
1998                         /*
1999                          * Bonding device detected. Only one match is allowed,
2000                          * the bonding is supported over multi-port IB device,
2001                          * there should be no matches on representor PCI
2002                          * functions or non VF LAG bonding devices with
2003                          * specified address.
2004                          */
2005                         if (nd) {
2006                                 DRV_LOG(ERR,
2007                                         "multiple PCI match on bonding device"
2008                                         "\"%s\" found", ibv_list[ret]->name);
2009                                 rte_errno = ENOENT;
2010                                 ret = -rte_errno;
2011                                 goto exit;
2012                         }
2013                         /* Amend owner pci address if owner PF ID specified. */
2014                         if (eth_da.nb_representor_ports)
2015                                 owner_pci.function += owner_id;
2016                         DRV_LOG(INFO,
2017                                 "PCI information matches for slave %d bonding device \"%s\"",
2018                                 bd, ibv_list[ret]->name);
2019                         ibv_match[nd++] = ibv_list[ret];
2020                         break;
2021                 } else {
2022                         /* Bonding device not found. */
2023                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2024                                               &pci_addr))
2025                                 continue;
2026                         if (owner_pci.domain != pci_addr.domain ||
2027                             owner_pci.bus != pci_addr.bus ||
2028                             owner_pci.devid != pci_addr.devid ||
2029                             owner_pci.function != pci_addr.function)
2030                                 continue;
2031                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2032                                 ibv_list[ret]->name);
2033                         ibv_match[nd++] = ibv_list[ret];
2034                 }
2035         }
2036         ibv_match[nd] = NULL;
2037         if (!nd) {
2038                 /* No device matches, just complain and bail out. */
2039                 DRV_LOG(WARNING,
2040                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2041                         " are kernel drivers loaded?",
2042                         owner_pci.domain, owner_pci.bus,
2043                         owner_pci.devid, owner_pci.function);
2044                 rte_errno = ENOENT;
2045                 ret = -rte_errno;
2046                 goto exit;
2047         }
2048         if (nd == 1) {
2049                 /*
2050                  * Found single matching device may have multiple ports.
2051                  * Each port may be representor, we have to check the port
2052                  * number and check the representors existence.
2053                  */
2054                 if (nl_rdma >= 0)
2055                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2056                 if (!np)
2057                         DRV_LOG(WARNING,
2058                                 "Cannot get IB device \"%s\" ports number.",
2059                                 ibv_match[0]->name);
2060                 if (bd >= 0 && !np) {
2061                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2062                         rte_errno = ENOENT;
2063                         ret = -rte_errno;
2064                         goto exit;
2065                 }
2066         }
2067         /* Now we can determine the maximal amount of devices to be spawned. */
2068         list = mlx5_malloc(MLX5_MEM_ZERO,
2069                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2070                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2071         if (!list) {
2072                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2073                 rte_errno = ENOMEM;
2074                 ret = -rte_errno;
2075                 goto exit;
2076         }
2077         if (bd >= 0 || np > 1) {
2078                 /*
2079                  * Single IB device with multiple ports found,
2080                  * it may be E-Switch master device and representors.
2081                  * We have to perform identification through the ports.
2082                  */
2083                 MLX5_ASSERT(nl_rdma >= 0);
2084                 MLX5_ASSERT(ns == 0);
2085                 MLX5_ASSERT(nd == 1);
2086                 MLX5_ASSERT(np);
2087                 for (i = 1; i <= np; ++i) {
2088                         list[ns].bond_info = &bond_info;
2089                         list[ns].max_port = np;
2090                         list[ns].phys_port = i;
2091                         list[ns].phys_dev_name = ibv_match[0]->name;
2092                         list[ns].eth_dev = NULL;
2093                         list[ns].pci_dev = pci_dev;
2094                         list[ns].cdev = cdev;
2095                         list[ns].pf_bond = bd;
2096                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2097                                                            ibv_match[0]->name,
2098                                                            i);
2099                         if (!list[ns].ifindex) {
2100                                 /*
2101                                  * No network interface index found for the
2102                                  * specified port, it means there is no
2103                                  * representor on this port. It's OK,
2104                                  * there can be disabled ports, for example
2105                                  * if sriov_numvfs < sriov_totalvfs.
2106                                  */
2107                                 continue;
2108                         }
2109                         ret = -1;
2110                         if (nl_route >= 0)
2111                                 ret = mlx5_nl_switch_info(nl_route,
2112                                                           list[ns].ifindex,
2113                                                           &list[ns].info);
2114                         if (ret || (!list[ns].info.representor &&
2115                                     !list[ns].info.master)) {
2116                                 /*
2117                                  * We failed to recognize representors with
2118                                  * Netlink, let's try to perform the task
2119                                  * with sysfs.
2120                                  */
2121                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2122                                                              &list[ns].info);
2123                         }
2124                         if (!ret && bd >= 0) {
2125                                 switch (list[ns].info.name_type) {
2126                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2127                                         if (np == 1) {
2128                                                 /*
2129                                                  * Force standalone bonding
2130                                                  * device for ROCE LAG
2131                                                  * configurations.
2132                                                  */
2133                                                 list[ns].info.master = 0;
2134                                                 list[ns].info.representor = 0;
2135                                         }
2136                                         if (list[ns].info.port_name == bd)
2137                                                 ns++;
2138                                         break;
2139                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2140                                         /* Fallthrough */
2141                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2142                                         /* Fallthrough */
2143                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2144                                         if (list[ns].info.pf_num == bd)
2145                                                 ns++;
2146                                         break;
2147                                 default:
2148                                         break;
2149                                 }
2150                                 continue;
2151                         }
2152                         if (!ret && (list[ns].info.representor ^
2153                                      list[ns].info.master))
2154                                 ns++;
2155                 }
2156                 if (!ns) {
2157                         DRV_LOG(ERR,
2158                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2159                         rte_errno = ENOENT;
2160                         ret = -rte_errno;
2161                         goto exit;
2162                 }
2163         } else {
2164                 /*
2165                  * The existence of several matching entries (nd > 1) means
2166                  * port representors have been instantiated. No existing Verbs
2167                  * call nor sysfs entries can tell them apart, this can only
2168                  * be done through Netlink calls assuming kernel drivers are
2169                  * recent enough to support them.
2170                  *
2171                  * In the event of identification failure through Netlink,
2172                  * try again through sysfs, then:
2173                  *
2174                  * 1. A single IB device matches (nd == 1) with single
2175                  *    port (np=0/1) and is not a representor, assume
2176                  *    no switch support.
2177                  *
2178                  * 2. Otherwise no safe assumptions can be made;
2179                  *    complain louder and bail out.
2180                  */
2181                 for (i = 0; i != nd; ++i) {
2182                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2183                         list[ns].bond_info = NULL;
2184                         list[ns].max_port = 1;
2185                         list[ns].phys_port = 1;
2186                         list[ns].phys_dev_name = ibv_match[i]->name;
2187                         list[ns].eth_dev = NULL;
2188                         list[ns].pci_dev = pci_dev;
2189                         list[ns].cdev = cdev;
2190                         list[ns].pf_bond = -1;
2191                         list[ns].ifindex = 0;
2192                         if (nl_rdma >= 0)
2193                                 list[ns].ifindex = mlx5_nl_ifindex
2194                                                             (nl_rdma,
2195                                                              ibv_match[i]->name,
2196                                                              1);
2197                         if (!list[ns].ifindex) {
2198                                 char ifname[IF_NAMESIZE];
2199
2200                                 /*
2201                                  * Netlink failed, it may happen with old
2202                                  * ib_core kernel driver (before 4.16).
2203                                  * We can assume there is old driver because
2204                                  * here we are processing single ports IB
2205                                  * devices. Let's try sysfs to retrieve
2206                                  * the ifindex. The method works for
2207                                  * master device only.
2208                                  */
2209                                 if (nd > 1) {
2210                                         /*
2211                                          * Multiple devices found, assume
2212                                          * representors, can not distinguish
2213                                          * master/representor and retrieve
2214                                          * ifindex via sysfs.
2215                                          */
2216                                         continue;
2217                                 }
2218                                 ret = mlx5_get_ifname_sysfs
2219                                         (ibv_match[i]->ibdev_path, ifname);
2220                                 if (!ret)
2221                                         list[ns].ifindex =
2222                                                 if_nametoindex(ifname);
2223                                 if (!list[ns].ifindex) {
2224                                         /*
2225                                          * No network interface index found
2226                                          * for the specified device, it means
2227                                          * there it is neither representor
2228                                          * nor master.
2229                                          */
2230                                         continue;
2231                                 }
2232                         }
2233                         ret = -1;
2234                         if (nl_route >= 0)
2235                                 ret = mlx5_nl_switch_info(nl_route,
2236                                                           list[ns].ifindex,
2237                                                           &list[ns].info);
2238                         if (ret || (!list[ns].info.representor &&
2239                                     !list[ns].info.master)) {
2240                                 /*
2241                                  * We failed to recognize representors with
2242                                  * Netlink, let's try to perform the task
2243                                  * with sysfs.
2244                                  */
2245                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2246                                                              &list[ns].info);
2247                         }
2248                         if (!ret && (list[ns].info.representor ^
2249                                      list[ns].info.master)) {
2250                                 ns++;
2251                         } else if ((nd == 1) &&
2252                                    !list[ns].info.representor &&
2253                                    !list[ns].info.master) {
2254                                 /*
2255                                  * Single IB device with one physical port and
2256                                  * attached network device.
2257                                  * May be SRIOV is not enabled or there is no
2258                                  * representors.
2259                                  */
2260                                 DRV_LOG(INFO, "No E-Switch support detected.");
2261                                 ns++;
2262                                 break;
2263                         }
2264                 }
2265                 if (!ns) {
2266                         DRV_LOG(ERR,
2267                                 "Unable to recognize master/representors on the multiple IB devices.");
2268                         rte_errno = ENOENT;
2269                         ret = -rte_errno;
2270                         goto exit;
2271                 }
2272                 /*
2273                  * New kernels may add the switch_id attribute for the case
2274                  * there is no E-Switch and we wrongly recognized the only
2275                  * device as master. Override this if there is the single
2276                  * device with single port and new device name format present.
2277                  */
2278                 if (nd == 1 &&
2279                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2280                         list[0].info.master = 0;
2281                         list[0].info.representor = 0;
2282                 }
2283         }
2284         MLX5_ASSERT(ns);
2285         /*
2286          * Sort list to probe devices in natural order for users convenience
2287          * (i.e. master first, then representors from lowest to highest ID).
2288          */
2289         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2290         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2291                 /* Set devargs default values. */
2292                 if (eth_da.nb_mh_controllers == 0) {
2293                         eth_da.nb_mh_controllers = 1;
2294                         eth_da.mh_controllers[0] = 0;
2295                 }
2296                 if (eth_da.nb_ports == 0 && ns > 0) {
2297                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2298                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2299                                         pci_dev->device.devargs->args);
2300                         eth_da.nb_ports = 1;
2301                         eth_da.ports[0] = list[0].info.pf_num;
2302                 }
2303                 if (eth_da.nb_representor_ports == 0) {
2304                         eth_da.nb_representor_ports = 1;
2305                         eth_da.representor_ports[0] = 0;
2306                 }
2307         }
2308         for (i = 0; i != ns; ++i) {
2309                 uint32_t restore;
2310
2311                 /* Default configuration. */
2312                 mlx5_os_config_default(&dev_config);
2313                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2314                                                  &dev_config, &eth_da);
2315                 if (!list[i].eth_dev) {
2316                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2317                                 break;
2318                         /* Device is disabled or already spawned. Ignore it. */
2319                         continue;
2320                 }
2321                 restore = list[i].eth_dev->data->dev_flags;
2322                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2323                 /**
2324                  * Each representor has a dedicated interrupts vector.
2325                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2326                  * representor eth_dev object because representor and PF
2327                  * share the same PCI address.
2328                  * Override representor device with a dedicated
2329                  * interrupts handle here.
2330                  * Representor interrupts handle is released in mlx5_dev_stop().
2331                  */
2332                 if (list[i].info.representor) {
2333                         struct rte_intr_handle *intr_handle =
2334                                 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2335                         if (intr_handle == NULL) {
2336                                 DRV_LOG(ERR,
2337                                         "port %u failed to allocate memory for interrupt handler "
2338                                         "Rx interrupts will not be supported",
2339                                         i);
2340                                 rte_errno = ENOMEM;
2341                                 ret = -rte_errno;
2342                                 goto exit;
2343                         }
2344                         list[i].eth_dev->intr_handle = intr_handle;
2345                 }
2346                 /* Restore non-PCI flags cleared by the above call. */
2347                 list[i].eth_dev->data->dev_flags |= restore;
2348                 rte_eth_dev_probing_finish(list[i].eth_dev);
2349         }
2350         if (i != ns) {
2351                 DRV_LOG(ERR,
2352                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2353                         " encountering an error: %s",
2354                         owner_pci.domain, owner_pci.bus,
2355                         owner_pci.devid, owner_pci.function,
2356                         strerror(rte_errno));
2357                 ret = -rte_errno;
2358                 /* Roll back. */
2359                 while (i--) {
2360                         if (!list[i].eth_dev)
2361                                 continue;
2362                         mlx5_dev_close(list[i].eth_dev);
2363                         /* mac_addrs must not be freed because in dev_private */
2364                         list[i].eth_dev->data->mac_addrs = NULL;
2365                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2366                 }
2367                 /* Restore original error. */
2368                 rte_errno = -ret;
2369         } else {
2370                 ret = 0;
2371         }
2372 exit:
2373         /*
2374          * Do the routine cleanup:
2375          * - close opened Netlink sockets
2376          * - free allocated spawn data array
2377          * - free the Infiniband device list
2378          */
2379         if (nl_rdma >= 0)
2380                 close(nl_rdma);
2381         if (nl_route >= 0)
2382                 close(nl_route);
2383         if (list)
2384                 mlx5_free(list);
2385         MLX5_ASSERT(ibv_list);
2386         mlx5_glue->free_device_list(ibv_list);
2387         return ret;
2388 }
2389
2390 static int
2391 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2392                           struct rte_eth_devargs *eth_da)
2393 {
2394         int ret = 0;
2395
2396         if (dev->devargs == NULL)
2397                 return 0;
2398         memset(eth_da, 0, sizeof(*eth_da));
2399         /* Parse representor information first from class argument. */
2400         if (dev->devargs->cls_str)
2401                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2402         if (ret != 0) {
2403                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2404                         dev->devargs->cls_str);
2405                 return -rte_errno;
2406         }
2407         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2408                 /* Parse legacy device argument */
2409                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2410                 if (ret) {
2411                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2412                                 dev->devargs->args);
2413                         return -rte_errno;
2414                 }
2415         }
2416         return 0;
2417 }
2418
2419 /**
2420  * Callback to register a PCI device.
2421  *
2422  * This function spawns Ethernet devices out of a given PCI device.
2423  *
2424  * @param[in] cdev
2425  *   Pointer to common mlx5 device structure.
2426  *
2427  * @return
2428  *   0 on success, a negative errno value otherwise and rte_errno is set.
2429  */
2430 static int
2431 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2432 {
2433         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2434         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2435         int ret = 0;
2436         uint16_t p;
2437
2438         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2439         if (ret != 0)
2440                 return ret;
2441
2442         if (eth_da.nb_ports > 0) {
2443                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2444                 for (p = 0; p < eth_da.nb_ports; p++) {
2445                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2446                                                    eth_da.ports[p]);
2447                         if (ret)
2448                                 break;
2449                 }
2450                 if (ret) {
2451                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2452                                 "aborted due to prodding failure of PF %u",
2453                                 pci_dev->addr.domain, pci_dev->addr.bus,
2454                                 pci_dev->addr.devid, pci_dev->addr.function,
2455                                 eth_da.ports[p]);
2456                         mlx5_net_remove(cdev);
2457                 }
2458         } else {
2459                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2460         }
2461         return ret;
2462 }
2463
2464 /* Probe a single SF device on auxiliary bus, no representor support. */
2465 static int
2466 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2467 {
2468         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2469         struct mlx5_dev_config config;
2470         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2471         struct rte_device *dev = cdev->dev;
2472         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2473         struct rte_eth_dev *eth_dev;
2474         int ret = 0;
2475
2476         /* Parse ethdev devargs. */
2477         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2478         if (ret != 0)
2479                 return ret;
2480         /* Set default config data. */
2481         mlx5_os_config_default(&config);
2482         /* Init spawn data. */
2483         spawn.max_port = 1;
2484         spawn.phys_port = 1;
2485         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2486         ret = mlx5_auxiliary_get_ifindex(dev->name);
2487         if (ret < 0) {
2488                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2489                 return ret;
2490         }
2491         spawn.ifindex = ret;
2492         spawn.cdev = cdev;
2493         /* Spawn device. */
2494         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2495         if (eth_dev == NULL)
2496                 return -rte_errno;
2497         /* Post create. */
2498         eth_dev->intr_handle = adev->intr_handle;
2499         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2500                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2501                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2502                 eth_dev->data->numa_node = dev->numa_node;
2503         }
2504         rte_eth_dev_probing_finish(eth_dev);
2505         return 0;
2506 }
2507
2508 /**
2509  * Net class driver callback to probe a device.
2510  *
2511  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2512  *
2513  * @param[in] cdev
2514  *   Pointer to the common mlx5 device.
2515  *
2516  * @return
2517  *   0 on success, a negative errno value otherwise and rte_errno is set.
2518  */
2519 int
2520 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2521 {
2522         int ret;
2523
2524         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2525                 mlx5_pmd_socket_init();
2526         ret = mlx5_init_once();
2527         if (ret) {
2528                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2529                         strerror(rte_errno));
2530                 return -rte_errno;
2531         }
2532         ret = mlx5_probe_again_args_validate(cdev);
2533         if (ret) {
2534                 DRV_LOG(ERR, "Probe again parameters are not compatible : %s",
2535                         strerror(rte_errno));
2536                 return -rte_errno;
2537         }
2538         if (mlx5_dev_is_pci(cdev->dev))
2539                 return mlx5_os_pci_probe(cdev);
2540         else
2541                 return mlx5_os_auxiliary_probe(cdev);
2542 }
2543
2544 /**
2545  * Cleanup resources when the last device is closed.
2546  */
2547 void
2548 mlx5_os_net_cleanup(void)
2549 {
2550         mlx5_pmd_socket_uninit();
2551 }
2552
2553 /**
2554  * Install shared asynchronous device events handler.
2555  * This function is implemented to support event sharing
2556  * between multiple ports of single IB device.
2557  *
2558  * @param sh
2559  *   Pointer to mlx5_dev_ctx_shared object.
2560  */
2561 void
2562 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2563 {
2564         int ret;
2565         int flags;
2566         struct ibv_context *ctx = sh->cdev->ctx;
2567
2568         sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2569         if (sh->intr_handle == NULL) {
2570                 DRV_LOG(ERR, "Fail to allocate intr_handle");
2571                 rte_errno = ENOMEM;
2572                 return;
2573         }
2574         rte_intr_fd_set(sh->intr_handle, -1);
2575
2576         flags = fcntl(ctx->async_fd, F_GETFL);
2577         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2578         if (ret) {
2579                 DRV_LOG(INFO, "failed to change file descriptor async event"
2580                         " queue");
2581         } else {
2582                 rte_intr_fd_set(sh->intr_handle, ctx->async_fd);
2583                 rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);
2584                 if (rte_intr_callback_register(sh->intr_handle,
2585                                         mlx5_dev_interrupt_handler, sh)) {
2586                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2587                         rte_intr_fd_set(sh->intr_handle, -1);
2588                 }
2589         }
2590         if (sh->cdev->config.devx) {
2591 #ifdef HAVE_IBV_DEVX_ASYNC
2592                 sh->intr_handle_devx =
2593                         rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2594                 if (!sh->intr_handle_devx) {
2595                         DRV_LOG(ERR, "Fail to allocate intr_handle");
2596                         rte_errno = ENOMEM;
2597                         return;
2598                 }
2599                 rte_intr_fd_set(sh->intr_handle_devx, -1);
2600                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2601                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2602                 if (!devx_comp) {
2603                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2604                         return;
2605                 }
2606                 flags = fcntl(devx_comp->fd, F_GETFL);
2607                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2608                 if (ret) {
2609                         DRV_LOG(INFO, "failed to change file descriptor"
2610                                 " devx comp");
2611                         return;
2612                 }
2613                 rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);
2614                 rte_intr_type_set(sh->intr_handle_devx,
2615                                          RTE_INTR_HANDLE_EXT);
2616                 if (rte_intr_callback_register(sh->intr_handle_devx,
2617                                         mlx5_dev_interrupt_handler_devx, sh)) {
2618                         DRV_LOG(INFO, "Fail to install the devx shared"
2619                                 " interrupt.");
2620                         rte_intr_fd_set(sh->intr_handle_devx, -1);
2621                 }
2622 #endif /* HAVE_IBV_DEVX_ASYNC */
2623         }
2624 }
2625
2626 /**
2627  * Uninstall shared asynchronous device events handler.
2628  * This function is implemented to support event sharing
2629  * between multiple ports of single IB device.
2630  *
2631  * @param dev
2632  *   Pointer to mlx5_dev_ctx_shared object.
2633  */
2634 void
2635 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2636 {
2637         if (rte_intr_fd_get(sh->intr_handle) >= 0)
2638                 mlx5_intr_callback_unregister(sh->intr_handle,
2639                                               mlx5_dev_interrupt_handler, sh);
2640         rte_intr_instance_free(sh->intr_handle);
2641 #ifdef HAVE_IBV_DEVX_ASYNC
2642         if (rte_intr_fd_get(sh->intr_handle_devx) >= 0)
2643                 rte_intr_callback_unregister(sh->intr_handle_devx,
2644                                   mlx5_dev_interrupt_handler_devx, sh);
2645         rte_intr_instance_free(sh->intr_handle_devx);
2646         if (sh->devx_comp)
2647                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2648 #endif
2649 }
2650
2651 /**
2652  * Read statistics by a named counter.
2653  *
2654  * @param[in] priv
2655  *   Pointer to the private device data structure.
2656  * @param[in] ctr_name
2657  *   Pointer to the name of the statistic counter to read
2658  * @param[out] stat
2659  *   Pointer to read statistic value.
2660  * @return
2661  *   0 on success and stat is valud, 1 if failed to read the value
2662  *   rte_errno is set.
2663  *
2664  */
2665 int
2666 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2667                       uint64_t *stat)
2668 {
2669         int fd;
2670
2671         if (priv->sh) {
2672                 if (priv->q_counters != NULL &&
2673                     strcmp(ctr_name, "out_of_buffer") == 0)
2674                         return mlx5_devx_cmd_queue_counter_query
2675                                         (priv->q_counters, 0, (uint32_t *)stat);
2676                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2677                       priv->sh->ibdev_path,
2678                       priv->dev_port,
2679                       ctr_name);
2680                 fd = open(path, O_RDONLY);
2681                 /*
2682                  * in switchdev the file location is not per port
2683                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2684                  */
2685                 if (fd == -1) {
2686                         MKSTR(path1, "%s/hw_counters/%s",
2687                               priv->sh->ibdev_path,
2688                               ctr_name);
2689                         fd = open(path1, O_RDONLY);
2690                 }
2691                 if (fd != -1) {
2692                         char buf[21] = {'\0'};
2693                         ssize_t n = read(fd, buf, sizeof(buf));
2694
2695                         close(fd);
2696                         if (n != -1) {
2697                                 *stat = strtoull(buf, NULL, 10);
2698                                 return 0;
2699                         }
2700                 }
2701         }
2702         *stat = 0;
2703         return 1;
2704 }
2705
2706 /**
2707  * Remove a MAC address from device
2708  *
2709  * @param dev
2710  *   Pointer to Ethernet device structure.
2711  * @param index
2712  *   MAC address index.
2713  */
2714 void
2715 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2716 {
2717         struct mlx5_priv *priv = dev->data->dev_private;
2718         const int vf = priv->sh->dev_cap.vf;
2719
2720         if (vf)
2721                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2722                                         mlx5_ifindex(dev), priv->mac_own,
2723                                         &dev->data->mac_addrs[index], index);
2724 }
2725
2726 /**
2727  * Adds a MAC address to the device
2728  *
2729  * @param dev
2730  *   Pointer to Ethernet device structure.
2731  * @param mac_addr
2732  *   MAC address to register.
2733  * @param index
2734  *   MAC address index.
2735  *
2736  * @return
2737  *   0 on success, a negative errno value otherwise
2738  */
2739 int
2740 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2741                      uint32_t index)
2742 {
2743         struct mlx5_priv *priv = dev->data->dev_private;
2744         const int vf = priv->sh->dev_cap.vf;
2745         int ret = 0;
2746
2747         if (vf)
2748                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2749                                            mlx5_ifindex(dev), priv->mac_own,
2750                                            mac, index);
2751         return ret;
2752 }
2753
2754 /**
2755  * Modify a VF MAC address
2756  *
2757  * @param priv
2758  *   Pointer to device private data.
2759  * @param mac_addr
2760  *   MAC address to modify into.
2761  * @param iface_idx
2762  *   Net device interface index
2763  * @param vf_index
2764  *   VF index
2765  *
2766  * @return
2767  *   0 on success, a negative errno value otherwise
2768  */
2769 int
2770 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2771                            unsigned int iface_idx,
2772                            struct rte_ether_addr *mac_addr,
2773                            int vf_index)
2774 {
2775         return mlx5_nl_vf_mac_addr_modify
2776                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2777 }
2778
2779 /**
2780  * Set device promiscuous mode
2781  *
2782  * @param dev
2783  *   Pointer to Ethernet device structure.
2784  * @param enable
2785  *   0 - promiscuous is disabled, otherwise - enabled
2786  *
2787  * @return
2788  *   0 on success, a negative error value otherwise
2789  */
2790 int
2791 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2792 {
2793         struct mlx5_priv *priv = dev->data->dev_private;
2794
2795         return mlx5_nl_promisc(priv->nl_socket_route,
2796                                mlx5_ifindex(dev), !!enable);
2797 }
2798
2799 /**
2800  * Set device promiscuous mode
2801  *
2802  * @param dev
2803  *   Pointer to Ethernet device structure.
2804  * @param enable
2805  *   0 - all multicase is disabled, otherwise - enabled
2806  *
2807  * @return
2808  *   0 on success, a negative error value otherwise
2809  */
2810 int
2811 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2812 {
2813         struct mlx5_priv *priv = dev->data->dev_private;
2814
2815         return mlx5_nl_allmulti(priv->nl_socket_route,
2816                                 mlx5_ifindex(dev), !!enable);
2817 }
2818
2819 /**
2820  * Flush device MAC addresses
2821  *
2822  * @param dev
2823  *   Pointer to Ethernet device structure.
2824  *
2825  */
2826 void
2827 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2828 {
2829         struct mlx5_priv *priv = dev->data->dev_private;
2830
2831         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2832                                dev->data->mac_addrs,
2833                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2834 }