1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
18 #include <rte_malloc.h>
19 #include <ethdev_driver.h>
20 #include <ethdev_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_bus_auxiliary.h>
24 #include <rte_common.h>
25 #include <rte_kvargs.h>
26 #include <rte_rwlock.h>
27 #include <rte_spinlock.h>
28 #include <rte_string_fns.h>
29 #include <rte_alarm.h>
30 #include <rte_eal_paging.h>
32 #include <mlx5_glue.h>
33 #include <mlx5_devx_cmds.h>
34 #include <mlx5_common.h>
35 #include <mlx5_common_mp.h>
36 #include <mlx5_common_mr.h>
37 #include <mlx5_malloc.h>
39 #include "mlx5_defs.h"
41 #include "mlx5_common_os.h"
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
46 #include "mlx5_autoconf.h"
47 #include "mlx5_flow.h"
48 #include "rte_pmd_mlx5.h"
49 #include "mlx5_verbs.h"
51 #include "mlx5_devx.h"
53 #ifndef HAVE_IBV_MLX5_MOD_MPW
54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
64 /* Spinlock for mlx5_shared_data allocation. */
65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
67 /* Process local data for secondary processes. */
68 static struct mlx5_local_data mlx5_local_data;
70 /* rte flow indexed pool configuration. */
71 static struct mlx5_indexed_pool_config icfg[] = {
73 .size = sizeof(struct rte_flow),
77 .malloc = mlx5_malloc,
80 .type = "ctl_flow_ipool",
83 .size = sizeof(struct rte_flow),
89 .malloc = mlx5_malloc,
91 .per_core_cache = 1 << 14,
92 .type = "rte_flow_ipool",
95 .size = sizeof(struct rte_flow),
101 .malloc = mlx5_malloc,
104 .type = "mcp_flow_ipool",
109 * Set the completion channel file descriptor interrupt as non-blocking.
112 * Pointer to RQ channel object, which includes the channel fd
115 * The file descriptor (representing the intetrrupt) used in this channel.
118 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
121 mlx5_os_set_nonblock_channel_fd(int fd)
125 flags = fcntl(fd, F_GETFL);
126 return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
130 * Get mlx5 device attributes. The glue function query_device_ex() is called
131 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
132 * device attributes from the glue out parameter.
135 * Pointer to mlx5 device.
138 * Pointer to mlx5 device attributes.
141 * 0 on success, non zero error number otherwise
144 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
145 struct mlx5_dev_attr *device_attr)
148 struct ibv_context *ctx = cdev->ctx;
149 struct ibv_device_attr_ex attr_ex;
151 memset(device_attr, 0, sizeof(*device_attr));
152 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
155 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
156 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
157 device_attr->max_sge = attr_ex.orig_attr.max_sge;
158 device_attr->max_cq = attr_ex.orig_attr.max_cq;
159 device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
160 device_attr->max_mr = attr_ex.orig_attr.max_mr;
161 device_attr->max_pd = attr_ex.orig_attr.max_pd;
162 device_attr->max_qp = attr_ex.orig_attr.max_qp;
163 device_attr->max_srq = attr_ex.orig_attr.max_srq;
164 device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
165 device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
166 device_attr->max_rwq_indirection_table_size =
167 attr_ex.rss_caps.max_rwq_indirection_table_size;
168 device_attr->max_tso = attr_ex.tso_caps.max_tso;
169 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
171 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
172 err = mlx5_glue->dv_query_device(ctx, &dv_attr);
176 device_attr->flags = dv_attr.flags;
177 device_attr->comp_mask = dv_attr.comp_mask;
178 #ifdef HAVE_IBV_MLX5_MOD_SWP
179 device_attr->sw_parsing_offloads =
180 dv_attr.sw_parsing_caps.sw_parsing_offloads;
182 device_attr->min_single_stride_log_num_of_bytes =
183 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
184 device_attr->max_single_stride_log_num_of_bytes =
185 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
186 device_attr->min_single_wqe_log_num_of_strides =
187 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
188 device_attr->max_single_wqe_log_num_of_strides =
189 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
190 device_attr->stride_supported_qpts =
191 dv_attr.striding_rq_caps.supported_qpts;
192 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
193 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
195 strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
196 sizeof(device_attr->fw_ver));
202 * Detect misc5 support or not
205 * Device private data pointer
207 #ifdef HAVE_MLX5DV_DR
209 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
211 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
212 /* Dummy VxLAN matcher to detect rdma-core misc5 cap
213 * Case: IPv4--->UDP--->VxLAN--->vni
216 struct mlx5_flow_dv_match_params matcher_mask;
221 uint32_t *tunnel_header_m;
222 struct mlx5dv_flow_matcher_attr dv_attr;
224 memset(&matcher_mask, 0, sizeof(matcher_mask));
225 matcher_mask.size = sizeof(matcher_mask.buf);
226 match_m = matcher_mask.buf;
227 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
228 misc5_m = MLX5_ADDR_OF(fte_match_param,
229 match_m, misc_parameters_5);
230 tunnel_header_m = (uint32_t *)
231 MLX5_ADDR_OF(fte_match_set_misc5,
232 misc5_m, tunnel_header_1);
233 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
234 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
235 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
236 *tunnel_header_m = 0xffffff;
238 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
240 DRV_LOG(INFO, "No SW steering support");
243 dv_attr.type = IBV_FLOW_ATTR_NORMAL,
244 dv_attr.match_mask = (void *)&matcher_mask,
245 dv_attr.match_criteria_enable =
246 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
247 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
248 dv_attr.priority = 3;
249 #ifdef HAVE_MLX5DV_DR_ESWITCH
251 if (priv->config.dv_esw_en) {
252 /* FDB enabled reg_c_0 */
253 dv_attr.match_criteria_enable |=
254 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
255 misc2_m = MLX5_ADDR_OF(fte_match_param,
256 match_m, misc_parameters_2);
257 MLX5_SET(fte_match_set_misc2, misc2_m,
258 metadata_reg_c_0, 0xffff);
261 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
264 priv->sh->misc5_cap = 1;
265 mlx5_glue->dv_destroy_flow_matcher(matcher);
267 mlx5_glue->dr_destroy_flow_tbl(tbl);
275 * Initialize DR related data within private structure.
276 * Routine checks the reference counter and does actual
277 * resources creation/initialization only if counter is zero.
280 * Pointer to the private device data structure.
283 * Zero on success, positive error code otherwise.
286 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
288 struct mlx5_dev_ctx_shared *sh = priv->sh;
289 char s[MLX5_NAME_SIZE] __rte_unused;
292 MLX5_ASSERT(sh && sh->refcnt);
295 err = mlx5_alloc_table_hash_list(priv);
298 /* The resources below are only valid with DV support. */
299 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
300 /* Init port id action list. */
301 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
302 sh->port_id_action_list = mlx5_list_create(s, sh, true,
303 flow_dv_port_id_create_cb,
304 flow_dv_port_id_match_cb,
305 flow_dv_port_id_remove_cb,
306 flow_dv_port_id_clone_cb,
307 flow_dv_port_id_clone_free_cb);
308 if (!sh->port_id_action_list)
310 /* Init push vlan action list. */
311 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
312 sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
313 flow_dv_push_vlan_create_cb,
314 flow_dv_push_vlan_match_cb,
315 flow_dv_push_vlan_remove_cb,
316 flow_dv_push_vlan_clone_cb,
317 flow_dv_push_vlan_clone_free_cb);
318 if (!sh->push_vlan_action_list)
320 /* Init sample action list. */
321 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
322 sh->sample_action_list = mlx5_list_create(s, sh, true,
323 flow_dv_sample_create_cb,
324 flow_dv_sample_match_cb,
325 flow_dv_sample_remove_cb,
326 flow_dv_sample_clone_cb,
327 flow_dv_sample_clone_free_cb);
328 if (!sh->sample_action_list)
330 /* Init dest array action list. */
331 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
332 sh->dest_array_list = mlx5_list_create(s, sh, true,
333 flow_dv_dest_array_create_cb,
334 flow_dv_dest_array_match_cb,
335 flow_dv_dest_array_remove_cb,
336 flow_dv_dest_array_clone_cb,
337 flow_dv_dest_array_clone_free_cb);
338 if (!sh->dest_array_list)
341 #ifdef HAVE_MLX5DV_DR
344 /* Reference counter is zero, we should initialize structures. */
345 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
346 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
348 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
352 sh->rx_domain = domain;
353 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
354 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
356 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
360 sh->tx_domain = domain;
361 #ifdef HAVE_MLX5DV_DR_ESWITCH
362 if (priv->config.dv_esw_en) {
363 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
364 MLX5DV_DR_DOMAIN_TYPE_FDB);
366 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
370 sh->fdb_domain = domain;
373 * The drop action is just some dummy placeholder in rdma-core. It
374 * does not belong to domains and has no any attributes, and, can be
375 * shared by the entire device.
377 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
378 if (!sh->dr_drop_action) {
379 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
384 if (!sh->tunnel_hub && priv->config.dv_miss_info)
385 err = mlx5_alloc_tunnel_hub(sh);
387 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
390 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
391 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
392 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
394 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
396 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
397 if (!priv->config.allow_duplicate_pattern) {
398 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
399 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
401 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
402 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
404 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
407 __mlx5_discovery_misc5_cap(priv);
408 #endif /* HAVE_MLX5DV_DR */
409 sh->default_miss_action =
410 mlx5_glue->dr_create_flow_action_default_miss();
411 if (!sh->default_miss_action)
412 DRV_LOG(WARNING, "Default miss action is not supported.");
415 /* Rollback the created objects. */
417 mlx5_glue->dr_destroy_domain(sh->rx_domain);
418 sh->rx_domain = NULL;
421 mlx5_glue->dr_destroy_domain(sh->tx_domain);
422 sh->tx_domain = NULL;
424 if (sh->fdb_domain) {
425 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
426 sh->fdb_domain = NULL;
428 if (sh->dr_drop_action) {
429 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
430 sh->dr_drop_action = NULL;
432 if (sh->pop_vlan_action) {
433 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
434 sh->pop_vlan_action = NULL;
436 if (sh->encaps_decaps) {
437 mlx5_hlist_destroy(sh->encaps_decaps);
438 sh->encaps_decaps = NULL;
440 if (sh->modify_cmds) {
441 mlx5_hlist_destroy(sh->modify_cmds);
442 sh->modify_cmds = NULL;
445 /* tags should be destroyed with flow before. */
446 mlx5_hlist_destroy(sh->tag_table);
447 sh->tag_table = NULL;
449 if (sh->tunnel_hub) {
450 mlx5_release_tunnel_hub(sh, priv->dev_port);
451 sh->tunnel_hub = NULL;
453 mlx5_free_table_hash_list(priv);
454 if (sh->port_id_action_list) {
455 mlx5_list_destroy(sh->port_id_action_list);
456 sh->port_id_action_list = NULL;
458 if (sh->push_vlan_action_list) {
459 mlx5_list_destroy(sh->push_vlan_action_list);
460 sh->push_vlan_action_list = NULL;
462 if (sh->sample_action_list) {
463 mlx5_list_destroy(sh->sample_action_list);
464 sh->sample_action_list = NULL;
466 if (sh->dest_array_list) {
467 mlx5_list_destroy(sh->dest_array_list);
468 sh->dest_array_list = NULL;
474 * Destroy DR related data within private structure.
477 * Pointer to the private device data structure.
480 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
482 struct mlx5_dev_ctx_shared *sh = priv->sh;
484 MLX5_ASSERT(sh && sh->refcnt);
487 #ifdef HAVE_MLX5DV_DR
489 mlx5_glue->dr_destroy_domain(sh->rx_domain);
490 sh->rx_domain = NULL;
493 mlx5_glue->dr_destroy_domain(sh->tx_domain);
494 sh->tx_domain = NULL;
496 #ifdef HAVE_MLX5DV_DR_ESWITCH
497 if (sh->fdb_domain) {
498 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
499 sh->fdb_domain = NULL;
501 if (sh->dr_drop_action) {
502 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
503 sh->dr_drop_action = NULL;
506 if (sh->pop_vlan_action) {
507 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
508 sh->pop_vlan_action = NULL;
510 #endif /* HAVE_MLX5DV_DR */
511 if (sh->default_miss_action)
512 mlx5_glue->destroy_flow_action
513 (sh->default_miss_action);
514 if (sh->encaps_decaps) {
515 mlx5_hlist_destroy(sh->encaps_decaps);
516 sh->encaps_decaps = NULL;
518 if (sh->modify_cmds) {
519 mlx5_hlist_destroy(sh->modify_cmds);
520 sh->modify_cmds = NULL;
523 /* tags should be destroyed with flow before. */
524 mlx5_hlist_destroy(sh->tag_table);
525 sh->tag_table = NULL;
527 if (sh->tunnel_hub) {
528 mlx5_release_tunnel_hub(sh, priv->dev_port);
529 sh->tunnel_hub = NULL;
531 mlx5_free_table_hash_list(priv);
532 if (sh->port_id_action_list) {
533 mlx5_list_destroy(sh->port_id_action_list);
534 sh->port_id_action_list = NULL;
536 if (sh->push_vlan_action_list) {
537 mlx5_list_destroy(sh->push_vlan_action_list);
538 sh->push_vlan_action_list = NULL;
540 if (sh->sample_action_list) {
541 mlx5_list_destroy(sh->sample_action_list);
542 sh->sample_action_list = NULL;
544 if (sh->dest_array_list) {
545 mlx5_list_destroy(sh->dest_array_list);
546 sh->dest_array_list = NULL;
551 * Initialize shared data between primary and secondary process.
553 * A memzone is reserved by primary process and secondary processes attach to
557 * 0 on success, a negative errno value otherwise and rte_errno is set.
560 mlx5_init_shared_data(void)
562 const struct rte_memzone *mz;
565 rte_spinlock_lock(&mlx5_shared_data_lock);
566 if (mlx5_shared_data == NULL) {
567 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
568 /* Allocate shared memory. */
569 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
570 sizeof(*mlx5_shared_data),
574 "Cannot allocate mlx5 shared data");
578 mlx5_shared_data = mz->addr;
579 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
580 rte_spinlock_init(&mlx5_shared_data->lock);
582 /* Lookup allocated shared memory. */
583 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
586 "Cannot attach mlx5 shared data");
590 mlx5_shared_data = mz->addr;
591 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
595 rte_spinlock_unlock(&mlx5_shared_data_lock);
600 * PMD global initialization.
602 * Independent from individual device, this function initializes global
603 * per-PMD data structures distinguishing primary and secondary processes.
604 * Hence, each initialization is called once per a process.
607 * 0 on success, a negative errno value otherwise and rte_errno is set.
612 struct mlx5_shared_data *sd;
613 struct mlx5_local_data *ld = &mlx5_local_data;
616 if (mlx5_init_shared_data())
618 sd = mlx5_shared_data;
620 rte_spinlock_lock(&sd->lock);
621 switch (rte_eal_process_type()) {
622 case RTE_PROC_PRIMARY:
625 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
626 mlx5_mp_os_primary_handle);
629 sd->init_done = true;
631 case RTE_PROC_SECONDARY:
634 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
635 mlx5_mp_os_secondary_handle);
639 ld->init_done = true;
645 rte_spinlock_unlock(&sd->lock);
650 * DV flow counter mode detect and config.
653 * Pointer to rte_eth_dev structure.
657 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
659 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
660 struct mlx5_priv *priv = dev->data->dev_private;
661 struct mlx5_dev_ctx_shared *sh = priv->sh;
664 #ifndef HAVE_IBV_DEVX_ASYNC
668 if (!sh->devx || !priv->config.dv_flow_en ||
669 !priv->config.hca_attr.flow_counters_dump ||
670 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
671 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
675 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
676 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
677 priv->config.hca_attr.flow_counters_dump,
678 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
679 /* Initialize fallback mode only on the port initializes sh. */
681 sh->cmng.counter_fallback = fallback;
682 else if (fallback != sh->cmng.counter_fallback)
683 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
684 "with others:%d.", PORT_ID(priv), fallback);
689 * DR flow drop action support detect.
692 * Pointer to rte_eth_dev structure.
696 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
698 #ifdef HAVE_MLX5DV_DR
699 struct mlx5_priv *priv = dev->data->dev_private;
701 if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
704 * DR supports drop action placeholder when it is supported;
705 * otherwise, use the queue drop action.
707 if (mlx5_flow_discover_dr_action_support(dev))
708 priv->root_drop_action = priv->drop_queue.hrxq->action;
710 priv->root_drop_action = priv->sh->dr_drop_action;
715 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
717 struct mlx5_priv *priv = dev->data->dev_private;
718 void *ctx = priv->sh->cdev->ctx;
720 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
721 if (!priv->q_counters) {
722 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
725 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
726 "by DevX - fall-back to use the kernel driver global "
727 "queue counter.", dev->data->port_id);
728 /* Create WQ by kernel and query its queue counter ID. */
730 wq = mlx5_glue->create_wq(ctx,
731 &(struct ibv_wq_init_attr){
732 .wq_type = IBV_WQT_RQ,
735 .pd = priv->sh->cdev->pd,
739 /* Counter is assigned only on RDY state. */
740 int ret = mlx5_glue->modify_wq(wq,
741 &(struct ibv_wq_attr){
742 .attr_mask = IBV_WQ_ATTR_STATE,
743 .wq_state = IBV_WQS_RDY,
747 mlx5_devx_cmd_wq_query(wq,
748 &priv->counter_set_id);
749 claim_zero(mlx5_glue->destroy_wq(wq));
751 claim_zero(mlx5_glue->destroy_cq(cq));
754 priv->counter_set_id = priv->q_counters->id;
756 if (priv->counter_set_id == 0)
757 DRV_LOG(INFO, "Part of the port %d statistics will not be "
758 "available.", dev->data->port_id);
762 * Check if representor spawn info match devargs.
765 * Verbs device parameters (name, port, switch_info) to spawn.
767 * Device devargs to probe.
773 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
774 struct rte_eth_devargs *eth_da)
776 struct mlx5_switch_info *switch_info = &spawn->info;
779 uint16_t repr_id = mlx5_representor_id_encode(switch_info,
782 switch (eth_da->type) {
783 case RTE_ETH_REPRESENTOR_SF:
784 if (!(spawn->info.port_name == -1 &&
785 switch_info->name_type ==
786 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
787 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
792 case RTE_ETH_REPRESENTOR_VF:
793 /* Allows HPF representor index -1 as exception. */
794 if (!(spawn->info.port_name == -1 &&
795 switch_info->name_type ==
796 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
797 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
802 case RTE_ETH_REPRESENTOR_NONE:
807 DRV_LOG(ERR, "unsupported representor type");
810 /* Check representor ID: */
811 for (p = 0; p < eth_da->nb_ports; ++p) {
812 if (spawn->pf_bond < 0) {
813 /* For non-LAG mode, allow and ignore pf. */
814 switch_info->pf_num = eth_da->ports[p];
815 repr_id = mlx5_representor_id_encode(switch_info,
818 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
819 id = MLX5_REPRESENTOR_ID
820 (eth_da->ports[p], eth_da->type,
821 eth_da->representor_ports[f]);
831 * Spawn an Ethernet device from Verbs information.
834 * Backing DPDK device.
836 * Verbs device parameters (name, port, switch_info) to spawn.
838 * Device configuration parameters.
843 * A valid Ethernet device object on success, NULL otherwise and rte_errno
844 * is set. The following errors are defined:
846 * EBUSY: device is not supposed to be spawned.
847 * EEXIST: device is already spawned
849 static struct rte_eth_dev *
850 mlx5_dev_spawn(struct rte_device *dpdk_dev,
851 struct mlx5_dev_spawn_data *spawn,
852 struct mlx5_dev_config *config,
853 struct rte_eth_devargs *eth_da)
855 const struct mlx5_switch_info *switch_info = &spawn->info;
856 struct mlx5_dev_ctx_shared *sh = NULL;
857 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
858 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
859 struct rte_eth_dev *eth_dev = NULL;
860 struct mlx5_priv *priv = NULL;
862 unsigned int hw_padding = 0;
864 unsigned int mpls_en = 0;
865 unsigned int swp = 0;
866 unsigned int mprq = 0;
867 unsigned int mprq_min_stride_size_n = 0;
868 unsigned int mprq_max_stride_size_n = 0;
869 unsigned int mprq_min_stride_num_n = 0;
870 unsigned int mprq_max_stride_num_n = 0;
871 struct rte_ether_addr mac;
872 char name[RTE_ETH_NAME_MAX_LEN];
873 int own_domain_id = 0;
875 struct mlx5_port_info vport_info = { .query_flags = 0 };
879 /* Determine if this port representor is supposed to be spawned. */
880 if (switch_info->representor && dpdk_dev->devargs &&
881 !mlx5_representor_match(spawn, eth_da))
883 /* Build device name. */
884 if (spawn->pf_bond < 0) {
886 if (!switch_info->representor)
887 strlcpy(name, dpdk_dev->name, sizeof(name));
889 err = snprintf(name, sizeof(name), "%s_representor_%s%u",
891 switch_info->name_type ==
892 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
893 switch_info->port_name);
895 /* Bonding device. */
896 if (!switch_info->representor) {
897 err = snprintf(name, sizeof(name), "%s_%s",
898 dpdk_dev->name, spawn->phys_dev_name);
900 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
901 dpdk_dev->name, spawn->phys_dev_name,
902 switch_info->ctrl_num,
904 switch_info->name_type ==
905 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
906 switch_info->port_name);
909 if (err >= (int)sizeof(name))
910 DRV_LOG(WARNING, "device name overflow %s", name);
911 /* check if the device is already spawned */
912 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
916 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
917 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
918 struct mlx5_mp_id mp_id;
920 eth_dev = rte_eth_dev_attach_secondary(name);
921 if (eth_dev == NULL) {
922 DRV_LOG(ERR, "can not attach rte ethdev");
926 eth_dev->device = dpdk_dev;
927 eth_dev->dev_ops = &mlx5_dev_sec_ops;
928 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
929 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
930 err = mlx5_proc_priv_init(eth_dev);
933 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
934 /* Receive command fd from primary process */
935 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
938 /* Remap UAR for Tx queues. */
939 err = mlx5_tx_uar_init_secondary(eth_dev, err);
943 * Ethdev pointer is still required as input since
944 * the primary device is not accessible from the
947 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
948 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
951 mlx5_dev_close(eth_dev);
955 * Some parameters ("tx_db_nc" in particularly) are needed in
956 * advance to create dv/verbs device context. We proceed the
957 * devargs here to get ones, and later proceed devargs again
958 * to override some hardware settings.
960 err = mlx5_args(config, dpdk_dev->devargs);
963 DRV_LOG(ERR, "failed to process device arguments: %s",
964 strerror(rte_errno));
967 if (config->dv_miss_info) {
968 if (switch_info->master || switch_info->representor)
969 config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
971 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
974 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
975 config->dest_tir = 1;
977 #ifdef HAVE_IBV_MLX5_MOD_SWP
978 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
981 * Multi-packet send is supported by ConnectX-4 Lx PF as well
982 * as all ConnectX-5 devices.
984 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
985 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
987 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
988 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
990 mlx5_glue->dv_query_device(sh->cdev->ctx, &dv_attr);
991 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
992 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
993 DRV_LOG(DEBUG, "enhanced MPW is supported");
994 mps = MLX5_MPW_ENHANCED;
996 DRV_LOG(DEBUG, "MPW is supported");
1000 DRV_LOG(DEBUG, "MPW isn't supported");
1001 mps = MLX5_MPW_DISABLED;
1003 #ifdef HAVE_IBV_MLX5_MOD_SWP
1004 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1005 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1006 DRV_LOG(DEBUG, "SWP support: %u", swp);
1008 config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1009 MLX5_SW_PARSING_TSO_CAP);
1010 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1011 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1012 struct mlx5dv_striding_rq_caps mprq_caps =
1013 dv_attr.striding_rq_caps;
1015 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1016 mprq_caps.min_single_stride_log_num_of_bytes);
1017 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1018 mprq_caps.max_single_stride_log_num_of_bytes);
1019 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1020 mprq_caps.min_single_wqe_log_num_of_strides);
1021 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1022 mprq_caps.max_single_wqe_log_num_of_strides);
1023 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1024 mprq_caps.supported_qpts);
1025 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1027 mprq_min_stride_size_n =
1028 mprq_caps.min_single_stride_log_num_of_bytes;
1029 mprq_max_stride_size_n =
1030 mprq_caps.max_single_stride_log_num_of_bytes;
1031 mprq_min_stride_num_n =
1032 mprq_caps.min_single_wqe_log_num_of_strides;
1033 mprq_max_stride_num_n =
1034 mprq_caps.max_single_wqe_log_num_of_strides;
1037 /* Rx CQE compression is enabled by default. */
1038 config->cqe_comp = 1;
1039 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1040 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1041 config->tunnel_en = dv_attr.tunnel_offloads_caps &
1042 (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1043 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1044 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1046 if (config->tunnel_en) {
1047 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1049 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1051 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1053 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1056 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1060 "tunnel offloading disabled due to old OFED/rdma-core version");
1062 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1063 mpls_en = ((dv_attr.tunnel_offloads_caps &
1064 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1065 (dv_attr.tunnel_offloads_caps &
1066 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1067 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1068 mpls_en ? "" : "not ");
1070 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1071 " old OFED/rdma-core version or firmware configuration");
1073 config->mpls_en = mpls_en;
1074 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1075 /* Check port status. */
1076 if (spawn->phys_port <= UINT8_MAX) {
1077 /* Legacy Verbs api only support u8 port number. */
1078 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1081 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1084 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1085 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1089 } else if (nl_rdma >= 0) {
1090 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1091 err = mlx5_nl_port_state(nl_rdma,
1092 spawn->phys_dev_name,
1095 DRV_LOG(INFO, "Failed to get netlink port state: %s",
1096 strerror(rte_errno));
1100 port_attr.state = (enum ibv_port_state)err;
1102 if (port_attr.state != IBV_PORT_ACTIVE)
1103 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1104 mlx5_glue->port_state_str(port_attr.state),
1106 /* Allocate private eth device data. */
1107 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1109 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1111 DRV_LOG(ERR, "priv allocation failure");
1116 priv->dev_port = spawn->phys_port;
1117 priv->pci_dev = spawn->pci_dev;
1118 priv->mtu = RTE_ETHER_MTU;
1119 /* Some internal functions rely on Netlink sockets, open them now. */
1120 priv->nl_socket_rdma = nl_rdma;
1121 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1122 priv->representor = !!switch_info->representor;
1123 priv->master = !!switch_info->master;
1124 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1125 priv->vport_meta_tag = 0;
1126 priv->vport_meta_mask = 0;
1127 priv->pf_bond = spawn->pf_bond;
1130 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1131 priv->dev_port, dpdk_dev->bus->name,
1132 priv->pci_dev ? priv->pci_dev->name : "NONE",
1133 priv->master, priv->representor, priv->pf_bond);
1136 * If we have E-Switch we should determine the vport attributes.
1137 * E-Switch may use either source vport field or reg_c[0] metadata
1138 * register to match on vport index. The engaged part of metadata
1139 * register is defined by mask.
1141 if (switch_info->representor || switch_info->master) {
1142 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1147 "Cannot query devx port %d on device %s",
1148 spawn->phys_port, spawn->phys_dev_name);
1149 vport_info.query_flags = 0;
1152 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1153 priv->vport_meta_tag = vport_info.vport_meta_tag;
1154 priv->vport_meta_mask = vport_info.vport_meta_mask;
1155 if (!priv->vport_meta_mask) {
1157 "vport zero mask for port %d on bonding device %s",
1158 spawn->phys_port, spawn->phys_dev_name);
1162 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1164 "Invalid vport tag for port %d on bonding device %s",
1165 spawn->phys_port, spawn->phys_dev_name);
1170 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1171 priv->vport_id = vport_info.vport_id;
1172 } else if (spawn->pf_bond >= 0 &&
1173 (switch_info->representor || switch_info->master)) {
1175 "Cannot deduce vport index for port %d on bonding device %s",
1176 spawn->phys_port, spawn->phys_dev_name);
1181 * Suppose vport index in compatible way. Kernel/rdma_core
1182 * support single E-Switch per PF configurations only and
1183 * vport_id field contains the vport index for associated VF,
1184 * which is deduced from representor port name.
1185 * For example, let's have the IB device port 10, it has
1186 * attached network device eth0, which has port name attribute
1187 * pf0vf2, we can deduce the VF number as 2, and set vport index
1188 * as 3 (2+1). This assigning schema should be changed if the
1189 * multiple E-Switch instances per PF configurations or/and PCI
1190 * subfunctions are added.
1192 priv->vport_id = switch_info->representor ?
1193 switch_info->port_name + 1 : -1;
1195 priv->representor_id = mlx5_representor_id_encode(switch_info,
1198 * Look for sibling devices in order to reuse their switch domain
1199 * if any, otherwise allocate one.
1201 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1202 const struct mlx5_priv *opriv =
1203 rte_eth_devices[port_id].data->dev_private;
1206 opriv->sh != priv->sh ||
1208 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1210 priv->domain_id = opriv->domain_id;
1211 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1212 priv->dev_port, priv->domain_id);
1215 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1216 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1219 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1220 strerror(rte_errno));
1224 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1225 priv->dev_port, priv->domain_id);
1227 /* Override some values set by hardware configuration. */
1228 mlx5_args(config, dpdk_dev->devargs);
1229 err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev);
1232 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1233 IBV_DEVICE_RAW_IP_CSUM);
1234 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1235 (config->hw_csum ? "" : "not "));
1236 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1237 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1238 DRV_LOG(DEBUG, "counters are not supported");
1240 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1241 if (config->dv_flow_en) {
1242 DRV_LOG(WARNING, "DV flow is not supported");
1243 config->dv_flow_en = 0;
1246 config->ind_table_max_size =
1247 sh->device_attr.max_rwq_indirection_table_size;
1249 * Remove this check once DPDK supports larger/variable
1250 * indirection tables.
1252 if (config->ind_table_max_size > (unsigned int)RTE_ETH_RSS_RETA_SIZE_512)
1253 config->ind_table_max_size = RTE_ETH_RSS_RETA_SIZE_512;
1254 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1255 config->ind_table_max_size);
1256 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1257 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1258 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1259 (config->hw_vlan_strip ? "" : "not "));
1260 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1261 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1262 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1263 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1264 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1265 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1266 IBV_DEVICE_PCI_WRITE_END_PADDING);
1268 if (config->hw_padding && !hw_padding) {
1269 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1270 config->hw_padding = 0;
1271 } else if (config->hw_padding) {
1272 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1274 config->tso = (sh->device_attr.max_tso > 0 &&
1275 (sh->device_attr.tso_supported_qpts &
1276 (1 << IBV_QPT_RAW_PACKET)));
1278 config->tso_max_payload_sz = sh->device_attr.max_tso;
1280 * MPW is disabled by default, while the Enhanced MPW is enabled
1283 if (config->mps == MLX5_ARG_UNSET)
1284 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1287 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1288 DRV_LOG(INFO, "%sMPS is %s",
1289 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1290 config->mps == MLX5_MPW ? "legacy " : "",
1291 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1293 config->hca_attr = sh->cdev->config.hca_attr;
1294 sh->steering_format_version =
1295 config->hca_attr.steering_format_version;
1296 /* Check for LRO support. */
1297 if (config->dest_tir && config->hca_attr.lro_cap &&
1298 config->dv_flow_en) {
1299 /* TBD check tunnel lro caps. */
1300 config->lro.supported = config->hca_attr.lro_cap;
1301 DRV_LOG(DEBUG, "Device supports LRO");
1303 * If LRO timeout is not configured by application,
1304 * use the minimal supported value.
1306 if (!config->lro.timeout)
1307 config->lro.timeout =
1308 config->hca_attr.lro_timer_supported_periods[0];
1309 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1310 config->lro.timeout);
1311 DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1312 "required for coalescing is %d bytes",
1313 config->hca_attr.lro_min_mss_size);
1315 #if defined(HAVE_MLX5DV_DR) && \
1316 (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1317 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1318 if (config->hca_attr.qos.sup &&
1319 config->hca_attr.qos.flow_meter_old &&
1320 config->dv_flow_en) {
1321 uint8_t reg_c_mask =
1322 config->hca_attr.qos.flow_meter_reg_c_ids;
1324 * Meter needs two REG_C's for color match and pre-sfx
1325 * flow match. Here get the REG_C for color match.
1326 * REG_C_0 and REG_C_1 is reserved for metadata feature.
1329 if (__builtin_popcount(reg_c_mask) < 1) {
1331 DRV_LOG(WARNING, "No available register for"
1335 * The meter color register is used by the
1336 * flow-hit feature as well.
1337 * The flow-hit feature must use REG_C_3
1338 * Prefer REG_C_3 if it is available.
1340 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1341 priv->mtr_color_reg = REG_C_3;
1343 priv->mtr_color_reg = ffs(reg_c_mask)
1346 priv->mtr_reg_share =
1347 config->hca_attr.qos.flow_meter;
1348 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1349 priv->mtr_color_reg);
1352 if (config->hca_attr.qos.sup &&
1353 config->hca_attr.qos.flow_meter_aso_sup) {
1354 uint32_t log_obj_size =
1355 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1357 config->hca_attr.qos.log_meter_aso_granularity &&
1359 config->hca_attr.qos.log_meter_aso_max_alloc)
1360 sh->meter_aso_en = 1;
1363 err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1369 if (config->hca_attr.flow.tunnel_header_0_1)
1370 sh->tunnel_header_0_1 = 1;
1372 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1373 if (config->hca_attr.flow_hit_aso &&
1374 priv->mtr_color_reg == REG_C_3) {
1375 sh->flow_hit_aso_en = 1;
1376 err = mlx5_flow_aso_age_mng_init(sh);
1381 DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1383 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1384 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1385 defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1386 if (config->hca_attr.ct_offload &&
1387 priv->mtr_color_reg == REG_C_3) {
1388 err = mlx5_flow_aso_ct_mng_init(sh);
1393 DRV_LOG(DEBUG, "CT ASO is supported.");
1396 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1397 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1398 if (config->hca_attr.log_max_ft_sampler_num > 0 &&
1399 config->dv_flow_en) {
1400 priv->sampler_en = 1;
1401 DRV_LOG(DEBUG, "Sampler enabled!");
1403 priv->sampler_en = 0;
1404 if (!config->hca_attr.log_max_ft_sampler_num)
1406 "No available register for sampler.");
1408 DRV_LOG(DEBUG, "DV flow is not supported!");
1412 if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1413 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1414 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1415 config->cqe_comp = 0;
1417 if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1418 (!sh->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1419 DRV_LOG(WARNING, "Flow Tag CQE compression"
1420 " format isn't supported.");
1421 config->cqe_comp = 0;
1423 if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1424 (!sh->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1425 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1426 " format isn't supported.");
1427 config->cqe_comp = 0;
1429 DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1430 config->cqe_comp ? "" : "not ");
1431 if (config->tx_pp) {
1432 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1433 config->hca_attr.dev_freq_khz);
1434 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1435 config->hca_attr.qos.packet_pacing ? "" : "not ");
1436 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1437 config->hca_attr.cross_channel ? "" : "not ");
1438 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1439 config->hca_attr.wqe_index_ignore ? "" : "not ");
1440 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1441 config->hca_attr.non_wire_sq ? "" : "not ");
1442 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1443 config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1444 config->hca_attr.log_max_static_sq_wq);
1445 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1446 config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1448 DRV_LOG(ERR, "DevX is required for packet pacing");
1452 if (!config->hca_attr.qos.packet_pacing) {
1453 DRV_LOG(ERR, "Packet pacing is not supported");
1457 if (!config->hca_attr.cross_channel) {
1458 DRV_LOG(ERR, "Cross channel operations are"
1459 " required for packet pacing");
1463 if (!config->hca_attr.wqe_index_ignore) {
1464 DRV_LOG(ERR, "WQE index ignore feature is"
1465 " required for packet pacing");
1469 if (!config->hca_attr.non_wire_sq) {
1470 DRV_LOG(ERR, "Non-wire SQ feature is"
1471 " required for packet pacing");
1475 if (!config->hca_attr.log_max_static_sq_wq) {
1476 DRV_LOG(ERR, "Static WQE SQ feature is"
1477 " required for packet pacing");
1481 if (!config->hca_attr.qos.wqe_rate_pp) {
1482 DRV_LOG(ERR, "WQE rate mode is required"
1483 " for packet pacing");
1487 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1488 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1489 " can't create queues for packet pacing");
1495 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1497 err = config->hca_attr.access_register_user ?
1498 mlx5_devx_cmd_register_read
1499 (sh->cdev->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1500 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1504 /* MTUTC register is read successfully. */
1505 ts_mode = MLX5_GET(register_mtutc, reg,
1507 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1508 config->rt_timestamp = 1;
1510 /* Kernel does not support register reading. */
1511 if (config->hca_attr.dev_freq_khz ==
1512 (NS_PER_S / MS_PER_S))
1513 config->rt_timestamp = 1;
1517 * If HW has bug working with tunnel packet decapsulation and
1518 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1519 * bit. Then RTE_ETH_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1521 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1522 config->hw_fcs_strip = 0;
1523 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1524 (config->hw_fcs_strip ? "" : "not "));
1525 if (config->mprq.enabled && mprq) {
1526 if (config->mprq.stride_num_n &&
1527 (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1528 config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1529 config->mprq.stride_num_n =
1530 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1531 mprq_min_stride_num_n),
1532 mprq_max_stride_num_n);
1534 "the number of strides"
1535 " for Multi-Packet RQ is out of range,"
1536 " setting default value (%u)",
1537 1 << config->mprq.stride_num_n);
1539 if (config->mprq.stride_size_n &&
1540 (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1541 config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1542 config->mprq.stride_size_n =
1543 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1544 mprq_min_stride_size_n),
1545 mprq_max_stride_size_n);
1547 "the size of a stride"
1548 " for Multi-Packet RQ is out of range,"
1549 " setting default value (%u)",
1550 1 << config->mprq.stride_size_n);
1552 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1553 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1554 } else if (config->mprq.enabled && !mprq) {
1555 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1556 config->mprq.enabled = 0;
1558 if (config->max_dump_files_num == 0)
1559 config->max_dump_files_num = 128;
1560 eth_dev = rte_eth_dev_allocate(name);
1561 if (eth_dev == NULL) {
1562 DRV_LOG(ERR, "can not allocate rte ethdev");
1566 if (priv->representor) {
1567 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1568 eth_dev->data->representor_id = priv->representor_id;
1569 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1570 struct mlx5_priv *opriv =
1571 rte_eth_devices[port_id].data->dev_private;
1574 opriv->domain_id == priv->domain_id &&
1575 opriv->sh == priv->sh) {
1576 eth_dev->data->backer_port_id = port_id;
1580 if (port_id >= RTE_MAX_ETHPORTS)
1581 eth_dev->data->backer_port_id = eth_dev->data->port_id;
1583 priv->mp_id.port_id = eth_dev->data->port_id;
1584 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1586 * Store associated network device interface index. This index
1587 * is permanent throughout the lifetime of device. So, we may store
1588 * the ifindex here and use the cached value further.
1590 MLX5_ASSERT(spawn->ifindex);
1591 priv->if_index = spawn->ifindex;
1592 priv->lag_affinity_idx = sh->refcnt - 1;
1593 eth_dev->data->dev_private = priv;
1594 priv->dev_data = eth_dev->data;
1595 eth_dev->data->mac_addrs = priv->mac;
1596 eth_dev->device = dpdk_dev;
1597 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1598 /* Configure the first MAC address by default. */
1599 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1601 "port %u cannot get MAC address, is mlx5_en"
1602 " loaded? (errno: %s)",
1603 eth_dev->data->port_id, strerror(rte_errno));
1608 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1609 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1610 #ifdef RTE_LIBRTE_MLX5_DEBUG
1612 char ifname[MLX5_NAMESIZE];
1614 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1615 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1616 eth_dev->data->port_id, ifname);
1618 DRV_LOG(DEBUG, "port %u ifname is unknown",
1619 eth_dev->data->port_id);
1622 /* Get actual MTU if possible. */
1623 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1628 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1630 /* Initialize burst functions to prevent crashes before link-up. */
1631 eth_dev->rx_pkt_burst = removed_rx_burst;
1632 eth_dev->tx_pkt_burst = removed_tx_burst;
1633 eth_dev->dev_ops = &mlx5_dev_ops;
1634 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1635 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1636 eth_dev->rx_queue_count = mlx5_rx_queue_count;
1637 /* Register MAC address. */
1638 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1639 if (config->vf && config->vf_nl_en)
1640 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1641 mlx5_ifindex(eth_dev),
1642 eth_dev->data->mac_addrs,
1643 MLX5_MAX_MAC_ADDRESSES);
1644 priv->ctrl_flows = 0;
1645 rte_spinlock_init(&priv->flow_list_lock);
1646 TAILQ_INIT(&priv->flow_meters);
1647 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1648 if (!priv->mtr_profile_tbl)
1650 /* Bring Ethernet device up. */
1651 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1652 eth_dev->data->port_id);
1653 mlx5_set_link_up(eth_dev);
1655 * Even though the interrupt handler is not installed yet,
1656 * interrupts will still trigger on the async_fd from
1657 * Verbs context returned by ibv_open_device().
1659 mlx5_link_update(eth_dev, 0);
1660 #ifdef HAVE_MLX5DV_DR_ESWITCH
1661 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1662 (switch_info->representor || switch_info->master)))
1663 config->dv_esw_en = 0;
1665 config->dv_esw_en = 0;
1667 /* Detect minimal data bytes to inline. */
1668 mlx5_set_min_inline(spawn, config);
1669 /* Store device configuration on private structure. */
1670 priv->config = *config;
1671 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1672 icfg[i].release_mem_en = !!config->reclaim_mode;
1673 if (config->reclaim_mode)
1674 icfg[i].per_core_cache = 0;
1675 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1676 if (!priv->flows[i])
1679 /* Create context for virtual machine VLAN workaround. */
1680 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1681 if (config->dv_flow_en) {
1682 err = mlx5_alloc_shared_dr(priv);
1686 if (sh->devx && config->dv_flow_en && config->dest_tir) {
1687 priv->obj_ops = devx_obj_ops;
1688 priv->obj_ops.drop_action_create =
1689 ibv_obj_ops.drop_action_create;
1690 priv->obj_ops.drop_action_destroy =
1691 ibv_obj_ops.drop_action_destroy;
1692 mlx5_queue_counter_id_prepare(eth_dev);
1693 priv->obj_ops.lb_dummy_queue_create =
1694 mlx5_rxq_ibv_obj_dummy_lb_create;
1695 priv->obj_ops.lb_dummy_queue_release =
1696 mlx5_rxq_ibv_obj_dummy_lb_release;
1697 } else if (spawn->max_port > UINT8_MAX) {
1698 /* Verbs can't support ports larger than 255 by design. */
1699 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1703 priv->obj_ops = ibv_obj_ops;
1705 if (config->tx_pp &&
1706 (priv->config.dv_esw_en ||
1707 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new)) {
1709 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1710 * packet pacing and already checked above.
1711 * Hence, we should only make sure the SQs will be created
1712 * with DevX, not with Verbs.
1713 * Verbs allocates the SQ UAR on its own and it can't be shared
1714 * with Clock Queue UAR as required for Tx scheduling.
1716 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1720 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1721 if (!priv->drop_queue.hrxq)
1723 /* Supported Verbs flow priority number detection. */
1724 err = mlx5_flow_discover_priorities(eth_dev);
1729 priv->config.flow_prio = err;
1730 if (!priv->config.dv_esw_en &&
1731 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1732 DRV_LOG(WARNING, "metadata mode %u is not supported "
1733 "(no E-Switch)", priv->config.dv_xmeta_en);
1734 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1736 mlx5_set_metadata_mask(eth_dev);
1737 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1738 !priv->sh->dv_regc0_mask) {
1739 DRV_LOG(ERR, "metadata mode %u is not supported "
1740 "(no metadata reg_c[0] is available)",
1741 priv->config.dv_xmeta_en);
1745 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1746 mlx5_hrxq_create_cb,
1748 mlx5_hrxq_remove_cb,
1750 mlx5_hrxq_clone_free_cb);
1753 rte_rwlock_init(&priv->ind_tbls_lock);
1754 /* Query availability of metadata reg_c's. */
1755 err = mlx5_flow_discover_mreg_c(eth_dev);
1760 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1762 "port %u extensive metadata register is not supported",
1763 eth_dev->data->port_id);
1764 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1765 DRV_LOG(ERR, "metadata mode %u is not supported "
1766 "(no metadata registers available)",
1767 priv->config.dv_xmeta_en);
1772 if (priv->config.dv_flow_en &&
1773 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1774 mlx5_flow_ext_mreg_supported(eth_dev) &&
1775 priv->sh->dv_regc0_mask) {
1776 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1777 MLX5_FLOW_MREG_HTABLE_SZ,
1778 false, true, eth_dev,
1779 flow_dv_mreg_create_cb,
1780 flow_dv_mreg_match_cb,
1781 flow_dv_mreg_remove_cb,
1782 flow_dv_mreg_clone_cb,
1783 flow_dv_mreg_clone_free_cb);
1784 if (!priv->mreg_cp_tbl) {
1789 rte_spinlock_init(&priv->shared_act_sl);
1790 mlx5_flow_counter_mode_config(eth_dev);
1791 mlx5_flow_drop_action_config(eth_dev);
1792 if (priv->config.dv_flow_en)
1793 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1797 if (priv->mreg_cp_tbl)
1798 mlx5_hlist_destroy(priv->mreg_cp_tbl);
1800 mlx5_os_free_shared_dr(priv);
1801 if (priv->nl_socket_route >= 0)
1802 close(priv->nl_socket_route);
1803 if (priv->vmwa_context)
1804 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1805 if (eth_dev && priv->drop_queue.hrxq)
1806 mlx5_drop_action_destroy(eth_dev);
1807 if (priv->mtr_profile_tbl)
1808 mlx5_l3t_destroy(priv->mtr_profile_tbl);
1810 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1812 mlx5_list_destroy(priv->hrxqs);
1814 if (eth_dev != NULL)
1815 eth_dev->data->dev_private = NULL;
1817 if (eth_dev != NULL) {
1818 /* mac_addrs must not be freed alone because part of
1821 eth_dev->data->mac_addrs = NULL;
1822 rte_eth_dev_release_port(eth_dev);
1825 mlx5_free_shared_dev_ctx(sh);
1828 MLX5_ASSERT(err > 0);
1834 * Comparison callback to sort device data.
1836 * This is meant to be used with qsort().
1839 * Pointer to pointer to first data object.
1841 * Pointer to pointer to second data object.
1844 * 0 if both objects are equal, less than 0 if the first argument is less
1845 * than the second, greater than 0 otherwise.
1848 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1850 const struct mlx5_switch_info *si_a =
1851 &((const struct mlx5_dev_spawn_data *)a)->info;
1852 const struct mlx5_switch_info *si_b =
1853 &((const struct mlx5_dev_spawn_data *)b)->info;
1856 /* Master device first. */
1857 ret = si_b->master - si_a->master;
1860 /* Then representor devices. */
1861 ret = si_b->representor - si_a->representor;
1864 /* Unidentified devices come last in no specific order. */
1865 if (!si_a->representor)
1867 /* Order representors by name. */
1868 return si_a->port_name - si_b->port_name;
1872 * Match PCI information for possible slaves of bonding device.
1874 * @param[in] ibdev_name
1875 * Name of Infiniband device.
1876 * @param[in] pci_dev
1877 * Pointer to primary PCI address structure to match.
1878 * @param[in] nl_rdma
1879 * Netlink RDMA group socket handle.
1881 * Representor owner PF index.
1882 * @param[out] bond_info
1883 * Pointer to bonding information.
1886 * negative value if no bonding device found, otherwise
1887 * positive index of slave PF in bonding.
1890 mlx5_device_bond_pci_match(const char *ibdev_name,
1891 const struct rte_pci_addr *pci_dev,
1892 int nl_rdma, uint16_t owner,
1893 struct mlx5_bond_info *bond_info)
1895 char ifname[IF_NAMESIZE + 1];
1896 unsigned int ifindex;
1898 FILE *bond_file = NULL, *file;
1903 * Try to get master device name. If something goes wrong suppose
1904 * the lack of kernel support and no bonding devices.
1906 memset(bond_info, 0, sizeof(*bond_info));
1909 if (!strstr(ibdev_name, "bond"))
1911 np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1915 * The master device might not be on the predefined port(not on port
1916 * index 1, it is not guaranteed), we have to scan all Infiniband
1917 * device ports and find master.
1919 for (i = 1; i <= np; ++i) {
1920 /* Check whether Infiniband port is populated. */
1921 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1924 if (!if_indextoname(ifindex, ifname))
1926 /* Try to read bonding slave names from sysfs. */
1928 "/sys/class/net/%s/master/bonding/slaves", ifname);
1929 bond_file = fopen(slaves, "r");
1935 /* Use safe format to check maximal buffer length. */
1936 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1937 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1938 char tmp_str[IF_NAMESIZE + 32];
1939 struct rte_pci_addr pci_addr;
1940 struct mlx5_switch_info info;
1942 /* Process slave interface names in the loop. */
1943 snprintf(tmp_str, sizeof(tmp_str),
1944 "/sys/class/net/%s", ifname);
1945 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1947 "Cannot get PCI address for netdev \"%s\".",
1951 /* Slave interface PCI address match found. */
1952 snprintf(tmp_str, sizeof(tmp_str),
1953 "/sys/class/net/%s/phys_port_name", ifname);
1954 file = fopen(tmp_str, "rb");
1957 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1958 if (fscanf(file, "%32s", tmp_str) == 1)
1959 mlx5_translate_port_name(tmp_str, &info);
1961 /* Only process PF ports. */
1962 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1963 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1965 /* Check max bonding member. */
1966 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1967 DRV_LOG(WARNING, "bonding index out of range, "
1968 "please increase MLX5_BOND_MAX_PORTS: %s",
1972 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
1973 if (pci_dev->domain == pci_addr.domain &&
1974 pci_dev->bus == pci_addr.bus &&
1975 pci_dev->devid == pci_addr.devid &&
1976 ((pci_dev->function == 0 &&
1977 pci_dev->function + owner == pci_addr.function) ||
1978 (pci_dev->function == owner &&
1979 pci_addr.function == owner)))
1980 pf = info.port_name;
1982 snprintf(tmp_str, sizeof(tmp_str),
1983 "/sys/class/net/%s/ifindex", ifname);
1984 file = fopen(tmp_str, "rb");
1987 ret = fscanf(file, "%u", &ifindex);
1991 /* Save bonding info. */
1992 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1993 sizeof(bond_info->ports[0].ifname));
1994 bond_info->ports[info.port_name].pci_addr = pci_addr;
1995 bond_info->ports[info.port_name].ifindex = ifindex;
1996 bond_info->n_port++;
1999 /* Get bond interface info */
2000 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2003 DRV_LOG(ERR, "unable to get bond info: %s",
2004 strerror(rte_errno));
2006 DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2007 ifindex, bond_info->ifindex, bond_info->ifname);
2013 mlx5_os_config_default(struct mlx5_dev_config *config)
2015 memset(config, 0, sizeof(*config));
2016 config->mps = MLX5_ARG_UNSET;
2017 config->rx_vec_en = 1;
2018 config->txq_inline_max = MLX5_ARG_UNSET;
2019 config->txq_inline_min = MLX5_ARG_UNSET;
2020 config->txq_inline_mpw = MLX5_ARG_UNSET;
2021 config->txqs_inline = MLX5_ARG_UNSET;
2022 config->vf_nl_en = 1;
2023 config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2024 config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2025 config->dv_esw_en = 1;
2026 config->dv_flow_en = 1;
2027 config->decap_en = 1;
2028 config->log_hp_size = MLX5_ARG_UNSET;
2029 config->allow_duplicate_pattern = 1;
2033 * Register a PCI device within bonding.
2035 * This function spawns Ethernet devices out of a given PCI device and
2036 * bonding owner PF index.
2039 * Pointer to common mlx5 device structure.
2040 * @param[in] req_eth_da
2041 * Requested ethdev device argument.
2042 * @param[in] owner_id
2043 * Requested owner PF port ID within bonding device, default to 0.
2046 * 0 on success, a negative errno value otherwise and rte_errno is set.
2049 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2050 struct rte_eth_devargs *req_eth_da,
2053 struct ibv_device **ibv_list;
2055 * Number of found IB Devices matching with requested PCI BDF.
2056 * nd != 1 means there are multiple IB devices over the same
2057 * PCI device and we have representors and master.
2059 unsigned int nd = 0;
2061 * Number of found IB device Ports. nd = 1 and np = 1..n means
2062 * we have the single multiport IB device, and there may be
2063 * representors attached to some of found ports.
2065 unsigned int np = 0;
2067 * Number of DPDK ethernet devices to Spawn - either over
2068 * multiple IB devices or multiple ports of single IB device.
2069 * Actually this is the number of iterations to spawn.
2071 unsigned int ns = 0;
2074 * < 0 - no bonding device (single one)
2075 * >= 0 - bonding device (value is slave PF index)
2078 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2079 struct mlx5_dev_spawn_data *list = NULL;
2080 struct mlx5_dev_config dev_config;
2081 unsigned int dev_config_vf;
2082 struct rte_eth_devargs eth_da = *req_eth_da;
2083 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2084 struct mlx5_bond_info bond_info;
2088 ibv_list = mlx5_glue->get_device_list(&ret);
2090 rte_errno = errno ? errno : ENOSYS;
2091 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2095 * First scan the list of all Infiniband devices to find
2096 * matching ones, gathering into the list.
2098 struct ibv_device *ibv_match[ret + 1];
2099 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2100 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2104 struct rte_pci_addr pci_addr;
2106 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2107 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2108 nl_rdma, owner_id, &bond_info);
2111 * Bonding device detected. Only one match is allowed,
2112 * the bonding is supported over multi-port IB device,
2113 * there should be no matches on representor PCI
2114 * functions or non VF LAG bonding devices with
2115 * specified address.
2119 "multiple PCI match on bonding device"
2120 "\"%s\" found", ibv_list[ret]->name);
2125 /* Amend owner pci address if owner PF ID specified. */
2126 if (eth_da.nb_representor_ports)
2127 owner_pci.function += owner_id;
2129 "PCI information matches for slave %d bonding device \"%s\"",
2130 bd, ibv_list[ret]->name);
2131 ibv_match[nd++] = ibv_list[ret];
2134 /* Bonding device not found. */
2135 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2138 if (owner_pci.domain != pci_addr.domain ||
2139 owner_pci.bus != pci_addr.bus ||
2140 owner_pci.devid != pci_addr.devid ||
2141 owner_pci.function != pci_addr.function)
2143 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2144 ibv_list[ret]->name);
2145 ibv_match[nd++] = ibv_list[ret];
2148 ibv_match[nd] = NULL;
2150 /* No device matches, just complain and bail out. */
2152 "No Verbs device matches PCI device " PCI_PRI_FMT ","
2153 " are kernel drivers loaded?",
2154 owner_pci.domain, owner_pci.bus,
2155 owner_pci.devid, owner_pci.function);
2162 * Found single matching device may have multiple ports.
2163 * Each port may be representor, we have to check the port
2164 * number and check the representors existence.
2167 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2170 "Cannot get IB device \"%s\" ports number.",
2171 ibv_match[0]->name);
2172 if (bd >= 0 && !np) {
2173 DRV_LOG(ERR, "Cannot get ports for bonding device.");
2179 /* Now we can determine the maximal amount of devices to be spawned. */
2180 list = mlx5_malloc(MLX5_MEM_ZERO,
2181 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2182 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2184 DRV_LOG(ERR, "Spawn data array allocation failure.");
2189 if (bd >= 0 || np > 1) {
2191 * Single IB device with multiple ports found,
2192 * it may be E-Switch master device and representors.
2193 * We have to perform identification through the ports.
2195 MLX5_ASSERT(nl_rdma >= 0);
2196 MLX5_ASSERT(ns == 0);
2197 MLX5_ASSERT(nd == 1);
2199 for (i = 1; i <= np; ++i) {
2200 list[ns].bond_info = &bond_info;
2201 list[ns].max_port = np;
2202 list[ns].phys_port = i;
2203 list[ns].phys_dev_name = ibv_match[0]->name;
2204 list[ns].eth_dev = NULL;
2205 list[ns].pci_dev = pci_dev;
2206 list[ns].cdev = cdev;
2207 list[ns].pf_bond = bd;
2208 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2211 if (!list[ns].ifindex) {
2213 * No network interface index found for the
2214 * specified port, it means there is no
2215 * representor on this port. It's OK,
2216 * there can be disabled ports, for example
2217 * if sriov_numvfs < sriov_totalvfs.
2223 ret = mlx5_nl_switch_info(nl_route,
2226 if (ret || (!list[ns].info.representor &&
2227 !list[ns].info.master)) {
2229 * We failed to recognize representors with
2230 * Netlink, let's try to perform the task
2233 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2236 if (!ret && bd >= 0) {
2237 switch (list[ns].info.name_type) {
2238 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2241 * Force standalone bonding
2242 * device for ROCE LAG
2245 list[ns].info.master = 0;
2246 list[ns].info.representor = 0;
2248 if (list[ns].info.port_name == bd)
2251 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2253 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2255 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2256 if (list[ns].info.pf_num == bd)
2264 if (!ret && (list[ns].info.representor ^
2265 list[ns].info.master))
2270 "Unable to recognize master/representors on the IB device with multiple ports.");
2277 * The existence of several matching entries (nd > 1) means
2278 * port representors have been instantiated. No existing Verbs
2279 * call nor sysfs entries can tell them apart, this can only
2280 * be done through Netlink calls assuming kernel drivers are
2281 * recent enough to support them.
2283 * In the event of identification failure through Netlink,
2284 * try again through sysfs, then:
2286 * 1. A single IB device matches (nd == 1) with single
2287 * port (np=0/1) and is not a representor, assume
2288 * no switch support.
2290 * 2. Otherwise no safe assumptions can be made;
2291 * complain louder and bail out.
2293 for (i = 0; i != nd; ++i) {
2294 memset(&list[ns].info, 0, sizeof(list[ns].info));
2295 list[ns].bond_info = NULL;
2296 list[ns].max_port = 1;
2297 list[ns].phys_port = 1;
2298 list[ns].phys_dev_name = ibv_match[i]->name;
2299 list[ns].eth_dev = NULL;
2300 list[ns].pci_dev = pci_dev;
2301 list[ns].cdev = cdev;
2302 list[ns].pf_bond = -1;
2303 list[ns].ifindex = 0;
2305 list[ns].ifindex = mlx5_nl_ifindex
2309 if (!list[ns].ifindex) {
2310 char ifname[IF_NAMESIZE];
2313 * Netlink failed, it may happen with old
2314 * ib_core kernel driver (before 4.16).
2315 * We can assume there is old driver because
2316 * here we are processing single ports IB
2317 * devices. Let's try sysfs to retrieve
2318 * the ifindex. The method works for
2319 * master device only.
2323 * Multiple devices found, assume
2324 * representors, can not distinguish
2325 * master/representor and retrieve
2326 * ifindex via sysfs.
2330 ret = mlx5_get_ifname_sysfs
2331 (ibv_match[i]->ibdev_path, ifname);
2334 if_nametoindex(ifname);
2335 if (!list[ns].ifindex) {
2337 * No network interface index found
2338 * for the specified device, it means
2339 * there it is neither representor
2347 ret = mlx5_nl_switch_info(nl_route,
2350 if (ret || (!list[ns].info.representor &&
2351 !list[ns].info.master)) {
2353 * We failed to recognize representors with
2354 * Netlink, let's try to perform the task
2357 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2360 if (!ret && (list[ns].info.representor ^
2361 list[ns].info.master)) {
2363 } else if ((nd == 1) &&
2364 !list[ns].info.representor &&
2365 !list[ns].info.master) {
2367 * Single IB device with one physical port and
2368 * attached network device.
2369 * May be SRIOV is not enabled or there is no
2372 DRV_LOG(INFO, "No E-Switch support detected.");
2379 "Unable to recognize master/representors on the multiple IB devices.");
2385 * New kernels may add the switch_id attribute for the case
2386 * there is no E-Switch and we wrongly recognized the only
2387 * device as master. Override this if there is the single
2388 * device with single port and new device name format present.
2391 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2392 list[0].info.master = 0;
2393 list[0].info.representor = 0;
2398 * Sort list to probe devices in natural order for users convenience
2399 * (i.e. master first, then representors from lowest to highest ID).
2401 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2402 /* Device specific configuration. */
2403 switch (pci_dev->id.device_id) {
2404 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2405 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2406 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2407 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2408 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2409 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2410 case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2417 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2418 /* Set devargs default values. */
2419 if (eth_da.nb_mh_controllers == 0) {
2420 eth_da.nb_mh_controllers = 1;
2421 eth_da.mh_controllers[0] = 0;
2423 if (eth_da.nb_ports == 0 && ns > 0) {
2424 if (list[0].pf_bond >= 0 && list[0].info.representor)
2425 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2426 pci_dev->device.devargs->args);
2427 eth_da.nb_ports = 1;
2428 eth_da.ports[0] = list[0].info.pf_num;
2430 if (eth_da.nb_representor_ports == 0) {
2431 eth_da.nb_representor_ports = 1;
2432 eth_da.representor_ports[0] = 0;
2435 for (i = 0; i != ns; ++i) {
2438 /* Default configuration. */
2439 mlx5_os_config_default(&dev_config);
2440 dev_config.vf = dev_config_vf;
2441 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2442 &dev_config, ð_da);
2443 if (!list[i].eth_dev) {
2444 if (rte_errno != EBUSY && rte_errno != EEXIST)
2446 /* Device is disabled or already spawned. Ignore it. */
2449 restore = list[i].eth_dev->data->dev_flags;
2450 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2452 * Each representor has a dedicated interrupts vector.
2453 * rte_eth_copy_pci_info() assigns PF interrupts handle to
2454 * representor eth_dev object because representor and PF
2455 * share the same PCI address.
2456 * Override representor device with a dedicated
2457 * interrupts handle here.
2458 * Representor interrupts handle is released in mlx5_dev_stop().
2460 if (list[i].info.representor) {
2461 struct rte_intr_handle *intr_handle =
2462 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2463 if (intr_handle == NULL) {
2465 "port %u failed to allocate memory for interrupt handler "
2466 "Rx interrupts will not be supported",
2472 list[i].eth_dev->intr_handle = intr_handle;
2474 /* Restore non-PCI flags cleared by the above call. */
2475 list[i].eth_dev->data->dev_flags |= restore;
2476 rte_eth_dev_probing_finish(list[i].eth_dev);
2480 "probe of PCI device " PCI_PRI_FMT " aborted after"
2481 " encountering an error: %s",
2482 owner_pci.domain, owner_pci.bus,
2483 owner_pci.devid, owner_pci.function,
2484 strerror(rte_errno));
2488 if (!list[i].eth_dev)
2490 mlx5_dev_close(list[i].eth_dev);
2491 /* mac_addrs must not be freed because in dev_private */
2492 list[i].eth_dev->data->mac_addrs = NULL;
2493 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2495 /* Restore original error. */
2502 * Do the routine cleanup:
2503 * - close opened Netlink sockets
2504 * - free allocated spawn data array
2505 * - free the Infiniband device list
2513 MLX5_ASSERT(ibv_list);
2514 mlx5_glue->free_device_list(ibv_list);
2519 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2520 struct rte_eth_devargs *eth_da)
2524 if (dev->devargs == NULL)
2526 memset(eth_da, 0, sizeof(*eth_da));
2527 /* Parse representor information first from class argument. */
2528 if (dev->devargs->cls_str)
2529 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2531 DRV_LOG(ERR, "failed to parse device arguments: %s",
2532 dev->devargs->cls_str);
2535 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2536 /* Parse legacy device argument */
2537 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2539 DRV_LOG(ERR, "failed to parse device arguments: %s",
2540 dev->devargs->args);
2548 * Callback to register a PCI device.
2550 * This function spawns Ethernet devices out of a given PCI device.
2553 * Pointer to common mlx5 device structure.
2556 * 0 on success, a negative errno value otherwise and rte_errno is set.
2559 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2561 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2562 struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2566 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da);
2570 if (eth_da.nb_ports > 0) {
2571 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2572 for (p = 0; p < eth_da.nb_ports; p++) {
2573 ret = mlx5_os_pci_probe_pf(cdev, ð_da,
2579 DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2580 "aborted due to proding failure of PF %u",
2581 pci_dev->addr.domain, pci_dev->addr.bus,
2582 pci_dev->addr.devid, pci_dev->addr.function,
2584 mlx5_net_remove(cdev);
2587 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0);
2592 /* Probe a single SF device on auxiliary bus, no representor support. */
2594 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2596 struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2597 struct mlx5_dev_config config;
2598 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2599 struct rte_device *dev = cdev->dev;
2600 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2601 struct rte_eth_dev *eth_dev;
2604 /* Parse ethdev devargs. */
2605 ret = mlx5_os_parse_eth_devargs(dev, ð_da);
2608 /* Set default config data. */
2609 mlx5_os_config_default(&config);
2611 /* Init spawn data. */
2613 spawn.phys_port = 1;
2614 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2615 ret = mlx5_auxiliary_get_ifindex(dev->name);
2617 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2620 spawn.ifindex = ret;
2623 eth_dev = mlx5_dev_spawn(dev, &spawn, &config, ð_da);
2624 if (eth_dev == NULL)
2627 eth_dev->intr_handle = adev->intr_handle;
2628 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2629 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2630 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2631 eth_dev->data->numa_node = dev->numa_node;
2633 rte_eth_dev_probing_finish(eth_dev);
2638 * Net class driver callback to probe a device.
2640 * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2643 * Pointer to the common mlx5 device.
2646 * 0 on success, a negative errno value otherwise and rte_errno is set.
2649 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2653 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2654 mlx5_pmd_socket_init();
2655 ret = mlx5_init_once();
2657 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2658 strerror(rte_errno));
2661 if (mlx5_dev_is_pci(cdev->dev))
2662 return mlx5_os_pci_probe(cdev);
2664 return mlx5_os_auxiliary_probe(cdev);
2668 * Cleanup resources when the last device is closed.
2671 mlx5_os_net_cleanup(void)
2673 mlx5_pmd_socket_uninit();
2677 * Install shared asynchronous device events handler.
2678 * This function is implemented to support event sharing
2679 * between multiple ports of single IB device.
2682 * Pointer to mlx5_dev_ctx_shared object.
2685 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2689 struct ibv_context *ctx = sh->cdev->ctx;
2691 sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2692 if (sh->intr_handle == NULL) {
2693 DRV_LOG(ERR, "Fail to allocate intr_handle");
2697 rte_intr_fd_set(sh->intr_handle, -1);
2699 flags = fcntl(ctx->async_fd, F_GETFL);
2700 ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2702 DRV_LOG(INFO, "failed to change file descriptor async event"
2705 rte_intr_fd_set(sh->intr_handle, ctx->async_fd);
2706 rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);
2707 if (rte_intr_callback_register(sh->intr_handle,
2708 mlx5_dev_interrupt_handler, sh)) {
2709 DRV_LOG(INFO, "Fail to install the shared interrupt.");
2710 rte_intr_fd_set(sh->intr_handle, -1);
2714 #ifdef HAVE_IBV_DEVX_ASYNC
2715 sh->intr_handle_devx =
2716 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2717 if (!sh->intr_handle_devx) {
2718 DRV_LOG(ERR, "Fail to allocate intr_handle");
2722 rte_intr_fd_set(sh->intr_handle_devx, -1);
2723 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2724 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2726 DRV_LOG(INFO, "failed to allocate devx_comp.");
2729 flags = fcntl(devx_comp->fd, F_GETFL);
2730 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2732 DRV_LOG(INFO, "failed to change file descriptor"
2736 rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);
2737 rte_intr_type_set(sh->intr_handle_devx,
2738 RTE_INTR_HANDLE_EXT);
2739 if (rte_intr_callback_register(sh->intr_handle_devx,
2740 mlx5_dev_interrupt_handler_devx, sh)) {
2741 DRV_LOG(INFO, "Fail to install the devx shared"
2743 rte_intr_fd_set(sh->intr_handle_devx, -1);
2745 #endif /* HAVE_IBV_DEVX_ASYNC */
2750 * Uninstall shared asynchronous device events handler.
2751 * This function is implemented to support event sharing
2752 * between multiple ports of single IB device.
2755 * Pointer to mlx5_dev_ctx_shared object.
2758 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2760 if (rte_intr_fd_get(sh->intr_handle) >= 0)
2761 mlx5_intr_callback_unregister(sh->intr_handle,
2762 mlx5_dev_interrupt_handler, sh);
2763 rte_intr_instance_free(sh->intr_handle);
2764 #ifdef HAVE_IBV_DEVX_ASYNC
2765 if (rte_intr_fd_get(sh->intr_handle_devx) >= 0)
2766 rte_intr_callback_unregister(sh->intr_handle_devx,
2767 mlx5_dev_interrupt_handler_devx, sh);
2768 rte_intr_instance_free(sh->intr_handle_devx);
2770 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2775 * Read statistics by a named counter.
2778 * Pointer to the private device data structure.
2779 * @param[in] ctr_name
2780 * Pointer to the name of the statistic counter to read
2782 * Pointer to read statistic value.
2784 * 0 on success and stat is valud, 1 if failed to read the value
2789 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2795 if (priv->q_counters != NULL &&
2796 strcmp(ctr_name, "out_of_buffer") == 0)
2797 return mlx5_devx_cmd_queue_counter_query
2798 (priv->q_counters, 0, (uint32_t *)stat);
2799 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2800 priv->sh->ibdev_path,
2803 fd = open(path, O_RDONLY);
2805 * in switchdev the file location is not per port
2806 * but rather in <ibdev_path>/hw_counters/<file_name>.
2809 MKSTR(path1, "%s/hw_counters/%s",
2810 priv->sh->ibdev_path,
2812 fd = open(path1, O_RDONLY);
2815 char buf[21] = {'\0'};
2816 ssize_t n = read(fd, buf, sizeof(buf));
2820 *stat = strtoull(buf, NULL, 10);
2830 * Remove a MAC address from device
2833 * Pointer to Ethernet device structure.
2835 * MAC address index.
2838 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2840 struct mlx5_priv *priv = dev->data->dev_private;
2841 const int vf = priv->config.vf;
2844 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2845 mlx5_ifindex(dev), priv->mac_own,
2846 &dev->data->mac_addrs[index], index);
2850 * Adds a MAC address to the device
2853 * Pointer to Ethernet device structure.
2855 * MAC address to register.
2857 * MAC address index.
2860 * 0 on success, a negative errno value otherwise
2863 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2866 struct mlx5_priv *priv = dev->data->dev_private;
2867 const int vf = priv->config.vf;
2871 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2872 mlx5_ifindex(dev), priv->mac_own,
2878 * Modify a VF MAC address
2881 * Pointer to device private data.
2883 * MAC address to modify into.
2885 * Net device interface index
2890 * 0 on success, a negative errno value otherwise
2893 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2894 unsigned int iface_idx,
2895 struct rte_ether_addr *mac_addr,
2898 return mlx5_nl_vf_mac_addr_modify
2899 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2903 * Set device promiscuous mode
2906 * Pointer to Ethernet device structure.
2908 * 0 - promiscuous is disabled, otherwise - enabled
2911 * 0 on success, a negative error value otherwise
2914 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2916 struct mlx5_priv *priv = dev->data->dev_private;
2918 return mlx5_nl_promisc(priv->nl_socket_route,
2919 mlx5_ifindex(dev), !!enable);
2923 * Set device promiscuous mode
2926 * Pointer to Ethernet device structure.
2928 * 0 - all multicase is disabled, otherwise - enabled
2931 * 0 on success, a negative error value otherwise
2934 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2936 struct mlx5_priv *priv = dev->data->dev_private;
2938 return mlx5_nl_allmulti(priv->nl_socket_route,
2939 mlx5_ifindex(dev), !!enable);
2943 * Flush device MAC addresses
2946 * Pointer to Ethernet device structure.
2950 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2952 struct mlx5_priv *priv = dev->data->dev_private;
2954 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2955 dev->data->mac_addrs,
2956 MLX5_MAX_MAC_ADDRESSES, priv->mac_own);