ethdev: remove old close behaviour
[dpdk.git] / drivers / net / mlx5 / linux / mlx5_os.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2015 6WIND S.A.
3  * Copyright 2020 Mellanox Technologies, Ltd
4  */
5
6 #include <stddef.h>
7 #include <unistd.h>
8 #include <string.h>
9 #include <stdint.h>
10 #include <stdlib.h>
11 #include <errno.h>
12 #include <net/if.h>
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
16 #include <fcntl.h>
17
18 #include <rte_malloc.h>
19 #include <rte_ethdev_driver.h>
20 #include <rte_ethdev_pci.h>
21 #include <rte_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_common.h>
24 #include <rte_kvargs.h>
25 #include <rte_rwlock.h>
26 #include <rte_spinlock.h>
27 #include <rte_string_fns.h>
28 #include <rte_alarm.h>
29 #include <rte_eal_paging.h>
30
31 #include <mlx5_glue.h>
32 #include <mlx5_devx_cmds.h>
33 #include <mlx5_common.h>
34 #include <mlx5_common_mp.h>
35 #include <mlx5_common_mr.h>
36 #include <mlx5_malloc.h>
37
38 #include "mlx5_defs.h"
39 #include "mlx5.h"
40 #include "mlx5_common_os.h"
41 #include "mlx5_utils.h"
42 #include "mlx5_rxtx.h"
43 #include "mlx5_autoconf.h"
44 #include "mlx5_mr.h"
45 #include "mlx5_flow.h"
46 #include "rte_pmd_mlx5.h"
47 #include "mlx5_verbs.h"
48 #include "mlx5_nl.h"
49 #include "mlx5_devx.h"
50
51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
52
53 #ifndef HAVE_IBV_MLX5_MOD_MPW
54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
56 #endif
57
58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
60 #endif
61
62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
63
64 /* Spinlock for mlx5_shared_data allocation. */
65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
66
67 /* Process local data for secondary processes. */
68 static struct mlx5_local_data mlx5_local_data;
69
70 /**
71  * Set the completion channel file descriptor interrupt as non-blocking.
72  *
73  * @param[in] rxq_obj
74  *   Pointer to RQ channel object, which includes the channel fd
75  *
76  * @param[out] fd
77  *   The file descriptor (representing the intetrrupt) used in this channel.
78  *
79  * @return
80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
81  */
82 int
83 mlx5_os_set_nonblock_channel_fd(int fd)
84 {
85         int flags;
86
87         flags = fcntl(fd, F_GETFL);
88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
89 }
90
91 /**
92  * Get mlx5 device attributes. The glue function query_device_ex() is called
93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
94  * device attributes from the glue out parameter.
95  *
96  * @param dev
97  *   Pointer to ibv context.
98  *
99  * @param device_attr
100  *   Pointer to mlx5 device attributes.
101  *
102  * @return
103  *   0 on success, non zero error number otherwise
104  */
105 int
106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
107 {
108         int err;
109         struct ibv_device_attr_ex attr_ex;
110         memset(device_attr, 0, sizeof(*device_attr));
111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
112         if (err)
113                 return err;
114
115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
121         device_attr->max_rwq_indirection_table_size =
122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
125
126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
128         if (err)
129                 return err;
130
131         device_attr->flags = dv_attr.flags;
132         device_attr->comp_mask = dv_attr.comp_mask;
133 #ifdef HAVE_IBV_MLX5_MOD_SWP
134         device_attr->sw_parsing_offloads =
135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
136 #endif
137         device_attr->min_single_stride_log_num_of_bytes =
138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
139         device_attr->max_single_stride_log_num_of_bytes =
140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
141         device_attr->min_single_wqe_log_num_of_strides =
142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
143         device_attr->max_single_wqe_log_num_of_strides =
144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
145         device_attr->stride_supported_qpts =
146                 dv_attr.striding_rq_caps.supported_qpts;
147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
149 #endif
150
151         return err;
152 }
153
154 /**
155  * Verbs callback to allocate a memory. This function should allocate the space
156  * according to the size provided residing inside a huge page.
157  * Please note that all allocation must respect the alignment from libmlx5
158  * (i.e. currently rte_mem_page_size()).
159  *
160  * @param[in] size
161  *   The size in bytes of the memory to allocate.
162  * @param[in] data
163  *   A pointer to the callback data.
164  *
165  * @return
166  *   Allocated buffer, NULL otherwise and rte_errno is set.
167  */
168 static void *
169 mlx5_alloc_verbs_buf(size_t size, void *data)
170 {
171         struct mlx5_priv *priv = data;
172         void *ret;
173         unsigned int socket = SOCKET_ID_ANY;
174         size_t alignment = rte_mem_page_size();
175         if (alignment == (size_t)-1) {
176                 DRV_LOG(ERR, "Failed to get mem page size");
177                 rte_errno = ENOMEM;
178                 return NULL;
179         }
180
181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
183
184                 socket = ctrl->socket;
185         } else if (priv->verbs_alloc_ctx.type ==
186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
188
189                 socket = ctrl->socket;
190         }
191         MLX5_ASSERT(data != NULL);
192         ret = mlx5_malloc(0, size, alignment, socket);
193         if (!ret && size)
194                 rte_errno = ENOMEM;
195         return ret;
196 }
197
198 /**
199  * Verbs callback to free a memory.
200  *
201  * @param[in] ptr
202  *   A pointer to the memory to free.
203  * @param[in] data
204  *   A pointer to the callback data.
205  */
206 static void
207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
208 {
209         MLX5_ASSERT(data != NULL);
210         mlx5_free(ptr);
211 }
212
213 /**
214  * Initialize DR related data within private structure.
215  * Routine checks the reference counter and does actual
216  * resources creation/initialization only if counter is zero.
217  *
218  * @param[in] priv
219  *   Pointer to the private device data structure.
220  *
221  * @return
222  *   Zero on success, positive error code otherwise.
223  */
224 static int
225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
226 {
227         struct mlx5_dev_ctx_shared *sh = priv->sh;
228         char s[MLX5_HLIST_NAMESIZE];
229         int err = 0;
230
231         if (!sh->flow_tbls)
232                 err = mlx5_alloc_table_hash_list(priv);
233         else
234                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
235                         (void *)sh->flow_tbls);
236         if (err)
237                 return err;
238         /* Create tags hash list table. */
239         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
240         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
241         if (!sh->tag_table) {
242                 DRV_LOG(ERR, "tags with hash creation failed.");
243                 err = ENOMEM;
244                 goto error;
245         }
246         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
247         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ);
248         if (!sh->modify_cmds) {
249                 DRV_LOG(ERR, "hdr modify hash creation failed");
250                 err = ENOMEM;
251                 goto error;
252         }
253         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
254         sh->encaps_decaps = mlx5_hlist_create(s,
255                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ);
256         if (!sh->encaps_decaps) {
257                 DRV_LOG(ERR, "encap decap hash creation failed");
258                 err = ENOMEM;
259                 goto error;
260         }
261 #ifdef HAVE_MLX5DV_DR
262         void *domain;
263
264         if (sh->dv_refcnt) {
265                 /* Shared DV/DR structures is already initialized. */
266                 sh->dv_refcnt++;
267                 priv->dr_shared = 1;
268                 return 0;
269         }
270         /* Reference counter is zero, we should initialize structures. */
271         domain = mlx5_glue->dr_create_domain(sh->ctx,
272                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
273         if (!domain) {
274                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
275                 err = errno;
276                 goto error;
277         }
278         sh->rx_domain = domain;
279         domain = mlx5_glue->dr_create_domain(sh->ctx,
280                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
281         if (!domain) {
282                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
283                 err = errno;
284                 goto error;
285         }
286         pthread_mutex_init(&sh->dv_mutex, NULL);
287         sh->tx_domain = domain;
288 #ifdef HAVE_MLX5DV_DR_ESWITCH
289         if (priv->config.dv_esw_en) {
290                 domain  = mlx5_glue->dr_create_domain
291                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
292                 if (!domain) {
293                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
294                         err = errno;
295                         goto error;
296                 }
297                 sh->fdb_domain = domain;
298                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
299         }
300 #endif
301         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
302                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
303                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
304                 if (sh->fdb_domain)
305                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
306         }
307         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
308 #endif /* HAVE_MLX5DV_DR */
309         sh->dv_refcnt++;
310         priv->dr_shared = 1;
311         return 0;
312 error:
313         /* Rollback the created objects. */
314         if (sh->rx_domain) {
315                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
316                 sh->rx_domain = NULL;
317         }
318         if (sh->tx_domain) {
319                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
320                 sh->tx_domain = NULL;
321         }
322         if (sh->fdb_domain) {
323                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
324                 sh->fdb_domain = NULL;
325         }
326         if (sh->esw_drop_action) {
327                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
328                 sh->esw_drop_action = NULL;
329         }
330         if (sh->pop_vlan_action) {
331                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
332                 sh->pop_vlan_action = NULL;
333         }
334         if (sh->encaps_decaps) {
335                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
336                 sh->encaps_decaps = NULL;
337         }
338         if (sh->modify_cmds) {
339                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
340                 sh->modify_cmds = NULL;
341         }
342         if (sh->tag_table) {
343                 /* tags should be destroyed with flow before. */
344                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
345                 sh->tag_table = NULL;
346         }
347         mlx5_free_table_hash_list(priv);
348         return err;
349 }
350
351 /**
352  * Destroy DR related data within private structure.
353  *
354  * @param[in] priv
355  *   Pointer to the private device data structure.
356  */
357 void
358 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
359 {
360         struct mlx5_dev_ctx_shared *sh;
361
362         if (!priv->dr_shared)
363                 return;
364         priv->dr_shared = 0;
365         sh = priv->sh;
366         MLX5_ASSERT(sh);
367 #ifdef HAVE_MLX5DV_DR
368         MLX5_ASSERT(sh->dv_refcnt);
369         if (sh->dv_refcnt && --sh->dv_refcnt)
370                 return;
371         if (sh->rx_domain) {
372                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
373                 sh->rx_domain = NULL;
374         }
375         if (sh->tx_domain) {
376                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
377                 sh->tx_domain = NULL;
378         }
379 #ifdef HAVE_MLX5DV_DR_ESWITCH
380         if (sh->fdb_domain) {
381                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
382                 sh->fdb_domain = NULL;
383         }
384         if (sh->esw_drop_action) {
385                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
386                 sh->esw_drop_action = NULL;
387         }
388 #endif
389         if (sh->pop_vlan_action) {
390                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
391                 sh->pop_vlan_action = NULL;
392         }
393         pthread_mutex_destroy(&sh->dv_mutex);
394 #endif /* HAVE_MLX5DV_DR */
395         if (sh->encaps_decaps) {
396                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
397                 sh->encaps_decaps = NULL;
398         }
399         if (sh->modify_cmds) {
400                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
401                 sh->modify_cmds = NULL;
402         }
403         if (sh->tag_table) {
404                 /* tags should be destroyed with flow before. */
405                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
406                 sh->tag_table = NULL;
407         }
408         mlx5_free_table_hash_list(priv);
409 }
410
411 /**
412  * Initialize shared data between primary and secondary process.
413  *
414  * A memzone is reserved by primary process and secondary processes attach to
415  * the memzone.
416  *
417  * @return
418  *   0 on success, a negative errno value otherwise and rte_errno is set.
419  */
420 static int
421 mlx5_init_shared_data(void)
422 {
423         const struct rte_memzone *mz;
424         int ret = 0;
425
426         rte_spinlock_lock(&mlx5_shared_data_lock);
427         if (mlx5_shared_data == NULL) {
428                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
429                         /* Allocate shared memory. */
430                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
431                                                  sizeof(*mlx5_shared_data),
432                                                  SOCKET_ID_ANY, 0);
433                         if (mz == NULL) {
434                                 DRV_LOG(ERR,
435                                         "Cannot allocate mlx5 shared data");
436                                 ret = -rte_errno;
437                                 goto error;
438                         }
439                         mlx5_shared_data = mz->addr;
440                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
441                         rte_spinlock_init(&mlx5_shared_data->lock);
442                 } else {
443                         /* Lookup allocated shared memory. */
444                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
445                         if (mz == NULL) {
446                                 DRV_LOG(ERR,
447                                         "Cannot attach mlx5 shared data");
448                                 ret = -rte_errno;
449                                 goto error;
450                         }
451                         mlx5_shared_data = mz->addr;
452                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
453                 }
454         }
455 error:
456         rte_spinlock_unlock(&mlx5_shared_data_lock);
457         return ret;
458 }
459
460 /**
461  * PMD global initialization.
462  *
463  * Independent from individual device, this function initializes global
464  * per-PMD data structures distinguishing primary and secondary processes.
465  * Hence, each initialization is called once per a process.
466  *
467  * @return
468  *   0 on success, a negative errno value otherwise and rte_errno is set.
469  */
470 static int
471 mlx5_init_once(void)
472 {
473         struct mlx5_shared_data *sd;
474         struct mlx5_local_data *ld = &mlx5_local_data;
475         int ret = 0;
476
477         if (mlx5_init_shared_data())
478                 return -rte_errno;
479         sd = mlx5_shared_data;
480         MLX5_ASSERT(sd);
481         rte_spinlock_lock(&sd->lock);
482         switch (rte_eal_process_type()) {
483         case RTE_PROC_PRIMARY:
484                 if (sd->init_done)
485                         break;
486                 LIST_INIT(&sd->mem_event_cb_list);
487                 rte_rwlock_init(&sd->mem_event_rwlock);
488                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
489                                                 mlx5_mr_mem_event_cb, NULL);
490                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
491                                            mlx5_mp_os_primary_handle);
492                 if (ret)
493                         goto out;
494                 sd->init_done = true;
495                 break;
496         case RTE_PROC_SECONDARY:
497                 if (ld->init_done)
498                         break;
499                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
500                                              mlx5_mp_os_secondary_handle);
501                 if (ret)
502                         goto out;
503                 ++sd->secondary_cnt;
504                 ld->init_done = true;
505                 break;
506         default:
507                 break;
508         }
509 out:
510         rte_spinlock_unlock(&sd->lock);
511         return ret;
512 }
513
514 /**
515  * Spawn an Ethernet device from Verbs information.
516  *
517  * @param dpdk_dev
518  *   Backing DPDK device.
519  * @param spawn
520  *   Verbs device parameters (name, port, switch_info) to spawn.
521  * @param config
522  *   Device configuration parameters.
523  *
524  * @return
525  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
526  *   is set. The following errors are defined:
527  *
528  *   EBUSY: device is not supposed to be spawned.
529  *   EEXIST: device is already spawned
530  */
531 static struct rte_eth_dev *
532 mlx5_dev_spawn(struct rte_device *dpdk_dev,
533                struct mlx5_dev_spawn_data *spawn,
534                struct mlx5_dev_config *config)
535 {
536         const struct mlx5_switch_info *switch_info = &spawn->info;
537         struct mlx5_dev_ctx_shared *sh = NULL;
538         struct ibv_port_attr port_attr;
539         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
540         struct rte_eth_dev *eth_dev = NULL;
541         struct mlx5_priv *priv = NULL;
542         int err = 0;
543         unsigned int hw_padding = 0;
544         unsigned int mps;
545         unsigned int cqe_comp;
546         unsigned int cqe_pad = 0;
547         unsigned int tunnel_en = 0;
548         unsigned int mpls_en = 0;
549         unsigned int swp = 0;
550         unsigned int mprq = 0;
551         unsigned int mprq_min_stride_size_n = 0;
552         unsigned int mprq_max_stride_size_n = 0;
553         unsigned int mprq_min_stride_num_n = 0;
554         unsigned int mprq_max_stride_num_n = 0;
555         struct rte_ether_addr mac;
556         char name[RTE_ETH_NAME_MAX_LEN];
557         int own_domain_id = 0;
558         uint16_t port_id;
559         unsigned int i;
560 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
561         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
562 #endif
563
564         /* Determine if this port representor is supposed to be spawned. */
565         if (switch_info->representor && dpdk_dev->devargs) {
566                 struct rte_eth_devargs eth_da;
567
568                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
569                 if (err) {
570                         rte_errno = -err;
571                         DRV_LOG(ERR, "failed to process device arguments: %s",
572                                 strerror(rte_errno));
573                         return NULL;
574                 }
575                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
576                         if (eth_da.representor_ports[i] ==
577                             (uint16_t)switch_info->port_name)
578                                 break;
579                 if (i == eth_da.nb_representor_ports) {
580                         rte_errno = EBUSY;
581                         return NULL;
582                 }
583         }
584         /* Build device name. */
585         if (spawn->pf_bond <  0) {
586                 /* Single device. */
587                 if (!switch_info->representor)
588                         strlcpy(name, dpdk_dev->name, sizeof(name));
589                 else
590                         snprintf(name, sizeof(name), "%s_representor_%u",
591                                  dpdk_dev->name, switch_info->port_name);
592         } else {
593                 /* Bonding device. */
594                 if (!switch_info->representor)
595                         snprintf(name, sizeof(name), "%s_%s",
596                                  dpdk_dev->name,
597                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
598                 else
599                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
600                                  dpdk_dev->name,
601                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
602                                  switch_info->port_name);
603         }
604         /* check if the device is already spawned */
605         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
606                 rte_errno = EEXIST;
607                 return NULL;
608         }
609         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
610         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
611                 struct mlx5_mp_id mp_id;
612
613                 eth_dev = rte_eth_dev_attach_secondary(name);
614                 if (eth_dev == NULL) {
615                         DRV_LOG(ERR, "can not attach rte ethdev");
616                         rte_errno = ENOMEM;
617                         return NULL;
618                 }
619                 eth_dev->device = dpdk_dev;
620                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
621                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
622                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
623                 err = mlx5_proc_priv_init(eth_dev);
624                 if (err)
625                         return NULL;
626                 mp_id.port_id = eth_dev->data->port_id;
627                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
628                 /* Receive command fd from primary process */
629                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
630                 if (err < 0)
631                         goto err_secondary;
632                 /* Remap UAR for Tx queues. */
633                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
634                 if (err)
635                         goto err_secondary;
636                 /*
637                  * Ethdev pointer is still required as input since
638                  * the primary device is not accessible from the
639                  * secondary process.
640                  */
641                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
642                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
643                 return eth_dev;
644 err_secondary:
645                 mlx5_dev_close(eth_dev);
646                 return NULL;
647         }
648         /*
649          * Some parameters ("tx_db_nc" in particularly) are needed in
650          * advance to create dv/verbs device context. We proceed the
651          * devargs here to get ones, and later proceed devargs again
652          * to override some hardware settings.
653          */
654         err = mlx5_args(config, dpdk_dev->devargs);
655         if (err) {
656                 err = rte_errno;
657                 DRV_LOG(ERR, "failed to process device arguments: %s",
658                         strerror(rte_errno));
659                 goto error;
660         }
661         mlx5_malloc_mem_select(config->sys_mem_en);
662         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
663         if (!sh)
664                 return NULL;
665         config->devx = sh->devx;
666 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
667         config->dest_tir = 1;
668 #endif
669 #ifdef HAVE_IBV_MLX5_MOD_SWP
670         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
671 #endif
672         /*
673          * Multi-packet send is supported by ConnectX-4 Lx PF as well
674          * as all ConnectX-5 devices.
675          */
676 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
677         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
678 #endif
679 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
680         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
681 #endif
682         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
683         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
684                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
685                         DRV_LOG(DEBUG, "enhanced MPW is supported");
686                         mps = MLX5_MPW_ENHANCED;
687                 } else {
688                         DRV_LOG(DEBUG, "MPW is supported");
689                         mps = MLX5_MPW;
690                 }
691         } else {
692                 DRV_LOG(DEBUG, "MPW isn't supported");
693                 mps = MLX5_MPW_DISABLED;
694         }
695 #ifdef HAVE_IBV_MLX5_MOD_SWP
696         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
697                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
698         DRV_LOG(DEBUG, "SWP support: %u", swp);
699 #endif
700         config->swp = !!swp;
701 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
702         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
703                 struct mlx5dv_striding_rq_caps mprq_caps =
704                         dv_attr.striding_rq_caps;
705
706                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
707                         mprq_caps.min_single_stride_log_num_of_bytes);
708                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
709                         mprq_caps.max_single_stride_log_num_of_bytes);
710                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
711                         mprq_caps.min_single_wqe_log_num_of_strides);
712                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
713                         mprq_caps.max_single_wqe_log_num_of_strides);
714                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
715                         mprq_caps.supported_qpts);
716                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
717                 mprq = 1;
718                 mprq_min_stride_size_n =
719                         mprq_caps.min_single_stride_log_num_of_bytes;
720                 mprq_max_stride_size_n =
721                         mprq_caps.max_single_stride_log_num_of_bytes;
722                 mprq_min_stride_num_n =
723                         mprq_caps.min_single_wqe_log_num_of_strides;
724                 mprq_max_stride_num_n =
725                         mprq_caps.max_single_wqe_log_num_of_strides;
726         }
727 #endif
728         if (RTE_CACHE_LINE_SIZE == 128 &&
729             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
730                 cqe_comp = 0;
731         else
732                 cqe_comp = 1;
733         config->cqe_comp = cqe_comp;
734 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
735         /* Whether device supports 128B Rx CQE padding. */
736         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
737                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
738 #endif
739 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
740         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
741                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
742                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
743                              (dv_attr.tunnel_offloads_caps &
744                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
745                              (dv_attr.tunnel_offloads_caps &
746                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
747         }
748         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
749                 tunnel_en ? "" : "not ");
750 #else
751         DRV_LOG(WARNING,
752                 "tunnel offloading disabled due to old OFED/rdma-core version");
753 #endif
754         config->tunnel_en = tunnel_en;
755 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
756         mpls_en = ((dv_attr.tunnel_offloads_caps &
757                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
758                    (dv_attr.tunnel_offloads_caps &
759                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
760         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
761                 mpls_en ? "" : "not ");
762 #else
763         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
764                 " old OFED/rdma-core version or firmware configuration");
765 #endif
766         config->mpls_en = mpls_en;
767         /* Check port status. */
768         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
769         if (err) {
770                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
771                 goto error;
772         }
773         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
774                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
775                 err = EINVAL;
776                 goto error;
777         }
778         if (port_attr.state != IBV_PORT_ACTIVE)
779                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
780                         mlx5_glue->port_state_str(port_attr.state),
781                         port_attr.state);
782         /* Allocate private eth device data. */
783         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
784                            sizeof(*priv),
785                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
786         if (priv == NULL) {
787                 DRV_LOG(ERR, "priv allocation failure");
788                 err = ENOMEM;
789                 goto error;
790         }
791         priv->sh = sh;
792         priv->dev_port = spawn->phys_port;
793         priv->pci_dev = spawn->pci_dev;
794         priv->mtu = RTE_ETHER_MTU;
795         priv->mp_id.port_id = port_id;
796         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
797         /* Some internal functions rely on Netlink sockets, open them now. */
798         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
799         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
800         priv->representor = !!switch_info->representor;
801         priv->master = !!switch_info->master;
802         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
803         priv->vport_meta_tag = 0;
804         priv->vport_meta_mask = 0;
805         priv->pf_bond = spawn->pf_bond;
806 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
807         /*
808          * The DevX port query API is implemented. E-Switch may use
809          * either vport or reg_c[0] metadata register to match on
810          * vport index. The engaged part of metadata register is
811          * defined by mask.
812          */
813         if (switch_info->representor || switch_info->master) {
814                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
815                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
816                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
817                                                  &devx_port);
818                 if (err) {
819                         DRV_LOG(WARNING,
820                                 "can't query devx port %d on device %s",
821                                 spawn->phys_port,
822                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
823                         devx_port.comp_mask = 0;
824                 }
825         }
826         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
827                 priv->vport_meta_tag = devx_port.reg_c_0.value;
828                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
829                 if (!priv->vport_meta_mask) {
830                         DRV_LOG(ERR, "vport zero mask for port %d"
831                                      " on bonding device %s",
832                                      spawn->phys_port,
833                                      mlx5_os_get_dev_device_name
834                                                         (spawn->phys_dev));
835                         err = ENOTSUP;
836                         goto error;
837                 }
838                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
839                         DRV_LOG(ERR, "invalid vport tag for port %d"
840                                      " on bonding device %s",
841                                      spawn->phys_port,
842                                      mlx5_os_get_dev_device_name
843                                                         (spawn->phys_dev));
844                         err = ENOTSUP;
845                         goto error;
846                 }
847         }
848         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
849                 priv->vport_id = devx_port.vport_num;
850         } else if (spawn->pf_bond >= 0) {
851                 DRV_LOG(ERR, "can't deduce vport index for port %d"
852                              " on bonding device %s",
853                              spawn->phys_port,
854                              mlx5_os_get_dev_device_name(spawn->phys_dev));
855                 err = ENOTSUP;
856                 goto error;
857         } else {
858                 /* Suppose vport index in compatible way. */
859                 priv->vport_id = switch_info->representor ?
860                                  switch_info->port_name + 1 : -1;
861         }
862 #else
863         /*
864          * Kernel/rdma_core support single E-Switch per PF configurations
865          * only and vport_id field contains the vport index for
866          * associated VF, which is deduced from representor port name.
867          * For example, let's have the IB device port 10, it has
868          * attached network device eth0, which has port name attribute
869          * pf0vf2, we can deduce the VF number as 2, and set vport index
870          * as 3 (2+1). This assigning schema should be changed if the
871          * multiple E-Switch instances per PF configurations or/and PCI
872          * subfunctions are added.
873          */
874         priv->vport_id = switch_info->representor ?
875                          switch_info->port_name + 1 : -1;
876 #endif
877         /* representor_id field keeps the unmodified VF index. */
878         priv->representor_id = switch_info->representor ?
879                                switch_info->port_name : -1;
880         /*
881          * Look for sibling devices in order to reuse their switch domain
882          * if any, otherwise allocate one.
883          */
884         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
885                 const struct mlx5_priv *opriv =
886                         rte_eth_devices[port_id].data->dev_private;
887
888                 if (!opriv ||
889                     opriv->sh != priv->sh ||
890                         opriv->domain_id ==
891                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
892                         continue;
893                 priv->domain_id = opriv->domain_id;
894                 break;
895         }
896         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
897                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
898                 if (err) {
899                         err = rte_errno;
900                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
901                                 strerror(rte_errno));
902                         goto error;
903                 }
904                 own_domain_id = 1;
905         }
906         /* Override some values set by hardware configuration. */
907         mlx5_args(config, dpdk_dev->devargs);
908         err = mlx5_dev_check_sibling_config(priv, config);
909         if (err)
910                 goto error;
911         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
912                             IBV_DEVICE_RAW_IP_CSUM);
913         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
914                 (config->hw_csum ? "" : "not "));
915 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
916         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
917         DRV_LOG(DEBUG, "counters are not supported");
918 #endif
919 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
920         if (config->dv_flow_en) {
921                 DRV_LOG(WARNING, "DV flow is not supported");
922                 config->dv_flow_en = 0;
923         }
924 #endif
925         config->ind_table_max_size =
926                 sh->device_attr.max_rwq_indirection_table_size;
927         /*
928          * Remove this check once DPDK supports larger/variable
929          * indirection tables.
930          */
931         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
932                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
933         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
934                 config->ind_table_max_size);
935         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
936                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
937         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
938                 (config->hw_vlan_strip ? "" : "not "));
939         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
940                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
941 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
942         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
943 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
944         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
945                         IBV_DEVICE_PCI_WRITE_END_PADDING);
946 #endif
947         if (config->hw_padding && !hw_padding) {
948                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
949                 config->hw_padding = 0;
950         } else if (config->hw_padding) {
951                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
952         }
953         config->tso = (sh->device_attr.max_tso > 0 &&
954                       (sh->device_attr.tso_supported_qpts &
955                        (1 << IBV_QPT_RAW_PACKET)));
956         if (config->tso)
957                 config->tso_max_payload_sz = sh->device_attr.max_tso;
958         /*
959          * MPW is disabled by default, while the Enhanced MPW is enabled
960          * by default.
961          */
962         if (config->mps == MLX5_ARG_UNSET)
963                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
964                                                           MLX5_MPW_DISABLED;
965         else
966                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
967         DRV_LOG(INFO, "%sMPS is %s",
968                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
969                 config->mps == MLX5_MPW ? "legacy " : "",
970                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
971         if (config->cqe_comp && !cqe_comp) {
972                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
973                 config->cqe_comp = 0;
974         }
975         if (config->cqe_pad && !cqe_pad) {
976                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
977                 config->cqe_pad = 0;
978         } else if (config->cqe_pad) {
979                 DRV_LOG(INFO, "Rx CQE padding is enabled");
980         }
981         if (config->devx) {
982                 priv->counter_fallback = 0;
983                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
984                 if (err) {
985                         err = -err;
986                         goto error;
987                 }
988                 if (!config->hca_attr.flow_counters_dump)
989                         priv->counter_fallback = 1;
990 #ifndef HAVE_IBV_DEVX_ASYNC
991                 priv->counter_fallback = 1;
992 #endif
993                 if (priv->counter_fallback)
994                         DRV_LOG(INFO, "Use fall-back DV counter management");
995                 /* Check for LRO support. */
996                 if (config->dest_tir && config->hca_attr.lro_cap &&
997                     config->dv_flow_en) {
998                         /* TBD check tunnel lro caps. */
999                         config->lro.supported = config->hca_attr.lro_cap;
1000                         DRV_LOG(DEBUG, "Device supports LRO");
1001                         /*
1002                          * If LRO timeout is not configured by application,
1003                          * use the minimal supported value.
1004                          */
1005                         if (!config->lro.timeout)
1006                                 config->lro.timeout =
1007                                 config->hca_attr.lro_timer_supported_periods[0];
1008                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1009                                 config->lro.timeout);
1010                 }
1011 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1012                 if (config->hca_attr.qos.sup &&
1013                     config->hca_attr.qos.srtcm_sup &&
1014                     config->dv_flow_en) {
1015                         uint8_t reg_c_mask =
1016                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1017                         /*
1018                          * Meter needs two REG_C's for color match and pre-sfx
1019                          * flow match. Here get the REG_C for color match.
1020                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1021                          */
1022                         reg_c_mask &= 0xfc;
1023                         if (__builtin_popcount(reg_c_mask) < 1) {
1024                                 priv->mtr_en = 0;
1025                                 DRV_LOG(WARNING, "No available register for"
1026                                         " meter.");
1027                         } else {
1028                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1029                                                       REG_C_0;
1030                                 priv->mtr_en = 1;
1031                                 priv->mtr_reg_share =
1032                                       config->hca_attr.qos.flow_meter_reg_share;
1033                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1034                                         priv->mtr_color_reg);
1035                         }
1036                 }
1037 #endif
1038         }
1039         if (config->tx_pp) {
1040                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1041                         config->hca_attr.dev_freq_khz);
1042                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1043                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1044                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1045                         config->hca_attr.cross_channel ? "" : "not ");
1046                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1047                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1048                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1049                         config->hca_attr.non_wire_sq ? "" : "not ");
1050                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1051                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1052                         config->hca_attr.log_max_static_sq_wq);
1053                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1054                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1055                 if (!config->devx) {
1056                         DRV_LOG(ERR, "DevX is required for packet pacing");
1057                         err = ENODEV;
1058                         goto error;
1059                 }
1060                 if (!config->hca_attr.qos.packet_pacing) {
1061                         DRV_LOG(ERR, "Packet pacing is not supported");
1062                         err = ENODEV;
1063                         goto error;
1064                 }
1065                 if (!config->hca_attr.cross_channel) {
1066                         DRV_LOG(ERR, "Cross channel operations are"
1067                                      " required for packet pacing");
1068                         err = ENODEV;
1069                         goto error;
1070                 }
1071                 if (!config->hca_attr.wqe_index_ignore) {
1072                         DRV_LOG(ERR, "WQE index ignore feature is"
1073                                      " required for packet pacing");
1074                         err = ENODEV;
1075                         goto error;
1076                 }
1077                 if (!config->hca_attr.non_wire_sq) {
1078                         DRV_LOG(ERR, "Non-wire SQ feature is"
1079                                      " required for packet pacing");
1080                         err = ENODEV;
1081                         goto error;
1082                 }
1083                 if (!config->hca_attr.log_max_static_sq_wq) {
1084                         DRV_LOG(ERR, "Static WQE SQ feature is"
1085                                      " required for packet pacing");
1086                         err = ENODEV;
1087                         goto error;
1088                 }
1089                 if (!config->hca_attr.qos.wqe_rate_pp) {
1090                         DRV_LOG(ERR, "WQE rate mode is required"
1091                                      " for packet pacing");
1092                         err = ENODEV;
1093                         goto error;
1094                 }
1095 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1096                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1097                              " can't create queues for packet pacing");
1098                 err = ENODEV;
1099                 goto error;
1100 #endif
1101         }
1102         if (config->devx) {
1103                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1104
1105                 err = config->hca_attr.access_register_user ?
1106                         mlx5_devx_cmd_register_read
1107                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1108                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1109                 if (!err) {
1110                         uint32_t ts_mode;
1111
1112                         /* MTUTC register is read successfully. */
1113                         ts_mode = MLX5_GET(register_mtutc, reg,
1114                                            time_stamp_mode);
1115                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1116                                 config->rt_timestamp = 1;
1117                 } else {
1118                         /* Kernel does not support register reading. */
1119                         if (config->hca_attr.dev_freq_khz ==
1120                                                  (NS_PER_S / MS_PER_S))
1121                                 config->rt_timestamp = 1;
1122                 }
1123         }
1124         /*
1125          * If HW has bug working with tunnel packet decapsulation and
1126          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1127          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1128          */
1129         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1130                 config->hw_fcs_strip = 0;
1131         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1132                 (config->hw_fcs_strip ? "" : "not "));
1133         if (config->mprq.enabled && mprq) {
1134                 if (config->mprq.stride_num_n &&
1135                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1136                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1137                         config->mprq.stride_num_n =
1138                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1139                                                 mprq_min_stride_num_n),
1140                                         mprq_max_stride_num_n);
1141                         DRV_LOG(WARNING,
1142                                 "the number of strides"
1143                                 " for Multi-Packet RQ is out of range,"
1144                                 " setting default value (%u)",
1145                                 1 << config->mprq.stride_num_n);
1146                 }
1147                 if (config->mprq.stride_size_n &&
1148                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1149                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1150                         config->mprq.stride_size_n =
1151                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1152                                                 mprq_min_stride_size_n),
1153                                         mprq_max_stride_size_n);
1154                         DRV_LOG(WARNING,
1155                                 "the size of a stride"
1156                                 " for Multi-Packet RQ is out of range,"
1157                                 " setting default value (%u)",
1158                                 1 << config->mprq.stride_size_n);
1159                 }
1160                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1161                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1162         } else if (config->mprq.enabled && !mprq) {
1163                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1164                 config->mprq.enabled = 0;
1165         }
1166         if (config->max_dump_files_num == 0)
1167                 config->max_dump_files_num = 128;
1168         eth_dev = rte_eth_dev_allocate(name);
1169         if (eth_dev == NULL) {
1170                 DRV_LOG(ERR, "can not allocate rte ethdev");
1171                 err = ENOMEM;
1172                 goto error;
1173         }
1174         if (priv->representor) {
1175                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1176                 eth_dev->data->representor_id = priv->representor_id;
1177         }
1178         /*
1179          * Store associated network device interface index. This index
1180          * is permanent throughout the lifetime of device. So, we may store
1181          * the ifindex here and use the cached value further.
1182          */
1183         MLX5_ASSERT(spawn->ifindex);
1184         priv->if_index = spawn->ifindex;
1185         if (priv->pf_bond >= 0 && priv->master) {
1186                 /* Get bond interface info */
1187                 err = mlx5_sysfs_bond_info(priv->if_index,
1188                                      &priv->bond_ifindex,
1189                                      priv->bond_name);
1190                 if (err)
1191                         DRV_LOG(ERR, "unable to get bond info: %s",
1192                                 strerror(rte_errno));
1193                 else
1194                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1195                                 priv->if_index, priv->bond_ifindex,
1196                                 priv->bond_name);
1197         }
1198         eth_dev->data->dev_private = priv;
1199         priv->dev_data = eth_dev->data;
1200         eth_dev->data->mac_addrs = priv->mac;
1201         eth_dev->device = dpdk_dev;
1202         /* Configure the first MAC address by default. */
1203         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1204                 DRV_LOG(ERR,
1205                         "port %u cannot get MAC address, is mlx5_en"
1206                         " loaded? (errno: %s)",
1207                         eth_dev->data->port_id, strerror(rte_errno));
1208                 err = ENODEV;
1209                 goto error;
1210         }
1211         DRV_LOG(INFO,
1212                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1213                 eth_dev->data->port_id,
1214                 mac.addr_bytes[0], mac.addr_bytes[1],
1215                 mac.addr_bytes[2], mac.addr_bytes[3],
1216                 mac.addr_bytes[4], mac.addr_bytes[5]);
1217 #ifdef RTE_LIBRTE_MLX5_DEBUG
1218         {
1219                 char ifname[IF_NAMESIZE];
1220
1221                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1222                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1223                                 eth_dev->data->port_id, ifname);
1224                 else
1225                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1226                                 eth_dev->data->port_id);
1227         }
1228 #endif
1229         /* Get actual MTU if possible. */
1230         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1231         if (err) {
1232                 err = rte_errno;
1233                 goto error;
1234         }
1235         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1236                 priv->mtu);
1237         /* Initialize burst functions to prevent crashes before link-up. */
1238         eth_dev->rx_pkt_burst = removed_rx_burst;
1239         eth_dev->tx_pkt_burst = removed_tx_burst;
1240         eth_dev->dev_ops = &mlx5_os_dev_ops;
1241         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1242         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1243         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1244         /* Register MAC address. */
1245         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1246         if (config->vf && config->vf_nl_en)
1247                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1248                                       mlx5_ifindex(eth_dev),
1249                                       eth_dev->data->mac_addrs,
1250                                       MLX5_MAX_MAC_ADDRESSES);
1251         priv->flows = 0;
1252         priv->ctrl_flows = 0;
1253         TAILQ_INIT(&priv->flow_meters);
1254         TAILQ_INIT(&priv->flow_meter_profiles);
1255         /* Hint libmlx5 to use PMD allocator for data plane resources */
1256         mlx5_glue->dv_set_context_attr(sh->ctx,
1257                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1258                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1259                                 .alloc = &mlx5_alloc_verbs_buf,
1260                                 .free = &mlx5_free_verbs_buf,
1261                                 .data = priv,
1262                         }));
1263         /* Bring Ethernet device up. */
1264         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1265                 eth_dev->data->port_id);
1266         mlx5_set_link_up(eth_dev);
1267         /*
1268          * Even though the interrupt handler is not installed yet,
1269          * interrupts will still trigger on the async_fd from
1270          * Verbs context returned by ibv_open_device().
1271          */
1272         mlx5_link_update(eth_dev, 0);
1273 #ifdef HAVE_MLX5DV_DR_ESWITCH
1274         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1275               (switch_info->representor || switch_info->master)))
1276                 config->dv_esw_en = 0;
1277 #else
1278         config->dv_esw_en = 0;
1279 #endif
1280         /* Detect minimal data bytes to inline. */
1281         mlx5_set_min_inline(spawn, config);
1282         /* Store device configuration on private structure. */
1283         priv->config = *config;
1284         /* Create context for virtual machine VLAN workaround. */
1285         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1286         if (config->dv_flow_en) {
1287                 err = mlx5_alloc_shared_dr(priv);
1288                 if (err)
1289                         goto error;
1290                 /*
1291                  * RSS id is shared with meter flow id. Meter flow id can only
1292                  * use the 24 MSB of the register.
1293                  */
1294                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1295                                      MLX5_MTR_COLOR_BITS);
1296                 if (!priv->qrss_id_pool) {
1297                         DRV_LOG(ERR, "can't create flow id pool");
1298                         err = ENOMEM;
1299                         goto error;
1300                 }
1301         }
1302         if (config->devx && config->dv_flow_en && config->dest_tir) {
1303                 priv->obj_ops = devx_obj_ops;
1304                 priv->obj_ops.drop_action_create =
1305                                                 ibv_obj_ops.drop_action_create;
1306                 priv->obj_ops.drop_action_destroy =
1307                                                 ibv_obj_ops.drop_action_destroy;
1308         } else {
1309                 priv->obj_ops = ibv_obj_ops;
1310         }
1311         /* Supported Verbs flow priority number detection. */
1312         err = mlx5_flow_discover_priorities(eth_dev);
1313         if (err < 0) {
1314                 err = -err;
1315                 goto error;
1316         }
1317         priv->config.flow_prio = err;
1318         if (!priv->config.dv_esw_en &&
1319             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1320                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1321                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1322                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1323         }
1324         mlx5_set_metadata_mask(eth_dev);
1325         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1326             !priv->sh->dv_regc0_mask) {
1327                 DRV_LOG(ERR, "metadata mode %u is not supported "
1328                              "(no metadata reg_c[0] is available)",
1329                              priv->config.dv_xmeta_en);
1330                         err = ENOTSUP;
1331                         goto error;
1332         }
1333         /*
1334          * Allocate the buffer for flow creating, just once.
1335          * The allocation must be done before any flow creating.
1336          */
1337         mlx5_flow_alloc_intermediate(eth_dev);
1338         /* Query availability of metadata reg_c's. */
1339         err = mlx5_flow_discover_mreg_c(eth_dev);
1340         if (err < 0) {
1341                 err = -err;
1342                 goto error;
1343         }
1344         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1345                 DRV_LOG(DEBUG,
1346                         "port %u extensive metadata register is not supported",
1347                         eth_dev->data->port_id);
1348                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1349                         DRV_LOG(ERR, "metadata mode %u is not supported "
1350                                      "(no metadata registers available)",
1351                                      priv->config.dv_xmeta_en);
1352                         err = ENOTSUP;
1353                         goto error;
1354                 }
1355         }
1356         if (priv->config.dv_flow_en &&
1357             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1358             mlx5_flow_ext_mreg_supported(eth_dev) &&
1359             priv->sh->dv_regc0_mask) {
1360                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1361                                                       MLX5_FLOW_MREG_HTABLE_SZ);
1362                 if (!priv->mreg_cp_tbl) {
1363                         err = ENOMEM;
1364                         goto error;
1365                 }
1366         }
1367         return eth_dev;
1368 error:
1369         if (priv) {
1370                 if (priv->mreg_cp_tbl)
1371                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1372                 if (priv->sh)
1373                         mlx5_os_free_shared_dr(priv);
1374                 if (priv->nl_socket_route >= 0)
1375                         close(priv->nl_socket_route);
1376                 if (priv->nl_socket_rdma >= 0)
1377                         close(priv->nl_socket_rdma);
1378                 if (priv->vmwa_context)
1379                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1380                 if (priv->qrss_id_pool)
1381                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
1382                 if (own_domain_id)
1383                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1384                 mlx5_free(priv);
1385                 if (eth_dev != NULL)
1386                         eth_dev->data->dev_private = NULL;
1387         }
1388         if (eth_dev != NULL) {
1389                 /* mac_addrs must not be freed alone because part of
1390                  * dev_private
1391                  **/
1392                 eth_dev->data->mac_addrs = NULL;
1393                 rte_eth_dev_release_port(eth_dev);
1394         }
1395         if (sh)
1396                 mlx5_free_shared_dev_ctx(sh);
1397         MLX5_ASSERT(err > 0);
1398         rte_errno = err;
1399         return NULL;
1400 }
1401
1402 /**
1403  * Comparison callback to sort device data.
1404  *
1405  * This is meant to be used with qsort().
1406  *
1407  * @param a[in]
1408  *   Pointer to pointer to first data object.
1409  * @param b[in]
1410  *   Pointer to pointer to second data object.
1411  *
1412  * @return
1413  *   0 if both objects are equal, less than 0 if the first argument is less
1414  *   than the second, greater than 0 otherwise.
1415  */
1416 static int
1417 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1418 {
1419         const struct mlx5_switch_info *si_a =
1420                 &((const struct mlx5_dev_spawn_data *)a)->info;
1421         const struct mlx5_switch_info *si_b =
1422                 &((const struct mlx5_dev_spawn_data *)b)->info;
1423         int ret;
1424
1425         /* Master device first. */
1426         ret = si_b->master - si_a->master;
1427         if (ret)
1428                 return ret;
1429         /* Then representor devices. */
1430         ret = si_b->representor - si_a->representor;
1431         if (ret)
1432                 return ret;
1433         /* Unidentified devices come last in no specific order. */
1434         if (!si_a->representor)
1435                 return 0;
1436         /* Order representors by name. */
1437         return si_a->port_name - si_b->port_name;
1438 }
1439
1440 /**
1441  * Match PCI information for possible slaves of bonding device.
1442  *
1443  * @param[in] ibv_dev
1444  *   Pointer to Infiniband device structure.
1445  * @param[in] pci_dev
1446  *   Pointer to PCI device structure to match PCI address.
1447  * @param[in] nl_rdma
1448  *   Netlink RDMA group socket handle.
1449  *
1450  * @return
1451  *   negative value if no bonding device found, otherwise
1452  *   positive index of slave PF in bonding.
1453  */
1454 static int
1455 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1456                            const struct rte_pci_device *pci_dev,
1457                            int nl_rdma)
1458 {
1459         char ifname[IF_NAMESIZE + 1];
1460         unsigned int ifindex;
1461         unsigned int np, i;
1462         FILE *file = NULL;
1463         int pf = -1;
1464
1465         /*
1466          * Try to get master device name. If something goes
1467          * wrong suppose the lack of kernel support and no
1468          * bonding devices.
1469          */
1470         if (nl_rdma < 0)
1471                 return -1;
1472         if (!strstr(ibv_dev->name, "bond"))
1473                 return -1;
1474         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1475         if (!np)
1476                 return -1;
1477         /*
1478          * The Master device might not be on the predefined
1479          * port (not on port index 1, it is not garanted),
1480          * we have to scan all Infiniband device port and
1481          * find master.
1482          */
1483         for (i = 1; i <= np; ++i) {
1484                 /* Check whether Infiniband port is populated. */
1485                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1486                 if (!ifindex)
1487                         continue;
1488                 if (!if_indextoname(ifindex, ifname))
1489                         continue;
1490                 /* Try to read bonding slave names from sysfs. */
1491                 MKSTR(slaves,
1492                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1493                 file = fopen(slaves, "r");
1494                 if (file)
1495                         break;
1496         }
1497         if (!file)
1498                 return -1;
1499         /* Use safe format to check maximal buffer length. */
1500         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1501         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1502                 char tmp_str[IF_NAMESIZE + 32];
1503                 struct rte_pci_addr pci_addr;
1504                 struct mlx5_switch_info info;
1505
1506                 /* Process slave interface names in the loop. */
1507                 snprintf(tmp_str, sizeof(tmp_str),
1508                          "/sys/class/net/%s", ifname);
1509                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1510                         DRV_LOG(WARNING, "can not get PCI address"
1511                                          " for netdev \"%s\"", ifname);
1512                         continue;
1513                 }
1514                 if (pci_dev->addr.domain != pci_addr.domain ||
1515                     pci_dev->addr.bus != pci_addr.bus ||
1516                     pci_dev->addr.devid != pci_addr.devid ||
1517                     pci_dev->addr.function != pci_addr.function)
1518                         continue;
1519                 /* Slave interface PCI address match found. */
1520                 fclose(file);
1521                 snprintf(tmp_str, sizeof(tmp_str),
1522                          "/sys/class/net/%s/phys_port_name", ifname);
1523                 file = fopen(tmp_str, "rb");
1524                 if (!file)
1525                         break;
1526                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1527                 if (fscanf(file, "%32s", tmp_str) == 1)
1528                         mlx5_translate_port_name(tmp_str, &info);
1529                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1530                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1531                         pf = info.port_name;
1532                 break;
1533         }
1534         if (file)
1535                 fclose(file);
1536         return pf;
1537 }
1538
1539 /**
1540  * DPDK callback to register a PCI device.
1541  *
1542  * This function spawns Ethernet devices out of a given PCI device.
1543  *
1544  * @param[in] pci_drv
1545  *   PCI driver structure (mlx5_driver).
1546  * @param[in] pci_dev
1547  *   PCI device information.
1548  *
1549  * @return
1550  *   0 on success, a negative errno value otherwise and rte_errno is set.
1551  */
1552 int
1553 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1554                   struct rte_pci_device *pci_dev)
1555 {
1556         struct ibv_device **ibv_list;
1557         /*
1558          * Number of found IB Devices matching with requested PCI BDF.
1559          * nd != 1 means there are multiple IB devices over the same
1560          * PCI device and we have representors and master.
1561          */
1562         unsigned int nd = 0;
1563         /*
1564          * Number of found IB device Ports. nd = 1 and np = 1..n means
1565          * we have the single multiport IB device, and there may be
1566          * representors attached to some of found ports.
1567          */
1568         unsigned int np = 0;
1569         /*
1570          * Number of DPDK ethernet devices to Spawn - either over
1571          * multiple IB devices or multiple ports of single IB device.
1572          * Actually this is the number of iterations to spawn.
1573          */
1574         unsigned int ns = 0;
1575         /*
1576          * Bonding device
1577          *   < 0 - no bonding device (single one)
1578          *  >= 0 - bonding device (value is slave PF index)
1579          */
1580         int bd = -1;
1581         struct mlx5_dev_spawn_data *list = NULL;
1582         struct mlx5_dev_config dev_config;
1583         unsigned int dev_config_vf;
1584         int ret;
1585
1586         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1587                 mlx5_pmd_socket_init();
1588         ret = mlx5_init_once();
1589         if (ret) {
1590                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1591                         strerror(rte_errno));
1592                 return -rte_errno;
1593         }
1594         errno = 0;
1595         ibv_list = mlx5_glue->get_device_list(&ret);
1596         if (!ibv_list) {
1597                 rte_errno = errno ? errno : ENOSYS;
1598                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1599                 return -rte_errno;
1600         }
1601         /*
1602          * First scan the list of all Infiniband devices to find
1603          * matching ones, gathering into the list.
1604          */
1605         struct ibv_device *ibv_match[ret + 1];
1606         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1607         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1608         unsigned int i;
1609
1610         while (ret-- > 0) {
1611                 struct rte_pci_addr pci_addr;
1612
1613                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1614                 bd = mlx5_device_bond_pci_match
1615                                 (ibv_list[ret], pci_dev, nl_rdma);
1616                 if (bd >= 0) {
1617                         /*
1618                          * Bonding device detected. Only one match is allowed,
1619                          * the bonding is supported over multi-port IB device,
1620                          * there should be no matches on representor PCI
1621                          * functions or non VF LAG bonding devices with
1622                          * specified address.
1623                          */
1624                         if (nd) {
1625                                 DRV_LOG(ERR,
1626                                         "multiple PCI match on bonding device"
1627                                         "\"%s\" found", ibv_list[ret]->name);
1628                                 rte_errno = ENOENT;
1629                                 ret = -rte_errno;
1630                                 goto exit;
1631                         }
1632                         DRV_LOG(INFO, "PCI information matches for"
1633                                       " slave %d bonding device \"%s\"",
1634                                       bd, ibv_list[ret]->name);
1635                         ibv_match[nd++] = ibv_list[ret];
1636                         break;
1637                 }
1638                 if (mlx5_dev_to_pci_addr
1639                         (ibv_list[ret]->ibdev_path, &pci_addr))
1640                         continue;
1641                 if (pci_dev->addr.domain != pci_addr.domain ||
1642                     pci_dev->addr.bus != pci_addr.bus ||
1643                     pci_dev->addr.devid != pci_addr.devid ||
1644                     pci_dev->addr.function != pci_addr.function)
1645                         continue;
1646                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1647                         ibv_list[ret]->name);
1648                 ibv_match[nd++] = ibv_list[ret];
1649         }
1650         ibv_match[nd] = NULL;
1651         if (!nd) {
1652                 /* No device matches, just complain and bail out. */
1653                 DRV_LOG(WARNING,
1654                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1655                         " are kernel drivers loaded?",
1656                         pci_dev->addr.domain, pci_dev->addr.bus,
1657                         pci_dev->addr.devid, pci_dev->addr.function);
1658                 rte_errno = ENOENT;
1659                 ret = -rte_errno;
1660                 goto exit;
1661         }
1662         if (nd == 1) {
1663                 /*
1664                  * Found single matching device may have multiple ports.
1665                  * Each port may be representor, we have to check the port
1666                  * number and check the representors existence.
1667                  */
1668                 if (nl_rdma >= 0)
1669                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1670                 if (!np)
1671                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1672                                          " ports number", ibv_match[0]->name);
1673                 if (bd >= 0 && !np) {
1674                         DRV_LOG(ERR, "can not get ports"
1675                                      " for bonding device");
1676                         rte_errno = ENOENT;
1677                         ret = -rte_errno;
1678                         goto exit;
1679                 }
1680         }
1681 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1682         if (bd >= 0) {
1683                 /*
1684                  * This may happen if there is VF LAG kernel support and
1685                  * application is compiled with older rdma_core library.
1686                  */
1687                 DRV_LOG(ERR,
1688                         "No kernel/verbs support for VF LAG bonding found.");
1689                 rte_errno = ENOTSUP;
1690                 ret = -rte_errno;
1691                 goto exit;
1692         }
1693 #endif
1694         /*
1695          * Now we can determine the maximal
1696          * amount of devices to be spawned.
1697          */
1698         list = mlx5_malloc(MLX5_MEM_ZERO,
1699                            sizeof(struct mlx5_dev_spawn_data) *
1700                            (np ? np : nd),
1701                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1702         if (!list) {
1703                 DRV_LOG(ERR, "spawn data array allocation failure");
1704                 rte_errno = ENOMEM;
1705                 ret = -rte_errno;
1706                 goto exit;
1707         }
1708         if (bd >= 0 || np > 1) {
1709                 /*
1710                  * Single IB device with multiple ports found,
1711                  * it may be E-Switch master device and representors.
1712                  * We have to perform identification through the ports.
1713                  */
1714                 MLX5_ASSERT(nl_rdma >= 0);
1715                 MLX5_ASSERT(ns == 0);
1716                 MLX5_ASSERT(nd == 1);
1717                 MLX5_ASSERT(np);
1718                 for (i = 1; i <= np; ++i) {
1719                         list[ns].max_port = np;
1720                         list[ns].phys_port = i;
1721                         list[ns].phys_dev = ibv_match[0];
1722                         list[ns].eth_dev = NULL;
1723                         list[ns].pci_dev = pci_dev;
1724                         list[ns].pf_bond = bd;
1725                         list[ns].ifindex = mlx5_nl_ifindex
1726                                 (nl_rdma,
1727                                 mlx5_os_get_dev_device_name
1728                                                 (list[ns].phys_dev), i);
1729                         if (!list[ns].ifindex) {
1730                                 /*
1731                                  * No network interface index found for the
1732                                  * specified port, it means there is no
1733                                  * representor on this port. It's OK,
1734                                  * there can be disabled ports, for example
1735                                  * if sriov_numvfs < sriov_totalvfs.
1736                                  */
1737                                 continue;
1738                         }
1739                         ret = -1;
1740                         if (nl_route >= 0)
1741                                 ret = mlx5_nl_switch_info
1742                                                (nl_route,
1743                                                 list[ns].ifindex,
1744                                                 &list[ns].info);
1745                         if (ret || (!list[ns].info.representor &&
1746                                     !list[ns].info.master)) {
1747                                 /*
1748                                  * We failed to recognize representors with
1749                                  * Netlink, let's try to perform the task
1750                                  * with sysfs.
1751                                  */
1752                                 ret =  mlx5_sysfs_switch_info
1753                                                 (list[ns].ifindex,
1754                                                  &list[ns].info);
1755                         }
1756                         if (!ret && bd >= 0) {
1757                                 switch (list[ns].info.name_type) {
1758                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1759                                         if (list[ns].info.port_name == bd)
1760                                                 ns++;
1761                                         break;
1762                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1763                                         /* Fallthrough */
1764                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1765                                         if (list[ns].info.pf_num == bd)
1766                                                 ns++;
1767                                         break;
1768                                 default:
1769                                         break;
1770                                 }
1771                                 continue;
1772                         }
1773                         if (!ret && (list[ns].info.representor ^
1774                                      list[ns].info.master))
1775                                 ns++;
1776                 }
1777                 if (!ns) {
1778                         DRV_LOG(ERR,
1779                                 "unable to recognize master/representors"
1780                                 " on the IB device with multiple ports");
1781                         rte_errno = ENOENT;
1782                         ret = -rte_errno;
1783                         goto exit;
1784                 }
1785         } else {
1786                 /*
1787                  * The existence of several matching entries (nd > 1) means
1788                  * port representors have been instantiated. No existing Verbs
1789                  * call nor sysfs entries can tell them apart, this can only
1790                  * be done through Netlink calls assuming kernel drivers are
1791                  * recent enough to support them.
1792                  *
1793                  * In the event of identification failure through Netlink,
1794                  * try again through sysfs, then:
1795                  *
1796                  * 1. A single IB device matches (nd == 1) with single
1797                  *    port (np=0/1) and is not a representor, assume
1798                  *    no switch support.
1799                  *
1800                  * 2. Otherwise no safe assumptions can be made;
1801                  *    complain louder and bail out.
1802                  */
1803                 for (i = 0; i != nd; ++i) {
1804                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1805                         list[ns].max_port = 1;
1806                         list[ns].phys_port = 1;
1807                         list[ns].phys_dev = ibv_match[i];
1808                         list[ns].eth_dev = NULL;
1809                         list[ns].pci_dev = pci_dev;
1810                         list[ns].pf_bond = -1;
1811                         list[ns].ifindex = 0;
1812                         if (nl_rdma >= 0)
1813                                 list[ns].ifindex = mlx5_nl_ifindex
1814                                 (nl_rdma,
1815                                 mlx5_os_get_dev_device_name
1816                                                 (list[ns].phys_dev), 1);
1817                         if (!list[ns].ifindex) {
1818                                 char ifname[IF_NAMESIZE];
1819
1820                                 /*
1821                                  * Netlink failed, it may happen with old
1822                                  * ib_core kernel driver (before 4.16).
1823                                  * We can assume there is old driver because
1824                                  * here we are processing single ports IB
1825                                  * devices. Let's try sysfs to retrieve
1826                                  * the ifindex. The method works for
1827                                  * master device only.
1828                                  */
1829                                 if (nd > 1) {
1830                                         /*
1831                                          * Multiple devices found, assume
1832                                          * representors, can not distinguish
1833                                          * master/representor and retrieve
1834                                          * ifindex via sysfs.
1835                                          */
1836                                         continue;
1837                                 }
1838                                 ret = mlx5_get_ifname_sysfs
1839                                         (ibv_match[i]->ibdev_path, ifname);
1840                                 if (!ret)
1841                                         list[ns].ifindex =
1842                                                 if_nametoindex(ifname);
1843                                 if (!list[ns].ifindex) {
1844                                         /*
1845                                          * No network interface index found
1846                                          * for the specified device, it means
1847                                          * there it is neither representor
1848                                          * nor master.
1849                                          */
1850                                         continue;
1851                                 }
1852                         }
1853                         ret = -1;
1854                         if (nl_route >= 0)
1855                                 ret = mlx5_nl_switch_info
1856                                                (nl_route,
1857                                                 list[ns].ifindex,
1858                                                 &list[ns].info);
1859                         if (ret || (!list[ns].info.representor &&
1860                                     !list[ns].info.master)) {
1861                                 /*
1862                                  * We failed to recognize representors with
1863                                  * Netlink, let's try to perform the task
1864                                  * with sysfs.
1865                                  */
1866                                 ret =  mlx5_sysfs_switch_info
1867                                                 (list[ns].ifindex,
1868                                                  &list[ns].info);
1869                         }
1870                         if (!ret && (list[ns].info.representor ^
1871                                      list[ns].info.master)) {
1872                                 ns++;
1873                         } else if ((nd == 1) &&
1874                                    !list[ns].info.representor &&
1875                                    !list[ns].info.master) {
1876                                 /*
1877                                  * Single IB device with
1878                                  * one physical port and
1879                                  * attached network device.
1880                                  * May be SRIOV is not enabled
1881                                  * or there is no representors.
1882                                  */
1883                                 DRV_LOG(INFO, "no E-Switch support detected");
1884                                 ns++;
1885                                 break;
1886                         }
1887                 }
1888                 if (!ns) {
1889                         DRV_LOG(ERR,
1890                                 "unable to recognize master/representors"
1891                                 " on the multiple IB devices");
1892                         rte_errno = ENOENT;
1893                         ret = -rte_errno;
1894                         goto exit;
1895                 }
1896         }
1897         MLX5_ASSERT(ns);
1898         /*
1899          * Sort list to probe devices in natural order for users convenience
1900          * (i.e. master first, then representors from lowest to highest ID).
1901          */
1902         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1903         /* Device specific configuration. */
1904         switch (pci_dev->id.device_id) {
1905         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1906         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1907         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1908         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1909         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1910         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1911         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1912                 dev_config_vf = 1;
1913                 break;
1914         default:
1915                 dev_config_vf = 0;
1916                 break;
1917         }
1918         for (i = 0; i != ns; ++i) {
1919                 uint32_t restore;
1920
1921                 /* Default configuration. */
1922                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1923                 dev_config.vf = dev_config_vf;
1924                 dev_config.mps = MLX5_ARG_UNSET;
1925                 dev_config.dbnc = MLX5_ARG_UNSET;
1926                 dev_config.rx_vec_en = 1;
1927                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
1928                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
1929                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
1930                 dev_config.txqs_inline = MLX5_ARG_UNSET;
1931                 dev_config.vf_nl_en = 1;
1932                 dev_config.mr_ext_memseg_en = 1;
1933                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1934                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1935                 dev_config.dv_esw_en = 1;
1936                 dev_config.dv_flow_en = 1;
1937                 dev_config.decap_en = 1;
1938                 dev_config.log_hp_size = MLX5_ARG_UNSET;
1939                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1940                                                  &list[i],
1941                                                  &dev_config);
1942                 if (!list[i].eth_dev) {
1943                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1944                                 break;
1945                         /* Device is disabled or already spawned. Ignore it. */
1946                         continue;
1947                 }
1948                 restore = list[i].eth_dev->data->dev_flags;
1949                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1950                 /* Restore non-PCI flags cleared by the above call. */
1951                 list[i].eth_dev->data->dev_flags |= restore;
1952                 rte_eth_dev_probing_finish(list[i].eth_dev);
1953         }
1954         if (i != ns) {
1955                 DRV_LOG(ERR,
1956                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1957                         " encountering an error: %s",
1958                         pci_dev->addr.domain, pci_dev->addr.bus,
1959                         pci_dev->addr.devid, pci_dev->addr.function,
1960                         strerror(rte_errno));
1961                 ret = -rte_errno;
1962                 /* Roll back. */
1963                 while (i--) {
1964                         if (!list[i].eth_dev)
1965                                 continue;
1966                         mlx5_dev_close(list[i].eth_dev);
1967                         /* mac_addrs must not be freed because in dev_private */
1968                         list[i].eth_dev->data->mac_addrs = NULL;
1969                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1970                 }
1971                 /* Restore original error. */
1972                 rte_errno = -ret;
1973         } else {
1974                 ret = 0;
1975         }
1976 exit:
1977         /*
1978          * Do the routine cleanup:
1979          * - close opened Netlink sockets
1980          * - free allocated spawn data array
1981          * - free the Infiniband device list
1982          */
1983         if (nl_rdma >= 0)
1984                 close(nl_rdma);
1985         if (nl_route >= 0)
1986                 close(nl_route);
1987         if (list)
1988                 mlx5_free(list);
1989         MLX5_ASSERT(ibv_list);
1990         mlx5_glue->free_device_list(ibv_list);
1991         return ret;
1992 }
1993
1994 static int
1995 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1996 {
1997         char *env;
1998         int value;
1999
2000         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2001         /* Get environment variable to store. */
2002         env = getenv(MLX5_SHUT_UP_BF);
2003         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2004         if (config->dbnc == MLX5_ARG_UNSET)
2005                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2006         else
2007                 setenv(MLX5_SHUT_UP_BF,
2008                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2009         return value;
2010 }
2011
2012 static void
2013 mlx5_restore_doorbell_mapping_env(int value)
2014 {
2015         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2016         /* Restore the original environment variable state. */
2017         if (value == MLX5_ARG_UNSET)
2018                 unsetenv(MLX5_SHUT_UP_BF);
2019         else
2020                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2021 }
2022
2023 /**
2024  * Extract pdn of PD object using DV API.
2025  *
2026  * @param[in] pd
2027  *   Pointer to the verbs PD object.
2028  * @param[out] pdn
2029  *   Pointer to the PD object number variable.
2030  *
2031  * @return
2032  *   0 on success, error value otherwise.
2033  */
2034 int
2035 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2036 {
2037 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2038         struct mlx5dv_obj obj;
2039         struct mlx5dv_pd pd_info;
2040         int ret = 0;
2041
2042         obj.pd.in = pd;
2043         obj.pd.out = &pd_info;
2044         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2045         if (ret) {
2046                 DRV_LOG(DEBUG, "Fail to get PD object info");
2047                 return ret;
2048         }
2049         *pdn = pd_info.pdn;
2050         return 0;
2051 #else
2052         (void)pd;
2053         (void)pdn;
2054         return -ENOTSUP;
2055 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2056 }
2057
2058 /**
2059  * Function API to open IB device.
2060  *
2061  * This function calls the Linux glue APIs to open a device.
2062  *
2063  * @param[in] spawn
2064  *   Pointer to the IB device attributes (name, port, etc).
2065  * @param[out] config
2066  *   Pointer to device configuration structure.
2067  * @param[out] sh
2068  *   Pointer to shared context structure.
2069  *
2070  * @return
2071  *   0 on success, a positive error value otherwise.
2072  */
2073 int
2074 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2075                      const struct mlx5_dev_config *config,
2076                      struct mlx5_dev_ctx_shared *sh)
2077 {
2078         int dbmap_env;
2079         int err = 0;
2080
2081         sh->numa_node = spawn->pci_dev->device.numa_node;
2082         pthread_mutex_init(&sh->txpp.mutex, NULL);
2083         /*
2084          * Configure environment variable "MLX5_BF_SHUT_UP"
2085          * before the device creation. The rdma_core library
2086          * checks the variable at device creation and
2087          * stores the result internally.
2088          */
2089         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2090         /* Try to open IB device with DV first, then usual Verbs. */
2091         errno = 0;
2092         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2093         if (sh->ctx) {
2094                 sh->devx = 1;
2095                 DRV_LOG(DEBUG, "DevX is supported");
2096                 /* The device is created, no need for environment. */
2097                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2098         } else {
2099                 /* The environment variable is still configured. */
2100                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2101                 err = errno ? errno : ENODEV;
2102                 /*
2103                  * The environment variable is not needed anymore,
2104                  * all device creation attempts are completed.
2105                  */
2106                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2107                 if (!sh->ctx)
2108                         return err;
2109                 DRV_LOG(DEBUG, "DevX is NOT supported");
2110                 err = 0;
2111         }
2112         return err;
2113 }
2114
2115 /**
2116  * Install shared asynchronous device events handler.
2117  * This function is implemented to support event sharing
2118  * between multiple ports of single IB device.
2119  *
2120  * @param sh
2121  *   Pointer to mlx5_dev_ctx_shared object.
2122  */
2123 void
2124 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2125 {
2126         int ret;
2127         int flags;
2128
2129         sh->intr_handle.fd = -1;
2130         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2131         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2132                     F_SETFL, flags | O_NONBLOCK);
2133         if (ret) {
2134                 DRV_LOG(INFO, "failed to change file descriptor async event"
2135                         " queue");
2136         } else {
2137                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2138                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2139                 if (rte_intr_callback_register(&sh->intr_handle,
2140                                         mlx5_dev_interrupt_handler, sh)) {
2141                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2142                         sh->intr_handle.fd = -1;
2143                 }
2144         }
2145         if (sh->devx) {
2146 #ifdef HAVE_IBV_DEVX_ASYNC
2147                 sh->intr_handle_devx.fd = -1;
2148                 sh->devx_comp =
2149                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2150                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2151                 if (!devx_comp) {
2152                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2153                         return;
2154                 }
2155                 flags = fcntl(devx_comp->fd, F_GETFL);
2156                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2157                 if (ret) {
2158                         DRV_LOG(INFO, "failed to change file descriptor"
2159                                 " devx comp");
2160                         return;
2161                 }
2162                 sh->intr_handle_devx.fd = devx_comp->fd;
2163                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2164                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2165                                         mlx5_dev_interrupt_handler_devx, sh)) {
2166                         DRV_LOG(INFO, "Fail to install the devx shared"
2167                                 " interrupt.");
2168                         sh->intr_handle_devx.fd = -1;
2169                 }
2170 #endif /* HAVE_IBV_DEVX_ASYNC */
2171         }
2172 }
2173
2174 /**
2175  * Uninstall shared asynchronous device events handler.
2176  * This function is implemented to support event sharing
2177  * between multiple ports of single IB device.
2178  *
2179  * @param dev
2180  *   Pointer to mlx5_dev_ctx_shared object.
2181  */
2182 void
2183 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2184 {
2185         if (sh->intr_handle.fd >= 0)
2186                 mlx5_intr_callback_unregister(&sh->intr_handle,
2187                                               mlx5_dev_interrupt_handler, sh);
2188 #ifdef HAVE_IBV_DEVX_ASYNC
2189         if (sh->intr_handle_devx.fd >= 0)
2190                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2191                                   mlx5_dev_interrupt_handler_devx, sh);
2192         if (sh->devx_comp)
2193                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2194 #endif
2195 }
2196
2197 /**
2198  * Read statistics by a named counter.
2199  *
2200  * @param[in] priv
2201  *   Pointer to the private device data structure.
2202  * @param[in] ctr_name
2203  *   Pointer to the name of the statistic counter to read
2204  * @param[out] stat
2205  *   Pointer to read statistic value.
2206  * @return
2207  *   0 on success and stat is valud, 1 if failed to read the value
2208  *   rte_errno is set.
2209  *
2210  */
2211 int
2212 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2213                       uint64_t *stat)
2214 {
2215         int fd;
2216
2217         if (priv->sh) {
2218                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2219                       priv->sh->ibdev_path,
2220                       priv->dev_port,
2221                       ctr_name);
2222                 fd = open(path, O_RDONLY);
2223                 /*
2224                  * in switchdev the file location is not per port
2225                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2226                  */
2227                 if (fd == -1) {
2228                         MKSTR(path1, "%s/hw_counters/%s",
2229                               priv->sh->ibdev_path,
2230                               ctr_name);
2231                         fd = open(path1, O_RDONLY);
2232                 }
2233                 if (fd != -1) {
2234                         char buf[21] = {'\0'};
2235                         ssize_t n = read(fd, buf, sizeof(buf));
2236
2237                         close(fd);
2238                         if (n != -1) {
2239                                 *stat = strtoull(buf, NULL, 10);
2240                                 return 0;
2241                         }
2242                 }
2243         }
2244         *stat = 0;
2245         return 1;
2246 }
2247
2248 /**
2249  * Set the reg_mr and dereg_mr call backs
2250  *
2251  * @param reg_mr_cb[out]
2252  *   Pointer to reg_mr func
2253  * @param dereg_mr_cb[out]
2254  *   Pointer to dereg_mr func
2255  *
2256  */
2257 void
2258 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2259                       mlx5_dereg_mr_t *dereg_mr_cb)
2260 {
2261         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2262         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2263 }
2264
2265 /**
2266  * Remove a MAC address from device
2267  *
2268  * @param dev
2269  *   Pointer to Ethernet device structure.
2270  * @param index
2271  *   MAC address index.
2272  */
2273 void
2274 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2275 {
2276         struct mlx5_priv *priv = dev->data->dev_private;
2277         const int vf = priv->config.vf;
2278
2279         if (vf)
2280                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2281                                         mlx5_ifindex(dev), priv->mac_own,
2282                                         &dev->data->mac_addrs[index], index);
2283 }
2284
2285 /**
2286  * Adds a MAC address to the device
2287  *
2288  * @param dev
2289  *   Pointer to Ethernet device structure.
2290  * @param mac_addr
2291  *   MAC address to register.
2292  * @param index
2293  *   MAC address index.
2294  *
2295  * @return
2296  *   0 on success, a negative errno value otherwise
2297  */
2298 int
2299 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2300                      uint32_t index)
2301 {
2302         struct mlx5_priv *priv = dev->data->dev_private;
2303         const int vf = priv->config.vf;
2304         int ret = 0;
2305
2306         if (vf)
2307                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2308                                            mlx5_ifindex(dev), priv->mac_own,
2309                                            mac, index);
2310         return ret;
2311 }
2312
2313 /**
2314  * Modify a VF MAC address
2315  *
2316  * @param priv
2317  *   Pointer to device private data.
2318  * @param mac_addr
2319  *   MAC address to modify into.
2320  * @param iface_idx
2321  *   Net device interface index
2322  * @param vf_index
2323  *   VF index
2324  *
2325  * @return
2326  *   0 on success, a negative errno value otherwise
2327  */
2328 int
2329 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2330                            unsigned int iface_idx,
2331                            struct rte_ether_addr *mac_addr,
2332                            int vf_index)
2333 {
2334         return mlx5_nl_vf_mac_addr_modify
2335                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2336 }
2337
2338 /**
2339  * Set device promiscuous mode
2340  *
2341  * @param dev
2342  *   Pointer to Ethernet device structure.
2343  * @param enable
2344  *   0 - promiscuous is disabled, otherwise - enabled
2345  *
2346  * @return
2347  *   0 on success, a negative error value otherwise
2348  */
2349 int
2350 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2351 {
2352         struct mlx5_priv *priv = dev->data->dev_private;
2353
2354         return mlx5_nl_promisc(priv->nl_socket_route,
2355                                mlx5_ifindex(dev), !!enable);
2356 }
2357
2358 /**
2359  * Set device promiscuous mode
2360  *
2361  * @param dev
2362  *   Pointer to Ethernet device structure.
2363  * @param enable
2364  *   0 - all multicase is disabled, otherwise - enabled
2365  *
2366  * @return
2367  *   0 on success, a negative error value otherwise
2368  */
2369 int
2370 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2371 {
2372         struct mlx5_priv *priv = dev->data->dev_private;
2373
2374         return mlx5_nl_allmulti(priv->nl_socket_route,
2375                                 mlx5_ifindex(dev), !!enable);
2376 }
2377
2378 /**
2379  * Flush device MAC addresses
2380  *
2381  * @param dev
2382  *   Pointer to Ethernet device structure.
2383  *
2384  */
2385 void
2386 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2387 {
2388         struct mlx5_priv *priv = dev->data->dev_private;
2389
2390         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2391                                dev->data->mac_addrs,
2392                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2393 }
2394
2395 const struct eth_dev_ops mlx5_os_dev_ops = {
2396         .dev_configure = mlx5_dev_configure,
2397         .dev_start = mlx5_dev_start,
2398         .dev_stop = mlx5_dev_stop,
2399         .dev_set_link_down = mlx5_set_link_down,
2400         .dev_set_link_up = mlx5_set_link_up,
2401         .dev_close = mlx5_dev_close,
2402         .promiscuous_enable = mlx5_promiscuous_enable,
2403         .promiscuous_disable = mlx5_promiscuous_disable,
2404         .allmulticast_enable = mlx5_allmulticast_enable,
2405         .allmulticast_disable = mlx5_allmulticast_disable,
2406         .link_update = mlx5_link_update,
2407         .stats_get = mlx5_stats_get,
2408         .stats_reset = mlx5_stats_reset,
2409         .xstats_get = mlx5_xstats_get,
2410         .xstats_reset = mlx5_xstats_reset,
2411         .xstats_get_names = mlx5_xstats_get_names,
2412         .fw_version_get = mlx5_fw_version_get,
2413         .dev_infos_get = mlx5_dev_infos_get,
2414         .read_clock = mlx5_txpp_read_clock,
2415         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2416         .vlan_filter_set = mlx5_vlan_filter_set,
2417         .rx_queue_setup = mlx5_rx_queue_setup,
2418         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2419         .tx_queue_setup = mlx5_tx_queue_setup,
2420         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2421         .rx_queue_release = mlx5_rx_queue_release,
2422         .tx_queue_release = mlx5_tx_queue_release,
2423         .rx_queue_start = mlx5_rx_queue_start,
2424         .rx_queue_stop = mlx5_rx_queue_stop,
2425         .tx_queue_start = mlx5_tx_queue_start,
2426         .tx_queue_stop = mlx5_tx_queue_stop,
2427         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2428         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2429         .mac_addr_remove = mlx5_mac_addr_remove,
2430         .mac_addr_add = mlx5_mac_addr_add,
2431         .mac_addr_set = mlx5_mac_addr_set,
2432         .set_mc_addr_list = mlx5_set_mc_addr_list,
2433         .mtu_set = mlx5_dev_set_mtu,
2434         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2435         .vlan_offload_set = mlx5_vlan_offload_set,
2436         .reta_update = mlx5_dev_rss_reta_update,
2437         .reta_query = mlx5_dev_rss_reta_query,
2438         .rss_hash_update = mlx5_rss_hash_update,
2439         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2440         .filter_ctrl = mlx5_dev_filter_ctrl,
2441         .rxq_info_get = mlx5_rxq_info_get,
2442         .txq_info_get = mlx5_txq_info_get,
2443         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2444         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2445         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2446         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2447         .is_removed = mlx5_is_removed,
2448         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2449         .get_module_info = mlx5_get_module_info,
2450         .get_module_eeprom = mlx5_get_module_eeprom,
2451         .hairpin_cap_get = mlx5_hairpin_cap_get,
2452         .mtr_ops_get = mlx5_flow_meter_ops_get,
2453 };
2454
2455 /* Available operations from secondary process. */
2456 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2457         .stats_get = mlx5_stats_get,
2458         .stats_reset = mlx5_stats_reset,
2459         .xstats_get = mlx5_xstats_get,
2460         .xstats_reset = mlx5_xstats_reset,
2461         .xstats_get_names = mlx5_xstats_get_names,
2462         .fw_version_get = mlx5_fw_version_get,
2463         .dev_infos_get = mlx5_dev_infos_get,
2464         .read_clock = mlx5_txpp_read_clock,
2465         .rx_queue_start = mlx5_rx_queue_start,
2466         .rx_queue_stop = mlx5_rx_queue_stop,
2467         .tx_queue_start = mlx5_tx_queue_start,
2468         .tx_queue_stop = mlx5_tx_queue_stop,
2469         .rxq_info_get = mlx5_rxq_info_get,
2470         .txq_info_get = mlx5_txq_info_get,
2471         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2472         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2473         .get_module_info = mlx5_get_module_info,
2474         .get_module_eeprom = mlx5_get_module_eeprom,
2475 };
2476
2477 /* Available operations in flow isolated mode. */
2478 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2479         .dev_configure = mlx5_dev_configure,
2480         .dev_start = mlx5_dev_start,
2481         .dev_stop = mlx5_dev_stop,
2482         .dev_set_link_down = mlx5_set_link_down,
2483         .dev_set_link_up = mlx5_set_link_up,
2484         .dev_close = mlx5_dev_close,
2485         .promiscuous_enable = mlx5_promiscuous_enable,
2486         .promiscuous_disable = mlx5_promiscuous_disable,
2487         .allmulticast_enable = mlx5_allmulticast_enable,
2488         .allmulticast_disable = mlx5_allmulticast_disable,
2489         .link_update = mlx5_link_update,
2490         .stats_get = mlx5_stats_get,
2491         .stats_reset = mlx5_stats_reset,
2492         .xstats_get = mlx5_xstats_get,
2493         .xstats_reset = mlx5_xstats_reset,
2494         .xstats_get_names = mlx5_xstats_get_names,
2495         .fw_version_get = mlx5_fw_version_get,
2496         .dev_infos_get = mlx5_dev_infos_get,
2497         .read_clock = mlx5_txpp_read_clock,
2498         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2499         .vlan_filter_set = mlx5_vlan_filter_set,
2500         .rx_queue_setup = mlx5_rx_queue_setup,
2501         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2502         .tx_queue_setup = mlx5_tx_queue_setup,
2503         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2504         .rx_queue_release = mlx5_rx_queue_release,
2505         .tx_queue_release = mlx5_tx_queue_release,
2506         .rx_queue_start = mlx5_rx_queue_start,
2507         .rx_queue_stop = mlx5_rx_queue_stop,
2508         .tx_queue_start = mlx5_tx_queue_start,
2509         .tx_queue_stop = mlx5_tx_queue_stop,
2510         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2511         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2512         .mac_addr_remove = mlx5_mac_addr_remove,
2513         .mac_addr_add = mlx5_mac_addr_add,
2514         .mac_addr_set = mlx5_mac_addr_set,
2515         .set_mc_addr_list = mlx5_set_mc_addr_list,
2516         .mtu_set = mlx5_dev_set_mtu,
2517         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2518         .vlan_offload_set = mlx5_vlan_offload_set,
2519         .filter_ctrl = mlx5_dev_filter_ctrl,
2520         .rxq_info_get = mlx5_rxq_info_get,
2521         .txq_info_get = mlx5_txq_info_get,
2522         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2523         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2524         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2525         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2526         .is_removed = mlx5_is_removed,
2527         .get_module_info = mlx5_get_module_info,
2528         .get_module_eeprom = mlx5_get_module_eeprom,
2529         .hairpin_cap_get = mlx5_hairpin_cap_get,
2530         .mtr_ops_get = mlx5_flow_meter_ops_get,
2531 };