drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to include 2 dsegs in the title WQEBB.
 100  * Deprecated, ignored.
 101  */
 102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 103
 104 /*
 105  * Device parameter to limit the size of inlining packet.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 109
 110 /*
 111  * Device parameter to enable hardware Tx vector.
 112  * Deprecated, ignored (no vectorized Tx routines anymore).
 113  */
 114 #define MLX5_TX_VEC_EN "tx_vec_en"
 115
 116 /* Device parameter to enable hardware Rx vector. */
 117 #define MLX5_RX_VEC_EN "rx_vec_en"
 118
 119 /* Allow L3 VXLAN flow creation. */
 120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 121
 122 /* Activate DV E-Switch flow steering. */
 123 #define MLX5_DV_ESW_EN "dv_esw_en"
 124
 125 /* Activate DV flow steering. */
 126 #define MLX5_DV_FLOW_EN "dv_flow_en"
 127
 128 /* Activate Netlink support in VF mode. */
 129 #define MLX5_VF_NL_EN "vf_nl_en"
 130
 131 /* Enable extending memsegs when creating a MR. */
 132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 133
 134 /* Select port representors to instantiate. */
 135 #define MLX5_REPRESENTOR "representor"
 136
 137 /* Device parameter to configure the maximum number of dump files per queue. */
 138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 139
 140 /* Configure timeout of LRO session (in microseconds). */
 141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 142
 143 #ifndef HAVE_IBV_MLX5_MOD_MPW
 144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 146 #endif
 147
 148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 150 #endif
 151
 152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 153
 154 /* Shared memory between primary and secondary processes. */
 155 struct mlx5_shared_data *mlx5_shared_data;
 156
 157 /* Spinlock for mlx5_shared_data allocation. */
 158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 159
 160 /* Process local data for secondary processes. */
 161 static struct mlx5_local_data mlx5_local_data;
 162
 163 /** Driver-specific log messages type. */
 164 int mlx5_logtype;
 165
 166 /** Data associated with devices to spawn. */
 167 struct mlx5_dev_spawn_data {
 168         uint32_t ifindex; /**< Network interface index. */
 169         uint32_t max_port; /**< IB device maximal port index. */
 170         uint32_t ibv_port; /**< IB device physical port index. */
 171         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
 172         struct mlx5_switch_info info; /**< Switch information. */
 173         struct ibv_device *ibv_dev; /**< Associated IB device. */
 174         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 175         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 176 };
 177
 178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 180
 181 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
 182 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
 183
 184 /**
 185  * Allocate ID pool structure.
 186  *
 187  * @return
 188  *   Pointer to pool object, NULL value otherwise.
 189  */
 190 struct mlx5_flow_id_pool *
 191 mlx5_flow_id_pool_alloc(void)
 192 {
 193         struct mlx5_flow_id_pool *pool;
 194         void *mem;
 195
 196         pool = rte_zmalloc("id pool allocation", sizeof(*pool),
 197                            RTE_CACHE_LINE_SIZE);
 198         if (!pool) {
 199                 DRV_LOG(ERR, "can't allocate id pool");
 200                 rte_errno  = ENOMEM;
 201                 return NULL;
 202         }
 203         mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
 204                           RTE_CACHE_LINE_SIZE);
 205         if (!mem) {
 206                 DRV_LOG(ERR, "can't allocate mem for id pool");
 207                 rte_errno  = ENOMEM;
 208                 goto error;
 209         }
 210         pool->free_arr = mem;
 211         pool->curr = pool->free_arr;
 212         pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
 213         pool->base_index = 0;
 214         return pool;
 215 error:
 216         rte_free(pool);
 217         return NULL;
 218 }
 219
 220 /**
 221  * Release ID pool structure.
 222  *
 223  * @param[in] pool
 224  *   Pointer to flow id pool object to free.
 225  */
 226 void
 227 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
 228 {
 229         rte_free(pool->free_arr);
 230         rte_free(pool);
 231 }
 232
 233 /**
 234  * Generate ID.
 235  *
 236  * @param[in] pool
 237  *   Pointer to flow id pool.
 238  * @param[out] id
 239  *   The generated ID.
 240  *
 241  * @return
 242  *   0 on success, error value otherwise.
 243  */
 244 uint32_t
 245 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
 246 {
 247         if (pool->curr == pool->free_arr) {
 248                 if (pool->base_index == UINT32_MAX) {
 249                         rte_errno  = ENOMEM;
 250                         DRV_LOG(ERR, "no free id");
 251                         return -rte_errno;
 252                 }
 253                 *id = ++pool->base_index;
 254                 return 0;
 255         }
 256         *id = *(--pool->curr);
 257         return 0;
 258 }
 259
 260 /**
 261  * Release ID.
 262  *
 263  * @param[in] pool
 264  *   Pointer to flow id pool.
 265  * @param[out] id
 266  *   The generated ID.
 267  *
 268  * @return
 269  *   0 on success, error value otherwise.
 270  */
 271 uint32_t
 272 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
 273 {
 274         uint32_t size;
 275         uint32_t size2;
 276         void *mem;
 277
 278         if (pool->curr == pool->last) {
 279                 size = pool->curr - pool->free_arr;
 280                 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
 281                 assert(size2 > size);
 282                 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
 283                 if (!mem) {
 284                         DRV_LOG(ERR, "can't allocate mem for id pool");
 285                         rte_errno  = ENOMEM;
 286                         return -rte_errno;
 287                 }
 288                 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
 289                 rte_free(pool->free_arr);
 290                 pool->free_arr = mem;
 291                 pool->curr = pool->free_arr + size;
 292                 pool->last = pool->free_arr + size2;
 293         }
 294         *pool->curr = id;
 295         pool->curr++;
 296         return 0;
 297 }
 298
 299 /**
 300  * Initialize the counters management structure.
 301  *
 302  * @param[in] sh
 303  *   Pointer to mlx5_ibv_shared object to free
 304  */
 305 static void
 306 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 307 {
 308         uint8_t i;
 309
 310         TAILQ_INIT(&sh->cmng.flow_counters);
 311         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 312                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 313 }
 314
 315 /**
 316  * Destroy all the resources allocated for a counter memory management.
 317  *
 318  * @param[in] mng
 319  *   Pointer to the memory management structure.
 320  */
 321 static void
 322 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 323 {
 324         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 325
 326         LIST_REMOVE(mng, next);
 327         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 328         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 329         rte_free(mem);
 330 }
 331
 332 /**
 333  * Close and release all the resources of the counters management.
 334  *
 335  * @param[in] sh
 336  *   Pointer to mlx5_ibv_shared object to free.
 337  */
 338 static void
 339 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 340 {
 341         struct mlx5_counter_stats_mem_mng *mng;
 342         uint8_t i;
 343         int j;
 344         int retries = 1024;
 345
 346         rte_errno = 0;
 347         while (--retries) {
 348                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 349                 if (rte_errno != EINPROGRESS)
 350                         break;
 351                 rte_pause();
 352         }
 353         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 354                 struct mlx5_flow_counter_pool *pool;
 355                 uint32_t batch = !!(i % 2);
 356
 357                 if (!sh->cmng.ccont[i].pools)
 358                         continue;
 359                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 360                 while (pool) {
 361                         if (batch) {
 362                                 if (pool->min_dcs)
 363                                         claim_zero
 364                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 365                         }
 366                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 367                                 if (pool->counters_raw[j].action)
 368                                         claim_zero
 369                                         (mlx5_glue->destroy_flow_action
 370                                                (pool->counters_raw[j].action));
 371                                 if (!batch && pool->counters_raw[j].dcs)
 372                                         claim_zero(mlx5_devx_cmd_destroy
 373                                                   (pool->counters_raw[j].dcs));
 374                         }
 375                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 376                                      next);
 377                         rte_free(pool);
 378                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 379                 }
 380                 rte_free(sh->cmng.ccont[i].pools);
 381         }
 382         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 383         while (mng) {
 384                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 385                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 386         }
 387         memset(&sh->cmng, 0, sizeof(sh->cmng));
 388 }
 389
 390 /**
 391  * Extract pdn of PD object using DV API.
 392  *
 393  * @param[in] pd
 394  *   Pointer to the verbs PD object.
 395  * @param[out] pdn
 396  *   Pointer to the PD object number variable.
 397  *
 398  * @return
 399  *   0 on success, error value otherwise.
 400  */
 401 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 402 static int
 403 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 404 {
 405         struct mlx5dv_obj obj;
 406         struct mlx5dv_pd pd_info;
 407         int ret = 0;
 408
 409         obj.pd.in = pd;
 410         obj.pd.out = &pd_info;
 411         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 412         if (ret) {
 413                 DRV_LOG(DEBUG, "Fail to get PD object info");
 414                 return ret;
 415         }
 416         *pdn = pd_info.pdn;
 417         return 0;
 418 }
 419 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 420
 421 /**
 422  * Allocate shared IB device context. If there is multiport device the
 423  * master and representors will share this context, if there is single
 424  * port dedicated IB device, the context will be used by only given
 425  * port due to unification.
 426  *
 427  * Routine first searches the context for the specified IB device name,
 428  * if found the shared context assumed and reference counter is incremented.
 429  * If no context found the new one is created and initialized with specified
 430  * IB device context and parameters.
 431  *
 432  * @param[in] spawn
 433  *   Pointer to the IB device attributes (name, port, etc).
 434  *
 435  * @return
 436  *   Pointer to mlx5_ibv_shared object on success,
 437  *   otherwise NULL and rte_errno is set.
 438  */
 439 static struct mlx5_ibv_shared *
 440 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 441 {
 442         struct mlx5_ibv_shared *sh;
 443         int err = 0;
 444         uint32_t i;
 445 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 446         struct mlx5_devx_tis_attr tis_attr = { 0 };
 447 #endif
 448
 449 assert(spawn);
 450         /* Secondary process should not create the shared context. */
 451         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 452         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 453         /* Search for IB context by device name. */
 454         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 455                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 456                         sh->refcnt++;
 457                         goto exit;
 458                 }
 459         }
 460         /* No device found, we have to create new shared context. */
 461         assert(spawn->max_port);
 462         sh = rte_zmalloc("ethdev shared ib context",
 463                          sizeof(struct mlx5_ibv_shared) +
 464                          spawn->max_port *
 465                          sizeof(struct mlx5_ibv_shared_port),
 466                          RTE_CACHE_LINE_SIZE);
 467         if (!sh) {
 468                 DRV_LOG(ERR, "shared context allocation failure");
 469                 rte_errno  = ENOMEM;
 470                 goto exit;
 471         }
 472         /* Try to open IB device with DV first, then usual Verbs. */
 473         errno = 0;
 474         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 475         if (sh->ctx) {
 476                 sh->devx = 1;
 477                 DRV_LOG(DEBUG, "DevX is supported");
 478         } else {
 479                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 480                 if (!sh->ctx) {
 481                         err = errno ? errno : ENODEV;
 482                         goto error;
 483                 }
 484                 DRV_LOG(DEBUG, "DevX is NOT supported");
 485         }
 486         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 487         if (err) {
 488                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 489                 goto error;
 490         }
 491         sh->refcnt = 1;
 492         sh->max_port = spawn->max_port;
 493         strncpy(sh->ibdev_name, sh->ctx->device->name,
 494                 sizeof(sh->ibdev_name));
 495         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 496                 sizeof(sh->ibdev_path));
 497         pthread_mutex_init(&sh->intr_mutex, NULL);
 498         /*
 499          * Setting port_id to max unallowed value means
 500          * there is no interrupt subhandler installed for
 501          * the given port index i.
 502          */
 503         for (i = 0; i < sh->max_port; i++) {
 504                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 505                 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
 506         }
 507         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 508         if (sh->pd == NULL) {
 509                 DRV_LOG(ERR, "PD allocation failure");
 510                 err = ENOMEM;
 511                 goto error;
 512         }
 513 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 514         if (sh->devx) {
 515                 err = mlx5_get_pdn(sh->pd, &sh->pdn);
 516                 if (err) {
 517                         DRV_LOG(ERR, "Fail to extract pdn from PD");
 518                         goto error;
 519                 }
 520                 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
 521                 if (!sh->td) {
 522                         DRV_LOG(ERR, "TD allocation failure");
 523                         err = ENOMEM;
 524                         goto error;
 525                 }
 526                 tis_attr.transport_domain = sh->td->id;
 527                 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
 528                 if (!sh->tis) {
 529                         DRV_LOG(ERR, "TIS allocation failure");
 530                         err = ENOMEM;
 531                         goto error;
 532                 }
 533         }
 534 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 535         /*
 536          * Once the device is added to the list of memory event
 537          * callback, its global MR cache table cannot be expanded
 538          * on the fly because of deadlock. If it overflows, lookup
 539          * should be done by searching MR list linearly, which is slow.
 540          *
 541          * At this point the device is not added to the memory
 542          * event list yet, context is just being created.
 543          */
 544         err = mlx5_mr_btree_init(&sh->mr.cache,
 545                                  MLX5_MR_BTREE_CACHE_N * 2,
 546                                  spawn->pci_dev->device.numa_node);
 547         if (err) {
 548                 err = rte_errno;
 549                 goto error;
 550         }
 551         mlx5_flow_counters_mng_init(sh);
 552         /* Add device to memory callback list. */
 553         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 554         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 555                          sh, mem_event_cb);
 556         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 557         /* Add context to the global device list. */
 558         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 559 exit:
 560         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 561         return sh;
 562 error:
 563         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 564         assert(sh);
 565         if (sh->tis)
 566                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 567         if (sh->td)
 568                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 569         if (sh->pd)
 570                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 571         if (sh->ctx)
 572                 claim_zero(mlx5_glue->close_device(sh->ctx));
 573         rte_free(sh);
 574         assert(err > 0);
 575         rte_errno = err;
 576         return NULL;
 577 }
 578
 579 /**
 580  * Free shared IB device context. Decrement counter and if zero free
 581  * all allocated resources and close handles.
 582  *
 583  * @param[in] sh
 584  *   Pointer to mlx5_ibv_shared object to free
 585  */
 586 static void
 587 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 588 {
 589         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 590 #ifndef NDEBUG
 591         /* Check the object presence in the list. */
 592         struct mlx5_ibv_shared *lctx;
 593
 594         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 595                 if (lctx == sh)
 596                         break;
 597         assert(lctx);
 598         if (lctx != sh) {
 599                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 600                 goto exit;
 601         }
 602 #endif
 603         assert(sh);
 604         assert(sh->refcnt);
 605         /* Secondary process should not free the shared context. */
 606         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 607         if (--sh->refcnt)
 608                 goto exit;
 609         /* Release created Memory Regions. */
 610         mlx5_mr_release(sh);
 611         /* Remove from memory callback device list. */
 612         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 613         LIST_REMOVE(sh, mem_event_cb);
 614         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 615         /* Remove context from the global device list. */
 616         LIST_REMOVE(sh, next);
 617         /*
 618          *  Ensure there is no async event handler installed.
 619          *  Only primary process handles async device events.
 620          **/
 621         mlx5_flow_counters_mng_close(sh);
 622         assert(!sh->intr_cnt);
 623         if (sh->intr_cnt)
 624                 mlx5_intr_callback_unregister
 625                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 626 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
 627         if (sh->devx_intr_cnt) {
 628                 if (sh->intr_handle_devx.fd)
 629                         rte_intr_callback_unregister(&sh->intr_handle_devx,
 630                                           mlx5_dev_interrupt_handler_devx, sh);
 631                 if (sh->devx_comp)
 632                         mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
 633         }
 634 #endif
 635         pthread_mutex_destroy(&sh->intr_mutex);
 636         if (sh->pd)
 637                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 638         if (sh->tis)
 639                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 640         if (sh->td)
 641                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 642         if (sh->ctx)
 643                 claim_zero(mlx5_glue->close_device(sh->ctx));
 644         rte_free(sh);
 645 exit:
 646         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 647 }
 648
 649 /**
 650  * Initialize DR related data within private structure.
 651  * Routine checks the reference counter and does actual
 652  * resources creation/initialization only if counter is zero.
 653  *
 654  * @param[in] priv
 655  *   Pointer to the private device data structure.
 656  *
 657  * @return
 658  *   Zero on success, positive error code otherwise.
 659  */
 660 static int
 661 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 662 {
 663 #ifdef HAVE_MLX5DV_DR
 664         struct mlx5_ibv_shared *sh = priv->sh;
 665         int err = 0;
 666         void *domain;
 667
 668         assert(sh);
 669         if (sh->dv_refcnt) {
 670                 /* Shared DV/DR structures is already initialized. */
 671                 sh->dv_refcnt++;
 672                 priv->dr_shared = 1;
 673                 return 0;
 674         }
 675         /* Reference counter is zero, we should initialize structures. */
 676         domain = mlx5_glue->dr_create_domain(sh->ctx,
 677                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 678         if (!domain) {
 679                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 680                 err = errno;
 681                 goto error;
 682         }
 683         sh->rx_domain = domain;
 684         domain = mlx5_glue->dr_create_domain(sh->ctx,
 685                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 686         if (!domain) {
 687                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 688                 err = errno;
 689                 goto error;
 690         }
 691         pthread_mutex_init(&sh->dv_mutex, NULL);
 692         sh->tx_domain = domain;
 693 #ifdef HAVE_MLX5DV_DR_ESWITCH
 694         if (priv->config.dv_esw_en) {
 695                 domain  = mlx5_glue->dr_create_domain
 696                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 697                 if (!domain) {
 698                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 699                         err = errno;
 700                         goto error;
 701                 }
 702                 sh->fdb_domain = domain;
 703                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 704         }
 705 #endif
 706         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 707         sh->dv_refcnt++;
 708         priv->dr_shared = 1;
 709         return 0;
 710
 711 error:
 712        /* Rollback the created objects. */
 713         if (sh->rx_domain) {
 714                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 715                 sh->rx_domain = NULL;
 716         }
 717         if (sh->tx_domain) {
 718                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 719                 sh->tx_domain = NULL;
 720         }
 721         if (sh->fdb_domain) {
 722                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 723                 sh->fdb_domain = NULL;
 724         }
 725         if (sh->esw_drop_action) {
 726                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 727                 sh->esw_drop_action = NULL;
 728         }
 729         if (sh->pop_vlan_action) {
 730                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 731                 sh->pop_vlan_action = NULL;
 732         }
 733         return err;
 734 #else
 735         (void)priv;
 736         return 0;
 737 #endif
 738 }
 739
 740 /**
 741  * Destroy DR related data within private structure.
 742  *
 743  * @param[in] priv
 744  *   Pointer to the private device data structure.
 745  */
 746 static void
 747 mlx5_free_shared_dr(struct mlx5_priv *priv)
 748 {
 749 #ifdef HAVE_MLX5DV_DR
 750         struct mlx5_ibv_shared *sh;
 751
 752         if (!priv->dr_shared)
 753                 return;
 754         priv->dr_shared = 0;
 755         sh = priv->sh;
 756         assert(sh);
 757         assert(sh->dv_refcnt);
 758         if (sh->dv_refcnt && --sh->dv_refcnt)
 759                 return;
 760         if (sh->rx_domain) {
 761                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 762                 sh->rx_domain = NULL;
 763         }
 764         if (sh->tx_domain) {
 765                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 766                 sh->tx_domain = NULL;
 767         }
 768 #ifdef HAVE_MLX5DV_DR_ESWITCH
 769         if (sh->fdb_domain) {
 770                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 771                 sh->fdb_domain = NULL;
 772         }
 773         if (sh->esw_drop_action) {
 774                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 775                 sh->esw_drop_action = NULL;
 776         }
 777 #endif
 778         if (sh->pop_vlan_action) {
 779                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 780                 sh->pop_vlan_action = NULL;
 781         }
 782         pthread_mutex_destroy(&sh->dv_mutex);
 783 #else
 784         (void)priv;
 785 #endif
 786 }
 787
 788 /**
 789  * Initialize shared data between primary and secondary process.
 790  *
 791  * A memzone is reserved by primary process and secondary processes attach to
 792  * the memzone.
 793  *
 794  * @return
 795  *   0 on success, a negative errno value otherwise and rte_errno is set.
 796  */
 797 static int
 798 mlx5_init_shared_data(void)
 799 {
 800         const struct rte_memzone *mz;
 801         int ret = 0;
 802
 803         rte_spinlock_lock(&mlx5_shared_data_lock);
 804         if (mlx5_shared_data == NULL) {
 805                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 806                         /* Allocate shared memory. */
 807                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 808                                                  sizeof(*mlx5_shared_data),
 809                                                  SOCKET_ID_ANY, 0);
 810                         if (mz == NULL) {
 811                                 DRV_LOG(ERR,
 812                                         "Cannot allocate mlx5 shared data\n");
 813                                 ret = -rte_errno;
 814                                 goto error;
 815                         }
 816                         mlx5_shared_data = mz->addr;
 817                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 818                         rte_spinlock_init(&mlx5_shared_data->lock);
 819                 } else {
 820                         /* Lookup allocated shared memory. */
 821                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 822                         if (mz == NULL) {
 823                                 DRV_LOG(ERR,
 824                                         "Cannot attach mlx5 shared data\n");
 825                                 ret = -rte_errno;
 826                                 goto error;
 827                         }
 828                         mlx5_shared_data = mz->addr;
 829                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 830                 }
 831         }
 832 error:
 833         rte_spinlock_unlock(&mlx5_shared_data_lock);
 834         return ret;
 835 }
 836
 837 /**
 838  * Retrieve integer value from environment variable.
 839  *
 840  * @param[in] name
 841  *   Environment variable name.
 842  *
 843  * @return
 844  *   Integer value, 0 if the variable is not set.
 845  */
 846 int
 847 mlx5_getenv_int(const char *name)
 848 {
 849         const char *val = getenv(name);
 850
 851         if (val == NULL)
 852                 return 0;
 853         return atoi(val);
 854 }
 855
 856 /**
 857  * Verbs callback to allocate a memory. This function should allocate the space
 858  * according to the size provided residing inside a huge page.
 859  * Please note that all allocation must respect the alignment from libmlx5
 860  * (i.e. currently sysconf(_SC_PAGESIZE)).
 861  *
 862  * @param[in] size
 863  *   The size in bytes of the memory to allocate.
 864  * @param[in] data
 865  *   A pointer to the callback data.
 866  *
 867  * @return
 868  *   Allocated buffer, NULL otherwise and rte_errno is set.
 869  */
 870 static void *
 871 mlx5_alloc_verbs_buf(size_t size, void *data)
 872 {
 873         struct mlx5_priv *priv = data;
 874         void *ret;
 875         size_t alignment = sysconf(_SC_PAGESIZE);
 876         unsigned int socket = SOCKET_ID_ANY;
 877
 878         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 879                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 880
 881                 socket = ctrl->socket;
 882         } else if (priv->verbs_alloc_ctx.type ==
 883                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 884                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 885
 886                 socket = ctrl->socket;
 887         }
 888         assert(data != NULL);
 889         ret = rte_malloc_socket(__func__, size, alignment, socket);
 890         if (!ret && size)
 891                 rte_errno = ENOMEM;
 892         return ret;
 893 }
 894
 895 /**
 896  * Verbs callback to free a memory.
 897  *
 898  * @param[in] ptr
 899  *   A pointer to the memory to free.
 900  * @param[in] data
 901  *   A pointer to the callback data.
 902  */
 903 static void
 904 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 905 {
 906         assert(data != NULL);
 907         rte_free(ptr);
 908 }
 909
 910 /**
 911  * DPDK callback to add udp tunnel port
 912  *
 913  * @param[in] dev
 914  *   A pointer to eth_dev
 915  * @param[in] udp_tunnel
 916  *   A pointer to udp tunnel
 917  *
 918  * @return
 919  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
 920  */
 921 int
 922 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
 923                          struct rte_eth_udp_tunnel *udp_tunnel)
 924 {
 925         assert(udp_tunnel != NULL);
 926         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
 927             udp_tunnel->udp_port == 4789)
 928                 return 0;
 929         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
 930             udp_tunnel->udp_port == 4790)
 931                 return 0;
 932         return -ENOTSUP;
 933 }
 934
 935 /**
 936  * Initialize process private data structure.
 937  *
 938  * @param dev
 939  *   Pointer to Ethernet device structure.
 940  *
 941  * @return
 942  *   0 on success, a negative errno value otherwise and rte_errno is set.
 943  */
 944 int
 945 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 946 {
 947         struct mlx5_priv *priv = dev->data->dev_private;
 948         struct mlx5_proc_priv *ppriv;
 949         size_t ppriv_size;
 950
 951         /*
 952          * UAR register table follows the process private structure. BlueFlame
 953          * registers for Tx queues are stored in the table.
 954          */
 955         ppriv_size =
 956                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 957         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 958                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 959         if (!ppriv) {
 960                 rte_errno = ENOMEM;
 961                 return -rte_errno;
 962         }
 963         ppriv->uar_table_sz = ppriv_size;
 964         dev->process_private = ppriv;
 965         return 0;
 966 }
 967
 968 /**
 969  * Un-initialize process private data structure.
 970  *
 971  * @param dev
 972  *   Pointer to Ethernet device structure.
 973  */
 974 static void
 975 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 976 {
 977         if (!dev->process_private)
 978                 return;
 979         rte_free(dev->process_private);
 980         dev->process_private = NULL;
 981 }
 982
 983 /**
 984  * DPDK callback to close the device.
 985  *
 986  * Destroy all queues and objects, free memory.
 987  *
 988  * @param dev
 989  *   Pointer to Ethernet device structure.
 990  */
 991 static void
 992 mlx5_dev_close(struct rte_eth_dev *dev)
 993 {
 994         struct mlx5_priv *priv = dev->data->dev_private;
 995         unsigned int i;
 996         int ret;
 997
 998         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 999                 dev->data->port_id,
1000                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1001         /* In case mlx5_dev_stop() has not been called. */
1002         mlx5_dev_interrupt_handler_uninstall(dev);
1003         mlx5_dev_interrupt_handler_devx_uninstall(dev);
1004         mlx5_traffic_disable(dev);
1005         mlx5_flow_flush(dev, NULL);
1006         /* Prevent crashes when queues are still in use. */
1007         dev->rx_pkt_burst = removed_rx_burst;
1008         dev->tx_pkt_burst = removed_tx_burst;
1009         rte_wmb();
1010         /* Disable datapath on secondary process. */
1011         mlx5_mp_req_stop_rxtx(dev);
1012         if (priv->rxqs != NULL) {
1013                 /* XXX race condition if mlx5_rx_burst() is still running. */
1014                 usleep(1000);
1015                 for (i = 0; (i != priv->rxqs_n); ++i)
1016                         mlx5_rxq_release(dev, i);
1017                 priv->rxqs_n = 0;
1018                 priv->rxqs = NULL;
1019         }
1020         if (priv->txqs != NULL) {
1021                 /* XXX race condition if mlx5_tx_burst() is still running. */
1022                 usleep(1000);
1023                 for (i = 0; (i != priv->txqs_n); ++i)
1024                         mlx5_txq_release(dev, i);
1025                 priv->txqs_n = 0;
1026                 priv->txqs = NULL;
1027         }
1028         mlx5_proc_priv_uninit(dev);
1029         mlx5_mprq_free_mp(dev);
1030         mlx5_free_shared_dr(priv);
1031         if (priv->rss_conf.rss_key != NULL)
1032                 rte_free(priv->rss_conf.rss_key);
1033         if (priv->reta_idx != NULL)
1034                 rte_free(priv->reta_idx);
1035         if (priv->config.vf)
1036                 mlx5_nl_mac_addr_flush(dev);
1037         if (priv->nl_socket_route >= 0)
1038                 close(priv->nl_socket_route);
1039         if (priv->nl_socket_rdma >= 0)
1040                 close(priv->nl_socket_rdma);
1041         if (priv->vmwa_context)
1042                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1043         if (priv->sh) {
1044                 /*
1045                  * Free the shared context in last turn, because the cleanup
1046                  * routines above may use some shared fields, like
1047                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1048                  * ifindex if Netlink fails.
1049                  */
1050                 mlx5_free_shared_ibctx(priv->sh);
1051                 priv->sh = NULL;
1052         }
1053         ret = mlx5_hrxq_verify(dev);
1054         if (ret)
1055                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1056                         dev->data->port_id);
1057         ret = mlx5_ind_table_obj_verify(dev);
1058         if (ret)
1059                 DRV_LOG(WARNING, "port %u some indirection table still remain",
1060                         dev->data->port_id);
1061         ret = mlx5_rxq_obj_verify(dev);
1062         if (ret)
1063                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1064                         dev->data->port_id);
1065         ret = mlx5_rxq_verify(dev);
1066         if (ret)
1067                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1068                         dev->data->port_id);
1069         ret = mlx5_txq_obj_verify(dev);
1070         if (ret)
1071                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1072                         dev->data->port_id);
1073         ret = mlx5_txq_verify(dev);
1074         if (ret)
1075                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1076                         dev->data->port_id);
1077         ret = mlx5_flow_verify(dev);
1078         if (ret)
1079                 DRV_LOG(WARNING, "port %u some flows still remain",
1080                         dev->data->port_id);
1081         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1082                 unsigned int c = 0;
1083                 uint16_t port_id;
1084
1085                 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1086                         struct mlx5_priv *opriv =
1087                                 rte_eth_devices[port_id].data->dev_private;
1088
1089                         if (!opriv ||
1090                             opriv->domain_id != priv->domain_id ||
1091                             &rte_eth_devices[port_id] == dev)
1092                                 continue;
1093                         ++c;
1094                         break;
1095                 }
1096                 if (!c)
1097                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1098         }
1099         memset(priv, 0, sizeof(*priv));
1100         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1101         /*
1102          * Reset mac_addrs to NULL such that it is not freed as part of
1103          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1104          * it is freed when dev_private is freed.
1105          */
1106         dev->data->mac_addrs = NULL;
1107 }
1108
1109 const struct eth_dev_ops mlx5_dev_ops = {
1110         .dev_configure = mlx5_dev_configure,
1111         .dev_start = mlx5_dev_start,
1112         .dev_stop = mlx5_dev_stop,
1113         .dev_set_link_down = mlx5_set_link_down,
1114         .dev_set_link_up = mlx5_set_link_up,
1115         .dev_close = mlx5_dev_close,
1116         .promiscuous_enable = mlx5_promiscuous_enable,
1117         .promiscuous_disable = mlx5_promiscuous_disable,
1118         .allmulticast_enable = mlx5_allmulticast_enable,
1119         .allmulticast_disable = mlx5_allmulticast_disable,
1120         .link_update = mlx5_link_update,
1121         .stats_get = mlx5_stats_get,
1122         .stats_reset = mlx5_stats_reset,
1123         .xstats_get = mlx5_xstats_get,
1124         .xstats_reset = mlx5_xstats_reset,
1125         .xstats_get_names = mlx5_xstats_get_names,
1126         .fw_version_get = mlx5_fw_version_get,
1127         .dev_infos_get = mlx5_dev_infos_get,
1128         .read_clock = mlx5_read_clock,
1129         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1130         .vlan_filter_set = mlx5_vlan_filter_set,
1131         .rx_queue_setup = mlx5_rx_queue_setup,
1132         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1133         .tx_queue_setup = mlx5_tx_queue_setup,
1134         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1135         .rx_queue_release = mlx5_rx_queue_release,
1136         .tx_queue_release = mlx5_tx_queue_release,
1137         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1138         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1139         .mac_addr_remove = mlx5_mac_addr_remove,
1140         .mac_addr_add = mlx5_mac_addr_add,
1141         .mac_addr_set = mlx5_mac_addr_set,
1142         .set_mc_addr_list = mlx5_set_mc_addr_list,
1143         .mtu_set = mlx5_dev_set_mtu,
1144         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1145         .vlan_offload_set = mlx5_vlan_offload_set,
1146         .reta_update = mlx5_dev_rss_reta_update,
1147         .reta_query = mlx5_dev_rss_reta_query,
1148         .rss_hash_update = mlx5_rss_hash_update,
1149         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1150         .filter_ctrl = mlx5_dev_filter_ctrl,
1151         .rx_descriptor_status = mlx5_rx_descriptor_status,
1152         .tx_descriptor_status = mlx5_tx_descriptor_status,
1153         .rx_queue_count = mlx5_rx_queue_count,
1154         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1155         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1156         .is_removed = mlx5_is_removed,
1157         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1158         .get_module_info = mlx5_get_module_info,
1159         .get_module_eeprom = mlx5_get_module_eeprom,
1160         .hairpin_cap_get = mlx5_hairpin_cap_get,
1161 };
1162
1163 /* Available operations from secondary process. */
1164 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1165         .stats_get = mlx5_stats_get,
1166         .stats_reset = mlx5_stats_reset,
1167         .xstats_get = mlx5_xstats_get,
1168         .xstats_reset = mlx5_xstats_reset,
1169         .xstats_get_names = mlx5_xstats_get_names,
1170         .fw_version_get = mlx5_fw_version_get,
1171         .dev_infos_get = mlx5_dev_infos_get,
1172         .rx_descriptor_status = mlx5_rx_descriptor_status,
1173         .tx_descriptor_status = mlx5_tx_descriptor_status,
1174         .get_module_info = mlx5_get_module_info,
1175         .get_module_eeprom = mlx5_get_module_eeprom,
1176 };
1177
1178 /* Available operations in flow isolated mode. */
1179 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1180         .dev_configure = mlx5_dev_configure,
1181         .dev_start = mlx5_dev_start,
1182         .dev_stop = mlx5_dev_stop,
1183         .dev_set_link_down = mlx5_set_link_down,
1184         .dev_set_link_up = mlx5_set_link_up,
1185         .dev_close = mlx5_dev_close,
1186         .promiscuous_enable = mlx5_promiscuous_enable,
1187         .promiscuous_disable = mlx5_promiscuous_disable,
1188         .allmulticast_enable = mlx5_allmulticast_enable,
1189         .allmulticast_disable = mlx5_allmulticast_disable,
1190         .link_update = mlx5_link_update,
1191         .stats_get = mlx5_stats_get,
1192         .stats_reset = mlx5_stats_reset,
1193         .xstats_get = mlx5_xstats_get,
1194         .xstats_reset = mlx5_xstats_reset,
1195         .xstats_get_names = mlx5_xstats_get_names,
1196         .fw_version_get = mlx5_fw_version_get,
1197         .dev_infos_get = mlx5_dev_infos_get,
1198         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1199         .vlan_filter_set = mlx5_vlan_filter_set,
1200         .rx_queue_setup = mlx5_rx_queue_setup,
1201         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1202         .tx_queue_setup = mlx5_tx_queue_setup,
1203         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1204         .rx_queue_release = mlx5_rx_queue_release,
1205         .tx_queue_release = mlx5_tx_queue_release,
1206         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1207         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1208         .mac_addr_remove = mlx5_mac_addr_remove,
1209         .mac_addr_add = mlx5_mac_addr_add,
1210         .mac_addr_set = mlx5_mac_addr_set,
1211         .set_mc_addr_list = mlx5_set_mc_addr_list,
1212         .mtu_set = mlx5_dev_set_mtu,
1213         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1214         .vlan_offload_set = mlx5_vlan_offload_set,
1215         .filter_ctrl = mlx5_dev_filter_ctrl,
1216         .rx_descriptor_status = mlx5_rx_descriptor_status,
1217         .tx_descriptor_status = mlx5_tx_descriptor_status,
1218         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1219         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1220         .is_removed = mlx5_is_removed,
1221         .get_module_info = mlx5_get_module_info,
1222         .get_module_eeprom = mlx5_get_module_eeprom,
1223         .hairpin_cap_get = mlx5_hairpin_cap_get,
1224 };
1225
1226 /**
1227  * Verify and store value for device argument.
1228  *
1229  * @param[in] key
1230  *   Key argument to verify.
1231  * @param[in] val
1232  *   Value associated with key.
1233  * @param opaque
1234  *   User data.
1235  *
1236  * @return
1237  *   0 on success, a negative errno value otherwise and rte_errno is set.
1238  */
1239 static int
1240 mlx5_args_check(const char *key, const char *val, void *opaque)
1241 {
1242         struct mlx5_dev_config *config = opaque;
1243         unsigned long tmp;
1244
1245         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1246         if (!strcmp(MLX5_REPRESENTOR, key))
1247                 return 0;
1248         errno = 0;
1249         tmp = strtoul(val, NULL, 0);
1250         if (errno) {
1251                 rte_errno = errno;
1252                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1253                 return -rte_errno;
1254         }
1255         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1256                 config->cqe_comp = !!tmp;
1257         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1258                 config->cqe_pad = !!tmp;
1259         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1260                 config->hw_padding = !!tmp;
1261         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1262                 config->mprq.enabled = !!tmp;
1263         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1264                 config->mprq.stride_num_n = tmp;
1265         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1266                 config->mprq.max_memcpy_len = tmp;
1267         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1268                 config->mprq.min_rxqs_num = tmp;
1269         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1270                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1271                                  " converted to txq_inline_max", key);
1272                 config->txq_inline_max = tmp;
1273         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1274                 config->txq_inline_max = tmp;
1275         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1276                 config->txq_inline_min = tmp;
1277         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1278                 config->txq_inline_mpw = tmp;
1279         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1280                 config->txqs_inline = tmp;
1281         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1282                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1283         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1284                 config->mps = !!tmp;
1285         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1286                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1287         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1288                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1289                                  " converted to txq_inline_mpw", key);
1290                 config->txq_inline_mpw = tmp;
1291         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1292                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1293         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1294                 config->rx_vec_en = !!tmp;
1295         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1296                 config->l3_vxlan_en = !!tmp;
1297         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1298                 config->vf_nl_en = !!tmp;
1299         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1300                 config->dv_esw_en = !!tmp;
1301         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1302                 config->dv_flow_en = !!tmp;
1303         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1304                 config->mr_ext_memseg_en = !!tmp;
1305         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1306                 config->max_dump_files_num = tmp;
1307         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1308                 config->lro.timeout = tmp;
1309         } else {
1310                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1311                 rte_errno = EINVAL;
1312                 return -rte_errno;
1313         }
1314         return 0;
1315 }
1316
1317 /**
1318  * Parse device parameters.
1319  *
1320  * @param config
1321  *   Pointer to device configuration structure.
1322  * @param devargs
1323  *   Device arguments structure.
1324  *
1325  * @return
1326  *   0 on success, a negative errno value otherwise and rte_errno is set.
1327  */
1328 static int
1329 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1330 {
1331         const char **params = (const char *[]){
1332                 MLX5_RXQ_CQE_COMP_EN,
1333                 MLX5_RXQ_CQE_PAD_EN,
1334                 MLX5_RXQ_PKT_PAD_EN,
1335                 MLX5_RX_MPRQ_EN,
1336                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1337                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1338                 MLX5_RXQS_MIN_MPRQ,
1339                 MLX5_TXQ_INLINE,
1340                 MLX5_TXQ_INLINE_MIN,
1341                 MLX5_TXQ_INLINE_MAX,
1342                 MLX5_TXQ_INLINE_MPW,
1343                 MLX5_TXQS_MIN_INLINE,
1344                 MLX5_TXQS_MAX_VEC,
1345                 MLX5_TXQ_MPW_EN,
1346                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1347                 MLX5_TXQ_MAX_INLINE_LEN,
1348                 MLX5_TX_VEC_EN,
1349                 MLX5_RX_VEC_EN,
1350                 MLX5_L3_VXLAN_EN,
1351                 MLX5_VF_NL_EN,
1352                 MLX5_DV_ESW_EN,
1353                 MLX5_DV_FLOW_EN,
1354                 MLX5_MR_EXT_MEMSEG_EN,
1355                 MLX5_REPRESENTOR,
1356                 MLX5_MAX_DUMP_FILES_NUM,
1357                 MLX5_LRO_TIMEOUT_USEC,
1358                 NULL,
1359         };
1360         struct rte_kvargs *kvlist;
1361         int ret = 0;
1362         int i;
1363
1364         if (devargs == NULL)
1365                 return 0;
1366         /* Following UGLY cast is done to pass checkpatch. */
1367         kvlist = rte_kvargs_parse(devargs->args, params);
1368         if (kvlist == NULL) {
1369                 rte_errno = EINVAL;
1370                 return -rte_errno;
1371         }
1372         /* Process parameters. */
1373         for (i = 0; (params[i] != NULL); ++i) {
1374                 if (rte_kvargs_count(kvlist, params[i])) {
1375                         ret = rte_kvargs_process(kvlist, params[i],
1376                                                  mlx5_args_check, config);
1377                         if (ret) {
1378                                 rte_errno = EINVAL;
1379                                 rte_kvargs_free(kvlist);
1380                                 return -rte_errno;
1381                         }
1382                 }
1383         }
1384         rte_kvargs_free(kvlist);
1385         return 0;
1386 }
1387
1388 static struct rte_pci_driver mlx5_driver;
1389
1390 /**
1391  * PMD global initialization.
1392  *
1393  * Independent from individual device, this function initializes global
1394  * per-PMD data structures distinguishing primary and secondary processes.
1395  * Hence, each initialization is called once per a process.
1396  *
1397  * @return
1398  *   0 on success, a negative errno value otherwise and rte_errno is set.
1399  */
1400 static int
1401 mlx5_init_once(void)
1402 {
1403         struct mlx5_shared_data *sd;
1404         struct mlx5_local_data *ld = &mlx5_local_data;
1405         int ret = 0;
1406
1407         if (mlx5_init_shared_data())
1408                 return -rte_errno;
1409         sd = mlx5_shared_data;
1410         assert(sd);
1411         rte_spinlock_lock(&sd->lock);
1412         switch (rte_eal_process_type()) {
1413         case RTE_PROC_PRIMARY:
1414                 if (sd->init_done)
1415                         break;
1416                 LIST_INIT(&sd->mem_event_cb_list);
1417                 rte_rwlock_init(&sd->mem_event_rwlock);
1418                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1419                                                 mlx5_mr_mem_event_cb, NULL);
1420                 ret = mlx5_mp_init_primary();
1421                 if (ret)
1422                         goto out;
1423                 sd->init_done = true;
1424                 break;
1425         case RTE_PROC_SECONDARY:
1426                 if (ld->init_done)
1427                         break;
1428                 ret = mlx5_mp_init_secondary();
1429                 if (ret)
1430                         goto out;
1431                 ++sd->secondary_cnt;
1432                 ld->init_done = true;
1433                 break;
1434         default:
1435                 break;
1436         }
1437 out:
1438         rte_spinlock_unlock(&sd->lock);
1439         return ret;
1440 }
1441
1442 /**
1443  * Configures the minimal amount of data to inline into WQE
1444  * while sending packets.
1445  *
1446  * - the txq_inline_min has the maximal priority, if this
1447  *   key is specified in devargs
1448  * - if DevX is enabled the inline mode is queried from the
1449  *   device (HCA attributes and NIC vport context if needed).
1450  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1451  *   and none (0 bytes) for other NICs
1452  *
1453  * @param spawn
1454  *   Verbs device parameters (name, port, switch_info) to spawn.
1455  * @param config
1456  *   Device configuration parameters.
1457  */
1458 static void
1459 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1460                     struct mlx5_dev_config *config)
1461 {
1462         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1463                 /* Application defines size of inlined data explicitly. */
1464                 switch (spawn->pci_dev->id.device_id) {
1465                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1466                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1467                         if (config->txq_inline_min <
1468                                        (int)MLX5_INLINE_HSIZE_L2) {
1469                                 DRV_LOG(DEBUG,
1470                                         "txq_inline_mix aligned to minimal"
1471                                         " ConnectX-4 required value %d",
1472                                         (int)MLX5_INLINE_HSIZE_L2);
1473                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1474                         }
1475                         break;
1476                 }
1477                 goto exit;
1478         }
1479         if (config->hca_attr.eth_net_offloads) {
1480                 /* We have DevX enabled, inline mode queried successfully. */
1481                 switch (config->hca_attr.wqe_inline_mode) {
1482                 case MLX5_CAP_INLINE_MODE_L2:
1483                         /* outer L2 header must be inlined. */
1484                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1485                         goto exit;
1486                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1487                         /* No inline data are required by NIC. */
1488                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1489                         config->hw_vlan_insert =
1490                                 config->hca_attr.wqe_vlan_insert;
1491                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1492                         goto exit;
1493                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1494                         /* inline mode is defined by NIC vport context. */
1495                         if (!config->hca_attr.eth_virt)
1496                                 break;
1497                         switch (config->hca_attr.vport_inline_mode) {
1498                         case MLX5_INLINE_MODE_NONE:
1499                                 config->txq_inline_min =
1500                                         MLX5_INLINE_HSIZE_NONE;
1501                                 goto exit;
1502                         case MLX5_INLINE_MODE_L2:
1503                                 config->txq_inline_min =
1504                                         MLX5_INLINE_HSIZE_L2;
1505                                 goto exit;
1506                         case MLX5_INLINE_MODE_IP:
1507                                 config->txq_inline_min =
1508                                         MLX5_INLINE_HSIZE_L3;
1509                                 goto exit;
1510                         case MLX5_INLINE_MODE_TCP_UDP:
1511                                 config->txq_inline_min =
1512                                         MLX5_INLINE_HSIZE_L4;
1513                                 goto exit;
1514                         case MLX5_INLINE_MODE_INNER_L2:
1515                                 config->txq_inline_min =
1516                                         MLX5_INLINE_HSIZE_INNER_L2;
1517                                 goto exit;
1518                         case MLX5_INLINE_MODE_INNER_IP:
1519                                 config->txq_inline_min =
1520                                         MLX5_INLINE_HSIZE_INNER_L3;
1521                                 goto exit;
1522                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1523                                 config->txq_inline_min =
1524                                         MLX5_INLINE_HSIZE_INNER_L4;
1525                                 goto exit;
1526                         }
1527                 }
1528         }
1529         /*
1530          * We get here if we are unable to deduce
1531          * inline data size with DevX. Try PCI ID
1532          * to determine old NICs.
1533          */
1534         switch (spawn->pci_dev->id.device_id) {
1535         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1536         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1537         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1538         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1539                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1540                 config->hw_vlan_insert = 0;
1541                 break;
1542         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1543         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1544         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1545         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1546                 /*
1547                  * These NICs support VLAN insertion from WQE and
1548                  * report the wqe_vlan_insert flag. But there is the bug
1549                  * and PFC control may be broken, so disable feature.
1550                  */
1551                 config->hw_vlan_insert = 0;
1552                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1553                 break;
1554         default:
1555                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1556                 break;
1557         }
1558 exit:
1559         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1560 }
1561
1562 /**
1563  * Allocate page of door-bells and register it using DevX API.
1564  *
1565  * @param [in] dev
1566  *   Pointer to Ethernet device.
1567  *
1568  * @return
1569  *   Pointer to new page on success, NULL otherwise.
1570  */
1571 static struct mlx5_devx_dbr_page *
1572 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1573 {
1574         struct mlx5_priv *priv = dev->data->dev_private;
1575         struct mlx5_devx_dbr_page *page;
1576
1577         /* Allocate space for door-bell page and management data. */
1578         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1579                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1580         if (!page) {
1581                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1582                         dev->data->port_id);
1583                 return NULL;
1584         }
1585         /* Register allocated memory. */
1586         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1587                                               MLX5_DBR_PAGE_SIZE, 0);
1588         if (!page->umem) {
1589                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1590                         dev->data->port_id);
1591                 rte_free(page);
1592                 return NULL;
1593         }
1594         return page;
1595 }
1596
1597 /**
1598  * Find the next available door-bell, allocate new page if needed.
1599  *
1600  * @param [in] dev
1601  *   Pointer to Ethernet device.
1602  * @param [out] dbr_page
1603  *   Door-bell page containing the page data.
1604  *
1605  * @return
1606  *   Door-bell address offset on success, a negative error value otherwise.
1607  */
1608 int64_t
1609 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1610 {
1611         struct mlx5_priv *priv = dev->data->dev_private;
1612         struct mlx5_devx_dbr_page *page = NULL;
1613         uint32_t i, j;
1614
1615         LIST_FOREACH(page, &priv->dbrpgs, next)
1616                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1617                         break;
1618         if (!page) { /* No page with free door-bell exists. */
1619                 page = mlx5_alloc_dbr_page(dev);
1620                 if (!page) /* Failed to allocate new page. */
1621                         return (-1);
1622                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1623         }
1624         /* Loop to find bitmap part with clear bit. */
1625         for (i = 0;
1626              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1627              i++)
1628                 ; /* Empty. */
1629         /* Find the first clear bit. */
1630         j = rte_bsf64(~page->dbr_bitmap[i]);
1631         assert(i < (MLX5_DBR_PER_PAGE / 64));
1632         page->dbr_bitmap[i] |= (1 << j);
1633         page->dbr_count++;
1634         *dbr_page = page;
1635         return (((i * 64) + j) * sizeof(uint64_t));
1636 }
1637
1638 /**
1639  * Release a door-bell record.
1640  *
1641  * @param [in] dev
1642  *   Pointer to Ethernet device.
1643  * @param [in] umem_id
1644  *   UMEM ID of page containing the door-bell record to release.
1645  * @param [in] offset
1646  *   Offset of door-bell record in page.
1647  *
1648  * @return
1649  *   0 on success, a negative error value otherwise.
1650  */
1651 int32_t
1652 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1653 {
1654         struct mlx5_priv *priv = dev->data->dev_private;
1655         struct mlx5_devx_dbr_page *page = NULL;
1656         int ret = 0;
1657
1658         LIST_FOREACH(page, &priv->dbrpgs, next)
1659                 /* Find the page this address belongs to. */
1660                 if (page->umem->umem_id == umem_id)
1661                         break;
1662         if (!page)
1663                 return -EINVAL;
1664         page->dbr_count--;
1665         if (!page->dbr_count) {
1666                 /* Page not used, free it and remove from list. */
1667                 LIST_REMOVE(page, next);
1668                 if (page->umem)
1669                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1670                 rte_free(page);
1671         } else {
1672                 /* Mark in bitmap that this door-bell is not in use. */
1673                 offset /= MLX5_DBR_SIZE;
1674                 int i = offset / 64;
1675                 int j = offset % 64;
1676
1677                 page->dbr_bitmap[i] &= ~(1 << j);
1678         }
1679         return ret;
1680 }
1681
1682 /**
1683  * Check sibling device configurations.
1684  *
1685  * Sibling devices sharing the Infiniband device context
1686  * should have compatible configurations. This regards
1687  * representors and bonding slaves.
1688  *
1689  * @param priv
1690  *   Private device descriptor.
1691  * @param config
1692  *   Configuration of the device is going to be created.
1693  *
1694  * @return
1695  *   0 on success, EINVAL otherwise
1696  */
1697 static int
1698 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1699                               struct mlx5_dev_config *config)
1700 {
1701         struct mlx5_ibv_shared *sh = priv->sh;
1702         struct mlx5_dev_config *sh_conf = NULL;
1703         uint16_t port_id;
1704
1705         assert(sh);
1706         /* Nothing to compare for the single/first device. */
1707         if (sh->refcnt == 1)
1708                 return 0;
1709         /* Find the device with shared context. */
1710         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1711                 struct mlx5_priv *opriv =
1712                         rte_eth_devices[port_id].data->dev_private;
1713
1714                 if (opriv && opriv != priv && opriv->sh == sh) {
1715                         sh_conf = &opriv->config;
1716                         break;
1717                 }
1718         }
1719         if (!sh_conf)
1720                 return 0;
1721         if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1722                 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1723                              " for shared %s context", sh->ibdev_name);
1724                 rte_errno = EINVAL;
1725                 return rte_errno;
1726         }
1727         return 0;
1728 }
1729 /**
1730  * Spawn an Ethernet device from Verbs information.
1731  *
1732  * @param dpdk_dev
1733  *   Backing DPDK device.
1734  * @param spawn
1735  *   Verbs device parameters (name, port, switch_info) to spawn.
1736  * @param config
1737  *   Device configuration parameters.
1738  *
1739  * @return
1740  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1741  *   is set. The following errors are defined:
1742  *
1743  *   EBUSY: device is not supposed to be spawned.
1744  *   EEXIST: device is already spawned
1745  */
1746 static struct rte_eth_dev *
1747 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1748                struct mlx5_dev_spawn_data *spawn,
1749                struct mlx5_dev_config config)
1750 {
1751         const struct mlx5_switch_info *switch_info = &spawn->info;
1752         struct mlx5_ibv_shared *sh = NULL;
1753         struct ibv_port_attr port_attr;
1754         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1755         struct rte_eth_dev *eth_dev = NULL;
1756         struct mlx5_priv *priv = NULL;
1757         int err = 0;
1758         unsigned int hw_padding = 0;
1759         unsigned int mps;
1760         unsigned int cqe_comp;
1761         unsigned int cqe_pad = 0;
1762         unsigned int tunnel_en = 0;
1763         unsigned int mpls_en = 0;
1764         unsigned int swp = 0;
1765         unsigned int mprq = 0;
1766         unsigned int mprq_min_stride_size_n = 0;
1767         unsigned int mprq_max_stride_size_n = 0;
1768         unsigned int mprq_min_stride_num_n = 0;
1769         unsigned int mprq_max_stride_num_n = 0;
1770         struct rte_ether_addr mac;
1771         char name[RTE_ETH_NAME_MAX_LEN];
1772         int own_domain_id = 0;
1773         uint16_t port_id;
1774         unsigned int i;
1775 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1776         struct mlx5dv_devx_port devx_port;
1777 #endif
1778
1779         /* Determine if this port representor is supposed to be spawned. */
1780         if (switch_info->representor && dpdk_dev->devargs) {
1781                 struct rte_eth_devargs eth_da;
1782
1783                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1784                 if (err) {
1785                         rte_errno = -err;
1786                         DRV_LOG(ERR, "failed to process device arguments: %s",
1787                                 strerror(rte_errno));
1788                         return NULL;
1789                 }
1790                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1791                         if (eth_da.representor_ports[i] ==
1792                             (uint16_t)switch_info->port_name)
1793                                 break;
1794                 if (i == eth_da.nb_representor_ports) {
1795                         rte_errno = EBUSY;
1796                         return NULL;
1797                 }
1798         }
1799         /* Build device name. */
1800         if (spawn->pf_bond <  0) {
1801                 /* Single device. */
1802                 if (!switch_info->representor)
1803                         strlcpy(name, dpdk_dev->name, sizeof(name));
1804                 else
1805                         snprintf(name, sizeof(name), "%s_representor_%u",
1806                                  dpdk_dev->name, switch_info->port_name);
1807         } else {
1808                 /* Bonding device. */
1809                 if (!switch_info->representor)
1810                         snprintf(name, sizeof(name), "%s_%s",
1811                                  dpdk_dev->name, spawn->ibv_dev->name);
1812                 else
1813                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
1814                                  dpdk_dev->name, spawn->ibv_dev->name,
1815                                  switch_info->port_name);
1816         }
1817         /* check if the device is already spawned */
1818         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1819                 rte_errno = EEXIST;
1820                 return NULL;
1821         }
1822         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1823         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1824                 eth_dev = rte_eth_dev_attach_secondary(name);
1825                 if (eth_dev == NULL) {
1826                         DRV_LOG(ERR, "can not attach rte ethdev");
1827                         rte_errno = ENOMEM;
1828                         return NULL;
1829                 }
1830                 eth_dev->device = dpdk_dev;
1831                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1832                 err = mlx5_proc_priv_init(eth_dev);
1833                 if (err)
1834                         return NULL;
1835                 /* Receive command fd from primary process */
1836                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1837                 if (err < 0)
1838                         return NULL;
1839                 /* Remap UAR for Tx queues. */
1840                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1841                 if (err)
1842                         return NULL;
1843                 /*
1844                  * Ethdev pointer is still required as input since
1845                  * the primary device is not accessible from the
1846                  * secondary process.
1847                  */
1848                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1849                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1850                 return eth_dev;
1851         }
1852         sh = mlx5_alloc_shared_ibctx(spawn);
1853         if (!sh)
1854                 return NULL;
1855         config.devx = sh->devx;
1856 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1857         config.dest_tir = 1;
1858 #endif
1859 #ifdef HAVE_IBV_MLX5_MOD_SWP
1860         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1861 #endif
1862         /*
1863          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1864          * as all ConnectX-5 devices.
1865          */
1866 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1867         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1868 #endif
1869 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1870         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1871 #endif
1872         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1873         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1874                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1875                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1876                         mps = MLX5_MPW_ENHANCED;
1877                 } else {
1878                         DRV_LOG(DEBUG, "MPW is supported");
1879                         mps = MLX5_MPW;
1880                 }
1881         } else {
1882                 DRV_LOG(DEBUG, "MPW isn't supported");
1883                 mps = MLX5_MPW_DISABLED;
1884         }
1885 #ifdef HAVE_IBV_MLX5_MOD_SWP
1886         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1887                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1888         DRV_LOG(DEBUG, "SWP support: %u", swp);
1889 #endif
1890         config.swp = !!swp;
1891 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1892         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1893                 struct mlx5dv_striding_rq_caps mprq_caps =
1894                         dv_attr.striding_rq_caps;
1895
1896                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1897                         mprq_caps.min_single_stride_log_num_of_bytes);
1898                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1899                         mprq_caps.max_single_stride_log_num_of_bytes);
1900                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1901                         mprq_caps.min_single_wqe_log_num_of_strides);
1902                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1903                         mprq_caps.max_single_wqe_log_num_of_strides);
1904                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1905                         mprq_caps.supported_qpts);
1906                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1907                 mprq = 1;
1908                 mprq_min_stride_size_n =
1909                         mprq_caps.min_single_stride_log_num_of_bytes;
1910                 mprq_max_stride_size_n =
1911                         mprq_caps.max_single_stride_log_num_of_bytes;
1912                 mprq_min_stride_num_n =
1913                         mprq_caps.min_single_wqe_log_num_of_strides;
1914                 mprq_max_stride_num_n =
1915                         mprq_caps.max_single_wqe_log_num_of_strides;
1916                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1917                                                    mprq_min_stride_num_n);
1918         }
1919 #endif
1920         if (RTE_CACHE_LINE_SIZE == 128 &&
1921             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1922                 cqe_comp = 0;
1923         else
1924                 cqe_comp = 1;
1925         config.cqe_comp = cqe_comp;
1926 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1927         /* Whether device supports 128B Rx CQE padding. */
1928         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1929                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1930 #endif
1931 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1932         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1933                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1934                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1935                              (dv_attr.tunnel_offloads_caps &
1936                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1937         }
1938         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1939                 tunnel_en ? "" : "not ");
1940 #else
1941         DRV_LOG(WARNING,
1942                 "tunnel offloading disabled due to old OFED/rdma-core version");
1943 #endif
1944         config.tunnel_en = tunnel_en;
1945 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1946         mpls_en = ((dv_attr.tunnel_offloads_caps &
1947                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1948                    (dv_attr.tunnel_offloads_caps &
1949                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1950         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1951                 mpls_en ? "" : "not ");
1952 #else
1953         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1954                 " old OFED/rdma-core version or firmware configuration");
1955 #endif
1956         config.mpls_en = mpls_en;
1957         /* Check port status. */
1958         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1959         if (err) {
1960                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1961                 goto error;
1962         }
1963         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1964                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1965                 err = EINVAL;
1966                 goto error;
1967         }
1968         if (port_attr.state != IBV_PORT_ACTIVE)
1969                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1970                         mlx5_glue->port_state_str(port_attr.state),
1971                         port_attr.state);
1972         /* Allocate private eth device data. */
1973         priv = rte_zmalloc("ethdev private structure",
1974                            sizeof(*priv),
1975                            RTE_CACHE_LINE_SIZE);
1976         if (priv == NULL) {
1977                 DRV_LOG(ERR, "priv allocation failure");
1978                 err = ENOMEM;
1979                 goto error;
1980         }
1981         priv->sh = sh;
1982         priv->ibv_port = spawn->ibv_port;
1983         priv->pci_dev = spawn->pci_dev;
1984         priv->mtu = RTE_ETHER_MTU;
1985 #ifndef RTE_ARCH_64
1986         /* Initialize UAR access locks for 32bit implementations. */
1987         rte_spinlock_init(&priv->uar_lock_cq);
1988         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1989                 rte_spinlock_init(&priv->uar_lock[i]);
1990 #endif
1991         /* Some internal functions rely on Netlink sockets, open them now. */
1992         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1993         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1994         priv->nl_sn = 0;
1995         priv->representor = !!switch_info->representor;
1996         priv->master = !!switch_info->master;
1997         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1998         priv->vport_meta_tag = 0;
1999         priv->vport_meta_mask = 0;
2000         priv->pf_bond = spawn->pf_bond;
2001 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2002         /*
2003          * The DevX port query API is implemented. E-Switch may use
2004          * either vport or reg_c[0] metadata register to match on
2005          * vport index. The engaged part of metadata register is
2006          * defined by mask.
2007          */
2008         devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2009                               MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2010         err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port, &devx_port);
2011         if (err) {
2012                 DRV_LOG(WARNING, "can't query devx port %d on device %s\n",
2013                         spawn->ibv_port, spawn->ibv_dev->name);
2014                 devx_port.comp_mask = 0;
2015         }
2016         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2017                 priv->vport_meta_tag = devx_port.reg_c_0.value;
2018                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2019                 if (!priv->vport_meta_mask) {
2020                         DRV_LOG(ERR, "vport zero mask for port %d"
2021                                      " on bonding device %s\n",
2022                                      spawn->ibv_port, spawn->ibv_dev->name);
2023                         err = ENOTSUP;
2024                         goto error;
2025                 }
2026                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2027                         DRV_LOG(ERR, "invalid vport tag for port %d"
2028                                      " on bonding device %s\n",
2029                                      spawn->ibv_port, spawn->ibv_dev->name);
2030                         err = ENOTSUP;
2031                         goto error;
2032                 }
2033         } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2034                 priv->vport_id = devx_port.vport_num;
2035         } else if (spawn->pf_bond >= 0) {
2036                 DRV_LOG(ERR, "can't deduce vport index for port %d"
2037                              " on bonding device %s\n",
2038                              spawn->ibv_port, spawn->ibv_dev->name);
2039                 err = ENOTSUP;
2040                 goto error;
2041         } else {
2042                 /* Suppose vport index in compatible way. */
2043                 priv->vport_id = switch_info->representor ?
2044                                  switch_info->port_name + 1 : -1;
2045         }
2046 #else
2047         /*
2048          * Kernel/rdma_core support single E-Switch per PF configurations
2049          * only and vport_id field contains the vport index for
2050          * associated VF, which is deduced from representor port name.
2051          * For example, let's have the IB device port 10, it has
2052          * attached network device eth0, which has port name attribute
2053          * pf0vf2, we can deduce the VF number as 2, and set vport index
2054          * as 3 (2+1). This assigning schema should be changed if the
2055          * multiple E-Switch instances per PF configurations or/and PCI
2056          * subfunctions are added.
2057          */
2058         priv->vport_id = switch_info->representor ?
2059                          switch_info->port_name + 1 : -1;
2060 #endif
2061         /* representor_id field keeps the unmodified VF index. */
2062         priv->representor_id = switch_info->representor ?
2063                                switch_info->port_name : -1;
2064         /*
2065          * Look for sibling devices in order to reuse their switch domain
2066          * if any, otherwise allocate one.
2067          */
2068         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2069                 const struct mlx5_priv *opriv =
2070                         rte_eth_devices[port_id].data->dev_private;
2071
2072                 if (!opriv ||
2073                     opriv->sh != priv->sh ||
2074                         opriv->domain_id ==
2075                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2076                         continue;
2077                 priv->domain_id = opriv->domain_id;
2078                 break;
2079         }
2080         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2081                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2082                 if (err) {
2083                         err = rte_errno;
2084                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
2085                                 strerror(rte_errno));
2086                         goto error;
2087                 }
2088                 own_domain_id = 1;
2089         }
2090         err = mlx5_args(&config, dpdk_dev->devargs);
2091         if (err) {
2092                 err = rte_errno;
2093                 DRV_LOG(ERR, "failed to process device arguments: %s",
2094                         strerror(rte_errno));
2095                 goto error;
2096         }
2097         err = mlx5_dev_check_sibling_config(priv, &config);
2098         if (err)
2099                 goto error;
2100         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2101                             IBV_DEVICE_RAW_IP_CSUM);
2102         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2103                 (config.hw_csum ? "" : "not "));
2104 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2105         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2106         DRV_LOG(DEBUG, "counters are not supported");
2107 #endif
2108 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2109         if (config.dv_flow_en) {
2110                 DRV_LOG(WARNING, "DV flow is not supported");
2111                 config.dv_flow_en = 0;
2112         }
2113 #endif
2114         config.ind_table_max_size =
2115                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2116         /*
2117          * Remove this check once DPDK supports larger/variable
2118          * indirection tables.
2119          */
2120         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2121                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2122         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2123                 config.ind_table_max_size);
2124         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2125                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2126         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2127                 (config.hw_vlan_strip ? "" : "not "));
2128         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2129                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
2130         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2131                 (config.hw_fcs_strip ? "" : "not "));
2132 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2133         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2134 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2135         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2136                         IBV_DEVICE_PCI_WRITE_END_PADDING);
2137 #endif
2138         if (config.hw_padding && !hw_padding) {
2139                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2140                 config.hw_padding = 0;
2141         } else if (config.hw_padding) {
2142                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2143         }
2144         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2145                       (sh->device_attr.tso_caps.supported_qpts &
2146                        (1 << IBV_QPT_RAW_PACKET)));
2147         if (config.tso)
2148                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2149         /*
2150          * MPW is disabled by default, while the Enhanced MPW is enabled
2151          * by default.
2152          */
2153         if (config.mps == MLX5_ARG_UNSET)
2154                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2155                                                           MLX5_MPW_DISABLED;
2156         else
2157                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2158         DRV_LOG(INFO, "%sMPS is %s",
2159                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2160                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2161         if (config.cqe_comp && !cqe_comp) {
2162                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2163                 config.cqe_comp = 0;
2164         }
2165         if (config.cqe_pad && !cqe_pad) {
2166                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2167                 config.cqe_pad = 0;
2168         } else if (config.cqe_pad) {
2169                 DRV_LOG(INFO, "Rx CQE padding is enabled");
2170         }
2171         if (config.devx) {
2172                 priv->counter_fallback = 0;
2173                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2174                 if (err) {
2175                         err = -err;
2176                         goto error;
2177                 }
2178                 if (!config.hca_attr.flow_counters_dump)
2179                         priv->counter_fallback = 1;
2180 #ifndef HAVE_IBV_DEVX_ASYNC
2181                 priv->counter_fallback = 1;
2182 #endif
2183                 if (priv->counter_fallback)
2184                         DRV_LOG(INFO, "Use fall-back DV counter management\n");
2185                 /* Check for LRO support. */
2186                 if (config.dest_tir && config.hca_attr.lro_cap &&
2187                     config.dv_flow_en) {
2188                         /* TBD check tunnel lro caps. */
2189                         config.lro.supported = config.hca_attr.lro_cap;
2190                         DRV_LOG(DEBUG, "Device supports LRO");
2191                         /*
2192                          * If LRO timeout is not configured by application,
2193                          * use the minimal supported value.
2194                          */
2195                         if (!config.lro.timeout)
2196                                 config.lro.timeout =
2197                                 config.hca_attr.lro_timer_supported_periods[0];
2198                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2199                                 config.lro.timeout);
2200                 }
2201         }
2202         if (config.mprq.enabled && mprq) {
2203                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2204                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
2205                         config.mprq.stride_num_n =
2206                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2207                                         mprq_min_stride_num_n);
2208                         DRV_LOG(WARNING,
2209                                 "the number of strides"
2210                                 " for Multi-Packet RQ is out of range,"
2211                                 " setting default value (%u)",
2212                                 1 << config.mprq.stride_num_n);
2213                 }
2214                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2215                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2216         } else if (config.mprq.enabled && !mprq) {
2217                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2218                 config.mprq.enabled = 0;
2219         }
2220         if (config.max_dump_files_num == 0)
2221                 config.max_dump_files_num = 128;
2222         eth_dev = rte_eth_dev_allocate(name);
2223         if (eth_dev == NULL) {
2224                 DRV_LOG(ERR, "can not allocate rte ethdev");
2225                 err = ENOMEM;
2226                 goto error;
2227         }
2228         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2229         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2230         if (priv->representor) {
2231                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2232                 eth_dev->data->representor_id = priv->representor_id;
2233         }
2234         /*
2235          * Store associated network device interface index. This index
2236          * is permanent throughout the lifetime of device. So, we may store
2237          * the ifindex here and use the cached value further.
2238          */
2239         assert(spawn->ifindex);
2240         priv->if_index = spawn->ifindex;
2241         eth_dev->data->dev_private = priv;
2242         priv->dev_data = eth_dev->data;
2243         eth_dev->data->mac_addrs = priv->mac;
2244         eth_dev->device = dpdk_dev;
2245         /* Configure the first MAC address by default. */
2246         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2247                 DRV_LOG(ERR,
2248                         "port %u cannot get MAC address, is mlx5_en"
2249                         " loaded? (errno: %s)",
2250                         eth_dev->data->port_id, strerror(rte_errno));
2251                 err = ENODEV;
2252                 goto error;
2253         }
2254         DRV_LOG(INFO,
2255                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2256                 eth_dev->data->port_id,
2257                 mac.addr_bytes[0], mac.addr_bytes[1],
2258                 mac.addr_bytes[2], mac.addr_bytes[3],
2259                 mac.addr_bytes[4], mac.addr_bytes[5]);
2260 #ifndef NDEBUG
2261         {
2262                 char ifname[IF_NAMESIZE];
2263
2264                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2265                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2266                                 eth_dev->data->port_id, ifname);
2267                 else
2268                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2269                                 eth_dev->data->port_id);
2270         }
2271 #endif
2272         /* Get actual MTU if possible. */
2273         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2274         if (err) {
2275                 err = rte_errno;
2276                 goto error;
2277         }
2278         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2279                 priv->mtu);
2280         /* Initialize burst functions to prevent crashes before link-up. */
2281         eth_dev->rx_pkt_burst = removed_rx_burst;
2282         eth_dev->tx_pkt_burst = removed_tx_burst;
2283         eth_dev->dev_ops = &mlx5_dev_ops;
2284         /* Register MAC address. */
2285         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2286         if (config.vf && config.vf_nl_en)
2287                 mlx5_nl_mac_addr_sync(eth_dev);
2288         TAILQ_INIT(&priv->flows);
2289         TAILQ_INIT(&priv->ctrl_flows);
2290         /* Hint libmlx5 to use PMD allocator for data plane resources */
2291         struct mlx5dv_ctx_allocators alctr = {
2292                 .alloc = &mlx5_alloc_verbs_buf,
2293                 .free = &mlx5_free_verbs_buf,
2294                 .data = priv,
2295         };
2296         mlx5_glue->dv_set_context_attr(sh->ctx,
2297                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2298                                        (void *)((uintptr_t)&alctr));
2299         /* Bring Ethernet device up. */
2300         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2301                 eth_dev->data->port_id);
2302         mlx5_set_link_up(eth_dev);
2303         /*
2304          * Even though the interrupt handler is not installed yet,
2305          * interrupts will still trigger on the async_fd from
2306          * Verbs context returned by ibv_open_device().
2307          */
2308         mlx5_link_update(eth_dev, 0);
2309 #ifdef HAVE_MLX5DV_DR_ESWITCH
2310         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2311               (switch_info->representor || switch_info->master)))
2312                 config.dv_esw_en = 0;
2313 #else
2314         config.dv_esw_en = 0;
2315 #endif
2316         /* Detect minimal data bytes to inline. */
2317         mlx5_set_min_inline(spawn, &config);
2318         /* Store device configuration on private structure. */
2319         priv->config = config;
2320         /* Create context for virtual machine VLAN workaround. */
2321         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2322         if (config.dv_flow_en) {
2323                 err = mlx5_alloc_shared_dr(priv);
2324                 if (err)
2325                         goto error;
2326         }
2327         /* Supported Verbs flow priority number detection. */
2328         err = mlx5_flow_discover_priorities(eth_dev);
2329         if (err < 0) {
2330                 err = -err;
2331                 goto error;
2332         }
2333         priv->config.flow_prio = err;
2334         return eth_dev;
2335 error:
2336         if (priv) {
2337                 if (priv->sh)
2338                         mlx5_free_shared_dr(priv);
2339                 if (priv->nl_socket_route >= 0)
2340                         close(priv->nl_socket_route);
2341                 if (priv->nl_socket_rdma >= 0)
2342                         close(priv->nl_socket_rdma);
2343                 if (priv->vmwa_context)
2344                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2345                 if (own_domain_id)
2346                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2347                 rte_free(priv);
2348                 if (eth_dev != NULL)
2349                         eth_dev->data->dev_private = NULL;
2350         }
2351         if (eth_dev != NULL) {
2352                 /* mac_addrs must not be freed alone because part of dev_private */
2353                 eth_dev->data->mac_addrs = NULL;
2354                 rte_eth_dev_release_port(eth_dev);
2355         }
2356         if (sh)
2357                 mlx5_free_shared_ibctx(sh);
2358         assert(err > 0);
2359         rte_errno = err;
2360         return NULL;
2361 }
2362
2363 /**
2364  * Comparison callback to sort device data.
2365  *
2366  * This is meant to be used with qsort().
2367  *
2368  * @param a[in]
2369  *   Pointer to pointer to first data object.
2370  * @param b[in]
2371  *   Pointer to pointer to second data object.
2372  *
2373  * @return
2374  *   0 if both objects are equal, less than 0 if the first argument is less
2375  *   than the second, greater than 0 otherwise.
2376  */
2377 static int
2378 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2379 {
2380         const struct mlx5_switch_info *si_a =
2381                 &((const struct mlx5_dev_spawn_data *)a)->info;
2382         const struct mlx5_switch_info *si_b =
2383                 &((const struct mlx5_dev_spawn_data *)b)->info;
2384         int ret;
2385
2386         /* Master device first. */
2387         ret = si_b->master - si_a->master;
2388         if (ret)
2389                 return ret;
2390         /* Then representor devices. */
2391         ret = si_b->representor - si_a->representor;
2392         if (ret)
2393                 return ret;
2394         /* Unidentified devices come last in no specific order. */
2395         if (!si_a->representor)
2396                 return 0;
2397         /* Order representors by name. */
2398         return si_a->port_name - si_b->port_name;
2399 }
2400
2401 /**
2402  * Match PCI information for possible slaves of bonding device.
2403  *
2404  * @param[in] ibv_dev
2405  *   Pointer to Infiniband device structure.
2406  * @param[in] pci_dev
2407  *   Pointer to PCI device structure to match PCI address.
2408  * @param[in] nl_rdma
2409  *   Netlink RDMA group socket handle.
2410  *
2411  * @return
2412  *   negative value if no bonding device found, otherwise
2413  *   positive index of slave PF in bonding.
2414  */
2415 static int
2416 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2417                            const struct rte_pci_device *pci_dev,
2418                            int nl_rdma)
2419 {
2420         char ifname[IF_NAMESIZE + 1];
2421         unsigned int ifindex;
2422         unsigned int np, i;
2423         FILE *file = NULL;
2424         int pf = -1;
2425
2426         /*
2427          * Try to get master device name. If something goes
2428          * wrong suppose the lack of kernel support and no
2429          * bonding devices.
2430          */
2431         if (nl_rdma < 0)
2432                 return -1;
2433         if (!strstr(ibv_dev->name, "bond"))
2434                 return -1;
2435         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2436         if (!np)
2437                 return -1;
2438         /*
2439          * The Master device might not be on the predefined
2440          * port (not on port index 1, it is not garanted),
2441          * we have to scan all Infiniband device port and
2442          * find master.
2443          */
2444         for (i = 1; i <= np; ++i) {
2445                 /* Check whether Infiniband port is populated. */
2446                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2447                 if (!ifindex)
2448                         continue;
2449                 if (!if_indextoname(ifindex, ifname))
2450                         continue;
2451                 /* Try to read bonding slave names from sysfs. */
2452                 MKSTR(slaves,
2453                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2454                 file = fopen(slaves, "r");
2455                 if (file)
2456                         break;
2457         }
2458         if (!file)
2459                 return -1;
2460         /* Use safe format to check maximal buffer length. */
2461         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2462         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2463                 char tmp_str[IF_NAMESIZE + 32];
2464                 struct rte_pci_addr pci_addr;
2465                 struct mlx5_switch_info info;
2466
2467                 /* Process slave interface names in the loop. */
2468                 snprintf(tmp_str, sizeof(tmp_str),
2469                          "/sys/class/net/%s", ifname);
2470                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2471                         DRV_LOG(WARNING, "can not get PCI address"
2472                                          " for netdev \"%s\"", ifname);
2473                         continue;
2474                 }
2475                 if (pci_dev->addr.domain != pci_addr.domain ||
2476                     pci_dev->addr.bus != pci_addr.bus ||
2477                     pci_dev->addr.devid != pci_addr.devid ||
2478                     pci_dev->addr.function != pci_addr.function)
2479                         continue;
2480                 /* Slave interface PCI address match found. */
2481                 fclose(file);
2482                 snprintf(tmp_str, sizeof(tmp_str),
2483                          "/sys/class/net/%s/phys_port_name", ifname);
2484                 file = fopen(tmp_str, "rb");
2485                 if (!file)
2486                         break;
2487                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2488                 if (fscanf(file, "%32s", tmp_str) == 1)
2489                         mlx5_translate_port_name(tmp_str, &info);
2490                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2491                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2492                         pf = info.port_name;
2493                 break;
2494         }
2495         if (file)
2496                 fclose(file);
2497         return pf;
2498 }
2499
2500 /**
2501  * DPDK callback to register a PCI device.
2502  *
2503  * This function spawns Ethernet devices out of a given PCI device.
2504  *
2505  * @param[in] pci_drv
2506  *   PCI driver structure (mlx5_driver).
2507  * @param[in] pci_dev
2508  *   PCI device information.
2509  *
2510  * @return
2511  *   0 on success, a negative errno value otherwise and rte_errno is set.
2512  */
2513 static int
2514 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2515                struct rte_pci_device *pci_dev)
2516 {
2517         struct ibv_device **ibv_list;
2518         /*
2519          * Number of found IB Devices matching with requested PCI BDF.
2520          * nd != 1 means there are multiple IB devices over the same
2521          * PCI device and we have representors and master.
2522          */
2523         unsigned int nd = 0;
2524         /*
2525          * Number of found IB device Ports. nd = 1 and np = 1..n means
2526          * we have the single multiport IB device, and there may be
2527          * representors attached to some of found ports.
2528          */
2529         unsigned int np = 0;
2530         /*
2531          * Number of DPDK ethernet devices to Spawn - either over
2532          * multiple IB devices or multiple ports of single IB device.
2533          * Actually this is the number of iterations to spawn.
2534          */
2535         unsigned int ns = 0;
2536         /*
2537          * Bonding device
2538          *   < 0 - no bonding device (single one)
2539          *  >= 0 - bonding device (value is slave PF index)
2540          */
2541         int bd = -1;
2542         struct mlx5_dev_spawn_data *list = NULL;
2543         struct mlx5_dev_config dev_config;
2544         int ret;
2545
2546         ret = mlx5_init_once();
2547         if (ret) {
2548                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2549                         strerror(rte_errno));
2550                 return -rte_errno;
2551         }
2552         assert(pci_drv == &mlx5_driver);
2553         errno = 0;
2554         ibv_list = mlx5_glue->get_device_list(&ret);
2555         if (!ibv_list) {
2556                 rte_errno = errno ? errno : ENOSYS;
2557                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2558                 return -rte_errno;
2559         }
2560         /*
2561          * First scan the list of all Infiniband devices to find
2562          * matching ones, gathering into the list.
2563          */
2564         struct ibv_device *ibv_match[ret + 1];
2565         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2566         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2567         unsigned int i;
2568
2569         while (ret-- > 0) {
2570                 struct rte_pci_addr pci_addr;
2571
2572                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2573                 bd = mlx5_device_bond_pci_match
2574                                 (ibv_list[ret], pci_dev, nl_rdma);
2575                 if (bd >= 0) {
2576                         /*
2577                          * Bonding device detected. Only one match is allowed,
2578                          * the bonding is supported over multi-port IB device,
2579                          * there should be no matches on representor PCI
2580                          * functions or non VF LAG bonding devices with
2581                          * specified address.
2582                          */
2583                         if (nd) {
2584                                 DRV_LOG(ERR,
2585                                         "multiple PCI match on bonding device"
2586                                         "\"%s\" found", ibv_list[ret]->name);
2587                                 rte_errno = ENOENT;
2588                                 ret = -rte_errno;
2589                                 goto exit;
2590                         }
2591                         DRV_LOG(INFO, "PCI information matches for"
2592                                       " slave %d bonding device \"%s\"",
2593                                       bd, ibv_list[ret]->name);
2594                         ibv_match[nd++] = ibv_list[ret];
2595                         break;
2596                 }
2597                 if (mlx5_dev_to_pci_addr
2598                         (ibv_list[ret]->ibdev_path, &pci_addr))
2599                         continue;
2600                 if (pci_dev->addr.domain != pci_addr.domain ||
2601                     pci_dev->addr.bus != pci_addr.bus ||
2602                     pci_dev->addr.devid != pci_addr.devid ||
2603                     pci_dev->addr.function != pci_addr.function)
2604                         continue;
2605                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2606                         ibv_list[ret]->name);
2607                 ibv_match[nd++] = ibv_list[ret];
2608         }
2609         ibv_match[nd] = NULL;
2610         if (!nd) {
2611                 /* No device matches, just complain and bail out. */
2612                 DRV_LOG(WARNING,
2613                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2614                         " are kernel drivers loaded?",
2615                         pci_dev->addr.domain, pci_dev->addr.bus,
2616                         pci_dev->addr.devid, pci_dev->addr.function);
2617                 rte_errno = ENOENT;
2618                 ret = -rte_errno;
2619                 goto exit;
2620         }
2621         if (nd == 1) {
2622                 /*
2623                  * Found single matching device may have multiple ports.
2624                  * Each port may be representor, we have to check the port
2625                  * number and check the representors existence.
2626                  */
2627                 if (nl_rdma >= 0)
2628                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2629                 if (!np)
2630                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2631                                          " ports number", ibv_match[0]->name);
2632                 if (bd >= 0 && !np) {
2633                         DRV_LOG(ERR, "can not get ports"
2634                                      " for bonding device");
2635                         rte_errno = ENOENT;
2636                         ret = -rte_errno;
2637                         goto exit;
2638                 }
2639         }
2640 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2641         if (bd >= 0) {
2642                 /*
2643                  * This may happen if there is VF LAG kernel support and
2644                  * application is compiled with older rdma_core library.
2645                  */
2646                 DRV_LOG(ERR,
2647                         "No kernel/verbs support for VF LAG bonding found.");
2648                 rte_errno = ENOTSUP;
2649                 ret = -rte_errno;
2650                 goto exit;
2651         }
2652 #endif
2653         /*
2654          * Now we can determine the maximal
2655          * amount of devices to be spawned.
2656          */
2657         list = rte_zmalloc("device spawn data",
2658                          sizeof(struct mlx5_dev_spawn_data) *
2659                          (np ? np : nd),
2660                          RTE_CACHE_LINE_SIZE);
2661         if (!list) {
2662                 DRV_LOG(ERR, "spawn data array allocation failure");
2663                 rte_errno = ENOMEM;
2664                 ret = -rte_errno;
2665                 goto exit;
2666         }
2667         if (bd >= 0 || np > 1) {
2668                 /*
2669                  * Single IB device with multiple ports found,
2670                  * it may be E-Switch master device and representors.
2671                  * We have to perform identification trough the ports.
2672                  */
2673                 assert(nl_rdma >= 0);
2674                 assert(ns == 0);
2675                 assert(nd == 1);
2676                 assert(np);
2677                 for (i = 1; i <= np; ++i) {
2678                         list[ns].max_port = np;
2679                         list[ns].ibv_port = i;
2680                         list[ns].ibv_dev = ibv_match[0];
2681                         list[ns].eth_dev = NULL;
2682                         list[ns].pci_dev = pci_dev;
2683                         list[ns].pf_bond = bd;
2684                         list[ns].ifindex = mlx5_nl_ifindex
2685                                         (nl_rdma, list[ns].ibv_dev->name, i);
2686                         if (!list[ns].ifindex) {
2687                                 /*
2688                                  * No network interface index found for the
2689                                  * specified port, it means there is no
2690                                  * representor on this port. It's OK,
2691                                  * there can be disabled ports, for example
2692                                  * if sriov_numvfs < sriov_totalvfs.
2693                                  */
2694                                 continue;
2695                         }
2696                         ret = -1;
2697                         if (nl_route >= 0)
2698                                 ret = mlx5_nl_switch_info
2699                                                (nl_route,
2700                                                 list[ns].ifindex,
2701                                                 &list[ns].info);
2702                         if (ret || (!list[ns].info.representor &&
2703                                     !list[ns].info.master)) {
2704                                 /*
2705                                  * We failed to recognize representors with
2706                                  * Netlink, let's try to perform the task
2707                                  * with sysfs.
2708                                  */
2709                                 ret =  mlx5_sysfs_switch_info
2710                                                 (list[ns].ifindex,
2711                                                  &list[ns].info);
2712                         }
2713                         if (!ret && bd >= 0) {
2714                                 switch (list[ns].info.name_type) {
2715                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2716                                         if (list[ns].info.port_name == bd)
2717                                                 ns++;
2718                                         break;
2719                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2720                                         if (list[ns].info.pf_num == bd)
2721                                                 ns++;
2722                                         break;
2723                                 default:
2724                                         break;
2725                                 }
2726                                 continue;
2727                         }
2728                         if (!ret && (list[ns].info.representor ^
2729                                      list[ns].info.master))
2730                                 ns++;
2731                 }
2732                 if (!ns) {
2733                         DRV_LOG(ERR,
2734                                 "unable to recognize master/representors"
2735                                 " on the IB device with multiple ports");
2736                         rte_errno = ENOENT;
2737                         ret = -rte_errno;
2738                         goto exit;
2739                 }
2740         } else {
2741                 /*
2742                  * The existence of several matching entries (nd > 1) means
2743                  * port representors have been instantiated. No existing Verbs
2744                  * call nor sysfs entries can tell them apart, this can only
2745                  * be done through Netlink calls assuming kernel drivers are
2746                  * recent enough to support them.
2747                  *
2748                  * In the event of identification failure through Netlink,
2749                  * try again through sysfs, then:
2750                  *
2751                  * 1. A single IB device matches (nd == 1) with single
2752                  *    port (np=0/1) and is not a representor, assume
2753                  *    no switch support.
2754                  *
2755                  * 2. Otherwise no safe assumptions can be made;
2756                  *    complain louder and bail out.
2757                  */
2758                 np = 1;
2759                 for (i = 0; i != nd; ++i) {
2760                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2761                         list[ns].max_port = 1;
2762                         list[ns].ibv_port = 1;
2763                         list[ns].ibv_dev = ibv_match[i];
2764                         list[ns].eth_dev = NULL;
2765                         list[ns].pci_dev = pci_dev;
2766                         list[ns].pf_bond = -1;
2767                         list[ns].ifindex = 0;
2768                         if (nl_rdma >= 0)
2769                                 list[ns].ifindex = mlx5_nl_ifindex
2770                                         (nl_rdma, list[ns].ibv_dev->name, 1);
2771                         if (!list[ns].ifindex) {
2772                                 char ifname[IF_NAMESIZE];
2773
2774                                 /*
2775                                  * Netlink failed, it may happen with old
2776                                  * ib_core kernel driver (before 4.16).
2777                                  * We can assume there is old driver because
2778                                  * here we are processing single ports IB
2779                                  * devices. Let's try sysfs to retrieve
2780                                  * the ifindex. The method works for
2781                                  * master device only.
2782                                  */
2783                                 if (nd > 1) {
2784                                         /*
2785                                          * Multiple devices found, assume
2786                                          * representors, can not distinguish
2787                                          * master/representor and retrieve
2788                                          * ifindex via sysfs.
2789                                          */
2790                                         continue;
2791                                 }
2792                                 ret = mlx5_get_master_ifname
2793                                         (ibv_match[i]->ibdev_path, &ifname);
2794                                 if (!ret)
2795                                         list[ns].ifindex =
2796                                                 if_nametoindex(ifname);
2797                                 if (!list[ns].ifindex) {
2798                                         /*
2799                                          * No network interface index found
2800                                          * for the specified device, it means
2801                                          * there it is neither representor
2802                                          * nor master.
2803                                          */
2804                                         continue;
2805                                 }
2806                         }
2807                         ret = -1;
2808                         if (nl_route >= 0)
2809                                 ret = mlx5_nl_switch_info
2810                                                (nl_route,
2811                                                 list[ns].ifindex,
2812                                                 &list[ns].info);
2813                         if (ret || (!list[ns].info.representor &&
2814                                     !list[ns].info.master)) {
2815                                 /*
2816                                  * We failed to recognize representors with
2817                                  * Netlink, let's try to perform the task
2818                                  * with sysfs.
2819                                  */
2820                                 ret =  mlx5_sysfs_switch_info
2821                                                 (list[ns].ifindex,
2822                                                  &list[ns].info);
2823                         }
2824                         if (!ret && (list[ns].info.representor ^
2825                                      list[ns].info.master)) {
2826                                 ns++;
2827                         } else if ((nd == 1) &&
2828                                    !list[ns].info.representor &&
2829                                    !list[ns].info.master) {
2830                                 /*
2831                                  * Single IB device with
2832                                  * one physical port and
2833                                  * attached network device.
2834                                  * May be SRIOV is not enabled
2835                                  * or there is no representors.
2836                                  */
2837                                 DRV_LOG(INFO, "no E-Switch support detected");
2838                                 ns++;
2839                                 break;
2840                         }
2841                 }
2842                 if (!ns) {
2843                         DRV_LOG(ERR,
2844                                 "unable to recognize master/representors"
2845                                 " on the multiple IB devices");
2846                         rte_errno = ENOENT;
2847                         ret = -rte_errno;
2848                         goto exit;
2849                 }
2850         }
2851         assert(ns);
2852         /*
2853          * Sort list to probe devices in natural order for users convenience
2854          * (i.e. master first, then representors from lowest to highest ID).
2855          */
2856         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2857         /* Default configuration. */
2858         dev_config = (struct mlx5_dev_config){
2859                 .hw_padding = 0,
2860                 .mps = MLX5_ARG_UNSET,
2861                 .rx_vec_en = 1,
2862                 .txq_inline_max = MLX5_ARG_UNSET,
2863                 .txq_inline_min = MLX5_ARG_UNSET,
2864                 .txq_inline_mpw = MLX5_ARG_UNSET,
2865                 .txqs_inline = MLX5_ARG_UNSET,
2866                 .vf_nl_en = 1,
2867                 .mr_ext_memseg_en = 1,
2868                 .mprq = {
2869                         .enabled = 0, /* Disabled by default. */
2870                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2871                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2872                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2873                 },
2874                 .dv_esw_en = 1,
2875         };
2876         /* Device specific configuration. */
2877         switch (pci_dev->id.device_id) {
2878         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2879         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2880         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2881         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2882         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2883         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2884                 dev_config.vf = 1;
2885                 break;
2886         default:
2887                 break;
2888         }
2889         for (i = 0; i != ns; ++i) {
2890                 uint32_t restore;
2891
2892                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2893                                                  &list[i],
2894                                                  dev_config);
2895                 if (!list[i].eth_dev) {
2896                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2897                                 break;
2898                         /* Device is disabled or already spawned. Ignore it. */
2899                         continue;
2900                 }
2901                 restore = list[i].eth_dev->data->dev_flags;
2902                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2903                 /* Restore non-PCI flags cleared by the above call. */
2904                 list[i].eth_dev->data->dev_flags |= restore;
2905                 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
2906                 rte_eth_dev_probing_finish(list[i].eth_dev);
2907         }
2908         if (i != ns) {
2909                 DRV_LOG(ERR,
2910                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2911                         " encountering an error: %s",
2912                         pci_dev->addr.domain, pci_dev->addr.bus,
2913                         pci_dev->addr.devid, pci_dev->addr.function,
2914                         strerror(rte_errno));
2915                 ret = -rte_errno;
2916                 /* Roll back. */
2917                 while (i--) {
2918                         if (!list[i].eth_dev)
2919                                 continue;
2920                         mlx5_dev_close(list[i].eth_dev);
2921                         /* mac_addrs must not be freed because in dev_private */
2922                         list[i].eth_dev->data->mac_addrs = NULL;
2923                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2924                 }
2925                 /* Restore original error. */
2926                 rte_errno = -ret;
2927         } else {
2928                 ret = 0;
2929         }
2930 exit:
2931         /*
2932          * Do the routine cleanup:
2933          * - close opened Netlink sockets
2934          * - free allocated spawn data array
2935          * - free the Infiniband device list
2936          */
2937         if (nl_rdma >= 0)
2938                 close(nl_rdma);
2939         if (nl_route >= 0)
2940                 close(nl_route);
2941         if (list)
2942                 rte_free(list);
2943         assert(ibv_list);
2944         mlx5_glue->free_device_list(ibv_list);
2945         return ret;
2946 }
2947
2948 /**
2949  * Look for the ethernet device belonging to mlx5 driver.
2950  *
2951  * @param[in] port_id
2952  *   port_id to start looking for device.
2953  * @param[in] pci_dev
2954  *   Pointer to the hint PCI device. When device is being probed
2955  *   the its siblings (master and preceding representors might
2956  *   not have assigned driver yet (because the mlx5_pci_probe()
2957  *   is not completed yet, for this case match on hint PCI
2958  *   device may be used to detect sibling device.
2959  *
2960  * @return
2961  *   port_id of found device, RTE_MAX_ETHPORT if not found.
2962  */
2963 uint16_t
2964 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
2965 {
2966         while (port_id < RTE_MAX_ETHPORTS) {
2967                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2968
2969                 if (dev->state != RTE_ETH_DEV_UNUSED &&
2970                     dev->device &&
2971                     (dev->device == &pci_dev->device ||
2972                      (dev->device->driver &&
2973                      dev->device->driver->name &&
2974                      !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
2975                         break;
2976                 port_id++;
2977         }
2978         if (port_id >= RTE_MAX_ETHPORTS)
2979                 return RTE_MAX_ETHPORTS;
2980         return port_id;
2981 }
2982
2983 /**
2984  * DPDK callback to remove a PCI device.
2985  *
2986  * This function removes all Ethernet devices belong to a given PCI device.
2987  *
2988  * @param[in] pci_dev
2989  *   Pointer to the PCI device.
2990  *
2991  * @return
2992  *   0 on success, the function cannot fail.
2993  */
2994 static int
2995 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2996 {
2997         uint16_t port_id;
2998
2999         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3000                 rte_eth_dev_close(port_id);
3001         return 0;
3002 }
3003
3004 static const struct rte_pci_id mlx5_pci_id_map[] = {
3005         {
3006                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3007                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3008         },
3009         {
3010                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3011                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3012         },
3013         {
3014                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3015                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3016         },
3017         {
3018                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3019                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3020         },
3021         {
3022                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3023                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3024         },
3025         {
3026                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3027                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3028         },
3029         {
3030                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3031                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3032         },
3033         {
3034                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3035                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3036         },
3037         {
3038                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3039                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3040         },
3041         {
3042                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3043                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3044         },
3045         {
3046                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3047                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3048         },
3049         {
3050                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3051                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3052         },
3053         {
3054                 .vendor_id = 0
3055         }
3056 };
3057
3058 static struct rte_pci_driver mlx5_driver = {
3059         .driver = {
3060                 .name = MLX5_DRIVER_NAME
3061         },
3062         .id_table = mlx5_pci_id_map,
3063         .probe = mlx5_pci_probe,
3064         .remove = mlx5_pci_remove,
3065         .dma_map = mlx5_dma_map,
3066         .dma_unmap = mlx5_dma_unmap,
3067         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3068                      RTE_PCI_DRV_PROBE_AGAIN,
3069 };
3070
3071 #ifdef RTE_IBVERBS_LINK_DLOPEN
3072
3073 /**
3074  * Suffix RTE_EAL_PMD_PATH with "-glue".
3075  *
3076  * This function performs a sanity check on RTE_EAL_PMD_PATH before
3077  * suffixing its last component.
3078  *
3079  * @param buf[out]
3080  *   Output buffer, should be large enough otherwise NULL is returned.
3081  * @param size
3082  *   Size of @p out.
3083  *
3084  * @return
3085  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
3086  */
3087 static char *
3088 mlx5_glue_path(char *buf, size_t size)
3089 {
3090         static const char *const bad[] = { "/", ".", "..", NULL };
3091         const char *path = RTE_EAL_PMD_PATH;
3092         size_t len = strlen(path);
3093         size_t off;
3094         int i;
3095
3096         while (len && path[len - 1] == '/')
3097                 --len;
3098         for (off = len; off && path[off - 1] != '/'; --off)
3099                 ;
3100         for (i = 0; bad[i]; ++i)
3101                 if (!strncmp(path + off, bad[i], (int)(len - off)))
3102                         goto error;
3103         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3104         if (i == -1 || (size_t)i >= size)
3105                 goto error;
3106         return buf;
3107 error:
3108         DRV_LOG(ERR,
3109                 "unable to append \"-glue\" to last component of"
3110                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3111                 " please re-configure DPDK");
3112         return NULL;
3113 }
3114
3115 /**
3116  * Initialization routine for run-time dependency on rdma-core.
3117  */
3118 static int
3119 mlx5_glue_init(void)
3120 {
3121         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3122         const char *path[] = {
3123                 /*
3124                  * A basic security check is necessary before trusting
3125                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3126                  */
3127                 (geteuid() == getuid() && getegid() == getgid() ?
3128                  getenv("MLX5_GLUE_PATH") : NULL),
3129                 /*
3130                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3131                  * variant, otherwise let dlopen() look up libraries on its
3132                  * own.
3133                  */
3134                 (*RTE_EAL_PMD_PATH ?
3135                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3136         };
3137         unsigned int i = 0;
3138         void *handle = NULL;
3139         void **sym;
3140         const char *dlmsg;
3141
3142         while (!handle && i != RTE_DIM(path)) {
3143                 const char *end;
3144                 size_t len;
3145                 int ret;
3146
3147                 if (!path[i]) {
3148                         ++i;
3149                         continue;
3150                 }
3151                 end = strpbrk(path[i], ":;");
3152                 if (!end)
3153                         end = path[i] + strlen(path[i]);
3154                 len = end - path[i];
3155                 ret = 0;
3156                 do {
3157                         char name[ret + 1];
3158
3159                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3160                                        (int)len, path[i],
3161                                        (!len || *(end - 1) == '/') ? "" : "/");
3162                         if (ret == -1)
3163                                 break;
3164                         if (sizeof(name) != (size_t)ret + 1)
3165                                 continue;
3166                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3167                                 name);
3168                         handle = dlopen(name, RTLD_LAZY);
3169                         break;
3170                 } while (1);
3171                 path[i] = end + 1;
3172                 if (!*end)
3173                         ++i;
3174         }
3175         if (!handle) {
3176                 rte_errno = EINVAL;
3177                 dlmsg = dlerror();
3178                 if (dlmsg)
3179                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3180                 goto glue_error;
3181         }
3182         sym = dlsym(handle, "mlx5_glue");
3183         if (!sym || !*sym) {
3184                 rte_errno = EINVAL;
3185                 dlmsg = dlerror();
3186                 if (dlmsg)
3187                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3188                 goto glue_error;
3189         }
3190         mlx5_glue = *sym;
3191         return 0;
3192 glue_error:
3193         if (handle)
3194                 dlclose(handle);
3195         DRV_LOG(WARNING,
3196                 "cannot initialize PMD due to missing run-time dependency on"
3197                 " rdma-core libraries (libibverbs, libmlx5)");
3198         return -rte_errno;
3199 }
3200
3201 #endif
3202
3203 /**
3204  * Driver initialization routine.
3205  */
3206 RTE_INIT(rte_mlx5_pmd_init)
3207 {
3208         /* Initialize driver log type. */
3209         mlx5_logtype = rte_log_register("pmd.net.mlx5");
3210         if (mlx5_logtype >= 0)
3211                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3212
3213         /* Build the static tables for Verbs conversion. */
3214         mlx5_set_ptype_table();
3215         mlx5_set_cksum_table();
3216         mlx5_set_swp_types_table();
3217         /*
3218          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3219          * huge pages. Calling ibv_fork_init() during init allows
3220          * applications to use fork() safely for purposes other than
3221          * using this PMD, which is not supported in forked processes.
3222          */
3223         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3224         /* Match the size of Rx completion entry to the size of a cacheline. */
3225         if (RTE_CACHE_LINE_SIZE == 128)
3226                 setenv("MLX5_CQE_SIZE", "128", 0);
3227         /*
3228          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3229          * cleanup all the Verbs resources even when the device was removed.
3230          */
3231         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3232 #ifdef RTE_IBVERBS_LINK_DLOPEN
3233         if (mlx5_glue_init())
3234                 return;
3235         assert(mlx5_glue);
3236 #endif
3237 #ifndef NDEBUG
3238         /* Glue structure must not contain any NULL pointers. */
3239         {
3240                 unsigned int i;
3241
3242                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3243                         assert(((const void *const *)mlx5_glue)[i]);
3244         }
3245 #endif
3246         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3247                 DRV_LOG(ERR,
3248                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3249                         mlx5_glue->version, MLX5_GLUE_VERSION);
3250                 return;
3251         }
3252         mlx5_glue->fork_init();
3253         rte_pci_register(&mlx5_driver);
3254 }
3255
3256 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3257 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3258 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");