1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. */
72 #define MLX5_TXQ_INLINE "txq_inline"
75 * Device parameter to configure the number of TX queues threshold for
76 * enabling inline send.
78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
81 * Device parameter to configure the number of TX queues threshold for
82 * enabling vectorized Tx.
84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
86 /* Device parameter to enable multi-packet send WQEs. */
87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
89 /* Device parameter to include 2 dsegs in the title WQEBB. */
90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
92 /* Device parameter to limit the size of inlining packet. */
93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
95 /* Device parameter to enable hardware Tx vector. */
96 #define MLX5_TX_VEC_EN "tx_vec_en"
98 /* Device parameter to enable hardware Rx vector. */
99 #define MLX5_RX_VEC_EN "rx_vec_en"
101 /* Allow L3 VXLAN flow creation. */
102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
104 /* Activate DV E-Switch flow steering. */
105 #define MLX5_DV_ESW_EN "dv_esw_en"
107 /* Activate DV flow steering. */
108 #define MLX5_DV_FLOW_EN "dv_flow_en"
110 /* Activate Netlink support in VF mode. */
111 #define MLX5_VF_NL_EN "vf_nl_en"
113 /* Enable extending memsegs when creating a MR. */
114 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
116 /* Select port representors to instantiate. */
117 #define MLX5_REPRESENTOR "representor"
119 #ifndef HAVE_IBV_MLX5_MOD_MPW
120 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
121 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
124 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
125 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
128 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
130 /* Shared memory between primary and secondary processes. */
131 struct mlx5_shared_data *mlx5_shared_data;
133 /* Spinlock for mlx5_shared_data allocation. */
134 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
136 /* Process local data for secondary processes. */
137 static struct mlx5_local_data mlx5_local_data;
139 /** Driver-specific log messages type. */
142 /** Data associated with devices to spawn. */
143 struct mlx5_dev_spawn_data {
144 uint32_t ifindex; /**< Network interface index. */
145 uint32_t max_port; /**< IB device maximal port index. */
146 uint32_t ibv_port; /**< IB device physical port index. */
147 struct mlx5_switch_info info; /**< Switch information. */
148 struct ibv_device *ibv_dev; /**< Associated IB device. */
149 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
152 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
153 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
156 * Allocate shared IB device context. If there is multiport device the
157 * master and representors will share this context, if there is single
158 * port dedicated IB device, the context will be used by only given
159 * port due to unification.
161 * Routine first searches the context for the specified IB device name,
162 * if found the shared context assumed and reference counter is incremented.
163 * If no context found the new one is created and initialized with specified
164 * IB device context and parameters.
167 * Pointer to the IB device attributes (name, port, etc).
170 * Pointer to mlx5_ibv_shared object on success,
171 * otherwise NULL and rte_errno is set.
173 static struct mlx5_ibv_shared *
174 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
176 struct mlx5_ibv_shared *sh;
181 /* Secondary process should not create the shared context. */
182 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
183 pthread_mutex_lock(&mlx5_ibv_list_mutex);
184 /* Search for IB context by device name. */
185 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
186 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
191 /* No device found, we have to create new shared context. */
192 assert(spawn->max_port);
193 sh = rte_zmalloc("ethdev shared ib context",
194 sizeof(struct mlx5_ibv_shared) +
196 sizeof(struct mlx5_ibv_shared_port),
197 RTE_CACHE_LINE_SIZE);
199 DRV_LOG(ERR, "shared context allocation failure");
203 /* Try to open IB device with DV first, then usual Verbs. */
205 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
208 DRV_LOG(DEBUG, "DevX is supported");
210 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
212 err = errno ? errno : ENODEV;
215 DRV_LOG(DEBUG, "DevX is NOT supported");
217 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
219 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
223 sh->max_port = spawn->max_port;
224 strncpy(sh->ibdev_name, sh->ctx->device->name,
225 sizeof(sh->ibdev_name));
226 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
227 sizeof(sh->ibdev_path));
228 pthread_mutex_init(&sh->intr_mutex, NULL);
230 * Setting port_id to max unallowed value means
231 * there is no interrupt subhandler installed for
232 * the given port index i.
234 for (i = 0; i < sh->max_port; i++)
235 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
236 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
237 if (sh->pd == NULL) {
238 DRV_LOG(ERR, "PD allocation failure");
242 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
244 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
247 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
250 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
252 claim_zero(mlx5_glue->close_device(sh->ctx));
260 * Free shared IB device context. Decrement counter and if zero free
261 * all allocated resources and close handles.
264 * Pointer to mlx5_ibv_shared object to free
267 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
269 pthread_mutex_lock(&mlx5_ibv_list_mutex);
271 /* Check the object presence in the list. */
272 struct mlx5_ibv_shared *lctx;
274 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
279 DRV_LOG(ERR, "Freeing non-existing shared IB context");
285 /* Secondary process should not free the shared context. */
286 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
289 LIST_REMOVE(sh, next);
291 * Ensure there is no async event handler installed.
292 * Only primary process handles async device events.
294 assert(!sh->intr_cnt);
296 rte_intr_callback_unregister
297 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
298 pthread_mutex_destroy(&sh->intr_mutex);
300 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
302 claim_zero(mlx5_glue->close_device(sh->ctx));
305 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
309 * Initialize DR related data within private structure.
310 * Routine checks the reference counter and does actual
311 * resources creation/initialization only if counter is zero.
314 * Pointer to the private device data structure.
317 * Zero on success, positive error code otherwise.
320 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
322 #ifdef HAVE_MLX5DV_DR
323 struct mlx5_ibv_shared *sh = priv->sh;
329 /* Shared DV/DR structures is already initialized. */
334 /* Reference counter is zero, we should initialize structures. */
335 ns = mlx5_glue->dr_create_ns(sh->ctx,
336 MLX5DV_DR_NS_DOMAIN_INGRESS_BYPASS);
338 DRV_LOG(ERR, "ingress mlx5dv_dr_create_ns failed");
343 ns = mlx5_glue->dr_create_ns(sh->ctx,
344 MLX5DV_DR_NS_DOMAIN_EGRESS_BYPASS);
346 DRV_LOG(ERR, "egress mlx5dv_dr_create_ns failed");
350 pthread_mutex_init(&sh->dv_mutex, NULL);
352 #ifdef HAVE_MLX5DV_DR_ESWITCH
353 if (priv->config.dv_esw_en) {
354 ns = mlx5_glue->dr_create_ns(sh->ctx,
355 MLX5DV_DR_NS_DOMAIN_FDB_BYPASS);
357 DRV_LOG(ERR, "FDB mlx5dv_dr_create_ns failed");
362 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
370 /* Rollback the created objects. */
372 mlx5_glue->dr_destroy_ns(sh->rx_ns);
376 mlx5_glue->dr_destroy_ns(sh->tx_ns);
380 mlx5_glue->dr_destroy_ns(sh->fdb_ns);
383 if (sh->esw_drop_action) {
384 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
385 sh->esw_drop_action = NULL;
395 * Destroy DR related data within private structure.
398 * Pointer to the private device data structure.
401 mlx5_free_shared_dr(struct mlx5_priv *priv)
403 #ifdef HAVE_MLX5DV_DR
404 struct mlx5_ibv_shared *sh;
406 if (!priv->dr_shared)
411 assert(sh->dv_refcnt);
412 if (sh->dv_refcnt && --sh->dv_refcnt)
415 mlx5_glue->dr_destroy_ns(sh->rx_ns);
419 mlx5_glue->dr_destroy_ns(sh->tx_ns);
422 #ifdef HAVE_MLX5DV_DR_ESWITCH
424 mlx5_glue->dr_destroy_ns(sh->fdb_ns);
427 if (sh->esw_drop_action) {
428 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
429 sh->esw_drop_action = NULL;
432 pthread_mutex_destroy(&sh->dv_mutex);
439 * Initialize shared data between primary and secondary process.
441 * A memzone is reserved by primary process and secondary processes attach to
445 * 0 on success, a negative errno value otherwise and rte_errno is set.
448 mlx5_init_shared_data(void)
450 const struct rte_memzone *mz;
453 rte_spinlock_lock(&mlx5_shared_data_lock);
454 if (mlx5_shared_data == NULL) {
455 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
456 /* Allocate shared memory. */
457 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
458 sizeof(*mlx5_shared_data),
462 "Cannot allocate mlx5 shared data\n");
466 mlx5_shared_data = mz->addr;
467 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
468 rte_spinlock_init(&mlx5_shared_data->lock);
470 /* Lookup allocated shared memory. */
471 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
474 "Cannot attach mlx5 shared data\n");
478 mlx5_shared_data = mz->addr;
479 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
483 rte_spinlock_unlock(&mlx5_shared_data_lock);
488 * Retrieve integer value from environment variable.
491 * Environment variable name.
494 * Integer value, 0 if the variable is not set.
497 mlx5_getenv_int(const char *name)
499 const char *val = getenv(name);
507 * Verbs callback to allocate a memory. This function should allocate the space
508 * according to the size provided residing inside a huge page.
509 * Please note that all allocation must respect the alignment from libmlx5
510 * (i.e. currently sysconf(_SC_PAGESIZE)).
513 * The size in bytes of the memory to allocate.
515 * A pointer to the callback data.
518 * Allocated buffer, NULL otherwise and rte_errno is set.
521 mlx5_alloc_verbs_buf(size_t size, void *data)
523 struct mlx5_priv *priv = data;
525 size_t alignment = sysconf(_SC_PAGESIZE);
526 unsigned int socket = SOCKET_ID_ANY;
528 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
529 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
531 socket = ctrl->socket;
532 } else if (priv->verbs_alloc_ctx.type ==
533 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
534 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
536 socket = ctrl->socket;
538 assert(data != NULL);
539 ret = rte_malloc_socket(__func__, size, alignment, socket);
546 * Verbs callback to free a memory.
549 * A pointer to the memory to free.
551 * A pointer to the callback data.
554 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
556 assert(data != NULL);
561 * Initialize process private data structure.
564 * Pointer to Ethernet device structure.
567 * 0 on success, a negative errno value otherwise and rte_errno is set.
570 mlx5_proc_priv_init(struct rte_eth_dev *dev)
572 struct mlx5_priv *priv = dev->data->dev_private;
573 struct mlx5_proc_priv *ppriv;
577 * UAR register table follows the process private structure. BlueFlame
578 * registers for Tx queues are stored in the table.
581 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
582 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
583 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
588 ppriv->uar_table_sz = ppriv_size;
589 dev->process_private = ppriv;
594 * Un-initialize process private data structure.
597 * Pointer to Ethernet device structure.
600 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
602 if (!dev->process_private)
604 rte_free(dev->process_private);
605 dev->process_private = NULL;
609 * DPDK callback to close the device.
611 * Destroy all queues and objects, free memory.
614 * Pointer to Ethernet device structure.
617 mlx5_dev_close(struct rte_eth_dev *dev)
619 struct mlx5_priv *priv = dev->data->dev_private;
623 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
625 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
626 /* In case mlx5_dev_stop() has not been called. */
627 mlx5_dev_interrupt_handler_uninstall(dev);
628 mlx5_traffic_disable(dev);
629 mlx5_flow_flush(dev, NULL);
630 /* Prevent crashes when queues are still in use. */
631 dev->rx_pkt_burst = removed_rx_burst;
632 dev->tx_pkt_burst = removed_tx_burst;
634 /* Disable datapath on secondary process. */
635 mlx5_mp_req_stop_rxtx(dev);
636 if (priv->rxqs != NULL) {
637 /* XXX race condition if mlx5_rx_burst() is still running. */
639 for (i = 0; (i != priv->rxqs_n); ++i)
640 mlx5_rxq_release(dev, i);
644 if (priv->txqs != NULL) {
645 /* XXX race condition if mlx5_tx_burst() is still running. */
647 for (i = 0; (i != priv->txqs_n); ++i)
648 mlx5_txq_release(dev, i);
652 mlx5_proc_priv_uninit(dev);
653 mlx5_mprq_free_mp(dev);
654 mlx5_mr_release(dev);
656 mlx5_free_shared_dr(priv);
657 if (priv->rss_conf.rss_key != NULL)
658 rte_free(priv->rss_conf.rss_key);
659 if (priv->reta_idx != NULL)
660 rte_free(priv->reta_idx);
662 mlx5_nl_mac_addr_flush(dev);
663 if (priv->nl_socket_route >= 0)
664 close(priv->nl_socket_route);
665 if (priv->nl_socket_rdma >= 0)
666 close(priv->nl_socket_rdma);
667 if (priv->tcf_context)
668 mlx5_flow_tcf_context_destroy(priv->tcf_context);
671 * Free the shared context in last turn, because the cleanup
672 * routines above may use some shared fields, like
673 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
674 * ifindex if Netlink fails.
676 mlx5_free_shared_ibctx(priv->sh);
679 ret = mlx5_hrxq_ibv_verify(dev);
681 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
683 ret = mlx5_ind_table_ibv_verify(dev);
685 DRV_LOG(WARNING, "port %u some indirection table still remain",
687 ret = mlx5_rxq_ibv_verify(dev);
689 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
691 ret = mlx5_rxq_verify(dev);
693 DRV_LOG(WARNING, "port %u some Rx queues still remain",
695 ret = mlx5_txq_ibv_verify(dev);
697 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
699 ret = mlx5_txq_verify(dev);
701 DRV_LOG(WARNING, "port %u some Tx queues still remain",
703 ret = mlx5_flow_verify(dev);
705 DRV_LOG(WARNING, "port %u some flows still remain",
707 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
711 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
712 struct mlx5_priv *opriv =
713 rte_eth_devices[port_id].data->dev_private;
716 opriv->domain_id != priv->domain_id ||
717 &rte_eth_devices[port_id] == dev)
722 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
724 memset(priv, 0, sizeof(*priv));
725 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
727 * Reset mac_addrs to NULL such that it is not freed as part of
728 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
729 * it is freed when dev_private is freed.
731 dev->data->mac_addrs = NULL;
734 const struct eth_dev_ops mlx5_dev_ops = {
735 .dev_configure = mlx5_dev_configure,
736 .dev_start = mlx5_dev_start,
737 .dev_stop = mlx5_dev_stop,
738 .dev_set_link_down = mlx5_set_link_down,
739 .dev_set_link_up = mlx5_set_link_up,
740 .dev_close = mlx5_dev_close,
741 .promiscuous_enable = mlx5_promiscuous_enable,
742 .promiscuous_disable = mlx5_promiscuous_disable,
743 .allmulticast_enable = mlx5_allmulticast_enable,
744 .allmulticast_disable = mlx5_allmulticast_disable,
745 .link_update = mlx5_link_update,
746 .stats_get = mlx5_stats_get,
747 .stats_reset = mlx5_stats_reset,
748 .xstats_get = mlx5_xstats_get,
749 .xstats_reset = mlx5_xstats_reset,
750 .xstats_get_names = mlx5_xstats_get_names,
751 .fw_version_get = mlx5_fw_version_get,
752 .dev_infos_get = mlx5_dev_infos_get,
753 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
754 .vlan_filter_set = mlx5_vlan_filter_set,
755 .rx_queue_setup = mlx5_rx_queue_setup,
756 .tx_queue_setup = mlx5_tx_queue_setup,
757 .rx_queue_release = mlx5_rx_queue_release,
758 .tx_queue_release = mlx5_tx_queue_release,
759 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
760 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
761 .mac_addr_remove = mlx5_mac_addr_remove,
762 .mac_addr_add = mlx5_mac_addr_add,
763 .mac_addr_set = mlx5_mac_addr_set,
764 .set_mc_addr_list = mlx5_set_mc_addr_list,
765 .mtu_set = mlx5_dev_set_mtu,
766 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
767 .vlan_offload_set = mlx5_vlan_offload_set,
768 .reta_update = mlx5_dev_rss_reta_update,
769 .reta_query = mlx5_dev_rss_reta_query,
770 .rss_hash_update = mlx5_rss_hash_update,
771 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
772 .filter_ctrl = mlx5_dev_filter_ctrl,
773 .rx_descriptor_status = mlx5_rx_descriptor_status,
774 .tx_descriptor_status = mlx5_tx_descriptor_status,
775 .rx_queue_count = mlx5_rx_queue_count,
776 .rx_queue_intr_enable = mlx5_rx_intr_enable,
777 .rx_queue_intr_disable = mlx5_rx_intr_disable,
778 .is_removed = mlx5_is_removed,
781 /* Available operations from secondary process. */
782 static const struct eth_dev_ops mlx5_dev_sec_ops = {
783 .stats_get = mlx5_stats_get,
784 .stats_reset = mlx5_stats_reset,
785 .xstats_get = mlx5_xstats_get,
786 .xstats_reset = mlx5_xstats_reset,
787 .xstats_get_names = mlx5_xstats_get_names,
788 .fw_version_get = mlx5_fw_version_get,
789 .dev_infos_get = mlx5_dev_infos_get,
790 .rx_descriptor_status = mlx5_rx_descriptor_status,
791 .tx_descriptor_status = mlx5_tx_descriptor_status,
794 /* Available operations in flow isolated mode. */
795 const struct eth_dev_ops mlx5_dev_ops_isolate = {
796 .dev_configure = mlx5_dev_configure,
797 .dev_start = mlx5_dev_start,
798 .dev_stop = mlx5_dev_stop,
799 .dev_set_link_down = mlx5_set_link_down,
800 .dev_set_link_up = mlx5_set_link_up,
801 .dev_close = mlx5_dev_close,
802 .promiscuous_enable = mlx5_promiscuous_enable,
803 .promiscuous_disable = mlx5_promiscuous_disable,
804 .allmulticast_enable = mlx5_allmulticast_enable,
805 .allmulticast_disable = mlx5_allmulticast_disable,
806 .link_update = mlx5_link_update,
807 .stats_get = mlx5_stats_get,
808 .stats_reset = mlx5_stats_reset,
809 .xstats_get = mlx5_xstats_get,
810 .xstats_reset = mlx5_xstats_reset,
811 .xstats_get_names = mlx5_xstats_get_names,
812 .fw_version_get = mlx5_fw_version_get,
813 .dev_infos_get = mlx5_dev_infos_get,
814 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
815 .vlan_filter_set = mlx5_vlan_filter_set,
816 .rx_queue_setup = mlx5_rx_queue_setup,
817 .tx_queue_setup = mlx5_tx_queue_setup,
818 .rx_queue_release = mlx5_rx_queue_release,
819 .tx_queue_release = mlx5_tx_queue_release,
820 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
821 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
822 .mac_addr_remove = mlx5_mac_addr_remove,
823 .mac_addr_add = mlx5_mac_addr_add,
824 .mac_addr_set = mlx5_mac_addr_set,
825 .set_mc_addr_list = mlx5_set_mc_addr_list,
826 .mtu_set = mlx5_dev_set_mtu,
827 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
828 .vlan_offload_set = mlx5_vlan_offload_set,
829 .filter_ctrl = mlx5_dev_filter_ctrl,
830 .rx_descriptor_status = mlx5_rx_descriptor_status,
831 .tx_descriptor_status = mlx5_tx_descriptor_status,
832 .rx_queue_intr_enable = mlx5_rx_intr_enable,
833 .rx_queue_intr_disable = mlx5_rx_intr_disable,
834 .is_removed = mlx5_is_removed,
838 * Verify and store value for device argument.
841 * Key argument to verify.
843 * Value associated with key.
848 * 0 on success, a negative errno value otherwise and rte_errno is set.
851 mlx5_args_check(const char *key, const char *val, void *opaque)
853 struct mlx5_dev_config *config = opaque;
856 /* No-op, port representors are processed in mlx5_dev_spawn(). */
857 if (!strcmp(MLX5_REPRESENTOR, key))
860 tmp = strtoul(val, NULL, 0);
863 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
866 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
867 config->cqe_comp = !!tmp;
868 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
869 config->cqe_pad = !!tmp;
870 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
871 config->hw_padding = !!tmp;
872 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
873 config->mprq.enabled = !!tmp;
874 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
875 config->mprq.stride_num_n = tmp;
876 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
877 config->mprq.max_memcpy_len = tmp;
878 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
879 config->mprq.min_rxqs_num = tmp;
880 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
881 config->txq_inline = tmp;
882 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
883 config->txqs_inline = tmp;
884 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
885 config->txqs_vec = tmp;
886 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
888 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
889 config->mpw_hdr_dseg = !!tmp;
890 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
891 config->inline_max_packet_sz = tmp;
892 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
893 config->tx_vec_en = !!tmp;
894 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
895 config->rx_vec_en = !!tmp;
896 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
897 config->l3_vxlan_en = !!tmp;
898 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
899 config->vf_nl_en = !!tmp;
900 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
901 config->dv_esw_en = !!tmp;
902 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
903 config->dv_flow_en = !!tmp;
904 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
905 config->mr_ext_memseg_en = !!tmp;
907 DRV_LOG(WARNING, "%s: unknown parameter", key);
915 * Parse device parameters.
918 * Pointer to device configuration structure.
920 * Device arguments structure.
923 * 0 on success, a negative errno value otherwise and rte_errno is set.
926 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
928 const char **params = (const char *[]){
929 MLX5_RXQ_CQE_COMP_EN,
933 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
934 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
937 MLX5_TXQS_MIN_INLINE,
940 MLX5_TXQ_MPW_HDR_DSEG_EN,
941 MLX5_TXQ_MAX_INLINE_LEN,
948 MLX5_MR_EXT_MEMSEG_EN,
952 struct rte_kvargs *kvlist;
958 /* Following UGLY cast is done to pass checkpatch. */
959 kvlist = rte_kvargs_parse(devargs->args, params);
962 /* Process parameters. */
963 for (i = 0; (params[i] != NULL); ++i) {
964 if (rte_kvargs_count(kvlist, params[i])) {
965 ret = rte_kvargs_process(kvlist, params[i],
966 mlx5_args_check, config);
969 rte_kvargs_free(kvlist);
974 rte_kvargs_free(kvlist);
978 static struct rte_pci_driver mlx5_driver;
981 * PMD global initialization.
983 * Independent from individual device, this function initializes global
984 * per-PMD data structures distinguishing primary and secondary processes.
985 * Hence, each initialization is called once per a process.
988 * 0 on success, a negative errno value otherwise and rte_errno is set.
993 struct mlx5_shared_data *sd;
994 struct mlx5_local_data *ld = &mlx5_local_data;
996 if (mlx5_init_shared_data())
998 sd = mlx5_shared_data;
1000 rte_spinlock_lock(&sd->lock);
1001 switch (rte_eal_process_type()) {
1002 case RTE_PROC_PRIMARY:
1005 LIST_INIT(&sd->mem_event_cb_list);
1006 rte_rwlock_init(&sd->mem_event_rwlock);
1007 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1008 mlx5_mr_mem_event_cb, NULL);
1009 mlx5_mp_init_primary();
1010 sd->init_done = true;
1012 case RTE_PROC_SECONDARY:
1015 mlx5_mp_init_secondary();
1016 ++sd->secondary_cnt;
1017 ld->init_done = true;
1022 rte_spinlock_unlock(&sd->lock);
1027 * Spawn an Ethernet device from Verbs information.
1030 * Backing DPDK device.
1032 * Verbs device parameters (name, port, switch_info) to spawn.
1034 * Device configuration parameters.
1037 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1038 * is set. The following errors are defined:
1040 * EBUSY: device is not supposed to be spawned.
1041 * EEXIST: device is already spawned
1043 static struct rte_eth_dev *
1044 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1045 struct mlx5_dev_spawn_data *spawn,
1046 struct mlx5_dev_config config)
1048 const struct mlx5_switch_info *switch_info = &spawn->info;
1049 struct mlx5_ibv_shared *sh = NULL;
1050 struct ibv_port_attr port_attr;
1051 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1052 struct rte_eth_dev *eth_dev = NULL;
1053 struct mlx5_priv *priv = NULL;
1055 unsigned int hw_padding = 0;
1057 unsigned int cqe_comp;
1058 unsigned int cqe_pad = 0;
1059 unsigned int tunnel_en = 0;
1060 unsigned int mpls_en = 0;
1061 unsigned int swp = 0;
1062 unsigned int mprq = 0;
1063 unsigned int mprq_min_stride_size_n = 0;
1064 unsigned int mprq_max_stride_size_n = 0;
1065 unsigned int mprq_min_stride_num_n = 0;
1066 unsigned int mprq_max_stride_num_n = 0;
1067 struct ether_addr mac;
1068 char name[RTE_ETH_NAME_MAX_LEN];
1069 int own_domain_id = 0;
1073 /* Determine if this port representor is supposed to be spawned. */
1074 if (switch_info->representor && dpdk_dev->devargs) {
1075 struct rte_eth_devargs eth_da;
1077 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1080 DRV_LOG(ERR, "failed to process device arguments: %s",
1081 strerror(rte_errno));
1084 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1085 if (eth_da.representor_ports[i] ==
1086 (uint16_t)switch_info->port_name)
1088 if (i == eth_da.nb_representor_ports) {
1093 /* Build device name. */
1094 if (!switch_info->representor)
1095 strlcpy(name, dpdk_dev->name, sizeof(name));
1097 snprintf(name, sizeof(name), "%s_representor_%u",
1098 dpdk_dev->name, switch_info->port_name);
1099 /* check if the device is already spawned */
1100 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1104 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1105 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1106 eth_dev = rte_eth_dev_attach_secondary(name);
1107 if (eth_dev == NULL) {
1108 DRV_LOG(ERR, "can not attach rte ethdev");
1112 eth_dev->device = dpdk_dev;
1113 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1114 err = mlx5_proc_priv_init(eth_dev);
1117 /* Receive command fd from primary process */
1118 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1121 /* Remap UAR for Tx queues. */
1122 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1126 * Ethdev pointer is still required as input since
1127 * the primary device is not accessible from the
1128 * secondary process.
1130 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1131 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1134 sh = mlx5_alloc_shared_ibctx(spawn);
1137 config.devx = sh->devx;
1138 #ifdef HAVE_IBV_MLX5_MOD_SWP
1139 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1142 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1143 * as all ConnectX-5 devices.
1145 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1146 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1148 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1149 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1151 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1152 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1153 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1154 DRV_LOG(DEBUG, "enhanced MPW is supported");
1155 mps = MLX5_MPW_ENHANCED;
1157 DRV_LOG(DEBUG, "MPW is supported");
1161 DRV_LOG(DEBUG, "MPW isn't supported");
1162 mps = MLX5_MPW_DISABLED;
1164 #ifdef HAVE_IBV_MLX5_MOD_SWP
1165 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1166 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1167 DRV_LOG(DEBUG, "SWP support: %u", swp);
1170 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1171 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1172 struct mlx5dv_striding_rq_caps mprq_caps =
1173 dv_attr.striding_rq_caps;
1175 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1176 mprq_caps.min_single_stride_log_num_of_bytes);
1177 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1178 mprq_caps.max_single_stride_log_num_of_bytes);
1179 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1180 mprq_caps.min_single_wqe_log_num_of_strides);
1181 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1182 mprq_caps.max_single_wqe_log_num_of_strides);
1183 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1184 mprq_caps.supported_qpts);
1185 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1187 mprq_min_stride_size_n =
1188 mprq_caps.min_single_stride_log_num_of_bytes;
1189 mprq_max_stride_size_n =
1190 mprq_caps.max_single_stride_log_num_of_bytes;
1191 mprq_min_stride_num_n =
1192 mprq_caps.min_single_wqe_log_num_of_strides;
1193 mprq_max_stride_num_n =
1194 mprq_caps.max_single_wqe_log_num_of_strides;
1195 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1196 mprq_min_stride_num_n);
1199 if (RTE_CACHE_LINE_SIZE == 128 &&
1200 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1204 config.cqe_comp = cqe_comp;
1205 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1206 /* Whether device supports 128B Rx CQE padding. */
1207 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1208 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1210 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1211 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1212 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1213 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1214 (dv_attr.tunnel_offloads_caps &
1215 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1217 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1218 tunnel_en ? "" : "not ");
1221 "tunnel offloading disabled due to old OFED/rdma-core version");
1223 config.tunnel_en = tunnel_en;
1224 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1225 mpls_en = ((dv_attr.tunnel_offloads_caps &
1226 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1227 (dv_attr.tunnel_offloads_caps &
1228 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1229 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1230 mpls_en ? "" : "not ");
1232 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1233 " old OFED/rdma-core version or firmware configuration");
1235 config.mpls_en = mpls_en;
1236 /* Check port status. */
1237 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1239 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1242 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1243 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1247 if (port_attr.state != IBV_PORT_ACTIVE)
1248 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1249 mlx5_glue->port_state_str(port_attr.state),
1251 /* Allocate private eth device data. */
1252 priv = rte_zmalloc("ethdev private structure",
1254 RTE_CACHE_LINE_SIZE);
1256 DRV_LOG(ERR, "priv allocation failure");
1261 priv->ibv_port = spawn->ibv_port;
1262 priv->mtu = ETHER_MTU;
1264 /* Initialize UAR access locks for 32bit implementations. */
1265 rte_spinlock_init(&priv->uar_lock_cq);
1266 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1267 rte_spinlock_init(&priv->uar_lock[i]);
1269 /* Some internal functions rely on Netlink sockets, open them now. */
1270 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1271 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1273 priv->representor = !!switch_info->representor;
1274 priv->master = !!switch_info->master;
1275 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1277 * Currently we support single E-Switch per PF configurations
1278 * only and vport_id field contains the vport index for
1279 * associated VF, which is deduced from representor port name.
1280 * For example, let's have the IB device port 10, it has
1281 * attached network device eth0, which has port name attribute
1282 * pf0vf2, we can deduce the VF number as 2, and set vport index
1283 * as 3 (2+1). This assigning schema should be changed if the
1284 * multiple E-Switch instances per PF configurations or/and PCI
1285 * subfunctions are added.
1287 priv->vport_id = switch_info->representor ?
1288 switch_info->port_name + 1 : -1;
1289 /* representor_id field keeps the unmodified port/VF index. */
1290 priv->representor_id = switch_info->representor ?
1291 switch_info->port_name : -1;
1293 * Look for sibling devices in order to reuse their switch domain
1294 * if any, otherwise allocate one.
1296 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1297 const struct mlx5_priv *opriv =
1298 rte_eth_devices[port_id].data->dev_private;
1302 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1304 priv->domain_id = opriv->domain_id;
1307 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1308 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1311 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1312 strerror(rte_errno));
1317 err = mlx5_args(&config, dpdk_dev->devargs);
1320 DRV_LOG(ERR, "failed to process device arguments: %s",
1321 strerror(rte_errno));
1324 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1325 IBV_DEVICE_RAW_IP_CSUM);
1326 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1327 (config.hw_csum ? "" : "not "));
1328 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1329 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1330 DRV_LOG(DEBUG, "counters are not supported");
1332 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1333 if (config.dv_flow_en) {
1334 DRV_LOG(WARNING, "DV flow is not supported");
1335 config.dv_flow_en = 0;
1338 config.ind_table_max_size =
1339 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1341 * Remove this check once DPDK supports larger/variable
1342 * indirection tables.
1344 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1345 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1346 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1347 config.ind_table_max_size);
1348 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1349 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1350 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1351 (config.hw_vlan_strip ? "" : "not "));
1352 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1353 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1354 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1355 (config.hw_fcs_strip ? "" : "not "));
1356 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1357 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1358 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1359 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1360 IBV_DEVICE_PCI_WRITE_END_PADDING);
1362 if (config.hw_padding && !hw_padding) {
1363 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1364 config.hw_padding = 0;
1365 } else if (config.hw_padding) {
1366 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1368 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1369 (sh->device_attr.tso_caps.supported_qpts &
1370 (1 << IBV_QPT_RAW_PACKET)));
1372 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1374 * MPW is disabled by default, while the Enhanced MPW is enabled
1377 if (config.mps == MLX5_ARG_UNSET)
1378 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1381 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1382 DRV_LOG(INFO, "%sMPS is %s",
1383 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1384 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1385 if (config.cqe_comp && !cqe_comp) {
1386 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1387 config.cqe_comp = 0;
1389 if (config.cqe_pad && !cqe_pad) {
1390 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1392 } else if (config.cqe_pad) {
1393 DRV_LOG(INFO, "Rx CQE padding is enabled");
1395 if (config.mprq.enabled && mprq) {
1396 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1397 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1398 config.mprq.stride_num_n =
1399 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1400 mprq_min_stride_num_n);
1402 "the number of strides"
1403 " for Multi-Packet RQ is out of range,"
1404 " setting default value (%u)",
1405 1 << config.mprq.stride_num_n);
1407 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1408 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1409 } else if (config.mprq.enabled && !mprq) {
1410 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1411 config.mprq.enabled = 0;
1413 eth_dev = rte_eth_dev_allocate(name);
1414 if (eth_dev == NULL) {
1415 DRV_LOG(ERR, "can not allocate rte ethdev");
1419 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1420 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1421 if (priv->representor) {
1422 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1423 eth_dev->data->representor_id = priv->representor_id;
1425 eth_dev->data->dev_private = priv;
1426 priv->dev_data = eth_dev->data;
1427 eth_dev->data->mac_addrs = priv->mac;
1428 eth_dev->device = dpdk_dev;
1429 /* Configure the first MAC address by default. */
1430 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1432 "port %u cannot get MAC address, is mlx5_en"
1433 " loaded? (errno: %s)",
1434 eth_dev->data->port_id, strerror(rte_errno));
1439 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1440 eth_dev->data->port_id,
1441 mac.addr_bytes[0], mac.addr_bytes[1],
1442 mac.addr_bytes[2], mac.addr_bytes[3],
1443 mac.addr_bytes[4], mac.addr_bytes[5]);
1446 char ifname[IF_NAMESIZE];
1448 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1449 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1450 eth_dev->data->port_id, ifname);
1452 DRV_LOG(DEBUG, "port %u ifname is unknown",
1453 eth_dev->data->port_id);
1456 /* Get actual MTU if possible. */
1457 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1462 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1464 /* Initialize burst functions to prevent crashes before link-up. */
1465 eth_dev->rx_pkt_burst = removed_rx_burst;
1466 eth_dev->tx_pkt_burst = removed_tx_burst;
1467 eth_dev->dev_ops = &mlx5_dev_ops;
1468 /* Register MAC address. */
1469 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1470 if (config.vf && config.vf_nl_en)
1471 mlx5_nl_mac_addr_sync(eth_dev);
1472 priv->tcf_context = mlx5_flow_tcf_context_create();
1473 if (!priv->tcf_context) {
1476 "flow rules relying on switch offloads will not be"
1477 " supported: cannot open libmnl socket: %s",
1478 strerror(rte_errno));
1480 struct rte_flow_error error;
1481 unsigned int ifindex = mlx5_ifindex(eth_dev);
1486 "cannot retrieve network interface index";
1488 err = mlx5_flow_tcf_init(priv->tcf_context,
1493 "flow rules relying on switch offloads will"
1494 " not be supported: %s: %s",
1495 error.message, strerror(rte_errno));
1496 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1497 priv->tcf_context = NULL;
1500 TAILQ_INIT(&priv->flows);
1501 TAILQ_INIT(&priv->ctrl_flows);
1502 /* Hint libmlx5 to use PMD allocator for data plane resources */
1503 struct mlx5dv_ctx_allocators alctr = {
1504 .alloc = &mlx5_alloc_verbs_buf,
1505 .free = &mlx5_free_verbs_buf,
1508 mlx5_glue->dv_set_context_attr(sh->ctx,
1509 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1510 (void *)((uintptr_t)&alctr));
1511 /* Bring Ethernet device up. */
1512 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1513 eth_dev->data->port_id);
1514 mlx5_set_link_up(eth_dev);
1516 * Even though the interrupt handler is not installed yet,
1517 * interrupts will still trigger on the async_fd from
1518 * Verbs context returned by ibv_open_device().
1520 mlx5_link_update(eth_dev, 0);
1521 #ifdef HAVE_IBV_DEVX_OBJ
1523 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1530 #ifdef HAVE_MLX5DV_DR_ESWITCH
1531 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1532 (switch_info->representor || switch_info->master)))
1533 config.dv_esw_en = 0;
1535 config.dv_esw_en = 0;
1537 /* Store device configuration on private structure. */
1538 priv->config = config;
1539 if (config.dv_flow_en) {
1540 err = mlx5_alloc_shared_dr(priv);
1544 /* Supported Verbs flow priority number detection. */
1545 err = mlx5_flow_discover_priorities(eth_dev);
1550 priv->config.flow_prio = err;
1552 * Once the device is added to the list of memory event
1553 * callback, its global MR cache table cannot be expanded
1554 * on the fly because of deadlock. If it overflows, lookup
1555 * should be done by searching MR list linearly, which is slow.
1557 err = mlx5_mr_btree_init(&priv->mr.cache,
1558 MLX5_MR_BTREE_CACHE_N * 2,
1559 eth_dev->device->numa_node);
1564 /* Add device to memory callback list. */
1565 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1566 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1567 priv, mem_event_cb);
1568 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1573 mlx5_free_shared_dr(priv);
1574 if (priv->nl_socket_route >= 0)
1575 close(priv->nl_socket_route);
1576 if (priv->nl_socket_rdma >= 0)
1577 close(priv->nl_socket_rdma);
1578 if (priv->tcf_context)
1579 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1581 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1583 if (eth_dev != NULL)
1584 eth_dev->data->dev_private = NULL;
1586 if (eth_dev != NULL) {
1587 /* mac_addrs must not be freed alone because part of dev_private */
1588 eth_dev->data->mac_addrs = NULL;
1589 rte_eth_dev_release_port(eth_dev);
1592 mlx5_free_shared_ibctx(sh);
1599 * Comparison callback to sort device data.
1601 * This is meant to be used with qsort().
1604 * Pointer to pointer to first data object.
1606 * Pointer to pointer to second data object.
1609 * 0 if both objects are equal, less than 0 if the first argument is less
1610 * than the second, greater than 0 otherwise.
1613 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1615 const struct mlx5_switch_info *si_a =
1616 &((const struct mlx5_dev_spawn_data *)a)->info;
1617 const struct mlx5_switch_info *si_b =
1618 &((const struct mlx5_dev_spawn_data *)b)->info;
1621 /* Master device first. */
1622 ret = si_b->master - si_a->master;
1625 /* Then representor devices. */
1626 ret = si_b->representor - si_a->representor;
1629 /* Unidentified devices come last in no specific order. */
1630 if (!si_a->representor)
1632 /* Order representors by name. */
1633 return si_a->port_name - si_b->port_name;
1637 * DPDK callback to register a PCI device.
1639 * This function spawns Ethernet devices out of a given PCI device.
1641 * @param[in] pci_drv
1642 * PCI driver structure (mlx5_driver).
1643 * @param[in] pci_dev
1644 * PCI device information.
1647 * 0 on success, a negative errno value otherwise and rte_errno is set.
1650 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1651 struct rte_pci_device *pci_dev)
1653 struct ibv_device **ibv_list;
1655 * Number of found IB Devices matching with requested PCI BDF.
1656 * nd != 1 means there are multiple IB devices over the same
1657 * PCI device and we have representors and master.
1659 unsigned int nd = 0;
1661 * Number of found IB device Ports. nd = 1 and np = 1..n means
1662 * we have the single multiport IB device, and there may be
1663 * representors attached to some of found ports.
1665 unsigned int np = 0;
1667 * Number of DPDK ethernet devices to Spawn - either over
1668 * multiple IB devices or multiple ports of single IB device.
1669 * Actually this is the number of iterations to spawn.
1671 unsigned int ns = 0;
1672 struct mlx5_dev_config dev_config;
1675 ret = mlx5_init_once();
1677 DRV_LOG(ERR, "unable to init PMD global data: %s",
1678 strerror(rte_errno));
1681 assert(pci_drv == &mlx5_driver);
1683 ibv_list = mlx5_glue->get_device_list(&ret);
1685 rte_errno = errno ? errno : ENOSYS;
1686 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1690 * First scan the list of all Infiniband devices to find
1691 * matching ones, gathering into the list.
1693 struct ibv_device *ibv_match[ret + 1];
1699 struct rte_pci_addr pci_addr;
1701 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1702 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1704 if (pci_dev->addr.domain != pci_addr.domain ||
1705 pci_dev->addr.bus != pci_addr.bus ||
1706 pci_dev->addr.devid != pci_addr.devid ||
1707 pci_dev->addr.function != pci_addr.function)
1709 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1710 ibv_list[ret]->name);
1711 ibv_match[nd++] = ibv_list[ret];
1713 ibv_match[nd] = NULL;
1715 /* No device matches, just complain and bail out. */
1716 mlx5_glue->free_device_list(ibv_list);
1718 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1719 " are kernel drivers loaded?",
1720 pci_dev->addr.domain, pci_dev->addr.bus,
1721 pci_dev->addr.devid, pci_dev->addr.function);
1726 nl_route = mlx5_nl_init(NETLINK_ROUTE);
1727 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1730 * Found single matching device may have multiple ports.
1731 * Each port may be representor, we have to check the port
1732 * number and check the representors existence.
1735 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1737 DRV_LOG(WARNING, "can not get IB device \"%s\""
1738 " ports number", ibv_match[0]->name);
1741 * Now we can determine the maximal
1742 * amount of devices to be spawned.
1744 struct mlx5_dev_spawn_data list[np ? np : nd];
1748 * Single IB device with multiple ports found,
1749 * it may be E-Switch master device and representors.
1750 * We have to perform identification trough the ports.
1752 assert(nl_rdma >= 0);
1755 for (i = 1; i <= np; ++i) {
1756 list[ns].max_port = np;
1757 list[ns].ibv_port = i;
1758 list[ns].ibv_dev = ibv_match[0];
1759 list[ns].eth_dev = NULL;
1760 list[ns].ifindex = mlx5_nl_ifindex
1761 (nl_rdma, list[ns].ibv_dev->name, i);
1762 if (!list[ns].ifindex) {
1764 * No network interface index found for the
1765 * specified port, it means there is no
1766 * representor on this port. It's OK,
1767 * there can be disabled ports, for example
1768 * if sriov_numvfs < sriov_totalvfs.
1774 ret = mlx5_nl_switch_info
1778 if (ret || (!list[ns].info.representor &&
1779 !list[ns].info.master)) {
1781 * We failed to recognize representors with
1782 * Netlink, let's try to perform the task
1785 ret = mlx5_sysfs_switch_info
1789 if (!ret && (list[ns].info.representor ^
1790 list[ns].info.master))
1795 "unable to recognize master/representors"
1796 " on the IB device with multiple ports");
1803 * The existence of several matching entries (nd > 1) means
1804 * port representors have been instantiated. No existing Verbs
1805 * call nor sysfs entries can tell them apart, this can only
1806 * be done through Netlink calls assuming kernel drivers are
1807 * recent enough to support them.
1809 * In the event of identification failure through Netlink,
1810 * try again through sysfs, then:
1812 * 1. A single IB device matches (nd == 1) with single
1813 * port (np=0/1) and is not a representor, assume
1814 * no switch support.
1816 * 2. Otherwise no safe assumptions can be made;
1817 * complain louder and bail out.
1820 for (i = 0; i != nd; ++i) {
1821 memset(&list[ns].info, 0, sizeof(list[ns].info));
1822 list[ns].max_port = 1;
1823 list[ns].ibv_port = 1;
1824 list[ns].ibv_dev = ibv_match[i];
1825 list[ns].eth_dev = NULL;
1826 list[ns].ifindex = 0;
1828 list[ns].ifindex = mlx5_nl_ifindex
1829 (nl_rdma, list[ns].ibv_dev->name, 1);
1830 if (!list[ns].ifindex) {
1831 char ifname[IF_NAMESIZE];
1834 * Netlink failed, it may happen with old
1835 * ib_core kernel driver (before 4.16).
1836 * We can assume there is old driver because
1837 * here we are processing single ports IB
1838 * devices. Let's try sysfs to retrieve
1839 * the ifindex. The method works for
1840 * master device only.
1844 * Multiple devices found, assume
1845 * representors, can not distinguish
1846 * master/representor and retrieve
1847 * ifindex via sysfs.
1851 ret = mlx5_get_master_ifname
1852 (ibv_match[i]->ibdev_path, &ifname);
1855 if_nametoindex(ifname);
1856 if (!list[ns].ifindex) {
1858 * No network interface index found
1859 * for the specified device, it means
1860 * there it is neither representor
1868 ret = mlx5_nl_switch_info
1872 if (ret || (!list[ns].info.representor &&
1873 !list[ns].info.master)) {
1875 * We failed to recognize representors with
1876 * Netlink, let's try to perform the task
1879 ret = mlx5_sysfs_switch_info
1883 if (!ret && (list[ns].info.representor ^
1884 list[ns].info.master)) {
1886 } else if ((nd == 1) &&
1887 !list[ns].info.representor &&
1888 !list[ns].info.master) {
1890 * Single IB device with
1891 * one physical port and
1892 * attached network device.
1893 * May be SRIOV is not enabled
1894 * or there is no representors.
1896 DRV_LOG(INFO, "no E-Switch support detected");
1903 "unable to recognize master/representors"
1904 " on the multiple IB devices");
1912 * Sort list to probe devices in natural order for users convenience
1913 * (i.e. master first, then representors from lowest to highest ID).
1915 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1916 /* Default configuration. */
1917 dev_config = (struct mlx5_dev_config){
1919 .mps = MLX5_ARG_UNSET,
1922 .txq_inline = MLX5_ARG_UNSET,
1923 .txqs_inline = MLX5_ARG_UNSET,
1924 .txqs_vec = MLX5_ARG_UNSET,
1925 .inline_max_packet_sz = MLX5_ARG_UNSET,
1927 .mr_ext_memseg_en = 1,
1929 .enabled = 0, /* Disabled by default. */
1930 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1931 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1932 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1936 /* Device specific configuration. */
1937 switch (pci_dev->id.device_id) {
1938 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1939 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1941 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1942 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1943 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1944 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1950 /* Set architecture-dependent default value if unset. */
1951 if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1952 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1953 for (i = 0; i != ns; ++i) {
1956 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1959 if (!list[i].eth_dev) {
1960 if (rte_errno != EBUSY && rte_errno != EEXIST)
1962 /* Device is disabled or already spawned. Ignore it. */
1965 restore = list[i].eth_dev->data->dev_flags;
1966 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1967 /* Restore non-PCI flags cleared by the above call. */
1968 list[i].eth_dev->data->dev_flags |= restore;
1969 rte_eth_dev_probing_finish(list[i].eth_dev);
1973 "probe of PCI device " PCI_PRI_FMT " aborted after"
1974 " encountering an error: %s",
1975 pci_dev->addr.domain, pci_dev->addr.bus,
1976 pci_dev->addr.devid, pci_dev->addr.function,
1977 strerror(rte_errno));
1981 if (!list[i].eth_dev)
1983 mlx5_dev_close(list[i].eth_dev);
1984 /* mac_addrs must not be freed because in dev_private */
1985 list[i].eth_dev->data->mac_addrs = NULL;
1986 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1988 /* Restore original error. */
1995 * Do the routine cleanup:
1996 * - close opened Netlink sockets
1997 * - free the Infiniband device list
2004 mlx5_glue->free_device_list(ibv_list);
2009 * DPDK callback to remove a PCI device.
2011 * This function removes all Ethernet devices belong to a given PCI device.
2013 * @param[in] pci_dev
2014 * Pointer to the PCI device.
2017 * 0 on success, the function cannot fail.
2020 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2024 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2025 rte_eth_dev_close(port_id);
2029 static const struct rte_pci_id mlx5_pci_id_map[] = {
2031 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2032 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2035 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2036 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2039 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2040 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2043 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2044 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2047 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2048 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2051 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2052 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2055 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2056 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2059 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2060 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2063 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2064 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2067 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2068 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2071 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2072 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2075 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2076 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2083 static struct rte_pci_driver mlx5_driver = {
2085 .name = MLX5_DRIVER_NAME
2087 .id_table = mlx5_pci_id_map,
2088 .probe = mlx5_pci_probe,
2089 .remove = mlx5_pci_remove,
2090 .dma_map = mlx5_dma_map,
2091 .dma_unmap = mlx5_dma_unmap,
2092 .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2093 RTE_PCI_DRV_PROBE_AGAIN),
2096 #ifdef RTE_IBVERBS_LINK_DLOPEN
2099 * Suffix RTE_EAL_PMD_PATH with "-glue".
2101 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2102 * suffixing its last component.
2105 * Output buffer, should be large enough otherwise NULL is returned.
2110 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2113 mlx5_glue_path(char *buf, size_t size)
2115 static const char *const bad[] = { "/", ".", "..", NULL };
2116 const char *path = RTE_EAL_PMD_PATH;
2117 size_t len = strlen(path);
2121 while (len && path[len - 1] == '/')
2123 for (off = len; off && path[off - 1] != '/'; --off)
2125 for (i = 0; bad[i]; ++i)
2126 if (!strncmp(path + off, bad[i], (int)(len - off)))
2128 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2129 if (i == -1 || (size_t)i >= size)
2134 "unable to append \"-glue\" to last component of"
2135 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2136 " please re-configure DPDK");
2141 * Initialization routine for run-time dependency on rdma-core.
2144 mlx5_glue_init(void)
2146 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2147 const char *path[] = {
2149 * A basic security check is necessary before trusting
2150 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2152 (geteuid() == getuid() && getegid() == getgid() ?
2153 getenv("MLX5_GLUE_PATH") : NULL),
2155 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2156 * variant, otherwise let dlopen() look up libraries on its
2159 (*RTE_EAL_PMD_PATH ?
2160 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2163 void *handle = NULL;
2167 while (!handle && i != RTE_DIM(path)) {
2176 end = strpbrk(path[i], ":;");
2178 end = path[i] + strlen(path[i]);
2179 len = end - path[i];
2184 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2186 (!len || *(end - 1) == '/') ? "" : "/");
2189 if (sizeof(name) != (size_t)ret + 1)
2191 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2193 handle = dlopen(name, RTLD_LAZY);
2204 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2207 sym = dlsym(handle, "mlx5_glue");
2208 if (!sym || !*sym) {
2212 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2221 "cannot initialize PMD due to missing run-time dependency on"
2222 " rdma-core libraries (libibverbs, libmlx5)");
2229 * Driver initialization routine.
2231 RTE_INIT(rte_mlx5_pmd_init)
2233 /* Initialize driver log type. */
2234 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2235 if (mlx5_logtype >= 0)
2236 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2238 /* Build the static tables for Verbs conversion. */
2239 mlx5_set_ptype_table();
2240 mlx5_set_cksum_table();
2241 mlx5_set_swp_types_table();
2243 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2244 * huge pages. Calling ibv_fork_init() during init allows
2245 * applications to use fork() safely for purposes other than
2246 * using this PMD, which is not supported in forked processes.
2248 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2249 /* Match the size of Rx completion entry to the size of a cacheline. */
2250 if (RTE_CACHE_LINE_SIZE == 128)
2251 setenv("MLX5_CQE_SIZE", "128", 0);
2253 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2254 * cleanup all the Verbs resources even when the device was removed.
2256 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2257 #ifdef RTE_IBVERBS_LINK_DLOPEN
2258 if (mlx5_glue_init())
2263 /* Glue structure must not contain any NULL pointers. */
2267 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2268 assert(((const void *const *)mlx5_glue)[i]);
2271 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2273 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2274 mlx5_glue->version, MLX5_GLUE_VERSION);
2277 mlx5_glue->fork_init();
2278 rte_pci_register(&mlx5_driver);
2281 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2282 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2283 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");