drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to include 2 dsegs in the title WQEBB.
 100  * Deprecated, ignored.
 101  */
 102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 103
 104 /*
 105  * Device parameter to limit the size of inlining packet.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 109
 110 /*
 111  * Device parameter to enable hardware Tx vector.
 112  * Deprecated, ignored (no vectorized Tx routines anymore).
 113  */
 114 #define MLX5_TX_VEC_EN "tx_vec_en"
 115
 116 /* Device parameter to enable hardware Rx vector. */
 117 #define MLX5_RX_VEC_EN "rx_vec_en"
 118
 119 /* Allow L3 VXLAN flow creation. */
 120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 121
 122 /* Activate DV E-Switch flow steering. */
 123 #define MLX5_DV_ESW_EN "dv_esw_en"
 124
 125 /* Activate DV flow steering. */
 126 #define MLX5_DV_FLOW_EN "dv_flow_en"
 127
 128 /* Activate Netlink support in VF mode. */
 129 #define MLX5_VF_NL_EN "vf_nl_en"
 130
 131 /* Enable extending memsegs when creating a MR. */
 132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 133
 134 /* Select port representors to instantiate. */
 135 #define MLX5_REPRESENTOR "representor"
 136
 137 /* Device parameter to configure the maximum number of dump files per queue. */
 138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 139
 140 /* Configure timeout of LRO session (in microseconds). */
 141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 142
 143 #ifndef HAVE_IBV_MLX5_MOD_MPW
 144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 146 #endif
 147
 148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 150 #endif
 151
 152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 153
 154 /* Shared memory between primary and secondary processes. */
 155 struct mlx5_shared_data *mlx5_shared_data;
 156
 157 /* Spinlock for mlx5_shared_data allocation. */
 158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 159
 160 /* Process local data for secondary processes. */
 161 static struct mlx5_local_data mlx5_local_data;
 162
 163 /** Driver-specific log messages type. */
 164 int mlx5_logtype;
 165
 166 /** Data associated with devices to spawn. */
 167 struct mlx5_dev_spawn_data {
 168         uint32_t ifindex; /**< Network interface index. */
 169         uint32_t max_port; /**< IB device maximal port index. */
 170         uint32_t ibv_port; /**< IB device physical port index. */
 171         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
 172         struct mlx5_switch_info info; /**< Switch information. */
 173         struct ibv_device *ibv_dev; /**< Associated IB device. */
 174         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 175         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 176 };
 177
 178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 180
 181 /**
 182  * Initialize the counters management structure.
 183  *
 184  * @param[in] sh
 185  *   Pointer to mlx5_ibv_shared object to free
 186  */
 187 static void
 188 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 189 {
 190         uint8_t i;
 191
 192         TAILQ_INIT(&sh->cmng.flow_counters);
 193         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 194                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 195 }
 196
 197 /**
 198  * Destroy all the resources allocated for a counter memory management.
 199  *
 200  * @param[in] mng
 201  *   Pointer to the memory management structure.
 202  */
 203 static void
 204 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 205 {
 206         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 207
 208         LIST_REMOVE(mng, next);
 209         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 210         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 211         rte_free(mem);
 212 }
 213
 214 /**
 215  * Close and release all the resources of the counters management.
 216  *
 217  * @param[in] sh
 218  *   Pointer to mlx5_ibv_shared object to free.
 219  */
 220 static void
 221 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 222 {
 223         struct mlx5_counter_stats_mem_mng *mng;
 224         uint8_t i;
 225         int j;
 226         int retries = 1024;
 227
 228         rte_errno = 0;
 229         while (--retries) {
 230                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 231                 if (rte_errno != EINPROGRESS)
 232                         break;
 233                 rte_pause();
 234         }
 235         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 236                 struct mlx5_flow_counter_pool *pool;
 237                 uint32_t batch = !!(i % 2);
 238
 239                 if (!sh->cmng.ccont[i].pools)
 240                         continue;
 241                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 242                 while (pool) {
 243                         if (batch) {
 244                                 if (pool->min_dcs)
 245                                         claim_zero
 246                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 247                         }
 248                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 249                                 if (pool->counters_raw[j].action)
 250                                         claim_zero
 251                                         (mlx5_glue->destroy_flow_action
 252                                                (pool->counters_raw[j].action));
 253                                 if (!batch && pool->counters_raw[j].dcs)
 254                                         claim_zero(mlx5_devx_cmd_destroy
 255                                                   (pool->counters_raw[j].dcs));
 256                         }
 257                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 258                                      next);
 259                         rte_free(pool);
 260                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 261                 }
 262                 rte_free(sh->cmng.ccont[i].pools);
 263         }
 264         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 265         while (mng) {
 266                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 267                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 268         }
 269         memset(&sh->cmng, 0, sizeof(sh->cmng));
 270 }
 271
 272 /**
 273  * Extract pdn of PD object using DV API.
 274  *
 275  * @param[in] pd
 276  *   Pointer to the verbs PD object.
 277  * @param[out] pdn
 278  *   Pointer to the PD object number variable.
 279  *
 280  * @return
 281  *   0 on success, error value otherwise.
 282  */
 283 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 284 static int
 285 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 286 {
 287         struct mlx5dv_obj obj;
 288         struct mlx5dv_pd pd_info;
 289         int ret = 0;
 290
 291         obj.pd.in = pd;
 292         obj.pd.out = &pd_info;
 293         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 294         if (ret) {
 295                 DRV_LOG(DEBUG, "Fail to get PD object info");
 296                 return ret;
 297         }
 298         *pdn = pd_info.pdn;
 299         return 0;
 300 }
 301 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 302
 303 /**
 304  * Allocate shared IB device context. If there is multiport device the
 305  * master and representors will share this context, if there is single
 306  * port dedicated IB device, the context will be used by only given
 307  * port due to unification.
 308  *
 309  * Routine first searches the context for the specified IB device name,
 310  * if found the shared context assumed and reference counter is incremented.
 311  * If no context found the new one is created and initialized with specified
 312  * IB device context and parameters.
 313  *
 314  * @param[in] spawn
 315  *   Pointer to the IB device attributes (name, port, etc).
 316  *
 317  * @return
 318  *   Pointer to mlx5_ibv_shared object on success,
 319  *   otherwise NULL and rte_errno is set.
 320  */
 321 static struct mlx5_ibv_shared *
 322 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 323 {
 324         struct mlx5_ibv_shared *sh;
 325         int err = 0;
 326         uint32_t i;
 327
 328         assert(spawn);
 329         /* Secondary process should not create the shared context. */
 330         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 331         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 332         /* Search for IB context by device name. */
 333         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 334                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 335                         sh->refcnt++;
 336                         goto exit;
 337                 }
 338         }
 339         /* No device found, we have to create new shared context. */
 340         assert(spawn->max_port);
 341         sh = rte_zmalloc("ethdev shared ib context",
 342                          sizeof(struct mlx5_ibv_shared) +
 343                          spawn->max_port *
 344                          sizeof(struct mlx5_ibv_shared_port),
 345                          RTE_CACHE_LINE_SIZE);
 346         if (!sh) {
 347                 DRV_LOG(ERR, "shared context allocation failure");
 348                 rte_errno  = ENOMEM;
 349                 goto exit;
 350         }
 351         /* Try to open IB device with DV first, then usual Verbs. */
 352         errno = 0;
 353         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 354         if (sh->ctx) {
 355                 sh->devx = 1;
 356                 DRV_LOG(DEBUG, "DevX is supported");
 357         } else {
 358                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 359                 if (!sh->ctx) {
 360                         err = errno ? errno : ENODEV;
 361                         goto error;
 362                 }
 363                 DRV_LOG(DEBUG, "DevX is NOT supported");
 364         }
 365         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 366         if (err) {
 367                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 368                 goto error;
 369         }
 370         sh->refcnt = 1;
 371         sh->max_port = spawn->max_port;
 372         strncpy(sh->ibdev_name, sh->ctx->device->name,
 373                 sizeof(sh->ibdev_name));
 374         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 375                 sizeof(sh->ibdev_path));
 376         pthread_mutex_init(&sh->intr_mutex, NULL);
 377         /*
 378          * Setting port_id to max unallowed value means
 379          * there is no interrupt subhandler installed for
 380          * the given port index i.
 381          */
 382         for (i = 0; i < sh->max_port; i++)
 383                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 384         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 385         if (sh->pd == NULL) {
 386                 DRV_LOG(ERR, "PD allocation failure");
 387                 err = ENOMEM;
 388                 goto error;
 389         }
 390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 391         err = mlx5_get_pdn(sh->pd, &sh->pdn);
 392         if (err) {
 393                 DRV_LOG(ERR, "Fail to extract pdn from PD");
 394                 goto error;
 395         }
 396 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 397         /*
 398          * Once the device is added to the list of memory event
 399          * callback, its global MR cache table cannot be expanded
 400          * on the fly because of deadlock. If it overflows, lookup
 401          * should be done by searching MR list linearly, which is slow.
 402          *
 403          * At this point the device is not added to the memory
 404          * event list yet, context is just being created.
 405          */
 406         err = mlx5_mr_btree_init(&sh->mr.cache,
 407                                  MLX5_MR_BTREE_CACHE_N * 2,
 408                                  spawn->pci_dev->device.numa_node);
 409         if (err) {
 410                 err = rte_errno;
 411                 goto error;
 412         }
 413         mlx5_flow_counters_mng_init(sh);
 414         /* Add device to memory callback list. */
 415         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 416         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 417                          sh, mem_event_cb);
 418         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 419         /* Add context to the global device list. */
 420         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 421 exit:
 422         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 423         return sh;
 424 error:
 425         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 426         assert(sh);
 427         if (sh->pd)
 428                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 429         if (sh->ctx)
 430                 claim_zero(mlx5_glue->close_device(sh->ctx));
 431         rte_free(sh);
 432         assert(err > 0);
 433         rte_errno = err;
 434         return NULL;
 435 }
 436
 437 /**
 438  * Free shared IB device context. Decrement counter and if zero free
 439  * all allocated resources and close handles.
 440  *
 441  * @param[in] sh
 442  *   Pointer to mlx5_ibv_shared object to free
 443  */
 444 static void
 445 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 446 {
 447         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 448 #ifndef NDEBUG
 449         /* Check the object presence in the list. */
 450         struct mlx5_ibv_shared *lctx;
 451
 452         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 453                 if (lctx == sh)
 454                         break;
 455         assert(lctx);
 456         if (lctx != sh) {
 457                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 458                 goto exit;
 459         }
 460 #endif
 461         assert(sh);
 462         assert(sh->refcnt);
 463         /* Secondary process should not free the shared context. */
 464         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 465         if (--sh->refcnt)
 466                 goto exit;
 467         /* Release created Memory Regions. */
 468         mlx5_mr_release(sh);
 469         /* Remove from memory callback device list. */
 470         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 471         LIST_REMOVE(sh, mem_event_cb);
 472         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 473         /* Remove context from the global device list. */
 474         LIST_REMOVE(sh, next);
 475         /*
 476          *  Ensure there is no async event handler installed.
 477          *  Only primary process handles async device events.
 478          **/
 479         mlx5_flow_counters_mng_close(sh);
 480         assert(!sh->intr_cnt);
 481         if (sh->intr_cnt)
 482                 mlx5_intr_callback_unregister
 483                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 484         pthread_mutex_destroy(&sh->intr_mutex);
 485         if (sh->pd)
 486                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 487         if (sh->ctx)
 488                 claim_zero(mlx5_glue->close_device(sh->ctx));
 489         rte_free(sh);
 490 exit:
 491         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 492 }
 493
 494 /**
 495  * Initialize DR related data within private structure.
 496  * Routine checks the reference counter and does actual
 497  * resources creation/initialization only if counter is zero.
 498  *
 499  * @param[in] priv
 500  *   Pointer to the private device data structure.
 501  *
 502  * @return
 503  *   Zero on success, positive error code otherwise.
 504  */
 505 static int
 506 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 507 {
 508 #ifdef HAVE_MLX5DV_DR
 509         struct mlx5_ibv_shared *sh = priv->sh;
 510         int err = 0;
 511         void *domain;
 512
 513         assert(sh);
 514         if (sh->dv_refcnt) {
 515                 /* Shared DV/DR structures is already initialized. */
 516                 sh->dv_refcnt++;
 517                 priv->dr_shared = 1;
 518                 return 0;
 519         }
 520         /* Reference counter is zero, we should initialize structures. */
 521         domain = mlx5_glue->dr_create_domain(sh->ctx,
 522                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 523         if (!domain) {
 524                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 525                 err = errno;
 526                 goto error;
 527         }
 528         sh->rx_domain = domain;
 529         domain = mlx5_glue->dr_create_domain(sh->ctx,
 530                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 531         if (!domain) {
 532                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 533                 err = errno;
 534                 goto error;
 535         }
 536         pthread_mutex_init(&sh->dv_mutex, NULL);
 537         sh->tx_domain = domain;
 538 #ifdef HAVE_MLX5DV_DR_ESWITCH
 539         if (priv->config.dv_esw_en) {
 540                 domain  = mlx5_glue->dr_create_domain
 541                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 542                 if (!domain) {
 543                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 544                         err = errno;
 545                         goto error;
 546                 }
 547                 sh->fdb_domain = domain;
 548                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 549         }
 550 #endif
 551         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 552         sh->dv_refcnt++;
 553         priv->dr_shared = 1;
 554         return 0;
 555
 556 error:
 557        /* Rollback the created objects. */
 558         if (sh->rx_domain) {
 559                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 560                 sh->rx_domain = NULL;
 561         }
 562         if (sh->tx_domain) {
 563                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 564                 sh->tx_domain = NULL;
 565         }
 566         if (sh->fdb_domain) {
 567                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 568                 sh->fdb_domain = NULL;
 569         }
 570         if (sh->esw_drop_action) {
 571                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 572                 sh->esw_drop_action = NULL;
 573         }
 574         if (sh->pop_vlan_action) {
 575                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 576                 sh->pop_vlan_action = NULL;
 577         }
 578         return err;
 579 #else
 580         (void)priv;
 581         return 0;
 582 #endif
 583 }
 584
 585 /**
 586  * Destroy DR related data within private structure.
 587  *
 588  * @param[in] priv
 589  *   Pointer to the private device data structure.
 590  */
 591 static void
 592 mlx5_free_shared_dr(struct mlx5_priv *priv)
 593 {
 594 #ifdef HAVE_MLX5DV_DR
 595         struct mlx5_ibv_shared *sh;
 596
 597         if (!priv->dr_shared)
 598                 return;
 599         priv->dr_shared = 0;
 600         sh = priv->sh;
 601         assert(sh);
 602         assert(sh->dv_refcnt);
 603         if (sh->dv_refcnt && --sh->dv_refcnt)
 604                 return;
 605         if (sh->rx_domain) {
 606                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 607                 sh->rx_domain = NULL;
 608         }
 609         if (sh->tx_domain) {
 610                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 611                 sh->tx_domain = NULL;
 612         }
 613 #ifdef HAVE_MLX5DV_DR_ESWITCH
 614         if (sh->fdb_domain) {
 615                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 616                 sh->fdb_domain = NULL;
 617         }
 618         if (sh->esw_drop_action) {
 619                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 620                 sh->esw_drop_action = NULL;
 621         }
 622 #endif
 623         if (sh->pop_vlan_action) {
 624                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 625                 sh->pop_vlan_action = NULL;
 626         }
 627         pthread_mutex_destroy(&sh->dv_mutex);
 628 #else
 629         (void)priv;
 630 #endif
 631 }
 632
 633 /**
 634  * Initialize shared data between primary and secondary process.
 635  *
 636  * A memzone is reserved by primary process and secondary processes attach to
 637  * the memzone.
 638  *
 639  * @return
 640  *   0 on success, a negative errno value otherwise and rte_errno is set.
 641  */
 642 static int
 643 mlx5_init_shared_data(void)
 644 {
 645         const struct rte_memzone *mz;
 646         int ret = 0;
 647
 648         rte_spinlock_lock(&mlx5_shared_data_lock);
 649         if (mlx5_shared_data == NULL) {
 650                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 651                         /* Allocate shared memory. */
 652                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 653                                                  sizeof(*mlx5_shared_data),
 654                                                  SOCKET_ID_ANY, 0);
 655                         if (mz == NULL) {
 656                                 DRV_LOG(ERR,
 657                                         "Cannot allocate mlx5 shared data\n");
 658                                 ret = -rte_errno;
 659                                 goto error;
 660                         }
 661                         mlx5_shared_data = mz->addr;
 662                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 663                         rte_spinlock_init(&mlx5_shared_data->lock);
 664                 } else {
 665                         /* Lookup allocated shared memory. */
 666                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 667                         if (mz == NULL) {
 668                                 DRV_LOG(ERR,
 669                                         "Cannot attach mlx5 shared data\n");
 670                                 ret = -rte_errno;
 671                                 goto error;
 672                         }
 673                         mlx5_shared_data = mz->addr;
 674                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 675                 }
 676         }
 677 error:
 678         rte_spinlock_unlock(&mlx5_shared_data_lock);
 679         return ret;
 680 }
 681
 682 /**
 683  * Retrieve integer value from environment variable.
 684  *
 685  * @param[in] name
 686  *   Environment variable name.
 687  *
 688  * @return
 689  *   Integer value, 0 if the variable is not set.
 690  */
 691 int
 692 mlx5_getenv_int(const char *name)
 693 {
 694         const char *val = getenv(name);
 695
 696         if (val == NULL)
 697                 return 0;
 698         return atoi(val);
 699 }
 700
 701 /**
 702  * Verbs callback to allocate a memory. This function should allocate the space
 703  * according to the size provided residing inside a huge page.
 704  * Please note that all allocation must respect the alignment from libmlx5
 705  * (i.e. currently sysconf(_SC_PAGESIZE)).
 706  *
 707  * @param[in] size
 708  *   The size in bytes of the memory to allocate.
 709  * @param[in] data
 710  *   A pointer to the callback data.
 711  *
 712  * @return
 713  *   Allocated buffer, NULL otherwise and rte_errno is set.
 714  */
 715 static void *
 716 mlx5_alloc_verbs_buf(size_t size, void *data)
 717 {
 718         struct mlx5_priv *priv = data;
 719         void *ret;
 720         size_t alignment = sysconf(_SC_PAGESIZE);
 721         unsigned int socket = SOCKET_ID_ANY;
 722
 723         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 724                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 725
 726                 socket = ctrl->socket;
 727         } else if (priv->verbs_alloc_ctx.type ==
 728                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 729                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 730
 731                 socket = ctrl->socket;
 732         }
 733         assert(data != NULL);
 734         ret = rte_malloc_socket(__func__, size, alignment, socket);
 735         if (!ret && size)
 736                 rte_errno = ENOMEM;
 737         return ret;
 738 }
 739
 740 /**
 741  * Verbs callback to free a memory.
 742  *
 743  * @param[in] ptr
 744  *   A pointer to the memory to free.
 745  * @param[in] data
 746  *   A pointer to the callback data.
 747  */
 748 static void
 749 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 750 {
 751         assert(data != NULL);
 752         rte_free(ptr);
 753 }
 754
 755 /**
 756  * DPDK callback to add udp tunnel port
 757  *
 758  * @param[in] dev
 759  *   A pointer to eth_dev
 760  * @param[in] udp_tunnel
 761  *   A pointer to udp tunnel
 762  *
 763  * @return
 764  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
 765  */
 766 int
 767 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
 768                          struct rte_eth_udp_tunnel *udp_tunnel)
 769 {
 770         assert(udp_tunnel != NULL);
 771         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
 772             udp_tunnel->udp_port == 4789)
 773                 return 0;
 774         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
 775             udp_tunnel->udp_port == 4790)
 776                 return 0;
 777         return -ENOTSUP;
 778 }
 779
 780 /**
 781  * Initialize process private data structure.
 782  *
 783  * @param dev
 784  *   Pointer to Ethernet device structure.
 785  *
 786  * @return
 787  *   0 on success, a negative errno value otherwise and rte_errno is set.
 788  */
 789 int
 790 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 791 {
 792         struct mlx5_priv *priv = dev->data->dev_private;
 793         struct mlx5_proc_priv *ppriv;
 794         size_t ppriv_size;
 795
 796         /*
 797          * UAR register table follows the process private structure. BlueFlame
 798          * registers for Tx queues are stored in the table.
 799          */
 800         ppriv_size =
 801                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 802         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 803                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 804         if (!ppriv) {
 805                 rte_errno = ENOMEM;
 806                 return -rte_errno;
 807         }
 808         ppriv->uar_table_sz = ppriv_size;
 809         dev->process_private = ppriv;
 810         return 0;
 811 }
 812
 813 /**
 814  * Un-initialize process private data structure.
 815  *
 816  * @param dev
 817  *   Pointer to Ethernet device structure.
 818  */
 819 static void
 820 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 821 {
 822         if (!dev->process_private)
 823                 return;
 824         rte_free(dev->process_private);
 825         dev->process_private = NULL;
 826 }
 827
 828 /**
 829  * DPDK callback to close the device.
 830  *
 831  * Destroy all queues and objects, free memory.
 832  *
 833  * @param dev
 834  *   Pointer to Ethernet device structure.
 835  */
 836 static void
 837 mlx5_dev_close(struct rte_eth_dev *dev)
 838 {
 839         struct mlx5_priv *priv = dev->data->dev_private;
 840         unsigned int i;
 841         int ret;
 842
 843         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 844                 dev->data->port_id,
 845                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 846         /* In case mlx5_dev_stop() has not been called. */
 847         mlx5_dev_interrupt_handler_uninstall(dev);
 848         mlx5_traffic_disable(dev);
 849         mlx5_flow_flush(dev, NULL);
 850         /* Prevent crashes when queues are still in use. */
 851         dev->rx_pkt_burst = removed_rx_burst;
 852         dev->tx_pkt_burst = removed_tx_burst;
 853         rte_wmb();
 854         /* Disable datapath on secondary process. */
 855         mlx5_mp_req_stop_rxtx(dev);
 856         if (priv->rxqs != NULL) {
 857                 /* XXX race condition if mlx5_rx_burst() is still running. */
 858                 usleep(1000);
 859                 for (i = 0; (i != priv->rxqs_n); ++i)
 860                         mlx5_rxq_release(dev, i);
 861                 priv->rxqs_n = 0;
 862                 priv->rxqs = NULL;
 863         }
 864         if (priv->txqs != NULL) {
 865                 /* XXX race condition if mlx5_tx_burst() is still running. */
 866                 usleep(1000);
 867                 for (i = 0; (i != priv->txqs_n); ++i)
 868                         mlx5_txq_release(dev, i);
 869                 priv->txqs_n = 0;
 870                 priv->txqs = NULL;
 871         }
 872         mlx5_proc_priv_uninit(dev);
 873         mlx5_mprq_free_mp(dev);
 874         mlx5_free_shared_dr(priv);
 875         if (priv->rss_conf.rss_key != NULL)
 876                 rte_free(priv->rss_conf.rss_key);
 877         if (priv->reta_idx != NULL)
 878                 rte_free(priv->reta_idx);
 879         if (priv->config.vf)
 880                 mlx5_nl_mac_addr_flush(dev);
 881         if (priv->nl_socket_route >= 0)
 882                 close(priv->nl_socket_route);
 883         if (priv->nl_socket_rdma >= 0)
 884                 close(priv->nl_socket_rdma);
 885         if (priv->vmwa_context)
 886                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
 887         if (priv->sh) {
 888                 /*
 889                  * Free the shared context in last turn, because the cleanup
 890                  * routines above may use some shared fields, like
 891                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 892                  * ifindex if Netlink fails.
 893                  */
 894                 mlx5_free_shared_ibctx(priv->sh);
 895                 priv->sh = NULL;
 896         }
 897         ret = mlx5_hrxq_verify(dev);
 898         if (ret)
 899                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 900                         dev->data->port_id);
 901         ret = mlx5_ind_table_obj_verify(dev);
 902         if (ret)
 903                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 904                         dev->data->port_id);
 905         ret = mlx5_rxq_obj_verify(dev);
 906         if (ret)
 907                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
 908                         dev->data->port_id);
 909         ret = mlx5_rxq_verify(dev);
 910         if (ret)
 911                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 912                         dev->data->port_id);
 913         ret = mlx5_txq_ibv_verify(dev);
 914         if (ret)
 915                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 916                         dev->data->port_id);
 917         ret = mlx5_txq_verify(dev);
 918         if (ret)
 919                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 920                         dev->data->port_id);
 921         ret = mlx5_flow_verify(dev);
 922         if (ret)
 923                 DRV_LOG(WARNING, "port %u some flows still remain",
 924                         dev->data->port_id);
 925         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 926                 unsigned int c = 0;
 927                 uint16_t port_id;
 928
 929                 MLX5_ETH_FOREACH_DEV(port_id) {
 930                         struct mlx5_priv *opriv =
 931                                 rte_eth_devices[port_id].data->dev_private;
 932
 933                         if (!opriv ||
 934                             opriv->domain_id != priv->domain_id ||
 935                             &rte_eth_devices[port_id] == dev)
 936                                 continue;
 937                         ++c;
 938                         break;
 939                 }
 940                 if (!c)
 941                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 942         }
 943         memset(priv, 0, sizeof(*priv));
 944         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 945         /*
 946          * Reset mac_addrs to NULL such that it is not freed as part of
 947          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 948          * it is freed when dev_private is freed.
 949          */
 950         dev->data->mac_addrs = NULL;
 951 }
 952
 953 const struct eth_dev_ops mlx5_dev_ops = {
 954         .dev_configure = mlx5_dev_configure,
 955         .dev_start = mlx5_dev_start,
 956         .dev_stop = mlx5_dev_stop,
 957         .dev_set_link_down = mlx5_set_link_down,
 958         .dev_set_link_up = mlx5_set_link_up,
 959         .dev_close = mlx5_dev_close,
 960         .promiscuous_enable = mlx5_promiscuous_enable,
 961         .promiscuous_disable = mlx5_promiscuous_disable,
 962         .allmulticast_enable = mlx5_allmulticast_enable,
 963         .allmulticast_disable = mlx5_allmulticast_disable,
 964         .link_update = mlx5_link_update,
 965         .stats_get = mlx5_stats_get,
 966         .stats_reset = mlx5_stats_reset,
 967         .xstats_get = mlx5_xstats_get,
 968         .xstats_reset = mlx5_xstats_reset,
 969         .xstats_get_names = mlx5_xstats_get_names,
 970         .fw_version_get = mlx5_fw_version_get,
 971         .dev_infos_get = mlx5_dev_infos_get,
 972         .read_clock = mlx5_read_clock,
 973         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 974         .vlan_filter_set = mlx5_vlan_filter_set,
 975         .rx_queue_setup = mlx5_rx_queue_setup,
 976         .tx_queue_setup = mlx5_tx_queue_setup,
 977         .rx_queue_release = mlx5_rx_queue_release,
 978         .tx_queue_release = mlx5_tx_queue_release,
 979         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 980         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 981         .mac_addr_remove = mlx5_mac_addr_remove,
 982         .mac_addr_add = mlx5_mac_addr_add,
 983         .mac_addr_set = mlx5_mac_addr_set,
 984         .set_mc_addr_list = mlx5_set_mc_addr_list,
 985         .mtu_set = mlx5_dev_set_mtu,
 986         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 987         .vlan_offload_set = mlx5_vlan_offload_set,
 988         .reta_update = mlx5_dev_rss_reta_update,
 989         .reta_query = mlx5_dev_rss_reta_query,
 990         .rss_hash_update = mlx5_rss_hash_update,
 991         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 992         .filter_ctrl = mlx5_dev_filter_ctrl,
 993         .rx_descriptor_status = mlx5_rx_descriptor_status,
 994         .tx_descriptor_status = mlx5_tx_descriptor_status,
 995         .rx_queue_count = mlx5_rx_queue_count,
 996         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 997         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 998         .is_removed = mlx5_is_removed,
 999         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1000         .get_module_info = mlx5_get_module_info,
1001         .get_module_eeprom = mlx5_get_module_eeprom,
1002 };
1003
1004 /* Available operations from secondary process. */
1005 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1006         .stats_get = mlx5_stats_get,
1007         .stats_reset = mlx5_stats_reset,
1008         .xstats_get = mlx5_xstats_get,
1009         .xstats_reset = mlx5_xstats_reset,
1010         .xstats_get_names = mlx5_xstats_get_names,
1011         .fw_version_get = mlx5_fw_version_get,
1012         .dev_infos_get = mlx5_dev_infos_get,
1013         .rx_descriptor_status = mlx5_rx_descriptor_status,
1014         .tx_descriptor_status = mlx5_tx_descriptor_status,
1015         .get_module_info = mlx5_get_module_info,
1016         .get_module_eeprom = mlx5_get_module_eeprom,
1017 };
1018
1019 /* Available operations in flow isolated mode. */
1020 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1021         .dev_configure = mlx5_dev_configure,
1022         .dev_start = mlx5_dev_start,
1023         .dev_stop = mlx5_dev_stop,
1024         .dev_set_link_down = mlx5_set_link_down,
1025         .dev_set_link_up = mlx5_set_link_up,
1026         .dev_close = mlx5_dev_close,
1027         .promiscuous_enable = mlx5_promiscuous_enable,
1028         .promiscuous_disable = mlx5_promiscuous_disable,
1029         .allmulticast_enable = mlx5_allmulticast_enable,
1030         .allmulticast_disable = mlx5_allmulticast_disable,
1031         .link_update = mlx5_link_update,
1032         .stats_get = mlx5_stats_get,
1033         .stats_reset = mlx5_stats_reset,
1034         .xstats_get = mlx5_xstats_get,
1035         .xstats_reset = mlx5_xstats_reset,
1036         .xstats_get_names = mlx5_xstats_get_names,
1037         .fw_version_get = mlx5_fw_version_get,
1038         .dev_infos_get = mlx5_dev_infos_get,
1039         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1040         .vlan_filter_set = mlx5_vlan_filter_set,
1041         .rx_queue_setup = mlx5_rx_queue_setup,
1042         .tx_queue_setup = mlx5_tx_queue_setup,
1043         .rx_queue_release = mlx5_rx_queue_release,
1044         .tx_queue_release = mlx5_tx_queue_release,
1045         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1046         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1047         .mac_addr_remove = mlx5_mac_addr_remove,
1048         .mac_addr_add = mlx5_mac_addr_add,
1049         .mac_addr_set = mlx5_mac_addr_set,
1050         .set_mc_addr_list = mlx5_set_mc_addr_list,
1051         .mtu_set = mlx5_dev_set_mtu,
1052         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1053         .vlan_offload_set = mlx5_vlan_offload_set,
1054         .filter_ctrl = mlx5_dev_filter_ctrl,
1055         .rx_descriptor_status = mlx5_rx_descriptor_status,
1056         .tx_descriptor_status = mlx5_tx_descriptor_status,
1057         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1058         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1059         .is_removed = mlx5_is_removed,
1060         .get_module_info = mlx5_get_module_info,
1061         .get_module_eeprom = mlx5_get_module_eeprom,
1062 };
1063
1064 /**
1065  * Verify and store value for device argument.
1066  *
1067  * @param[in] key
1068  *   Key argument to verify.
1069  * @param[in] val
1070  *   Value associated with key.
1071  * @param opaque
1072  *   User data.
1073  *
1074  * @return
1075  *   0 on success, a negative errno value otherwise and rte_errno is set.
1076  */
1077 static int
1078 mlx5_args_check(const char *key, const char *val, void *opaque)
1079 {
1080         struct mlx5_dev_config *config = opaque;
1081         unsigned long tmp;
1082
1083         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1084         if (!strcmp(MLX5_REPRESENTOR, key))
1085                 return 0;
1086         errno = 0;
1087         tmp = strtoul(val, NULL, 0);
1088         if (errno) {
1089                 rte_errno = errno;
1090                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1091                 return -rte_errno;
1092         }
1093         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1094                 config->cqe_comp = !!tmp;
1095         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1096                 config->cqe_pad = !!tmp;
1097         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1098                 config->hw_padding = !!tmp;
1099         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1100                 config->mprq.enabled = !!tmp;
1101         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1102                 config->mprq.stride_num_n = tmp;
1103         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1104                 config->mprq.max_memcpy_len = tmp;
1105         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1106                 config->mprq.min_rxqs_num = tmp;
1107         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1108                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1109                                  " converted to txq_inline_max", key);
1110                 config->txq_inline_max = tmp;
1111         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1112                 config->txq_inline_max = tmp;
1113         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1114                 config->txq_inline_min = tmp;
1115         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1116                 config->txq_inline_mpw = tmp;
1117         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1118                 config->txqs_inline = tmp;
1119         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1120                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1121         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1122                 config->mps = !!tmp;
1123         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1124                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1125         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1126                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1127                                  " converted to txq_inline_mpw", key);
1128                 config->txq_inline_mpw = tmp;
1129         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1130                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1131         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1132                 config->rx_vec_en = !!tmp;
1133         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1134                 config->l3_vxlan_en = !!tmp;
1135         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1136                 config->vf_nl_en = !!tmp;
1137         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1138                 config->dv_esw_en = !!tmp;
1139         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1140                 config->dv_flow_en = !!tmp;
1141         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1142                 config->mr_ext_memseg_en = !!tmp;
1143         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1144                 config->max_dump_files_num = tmp;
1145         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1146                 config->lro.timeout = tmp;
1147         } else {
1148                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1149                 rte_errno = EINVAL;
1150                 return -rte_errno;
1151         }
1152         return 0;
1153 }
1154
1155 /**
1156  * Parse device parameters.
1157  *
1158  * @param config
1159  *   Pointer to device configuration structure.
1160  * @param devargs
1161  *   Device arguments structure.
1162  *
1163  * @return
1164  *   0 on success, a negative errno value otherwise and rte_errno is set.
1165  */
1166 static int
1167 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1168 {
1169         const char **params = (const char *[]){
1170                 MLX5_RXQ_CQE_COMP_EN,
1171                 MLX5_RXQ_CQE_PAD_EN,
1172                 MLX5_RXQ_PKT_PAD_EN,
1173                 MLX5_RX_MPRQ_EN,
1174                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1175                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1176                 MLX5_RXQS_MIN_MPRQ,
1177                 MLX5_TXQ_INLINE,
1178                 MLX5_TXQ_INLINE_MIN,
1179                 MLX5_TXQ_INLINE_MAX,
1180                 MLX5_TXQ_INLINE_MPW,
1181                 MLX5_TXQS_MIN_INLINE,
1182                 MLX5_TXQS_MAX_VEC,
1183                 MLX5_TXQ_MPW_EN,
1184                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1185                 MLX5_TXQ_MAX_INLINE_LEN,
1186                 MLX5_TX_VEC_EN,
1187                 MLX5_RX_VEC_EN,
1188                 MLX5_L3_VXLAN_EN,
1189                 MLX5_VF_NL_EN,
1190                 MLX5_DV_ESW_EN,
1191                 MLX5_DV_FLOW_EN,
1192                 MLX5_MR_EXT_MEMSEG_EN,
1193                 MLX5_REPRESENTOR,
1194                 MLX5_MAX_DUMP_FILES_NUM,
1195                 MLX5_LRO_TIMEOUT_USEC,
1196                 NULL,
1197         };
1198         struct rte_kvargs *kvlist;
1199         int ret = 0;
1200         int i;
1201
1202         if (devargs == NULL)
1203                 return 0;
1204         /* Following UGLY cast is done to pass checkpatch. */
1205         kvlist = rte_kvargs_parse(devargs->args, params);
1206         if (kvlist == NULL) {
1207                 rte_errno = EINVAL;
1208                 return -rte_errno;
1209         }
1210         /* Process parameters. */
1211         for (i = 0; (params[i] != NULL); ++i) {
1212                 if (rte_kvargs_count(kvlist, params[i])) {
1213                         ret = rte_kvargs_process(kvlist, params[i],
1214                                                  mlx5_args_check, config);
1215                         if (ret) {
1216                                 rte_errno = EINVAL;
1217                                 rte_kvargs_free(kvlist);
1218                                 return -rte_errno;
1219                         }
1220                 }
1221         }
1222         rte_kvargs_free(kvlist);
1223         return 0;
1224 }
1225
1226 static struct rte_pci_driver mlx5_driver;
1227
1228 /**
1229  * PMD global initialization.
1230  *
1231  * Independent from individual device, this function initializes global
1232  * per-PMD data structures distinguishing primary and secondary processes.
1233  * Hence, each initialization is called once per a process.
1234  *
1235  * @return
1236  *   0 on success, a negative errno value otherwise and rte_errno is set.
1237  */
1238 static int
1239 mlx5_init_once(void)
1240 {
1241         struct mlx5_shared_data *sd;
1242         struct mlx5_local_data *ld = &mlx5_local_data;
1243         int ret = 0;
1244
1245         if (mlx5_init_shared_data())
1246                 return -rte_errno;
1247         sd = mlx5_shared_data;
1248         assert(sd);
1249         rte_spinlock_lock(&sd->lock);
1250         switch (rte_eal_process_type()) {
1251         case RTE_PROC_PRIMARY:
1252                 if (sd->init_done)
1253                         break;
1254                 LIST_INIT(&sd->mem_event_cb_list);
1255                 rte_rwlock_init(&sd->mem_event_rwlock);
1256                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1257                                                 mlx5_mr_mem_event_cb, NULL);
1258                 ret = mlx5_mp_init_primary();
1259                 if (ret)
1260                         goto out;
1261                 sd->init_done = true;
1262                 break;
1263         case RTE_PROC_SECONDARY:
1264                 if (ld->init_done)
1265                         break;
1266                 ret = mlx5_mp_init_secondary();
1267                 if (ret)
1268                         goto out;
1269                 ++sd->secondary_cnt;
1270                 ld->init_done = true;
1271                 break;
1272         default:
1273                 break;
1274         }
1275 out:
1276         rte_spinlock_unlock(&sd->lock);
1277         return ret;
1278 }
1279
1280 /**
1281  * Configures the minimal amount of data to inline into WQE
1282  * while sending packets.
1283  *
1284  * - the txq_inline_min has the maximal priority, if this
1285  *   key is specified in devargs
1286  * - if DevX is enabled the inline mode is queried from the
1287  *   device (HCA attributes and NIC vport context if needed).
1288  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1289  *   and none (0 bytes) for other NICs
1290  *
1291  * @param spawn
1292  *   Verbs device parameters (name, port, switch_info) to spawn.
1293  * @param config
1294  *   Device configuration parameters.
1295  */
1296 static void
1297 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1298                     struct mlx5_dev_config *config)
1299 {
1300         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1301                 /* Application defines size of inlined data explicitly. */
1302                 switch (spawn->pci_dev->id.device_id) {
1303                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1304                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1305                         if (config->txq_inline_min <
1306                                        (int)MLX5_INLINE_HSIZE_L2) {
1307                                 DRV_LOG(DEBUG,
1308                                         "txq_inline_mix aligned to minimal"
1309                                         " ConnectX-4 required value %d",
1310                                         (int)MLX5_INLINE_HSIZE_L2);
1311                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1312                         }
1313                         break;
1314                 }
1315                 goto exit;
1316         }
1317         if (config->hca_attr.eth_net_offloads) {
1318                 /* We have DevX enabled, inline mode queried successfully. */
1319                 switch (config->hca_attr.wqe_inline_mode) {
1320                 case MLX5_CAP_INLINE_MODE_L2:
1321                         /* outer L2 header must be inlined. */
1322                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1323                         goto exit;
1324                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1325                         /* No inline data are required by NIC. */
1326                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1327                         config->hw_vlan_insert =
1328                                 config->hca_attr.wqe_vlan_insert;
1329                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1330                         goto exit;
1331                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1332                         /* inline mode is defined by NIC vport context. */
1333                         if (!config->hca_attr.eth_virt)
1334                                 break;
1335                         switch (config->hca_attr.vport_inline_mode) {
1336                         case MLX5_INLINE_MODE_NONE:
1337                                 config->txq_inline_min =
1338                                         MLX5_INLINE_HSIZE_NONE;
1339                                 goto exit;
1340                         case MLX5_INLINE_MODE_L2:
1341                                 config->txq_inline_min =
1342                                         MLX5_INLINE_HSIZE_L2;
1343                                 goto exit;
1344                         case MLX5_INLINE_MODE_IP:
1345                                 config->txq_inline_min =
1346                                         MLX5_INLINE_HSIZE_L3;
1347                                 goto exit;
1348                         case MLX5_INLINE_MODE_TCP_UDP:
1349                                 config->txq_inline_min =
1350                                         MLX5_INLINE_HSIZE_L4;
1351                                 goto exit;
1352                         case MLX5_INLINE_MODE_INNER_L2:
1353                                 config->txq_inline_min =
1354                                         MLX5_INLINE_HSIZE_INNER_L2;
1355                                 goto exit;
1356                         case MLX5_INLINE_MODE_INNER_IP:
1357                                 config->txq_inline_min =
1358                                         MLX5_INLINE_HSIZE_INNER_L3;
1359                                 goto exit;
1360                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1361                                 config->txq_inline_min =
1362                                         MLX5_INLINE_HSIZE_INNER_L4;
1363                                 goto exit;
1364                         }
1365                 }
1366         }
1367         /*
1368          * We get here if we are unable to deduce
1369          * inline data size with DevX. Try PCI ID
1370          * to determine old NICs.
1371          */
1372         switch (spawn->pci_dev->id.device_id) {
1373         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1374         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1375         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1376         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1377                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1378                 config->hw_vlan_insert = 0;
1379                 break;
1380         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1381         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1382         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1383         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1384                 /*
1385                  * These NICs support VLAN insertion from WQE and
1386                  * report the wqe_vlan_insert flag. But there is the bug
1387                  * and PFC control may be broken, so disable feature.
1388                  */
1389                 config->hw_vlan_insert = 0;
1390                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1391                 break;
1392         default:
1393                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1394                 break;
1395         }
1396 exit:
1397         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1398 }
1399
1400 /**
1401  * Allocate page of door-bells and register it using DevX API.
1402  *
1403  * @param [in] dev
1404  *   Pointer to Ethernet device.
1405  *
1406  * @return
1407  *   Pointer to new page on success, NULL otherwise.
1408  */
1409 static struct mlx5_devx_dbr_page *
1410 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1411 {
1412         struct mlx5_priv *priv = dev->data->dev_private;
1413         struct mlx5_devx_dbr_page *page;
1414
1415         /* Allocate space for door-bell page and management data. */
1416         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1417                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1418         if (!page) {
1419                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1420                         dev->data->port_id);
1421                 return NULL;
1422         }
1423         /* Register allocated memory. */
1424         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1425                                               MLX5_DBR_PAGE_SIZE, 0);
1426         if (!page->umem) {
1427                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1428                         dev->data->port_id);
1429                 rte_free(page);
1430                 return NULL;
1431         }
1432         return page;
1433 }
1434
1435 /**
1436  * Find the next available door-bell, allocate new page if needed.
1437  *
1438  * @param [in] dev
1439  *   Pointer to Ethernet device.
1440  * @param [out] dbr_page
1441  *   Door-bell page containing the page data.
1442  *
1443  * @return
1444  *   Door-bell address offset on success, a negative error value otherwise.
1445  */
1446 int64_t
1447 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1448 {
1449         struct mlx5_priv *priv = dev->data->dev_private;
1450         struct mlx5_devx_dbr_page *page = NULL;
1451         uint32_t i, j;
1452
1453         LIST_FOREACH(page, &priv->dbrpgs, next)
1454                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1455                         break;
1456         if (!page) { /* No page with free door-bell exists. */
1457                 page = mlx5_alloc_dbr_page(dev);
1458                 if (!page) /* Failed to allocate new page. */
1459                         return (-1);
1460                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1461         }
1462         /* Loop to find bitmap part with clear bit. */
1463         for (i = 0;
1464              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1465              i++)
1466                 ; /* Empty. */
1467         /* Find the first clear bit. */
1468         j = rte_bsf64(~page->dbr_bitmap[i]);
1469         assert(i < (MLX5_DBR_PER_PAGE / 64));
1470         page->dbr_bitmap[i] |= (1 << j);
1471         page->dbr_count++;
1472         *dbr_page = page;
1473         return (((i * 64) + j) * sizeof(uint64_t));
1474 }
1475
1476 /**
1477  * Release a door-bell record.
1478  *
1479  * @param [in] dev
1480  *   Pointer to Ethernet device.
1481  * @param [in] umem_id
1482  *   UMEM ID of page containing the door-bell record to release.
1483  * @param [in] offset
1484  *   Offset of door-bell record in page.
1485  *
1486  * @return
1487  *   0 on success, a negative error value otherwise.
1488  */
1489 int32_t
1490 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1491 {
1492         struct mlx5_priv *priv = dev->data->dev_private;
1493         struct mlx5_devx_dbr_page *page = NULL;
1494         int ret = 0;
1495
1496         LIST_FOREACH(page, &priv->dbrpgs, next)
1497                 /* Find the page this address belongs to. */
1498                 if (page->umem->umem_id == umem_id)
1499                         break;
1500         if (!page)
1501                 return -EINVAL;
1502         page->dbr_count--;
1503         if (!page->dbr_count) {
1504                 /* Page not used, free it and remove from list. */
1505                 LIST_REMOVE(page, next);
1506                 if (page->umem)
1507                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1508                 rte_free(page);
1509         } else {
1510                 /* Mark in bitmap that this door-bell is not in use. */
1511                 offset /= MLX5_DBR_SIZE;
1512                 int i = offset / 64;
1513                 int j = offset % 64;
1514
1515                 page->dbr_bitmap[i] &= ~(1 << j);
1516         }
1517         return ret;
1518 }
1519
1520 /**
1521  * Check sibling device configurations.
1522  *
1523  * Sibling devices sharing the Infiniband device context
1524  * should have compatible configurations. This regards
1525  * representors and bonding slaves.
1526  *
1527  * @param priv
1528  *   Private device descriptor.
1529  * @param config
1530  *   Configuration of the device is going to be created.
1531  *
1532  * @return
1533  *   0 on success, EINVAL otherwise
1534  */
1535 static int
1536 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1537                               struct mlx5_dev_config *config)
1538 {
1539         struct mlx5_ibv_shared *sh = priv->sh;
1540         struct mlx5_dev_config *sh_conf = NULL;
1541         uint16_t port_id;
1542
1543         assert(sh);
1544         /* Nothing to compare for the single/first device. */
1545         if (sh->refcnt == 1)
1546                 return 0;
1547         /* Find the device with shared context. */
1548         MLX5_ETH_FOREACH_DEV(port_id) {
1549                 struct mlx5_priv *opriv =
1550                         rte_eth_devices[port_id].data->dev_private;
1551
1552                 if (opriv && opriv != priv && opriv->sh == sh) {
1553                         sh_conf = &opriv->config;
1554                         break;
1555                 }
1556         }
1557         if (!sh_conf)
1558                 return 0;
1559         if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1560                 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1561                              " for shared %s context", sh->ibdev_name);
1562                 rte_errno = EINVAL;
1563                 return rte_errno;
1564         }
1565         return 0;
1566 }
1567 /**
1568  * Spawn an Ethernet device from Verbs information.
1569  *
1570  * @param dpdk_dev
1571  *   Backing DPDK device.
1572  * @param spawn
1573  *   Verbs device parameters (name, port, switch_info) to spawn.
1574  * @param config
1575  *   Device configuration parameters.
1576  *
1577  * @return
1578  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1579  *   is set. The following errors are defined:
1580  *
1581  *   EBUSY: device is not supposed to be spawned.
1582  *   EEXIST: device is already spawned
1583  */
1584 static struct rte_eth_dev *
1585 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1586                struct mlx5_dev_spawn_data *spawn,
1587                struct mlx5_dev_config config)
1588 {
1589         const struct mlx5_switch_info *switch_info = &spawn->info;
1590         struct mlx5_ibv_shared *sh = NULL;
1591         struct ibv_port_attr port_attr;
1592         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1593         struct rte_eth_dev *eth_dev = NULL;
1594         struct mlx5_priv *priv = NULL;
1595         int err = 0;
1596         unsigned int hw_padding = 0;
1597         unsigned int mps;
1598         unsigned int cqe_comp;
1599         unsigned int cqe_pad = 0;
1600         unsigned int tunnel_en = 0;
1601         unsigned int mpls_en = 0;
1602         unsigned int swp = 0;
1603         unsigned int mprq = 0;
1604         unsigned int mprq_min_stride_size_n = 0;
1605         unsigned int mprq_max_stride_size_n = 0;
1606         unsigned int mprq_min_stride_num_n = 0;
1607         unsigned int mprq_max_stride_num_n = 0;
1608         struct rte_ether_addr mac;
1609         char name[RTE_ETH_NAME_MAX_LEN];
1610         int own_domain_id = 0;
1611         uint16_t port_id;
1612         unsigned int i;
1613 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1614         struct mlx5dv_devx_port devx_port;
1615 #endif
1616
1617         /* Determine if this port representor is supposed to be spawned. */
1618         if (switch_info->representor && dpdk_dev->devargs) {
1619                 struct rte_eth_devargs eth_da;
1620
1621                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1622                 if (err) {
1623                         rte_errno = -err;
1624                         DRV_LOG(ERR, "failed to process device arguments: %s",
1625                                 strerror(rte_errno));
1626                         return NULL;
1627                 }
1628                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1629                         if (eth_da.representor_ports[i] ==
1630                             (uint16_t)switch_info->port_name)
1631                                 break;
1632                 if (i == eth_da.nb_representor_ports) {
1633                         rte_errno = EBUSY;
1634                         return NULL;
1635                 }
1636         }
1637         /* Build device name. */
1638         if (spawn->pf_bond <  0) {
1639                 /* Single device. */
1640                 if (!switch_info->representor)
1641                         strlcpy(name, dpdk_dev->name, sizeof(name));
1642                 else
1643                         snprintf(name, sizeof(name), "%s_representor_%u",
1644                                  dpdk_dev->name, switch_info->port_name);
1645         } else {
1646                 /* Bonding device. */
1647                 if (!switch_info->representor)
1648                         snprintf(name, sizeof(name), "%s_%s",
1649                                  dpdk_dev->name, spawn->ibv_dev->name);
1650                 else
1651                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
1652                                  dpdk_dev->name, spawn->ibv_dev->name,
1653                                  switch_info->port_name);
1654         }
1655         /* check if the device is already spawned */
1656         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1657                 rte_errno = EEXIST;
1658                 return NULL;
1659         }
1660         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1661         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1662                 eth_dev = rte_eth_dev_attach_secondary(name);
1663                 if (eth_dev == NULL) {
1664                         DRV_LOG(ERR, "can not attach rte ethdev");
1665                         rte_errno = ENOMEM;
1666                         return NULL;
1667                 }
1668                 eth_dev->device = dpdk_dev;
1669                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1670                 err = mlx5_proc_priv_init(eth_dev);
1671                 if (err)
1672                         return NULL;
1673                 /* Receive command fd from primary process */
1674                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1675                 if (err < 0)
1676                         return NULL;
1677                 /* Remap UAR for Tx queues. */
1678                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1679                 if (err)
1680                         return NULL;
1681                 /*
1682                  * Ethdev pointer is still required as input since
1683                  * the primary device is not accessible from the
1684                  * secondary process.
1685                  */
1686                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1687                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1688                 return eth_dev;
1689         }
1690         sh = mlx5_alloc_shared_ibctx(spawn);
1691         if (!sh)
1692                 return NULL;
1693         config.devx = sh->devx;
1694 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1695         config.dest_tir = 1;
1696 #endif
1697 #ifdef HAVE_IBV_MLX5_MOD_SWP
1698         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1699 #endif
1700         /*
1701          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1702          * as all ConnectX-5 devices.
1703          */
1704 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1705         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1706 #endif
1707 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1708         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1709 #endif
1710         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1711         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1712                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1713                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1714                         mps = MLX5_MPW_ENHANCED;
1715                 } else {
1716                         DRV_LOG(DEBUG, "MPW is supported");
1717                         mps = MLX5_MPW;
1718                 }
1719         } else {
1720                 DRV_LOG(DEBUG, "MPW isn't supported");
1721                 mps = MLX5_MPW_DISABLED;
1722         }
1723 #ifdef HAVE_IBV_MLX5_MOD_SWP
1724         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1725                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1726         DRV_LOG(DEBUG, "SWP support: %u", swp);
1727 #endif
1728         config.swp = !!swp;
1729 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1730         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1731                 struct mlx5dv_striding_rq_caps mprq_caps =
1732                         dv_attr.striding_rq_caps;
1733
1734                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1735                         mprq_caps.min_single_stride_log_num_of_bytes);
1736                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1737                         mprq_caps.max_single_stride_log_num_of_bytes);
1738                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1739                         mprq_caps.min_single_wqe_log_num_of_strides);
1740                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1741                         mprq_caps.max_single_wqe_log_num_of_strides);
1742                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1743                         mprq_caps.supported_qpts);
1744                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1745                 mprq = 1;
1746                 mprq_min_stride_size_n =
1747                         mprq_caps.min_single_stride_log_num_of_bytes;
1748                 mprq_max_stride_size_n =
1749                         mprq_caps.max_single_stride_log_num_of_bytes;
1750                 mprq_min_stride_num_n =
1751                         mprq_caps.min_single_wqe_log_num_of_strides;
1752                 mprq_max_stride_num_n =
1753                         mprq_caps.max_single_wqe_log_num_of_strides;
1754                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1755                                                    mprq_min_stride_num_n);
1756         }
1757 #endif
1758         if (RTE_CACHE_LINE_SIZE == 128 &&
1759             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1760                 cqe_comp = 0;
1761         else
1762                 cqe_comp = 1;
1763         config.cqe_comp = cqe_comp;
1764 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1765         /* Whether device supports 128B Rx CQE padding. */
1766         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1767                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1768 #endif
1769 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1770         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1771                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1772                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1773                              (dv_attr.tunnel_offloads_caps &
1774                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1775         }
1776         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1777                 tunnel_en ? "" : "not ");
1778 #else
1779         DRV_LOG(WARNING,
1780                 "tunnel offloading disabled due to old OFED/rdma-core version");
1781 #endif
1782         config.tunnel_en = tunnel_en;
1783 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1784         mpls_en = ((dv_attr.tunnel_offloads_caps &
1785                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1786                    (dv_attr.tunnel_offloads_caps &
1787                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1788         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1789                 mpls_en ? "" : "not ");
1790 #else
1791         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1792                 " old OFED/rdma-core version or firmware configuration");
1793 #endif
1794         config.mpls_en = mpls_en;
1795         /* Check port status. */
1796         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1797         if (err) {
1798                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1799                 goto error;
1800         }
1801         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1802                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1803                 err = EINVAL;
1804                 goto error;
1805         }
1806         if (port_attr.state != IBV_PORT_ACTIVE)
1807                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1808                         mlx5_glue->port_state_str(port_attr.state),
1809                         port_attr.state);
1810         /* Allocate private eth device data. */
1811         priv = rte_zmalloc("ethdev private structure",
1812                            sizeof(*priv),
1813                            RTE_CACHE_LINE_SIZE);
1814         if (priv == NULL) {
1815                 DRV_LOG(ERR, "priv allocation failure");
1816                 err = ENOMEM;
1817                 goto error;
1818         }
1819         priv->sh = sh;
1820         priv->ibv_port = spawn->ibv_port;
1821         priv->pci_dev = spawn->pci_dev;
1822         priv->mtu = RTE_ETHER_MTU;
1823 #ifndef RTE_ARCH_64
1824         /* Initialize UAR access locks for 32bit implementations. */
1825         rte_spinlock_init(&priv->uar_lock_cq);
1826         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1827                 rte_spinlock_init(&priv->uar_lock[i]);
1828 #endif
1829         /* Some internal functions rely on Netlink sockets, open them now. */
1830         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1831         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1832         priv->nl_sn = 0;
1833         priv->representor = !!switch_info->representor;
1834         priv->master = !!switch_info->master;
1835         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1836         priv->vport_meta_tag = 0;
1837         priv->vport_meta_mask = 0;
1838         priv->pf_bond = spawn->pf_bond;
1839 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1840         /*
1841          * The DevX port query API is implemented. E-Switch may use
1842          * either vport or reg_c[0] metadata register to match on
1843          * vport index. The engaged part of metadata register is
1844          * defined by mask.
1845          */
1846         devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1847                               MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1848         err = mlx5dv_query_devx_port(sh->ctx, spawn->ibv_port, &devx_port);
1849         if (err) {
1850                 DRV_LOG(WARNING, "can't query devx port %d on device %s\n",
1851                         spawn->ibv_port, spawn->ibv_dev->name);
1852                 devx_port.comp_mask = 0;
1853         }
1854         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1855                 priv->vport_meta_tag = devx_port.reg_c_0.value;
1856                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1857                 if (!priv->vport_meta_mask) {
1858                         DRV_LOG(ERR, "vport zero mask for port %d"
1859                                      " on bonding device %s\n",
1860                                      spawn->ibv_port, spawn->ibv_dev->name);
1861                         err = ENOTSUP;
1862                         goto error;
1863                 }
1864                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1865                         DRV_LOG(ERR, "invalid vport tag for port %d"
1866                                      " on bonding device %s\n",
1867                                      spawn->ibv_port, spawn->ibv_dev->name);
1868                         err = ENOTSUP;
1869                         goto error;
1870                 }
1871         } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1872                 priv->vport_id = devx_port.vport_num;
1873         } else if (spawn->pf_bond >= 0) {
1874                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1875                              " on bonding device %s\n",
1876                              spawn->ibv_port, spawn->ibv_dev->name);
1877                 err = ENOTSUP;
1878                 goto error;
1879         } else {
1880                 /* Suppose vport index in compatible way. */
1881                 priv->vport_id = switch_info->representor ?
1882                                  switch_info->port_name + 1 : -1;
1883         }
1884 #else
1885         /*
1886          * Kernel/rdma_core support single E-Switch per PF configurations
1887          * only and vport_id field contains the vport index for
1888          * associated VF, which is deduced from representor port name.
1889          * For example, let's have the IB device port 10, it has
1890          * attached network device eth0, which has port name attribute
1891          * pf0vf2, we can deduce the VF number as 2, and set vport index
1892          * as 3 (2+1). This assigning schema should be changed if the
1893          * multiple E-Switch instances per PF configurations or/and PCI
1894          * subfunctions are added.
1895          */
1896         priv->vport_id = switch_info->representor ?
1897                          switch_info->port_name + 1 : -1;
1898 #endif
1899         /* representor_id field keeps the unmodified VF index. */
1900         priv->representor_id = switch_info->representor ?
1901                                switch_info->port_name : -1;
1902         /*
1903          * Look for sibling devices in order to reuse their switch domain
1904          * if any, otherwise allocate one.
1905          */
1906         MLX5_ETH_FOREACH_DEV(port_id) {
1907                 const struct mlx5_priv *opriv =
1908                         rte_eth_devices[port_id].data->dev_private;
1909
1910                 if (!opriv ||
1911                     opriv->sh != priv->sh ||
1912                         opriv->domain_id ==
1913                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1914                         continue;
1915                 priv->domain_id = opriv->domain_id;
1916                 break;
1917         }
1918         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1919                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1920                 if (err) {
1921                         err = rte_errno;
1922                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1923                                 strerror(rte_errno));
1924                         goto error;
1925                 }
1926                 own_domain_id = 1;
1927         }
1928         err = mlx5_args(&config, dpdk_dev->devargs);
1929         if (err) {
1930                 err = rte_errno;
1931                 DRV_LOG(ERR, "failed to process device arguments: %s",
1932                         strerror(rte_errno));
1933                 goto error;
1934         }
1935         err = mlx5_dev_check_sibling_config(priv, &config);
1936         if (err)
1937                 goto error;
1938         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1939                             IBV_DEVICE_RAW_IP_CSUM);
1940         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1941                 (config.hw_csum ? "" : "not "));
1942 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1943         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1944         DRV_LOG(DEBUG, "counters are not supported");
1945 #endif
1946 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1947         if (config.dv_flow_en) {
1948                 DRV_LOG(WARNING, "DV flow is not supported");
1949                 config.dv_flow_en = 0;
1950         }
1951 #endif
1952         config.ind_table_max_size =
1953                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1954         /*
1955          * Remove this check once DPDK supports larger/variable
1956          * indirection tables.
1957          */
1958         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1959                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1960         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1961                 config.ind_table_max_size);
1962         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1963                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1964         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1965                 (config.hw_vlan_strip ? "" : "not "));
1966         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1967                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1968         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1969                 (config.hw_fcs_strip ? "" : "not "));
1970 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1971         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1972 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1973         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1974                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1975 #endif
1976         if (config.hw_padding && !hw_padding) {
1977                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1978                 config.hw_padding = 0;
1979         } else if (config.hw_padding) {
1980                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1981         }
1982         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1983                       (sh->device_attr.tso_caps.supported_qpts &
1984                        (1 << IBV_QPT_RAW_PACKET)));
1985         if (config.tso)
1986                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1987         /*
1988          * MPW is disabled by default, while the Enhanced MPW is enabled
1989          * by default.
1990          */
1991         if (config.mps == MLX5_ARG_UNSET)
1992                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1993                                                           MLX5_MPW_DISABLED;
1994         else
1995                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1996         DRV_LOG(INFO, "%sMPS is %s",
1997                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1998                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1999         if (config.cqe_comp && !cqe_comp) {
2000                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2001                 config.cqe_comp = 0;
2002         }
2003         if (config.cqe_pad && !cqe_pad) {
2004                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2005                 config.cqe_pad = 0;
2006         } else if (config.cqe_pad) {
2007                 DRV_LOG(INFO, "Rx CQE padding is enabled");
2008         }
2009         if (config.devx) {
2010                 priv->counter_fallback = 0;
2011                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2012                 if (err) {
2013                         err = -err;
2014                         goto error;
2015                 }
2016                 if (!config.hca_attr.flow_counters_dump)
2017                         priv->counter_fallback = 1;
2018 #ifndef HAVE_IBV_DEVX_ASYNC
2019                 priv->counter_fallback = 1;
2020 #endif
2021                 if (priv->counter_fallback)
2022                         DRV_LOG(INFO, "Use fall-back DV counter management\n");
2023                 /* Check for LRO support. */
2024                 if (config.dest_tir && config.hca_attr.lro_cap) {
2025                         /* TBD check tunnel lro caps. */
2026                         config.lro.supported = config.hca_attr.lro_cap;
2027                         DRV_LOG(DEBUG, "Device supports LRO");
2028                         /*
2029                          * If LRO timeout is not configured by application,
2030                          * use the minimal supported value.
2031                          */
2032                         if (!config.lro.timeout)
2033                                 config.lro.timeout =
2034                                 config.hca_attr.lro_timer_supported_periods[0];
2035                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2036                                 config.lro.timeout);
2037                 }
2038         }
2039         if (config.mprq.enabled && mprq) {
2040                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2041                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
2042                         config.mprq.stride_num_n =
2043                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2044                                         mprq_min_stride_num_n);
2045                         DRV_LOG(WARNING,
2046                                 "the number of strides"
2047                                 " for Multi-Packet RQ is out of range,"
2048                                 " setting default value (%u)",
2049                                 1 << config.mprq.stride_num_n);
2050                 }
2051                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2052                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2053         } else if (config.mprq.enabled && !mprq) {
2054                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2055                 config.mprq.enabled = 0;
2056         }
2057         if (config.max_dump_files_num == 0)
2058                 config.max_dump_files_num = 128;
2059         eth_dev = rte_eth_dev_allocate(name);
2060         if (eth_dev == NULL) {
2061                 DRV_LOG(ERR, "can not allocate rte ethdev");
2062                 err = ENOMEM;
2063                 goto error;
2064         }
2065         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2066         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2067         if (priv->representor) {
2068                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2069                 eth_dev->data->representor_id = priv->representor_id;
2070         }
2071         /*
2072          * Store associated network device interface index. This index
2073          * is permanent throughout the lifetime of device. So, we may store
2074          * the ifindex here and use the cached value further.
2075          */
2076         assert(spawn->ifindex);
2077         priv->if_index = spawn->ifindex;
2078         eth_dev->data->dev_private = priv;
2079         priv->dev_data = eth_dev->data;
2080         eth_dev->data->mac_addrs = priv->mac;
2081         eth_dev->device = dpdk_dev;
2082         /* Configure the first MAC address by default. */
2083         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2084                 DRV_LOG(ERR,
2085                         "port %u cannot get MAC address, is mlx5_en"
2086                         " loaded? (errno: %s)",
2087                         eth_dev->data->port_id, strerror(rte_errno));
2088                 err = ENODEV;
2089                 goto error;
2090         }
2091         DRV_LOG(INFO,
2092                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2093                 eth_dev->data->port_id,
2094                 mac.addr_bytes[0], mac.addr_bytes[1],
2095                 mac.addr_bytes[2], mac.addr_bytes[3],
2096                 mac.addr_bytes[4], mac.addr_bytes[5]);
2097 #ifndef NDEBUG
2098         {
2099                 char ifname[IF_NAMESIZE];
2100
2101                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2102                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2103                                 eth_dev->data->port_id, ifname);
2104                 else
2105                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2106                                 eth_dev->data->port_id);
2107         }
2108 #endif
2109         /* Get actual MTU if possible. */
2110         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2111         if (err) {
2112                 err = rte_errno;
2113                 goto error;
2114         }
2115         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2116                 priv->mtu);
2117         /* Initialize burst functions to prevent crashes before link-up. */
2118         eth_dev->rx_pkt_burst = removed_rx_burst;
2119         eth_dev->tx_pkt_burst = removed_tx_burst;
2120         eth_dev->dev_ops = &mlx5_dev_ops;
2121         /* Register MAC address. */
2122         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2123         if (config.vf && config.vf_nl_en)
2124                 mlx5_nl_mac_addr_sync(eth_dev);
2125         TAILQ_INIT(&priv->flows);
2126         TAILQ_INIT(&priv->ctrl_flows);
2127         /* Hint libmlx5 to use PMD allocator for data plane resources */
2128         struct mlx5dv_ctx_allocators alctr = {
2129                 .alloc = &mlx5_alloc_verbs_buf,
2130                 .free = &mlx5_free_verbs_buf,
2131                 .data = priv,
2132         };
2133         mlx5_glue->dv_set_context_attr(sh->ctx,
2134                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2135                                        (void *)((uintptr_t)&alctr));
2136         /* Bring Ethernet device up. */
2137         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2138                 eth_dev->data->port_id);
2139         mlx5_set_link_up(eth_dev);
2140         /*
2141          * Even though the interrupt handler is not installed yet,
2142          * interrupts will still trigger on the async_fd from
2143          * Verbs context returned by ibv_open_device().
2144          */
2145         mlx5_link_update(eth_dev, 0);
2146 #ifdef HAVE_MLX5DV_DR_ESWITCH
2147         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2148               (switch_info->representor || switch_info->master)))
2149                 config.dv_esw_en = 0;
2150 #else
2151         config.dv_esw_en = 0;
2152 #endif
2153         /* Detect minimal data bytes to inline. */
2154         mlx5_set_min_inline(spawn, &config);
2155         /* Store device configuration on private structure. */
2156         priv->config = config;
2157         /* Create context for virtual machine VLAN workaround. */
2158         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2159         if (config.dv_flow_en) {
2160                 err = mlx5_alloc_shared_dr(priv);
2161                 if (err)
2162                         goto error;
2163         }
2164         /* Supported Verbs flow priority number detection. */
2165         err = mlx5_flow_discover_priorities(eth_dev);
2166         if (err < 0) {
2167                 err = -err;
2168                 goto error;
2169         }
2170         priv->config.flow_prio = err;
2171         return eth_dev;
2172 error:
2173         if (priv) {
2174                 if (priv->sh)
2175                         mlx5_free_shared_dr(priv);
2176                 if (priv->nl_socket_route >= 0)
2177                         close(priv->nl_socket_route);
2178                 if (priv->nl_socket_rdma >= 0)
2179                         close(priv->nl_socket_rdma);
2180                 if (priv->vmwa_context)
2181                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2182                 if (own_domain_id)
2183                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2184                 rte_free(priv);
2185                 if (eth_dev != NULL)
2186                         eth_dev->data->dev_private = NULL;
2187         }
2188         if (eth_dev != NULL) {
2189                 /* mac_addrs must not be freed alone because part of dev_private */
2190                 eth_dev->data->mac_addrs = NULL;
2191                 rte_eth_dev_release_port(eth_dev);
2192         }
2193         if (sh)
2194                 mlx5_free_shared_ibctx(sh);
2195         assert(err > 0);
2196         rte_errno = err;
2197         return NULL;
2198 }
2199
2200 /**
2201  * Comparison callback to sort device data.
2202  *
2203  * This is meant to be used with qsort().
2204  *
2205  * @param a[in]
2206  *   Pointer to pointer to first data object.
2207  * @param b[in]
2208  *   Pointer to pointer to second data object.
2209  *
2210  * @return
2211  *   0 if both objects are equal, less than 0 if the first argument is less
2212  *   than the second, greater than 0 otherwise.
2213  */
2214 static int
2215 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2216 {
2217         const struct mlx5_switch_info *si_a =
2218                 &((const struct mlx5_dev_spawn_data *)a)->info;
2219         const struct mlx5_switch_info *si_b =
2220                 &((const struct mlx5_dev_spawn_data *)b)->info;
2221         int ret;
2222
2223         /* Master device first. */
2224         ret = si_b->master - si_a->master;
2225         if (ret)
2226                 return ret;
2227         /* Then representor devices. */
2228         ret = si_b->representor - si_a->representor;
2229         if (ret)
2230                 return ret;
2231         /* Unidentified devices come last in no specific order. */
2232         if (!si_a->representor)
2233                 return 0;
2234         /* Order representors by name. */
2235         return si_a->port_name - si_b->port_name;
2236 }
2237
2238 /**
2239  * Match PCI information for possible slaves of bonding device.
2240  *
2241  * @param[in] ibv_dev
2242  *   Pointer to Infiniband device structure.
2243  * @param[in] pci_dev
2244  *   Pointer to PCI device structure to match PCI address.
2245  * @param[in] nl_rdma
2246  *   Netlink RDMA group socket handle.
2247  *
2248  * @return
2249  *   negative value if no bonding device found, otherwise
2250  *   positive index of slave PF in bonding.
2251  */
2252 static int
2253 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2254                            const struct rte_pci_device *pci_dev,
2255                            int nl_rdma)
2256 {
2257         char ifname[IF_NAMESIZE + 1];
2258         unsigned int ifindex;
2259         unsigned int np, i;
2260         FILE *file = NULL;
2261         int pf = -1;
2262
2263         /*
2264          * Try to get master device name. If something goes
2265          * wrong suppose the lack of kernel support and no
2266          * bonding devices.
2267          */
2268         if (nl_rdma < 0)
2269                 return -1;
2270         if (!strstr(ibv_dev->name, "bond"))
2271                 return -1;
2272         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2273         if (!np)
2274                 return -1;
2275         /*
2276          * The Master device might not be on the predefined
2277          * port (not on port index 1, it is not garanted),
2278          * we have to scan all Infiniband device port and
2279          * find master.
2280          */
2281         for (i = 1; i <= np; ++i) {
2282                 /* Check whether Infiniband port is populated. */
2283                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2284                 if (!ifindex)
2285                         continue;
2286                 if (!if_indextoname(ifindex, ifname))
2287                         continue;
2288                 /* Try to read bonding slave names from sysfs. */
2289                 MKSTR(slaves,
2290                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2291                 file = fopen(slaves, "r");
2292                 if (file)
2293                         break;
2294         }
2295         if (!file)
2296                 return -1;
2297         /* Use safe format to check maximal buffer length. */
2298         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2299         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2300                 char tmp_str[IF_NAMESIZE + 32];
2301                 struct rte_pci_addr pci_addr;
2302                 struct mlx5_switch_info info;
2303
2304                 /* Process slave interface names in the loop. */
2305                 snprintf(tmp_str, sizeof(tmp_str),
2306                          "/sys/class/net/%s", ifname);
2307                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2308                         DRV_LOG(WARNING, "can not get PCI address"
2309                                          " for netdev \"%s\"", ifname);
2310                         continue;
2311                 }
2312                 if (pci_dev->addr.domain != pci_addr.domain ||
2313                     pci_dev->addr.bus != pci_addr.bus ||
2314                     pci_dev->addr.devid != pci_addr.devid ||
2315                     pci_dev->addr.function != pci_addr.function)
2316                         continue;
2317                 /* Slave interface PCI address match found. */
2318                 fclose(file);
2319                 snprintf(tmp_str, sizeof(tmp_str),
2320                          "/sys/class/net/%s/phys_port_name", ifname);
2321                 file = fopen(tmp_str, "rb");
2322                 if (!file)
2323                         break;
2324                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2325                 if (fscanf(file, "%32s", tmp_str) == 1)
2326                         mlx5_translate_port_name(tmp_str, &info);
2327                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2328                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2329                         pf = info.port_name;
2330                 break;
2331         }
2332         if (file)
2333                 fclose(file);
2334         return pf;
2335 }
2336
2337 /**
2338  * DPDK callback to register a PCI device.
2339  *
2340  * This function spawns Ethernet devices out of a given PCI device.
2341  *
2342  * @param[in] pci_drv
2343  *   PCI driver structure (mlx5_driver).
2344  * @param[in] pci_dev
2345  *   PCI device information.
2346  *
2347  * @return
2348  *   0 on success, a negative errno value otherwise and rte_errno is set.
2349  */
2350 static int
2351 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2352                struct rte_pci_device *pci_dev)
2353 {
2354         struct ibv_device **ibv_list;
2355         /*
2356          * Number of found IB Devices matching with requested PCI BDF.
2357          * nd != 1 means there are multiple IB devices over the same
2358          * PCI device and we have representors and master.
2359          */
2360         unsigned int nd = 0;
2361         /*
2362          * Number of found IB device Ports. nd = 1 and np = 1..n means
2363          * we have the single multiport IB device, and there may be
2364          * representors attached to some of found ports.
2365          */
2366         unsigned int np = 0;
2367         /*
2368          * Number of DPDK ethernet devices to Spawn - either over
2369          * multiple IB devices or multiple ports of single IB device.
2370          * Actually this is the number of iterations to spawn.
2371          */
2372         unsigned int ns = 0;
2373         /*
2374          * Bonding device
2375          *   < 0 - no bonding device (single one)
2376          *  >= 0 - bonding device (value is slave PF index)
2377          */
2378         int bd = -1;
2379         struct mlx5_dev_spawn_data *list = NULL;
2380         struct mlx5_dev_config dev_config;
2381         int ret;
2382
2383         ret = mlx5_init_once();
2384         if (ret) {
2385                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2386                         strerror(rte_errno));
2387                 return -rte_errno;
2388         }
2389         assert(pci_drv == &mlx5_driver);
2390         errno = 0;
2391         ibv_list = mlx5_glue->get_device_list(&ret);
2392         if (!ibv_list) {
2393                 rte_errno = errno ? errno : ENOSYS;
2394                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2395                 return -rte_errno;
2396         }
2397         /*
2398          * First scan the list of all Infiniband devices to find
2399          * matching ones, gathering into the list.
2400          */
2401         struct ibv_device *ibv_match[ret + 1];
2402         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2403         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2404         unsigned int i;
2405
2406         while (ret-- > 0) {
2407                 struct rte_pci_addr pci_addr;
2408
2409                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2410                 bd = mlx5_device_bond_pci_match
2411                                 (ibv_list[ret], pci_dev, nl_rdma);
2412                 if (bd >= 0) {
2413                         /*
2414                          * Bonding device detected. Only one match is allowed,
2415                          * the bonding is supported over multi-port IB device,
2416                          * there should be no matches on representor PCI
2417                          * functions or non VF LAG bonding devices with
2418                          * specified address.
2419                          */
2420                         if (nd) {
2421                                 DRV_LOG(ERR,
2422                                         "multiple PCI match on bonding device"
2423                                         "\"%s\" found", ibv_list[ret]->name);
2424                                 rte_errno = ENOENT;
2425                                 ret = -rte_errno;
2426                                 goto exit;
2427                         }
2428                         DRV_LOG(INFO, "PCI information matches for"
2429                                       " slave %d bonding device \"%s\"",
2430                                       bd, ibv_list[ret]->name);
2431                         ibv_match[nd++] = ibv_list[ret];
2432                         break;
2433                 }
2434                 if (mlx5_dev_to_pci_addr
2435                         (ibv_list[ret]->ibdev_path, &pci_addr))
2436                         continue;
2437                 if (pci_dev->addr.domain != pci_addr.domain ||
2438                     pci_dev->addr.bus != pci_addr.bus ||
2439                     pci_dev->addr.devid != pci_addr.devid ||
2440                     pci_dev->addr.function != pci_addr.function)
2441                         continue;
2442                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2443                         ibv_list[ret]->name);
2444                 ibv_match[nd++] = ibv_list[ret];
2445         }
2446         ibv_match[nd] = NULL;
2447         if (!nd) {
2448                 /* No device matches, just complain and bail out. */
2449                 DRV_LOG(WARNING,
2450                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2451                         " are kernel drivers loaded?",
2452                         pci_dev->addr.domain, pci_dev->addr.bus,
2453                         pci_dev->addr.devid, pci_dev->addr.function);
2454                 rte_errno = ENOENT;
2455                 ret = -rte_errno;
2456                 goto exit;
2457         }
2458         if (nd == 1) {
2459                 /*
2460                  * Found single matching device may have multiple ports.
2461                  * Each port may be representor, we have to check the port
2462                  * number and check the representors existence.
2463                  */
2464                 if (nl_rdma >= 0)
2465                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2466                 if (!np)
2467                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2468                                          " ports number", ibv_match[0]->name);
2469                 if (bd >= 0 && !np) {
2470                         DRV_LOG(ERR, "can not get ports"
2471                                      " for bonding device");
2472                         rte_errno = ENOENT;
2473                         ret = -rte_errno;
2474                         goto exit;
2475                 }
2476         }
2477 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2478         if (bd >= 0) {
2479                 /*
2480                  * This may happen if there is VF LAG kernel support and
2481                  * application is compiled with older rdma_core library.
2482                  */
2483                 DRV_LOG(ERR,
2484                         "No kernel/verbs support for VF LAG bonding found.");
2485                 rte_errno = ENOTSUP;
2486                 ret = -rte_errno;
2487                 goto exit;
2488         }
2489 #endif
2490         /*
2491          * Now we can determine the maximal
2492          * amount of devices to be spawned.
2493          */
2494         list = rte_zmalloc("device spawn data",
2495                          sizeof(struct mlx5_dev_spawn_data) *
2496                          (np ? np : nd),
2497                          RTE_CACHE_LINE_SIZE);
2498         if (!list) {
2499                 DRV_LOG(ERR, "spawn data array allocation failure");
2500                 rte_errno = ENOMEM;
2501                 ret = -rte_errno;
2502                 goto exit;
2503         }
2504         if (bd >= 0 || np > 1) {
2505                 /*
2506                  * Single IB device with multiple ports found,
2507                  * it may be E-Switch master device and representors.
2508                  * We have to perform identification trough the ports.
2509                  */
2510                 assert(nl_rdma >= 0);
2511                 assert(ns == 0);
2512                 assert(nd == 1);
2513                 assert(np);
2514                 for (i = 1; i <= np; ++i) {
2515                         list[ns].max_port = np;
2516                         list[ns].ibv_port = i;
2517                         list[ns].ibv_dev = ibv_match[0];
2518                         list[ns].eth_dev = NULL;
2519                         list[ns].pci_dev = pci_dev;
2520                         list[ns].pf_bond = bd;
2521                         list[ns].ifindex = mlx5_nl_ifindex
2522                                         (nl_rdma, list[ns].ibv_dev->name, i);
2523                         if (!list[ns].ifindex) {
2524                                 /*
2525                                  * No network interface index found for the
2526                                  * specified port, it means there is no
2527                                  * representor on this port. It's OK,
2528                                  * there can be disabled ports, for example
2529                                  * if sriov_numvfs < sriov_totalvfs.
2530                                  */
2531                                 continue;
2532                         }
2533                         ret = -1;
2534                         if (nl_route >= 0)
2535                                 ret = mlx5_nl_switch_info
2536                                                (nl_route,
2537                                                 list[ns].ifindex,
2538                                                 &list[ns].info);
2539                         if (ret || (!list[ns].info.representor &&
2540                                     !list[ns].info.master)) {
2541                                 /*
2542                                  * We failed to recognize representors with
2543                                  * Netlink, let's try to perform the task
2544                                  * with sysfs.
2545                                  */
2546                                 ret =  mlx5_sysfs_switch_info
2547                                                 (list[ns].ifindex,
2548                                                  &list[ns].info);
2549                         }
2550                         if (!ret && bd >= 0) {
2551                                 switch (list[ns].info.name_type) {
2552                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2553                                         if (list[ns].info.port_name == bd)
2554                                                 ns++;
2555                                         break;
2556                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2557                                         if (list[ns].info.pf_num == bd)
2558                                                 ns++;
2559                                         break;
2560                                 default:
2561                                         break;
2562                                 }
2563                                 continue;
2564                         }
2565                         if (!ret && (list[ns].info.representor ^
2566                                      list[ns].info.master))
2567                                 ns++;
2568                 }
2569                 if (!ns) {
2570                         DRV_LOG(ERR,
2571                                 "unable to recognize master/representors"
2572                                 " on the IB device with multiple ports");
2573                         rte_errno = ENOENT;
2574                         ret = -rte_errno;
2575                         goto exit;
2576                 }
2577         } else {
2578                 /*
2579                  * The existence of several matching entries (nd > 1) means
2580                  * port representors have been instantiated. No existing Verbs
2581                  * call nor sysfs entries can tell them apart, this can only
2582                  * be done through Netlink calls assuming kernel drivers are
2583                  * recent enough to support them.
2584                  *
2585                  * In the event of identification failure through Netlink,
2586                  * try again through sysfs, then:
2587                  *
2588                  * 1. A single IB device matches (nd == 1) with single
2589                  *    port (np=0/1) and is not a representor, assume
2590                  *    no switch support.
2591                  *
2592                  * 2. Otherwise no safe assumptions can be made;
2593                  *    complain louder and bail out.
2594                  */
2595                 np = 1;
2596                 for (i = 0; i != nd; ++i) {
2597                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2598                         list[ns].max_port = 1;
2599                         list[ns].ibv_port = 1;
2600                         list[ns].ibv_dev = ibv_match[i];
2601                         list[ns].eth_dev = NULL;
2602                         list[ns].pci_dev = pci_dev;
2603                         list[ns].pf_bond = -1;
2604                         list[ns].ifindex = 0;
2605                         if (nl_rdma >= 0)
2606                                 list[ns].ifindex = mlx5_nl_ifindex
2607                                         (nl_rdma, list[ns].ibv_dev->name, 1);
2608                         if (!list[ns].ifindex) {
2609                                 char ifname[IF_NAMESIZE];
2610
2611                                 /*
2612                                  * Netlink failed, it may happen with old
2613                                  * ib_core kernel driver (before 4.16).
2614                                  * We can assume there is old driver because
2615                                  * here we are processing single ports IB
2616                                  * devices. Let's try sysfs to retrieve
2617                                  * the ifindex. The method works for
2618                                  * master device only.
2619                                  */
2620                                 if (nd > 1) {
2621                                         /*
2622                                          * Multiple devices found, assume
2623                                          * representors, can not distinguish
2624                                          * master/representor and retrieve
2625                                          * ifindex via sysfs.
2626                                          */
2627                                         continue;
2628                                 }
2629                                 ret = mlx5_get_master_ifname
2630                                         (ibv_match[i]->ibdev_path, &ifname);
2631                                 if (!ret)
2632                                         list[ns].ifindex =
2633                                                 if_nametoindex(ifname);
2634                                 if (!list[ns].ifindex) {
2635                                         /*
2636                                          * No network interface index found
2637                                          * for the specified device, it means
2638                                          * there it is neither representor
2639                                          * nor master.
2640                                          */
2641                                         continue;
2642                                 }
2643                         }
2644                         ret = -1;
2645                         if (nl_route >= 0)
2646                                 ret = mlx5_nl_switch_info
2647                                                (nl_route,
2648                                                 list[ns].ifindex,
2649                                                 &list[ns].info);
2650                         if (ret || (!list[ns].info.representor &&
2651                                     !list[ns].info.master)) {
2652                                 /*
2653                                  * We failed to recognize representors with
2654                                  * Netlink, let's try to perform the task
2655                                  * with sysfs.
2656                                  */
2657                                 ret =  mlx5_sysfs_switch_info
2658                                                 (list[ns].ifindex,
2659                                                  &list[ns].info);
2660                         }
2661                         if (!ret && (list[ns].info.representor ^
2662                                      list[ns].info.master)) {
2663                                 ns++;
2664                         } else if ((nd == 1) &&
2665                                    !list[ns].info.representor &&
2666                                    !list[ns].info.master) {
2667                                 /*
2668                                  * Single IB device with
2669                                  * one physical port and
2670                                  * attached network device.
2671                                  * May be SRIOV is not enabled
2672                                  * or there is no representors.
2673                                  */
2674                                 DRV_LOG(INFO, "no E-Switch support detected");
2675                                 ns++;
2676                                 break;
2677                         }
2678                 }
2679                 if (!ns) {
2680                         DRV_LOG(ERR,
2681                                 "unable to recognize master/representors"
2682                                 " on the multiple IB devices");
2683                         rte_errno = ENOENT;
2684                         ret = -rte_errno;
2685                         goto exit;
2686                 }
2687         }
2688         assert(ns);
2689         /*
2690          * Sort list to probe devices in natural order for users convenience
2691          * (i.e. master first, then representors from lowest to highest ID).
2692          */
2693         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2694         /* Default configuration. */
2695         dev_config = (struct mlx5_dev_config){
2696                 .hw_padding = 0,
2697                 .mps = MLX5_ARG_UNSET,
2698                 .rx_vec_en = 1,
2699                 .txq_inline_max = MLX5_ARG_UNSET,
2700                 .txq_inline_min = MLX5_ARG_UNSET,
2701                 .txq_inline_mpw = MLX5_ARG_UNSET,
2702                 .txqs_inline = MLX5_ARG_UNSET,
2703                 .vf_nl_en = 1,
2704                 .mr_ext_memseg_en = 1,
2705                 .mprq = {
2706                         .enabled = 0, /* Disabled by default. */
2707                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2708                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2709                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2710                 },
2711                 .dv_esw_en = 1,
2712         };
2713         /* Device specific configuration. */
2714         switch (pci_dev->id.device_id) {
2715         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2716         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2717         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2718         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2719         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2720         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2721                 dev_config.vf = 1;
2722                 break;
2723         default:
2724                 break;
2725         }
2726         for (i = 0; i != ns; ++i) {
2727                 uint32_t restore;
2728
2729                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2730                                                  &list[i],
2731                                                  dev_config);
2732                 if (!list[i].eth_dev) {
2733                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2734                                 break;
2735                         /* Device is disabled or already spawned. Ignore it. */
2736                         continue;
2737                 }
2738                 restore = list[i].eth_dev->data->dev_flags;
2739                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2740                 /* Restore non-PCI flags cleared by the above call. */
2741                 list[i].eth_dev->data->dev_flags |= restore;
2742                 rte_eth_dev_probing_finish(list[i].eth_dev);
2743         }
2744         if (i != ns) {
2745                 DRV_LOG(ERR,
2746                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2747                         " encountering an error: %s",
2748                         pci_dev->addr.domain, pci_dev->addr.bus,
2749                         pci_dev->addr.devid, pci_dev->addr.function,
2750                         strerror(rte_errno));
2751                 ret = -rte_errno;
2752                 /* Roll back. */
2753                 while (i--) {
2754                         if (!list[i].eth_dev)
2755                                 continue;
2756                         mlx5_dev_close(list[i].eth_dev);
2757                         /* mac_addrs must not be freed because in dev_private */
2758                         list[i].eth_dev->data->mac_addrs = NULL;
2759                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2760                 }
2761                 /* Restore original error. */
2762                 rte_errno = -ret;
2763         } else {
2764                 ret = 0;
2765         }
2766 exit:
2767         /*
2768          * Do the routine cleanup:
2769          * - close opened Netlink sockets
2770          * - free allocated spawn data array
2771          * - free the Infiniband device list
2772          */
2773         if (nl_rdma >= 0)
2774                 close(nl_rdma);
2775         if (nl_route >= 0)
2776                 close(nl_route);
2777         if (list)
2778                 rte_free(list);
2779         assert(ibv_list);
2780         mlx5_glue->free_device_list(ibv_list);
2781         return ret;
2782 }
2783
2784 uint16_t
2785 mlx5_eth_find_next(uint16_t port_id)
2786 {
2787         while (port_id < RTE_MAX_ETHPORTS) {
2788                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2789
2790                 if (dev->state != RTE_ETH_DEV_UNUSED &&
2791                     dev->device &&
2792                     dev->device->driver &&
2793                     dev->device->driver->name &&
2794                     !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))
2795                         break;
2796                 port_id++;
2797         }
2798         if (port_id >= RTE_MAX_ETHPORTS)
2799                 return RTE_MAX_ETHPORTS;
2800         return port_id;
2801 }
2802
2803 /**
2804  * DPDK callback to remove a PCI device.
2805  *
2806  * This function removes all Ethernet devices belong to a given PCI device.
2807  *
2808  * @param[in] pci_dev
2809  *   Pointer to the PCI device.
2810  *
2811  * @return
2812  *   0 on success, the function cannot fail.
2813  */
2814 static int
2815 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2816 {
2817         uint16_t port_id;
2818
2819         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2820                 rte_eth_dev_close(port_id);
2821         return 0;
2822 }
2823
2824 static const struct rte_pci_id mlx5_pci_id_map[] = {
2825         {
2826                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2827                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2828         },
2829         {
2830                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2831                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2832         },
2833         {
2834                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2835                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2836         },
2837         {
2838                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2839                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2840         },
2841         {
2842                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2843                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2844         },
2845         {
2846                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2847                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2848         },
2849         {
2850                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2851                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2852         },
2853         {
2854                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2855                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2856         },
2857         {
2858                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2859                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2860         },
2861         {
2862                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2863                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2864         },
2865         {
2866                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2867                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2868         },
2869         {
2870                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2871                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2872         },
2873         {
2874                 .vendor_id = 0
2875         }
2876 };
2877
2878 static struct rte_pci_driver mlx5_driver = {
2879         .driver = {
2880                 .name = MLX5_DRIVER_NAME
2881         },
2882         .id_table = mlx5_pci_id_map,
2883         .probe = mlx5_pci_probe,
2884         .remove = mlx5_pci_remove,
2885         .dma_map = mlx5_dma_map,
2886         .dma_unmap = mlx5_dma_unmap,
2887         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2888                      RTE_PCI_DRV_PROBE_AGAIN,
2889 };
2890
2891 #ifdef RTE_IBVERBS_LINK_DLOPEN
2892
2893 /**
2894  * Suffix RTE_EAL_PMD_PATH with "-glue".
2895  *
2896  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2897  * suffixing its last component.
2898  *
2899  * @param buf[out]
2900  *   Output buffer, should be large enough otherwise NULL is returned.
2901  * @param size
2902  *   Size of @p out.
2903  *
2904  * @return
2905  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2906  */
2907 static char *
2908 mlx5_glue_path(char *buf, size_t size)
2909 {
2910         static const char *const bad[] = { "/", ".", "..", NULL };
2911         const char *path = RTE_EAL_PMD_PATH;
2912         size_t len = strlen(path);
2913         size_t off;
2914         int i;
2915
2916         while (len && path[len - 1] == '/')
2917                 --len;
2918         for (off = len; off && path[off - 1] != '/'; --off)
2919                 ;
2920         for (i = 0; bad[i]; ++i)
2921                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2922                         goto error;
2923         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2924         if (i == -1 || (size_t)i >= size)
2925                 goto error;
2926         return buf;
2927 error:
2928         DRV_LOG(ERR,
2929                 "unable to append \"-glue\" to last component of"
2930                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2931                 " please re-configure DPDK");
2932         return NULL;
2933 }
2934
2935 /**
2936  * Initialization routine for run-time dependency on rdma-core.
2937  */
2938 static int
2939 mlx5_glue_init(void)
2940 {
2941         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2942         const char *path[] = {
2943                 /*
2944                  * A basic security check is necessary before trusting
2945                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2946                  */
2947                 (geteuid() == getuid() && getegid() == getgid() ?
2948                  getenv("MLX5_GLUE_PATH") : NULL),
2949                 /*
2950                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2951                  * variant, otherwise let dlopen() look up libraries on its
2952                  * own.
2953                  */
2954                 (*RTE_EAL_PMD_PATH ?
2955                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2956         };
2957         unsigned int i = 0;
2958         void *handle = NULL;
2959         void **sym;
2960         const char *dlmsg;
2961
2962         while (!handle && i != RTE_DIM(path)) {
2963                 const char *end;
2964                 size_t len;
2965                 int ret;
2966
2967                 if (!path[i]) {
2968                         ++i;
2969                         continue;
2970                 }
2971                 end = strpbrk(path[i], ":;");
2972                 if (!end)
2973                         end = path[i] + strlen(path[i]);
2974                 len = end - path[i];
2975                 ret = 0;
2976                 do {
2977                         char name[ret + 1];
2978
2979                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2980                                        (int)len, path[i],
2981                                        (!len || *(end - 1) == '/') ? "" : "/");
2982                         if (ret == -1)
2983                                 break;
2984                         if (sizeof(name) != (size_t)ret + 1)
2985                                 continue;
2986                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2987                                 name);
2988                         handle = dlopen(name, RTLD_LAZY);
2989                         break;
2990                 } while (1);
2991                 path[i] = end + 1;
2992                 if (!*end)
2993                         ++i;
2994         }
2995         if (!handle) {
2996                 rte_errno = EINVAL;
2997                 dlmsg = dlerror();
2998                 if (dlmsg)
2999                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3000                 goto glue_error;
3001         }
3002         sym = dlsym(handle, "mlx5_glue");
3003         if (!sym || !*sym) {
3004                 rte_errno = EINVAL;
3005                 dlmsg = dlerror();
3006                 if (dlmsg)
3007                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3008                 goto glue_error;
3009         }
3010         mlx5_glue = *sym;
3011         return 0;
3012 glue_error:
3013         if (handle)
3014                 dlclose(handle);
3015         DRV_LOG(WARNING,
3016                 "cannot initialize PMD due to missing run-time dependency on"
3017                 " rdma-core libraries (libibverbs, libmlx5)");
3018         return -rte_errno;
3019 }
3020
3021 #endif
3022
3023 /**
3024  * Driver initialization routine.
3025  */
3026 RTE_INIT(rte_mlx5_pmd_init)
3027 {
3028         /* Initialize driver log type. */
3029         mlx5_logtype = rte_log_register("pmd.net.mlx5");
3030         if (mlx5_logtype >= 0)
3031                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3032
3033         /* Build the static tables for Verbs conversion. */
3034         mlx5_set_ptype_table();
3035         mlx5_set_cksum_table();
3036         mlx5_set_swp_types_table();
3037         /*
3038          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3039          * huge pages. Calling ibv_fork_init() during init allows
3040          * applications to use fork() safely for purposes other than
3041          * using this PMD, which is not supported in forked processes.
3042          */
3043         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3044         /* Match the size of Rx completion entry to the size of a cacheline. */
3045         if (RTE_CACHE_LINE_SIZE == 128)
3046                 setenv("MLX5_CQE_SIZE", "128", 0);
3047         /*
3048          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3049          * cleanup all the Verbs resources even when the device was removed.
3050          */
3051         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3052 #ifdef RTE_IBVERBS_LINK_DLOPEN
3053         if (mlx5_glue_init())
3054                 return;
3055         assert(mlx5_glue);
3056 #endif
3057 #ifndef NDEBUG
3058         /* Glue structure must not contain any NULL pointers. */
3059         {
3060                 unsigned int i;
3061
3062                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3063                         assert(((const void *const *)mlx5_glue)[i]);
3064         }
3065 #endif
3066         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3067                 DRV_LOG(ERR,
3068                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3069                         mlx5_glue->version, MLX5_GLUE_VERSION);
3070                 return;
3071         }
3072         mlx5_glue->fork_init();
3073         rte_pci_register(&mlx5_driver);
3074 }
3075
3076 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3077 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3078 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");