1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to include 2 dsegs in the title WQEBB.
100 * Deprecated, ignored.
102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
105 * Device parameter to limit the size of inlining packet.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
111 * Device parameter to enable hardware Tx vector.
112 * Deprecated, ignored (no vectorized Tx routines anymore).
114 #define MLX5_TX_VEC_EN "tx_vec_en"
116 /* Device parameter to enable hardware Rx vector. */
117 #define MLX5_RX_VEC_EN "rx_vec_en"
119 /* Allow L3 VXLAN flow creation. */
120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
122 /* Activate DV E-Switch flow steering. */
123 #define MLX5_DV_ESW_EN "dv_esw_en"
125 /* Activate DV flow steering. */
126 #define MLX5_DV_FLOW_EN "dv_flow_en"
128 /* Enable extensive flow metadata support. */
129 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
131 /* Activate Netlink support in VF mode. */
132 #define MLX5_VF_NL_EN "vf_nl_en"
134 /* Enable extending memsegs when creating a MR. */
135 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
137 /* Select port representors to instantiate. */
138 #define MLX5_REPRESENTOR "representor"
140 /* Device parameter to configure the maximum number of dump files per queue. */
141 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
143 /* Configure timeout of LRO session (in microseconds). */
144 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
146 #ifndef HAVE_IBV_MLX5_MOD_MPW
147 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
148 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
151 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
152 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
155 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
157 /* Shared memory between primary and secondary processes. */
158 struct mlx5_shared_data *mlx5_shared_data;
160 /* Spinlock for mlx5_shared_data allocation. */
161 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
163 /* Process local data for secondary processes. */
164 static struct mlx5_local_data mlx5_local_data;
166 /** Driver-specific log messages type. */
169 /** Data associated with devices to spawn. */
170 struct mlx5_dev_spawn_data {
171 uint32_t ifindex; /**< Network interface index. */
172 uint32_t max_port; /**< IB device maximal port index. */
173 uint32_t ibv_port; /**< IB device physical port index. */
174 int pf_bond; /**< bonding device PF index. < 0 - no bonding */
175 struct mlx5_switch_info info; /**< Switch information. */
176 struct ibv_device *ibv_dev; /**< Associated IB device. */
177 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
178 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
181 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
182 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
184 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
185 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
188 * Allocate ID pool structure.
191 * Pointer to pool object, NULL value otherwise.
193 struct mlx5_flow_id_pool *
194 mlx5_flow_id_pool_alloc(void)
196 struct mlx5_flow_id_pool *pool;
199 pool = rte_zmalloc("id pool allocation", sizeof(*pool),
200 RTE_CACHE_LINE_SIZE);
202 DRV_LOG(ERR, "can't allocate id pool");
206 mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
207 RTE_CACHE_LINE_SIZE);
209 DRV_LOG(ERR, "can't allocate mem for id pool");
213 pool->free_arr = mem;
214 pool->curr = pool->free_arr;
215 pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
216 pool->base_index = 0;
224 * Release ID pool structure.
227 * Pointer to flow id pool object to free.
230 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
232 rte_free(pool->free_arr);
240 * Pointer to flow id pool.
245 * 0 on success, error value otherwise.
248 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
250 if (pool->curr == pool->free_arr) {
251 if (pool->base_index == UINT32_MAX) {
253 DRV_LOG(ERR, "no free id");
256 *id = ++pool->base_index;
259 *id = *(--pool->curr);
267 * Pointer to flow id pool.
272 * 0 on success, error value otherwise.
275 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
281 if (pool->curr == pool->last) {
282 size = pool->curr - pool->free_arr;
283 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
284 assert(size2 > size);
285 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
287 DRV_LOG(ERR, "can't allocate mem for id pool");
291 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
292 rte_free(pool->free_arr);
293 pool->free_arr = mem;
294 pool->curr = pool->free_arr + size;
295 pool->last = pool->free_arr + size2;
303 * Initialize the counters management structure.
306 * Pointer to mlx5_ibv_shared object to free
309 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
313 TAILQ_INIT(&sh->cmng.flow_counters);
314 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
315 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
319 * Destroy all the resources allocated for a counter memory management.
322 * Pointer to the memory management structure.
325 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
327 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
329 LIST_REMOVE(mng, next);
330 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
331 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
336 * Close and release all the resources of the counters management.
339 * Pointer to mlx5_ibv_shared object to free.
342 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
344 struct mlx5_counter_stats_mem_mng *mng;
351 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
352 if (rte_errno != EINPROGRESS)
356 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
357 struct mlx5_flow_counter_pool *pool;
358 uint32_t batch = !!(i % 2);
360 if (!sh->cmng.ccont[i].pools)
362 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
367 (mlx5_devx_cmd_destroy(pool->min_dcs));
369 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
370 if (pool->counters_raw[j].action)
372 (mlx5_glue->destroy_flow_action
373 (pool->counters_raw[j].action));
374 if (!batch && pool->counters_raw[j].dcs)
375 claim_zero(mlx5_devx_cmd_destroy
376 (pool->counters_raw[j].dcs));
378 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
381 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
383 rte_free(sh->cmng.ccont[i].pools);
385 mng = LIST_FIRST(&sh->cmng.mem_mngs);
387 mlx5_flow_destroy_counter_stat_mem_mng(mng);
388 mng = LIST_FIRST(&sh->cmng.mem_mngs);
390 memset(&sh->cmng, 0, sizeof(sh->cmng));
394 * Extract pdn of PD object using DV API.
397 * Pointer to the verbs PD object.
399 * Pointer to the PD object number variable.
402 * 0 on success, error value otherwise.
404 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
406 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
408 struct mlx5dv_obj obj;
409 struct mlx5dv_pd pd_info;
413 obj.pd.out = &pd_info;
414 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
416 DRV_LOG(DEBUG, "Fail to get PD object info");
422 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
425 * Allocate shared IB device context. If there is multiport device the
426 * master and representors will share this context, if there is single
427 * port dedicated IB device, the context will be used by only given
428 * port due to unification.
430 * Routine first searches the context for the specified IB device name,
431 * if found the shared context assumed and reference counter is incremented.
432 * If no context found the new one is created and initialized with specified
433 * IB device context and parameters.
436 * Pointer to the IB device attributes (name, port, etc).
439 * Pointer to mlx5_ibv_shared object on success,
440 * otherwise NULL and rte_errno is set.
442 static struct mlx5_ibv_shared *
443 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
445 struct mlx5_ibv_shared *sh;
448 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
449 struct mlx5_devx_tis_attr tis_attr = { 0 };
453 /* Secondary process should not create the shared context. */
454 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
455 pthread_mutex_lock(&mlx5_ibv_list_mutex);
456 /* Search for IB context by device name. */
457 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
458 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
463 /* No device found, we have to create new shared context. */
464 assert(spawn->max_port);
465 sh = rte_zmalloc("ethdev shared ib context",
466 sizeof(struct mlx5_ibv_shared) +
468 sizeof(struct mlx5_ibv_shared_port),
469 RTE_CACHE_LINE_SIZE);
471 DRV_LOG(ERR, "shared context allocation failure");
475 /* Try to open IB device with DV first, then usual Verbs. */
477 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
480 DRV_LOG(DEBUG, "DevX is supported");
482 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
484 err = errno ? errno : ENODEV;
487 DRV_LOG(DEBUG, "DevX is NOT supported");
489 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
491 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
495 sh->max_port = spawn->max_port;
496 strncpy(sh->ibdev_name, sh->ctx->device->name,
497 sizeof(sh->ibdev_name));
498 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
499 sizeof(sh->ibdev_path));
500 pthread_mutex_init(&sh->intr_mutex, NULL);
502 * Setting port_id to max unallowed value means
503 * there is no interrupt subhandler installed for
504 * the given port index i.
506 for (i = 0; i < sh->max_port; i++) {
507 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
508 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
510 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
511 if (sh->pd == NULL) {
512 DRV_LOG(ERR, "PD allocation failure");
516 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
518 err = mlx5_get_pdn(sh->pd, &sh->pdn);
520 DRV_LOG(ERR, "Fail to extract pdn from PD");
523 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
525 DRV_LOG(ERR, "TD allocation failure");
529 tis_attr.transport_domain = sh->td->id;
530 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
532 DRV_LOG(ERR, "TIS allocation failure");
537 sh->flow_id_pool = mlx5_flow_id_pool_alloc();
538 if (!sh->flow_id_pool) {
539 DRV_LOG(ERR, "can't create flow id pool");
543 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
545 * Once the device is added to the list of memory event
546 * callback, its global MR cache table cannot be expanded
547 * on the fly because of deadlock. If it overflows, lookup
548 * should be done by searching MR list linearly, which is slow.
550 * At this point the device is not added to the memory
551 * event list yet, context is just being created.
553 err = mlx5_mr_btree_init(&sh->mr.cache,
554 MLX5_MR_BTREE_CACHE_N * 2,
555 spawn->pci_dev->device.numa_node);
560 mlx5_flow_counters_mng_init(sh);
561 /* Add device to memory callback list. */
562 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
563 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
565 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
566 /* Add context to the global device list. */
567 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
569 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
572 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
575 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
577 claim_zero(mlx5_devx_cmd_destroy(sh->td));
579 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
581 claim_zero(mlx5_glue->close_device(sh->ctx));
582 if (sh->flow_id_pool)
583 mlx5_flow_id_pool_release(sh->flow_id_pool);
591 * Free shared IB device context. Decrement counter and if zero free
592 * all allocated resources and close handles.
595 * Pointer to mlx5_ibv_shared object to free
598 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
600 pthread_mutex_lock(&mlx5_ibv_list_mutex);
602 /* Check the object presence in the list. */
603 struct mlx5_ibv_shared *lctx;
605 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
610 DRV_LOG(ERR, "Freeing non-existing shared IB context");
616 /* Secondary process should not free the shared context. */
617 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
620 /* Release created Memory Regions. */
622 /* Remove from memory callback device list. */
623 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
624 LIST_REMOVE(sh, mem_event_cb);
625 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
626 /* Remove context from the global device list. */
627 LIST_REMOVE(sh, next);
629 * Ensure there is no async event handler installed.
630 * Only primary process handles async device events.
632 mlx5_flow_counters_mng_close(sh);
633 assert(!sh->intr_cnt);
635 mlx5_intr_callback_unregister
636 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
637 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
638 if (sh->devx_intr_cnt) {
639 if (sh->intr_handle_devx.fd)
640 rte_intr_callback_unregister(&sh->intr_handle_devx,
641 mlx5_dev_interrupt_handler_devx, sh);
643 mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
646 pthread_mutex_destroy(&sh->intr_mutex);
648 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
650 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
652 claim_zero(mlx5_devx_cmd_destroy(sh->td));
654 claim_zero(mlx5_glue->close_device(sh->ctx));
655 if (sh->flow_id_pool)
656 mlx5_flow_id_pool_release(sh->flow_id_pool);
659 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
663 * Initialize DR related data within private structure.
664 * Routine checks the reference counter and does actual
665 * resources creation/initialization only if counter is zero.
668 * Pointer to the private device data structure.
671 * Zero on success, positive error code otherwise.
674 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
676 #ifdef HAVE_MLX5DV_DR
677 struct mlx5_ibv_shared *sh = priv->sh;
683 /* Shared DV/DR structures is already initialized. */
688 /* Reference counter is zero, we should initialize structures. */
689 domain = mlx5_glue->dr_create_domain(sh->ctx,
690 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
692 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
696 sh->rx_domain = domain;
697 domain = mlx5_glue->dr_create_domain(sh->ctx,
698 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
700 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
704 pthread_mutex_init(&sh->dv_mutex, NULL);
705 sh->tx_domain = domain;
706 #ifdef HAVE_MLX5DV_DR_ESWITCH
707 if (priv->config.dv_esw_en) {
708 domain = mlx5_glue->dr_create_domain
709 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
711 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
715 sh->fdb_domain = domain;
716 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
719 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
725 /* Rollback the created objects. */
727 mlx5_glue->dr_destroy_domain(sh->rx_domain);
728 sh->rx_domain = NULL;
731 mlx5_glue->dr_destroy_domain(sh->tx_domain);
732 sh->tx_domain = NULL;
734 if (sh->fdb_domain) {
735 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
736 sh->fdb_domain = NULL;
738 if (sh->esw_drop_action) {
739 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
740 sh->esw_drop_action = NULL;
742 if (sh->pop_vlan_action) {
743 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
744 sh->pop_vlan_action = NULL;
754 * Destroy DR related data within private structure.
757 * Pointer to the private device data structure.
760 mlx5_free_shared_dr(struct mlx5_priv *priv)
762 #ifdef HAVE_MLX5DV_DR
763 struct mlx5_ibv_shared *sh;
765 if (!priv->dr_shared)
770 assert(sh->dv_refcnt);
771 if (sh->dv_refcnt && --sh->dv_refcnt)
774 mlx5_glue->dr_destroy_domain(sh->rx_domain);
775 sh->rx_domain = NULL;
778 mlx5_glue->dr_destroy_domain(sh->tx_domain);
779 sh->tx_domain = NULL;
781 #ifdef HAVE_MLX5DV_DR_ESWITCH
782 if (sh->fdb_domain) {
783 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
784 sh->fdb_domain = NULL;
786 if (sh->esw_drop_action) {
787 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
788 sh->esw_drop_action = NULL;
791 if (sh->pop_vlan_action) {
792 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
793 sh->pop_vlan_action = NULL;
795 pthread_mutex_destroy(&sh->dv_mutex);
802 * Initialize shared data between primary and secondary process.
804 * A memzone is reserved by primary process and secondary processes attach to
808 * 0 on success, a negative errno value otherwise and rte_errno is set.
811 mlx5_init_shared_data(void)
813 const struct rte_memzone *mz;
816 rte_spinlock_lock(&mlx5_shared_data_lock);
817 if (mlx5_shared_data == NULL) {
818 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
819 /* Allocate shared memory. */
820 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
821 sizeof(*mlx5_shared_data),
825 "Cannot allocate mlx5 shared data");
829 mlx5_shared_data = mz->addr;
830 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
831 rte_spinlock_init(&mlx5_shared_data->lock);
833 /* Lookup allocated shared memory. */
834 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
837 "Cannot attach mlx5 shared data");
841 mlx5_shared_data = mz->addr;
842 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
846 rte_spinlock_unlock(&mlx5_shared_data_lock);
851 * Retrieve integer value from environment variable.
854 * Environment variable name.
857 * Integer value, 0 if the variable is not set.
860 mlx5_getenv_int(const char *name)
862 const char *val = getenv(name);
870 * Verbs callback to allocate a memory. This function should allocate the space
871 * according to the size provided residing inside a huge page.
872 * Please note that all allocation must respect the alignment from libmlx5
873 * (i.e. currently sysconf(_SC_PAGESIZE)).
876 * The size in bytes of the memory to allocate.
878 * A pointer to the callback data.
881 * Allocated buffer, NULL otherwise and rte_errno is set.
884 mlx5_alloc_verbs_buf(size_t size, void *data)
886 struct mlx5_priv *priv = data;
888 size_t alignment = sysconf(_SC_PAGESIZE);
889 unsigned int socket = SOCKET_ID_ANY;
891 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
892 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
894 socket = ctrl->socket;
895 } else if (priv->verbs_alloc_ctx.type ==
896 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
897 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
899 socket = ctrl->socket;
901 assert(data != NULL);
902 ret = rte_malloc_socket(__func__, size, alignment, socket);
909 * Verbs callback to free a memory.
912 * A pointer to the memory to free.
914 * A pointer to the callback data.
917 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
919 assert(data != NULL);
924 * DPDK callback to add udp tunnel port
927 * A pointer to eth_dev
928 * @param[in] udp_tunnel
929 * A pointer to udp tunnel
932 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
935 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
936 struct rte_eth_udp_tunnel *udp_tunnel)
938 assert(udp_tunnel != NULL);
939 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
940 udp_tunnel->udp_port == 4789)
942 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
943 udp_tunnel->udp_port == 4790)
949 * Initialize process private data structure.
952 * Pointer to Ethernet device structure.
955 * 0 on success, a negative errno value otherwise and rte_errno is set.
958 mlx5_proc_priv_init(struct rte_eth_dev *dev)
960 struct mlx5_priv *priv = dev->data->dev_private;
961 struct mlx5_proc_priv *ppriv;
965 * UAR register table follows the process private structure. BlueFlame
966 * registers for Tx queues are stored in the table.
969 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
970 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
971 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
976 ppriv->uar_table_sz = ppriv_size;
977 dev->process_private = ppriv;
982 * Un-initialize process private data structure.
985 * Pointer to Ethernet device structure.
988 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
990 if (!dev->process_private)
992 rte_free(dev->process_private);
993 dev->process_private = NULL;
997 * DPDK callback to close the device.
999 * Destroy all queues and objects, free memory.
1002 * Pointer to Ethernet device structure.
1005 mlx5_dev_close(struct rte_eth_dev *dev)
1007 struct mlx5_priv *priv = dev->data->dev_private;
1011 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1013 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1014 /* In case mlx5_dev_stop() has not been called. */
1015 mlx5_dev_interrupt_handler_uninstall(dev);
1016 mlx5_dev_interrupt_handler_devx_uninstall(dev);
1017 mlx5_traffic_disable(dev);
1018 mlx5_flow_flush(dev, NULL);
1019 /* Prevent crashes when queues are still in use. */
1020 dev->rx_pkt_burst = removed_rx_burst;
1021 dev->tx_pkt_burst = removed_tx_burst;
1023 /* Disable datapath on secondary process. */
1024 mlx5_mp_req_stop_rxtx(dev);
1025 if (priv->rxqs != NULL) {
1026 /* XXX race condition if mlx5_rx_burst() is still running. */
1028 for (i = 0; (i != priv->rxqs_n); ++i)
1029 mlx5_rxq_release(dev, i);
1033 if (priv->txqs != NULL) {
1034 /* XXX race condition if mlx5_tx_burst() is still running. */
1036 for (i = 0; (i != priv->txqs_n); ++i)
1037 mlx5_txq_release(dev, i);
1041 mlx5_proc_priv_uninit(dev);
1042 if (priv->mreg_cp_tbl)
1043 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1044 mlx5_mprq_free_mp(dev);
1045 mlx5_free_shared_dr(priv);
1046 if (priv->rss_conf.rss_key != NULL)
1047 rte_free(priv->rss_conf.rss_key);
1048 if (priv->reta_idx != NULL)
1049 rte_free(priv->reta_idx);
1050 if (priv->config.vf)
1051 mlx5_nl_mac_addr_flush(dev);
1052 if (priv->nl_socket_route >= 0)
1053 close(priv->nl_socket_route);
1054 if (priv->nl_socket_rdma >= 0)
1055 close(priv->nl_socket_rdma);
1056 if (priv->vmwa_context)
1057 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1060 * Free the shared context in last turn, because the cleanup
1061 * routines above may use some shared fields, like
1062 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1063 * ifindex if Netlink fails.
1065 mlx5_free_shared_ibctx(priv->sh);
1068 ret = mlx5_hrxq_verify(dev);
1070 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1071 dev->data->port_id);
1072 ret = mlx5_ind_table_obj_verify(dev);
1074 DRV_LOG(WARNING, "port %u some indirection table still remain",
1075 dev->data->port_id);
1076 ret = mlx5_rxq_obj_verify(dev);
1078 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1079 dev->data->port_id);
1080 ret = mlx5_rxq_verify(dev);
1082 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1083 dev->data->port_id);
1084 ret = mlx5_txq_obj_verify(dev);
1086 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1087 dev->data->port_id);
1088 ret = mlx5_txq_verify(dev);
1090 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1091 dev->data->port_id);
1092 ret = mlx5_flow_verify(dev);
1094 DRV_LOG(WARNING, "port %u some flows still remain",
1095 dev->data->port_id);
1096 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1100 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1101 struct mlx5_priv *opriv =
1102 rte_eth_devices[port_id].data->dev_private;
1105 opriv->domain_id != priv->domain_id ||
1106 &rte_eth_devices[port_id] == dev)
1112 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1114 memset(priv, 0, sizeof(*priv));
1115 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1117 * Reset mac_addrs to NULL such that it is not freed as part of
1118 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1119 * it is freed when dev_private is freed.
1121 dev->data->mac_addrs = NULL;
1124 const struct eth_dev_ops mlx5_dev_ops = {
1125 .dev_configure = mlx5_dev_configure,
1126 .dev_start = mlx5_dev_start,
1127 .dev_stop = mlx5_dev_stop,
1128 .dev_set_link_down = mlx5_set_link_down,
1129 .dev_set_link_up = mlx5_set_link_up,
1130 .dev_close = mlx5_dev_close,
1131 .promiscuous_enable = mlx5_promiscuous_enable,
1132 .promiscuous_disable = mlx5_promiscuous_disable,
1133 .allmulticast_enable = mlx5_allmulticast_enable,
1134 .allmulticast_disable = mlx5_allmulticast_disable,
1135 .link_update = mlx5_link_update,
1136 .stats_get = mlx5_stats_get,
1137 .stats_reset = mlx5_stats_reset,
1138 .xstats_get = mlx5_xstats_get,
1139 .xstats_reset = mlx5_xstats_reset,
1140 .xstats_get_names = mlx5_xstats_get_names,
1141 .fw_version_get = mlx5_fw_version_get,
1142 .dev_infos_get = mlx5_dev_infos_get,
1143 .read_clock = mlx5_read_clock,
1144 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1145 .vlan_filter_set = mlx5_vlan_filter_set,
1146 .rx_queue_setup = mlx5_rx_queue_setup,
1147 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1148 .tx_queue_setup = mlx5_tx_queue_setup,
1149 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1150 .rx_queue_release = mlx5_rx_queue_release,
1151 .tx_queue_release = mlx5_tx_queue_release,
1152 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1153 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1154 .mac_addr_remove = mlx5_mac_addr_remove,
1155 .mac_addr_add = mlx5_mac_addr_add,
1156 .mac_addr_set = mlx5_mac_addr_set,
1157 .set_mc_addr_list = mlx5_set_mc_addr_list,
1158 .mtu_set = mlx5_dev_set_mtu,
1159 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1160 .vlan_offload_set = mlx5_vlan_offload_set,
1161 .reta_update = mlx5_dev_rss_reta_update,
1162 .reta_query = mlx5_dev_rss_reta_query,
1163 .rss_hash_update = mlx5_rss_hash_update,
1164 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1165 .filter_ctrl = mlx5_dev_filter_ctrl,
1166 .rx_descriptor_status = mlx5_rx_descriptor_status,
1167 .tx_descriptor_status = mlx5_tx_descriptor_status,
1168 .rx_queue_count = mlx5_rx_queue_count,
1169 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1170 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1171 .is_removed = mlx5_is_removed,
1172 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
1173 .get_module_info = mlx5_get_module_info,
1174 .get_module_eeprom = mlx5_get_module_eeprom,
1175 .hairpin_cap_get = mlx5_hairpin_cap_get,
1176 .mtr_ops_get = mlx5_flow_meter_ops_get,
1179 /* Available operations from secondary process. */
1180 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1181 .stats_get = mlx5_stats_get,
1182 .stats_reset = mlx5_stats_reset,
1183 .xstats_get = mlx5_xstats_get,
1184 .xstats_reset = mlx5_xstats_reset,
1185 .xstats_get_names = mlx5_xstats_get_names,
1186 .fw_version_get = mlx5_fw_version_get,
1187 .dev_infos_get = mlx5_dev_infos_get,
1188 .rx_descriptor_status = mlx5_rx_descriptor_status,
1189 .tx_descriptor_status = mlx5_tx_descriptor_status,
1190 .get_module_info = mlx5_get_module_info,
1191 .get_module_eeprom = mlx5_get_module_eeprom,
1194 /* Available operations in flow isolated mode. */
1195 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1196 .dev_configure = mlx5_dev_configure,
1197 .dev_start = mlx5_dev_start,
1198 .dev_stop = mlx5_dev_stop,
1199 .dev_set_link_down = mlx5_set_link_down,
1200 .dev_set_link_up = mlx5_set_link_up,
1201 .dev_close = mlx5_dev_close,
1202 .promiscuous_enable = mlx5_promiscuous_enable,
1203 .promiscuous_disable = mlx5_promiscuous_disable,
1204 .allmulticast_enable = mlx5_allmulticast_enable,
1205 .allmulticast_disable = mlx5_allmulticast_disable,
1206 .link_update = mlx5_link_update,
1207 .stats_get = mlx5_stats_get,
1208 .stats_reset = mlx5_stats_reset,
1209 .xstats_get = mlx5_xstats_get,
1210 .xstats_reset = mlx5_xstats_reset,
1211 .xstats_get_names = mlx5_xstats_get_names,
1212 .fw_version_get = mlx5_fw_version_get,
1213 .dev_infos_get = mlx5_dev_infos_get,
1214 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1215 .vlan_filter_set = mlx5_vlan_filter_set,
1216 .rx_queue_setup = mlx5_rx_queue_setup,
1217 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1218 .tx_queue_setup = mlx5_tx_queue_setup,
1219 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1220 .rx_queue_release = mlx5_rx_queue_release,
1221 .tx_queue_release = mlx5_tx_queue_release,
1222 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1223 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1224 .mac_addr_remove = mlx5_mac_addr_remove,
1225 .mac_addr_add = mlx5_mac_addr_add,
1226 .mac_addr_set = mlx5_mac_addr_set,
1227 .set_mc_addr_list = mlx5_set_mc_addr_list,
1228 .mtu_set = mlx5_dev_set_mtu,
1229 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1230 .vlan_offload_set = mlx5_vlan_offload_set,
1231 .filter_ctrl = mlx5_dev_filter_ctrl,
1232 .rx_descriptor_status = mlx5_rx_descriptor_status,
1233 .tx_descriptor_status = mlx5_tx_descriptor_status,
1234 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1235 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1236 .is_removed = mlx5_is_removed,
1237 .get_module_info = mlx5_get_module_info,
1238 .get_module_eeprom = mlx5_get_module_eeprom,
1239 .hairpin_cap_get = mlx5_hairpin_cap_get,
1240 .mtr_ops_get = mlx5_flow_meter_ops_get,
1244 * Verify and store value for device argument.
1247 * Key argument to verify.
1249 * Value associated with key.
1254 * 0 on success, a negative errno value otherwise and rte_errno is set.
1257 mlx5_args_check(const char *key, const char *val, void *opaque)
1259 struct mlx5_dev_config *config = opaque;
1262 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1263 if (!strcmp(MLX5_REPRESENTOR, key))
1266 tmp = strtoul(val, NULL, 0);
1269 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1272 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1273 config->cqe_comp = !!tmp;
1274 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1275 config->cqe_pad = !!tmp;
1276 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1277 config->hw_padding = !!tmp;
1278 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1279 config->mprq.enabled = !!tmp;
1280 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1281 config->mprq.stride_num_n = tmp;
1282 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1283 config->mprq.max_memcpy_len = tmp;
1284 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1285 config->mprq.min_rxqs_num = tmp;
1286 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1287 DRV_LOG(WARNING, "%s: deprecated parameter,"
1288 " converted to txq_inline_max", key);
1289 config->txq_inline_max = tmp;
1290 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1291 config->txq_inline_max = tmp;
1292 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1293 config->txq_inline_min = tmp;
1294 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1295 config->txq_inline_mpw = tmp;
1296 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1297 config->txqs_inline = tmp;
1298 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1299 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1300 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1301 config->mps = !!tmp;
1302 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1303 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1304 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1305 DRV_LOG(WARNING, "%s: deprecated parameter,"
1306 " converted to txq_inline_mpw", key);
1307 config->txq_inline_mpw = tmp;
1308 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1309 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1310 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1311 config->rx_vec_en = !!tmp;
1312 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1313 config->l3_vxlan_en = !!tmp;
1314 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1315 config->vf_nl_en = !!tmp;
1316 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1317 config->dv_esw_en = !!tmp;
1318 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1319 config->dv_flow_en = !!tmp;
1320 } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1321 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1322 tmp != MLX5_XMETA_MODE_META16 &&
1323 tmp != MLX5_XMETA_MODE_META32) {
1324 DRV_LOG(WARNING, "invalid extensive "
1325 "metadata parameter");
1329 config->dv_xmeta_en = tmp;
1330 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1331 config->mr_ext_memseg_en = !!tmp;
1332 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1333 config->max_dump_files_num = tmp;
1334 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1335 config->lro.timeout = tmp;
1337 DRV_LOG(WARNING, "%s: unknown parameter", key);
1345 * Parse device parameters.
1348 * Pointer to device configuration structure.
1350 * Device arguments structure.
1353 * 0 on success, a negative errno value otherwise and rte_errno is set.
1356 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1358 const char **params = (const char *[]){
1359 MLX5_RXQ_CQE_COMP_EN,
1360 MLX5_RXQ_CQE_PAD_EN,
1361 MLX5_RXQ_PKT_PAD_EN,
1363 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1364 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1367 MLX5_TXQ_INLINE_MIN,
1368 MLX5_TXQ_INLINE_MAX,
1369 MLX5_TXQ_INLINE_MPW,
1370 MLX5_TXQS_MIN_INLINE,
1373 MLX5_TXQ_MPW_HDR_DSEG_EN,
1374 MLX5_TXQ_MAX_INLINE_LEN,
1382 MLX5_MR_EXT_MEMSEG_EN,
1384 MLX5_MAX_DUMP_FILES_NUM,
1385 MLX5_LRO_TIMEOUT_USEC,
1388 struct rte_kvargs *kvlist;
1392 if (devargs == NULL)
1394 /* Following UGLY cast is done to pass checkpatch. */
1395 kvlist = rte_kvargs_parse(devargs->args, params);
1396 if (kvlist == NULL) {
1400 /* Process parameters. */
1401 for (i = 0; (params[i] != NULL); ++i) {
1402 if (rte_kvargs_count(kvlist, params[i])) {
1403 ret = rte_kvargs_process(kvlist, params[i],
1404 mlx5_args_check, config);
1407 rte_kvargs_free(kvlist);
1412 rte_kvargs_free(kvlist);
1416 static struct rte_pci_driver mlx5_driver;
1419 * PMD global initialization.
1421 * Independent from individual device, this function initializes global
1422 * per-PMD data structures distinguishing primary and secondary processes.
1423 * Hence, each initialization is called once per a process.
1426 * 0 on success, a negative errno value otherwise and rte_errno is set.
1429 mlx5_init_once(void)
1431 struct mlx5_shared_data *sd;
1432 struct mlx5_local_data *ld = &mlx5_local_data;
1435 if (mlx5_init_shared_data())
1437 sd = mlx5_shared_data;
1439 rte_spinlock_lock(&sd->lock);
1440 switch (rte_eal_process_type()) {
1441 case RTE_PROC_PRIMARY:
1444 LIST_INIT(&sd->mem_event_cb_list);
1445 rte_rwlock_init(&sd->mem_event_rwlock);
1446 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1447 mlx5_mr_mem_event_cb, NULL);
1448 ret = mlx5_mp_init_primary();
1451 sd->init_done = true;
1453 case RTE_PROC_SECONDARY:
1456 ret = mlx5_mp_init_secondary();
1459 ++sd->secondary_cnt;
1460 ld->init_done = true;
1466 rte_spinlock_unlock(&sd->lock);
1471 * Configures the minimal amount of data to inline into WQE
1472 * while sending packets.
1474 * - the txq_inline_min has the maximal priority, if this
1475 * key is specified in devargs
1476 * - if DevX is enabled the inline mode is queried from the
1477 * device (HCA attributes and NIC vport context if needed).
1478 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1479 * and none (0 bytes) for other NICs
1482 * Verbs device parameters (name, port, switch_info) to spawn.
1484 * Device configuration parameters.
1487 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1488 struct mlx5_dev_config *config)
1490 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1491 /* Application defines size of inlined data explicitly. */
1492 switch (spawn->pci_dev->id.device_id) {
1493 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1494 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1495 if (config->txq_inline_min <
1496 (int)MLX5_INLINE_HSIZE_L2) {
1498 "txq_inline_mix aligned to minimal"
1499 " ConnectX-4 required value %d",
1500 (int)MLX5_INLINE_HSIZE_L2);
1501 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1507 if (config->hca_attr.eth_net_offloads) {
1508 /* We have DevX enabled, inline mode queried successfully. */
1509 switch (config->hca_attr.wqe_inline_mode) {
1510 case MLX5_CAP_INLINE_MODE_L2:
1511 /* outer L2 header must be inlined. */
1512 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1514 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1515 /* No inline data are required by NIC. */
1516 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1517 config->hw_vlan_insert =
1518 config->hca_attr.wqe_vlan_insert;
1519 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1521 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1522 /* inline mode is defined by NIC vport context. */
1523 if (!config->hca_attr.eth_virt)
1525 switch (config->hca_attr.vport_inline_mode) {
1526 case MLX5_INLINE_MODE_NONE:
1527 config->txq_inline_min =
1528 MLX5_INLINE_HSIZE_NONE;
1530 case MLX5_INLINE_MODE_L2:
1531 config->txq_inline_min =
1532 MLX5_INLINE_HSIZE_L2;
1534 case MLX5_INLINE_MODE_IP:
1535 config->txq_inline_min =
1536 MLX5_INLINE_HSIZE_L3;
1538 case MLX5_INLINE_MODE_TCP_UDP:
1539 config->txq_inline_min =
1540 MLX5_INLINE_HSIZE_L4;
1542 case MLX5_INLINE_MODE_INNER_L2:
1543 config->txq_inline_min =
1544 MLX5_INLINE_HSIZE_INNER_L2;
1546 case MLX5_INLINE_MODE_INNER_IP:
1547 config->txq_inline_min =
1548 MLX5_INLINE_HSIZE_INNER_L3;
1550 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1551 config->txq_inline_min =
1552 MLX5_INLINE_HSIZE_INNER_L4;
1558 * We get here if we are unable to deduce
1559 * inline data size with DevX. Try PCI ID
1560 * to determine old NICs.
1562 switch (spawn->pci_dev->id.device_id) {
1563 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1564 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1565 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1566 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1567 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1568 config->hw_vlan_insert = 0;
1570 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1571 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1572 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1573 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1575 * These NICs support VLAN insertion from WQE and
1576 * report the wqe_vlan_insert flag. But there is the bug
1577 * and PFC control may be broken, so disable feature.
1579 config->hw_vlan_insert = 0;
1580 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1583 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1587 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1591 * Configures the metadata mask fields in the shared context.
1594 * Pointer to Ethernet device.
1597 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1599 struct mlx5_priv *priv = dev->data->dev_private;
1600 struct mlx5_ibv_shared *sh = priv->sh;
1601 uint32_t meta, mark, reg_c0;
1603 reg_c0 = ~priv->vport_meta_mask;
1604 switch (priv->config.dv_xmeta_en) {
1605 case MLX5_XMETA_MODE_LEGACY:
1607 mark = MLX5_FLOW_MARK_MASK;
1609 case MLX5_XMETA_MODE_META16:
1610 meta = reg_c0 >> rte_bsf32(reg_c0);
1611 mark = MLX5_FLOW_MARK_MASK;
1613 case MLX5_XMETA_MODE_META32:
1615 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1623 if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1624 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1625 sh->dv_mark_mask, mark);
1627 sh->dv_mark_mask = mark;
1628 if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1629 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1630 sh->dv_meta_mask, meta);
1632 sh->dv_meta_mask = meta;
1633 if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1634 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1635 sh->dv_meta_mask, reg_c0);
1637 sh->dv_regc0_mask = reg_c0;
1638 DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1639 DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1640 DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1641 DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1645 * Allocate page of door-bells and register it using DevX API.
1648 * Pointer to Ethernet device.
1651 * Pointer to new page on success, NULL otherwise.
1653 static struct mlx5_devx_dbr_page *
1654 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1656 struct mlx5_priv *priv = dev->data->dev_private;
1657 struct mlx5_devx_dbr_page *page;
1659 /* Allocate space for door-bell page and management data. */
1660 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1661 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1663 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1664 dev->data->port_id);
1667 /* Register allocated memory. */
1668 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1669 MLX5_DBR_PAGE_SIZE, 0);
1671 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1672 dev->data->port_id);
1680 * Find the next available door-bell, allocate new page if needed.
1683 * Pointer to Ethernet device.
1684 * @param [out] dbr_page
1685 * Door-bell page containing the page data.
1688 * Door-bell address offset on success, a negative error value otherwise.
1691 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1693 struct mlx5_priv *priv = dev->data->dev_private;
1694 struct mlx5_devx_dbr_page *page = NULL;
1697 LIST_FOREACH(page, &priv->dbrpgs, next)
1698 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1700 if (!page) { /* No page with free door-bell exists. */
1701 page = mlx5_alloc_dbr_page(dev);
1702 if (!page) /* Failed to allocate new page. */
1704 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1706 /* Loop to find bitmap part with clear bit. */
1708 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1711 /* Find the first clear bit. */
1712 j = rte_bsf64(~page->dbr_bitmap[i]);
1713 assert(i < (MLX5_DBR_PER_PAGE / 64));
1714 page->dbr_bitmap[i] |= (1 << j);
1717 return (((i * 64) + j) * sizeof(uint64_t));
1721 * Release a door-bell record.
1724 * Pointer to Ethernet device.
1725 * @param [in] umem_id
1726 * UMEM ID of page containing the door-bell record to release.
1727 * @param [in] offset
1728 * Offset of door-bell record in page.
1731 * 0 on success, a negative error value otherwise.
1734 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1736 struct mlx5_priv *priv = dev->data->dev_private;
1737 struct mlx5_devx_dbr_page *page = NULL;
1740 LIST_FOREACH(page, &priv->dbrpgs, next)
1741 /* Find the page this address belongs to. */
1742 if (page->umem->umem_id == umem_id)
1747 if (!page->dbr_count) {
1748 /* Page not used, free it and remove from list. */
1749 LIST_REMOVE(page, next);
1751 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1754 /* Mark in bitmap that this door-bell is not in use. */
1755 offset /= MLX5_DBR_SIZE;
1756 int i = offset / 64;
1757 int j = offset % 64;
1759 page->dbr_bitmap[i] &= ~(1 << j);
1765 * Check sibling device configurations.
1767 * Sibling devices sharing the Infiniband device context
1768 * should have compatible configurations. This regards
1769 * representors and bonding slaves.
1772 * Private device descriptor.
1774 * Configuration of the device is going to be created.
1777 * 0 on success, EINVAL otherwise
1780 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1781 struct mlx5_dev_config *config)
1783 struct mlx5_ibv_shared *sh = priv->sh;
1784 struct mlx5_dev_config *sh_conf = NULL;
1788 /* Nothing to compare for the single/first device. */
1789 if (sh->refcnt == 1)
1791 /* Find the device with shared context. */
1792 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1793 struct mlx5_priv *opriv =
1794 rte_eth_devices[port_id].data->dev_private;
1796 if (opriv && opriv != priv && opriv->sh == sh) {
1797 sh_conf = &opriv->config;
1803 if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1804 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1805 " for shared %s context", sh->ibdev_name);
1809 if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
1810 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
1811 " for shared %s context", sh->ibdev_name);
1818 * Spawn an Ethernet device from Verbs information.
1821 * Backing DPDK device.
1823 * Verbs device parameters (name, port, switch_info) to spawn.
1825 * Device configuration parameters.
1828 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1829 * is set. The following errors are defined:
1831 * EBUSY: device is not supposed to be spawned.
1832 * EEXIST: device is already spawned
1834 static struct rte_eth_dev *
1835 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1836 struct mlx5_dev_spawn_data *spawn,
1837 struct mlx5_dev_config config)
1839 const struct mlx5_switch_info *switch_info = &spawn->info;
1840 struct mlx5_ibv_shared *sh = NULL;
1841 struct ibv_port_attr port_attr;
1842 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1843 struct rte_eth_dev *eth_dev = NULL;
1844 struct mlx5_priv *priv = NULL;
1846 unsigned int hw_padding = 0;
1848 unsigned int cqe_comp;
1849 unsigned int cqe_pad = 0;
1850 unsigned int tunnel_en = 0;
1851 unsigned int mpls_en = 0;
1852 unsigned int swp = 0;
1853 unsigned int mprq = 0;
1854 unsigned int mprq_min_stride_size_n = 0;
1855 unsigned int mprq_max_stride_size_n = 0;
1856 unsigned int mprq_min_stride_num_n = 0;
1857 unsigned int mprq_max_stride_num_n = 0;
1858 struct rte_ether_addr mac;
1859 char name[RTE_ETH_NAME_MAX_LEN];
1860 int own_domain_id = 0;
1863 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1864 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
1867 /* Determine if this port representor is supposed to be spawned. */
1868 if (switch_info->representor && dpdk_dev->devargs) {
1869 struct rte_eth_devargs eth_da;
1871 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1874 DRV_LOG(ERR, "failed to process device arguments: %s",
1875 strerror(rte_errno));
1878 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1879 if (eth_da.representor_ports[i] ==
1880 (uint16_t)switch_info->port_name)
1882 if (i == eth_da.nb_representor_ports) {
1887 /* Build device name. */
1888 if (spawn->pf_bond < 0) {
1889 /* Single device. */
1890 if (!switch_info->representor)
1891 strlcpy(name, dpdk_dev->name, sizeof(name));
1893 snprintf(name, sizeof(name), "%s_representor_%u",
1894 dpdk_dev->name, switch_info->port_name);
1896 /* Bonding device. */
1897 if (!switch_info->representor)
1898 snprintf(name, sizeof(name), "%s_%s",
1899 dpdk_dev->name, spawn->ibv_dev->name);
1901 snprintf(name, sizeof(name), "%s_%s_representor_%u",
1902 dpdk_dev->name, spawn->ibv_dev->name,
1903 switch_info->port_name);
1905 /* check if the device is already spawned */
1906 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1910 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1911 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1912 eth_dev = rte_eth_dev_attach_secondary(name);
1913 if (eth_dev == NULL) {
1914 DRV_LOG(ERR, "can not attach rte ethdev");
1918 eth_dev->device = dpdk_dev;
1919 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1920 err = mlx5_proc_priv_init(eth_dev);
1923 /* Receive command fd from primary process */
1924 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1927 /* Remap UAR for Tx queues. */
1928 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1932 * Ethdev pointer is still required as input since
1933 * the primary device is not accessible from the
1934 * secondary process.
1936 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1937 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1940 sh = mlx5_alloc_shared_ibctx(spawn);
1943 config.devx = sh->devx;
1944 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1945 config.dest_tir = 1;
1947 #ifdef HAVE_IBV_MLX5_MOD_SWP
1948 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1951 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1952 * as all ConnectX-5 devices.
1954 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1955 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1957 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1958 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1960 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1961 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1962 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1963 DRV_LOG(DEBUG, "enhanced MPW is supported");
1964 mps = MLX5_MPW_ENHANCED;
1966 DRV_LOG(DEBUG, "MPW is supported");
1970 DRV_LOG(DEBUG, "MPW isn't supported");
1971 mps = MLX5_MPW_DISABLED;
1973 #ifdef HAVE_IBV_MLX5_MOD_SWP
1974 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1975 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1976 DRV_LOG(DEBUG, "SWP support: %u", swp);
1979 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1980 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1981 struct mlx5dv_striding_rq_caps mprq_caps =
1982 dv_attr.striding_rq_caps;
1984 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1985 mprq_caps.min_single_stride_log_num_of_bytes);
1986 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1987 mprq_caps.max_single_stride_log_num_of_bytes);
1988 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1989 mprq_caps.min_single_wqe_log_num_of_strides);
1990 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1991 mprq_caps.max_single_wqe_log_num_of_strides);
1992 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1993 mprq_caps.supported_qpts);
1994 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1996 mprq_min_stride_size_n =
1997 mprq_caps.min_single_stride_log_num_of_bytes;
1998 mprq_max_stride_size_n =
1999 mprq_caps.max_single_stride_log_num_of_bytes;
2000 mprq_min_stride_num_n =
2001 mprq_caps.min_single_wqe_log_num_of_strides;
2002 mprq_max_stride_num_n =
2003 mprq_caps.max_single_wqe_log_num_of_strides;
2004 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2005 mprq_min_stride_num_n);
2008 if (RTE_CACHE_LINE_SIZE == 128 &&
2009 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2013 config.cqe_comp = cqe_comp;
2014 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2015 /* Whether device supports 128B Rx CQE padding. */
2016 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2017 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2019 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2020 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2021 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2022 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2023 (dv_attr.tunnel_offloads_caps &
2024 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
2026 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2027 tunnel_en ? "" : "not ");
2030 "tunnel offloading disabled due to old OFED/rdma-core version");
2032 config.tunnel_en = tunnel_en;
2033 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2034 mpls_en = ((dv_attr.tunnel_offloads_caps &
2035 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2036 (dv_attr.tunnel_offloads_caps &
2037 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2038 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2039 mpls_en ? "" : "not ");
2041 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2042 " old OFED/rdma-core version or firmware configuration");
2044 config.mpls_en = mpls_en;
2045 /* Check port status. */
2046 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2048 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2051 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2052 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2056 if (port_attr.state != IBV_PORT_ACTIVE)
2057 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2058 mlx5_glue->port_state_str(port_attr.state),
2060 /* Allocate private eth device data. */
2061 priv = rte_zmalloc("ethdev private structure",
2063 RTE_CACHE_LINE_SIZE);
2065 DRV_LOG(ERR, "priv allocation failure");
2070 priv->ibv_port = spawn->ibv_port;
2071 priv->pci_dev = spawn->pci_dev;
2072 priv->mtu = RTE_ETHER_MTU;
2074 /* Initialize UAR access locks for 32bit implementations. */
2075 rte_spinlock_init(&priv->uar_lock_cq);
2076 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2077 rte_spinlock_init(&priv->uar_lock[i]);
2079 /* Some internal functions rely on Netlink sockets, open them now. */
2080 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2081 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2083 priv->representor = !!switch_info->representor;
2084 priv->master = !!switch_info->master;
2085 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2086 priv->vport_meta_tag = 0;
2087 priv->vport_meta_mask = 0;
2088 priv->pf_bond = spawn->pf_bond;
2089 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2091 * The DevX port query API is implemented. E-Switch may use
2092 * either vport or reg_c[0] metadata register to match on
2093 * vport index. The engaged part of metadata register is
2096 if (switch_info->representor || switch_info->master) {
2097 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2098 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2099 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2103 "can't query devx port %d on device %s",
2104 spawn->ibv_port, spawn->ibv_dev->name);
2105 devx_port.comp_mask = 0;
2108 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2109 priv->vport_meta_tag = devx_port.reg_c_0.value;
2110 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2111 if (!priv->vport_meta_mask) {
2112 DRV_LOG(ERR, "vport zero mask for port %d"
2113 " on bonding device %s",
2114 spawn->ibv_port, spawn->ibv_dev->name);
2118 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2119 DRV_LOG(ERR, "invalid vport tag for port %d"
2120 " on bonding device %s",
2121 spawn->ibv_port, spawn->ibv_dev->name);
2125 } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2126 priv->vport_id = devx_port.vport_num;
2127 } else if (spawn->pf_bond >= 0) {
2128 DRV_LOG(ERR, "can't deduce vport index for port %d"
2129 " on bonding device %s",
2130 spawn->ibv_port, spawn->ibv_dev->name);
2134 /* Suppose vport index in compatible way. */
2135 priv->vport_id = switch_info->representor ?
2136 switch_info->port_name + 1 : -1;
2140 * Kernel/rdma_core support single E-Switch per PF configurations
2141 * only and vport_id field contains the vport index for
2142 * associated VF, which is deduced from representor port name.
2143 * For example, let's have the IB device port 10, it has
2144 * attached network device eth0, which has port name attribute
2145 * pf0vf2, we can deduce the VF number as 2, and set vport index
2146 * as 3 (2+1). This assigning schema should be changed if the
2147 * multiple E-Switch instances per PF configurations or/and PCI
2148 * subfunctions are added.
2150 priv->vport_id = switch_info->representor ?
2151 switch_info->port_name + 1 : -1;
2153 /* representor_id field keeps the unmodified VF index. */
2154 priv->representor_id = switch_info->representor ?
2155 switch_info->port_name : -1;
2157 * Look for sibling devices in order to reuse their switch domain
2158 * if any, otherwise allocate one.
2160 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2161 const struct mlx5_priv *opriv =
2162 rte_eth_devices[port_id].data->dev_private;
2165 opriv->sh != priv->sh ||
2167 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2169 priv->domain_id = opriv->domain_id;
2172 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2173 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2176 DRV_LOG(ERR, "unable to allocate switch domain: %s",
2177 strerror(rte_errno));
2182 err = mlx5_args(&config, dpdk_dev->devargs);
2185 DRV_LOG(ERR, "failed to process device arguments: %s",
2186 strerror(rte_errno));
2189 err = mlx5_dev_check_sibling_config(priv, &config);
2192 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2193 IBV_DEVICE_RAW_IP_CSUM);
2194 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2195 (config.hw_csum ? "" : "not "));
2196 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2197 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2198 DRV_LOG(DEBUG, "counters are not supported");
2200 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2201 if (config.dv_flow_en) {
2202 DRV_LOG(WARNING, "DV flow is not supported");
2203 config.dv_flow_en = 0;
2206 config.ind_table_max_size =
2207 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2209 * Remove this check once DPDK supports larger/variable
2210 * indirection tables.
2212 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2213 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2214 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2215 config.ind_table_max_size);
2216 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2217 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2218 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2219 (config.hw_vlan_strip ? "" : "not "));
2220 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2221 IBV_RAW_PACKET_CAP_SCATTER_FCS);
2222 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2223 (config.hw_fcs_strip ? "" : "not "));
2224 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2225 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2226 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2227 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2228 IBV_DEVICE_PCI_WRITE_END_PADDING);
2230 if (config.hw_padding && !hw_padding) {
2231 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2232 config.hw_padding = 0;
2233 } else if (config.hw_padding) {
2234 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2236 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2237 (sh->device_attr.tso_caps.supported_qpts &
2238 (1 << IBV_QPT_RAW_PACKET)));
2240 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2242 * MPW is disabled by default, while the Enhanced MPW is enabled
2245 if (config.mps == MLX5_ARG_UNSET)
2246 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2249 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2250 DRV_LOG(INFO, "%sMPS is %s",
2251 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2252 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2253 if (config.cqe_comp && !cqe_comp) {
2254 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2255 config.cqe_comp = 0;
2257 if (config.cqe_pad && !cqe_pad) {
2258 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2260 } else if (config.cqe_pad) {
2261 DRV_LOG(INFO, "Rx CQE padding is enabled");
2264 priv->counter_fallback = 0;
2265 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2270 if (!config.hca_attr.flow_counters_dump)
2271 priv->counter_fallback = 1;
2272 #ifndef HAVE_IBV_DEVX_ASYNC
2273 priv->counter_fallback = 1;
2275 if (priv->counter_fallback)
2276 DRV_LOG(INFO, "Use fall-back DV counter management");
2277 /* Check for LRO support. */
2278 if (config.dest_tir && config.hca_attr.lro_cap &&
2279 config.dv_flow_en) {
2280 /* TBD check tunnel lro caps. */
2281 config.lro.supported = config.hca_attr.lro_cap;
2282 DRV_LOG(DEBUG, "Device supports LRO");
2284 * If LRO timeout is not configured by application,
2285 * use the minimal supported value.
2287 if (!config.lro.timeout)
2288 config.lro.timeout =
2289 config.hca_attr.lro_timer_supported_periods[0];
2290 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2291 config.lro.timeout);
2293 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2294 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2295 config.dv_flow_en) {
2296 uint8_t reg_c_mask =
2297 config.hca_attr.qos.flow_meter_reg_c_ids;
2299 * Meter needs two REG_C's for color match and pre-sfx
2300 * flow match. Here get the REG_C for color match.
2301 * REG_C_0 and REG_C_1 is reserved for metadata feature.
2304 if (__builtin_popcount(reg_c_mask) < 1) {
2306 DRV_LOG(WARNING, "No available register for"
2309 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2312 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2313 priv->mtr_color_reg);
2318 if (config.mprq.enabled && mprq) {
2319 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2320 config.mprq.stride_num_n < mprq_min_stride_num_n) {
2321 config.mprq.stride_num_n =
2322 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2323 mprq_min_stride_num_n);
2325 "the number of strides"
2326 " for Multi-Packet RQ is out of range,"
2327 " setting default value (%u)",
2328 1 << config.mprq.stride_num_n);
2330 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2331 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2332 } else if (config.mprq.enabled && !mprq) {
2333 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2334 config.mprq.enabled = 0;
2336 if (config.max_dump_files_num == 0)
2337 config.max_dump_files_num = 128;
2338 eth_dev = rte_eth_dev_allocate(name);
2339 if (eth_dev == NULL) {
2340 DRV_LOG(ERR, "can not allocate rte ethdev");
2344 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2345 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2346 if (priv->representor) {
2347 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2348 eth_dev->data->representor_id = priv->representor_id;
2351 * Store associated network device interface index. This index
2352 * is permanent throughout the lifetime of device. So, we may store
2353 * the ifindex here and use the cached value further.
2355 assert(spawn->ifindex);
2356 priv->if_index = spawn->ifindex;
2357 eth_dev->data->dev_private = priv;
2358 priv->dev_data = eth_dev->data;
2359 eth_dev->data->mac_addrs = priv->mac;
2360 eth_dev->device = dpdk_dev;
2361 /* Configure the first MAC address by default. */
2362 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2364 "port %u cannot get MAC address, is mlx5_en"
2365 " loaded? (errno: %s)",
2366 eth_dev->data->port_id, strerror(rte_errno));
2371 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2372 eth_dev->data->port_id,
2373 mac.addr_bytes[0], mac.addr_bytes[1],
2374 mac.addr_bytes[2], mac.addr_bytes[3],
2375 mac.addr_bytes[4], mac.addr_bytes[5]);
2378 char ifname[IF_NAMESIZE];
2380 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2381 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2382 eth_dev->data->port_id, ifname);
2384 DRV_LOG(DEBUG, "port %u ifname is unknown",
2385 eth_dev->data->port_id);
2388 /* Get actual MTU if possible. */
2389 err = mlx5_get_mtu(eth_dev, &priv->mtu);
2394 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2396 /* Initialize burst functions to prevent crashes before link-up. */
2397 eth_dev->rx_pkt_burst = removed_rx_burst;
2398 eth_dev->tx_pkt_burst = removed_tx_burst;
2399 eth_dev->dev_ops = &mlx5_dev_ops;
2400 /* Register MAC address. */
2401 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2402 if (config.vf && config.vf_nl_en)
2403 mlx5_nl_mac_addr_sync(eth_dev);
2404 TAILQ_INIT(&priv->flows);
2405 TAILQ_INIT(&priv->ctrl_flows);
2406 /* Hint libmlx5 to use PMD allocator for data plane resources */
2407 struct mlx5dv_ctx_allocators alctr = {
2408 .alloc = &mlx5_alloc_verbs_buf,
2409 .free = &mlx5_free_verbs_buf,
2412 mlx5_glue->dv_set_context_attr(sh->ctx,
2413 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2414 (void *)((uintptr_t)&alctr));
2415 /* Bring Ethernet device up. */
2416 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2417 eth_dev->data->port_id);
2418 mlx5_set_link_up(eth_dev);
2420 * Even though the interrupt handler is not installed yet,
2421 * interrupts will still trigger on the async_fd from
2422 * Verbs context returned by ibv_open_device().
2424 mlx5_link_update(eth_dev, 0);
2425 #ifdef HAVE_MLX5DV_DR_ESWITCH
2426 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2427 (switch_info->representor || switch_info->master)))
2428 config.dv_esw_en = 0;
2430 config.dv_esw_en = 0;
2432 /* Detect minimal data bytes to inline. */
2433 mlx5_set_min_inline(spawn, &config);
2434 /* Store device configuration on private structure. */
2435 priv->config = config;
2436 /* Create context for virtual machine VLAN workaround. */
2437 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2438 if (config.dv_flow_en) {
2439 err = mlx5_alloc_shared_dr(priv);
2442 priv->qrss_id_pool = mlx5_flow_id_pool_alloc();
2443 if (!priv->qrss_id_pool) {
2444 DRV_LOG(ERR, "can't create flow id pool");
2449 /* Supported Verbs flow priority number detection. */
2450 err = mlx5_flow_discover_priorities(eth_dev);
2455 priv->config.flow_prio = err;
2456 if (!priv->config.dv_esw_en &&
2457 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2458 DRV_LOG(WARNING, "metadata mode %u is not supported "
2459 "(no E-Switch)", priv->config.dv_xmeta_en);
2460 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2462 mlx5_set_metadata_mask(eth_dev);
2463 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2464 !priv->sh->dv_regc0_mask) {
2465 DRV_LOG(ERR, "metadata mode %u is not supported "
2466 "(no metadata reg_c[0] is available)",
2467 priv->config.dv_xmeta_en);
2471 /* Query availibility of metadata reg_c's. */
2472 err = mlx5_flow_discover_mreg_c(eth_dev);
2477 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2479 "port %u extensive metadata register is not supported",
2480 eth_dev->data->port_id);
2481 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2482 DRV_LOG(ERR, "metadata mode %u is not supported "
2483 "(no metadata registers available)",
2484 priv->config.dv_xmeta_en);
2489 if (priv->config.dv_flow_en &&
2490 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2491 mlx5_flow_ext_mreg_supported(eth_dev) &&
2492 priv->sh->dv_regc0_mask) {
2493 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2494 MLX5_FLOW_MREG_HTABLE_SZ);
2495 if (!priv->mreg_cp_tbl) {
2503 if (priv->mreg_cp_tbl)
2504 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2506 mlx5_free_shared_dr(priv);
2507 if (priv->nl_socket_route >= 0)
2508 close(priv->nl_socket_route);
2509 if (priv->nl_socket_rdma >= 0)
2510 close(priv->nl_socket_rdma);
2511 if (priv->vmwa_context)
2512 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2513 if (priv->qrss_id_pool)
2514 mlx5_flow_id_pool_release(priv->qrss_id_pool);
2516 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2518 if (eth_dev != NULL)
2519 eth_dev->data->dev_private = NULL;
2521 if (eth_dev != NULL) {
2522 /* mac_addrs must not be freed alone because part of dev_private */
2523 eth_dev->data->mac_addrs = NULL;
2524 rte_eth_dev_release_port(eth_dev);
2527 mlx5_free_shared_ibctx(sh);
2534 * Comparison callback to sort device data.
2536 * This is meant to be used with qsort().
2539 * Pointer to pointer to first data object.
2541 * Pointer to pointer to second data object.
2544 * 0 if both objects are equal, less than 0 if the first argument is less
2545 * than the second, greater than 0 otherwise.
2548 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2550 const struct mlx5_switch_info *si_a =
2551 &((const struct mlx5_dev_spawn_data *)a)->info;
2552 const struct mlx5_switch_info *si_b =
2553 &((const struct mlx5_dev_spawn_data *)b)->info;
2556 /* Master device first. */
2557 ret = si_b->master - si_a->master;
2560 /* Then representor devices. */
2561 ret = si_b->representor - si_a->representor;
2564 /* Unidentified devices come last in no specific order. */
2565 if (!si_a->representor)
2567 /* Order representors by name. */
2568 return si_a->port_name - si_b->port_name;
2572 * Match PCI information for possible slaves of bonding device.
2574 * @param[in] ibv_dev
2575 * Pointer to Infiniband device structure.
2576 * @param[in] pci_dev
2577 * Pointer to PCI device structure to match PCI address.
2578 * @param[in] nl_rdma
2579 * Netlink RDMA group socket handle.
2582 * negative value if no bonding device found, otherwise
2583 * positive index of slave PF in bonding.
2586 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2587 const struct rte_pci_device *pci_dev,
2590 char ifname[IF_NAMESIZE + 1];
2591 unsigned int ifindex;
2597 * Try to get master device name. If something goes
2598 * wrong suppose the lack of kernel support and no
2603 if (!strstr(ibv_dev->name, "bond"))
2605 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2609 * The Master device might not be on the predefined
2610 * port (not on port index 1, it is not garanted),
2611 * we have to scan all Infiniband device port and
2614 for (i = 1; i <= np; ++i) {
2615 /* Check whether Infiniband port is populated. */
2616 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2619 if (!if_indextoname(ifindex, ifname))
2621 /* Try to read bonding slave names from sysfs. */
2623 "/sys/class/net/%s/master/bonding/slaves", ifname);
2624 file = fopen(slaves, "r");
2630 /* Use safe format to check maximal buffer length. */
2631 assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2632 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2633 char tmp_str[IF_NAMESIZE + 32];
2634 struct rte_pci_addr pci_addr;
2635 struct mlx5_switch_info info;
2637 /* Process slave interface names in the loop. */
2638 snprintf(tmp_str, sizeof(tmp_str),
2639 "/sys/class/net/%s", ifname);
2640 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2641 DRV_LOG(WARNING, "can not get PCI address"
2642 " for netdev \"%s\"", ifname);
2645 if (pci_dev->addr.domain != pci_addr.domain ||
2646 pci_dev->addr.bus != pci_addr.bus ||
2647 pci_dev->addr.devid != pci_addr.devid ||
2648 pci_dev->addr.function != pci_addr.function)
2650 /* Slave interface PCI address match found. */
2652 snprintf(tmp_str, sizeof(tmp_str),
2653 "/sys/class/net/%s/phys_port_name", ifname);
2654 file = fopen(tmp_str, "rb");
2657 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2658 if (fscanf(file, "%32s", tmp_str) == 1)
2659 mlx5_translate_port_name(tmp_str, &info);
2660 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2661 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2662 pf = info.port_name;
2671 * DPDK callback to register a PCI device.
2673 * This function spawns Ethernet devices out of a given PCI device.
2675 * @param[in] pci_drv
2676 * PCI driver structure (mlx5_driver).
2677 * @param[in] pci_dev
2678 * PCI device information.
2681 * 0 on success, a negative errno value otherwise and rte_errno is set.
2684 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2685 struct rte_pci_device *pci_dev)
2687 struct ibv_device **ibv_list;
2689 * Number of found IB Devices matching with requested PCI BDF.
2690 * nd != 1 means there are multiple IB devices over the same
2691 * PCI device and we have representors and master.
2693 unsigned int nd = 0;
2695 * Number of found IB device Ports. nd = 1 and np = 1..n means
2696 * we have the single multiport IB device, and there may be
2697 * representors attached to some of found ports.
2699 unsigned int np = 0;
2701 * Number of DPDK ethernet devices to Spawn - either over
2702 * multiple IB devices or multiple ports of single IB device.
2703 * Actually this is the number of iterations to spawn.
2705 unsigned int ns = 0;
2708 * < 0 - no bonding device (single one)
2709 * >= 0 - bonding device (value is slave PF index)
2712 struct mlx5_dev_spawn_data *list = NULL;
2713 struct mlx5_dev_config dev_config;
2716 ret = mlx5_init_once();
2718 DRV_LOG(ERR, "unable to init PMD global data: %s",
2719 strerror(rte_errno));
2722 assert(pci_drv == &mlx5_driver);
2724 ibv_list = mlx5_glue->get_device_list(&ret);
2726 rte_errno = errno ? errno : ENOSYS;
2727 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2731 * First scan the list of all Infiniband devices to find
2732 * matching ones, gathering into the list.
2734 struct ibv_device *ibv_match[ret + 1];
2735 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2736 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2740 struct rte_pci_addr pci_addr;
2742 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2743 bd = mlx5_device_bond_pci_match
2744 (ibv_list[ret], pci_dev, nl_rdma);
2747 * Bonding device detected. Only one match is allowed,
2748 * the bonding is supported over multi-port IB device,
2749 * there should be no matches on representor PCI
2750 * functions or non VF LAG bonding devices with
2751 * specified address.
2755 "multiple PCI match on bonding device"
2756 "\"%s\" found", ibv_list[ret]->name);
2761 DRV_LOG(INFO, "PCI information matches for"
2762 " slave %d bonding device \"%s\"",
2763 bd, ibv_list[ret]->name);
2764 ibv_match[nd++] = ibv_list[ret];
2767 if (mlx5_dev_to_pci_addr
2768 (ibv_list[ret]->ibdev_path, &pci_addr))
2770 if (pci_dev->addr.domain != pci_addr.domain ||
2771 pci_dev->addr.bus != pci_addr.bus ||
2772 pci_dev->addr.devid != pci_addr.devid ||
2773 pci_dev->addr.function != pci_addr.function)
2775 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2776 ibv_list[ret]->name);
2777 ibv_match[nd++] = ibv_list[ret];
2779 ibv_match[nd] = NULL;
2781 /* No device matches, just complain and bail out. */
2783 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2784 " are kernel drivers loaded?",
2785 pci_dev->addr.domain, pci_dev->addr.bus,
2786 pci_dev->addr.devid, pci_dev->addr.function);
2793 * Found single matching device may have multiple ports.
2794 * Each port may be representor, we have to check the port
2795 * number and check the representors existence.
2798 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2800 DRV_LOG(WARNING, "can not get IB device \"%s\""
2801 " ports number", ibv_match[0]->name);
2802 if (bd >= 0 && !np) {
2803 DRV_LOG(ERR, "can not get ports"
2804 " for bonding device");
2810 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2813 * This may happen if there is VF LAG kernel support and
2814 * application is compiled with older rdma_core library.
2817 "No kernel/verbs support for VF LAG bonding found.");
2818 rte_errno = ENOTSUP;
2824 * Now we can determine the maximal
2825 * amount of devices to be spawned.
2827 list = rte_zmalloc("device spawn data",
2828 sizeof(struct mlx5_dev_spawn_data) *
2830 RTE_CACHE_LINE_SIZE);
2832 DRV_LOG(ERR, "spawn data array allocation failure");
2837 if (bd >= 0 || np > 1) {
2839 * Single IB device with multiple ports found,
2840 * it may be E-Switch master device and representors.
2841 * We have to perform identification trough the ports.
2843 assert(nl_rdma >= 0);
2847 for (i = 1; i <= np; ++i) {
2848 list[ns].max_port = np;
2849 list[ns].ibv_port = i;
2850 list[ns].ibv_dev = ibv_match[0];
2851 list[ns].eth_dev = NULL;
2852 list[ns].pci_dev = pci_dev;
2853 list[ns].pf_bond = bd;
2854 list[ns].ifindex = mlx5_nl_ifindex
2855 (nl_rdma, list[ns].ibv_dev->name, i);
2856 if (!list[ns].ifindex) {
2858 * No network interface index found for the
2859 * specified port, it means there is no
2860 * representor on this port. It's OK,
2861 * there can be disabled ports, for example
2862 * if sriov_numvfs < sriov_totalvfs.
2868 ret = mlx5_nl_switch_info
2872 if (ret || (!list[ns].info.representor &&
2873 !list[ns].info.master)) {
2875 * We failed to recognize representors with
2876 * Netlink, let's try to perform the task
2879 ret = mlx5_sysfs_switch_info
2883 if (!ret && bd >= 0) {
2884 switch (list[ns].info.name_type) {
2885 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2886 if (list[ns].info.port_name == bd)
2889 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2890 if (list[ns].info.pf_num == bd)
2898 if (!ret && (list[ns].info.representor ^
2899 list[ns].info.master))
2904 "unable to recognize master/representors"
2905 " on the IB device with multiple ports");
2912 * The existence of several matching entries (nd > 1) means
2913 * port representors have been instantiated. No existing Verbs
2914 * call nor sysfs entries can tell them apart, this can only
2915 * be done through Netlink calls assuming kernel drivers are
2916 * recent enough to support them.
2918 * In the event of identification failure through Netlink,
2919 * try again through sysfs, then:
2921 * 1. A single IB device matches (nd == 1) with single
2922 * port (np=0/1) and is not a representor, assume
2923 * no switch support.
2925 * 2. Otherwise no safe assumptions can be made;
2926 * complain louder and bail out.
2929 for (i = 0; i != nd; ++i) {
2930 memset(&list[ns].info, 0, sizeof(list[ns].info));
2931 list[ns].max_port = 1;
2932 list[ns].ibv_port = 1;
2933 list[ns].ibv_dev = ibv_match[i];
2934 list[ns].eth_dev = NULL;
2935 list[ns].pci_dev = pci_dev;
2936 list[ns].pf_bond = -1;
2937 list[ns].ifindex = 0;
2939 list[ns].ifindex = mlx5_nl_ifindex
2940 (nl_rdma, list[ns].ibv_dev->name, 1);
2941 if (!list[ns].ifindex) {
2942 char ifname[IF_NAMESIZE];
2945 * Netlink failed, it may happen with old
2946 * ib_core kernel driver (before 4.16).
2947 * We can assume there is old driver because
2948 * here we are processing single ports IB
2949 * devices. Let's try sysfs to retrieve
2950 * the ifindex. The method works for
2951 * master device only.
2955 * Multiple devices found, assume
2956 * representors, can not distinguish
2957 * master/representor and retrieve
2958 * ifindex via sysfs.
2962 ret = mlx5_get_master_ifname
2963 (ibv_match[i]->ibdev_path, &ifname);
2966 if_nametoindex(ifname);
2967 if (!list[ns].ifindex) {
2969 * No network interface index found
2970 * for the specified device, it means
2971 * there it is neither representor
2979 ret = mlx5_nl_switch_info
2983 if (ret || (!list[ns].info.representor &&
2984 !list[ns].info.master)) {
2986 * We failed to recognize representors with
2987 * Netlink, let's try to perform the task
2990 ret = mlx5_sysfs_switch_info
2994 if (!ret && (list[ns].info.representor ^
2995 list[ns].info.master)) {
2997 } else if ((nd == 1) &&
2998 !list[ns].info.representor &&
2999 !list[ns].info.master) {
3001 * Single IB device with
3002 * one physical port and
3003 * attached network device.
3004 * May be SRIOV is not enabled
3005 * or there is no representors.
3007 DRV_LOG(INFO, "no E-Switch support detected");
3014 "unable to recognize master/representors"
3015 " on the multiple IB devices");
3023 * Sort list to probe devices in natural order for users convenience
3024 * (i.e. master first, then representors from lowest to highest ID).
3026 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3027 /* Default configuration. */
3028 dev_config = (struct mlx5_dev_config){
3030 .mps = MLX5_ARG_UNSET,
3032 .txq_inline_max = MLX5_ARG_UNSET,
3033 .txq_inline_min = MLX5_ARG_UNSET,
3034 .txq_inline_mpw = MLX5_ARG_UNSET,
3035 .txqs_inline = MLX5_ARG_UNSET,
3037 .mr_ext_memseg_en = 1,
3039 .enabled = 0, /* Disabled by default. */
3040 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3041 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3042 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3046 /* Device specific configuration. */
3047 switch (pci_dev->id.device_id) {
3048 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3049 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3050 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3051 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3052 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3053 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3054 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3060 for (i = 0; i != ns; ++i) {
3063 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3066 if (!list[i].eth_dev) {
3067 if (rte_errno != EBUSY && rte_errno != EEXIST)
3069 /* Device is disabled or already spawned. Ignore it. */
3072 restore = list[i].eth_dev->data->dev_flags;
3073 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3074 /* Restore non-PCI flags cleared by the above call. */
3075 list[i].eth_dev->data->dev_flags |= restore;
3076 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3077 rte_eth_dev_probing_finish(list[i].eth_dev);
3081 "probe of PCI device " PCI_PRI_FMT " aborted after"
3082 " encountering an error: %s",
3083 pci_dev->addr.domain, pci_dev->addr.bus,
3084 pci_dev->addr.devid, pci_dev->addr.function,
3085 strerror(rte_errno));
3089 if (!list[i].eth_dev)
3091 mlx5_dev_close(list[i].eth_dev);
3092 /* mac_addrs must not be freed because in dev_private */
3093 list[i].eth_dev->data->mac_addrs = NULL;
3094 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3096 /* Restore original error. */
3103 * Do the routine cleanup:
3104 * - close opened Netlink sockets
3105 * - free allocated spawn data array
3106 * - free the Infiniband device list
3115 mlx5_glue->free_device_list(ibv_list);
3120 * Look for the ethernet device belonging to mlx5 driver.
3122 * @param[in] port_id
3123 * port_id to start looking for device.
3124 * @param[in] pci_dev
3125 * Pointer to the hint PCI device. When device is being probed
3126 * the its siblings (master and preceding representors might
3127 * not have assigned driver yet (because the mlx5_pci_probe()
3128 * is not completed yet, for this case match on hint PCI
3129 * device may be used to detect sibling device.
3132 * port_id of found device, RTE_MAX_ETHPORT if not found.
3135 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3137 while (port_id < RTE_MAX_ETHPORTS) {
3138 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3140 if (dev->state != RTE_ETH_DEV_UNUSED &&
3142 (dev->device == &pci_dev->device ||
3143 (dev->device->driver &&
3144 dev->device->driver->name &&
3145 !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3149 if (port_id >= RTE_MAX_ETHPORTS)
3150 return RTE_MAX_ETHPORTS;
3155 * DPDK callback to remove a PCI device.
3157 * This function removes all Ethernet devices belong to a given PCI device.
3159 * @param[in] pci_dev
3160 * Pointer to the PCI device.
3163 * 0 on success, the function cannot fail.
3166 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3170 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3171 rte_eth_dev_close(port_id);
3175 static const struct rte_pci_id mlx5_pci_id_map[] = {
3177 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3178 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3181 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3182 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3185 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3186 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3189 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3190 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3193 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3194 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3197 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3198 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3201 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3202 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3205 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3206 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3209 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3210 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3213 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3214 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3217 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3218 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3221 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3222 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3225 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3226 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3229 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3230 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3237 static struct rte_pci_driver mlx5_driver = {
3239 .name = MLX5_DRIVER_NAME
3241 .id_table = mlx5_pci_id_map,
3242 .probe = mlx5_pci_probe,
3243 .remove = mlx5_pci_remove,
3244 .dma_map = mlx5_dma_map,
3245 .dma_unmap = mlx5_dma_unmap,
3246 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3247 RTE_PCI_DRV_PROBE_AGAIN,
3250 #ifdef RTE_IBVERBS_LINK_DLOPEN
3253 * Suffix RTE_EAL_PMD_PATH with "-glue".
3255 * This function performs a sanity check on RTE_EAL_PMD_PATH before
3256 * suffixing its last component.
3259 * Output buffer, should be large enough otherwise NULL is returned.
3264 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
3267 mlx5_glue_path(char *buf, size_t size)
3269 static const char *const bad[] = { "/", ".", "..", NULL };
3270 const char *path = RTE_EAL_PMD_PATH;
3271 size_t len = strlen(path);
3275 while (len && path[len - 1] == '/')
3277 for (off = len; off && path[off - 1] != '/'; --off)
3279 for (i = 0; bad[i]; ++i)
3280 if (!strncmp(path + off, bad[i], (int)(len - off)))
3282 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3283 if (i == -1 || (size_t)i >= size)
3288 "unable to append \"-glue\" to last component of"
3289 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3290 " please re-configure DPDK");
3295 * Initialization routine for run-time dependency on rdma-core.
3298 mlx5_glue_init(void)
3300 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3301 const char *path[] = {
3303 * A basic security check is necessary before trusting
3304 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3306 (geteuid() == getuid() && getegid() == getgid() ?
3307 getenv("MLX5_GLUE_PATH") : NULL),
3309 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3310 * variant, otherwise let dlopen() look up libraries on its
3313 (*RTE_EAL_PMD_PATH ?
3314 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3317 void *handle = NULL;
3321 while (!handle && i != RTE_DIM(path)) {
3330 end = strpbrk(path[i], ":;");
3332 end = path[i] + strlen(path[i]);
3333 len = end - path[i];
3338 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3340 (!len || *(end - 1) == '/') ? "" : "/");
3343 if (sizeof(name) != (size_t)ret + 1)
3345 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3347 handle = dlopen(name, RTLD_LAZY);
3358 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3361 sym = dlsym(handle, "mlx5_glue");
3362 if (!sym || !*sym) {
3366 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3375 "cannot initialize PMD due to missing run-time dependency on"
3376 " rdma-core libraries (libibverbs, libmlx5)");
3383 * Driver initialization routine.
3385 RTE_INIT(rte_mlx5_pmd_init)
3387 /* Initialize driver log type. */
3388 mlx5_logtype = rte_log_register("pmd.net.mlx5");
3389 if (mlx5_logtype >= 0)
3390 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3392 /* Build the static tables for Verbs conversion. */
3393 mlx5_set_ptype_table();
3394 mlx5_set_cksum_table();
3395 mlx5_set_swp_types_table();
3397 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3398 * huge pages. Calling ibv_fork_init() during init allows
3399 * applications to use fork() safely for purposes other than
3400 * using this PMD, which is not supported in forked processes.
3402 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3403 /* Match the size of Rx completion entry to the size of a cacheline. */
3404 if (RTE_CACHE_LINE_SIZE == 128)
3405 setenv("MLX5_CQE_SIZE", "128", 0);
3407 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3408 * cleanup all the Verbs resources even when the device was removed.
3410 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3411 #ifdef RTE_IBVERBS_LINK_DLOPEN
3412 if (mlx5_glue_init())
3417 /* Glue structure must not contain any NULL pointers. */
3421 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3422 assert(((const void *const *)mlx5_glue)[i]);
3425 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3427 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3428 mlx5_glue->version, MLX5_GLUE_VERSION);
3431 mlx5_glue->fork_init();
3432 rte_pci_register(&mlx5_driver);
3435 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3436 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3437 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");