1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. */
72 #define MLX5_TXQ_INLINE "txq_inline"
75 * Device parameter to configure the number of TX queues threshold for
76 * enabling inline send.
78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
81 * Device parameter to configure the number of TX queues threshold for
82 * enabling vectorized Tx.
84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
86 /* Device parameter to enable multi-packet send WQEs. */
87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
89 /* Device parameter to include 2 dsegs in the title WQEBB. */
90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
92 /* Device parameter to limit the size of inlining packet. */
93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
95 /* Device parameter to enable hardware Tx vector. */
96 #define MLX5_TX_VEC_EN "tx_vec_en"
98 /* Device parameter to enable hardware Rx vector. */
99 #define MLX5_RX_VEC_EN "rx_vec_en"
101 /* Allow L3 VXLAN flow creation. */
102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
104 /* Activate DV flow steering. */
105 #define MLX5_DV_FLOW_EN "dv_flow_en"
107 /* Activate Netlink support in VF mode. */
108 #define MLX5_VF_NL_EN "vf_nl_en"
110 /* Enable extending memsegs when creating a MR. */
111 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
113 /* Select port representors to instantiate. */
114 #define MLX5_REPRESENTOR "representor"
116 #ifndef HAVE_IBV_MLX5_MOD_MPW
117 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
118 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
121 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
122 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
125 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
127 /* Shared memory between primary and secondary processes. */
128 struct mlx5_shared_data *mlx5_shared_data;
130 /* Spinlock for mlx5_shared_data allocation. */
131 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
133 /* Process local data for secondary processes. */
134 static struct mlx5_local_data mlx5_local_data;
136 /** Driver-specific log messages type. */
139 /** Data associated with devices to spawn. */
140 struct mlx5_dev_spawn_data {
141 uint32_t ifindex; /**< Network interface index. */
142 uint32_t max_port; /**< IB device maximal port index. */
143 uint32_t ibv_port; /**< IB device physical port index. */
144 struct mlx5_switch_info info; /**< Switch information. */
145 struct ibv_device *ibv_dev; /**< Associated IB device. */
146 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
149 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
150 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
153 * Allocate shared IB device context. If there is multiport device the
154 * master and representors will share this context, if there is single
155 * port dedicated IB device, the context will be used by only given
156 * port due to unification.
158 * Routine first searches the context for the spesified IB device name,
159 * if found the shared context assumed and reference counter is incremented.
160 * If no context found the new one is created and initialized with specified
161 * IB device context and parameters.
164 * Pointer to the IB device attributes (name, port, etc).
167 * Pointer to mlx5_ibv_shared object on success,
168 * otherwise NULL and rte_errno is set.
170 static struct mlx5_ibv_shared *
171 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
173 struct mlx5_ibv_shared *sh;
178 /* Secondary process should not create the shared context. */
179 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
180 pthread_mutex_lock(&mlx5_ibv_list_mutex);
181 /* Search for IB context by device name. */
182 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
183 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
188 /* No device found, we have to create new sharted context. */
189 assert(spawn->max_port);
190 sh = rte_zmalloc("ethdev shared ib context",
191 sizeof(struct mlx5_ibv_shared) +
193 sizeof(struct mlx5_ibv_shared_port),
194 RTE_CACHE_LINE_SIZE);
196 DRV_LOG(ERR, "shared context allocation failure");
200 /* Try to open IB device with DV first, then usual Verbs. */
202 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
205 DRV_LOG(DEBUG, "DevX is supported");
207 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
209 err = errno ? errno : ENODEV;
212 DRV_LOG(DEBUG, "DevX is NOT supported");
214 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
216 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
220 sh->max_port = spawn->max_port;
221 strncpy(sh->ibdev_name, sh->ctx->device->name,
222 sizeof(sh->ibdev_name));
223 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
224 sizeof(sh->ibdev_path));
225 pthread_mutex_init(&sh->intr_mutex, NULL);
227 * Setting port_id to max unallowed value means
228 * there is no interrupt subhandler installed for
229 * the given port index i.
231 for (i = 0; i < sh->max_port; i++)
232 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
233 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
234 if (sh->pd == NULL) {
235 DRV_LOG(ERR, "PD allocation failure");
239 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
241 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
244 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
247 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
249 claim_zero(mlx5_glue->close_device(sh->ctx));
257 * Free shared IB device context. Decrement counter and if zero free
258 * all allocated resources and close handles.
261 * Pointer to mlx5_ibv_shared object to free
264 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
266 pthread_mutex_lock(&mlx5_ibv_list_mutex);
268 /* Check the object presence in the list. */
269 struct mlx5_ibv_shared *lctx;
271 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
276 DRV_LOG(ERR, "Freeing non-existing shared IB context");
282 /* Secondary process should not free the shared context. */
283 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
286 LIST_REMOVE(sh, next);
288 * Ensure there is no async event handler installed.
289 * Only primary process handles async device events.
291 assert(!sh->intr_cnt);
293 rte_intr_callback_unregister
294 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
295 pthread_mutex_destroy(&sh->intr_mutex);
297 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
299 claim_zero(mlx5_glue->close_device(sh->ctx));
302 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
306 * Initialize shared data between primary and secondary process.
308 * A memzone is reserved by primary process and secondary processes attach to
312 * 0 on success, a negative errno value otherwise and rte_errno is set.
315 mlx5_init_shared_data(void)
317 const struct rte_memzone *mz;
320 rte_spinlock_lock(&mlx5_shared_data_lock);
321 if (mlx5_shared_data == NULL) {
322 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
323 /* Allocate shared memory. */
324 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
325 sizeof(*mlx5_shared_data),
329 "Cannot allocate mlx5 shared data\n");
333 mlx5_shared_data = mz->addr;
334 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
335 rte_spinlock_init(&mlx5_shared_data->lock);
337 /* Lookup allocated shared memory. */
338 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
341 "Cannot attach mlx5 shared data\n");
345 mlx5_shared_data = mz->addr;
346 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
350 rte_spinlock_unlock(&mlx5_shared_data_lock);
355 * Uninitialize shared data between primary and secondary process.
357 * The pointer of secondary process is dereferenced and primary process frees
361 mlx5_uninit_shared_data(void)
363 const struct rte_memzone *mz;
365 rte_spinlock_lock(&mlx5_shared_data_lock);
366 if (mlx5_shared_data) {
367 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
368 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
369 rte_memzone_free(mz);
371 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
373 mlx5_shared_data = NULL;
375 rte_spinlock_unlock(&mlx5_shared_data_lock);
379 * Retrieve integer value from environment variable.
382 * Environment variable name.
385 * Integer value, 0 if the variable is not set.
388 mlx5_getenv_int(const char *name)
390 const char *val = getenv(name);
398 * Verbs callback to allocate a memory. This function should allocate the space
399 * according to the size provided residing inside a huge page.
400 * Please note that all allocation must respect the alignment from libmlx5
401 * (i.e. currently sysconf(_SC_PAGESIZE)).
404 * The size in bytes of the memory to allocate.
406 * A pointer to the callback data.
409 * Allocated buffer, NULL otherwise and rte_errno is set.
412 mlx5_alloc_verbs_buf(size_t size, void *data)
414 struct mlx5_priv *priv = data;
416 size_t alignment = sysconf(_SC_PAGESIZE);
417 unsigned int socket = SOCKET_ID_ANY;
419 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
420 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
422 socket = ctrl->socket;
423 } else if (priv->verbs_alloc_ctx.type ==
424 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
425 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
427 socket = ctrl->socket;
429 assert(data != NULL);
430 ret = rte_malloc_socket(__func__, size, alignment, socket);
437 * Verbs callback to free a memory.
440 * A pointer to the memory to free.
442 * A pointer to the callback data.
445 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
447 assert(data != NULL);
452 * DPDK callback to close the device.
454 * Destroy all queues and objects, free memory.
457 * Pointer to Ethernet device structure.
460 mlx5_dev_close(struct rte_eth_dev *dev)
462 struct mlx5_priv *priv = dev->data->dev_private;
466 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
468 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
469 /* In case mlx5_dev_stop() has not been called. */
470 mlx5_dev_interrupt_handler_uninstall(dev);
471 mlx5_traffic_disable(dev);
472 mlx5_flow_flush(dev, NULL);
473 /* Prevent crashes when queues are still in use. */
474 dev->rx_pkt_burst = removed_rx_burst;
475 dev->tx_pkt_burst = removed_tx_burst;
477 /* Disable datapath on secondary process. */
478 mlx5_mp_req_stop_rxtx(dev);
479 if (priv->rxqs != NULL) {
480 /* XXX race condition if mlx5_rx_burst() is still running. */
482 for (i = 0; (i != priv->rxqs_n); ++i)
483 mlx5_rxq_release(dev, i);
487 if (priv->txqs != NULL) {
488 /* XXX race condition if mlx5_tx_burst() is still running. */
490 for (i = 0; (i != priv->txqs_n); ++i)
491 mlx5_txq_release(dev, i);
495 mlx5_mprq_free_mp(dev);
496 mlx5_mr_release(dev);
499 mlx5_free_shared_ibctx(priv->sh);
501 if (priv->rss_conf.rss_key != NULL)
502 rte_free(priv->rss_conf.rss_key);
503 if (priv->reta_idx != NULL)
504 rte_free(priv->reta_idx);
506 mlx5_nl_mac_addr_flush(dev);
507 if (priv->nl_socket_route >= 0)
508 close(priv->nl_socket_route);
509 if (priv->nl_socket_rdma >= 0)
510 close(priv->nl_socket_rdma);
511 if (priv->tcf_context)
512 mlx5_flow_tcf_context_destroy(priv->tcf_context);
513 ret = mlx5_hrxq_ibv_verify(dev);
515 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
517 ret = mlx5_ind_table_ibv_verify(dev);
519 DRV_LOG(WARNING, "port %u some indirection table still remain",
521 ret = mlx5_rxq_ibv_verify(dev);
523 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
525 ret = mlx5_rxq_verify(dev);
527 DRV_LOG(WARNING, "port %u some Rx queues still remain",
529 ret = mlx5_txq_ibv_verify(dev);
531 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
533 ret = mlx5_txq_verify(dev);
535 DRV_LOG(WARNING, "port %u some Tx queues still remain",
537 ret = mlx5_flow_verify(dev);
539 DRV_LOG(WARNING, "port %u some flows still remain",
541 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
543 unsigned int i = mlx5_dev_to_port_id(dev->device, NULL, 0);
546 i = RTE_MIN(mlx5_dev_to_port_id(dev->device, port_id, i), i);
548 struct mlx5_priv *opriv =
549 rte_eth_devices[port_id[i]].data->dev_private;
552 opriv->domain_id != priv->domain_id ||
553 &rte_eth_devices[port_id[i]] == dev)
558 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
560 memset(priv, 0, sizeof(*priv));
561 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
563 * Reset mac_addrs to NULL such that it is not freed as part of
564 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
565 * it is freed when dev_private is freed.
567 dev->data->mac_addrs = NULL;
570 const struct eth_dev_ops mlx5_dev_ops = {
571 .dev_configure = mlx5_dev_configure,
572 .dev_start = mlx5_dev_start,
573 .dev_stop = mlx5_dev_stop,
574 .dev_set_link_down = mlx5_set_link_down,
575 .dev_set_link_up = mlx5_set_link_up,
576 .dev_close = mlx5_dev_close,
577 .promiscuous_enable = mlx5_promiscuous_enable,
578 .promiscuous_disable = mlx5_promiscuous_disable,
579 .allmulticast_enable = mlx5_allmulticast_enable,
580 .allmulticast_disable = mlx5_allmulticast_disable,
581 .link_update = mlx5_link_update,
582 .stats_get = mlx5_stats_get,
583 .stats_reset = mlx5_stats_reset,
584 .xstats_get = mlx5_xstats_get,
585 .xstats_reset = mlx5_xstats_reset,
586 .xstats_get_names = mlx5_xstats_get_names,
587 .fw_version_get = mlx5_fw_version_get,
588 .dev_infos_get = mlx5_dev_infos_get,
589 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
590 .vlan_filter_set = mlx5_vlan_filter_set,
591 .rx_queue_setup = mlx5_rx_queue_setup,
592 .tx_queue_setup = mlx5_tx_queue_setup,
593 .rx_queue_release = mlx5_rx_queue_release,
594 .tx_queue_release = mlx5_tx_queue_release,
595 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
596 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
597 .mac_addr_remove = mlx5_mac_addr_remove,
598 .mac_addr_add = mlx5_mac_addr_add,
599 .mac_addr_set = mlx5_mac_addr_set,
600 .set_mc_addr_list = mlx5_set_mc_addr_list,
601 .mtu_set = mlx5_dev_set_mtu,
602 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
603 .vlan_offload_set = mlx5_vlan_offload_set,
604 .reta_update = mlx5_dev_rss_reta_update,
605 .reta_query = mlx5_dev_rss_reta_query,
606 .rss_hash_update = mlx5_rss_hash_update,
607 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
608 .filter_ctrl = mlx5_dev_filter_ctrl,
609 .rx_descriptor_status = mlx5_rx_descriptor_status,
610 .tx_descriptor_status = mlx5_tx_descriptor_status,
611 .rx_queue_count = mlx5_rx_queue_count,
612 .rx_queue_intr_enable = mlx5_rx_intr_enable,
613 .rx_queue_intr_disable = mlx5_rx_intr_disable,
614 .is_removed = mlx5_is_removed,
617 /* Available operations from secondary process. */
618 static const struct eth_dev_ops mlx5_dev_sec_ops = {
619 .stats_get = mlx5_stats_get,
620 .stats_reset = mlx5_stats_reset,
621 .xstats_get = mlx5_xstats_get,
622 .xstats_reset = mlx5_xstats_reset,
623 .xstats_get_names = mlx5_xstats_get_names,
624 .fw_version_get = mlx5_fw_version_get,
625 .dev_infos_get = mlx5_dev_infos_get,
626 .rx_descriptor_status = mlx5_rx_descriptor_status,
627 .tx_descriptor_status = mlx5_tx_descriptor_status,
630 /* Available operations in flow isolated mode. */
631 const struct eth_dev_ops mlx5_dev_ops_isolate = {
632 .dev_configure = mlx5_dev_configure,
633 .dev_start = mlx5_dev_start,
634 .dev_stop = mlx5_dev_stop,
635 .dev_set_link_down = mlx5_set_link_down,
636 .dev_set_link_up = mlx5_set_link_up,
637 .dev_close = mlx5_dev_close,
638 .promiscuous_enable = mlx5_promiscuous_enable,
639 .promiscuous_disable = mlx5_promiscuous_disable,
640 .allmulticast_enable = mlx5_allmulticast_enable,
641 .allmulticast_disable = mlx5_allmulticast_disable,
642 .link_update = mlx5_link_update,
643 .stats_get = mlx5_stats_get,
644 .stats_reset = mlx5_stats_reset,
645 .xstats_get = mlx5_xstats_get,
646 .xstats_reset = mlx5_xstats_reset,
647 .xstats_get_names = mlx5_xstats_get_names,
648 .fw_version_get = mlx5_fw_version_get,
649 .dev_infos_get = mlx5_dev_infos_get,
650 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
651 .vlan_filter_set = mlx5_vlan_filter_set,
652 .rx_queue_setup = mlx5_rx_queue_setup,
653 .tx_queue_setup = mlx5_tx_queue_setup,
654 .rx_queue_release = mlx5_rx_queue_release,
655 .tx_queue_release = mlx5_tx_queue_release,
656 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
657 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
658 .mac_addr_remove = mlx5_mac_addr_remove,
659 .mac_addr_add = mlx5_mac_addr_add,
660 .mac_addr_set = mlx5_mac_addr_set,
661 .set_mc_addr_list = mlx5_set_mc_addr_list,
662 .mtu_set = mlx5_dev_set_mtu,
663 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
664 .vlan_offload_set = mlx5_vlan_offload_set,
665 .filter_ctrl = mlx5_dev_filter_ctrl,
666 .rx_descriptor_status = mlx5_rx_descriptor_status,
667 .tx_descriptor_status = mlx5_tx_descriptor_status,
668 .rx_queue_intr_enable = mlx5_rx_intr_enable,
669 .rx_queue_intr_disable = mlx5_rx_intr_disable,
670 .is_removed = mlx5_is_removed,
674 * Verify and store value for device argument.
677 * Key argument to verify.
679 * Value associated with key.
684 * 0 on success, a negative errno value otherwise and rte_errno is set.
687 mlx5_args_check(const char *key, const char *val, void *opaque)
689 struct mlx5_dev_config *config = opaque;
692 /* No-op, port representors are processed in mlx5_dev_spawn(). */
693 if (!strcmp(MLX5_REPRESENTOR, key))
696 tmp = strtoul(val, NULL, 0);
699 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
702 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
703 config->cqe_comp = !!tmp;
704 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
705 config->cqe_pad = !!tmp;
706 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
707 config->hw_padding = !!tmp;
708 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
709 config->mprq.enabled = !!tmp;
710 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
711 config->mprq.stride_num_n = tmp;
712 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
713 config->mprq.max_memcpy_len = tmp;
714 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
715 config->mprq.min_rxqs_num = tmp;
716 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
717 config->txq_inline = tmp;
718 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
719 config->txqs_inline = tmp;
720 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
721 config->txqs_vec = tmp;
722 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
724 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
725 config->mpw_hdr_dseg = !!tmp;
726 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
727 config->inline_max_packet_sz = tmp;
728 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
729 config->tx_vec_en = !!tmp;
730 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
731 config->rx_vec_en = !!tmp;
732 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
733 config->l3_vxlan_en = !!tmp;
734 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
735 config->vf_nl_en = !!tmp;
736 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
737 config->dv_flow_en = !!tmp;
738 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
739 config->mr_ext_memseg_en = !!tmp;
741 DRV_LOG(WARNING, "%s: unknown parameter", key);
749 * Parse device parameters.
752 * Pointer to device configuration structure.
754 * Device arguments structure.
757 * 0 on success, a negative errno value otherwise and rte_errno is set.
760 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
762 const char **params = (const char *[]){
763 MLX5_RXQ_CQE_COMP_EN,
767 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
768 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
771 MLX5_TXQS_MIN_INLINE,
774 MLX5_TXQ_MPW_HDR_DSEG_EN,
775 MLX5_TXQ_MAX_INLINE_LEN,
781 MLX5_MR_EXT_MEMSEG_EN,
785 struct rte_kvargs *kvlist;
791 /* Following UGLY cast is done to pass checkpatch. */
792 kvlist = rte_kvargs_parse(devargs->args, params);
795 /* Process parameters. */
796 for (i = 0; (params[i] != NULL); ++i) {
797 if (rte_kvargs_count(kvlist, params[i])) {
798 ret = rte_kvargs_process(kvlist, params[i],
799 mlx5_args_check, config);
802 rte_kvargs_free(kvlist);
807 rte_kvargs_free(kvlist);
811 static struct rte_pci_driver mlx5_driver;
814 find_lower_va_bound(const struct rte_memseg_list *msl,
815 const struct rte_memseg *ms, void *arg)
824 *addr = RTE_MIN(*addr, ms->addr);
830 * Reserve UAR address space for primary process.
832 * Process local resource is used by both primary and secondary to avoid
833 * duplicate reservation. The space has to be available on both primary and
834 * secondary process, TXQ UAR maps to this area using fixed mmap w/o double
838 * 0 on success, a negative errno value otherwise and rte_errno is set.
841 mlx5_uar_init_primary(void)
843 struct mlx5_shared_data *sd = mlx5_shared_data;
844 void *addr = (void *)0;
848 /* find out lower bound of hugepage segments */
849 rte_memseg_walk(find_lower_va_bound, &addr);
850 /* keep distance to hugepages to minimize potential conflicts. */
851 addr = RTE_PTR_SUB(addr, (uintptr_t)(MLX5_UAR_OFFSET + MLX5_UAR_SIZE));
852 /* anonymous mmap, no real memory consumption. */
853 addr = mmap(addr, MLX5_UAR_SIZE,
854 PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
855 if (addr == MAP_FAILED) {
857 "Failed to reserve UAR address space, please"
858 " adjust MLX5_UAR_SIZE or try --base-virtaddr");
862 /* Accept either same addr or a new addr returned from mmap if target
865 DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
866 sd->uar_base = addr; /* for primary and secondary UAR re-mmap. */
871 * Unmap UAR address space reserved for primary process.
874 mlx5_uar_uninit_primary(void)
876 struct mlx5_shared_data *sd = mlx5_shared_data;
880 munmap(sd->uar_base, MLX5_UAR_SIZE);
885 * Reserve UAR address space for secondary process, align with primary process.
888 * 0 on success, a negative errno value otherwise and rte_errno is set.
891 mlx5_uar_init_secondary(void)
893 struct mlx5_shared_data *sd = mlx5_shared_data;
894 struct mlx5_local_data *ld = &mlx5_local_data;
897 if (ld->uar_base) { /* Already reserved. */
898 assert(sd->uar_base == ld->uar_base);
901 assert(sd->uar_base);
902 /* anonymous mmap, no real memory consumption. */
903 addr = mmap(sd->uar_base, MLX5_UAR_SIZE,
904 PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
905 if (addr == MAP_FAILED) {
906 DRV_LOG(ERR, "UAR mmap failed: %p size: %llu",
907 sd->uar_base, MLX5_UAR_SIZE);
911 if (sd->uar_base != addr) {
913 "UAR address %p size %llu occupied, please"
914 " adjust MLX5_UAR_OFFSET or try EAL parameter"
916 sd->uar_base, MLX5_UAR_SIZE);
921 DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
926 * Unmap UAR address space reserved for secondary process.
929 mlx5_uar_uninit_secondary(void)
931 struct mlx5_local_data *ld = &mlx5_local_data;
935 munmap(ld->uar_base, MLX5_UAR_SIZE);
940 * PMD global initialization.
942 * Independent from individual device, this function initializes global
943 * per-PMD data structures distinguishing primary and secondary processes.
944 * Hence, each initialization is called once per a process.
947 * 0 on success, a negative errno value otherwise and rte_errno is set.
952 struct mlx5_shared_data *sd;
953 struct mlx5_local_data *ld = &mlx5_local_data;
956 if (mlx5_init_shared_data())
958 sd = mlx5_shared_data;
960 rte_spinlock_lock(&sd->lock);
961 switch (rte_eal_process_type()) {
962 case RTE_PROC_PRIMARY:
965 LIST_INIT(&sd->mem_event_cb_list);
966 rte_rwlock_init(&sd->mem_event_rwlock);
967 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
968 mlx5_mr_mem_event_cb, NULL);
969 mlx5_mp_init_primary();
970 ret = mlx5_uar_init_primary();
973 sd->init_done = true;
975 case RTE_PROC_SECONDARY:
978 mlx5_mp_init_secondary();
979 ret = mlx5_uar_init_secondary();
983 ld->init_done = true;
988 rte_spinlock_unlock(&sd->lock);
991 switch (rte_eal_process_type()) {
992 case RTE_PROC_PRIMARY:
993 mlx5_uar_uninit_primary();
994 mlx5_mp_uninit_primary();
995 rte_mem_event_callback_unregister("MLX5_MEM_EVENT_CB", NULL);
997 case RTE_PROC_SECONDARY:
998 mlx5_uar_uninit_secondary();
999 mlx5_mp_uninit_secondary();
1004 rte_spinlock_unlock(&sd->lock);
1005 mlx5_uninit_shared_data();
1010 * Spawn an Ethernet device from Verbs information.
1013 * Backing DPDK device.
1015 * Verbs device parameters (name, port, switch_info) to spawn.
1017 * Device configuration parameters.
1020 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1021 * is set. The following errors are defined:
1023 * EBUSY: device is not supposed to be spawned.
1024 * EEXIST: device is already spawned
1026 static struct rte_eth_dev *
1027 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1028 struct mlx5_dev_spawn_data *spawn,
1029 struct mlx5_dev_config config)
1031 const struct mlx5_switch_info *switch_info = &spawn->info;
1032 struct mlx5_ibv_shared *sh = NULL;
1033 struct ibv_port_attr port_attr;
1034 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1035 struct rte_eth_dev *eth_dev = NULL;
1036 struct mlx5_priv *priv = NULL;
1038 unsigned int hw_padding = 0;
1040 unsigned int cqe_comp;
1041 unsigned int cqe_pad = 0;
1042 unsigned int tunnel_en = 0;
1043 unsigned int mpls_en = 0;
1044 unsigned int swp = 0;
1045 unsigned int mprq = 0;
1046 unsigned int mprq_min_stride_size_n = 0;
1047 unsigned int mprq_max_stride_size_n = 0;
1048 unsigned int mprq_min_stride_num_n = 0;
1049 unsigned int mprq_max_stride_num_n = 0;
1050 struct ether_addr mac;
1051 char name[RTE_ETH_NAME_MAX_LEN];
1052 int own_domain_id = 0;
1056 /* Determine if this port representor is supposed to be spawned. */
1057 if (switch_info->representor && dpdk_dev->devargs) {
1058 struct rte_eth_devargs eth_da;
1060 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1063 DRV_LOG(ERR, "failed to process device arguments: %s",
1064 strerror(rte_errno));
1067 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1068 if (eth_da.representor_ports[i] ==
1069 (uint16_t)switch_info->port_name)
1071 if (i == eth_da.nb_representor_ports) {
1076 /* Build device name. */
1077 if (!switch_info->representor)
1078 strlcpy(name, dpdk_dev->name, sizeof(name));
1080 snprintf(name, sizeof(name), "%s_representor_%u",
1081 dpdk_dev->name, switch_info->port_name);
1082 /* check if the device is already spawned */
1083 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1087 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1088 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1089 eth_dev = rte_eth_dev_attach_secondary(name);
1090 if (eth_dev == NULL) {
1091 DRV_LOG(ERR, "can not attach rte ethdev");
1095 eth_dev->device = dpdk_dev;
1096 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1097 /* Receive command fd from primary process */
1098 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1101 /* Remap UAR for Tx queues. */
1102 err = mlx5_tx_uar_remap(eth_dev, err);
1106 * Ethdev pointer is still required as input since
1107 * the primary device is not accessible from the
1108 * secondary process.
1110 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1111 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1114 sh = mlx5_alloc_shared_ibctx(spawn);
1117 config.devx = sh->devx;
1118 #ifdef HAVE_IBV_MLX5_MOD_SWP
1119 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1122 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1123 * as all ConnectX-5 devices.
1125 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1126 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1128 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1129 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1131 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1132 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1133 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1134 DRV_LOG(DEBUG, "enhanced MPW is supported");
1135 mps = MLX5_MPW_ENHANCED;
1137 DRV_LOG(DEBUG, "MPW is supported");
1141 DRV_LOG(DEBUG, "MPW isn't supported");
1142 mps = MLX5_MPW_DISABLED;
1144 #ifdef HAVE_IBV_MLX5_MOD_SWP
1145 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1146 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1147 DRV_LOG(DEBUG, "SWP support: %u", swp);
1150 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1151 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1152 struct mlx5dv_striding_rq_caps mprq_caps =
1153 dv_attr.striding_rq_caps;
1155 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1156 mprq_caps.min_single_stride_log_num_of_bytes);
1157 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1158 mprq_caps.max_single_stride_log_num_of_bytes);
1159 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1160 mprq_caps.min_single_wqe_log_num_of_strides);
1161 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1162 mprq_caps.max_single_wqe_log_num_of_strides);
1163 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1164 mprq_caps.supported_qpts);
1165 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1167 mprq_min_stride_size_n =
1168 mprq_caps.min_single_stride_log_num_of_bytes;
1169 mprq_max_stride_size_n =
1170 mprq_caps.max_single_stride_log_num_of_bytes;
1171 mprq_min_stride_num_n =
1172 mprq_caps.min_single_wqe_log_num_of_strides;
1173 mprq_max_stride_num_n =
1174 mprq_caps.max_single_wqe_log_num_of_strides;
1175 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1176 mprq_min_stride_num_n);
1179 if (RTE_CACHE_LINE_SIZE == 128 &&
1180 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1184 config.cqe_comp = cqe_comp;
1185 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1186 /* Whether device supports 128B Rx CQE padding. */
1187 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1188 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1190 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1191 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1192 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1193 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1194 (dv_attr.tunnel_offloads_caps &
1195 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1197 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1198 tunnel_en ? "" : "not ");
1201 "tunnel offloading disabled due to old OFED/rdma-core version");
1203 config.tunnel_en = tunnel_en;
1204 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1205 mpls_en = ((dv_attr.tunnel_offloads_caps &
1206 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1207 (dv_attr.tunnel_offloads_caps &
1208 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1209 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1210 mpls_en ? "" : "not ");
1212 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1213 " old OFED/rdma-core version or firmware configuration");
1215 config.mpls_en = mpls_en;
1216 /* Check port status. */
1217 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1219 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1222 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1223 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1227 if (port_attr.state != IBV_PORT_ACTIVE)
1228 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1229 mlx5_glue->port_state_str(port_attr.state),
1231 /* Allocate private eth device data. */
1232 priv = rte_zmalloc("ethdev private structure",
1234 RTE_CACHE_LINE_SIZE);
1236 DRV_LOG(ERR, "priv allocation failure");
1241 priv->ibv_port = spawn->ibv_port;
1242 priv->mtu = ETHER_MTU;
1244 /* Initialize UAR access locks for 32bit implementations. */
1245 rte_spinlock_init(&priv->uar_lock_cq);
1246 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1247 rte_spinlock_init(&priv->uar_lock[i]);
1249 /* Some internal functions rely on Netlink sockets, open them now. */
1250 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1251 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1253 priv->representor = !!switch_info->representor;
1254 priv->master = !!switch_info->master;
1255 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1257 * Currently we support single E-Switch per PF configurations
1258 * only and vport_id field contains the vport index for
1259 * associated VF, which is deduced from representor port name.
1260 * For exapmple, let's have the IB device port 10, it has
1261 * attached network device eth0, which has port name attribute
1262 * pf0vf2, we can deduce the VF number as 2, and set vport index
1263 * as 3 (2+1). This assigning schema should be changed if the
1264 * multiple E-Switch instances per PF configurations or/and PCI
1265 * subfunctions are added.
1267 priv->vport_id = switch_info->representor ?
1268 switch_info->port_name + 1 : -1;
1269 /* representor_id field keeps the unmodified port/VF index. */
1270 priv->representor_id = switch_info->representor ?
1271 switch_info->port_name : -1;
1273 * Look for sibling devices in order to reuse their switch domain
1274 * if any, otherwise allocate one.
1276 i = mlx5_dev_to_port_id(dpdk_dev, NULL, 0);
1278 uint16_t port_id[i];
1280 i = RTE_MIN(mlx5_dev_to_port_id(dpdk_dev, port_id, i), i);
1282 const struct mlx5_priv *opriv =
1283 rte_eth_devices[port_id[i]].data->dev_private;
1287 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1289 priv->domain_id = opriv->domain_id;
1293 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1294 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1297 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1298 strerror(rte_errno));
1303 err = mlx5_args(&config, dpdk_dev->devargs);
1306 DRV_LOG(ERR, "failed to process device arguments: %s",
1307 strerror(rte_errno));
1310 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1311 IBV_DEVICE_RAW_IP_CSUM);
1312 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1313 (config.hw_csum ? "" : "not "));
1314 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1315 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1316 DRV_LOG(DEBUG, "counters are not supported");
1318 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1319 if (config.dv_flow_en) {
1320 DRV_LOG(WARNING, "DV flow is not supported");
1321 config.dv_flow_en = 0;
1324 config.ind_table_max_size =
1325 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1327 * Remove this check once DPDK supports larger/variable
1328 * indirection tables.
1330 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1331 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1332 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1333 config.ind_table_max_size);
1334 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1335 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1336 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1337 (config.hw_vlan_strip ? "" : "not "));
1338 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1339 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1340 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1341 (config.hw_fcs_strip ? "" : "not "));
1342 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1343 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1344 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1345 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1346 IBV_DEVICE_PCI_WRITE_END_PADDING);
1348 if (config.hw_padding && !hw_padding) {
1349 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1350 config.hw_padding = 0;
1351 } else if (config.hw_padding) {
1352 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1354 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1355 (sh->device_attr.tso_caps.supported_qpts &
1356 (1 << IBV_QPT_RAW_PACKET)));
1358 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1360 * MPW is disabled by default, while the Enhanced MPW is enabled
1363 if (config.mps == MLX5_ARG_UNSET)
1364 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1367 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1368 DRV_LOG(INFO, "%sMPS is %s",
1369 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1370 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1371 if (config.cqe_comp && !cqe_comp) {
1372 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1373 config.cqe_comp = 0;
1375 if (config.cqe_pad && !cqe_pad) {
1376 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1378 } else if (config.cqe_pad) {
1379 DRV_LOG(INFO, "Rx CQE padding is enabled");
1381 if (config.mprq.enabled && mprq) {
1382 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1383 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1384 config.mprq.stride_num_n =
1385 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1386 mprq_min_stride_num_n);
1388 "the number of strides"
1389 " for Multi-Packet RQ is out of range,"
1390 " setting default value (%u)",
1391 1 << config.mprq.stride_num_n);
1393 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1394 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1395 } else if (config.mprq.enabled && !mprq) {
1396 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1397 config.mprq.enabled = 0;
1399 eth_dev = rte_eth_dev_allocate(name);
1400 if (eth_dev == NULL) {
1401 DRV_LOG(ERR, "can not allocate rte ethdev");
1405 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1406 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1407 if (priv->representor) {
1408 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1409 eth_dev->data->representor_id = priv->representor_id;
1411 eth_dev->data->dev_private = priv;
1412 priv->dev_data = eth_dev->data;
1413 eth_dev->data->mac_addrs = priv->mac;
1414 eth_dev->device = dpdk_dev;
1415 /* Configure the first MAC address by default. */
1416 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1418 "port %u cannot get MAC address, is mlx5_en"
1419 " loaded? (errno: %s)",
1420 eth_dev->data->port_id, strerror(rte_errno));
1425 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1426 eth_dev->data->port_id,
1427 mac.addr_bytes[0], mac.addr_bytes[1],
1428 mac.addr_bytes[2], mac.addr_bytes[3],
1429 mac.addr_bytes[4], mac.addr_bytes[5]);
1432 char ifname[IF_NAMESIZE];
1434 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1435 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1436 eth_dev->data->port_id, ifname);
1438 DRV_LOG(DEBUG, "port %u ifname is unknown",
1439 eth_dev->data->port_id);
1442 /* Get actual MTU if possible. */
1443 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1448 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1450 /* Initialize burst functions to prevent crashes before link-up. */
1451 eth_dev->rx_pkt_burst = removed_rx_burst;
1452 eth_dev->tx_pkt_burst = removed_tx_burst;
1453 eth_dev->dev_ops = &mlx5_dev_ops;
1454 /* Register MAC address. */
1455 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1456 if (config.vf && config.vf_nl_en)
1457 mlx5_nl_mac_addr_sync(eth_dev);
1458 priv->tcf_context = mlx5_flow_tcf_context_create();
1459 if (!priv->tcf_context) {
1462 "flow rules relying on switch offloads will not be"
1463 " supported: cannot open libmnl socket: %s",
1464 strerror(rte_errno));
1466 struct rte_flow_error error;
1467 unsigned int ifindex = mlx5_ifindex(eth_dev);
1472 "cannot retrieve network interface index";
1474 err = mlx5_flow_tcf_init(priv->tcf_context,
1479 "flow rules relying on switch offloads will"
1480 " not be supported: %s: %s",
1481 error.message, strerror(rte_errno));
1482 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1483 priv->tcf_context = NULL;
1486 TAILQ_INIT(&priv->flows);
1487 TAILQ_INIT(&priv->ctrl_flows);
1488 /* Hint libmlx5 to use PMD allocator for data plane resources */
1489 struct mlx5dv_ctx_allocators alctr = {
1490 .alloc = &mlx5_alloc_verbs_buf,
1491 .free = &mlx5_free_verbs_buf,
1494 mlx5_glue->dv_set_context_attr(sh->ctx,
1495 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1496 (void *)((uintptr_t)&alctr));
1497 /* Bring Ethernet device up. */
1498 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1499 eth_dev->data->port_id);
1500 mlx5_set_link_up(eth_dev);
1502 * Even though the interrupt handler is not installed yet,
1503 * interrupts will still trigger on the asyn_fd from
1504 * Verbs context returned by ibv_open_device().
1506 mlx5_link_update(eth_dev, 0);
1507 /* Store device configuration on private structure. */
1508 priv->config = config;
1509 /* Supported Verbs flow priority number detection. */
1510 err = mlx5_flow_discover_priorities(eth_dev);
1515 priv->config.flow_prio = err;
1517 * Once the device is added to the list of memory event
1518 * callback, its global MR cache table cannot be expanded
1519 * on the fly because of deadlock. If it overflows, lookup
1520 * should be done by searching MR list linearly, which is slow.
1522 err = mlx5_mr_btree_init(&priv->mr.cache,
1523 MLX5_MR_BTREE_CACHE_N * 2,
1524 eth_dev->device->numa_node);
1529 /* Add device to memory callback list. */
1530 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1531 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1532 priv, mem_event_cb);
1533 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1537 if (priv->nl_socket_route >= 0)
1538 close(priv->nl_socket_route);
1539 if (priv->nl_socket_rdma >= 0)
1540 close(priv->nl_socket_rdma);
1541 if (priv->tcf_context)
1542 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1544 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1546 if (eth_dev != NULL)
1547 eth_dev->data->dev_private = NULL;
1549 if (eth_dev != NULL) {
1550 /* mac_addrs must not be freed alone because part of dev_private */
1551 eth_dev->data->mac_addrs = NULL;
1552 rte_eth_dev_release_port(eth_dev);
1555 mlx5_free_shared_ibctx(sh);
1562 * Comparison callback to sort device data.
1564 * This is meant to be used with qsort().
1567 * Pointer to pointer to first data object.
1569 * Pointer to pointer to second data object.
1572 * 0 if both objects are equal, less than 0 if the first argument is less
1573 * than the second, greater than 0 otherwise.
1576 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1578 const struct mlx5_switch_info *si_a =
1579 &((const struct mlx5_dev_spawn_data *)a)->info;
1580 const struct mlx5_switch_info *si_b =
1581 &((const struct mlx5_dev_spawn_data *)b)->info;
1584 /* Master device first. */
1585 ret = si_b->master - si_a->master;
1588 /* Then representor devices. */
1589 ret = si_b->representor - si_a->representor;
1592 /* Unidentified devices come last in no specific order. */
1593 if (!si_a->representor)
1595 /* Order representors by name. */
1596 return si_a->port_name - si_b->port_name;
1600 * DPDK callback to register a PCI device.
1602 * This function spawns Ethernet devices out of a given PCI device.
1604 * @param[in] pci_drv
1605 * PCI driver structure (mlx5_driver).
1606 * @param[in] pci_dev
1607 * PCI device information.
1610 * 0 on success, a negative errno value otherwise and rte_errno is set.
1613 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1614 struct rte_pci_device *pci_dev)
1616 struct ibv_device **ibv_list;
1618 * Number of found IB Devices matching with requested PCI BDF.
1619 * nd != 1 means there are multiple IB devices over the same
1620 * PCI device and we have representors and master.
1622 unsigned int nd = 0;
1624 * Number of found IB device Ports. nd = 1 and np = 1..n means
1625 * we have the single multiport IB device, and there may be
1626 * representors attached to some of found ports.
1628 unsigned int np = 0;
1630 * Number of DPDK ethernet devices to Spawn - either over
1631 * multiple IB devices or multiple ports of single IB device.
1632 * Actually this is the number of iterations to spawn.
1634 unsigned int ns = 0;
1635 struct mlx5_dev_config dev_config;
1638 ret = mlx5_init_once();
1640 DRV_LOG(ERR, "unable to init PMD global data: %s",
1641 strerror(rte_errno));
1644 assert(pci_drv == &mlx5_driver);
1646 ibv_list = mlx5_glue->get_device_list(&ret);
1648 rte_errno = errno ? errno : ENOSYS;
1649 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1653 * First scan the list of all Infiniband devices to find
1654 * matching ones, gathering into the list.
1656 struct ibv_device *ibv_match[ret + 1];
1662 struct rte_pci_addr pci_addr;
1664 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1665 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1667 if (pci_dev->addr.domain != pci_addr.domain ||
1668 pci_dev->addr.bus != pci_addr.bus ||
1669 pci_dev->addr.devid != pci_addr.devid ||
1670 pci_dev->addr.function != pci_addr.function)
1672 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1673 ibv_list[ret]->name);
1674 ibv_match[nd++] = ibv_list[ret];
1676 ibv_match[nd] = NULL;
1678 /* No device macthes, just complain and bail out. */
1679 mlx5_glue->free_device_list(ibv_list);
1681 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1682 " are kernel drivers loaded?",
1683 pci_dev->addr.domain, pci_dev->addr.bus,
1684 pci_dev->addr.devid, pci_dev->addr.function);
1689 nl_route = mlx5_nl_init(NETLINK_ROUTE);
1690 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1693 * Found single matching device may have multiple ports.
1694 * Each port may be representor, we have to check the port
1695 * number and check the representors existence.
1698 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1700 DRV_LOG(WARNING, "can not get IB device \"%s\""
1701 " ports number", ibv_match[0]->name);
1704 * Now we can determine the maximal
1705 * amount of devices to be spawned.
1707 struct mlx5_dev_spawn_data list[np ? np : nd];
1711 * Signle IB device with multiple ports found,
1712 * it may be E-Switch master device and representors.
1713 * We have to perform identification trough the ports.
1715 assert(nl_rdma >= 0);
1718 for (i = 1; i <= np; ++i) {
1719 list[ns].max_port = np;
1720 list[ns].ibv_port = i;
1721 list[ns].ibv_dev = ibv_match[0];
1722 list[ns].eth_dev = NULL;
1723 list[ns].ifindex = mlx5_nl_ifindex
1724 (nl_rdma, list[ns].ibv_dev->name, i);
1725 if (!list[ns].ifindex) {
1727 * No network interface index found for the
1728 * specified port, it means there is no
1729 * representor on this port. It's OK,
1730 * there can be disabled ports, for example
1731 * if sriov_numvfs < sriov_totalvfs.
1737 ret = mlx5_nl_switch_info
1741 if (ret || (!list[ns].info.representor &&
1742 !list[ns].info.master)) {
1744 * We failed to recognize representors with
1745 * Netlink, let's try to perform the task
1748 ret = mlx5_sysfs_switch_info
1752 if (!ret && (list[ns].info.representor ^
1753 list[ns].info.master))
1758 "unable to recognize master/representors"
1759 " on the IB device with multiple ports");
1766 * The existence of several matching entries (nd > 1) means
1767 * port representors have been instantiated. No existing Verbs
1768 * call nor sysfs entries can tell them apart, this can only
1769 * be done through Netlink calls assuming kernel drivers are
1770 * recent enough to support them.
1772 * In the event of identification failure through Netlink,
1773 * try again through sysfs, then:
1775 * 1. A single IB device matches (nd == 1) with single
1776 * port (np=0/1) and is not a representor, assume
1777 * no switch support.
1779 * 2. Otherwise no safe assumptions can be made;
1780 * complain louder and bail out.
1783 for (i = 0; i != nd; ++i) {
1784 memset(&list[ns].info, 0, sizeof(list[ns].info));
1785 list[ns].max_port = 1;
1786 list[ns].ibv_port = 1;
1787 list[ns].ibv_dev = ibv_match[i];
1788 list[ns].eth_dev = NULL;
1789 list[ns].ifindex = 0;
1791 list[ns].ifindex = mlx5_nl_ifindex
1792 (nl_rdma, list[ns].ibv_dev->name, 1);
1793 if (!list[ns].ifindex) {
1795 * No network interface index found for the
1796 * specified device, it means there it is not
1797 * a representor/master.
1803 ret = mlx5_nl_switch_info
1807 if (ret || (!list[ns].info.representor &&
1808 !list[ns].info.master)) {
1810 * We failed to recognize representors with
1811 * Netlink, let's try to perform the task
1814 ret = mlx5_sysfs_switch_info
1818 if (!ret && (list[ns].info.representor ^
1819 list[ns].info.master)) {
1821 } else if ((nd == 1) &&
1822 !list[ns].info.representor &&
1823 !list[ns].info.master) {
1825 * Single IB device with
1826 * one physical port and
1827 * attached network device.
1828 * May be SRIOV is not enabled
1829 * or there is no representors.
1831 DRV_LOG(INFO, "no E-Switch support detected");
1838 "unable to recognize master/representors"
1839 " on the multiple IB devices");
1847 * Sort list to probe devices in natural order for users convenience
1848 * (i.e. master first, then representors from lowest to highest ID).
1850 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1851 /* Default configuration. */
1852 dev_config = (struct mlx5_dev_config){
1854 .mps = MLX5_ARG_UNSET,
1857 .txq_inline = MLX5_ARG_UNSET,
1858 .txqs_inline = MLX5_ARG_UNSET,
1859 .txqs_vec = MLX5_ARG_UNSET,
1860 .inline_max_packet_sz = MLX5_ARG_UNSET,
1862 .mr_ext_memseg_en = 1,
1864 .enabled = 0, /* Disabled by default. */
1865 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1866 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1867 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1870 /* Device specific configuration. */
1871 switch (pci_dev->id.device_id) {
1872 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1873 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1875 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1876 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1877 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1878 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1884 /* Set architecture-dependent default value if unset. */
1885 if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1886 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1887 for (i = 0; i != ns; ++i) {
1890 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1893 if (!list[i].eth_dev) {
1894 if (rte_errno != EBUSY && rte_errno != EEXIST)
1896 /* Device is disabled or already spawned. Ignore it. */
1899 restore = list[i].eth_dev->data->dev_flags;
1900 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1901 /* Restore non-PCI flags cleared by the above call. */
1902 list[i].eth_dev->data->dev_flags |= restore;
1903 rte_eth_dev_probing_finish(list[i].eth_dev);
1907 "probe of PCI device " PCI_PRI_FMT " aborted after"
1908 " encountering an error: %s",
1909 pci_dev->addr.domain, pci_dev->addr.bus,
1910 pci_dev->addr.devid, pci_dev->addr.function,
1911 strerror(rte_errno));
1915 if (!list[i].eth_dev)
1917 mlx5_dev_close(list[i].eth_dev);
1918 /* mac_addrs must not be freed because in dev_private */
1919 list[i].eth_dev->data->mac_addrs = NULL;
1920 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1922 /* Restore original error. */
1929 * Do the routine cleanup:
1930 * - close opened Netlink sockets
1931 * - free the Infiniband device list
1938 mlx5_glue->free_device_list(ibv_list);
1943 * DPDK callback to remove a PCI device.
1945 * This function removes all Ethernet devices belong to a given PCI device.
1947 * @param[in] pci_dev
1948 * Pointer to the PCI device.
1951 * 0 on success, the function cannot fail.
1954 mlx5_pci_remove(struct rte_pci_device *pci_dev)
1957 struct rte_eth_dev *port;
1959 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
1960 port = &rte_eth_devices[port_id];
1961 if (port->state != RTE_ETH_DEV_UNUSED &&
1962 port->device == &pci_dev->device)
1963 rte_eth_dev_close(port_id);
1968 static const struct rte_pci_id mlx5_pci_id_map[] = {
1970 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1971 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
1974 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1975 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
1978 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1979 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
1982 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1983 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
1986 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1987 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
1990 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1991 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
1994 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1995 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
1998 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1999 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2002 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2003 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2006 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2007 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2010 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2011 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2014 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2015 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2022 static struct rte_pci_driver mlx5_driver = {
2024 .name = MLX5_DRIVER_NAME
2026 .id_table = mlx5_pci_id_map,
2027 .probe = mlx5_pci_probe,
2028 .remove = mlx5_pci_remove,
2029 .dma_map = mlx5_dma_map,
2030 .dma_unmap = mlx5_dma_unmap,
2031 .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2032 RTE_PCI_DRV_PROBE_AGAIN),
2035 #ifdef RTE_IBVERBS_LINK_DLOPEN
2038 * Suffix RTE_EAL_PMD_PATH with "-glue".
2040 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2041 * suffixing its last component.
2044 * Output buffer, should be large enough otherwise NULL is returned.
2049 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2052 mlx5_glue_path(char *buf, size_t size)
2054 static const char *const bad[] = { "/", ".", "..", NULL };
2055 const char *path = RTE_EAL_PMD_PATH;
2056 size_t len = strlen(path);
2060 while (len && path[len - 1] == '/')
2062 for (off = len; off && path[off - 1] != '/'; --off)
2064 for (i = 0; bad[i]; ++i)
2065 if (!strncmp(path + off, bad[i], (int)(len - off)))
2067 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2068 if (i == -1 || (size_t)i >= size)
2073 "unable to append \"-glue\" to last component of"
2074 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2075 " please re-configure DPDK");
2080 * Initialization routine for run-time dependency on rdma-core.
2083 mlx5_glue_init(void)
2085 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2086 const char *path[] = {
2088 * A basic security check is necessary before trusting
2089 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2091 (geteuid() == getuid() && getegid() == getgid() ?
2092 getenv("MLX5_GLUE_PATH") : NULL),
2094 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2095 * variant, otherwise let dlopen() look up libraries on its
2098 (*RTE_EAL_PMD_PATH ?
2099 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2102 void *handle = NULL;
2106 while (!handle && i != RTE_DIM(path)) {
2115 end = strpbrk(path[i], ":;");
2117 end = path[i] + strlen(path[i]);
2118 len = end - path[i];
2123 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2125 (!len || *(end - 1) == '/') ? "" : "/");
2128 if (sizeof(name) != (size_t)ret + 1)
2130 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2132 handle = dlopen(name, RTLD_LAZY);
2143 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2146 sym = dlsym(handle, "mlx5_glue");
2147 if (!sym || !*sym) {
2151 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2160 "cannot initialize PMD due to missing run-time dependency on"
2161 " rdma-core libraries (libibverbs, libmlx5)");
2168 * Driver initialization routine.
2170 RTE_INIT(rte_mlx5_pmd_init)
2172 /* Initialize driver log type. */
2173 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2174 if (mlx5_logtype >= 0)
2175 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2177 /* Build the static tables for Verbs conversion. */
2178 mlx5_set_ptype_table();
2179 mlx5_set_cksum_table();
2180 mlx5_set_swp_types_table();
2182 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2183 * huge pages. Calling ibv_fork_init() during init allows
2184 * applications to use fork() safely for purposes other than
2185 * using this PMD, which is not supported in forked processes.
2187 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2188 /* Match the size of Rx completion entry to the size of a cacheline. */
2189 if (RTE_CACHE_LINE_SIZE == 128)
2190 setenv("MLX5_CQE_SIZE", "128", 0);
2192 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2193 * cleanup all the Verbs resources even when the device was removed.
2195 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2196 #ifdef RTE_IBVERBS_LINK_DLOPEN
2197 if (mlx5_glue_init())
2202 /* Glue structure must not contain any NULL pointers. */
2206 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2207 assert(((const void *const *)mlx5_glue)[i]);
2210 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2212 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2213 mlx5_glue->version, MLX5_GLUE_VERSION);
2216 mlx5_glue->fork_init();
2217 rte_pci_register(&mlx5_driver);
2220 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2221 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2222 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");