4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
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12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
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15 * the documentation and/or other materials provided with the
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22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
45 #pragma GCC diagnostic ignored "-pedantic"
47 #include <infiniband/verbs.h>
49 #pragma GCC diagnostic error "-pedantic"
52 /* DPDK headers don't like -pedantic. */
54 #pragma GCC diagnostic ignored "-pedantic"
56 #include <rte_malloc.h>
57 #include <rte_ethdev.h>
59 #include <rte_common.h>
61 #pragma GCC diagnostic error "-pedantic"
65 #include "mlx5_utils.h"
66 #include "mlx5_rxtx.h"
67 #include "mlx5_autoconf.h"
68 #include "mlx5_defs.h"
71 * DPDK callback to close the device.
73 * Destroy all queues and objects, free memory.
76 * Pointer to Ethernet device structure.
79 mlx5_dev_close(struct rte_eth_dev *dev)
81 struct priv *priv = dev->data->dev_private;
86 DEBUG("%p: closing device \"%s\"",
88 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
89 /* In case mlx5_dev_stop() has not been called. */
90 priv_dev_interrupt_handler_uninstall(priv, dev);
91 priv_special_flow_disable(priv, HASH_RXQ_FLOW_TYPE_ALLMULTI);
92 priv_special_flow_disable(priv, HASH_RXQ_FLOW_TYPE_PROMISC);
93 priv_special_flow_disable(priv, HASH_RXQ_FLOW_TYPE_BROADCAST);
94 priv_special_flow_disable(priv, HASH_RXQ_FLOW_TYPE_IPV6MULTI);
95 priv_mac_addrs_disable(priv);
96 priv_destroy_hash_rxqs(priv);
98 /* Remove flow director elements. */
99 priv_fdir_disable(priv);
100 priv_fdir_delete_filters_list(priv);
102 /* Prevent crashes when queues are still in use. */
103 dev->rx_pkt_burst = removed_rx_burst;
104 dev->tx_pkt_burst = removed_tx_burst;
105 if (priv->rxqs != NULL) {
106 /* XXX race condition if mlx5_rx_burst() is still running. */
108 for (i = 0; (i != priv->rxqs_n); ++i) {
109 tmp = (*priv->rxqs)[i];
112 (*priv->rxqs)[i] = NULL;
119 if (priv->txqs != NULL) {
120 /* XXX race condition if mlx5_tx_burst() is still running. */
122 for (i = 0; (i != priv->txqs_n); ++i) {
123 tmp = (*priv->txqs)[i];
126 (*priv->txqs)[i] = NULL;
133 if (priv->pd != NULL) {
134 assert(priv->ctx != NULL);
135 claim_zero(ibv_dealloc_pd(priv->pd));
136 claim_zero(ibv_close_device(priv->ctx));
138 assert(priv->ctx == NULL);
139 if (priv->rss_conf != NULL) {
140 for (i = 0; (i != hash_rxq_init_n); ++i)
141 rte_free((*priv->rss_conf)[i]);
142 rte_free(priv->rss_conf);
144 if (priv->reta_idx != NULL)
145 rte_free(priv->reta_idx);
147 memset(priv, 0, sizeof(*priv));
150 static const struct eth_dev_ops mlx5_dev_ops = {
151 .dev_configure = mlx5_dev_configure,
152 .dev_start = mlx5_dev_start,
153 .dev_stop = mlx5_dev_stop,
154 .dev_close = mlx5_dev_close,
155 .promiscuous_enable = mlx5_promiscuous_enable,
156 .promiscuous_disable = mlx5_promiscuous_disable,
157 .allmulticast_enable = mlx5_allmulticast_enable,
158 .allmulticast_disable = mlx5_allmulticast_disable,
159 .link_update = mlx5_link_update,
160 .stats_get = mlx5_stats_get,
161 .stats_reset = mlx5_stats_reset,
162 .dev_infos_get = mlx5_dev_infos_get,
163 .vlan_filter_set = mlx5_vlan_filter_set,
164 .rx_queue_setup = mlx5_rx_queue_setup,
165 .tx_queue_setup = mlx5_tx_queue_setup,
166 .rx_queue_release = mlx5_rx_queue_release,
167 .tx_queue_release = mlx5_tx_queue_release,
168 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
169 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
170 .mac_addr_remove = mlx5_mac_addr_remove,
171 .mac_addr_add = mlx5_mac_addr_add,
172 .mac_addr_set = mlx5_mac_addr_set,
173 .mtu_set = mlx5_dev_set_mtu,
174 .reta_update = mlx5_dev_rss_reta_update,
175 .reta_query = mlx5_dev_rss_reta_query,
176 .rss_hash_update = mlx5_rss_hash_update,
177 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
178 #ifdef MLX5_FDIR_SUPPORT
179 .filter_ctrl = mlx5_dev_filter_ctrl,
180 #endif /* MLX5_FDIR_SUPPORT */
184 struct rte_pci_addr pci_addr; /* associated PCI address */
185 uint32_t ports; /* physical ports bitfield. */
189 * Get device index in mlx5_dev[] from PCI bus address.
191 * @param[in] pci_addr
192 * PCI bus address to look for.
195 * mlx5_dev[] index on success, -1 on failure.
198 mlx5_dev_idx(struct rte_pci_addr *pci_addr)
203 assert(pci_addr != NULL);
204 for (i = 0; (i != RTE_DIM(mlx5_dev)); ++i) {
205 if ((mlx5_dev[i].pci_addr.domain == pci_addr->domain) &&
206 (mlx5_dev[i].pci_addr.bus == pci_addr->bus) &&
207 (mlx5_dev[i].pci_addr.devid == pci_addr->devid) &&
208 (mlx5_dev[i].pci_addr.function == pci_addr->function))
210 if ((mlx5_dev[i].ports == 0) && (ret == -1))
216 static struct eth_driver mlx5_driver;
219 * DPDK callback to register a PCI device.
221 * This function creates an Ethernet device for each port of a given
225 * PCI driver structure (mlx5_driver).
227 * PCI device information.
230 * 0 on success, negative errno value on failure.
233 mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
235 struct ibv_device **list;
236 struct ibv_device *ibv_dev;
238 struct ibv_context *attr_ctx = NULL;
239 struct ibv_device_attr device_attr;
245 assert(pci_drv == &mlx5_driver.pci_drv);
246 /* Get mlx5_dev[] index. */
247 idx = mlx5_dev_idx(&pci_dev->addr);
249 ERROR("this driver cannot support any more adapters");
252 DEBUG("using driver device index %d", idx);
254 /* Save PCI address. */
255 mlx5_dev[idx].pci_addr = pci_dev->addr;
256 list = ibv_get_device_list(&i);
259 if (errno == ENOSYS) {
260 WARN("cannot list devices, is ib_uverbs loaded?");
267 * For each listed device, check related sysfs entry against
268 * the provided PCI ID.
271 struct rte_pci_addr pci_addr;
274 DEBUG("checking device \"%s\"", list[i]->name);
275 if (mlx5_ibv_device_to_pci_addr(list[i], &pci_addr))
277 if ((pci_dev->addr.domain != pci_addr.domain) ||
278 (pci_dev->addr.bus != pci_addr.bus) ||
279 (pci_dev->addr.devid != pci_addr.devid) ||
280 (pci_dev->addr.function != pci_addr.function))
282 vf = ((pci_dev->id.device_id ==
283 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) ||
284 (pci_dev->id.device_id ==
285 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF));
286 INFO("PCI information matches, using device \"%s\" (VF: %s)",
287 list[i]->name, (vf ? "true" : "false"));
288 attr_ctx = ibv_open_device(list[i]);
292 if (attr_ctx == NULL) {
293 ibv_free_device_list(list);
296 WARN("cannot access device, is mlx5_ib loaded?");
299 WARN("cannot use device, are drivers up to date?");
307 DEBUG("device opened");
308 if (ibv_query_device(attr_ctx, &device_attr))
310 INFO("%u port(s) detected", device_attr.phys_port_cnt);
312 for (i = 0; i < device_attr.phys_port_cnt; i++) {
313 uint32_t port = i + 1; /* ports are indexed from one */
314 uint32_t test = (1 << i);
315 struct ibv_context *ctx = NULL;
316 struct ibv_port_attr port_attr;
317 struct ibv_pd *pd = NULL;
318 struct priv *priv = NULL;
319 struct rte_eth_dev *eth_dev;
320 #ifdef HAVE_EXP_QUERY_DEVICE
321 struct ibv_exp_device_attr exp_device_attr;
322 #endif /* HAVE_EXP_QUERY_DEVICE */
323 struct ether_addr mac;
325 #ifdef HAVE_EXP_QUERY_DEVICE
326 exp_device_attr.comp_mask =
327 IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS |
328 IBV_EXP_DEVICE_ATTR_RX_HASH;
329 #endif /* HAVE_EXP_QUERY_DEVICE */
331 DEBUG("using port %u (%08" PRIx32 ")", port, test);
333 ctx = ibv_open_device(ibv_dev);
337 /* Check port status. */
338 err = ibv_query_port(ctx, port, &port_attr);
340 ERROR("port query failed: %s", strerror(err));
343 if (port_attr.state != IBV_PORT_ACTIVE)
344 DEBUG("port %d is not active: \"%s\" (%d)",
345 port, ibv_port_state_str(port_attr.state),
348 /* Allocate protection domain. */
349 pd = ibv_alloc_pd(ctx);
351 ERROR("PD allocation failure");
356 mlx5_dev[idx].ports |= test;
358 /* from rte_ethdev.c */
359 priv = rte_zmalloc("ethdev private structure",
361 RTE_CACHE_LINE_SIZE);
363 ERROR("priv allocation failure");
369 priv->device_attr = device_attr;
372 priv->mtu = ETHER_MTU;
373 #ifdef HAVE_EXP_QUERY_DEVICE
374 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
375 ERROR("ibv_exp_query_device() failed");
380 ((exp_device_attr.exp_device_cap_flags &
381 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
382 (exp_device_attr.exp_device_cap_flags &
383 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
384 DEBUG("checksum offloading is %ssupported",
385 (priv->hw_csum ? "" : "not "));
387 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
388 IBV_EXP_DEVICE_VXLAN_SUPPORT);
389 DEBUG("L2 tunnel checksum offloads are %ssupported",
390 (priv->hw_csum_l2tun ? "" : "not "));
392 priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
393 /* Remove this check once DPDK supports larger/variable
394 * indirection tables. */
395 if (priv->ind_table_max_size > (unsigned int)RSS_INDIRECTION_TABLE_SIZE)
396 priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
397 DEBUG("maximum RX indirection table size is %u",
398 priv->ind_table_max_size);
400 #else /* HAVE_EXP_QUERY_DEVICE */
401 priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
402 #endif /* HAVE_EXP_QUERY_DEVICE */
405 /* Allocate and register default RSS hash keys. */
406 priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
407 sizeof((*priv->rss_conf)[0]), 0);
408 if (priv->rss_conf == NULL) {
412 err = rss_hash_rss_conf_new_key(priv,
413 rss_hash_default_key,
414 rss_hash_default_key_len,
418 /* Configure the first MAC address by default. */
419 if (priv_get_mac(priv, &mac.addr_bytes)) {
420 ERROR("cannot get MAC address, is mlx5_en loaded?"
421 " (errno: %s)", strerror(errno));
424 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
426 mac.addr_bytes[0], mac.addr_bytes[1],
427 mac.addr_bytes[2], mac.addr_bytes[3],
428 mac.addr_bytes[4], mac.addr_bytes[5]);
429 /* Register MAC address. */
430 claim_zero(priv_mac_addr_add(priv, 0,
431 (const uint8_t (*)[ETHER_ADDR_LEN])
433 /* Initialize FD filters list. */
434 err = fdir_init_filters_list(priv);
439 char ifname[IF_NAMESIZE];
441 if (priv_get_ifname(priv, &ifname) == 0)
442 DEBUG("port %u ifname is \"%s\"",
445 DEBUG("port %u ifname is unknown", priv->port);
448 /* Get actual MTU if possible. */
449 priv_get_mtu(priv, &priv->mtu);
450 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
452 /* from rte_ethdev.c */
454 char name[RTE_ETH_NAME_MAX_LEN];
456 snprintf(name, sizeof(name), "%s port %u",
457 ibv_get_device_name(ibv_dev), port);
458 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
460 if (eth_dev == NULL) {
461 ERROR("can not allocate rte ethdev");
466 eth_dev->data->dev_private = priv;
467 eth_dev->pci_dev = pci_dev;
469 rte_eth_copy_pci_info(eth_dev, pci_dev);
471 eth_dev->driver = &mlx5_driver;
472 eth_dev->data->rx_mbuf_alloc_failed = 0;
473 eth_dev->data->mtu = ETHER_MTU;
476 eth_dev->dev_ops = &mlx5_dev_ops;
477 eth_dev->data->mac_addrs = priv->mac;
478 TAILQ_INIT(ð_dev->link_intr_cbs);
480 /* Bring Ethernet device up. */
481 DEBUG("forcing Ethernet interface up");
482 priv_set_flags(priv, ~IFF_UP, IFF_UP);
486 rte_free(priv->rss_conf);
489 claim_zero(ibv_dealloc_pd(pd));
491 claim_zero(ibv_close_device(ctx));
496 * XXX if something went wrong in the loop above, there is a resource
497 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
498 * long as the dpdk does not provide a way to deallocate a ethdev and a
499 * way to enumerate the registered ethdevs to free the previous ones.
502 /* no port found, complain */
503 if (!mlx5_dev[idx].ports) {
510 claim_zero(ibv_close_device(attr_ctx));
512 ibv_free_device_list(list);
517 static const struct rte_pci_id mlx5_pci_id_map[] = {
519 .vendor_id = PCI_VENDOR_ID_MELLANOX,
520 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4,
521 .subsystem_vendor_id = PCI_ANY_ID,
522 .subsystem_device_id = PCI_ANY_ID
525 .vendor_id = PCI_VENDOR_ID_MELLANOX,
526 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4VF,
527 .subsystem_vendor_id = PCI_ANY_ID,
528 .subsystem_device_id = PCI_ANY_ID
531 .vendor_id = PCI_VENDOR_ID_MELLANOX,
532 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4LX,
533 .subsystem_vendor_id = PCI_ANY_ID,
534 .subsystem_device_id = PCI_ANY_ID
537 .vendor_id = PCI_VENDOR_ID_MELLANOX,
538 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF,
539 .subsystem_vendor_id = PCI_ANY_ID,
540 .subsystem_device_id = PCI_ANY_ID
547 static struct eth_driver mlx5_driver = {
549 .name = MLX5_DRIVER_NAME,
550 .id_table = mlx5_pci_id_map,
551 .devinit = mlx5_pci_devinit,
552 .drv_flags = RTE_PCI_DRV_INTR_LSC,
554 .dev_private_size = sizeof(struct priv)
558 * Driver initialization routine.
561 rte_mlx5_pmd_init(const char *name, const char *args)
566 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
567 * huge pages. Calling ibv_fork_init() during init allows
568 * applications to use fork() safely for purposes other than
569 * using this PMD, which is not supported in forked processes.
571 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
573 rte_eal_pci_register(&mlx5_driver.pci_drv);
577 static struct rte_driver rte_mlx5_driver = {
579 .name = MLX5_DRIVER_NAME,
580 .init = rte_mlx5_pmd_init,
583 PMD_REGISTER_DRIVER(rte_mlx5_driver)