1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. */
72 #define MLX5_TXQ_INLINE "txq_inline"
75 * Device parameter to configure the number of TX queues threshold for
76 * enabling inline send.
78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
81 * Device parameter to configure the number of TX queues threshold for
82 * enabling vectorized Tx.
84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
86 /* Device parameter to enable multi-packet send WQEs. */
87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
89 /* Device parameter to include 2 dsegs in the title WQEBB. */
90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
92 /* Device parameter to limit the size of inlining packet. */
93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
95 /* Device parameter to enable hardware Tx vector. */
96 #define MLX5_TX_VEC_EN "tx_vec_en"
98 /* Device parameter to enable hardware Rx vector. */
99 #define MLX5_RX_VEC_EN "rx_vec_en"
101 /* Allow L3 VXLAN flow creation. */
102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
104 /* Activate DV E-Switch flow steering. */
105 #define MLX5_DV_ESW_EN "dv_esw_en"
107 /* Activate DV flow steering. */
108 #define MLX5_DV_FLOW_EN "dv_flow_en"
110 /* Activate Netlink support in VF mode. */
111 #define MLX5_VF_NL_EN "vf_nl_en"
113 /* Enable extending memsegs when creating a MR. */
114 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
116 /* Select port representors to instantiate. */
117 #define MLX5_REPRESENTOR "representor"
119 #ifndef HAVE_IBV_MLX5_MOD_MPW
120 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
121 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
124 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
125 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
128 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
130 /* Shared memory between primary and secondary processes. */
131 struct mlx5_shared_data *mlx5_shared_data;
133 /* Spinlock for mlx5_shared_data allocation. */
134 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
136 /* Process local data for secondary processes. */
137 static struct mlx5_local_data mlx5_local_data;
139 /** Driver-specific log messages type. */
142 /** Data associated with devices to spawn. */
143 struct mlx5_dev_spawn_data {
144 uint32_t ifindex; /**< Network interface index. */
145 uint32_t max_port; /**< IB device maximal port index. */
146 uint32_t ibv_port; /**< IB device physical port index. */
147 struct mlx5_switch_info info; /**< Switch information. */
148 struct ibv_device *ibv_dev; /**< Associated IB device. */
149 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
152 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
153 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
156 * Allocate shared IB device context. If there is multiport device the
157 * master and representors will share this context, if there is single
158 * port dedicated IB device, the context will be used by only given
159 * port due to unification.
161 * Routine first searches the context for the specified IB device name,
162 * if found the shared context assumed and reference counter is incremented.
163 * If no context found the new one is created and initialized with specified
164 * IB device context and parameters.
167 * Pointer to the IB device attributes (name, port, etc).
170 * Pointer to mlx5_ibv_shared object on success,
171 * otherwise NULL and rte_errno is set.
173 static struct mlx5_ibv_shared *
174 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
176 struct mlx5_ibv_shared *sh;
181 /* Secondary process should not create the shared context. */
182 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
183 pthread_mutex_lock(&mlx5_ibv_list_mutex);
184 /* Search for IB context by device name. */
185 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
186 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
191 /* No device found, we have to create new shared context. */
192 assert(spawn->max_port);
193 sh = rte_zmalloc("ethdev shared ib context",
194 sizeof(struct mlx5_ibv_shared) +
196 sizeof(struct mlx5_ibv_shared_port),
197 RTE_CACHE_LINE_SIZE);
199 DRV_LOG(ERR, "shared context allocation failure");
203 /* Try to open IB device with DV first, then usual Verbs. */
205 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
208 DRV_LOG(DEBUG, "DevX is supported");
210 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
212 err = errno ? errno : ENODEV;
215 DRV_LOG(DEBUG, "DevX is NOT supported");
217 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
219 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
223 sh->max_port = spawn->max_port;
224 strncpy(sh->ibdev_name, sh->ctx->device->name,
225 sizeof(sh->ibdev_name));
226 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
227 sizeof(sh->ibdev_path));
228 pthread_mutex_init(&sh->intr_mutex, NULL);
230 * Setting port_id to max unallowed value means
231 * there is no interrupt subhandler installed for
232 * the given port index i.
234 for (i = 0; i < sh->max_port; i++)
235 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
236 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
237 if (sh->pd == NULL) {
238 DRV_LOG(ERR, "PD allocation failure");
242 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
244 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
247 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
250 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
252 claim_zero(mlx5_glue->close_device(sh->ctx));
260 * Free shared IB device context. Decrement counter and if zero free
261 * all allocated resources and close handles.
264 * Pointer to mlx5_ibv_shared object to free
267 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
269 pthread_mutex_lock(&mlx5_ibv_list_mutex);
271 /* Check the object presence in the list. */
272 struct mlx5_ibv_shared *lctx;
274 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
279 DRV_LOG(ERR, "Freeing non-existing shared IB context");
285 /* Secondary process should not free the shared context. */
286 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
289 LIST_REMOVE(sh, next);
291 * Ensure there is no async event handler installed.
292 * Only primary process handles async device events.
294 assert(!sh->intr_cnt);
296 rte_intr_callback_unregister
297 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
298 pthread_mutex_destroy(&sh->intr_mutex);
300 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
302 claim_zero(mlx5_glue->close_device(sh->ctx));
305 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
309 * Initialize DR related data within private structure.
310 * Routine checks the reference counter and does actual
311 * resources creation/initialization only if counter is zero.
314 * Pointer to the private device data structure.
317 * Zero on success, positive error code otherwise.
320 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
322 #ifdef HAVE_MLX5DV_DR
323 struct mlx5_ibv_shared *sh = priv->sh;
329 /* Shared DV/DR structures is already initialized. */
334 /* Reference counter is zero, we should initialize structures. */
335 ns = mlx5dv_dr_create_ns(sh->ctx, MLX5DV_DR_NS_DOMAIN_INGRESS_BYPASS);
337 DRV_LOG(ERR, "ingress mlx5dv_dr_create_ns failed");
342 ns = mlx5dv_dr_create_ns(sh->ctx, MLX5DV_DR_NS_DOMAIN_EGRESS_BYPASS);
344 DRV_LOG(ERR, "egress mlx5dv_dr_create_ns failed");
348 pthread_mutex_init(&sh->dv_mutex, NULL);
350 #ifdef HAVE_MLX5DV_DR_ESWITCH
351 if (priv->config.dv_esw_en) {
352 ns = mlx5_glue->dr_create_ns(sh->ctx,
353 MLX5DV_DR_NS_DOMAIN_FDB_BYPASS);
355 DRV_LOG(ERR, "FDB mlx5dv_dr_create_ns failed");
360 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
368 /* Rollback the created objects. */
370 mlx5dv_dr_destroy_ns(sh->rx_ns);
374 mlx5dv_dr_destroy_ns(sh->tx_ns);
378 mlx5_glue->dr_destroy_ns(sh->fdb_ns);
381 if (sh->esw_drop_action) {
382 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
383 sh->esw_drop_action = NULL;
393 * Destroy DR related data within private structure.
396 * Pointer to the private device data structure.
399 mlx5_free_shared_dr(struct mlx5_priv *priv)
401 #ifdef HAVE_MLX5DV_DR
402 struct mlx5_ibv_shared *sh;
404 if (!priv->dr_shared)
409 assert(sh->dv_refcnt);
410 if (sh->dv_refcnt && --sh->dv_refcnt)
413 mlx5dv_dr_destroy_ns(sh->rx_ns);
417 mlx5dv_dr_destroy_ns(sh->tx_ns);
420 #ifdef HAVE_MLX5DV_DR_ESWITCH
422 mlx5_glue->dr_destroy_ns(sh->fdb_ns);
425 if (sh->esw_drop_action) {
426 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
427 sh->esw_drop_action = NULL;
430 pthread_mutex_destroy(&sh->dv_mutex);
437 * Initialize shared data between primary and secondary process.
439 * A memzone is reserved by primary process and secondary processes attach to
443 * 0 on success, a negative errno value otherwise and rte_errno is set.
446 mlx5_init_shared_data(void)
448 const struct rte_memzone *mz;
451 rte_spinlock_lock(&mlx5_shared_data_lock);
452 if (mlx5_shared_data == NULL) {
453 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
454 /* Allocate shared memory. */
455 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
456 sizeof(*mlx5_shared_data),
460 "Cannot allocate mlx5 shared data\n");
464 mlx5_shared_data = mz->addr;
465 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
466 rte_spinlock_init(&mlx5_shared_data->lock);
468 /* Lookup allocated shared memory. */
469 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
472 "Cannot attach mlx5 shared data\n");
476 mlx5_shared_data = mz->addr;
477 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
481 rte_spinlock_unlock(&mlx5_shared_data_lock);
486 * Retrieve integer value from environment variable.
489 * Environment variable name.
492 * Integer value, 0 if the variable is not set.
495 mlx5_getenv_int(const char *name)
497 const char *val = getenv(name);
505 * Verbs callback to allocate a memory. This function should allocate the space
506 * according to the size provided residing inside a huge page.
507 * Please note that all allocation must respect the alignment from libmlx5
508 * (i.e. currently sysconf(_SC_PAGESIZE)).
511 * The size in bytes of the memory to allocate.
513 * A pointer to the callback data.
516 * Allocated buffer, NULL otherwise and rte_errno is set.
519 mlx5_alloc_verbs_buf(size_t size, void *data)
521 struct mlx5_priv *priv = data;
523 size_t alignment = sysconf(_SC_PAGESIZE);
524 unsigned int socket = SOCKET_ID_ANY;
526 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
527 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
529 socket = ctrl->socket;
530 } else if (priv->verbs_alloc_ctx.type ==
531 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
532 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
534 socket = ctrl->socket;
536 assert(data != NULL);
537 ret = rte_malloc_socket(__func__, size, alignment, socket);
544 * Verbs callback to free a memory.
547 * A pointer to the memory to free.
549 * A pointer to the callback data.
552 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
554 assert(data != NULL);
559 * Initialize process private data structure.
562 * Pointer to Ethernet device structure.
565 * 0 on success, a negative errno value otherwise and rte_errno is set.
568 mlx5_proc_priv_init(struct rte_eth_dev *dev)
570 struct mlx5_priv *priv = dev->data->dev_private;
571 struct mlx5_proc_priv *ppriv;
575 * UAR register table follows the process private structure. BlueFlame
576 * registers for Tx queues are stored in the table.
579 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
580 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
581 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
586 ppriv->uar_table_sz = ppriv_size;
587 dev->process_private = ppriv;
592 * Un-initialize process private data structure.
595 * Pointer to Ethernet device structure.
598 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
600 if (!dev->process_private)
602 rte_free(dev->process_private);
603 dev->process_private = NULL;
607 * DPDK callback to close the device.
609 * Destroy all queues and objects, free memory.
612 * Pointer to Ethernet device structure.
615 mlx5_dev_close(struct rte_eth_dev *dev)
617 struct mlx5_priv *priv = dev->data->dev_private;
621 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
623 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
624 /* In case mlx5_dev_stop() has not been called. */
625 mlx5_dev_interrupt_handler_uninstall(dev);
626 mlx5_traffic_disable(dev);
627 mlx5_flow_flush(dev, NULL);
628 /* Prevent crashes when queues are still in use. */
629 dev->rx_pkt_burst = removed_rx_burst;
630 dev->tx_pkt_burst = removed_tx_burst;
632 /* Disable datapath on secondary process. */
633 mlx5_mp_req_stop_rxtx(dev);
634 if (priv->rxqs != NULL) {
635 /* XXX race condition if mlx5_rx_burst() is still running. */
637 for (i = 0; (i != priv->rxqs_n); ++i)
638 mlx5_rxq_release(dev, i);
642 if (priv->txqs != NULL) {
643 /* XXX race condition if mlx5_tx_burst() is still running. */
645 for (i = 0; (i != priv->txqs_n); ++i)
646 mlx5_txq_release(dev, i);
650 mlx5_proc_priv_uninit(dev);
651 mlx5_mprq_free_mp(dev);
652 mlx5_mr_release(dev);
654 mlx5_free_shared_dr(priv);
655 if (priv->rss_conf.rss_key != NULL)
656 rte_free(priv->rss_conf.rss_key);
657 if (priv->reta_idx != NULL)
658 rte_free(priv->reta_idx);
660 mlx5_nl_mac_addr_flush(dev);
661 if (priv->nl_socket_route >= 0)
662 close(priv->nl_socket_route);
663 if (priv->nl_socket_rdma >= 0)
664 close(priv->nl_socket_rdma);
665 if (priv->tcf_context)
666 mlx5_flow_tcf_context_destroy(priv->tcf_context);
669 * Free the shared context in last turn, because the cleanup
670 * routines above may use some shared fields, like
671 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
672 * ifindex if Netlink fails.
674 mlx5_free_shared_ibctx(priv->sh);
677 ret = mlx5_hrxq_ibv_verify(dev);
679 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
681 ret = mlx5_ind_table_ibv_verify(dev);
683 DRV_LOG(WARNING, "port %u some indirection table still remain",
685 ret = mlx5_rxq_ibv_verify(dev);
687 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
689 ret = mlx5_rxq_verify(dev);
691 DRV_LOG(WARNING, "port %u some Rx queues still remain",
693 ret = mlx5_txq_ibv_verify(dev);
695 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
697 ret = mlx5_txq_verify(dev);
699 DRV_LOG(WARNING, "port %u some Tx queues still remain",
701 ret = mlx5_flow_verify(dev);
703 DRV_LOG(WARNING, "port %u some flows still remain",
705 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
709 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
710 struct mlx5_priv *opriv =
711 rte_eth_devices[port_id].data->dev_private;
714 opriv->domain_id != priv->domain_id ||
715 &rte_eth_devices[port_id] == dev)
720 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
722 memset(priv, 0, sizeof(*priv));
723 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
725 * Reset mac_addrs to NULL such that it is not freed as part of
726 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
727 * it is freed when dev_private is freed.
729 dev->data->mac_addrs = NULL;
732 const struct eth_dev_ops mlx5_dev_ops = {
733 .dev_configure = mlx5_dev_configure,
734 .dev_start = mlx5_dev_start,
735 .dev_stop = mlx5_dev_stop,
736 .dev_set_link_down = mlx5_set_link_down,
737 .dev_set_link_up = mlx5_set_link_up,
738 .dev_close = mlx5_dev_close,
739 .promiscuous_enable = mlx5_promiscuous_enable,
740 .promiscuous_disable = mlx5_promiscuous_disable,
741 .allmulticast_enable = mlx5_allmulticast_enable,
742 .allmulticast_disable = mlx5_allmulticast_disable,
743 .link_update = mlx5_link_update,
744 .stats_get = mlx5_stats_get,
745 .stats_reset = mlx5_stats_reset,
746 .xstats_get = mlx5_xstats_get,
747 .xstats_reset = mlx5_xstats_reset,
748 .xstats_get_names = mlx5_xstats_get_names,
749 .fw_version_get = mlx5_fw_version_get,
750 .dev_infos_get = mlx5_dev_infos_get,
751 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
752 .vlan_filter_set = mlx5_vlan_filter_set,
753 .rx_queue_setup = mlx5_rx_queue_setup,
754 .tx_queue_setup = mlx5_tx_queue_setup,
755 .rx_queue_release = mlx5_rx_queue_release,
756 .tx_queue_release = mlx5_tx_queue_release,
757 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
758 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
759 .mac_addr_remove = mlx5_mac_addr_remove,
760 .mac_addr_add = mlx5_mac_addr_add,
761 .mac_addr_set = mlx5_mac_addr_set,
762 .set_mc_addr_list = mlx5_set_mc_addr_list,
763 .mtu_set = mlx5_dev_set_mtu,
764 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
765 .vlan_offload_set = mlx5_vlan_offload_set,
766 .reta_update = mlx5_dev_rss_reta_update,
767 .reta_query = mlx5_dev_rss_reta_query,
768 .rss_hash_update = mlx5_rss_hash_update,
769 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
770 .filter_ctrl = mlx5_dev_filter_ctrl,
771 .rx_descriptor_status = mlx5_rx_descriptor_status,
772 .tx_descriptor_status = mlx5_tx_descriptor_status,
773 .rx_queue_count = mlx5_rx_queue_count,
774 .rx_queue_intr_enable = mlx5_rx_intr_enable,
775 .rx_queue_intr_disable = mlx5_rx_intr_disable,
776 .is_removed = mlx5_is_removed,
779 /* Available operations from secondary process. */
780 static const struct eth_dev_ops mlx5_dev_sec_ops = {
781 .stats_get = mlx5_stats_get,
782 .stats_reset = mlx5_stats_reset,
783 .xstats_get = mlx5_xstats_get,
784 .xstats_reset = mlx5_xstats_reset,
785 .xstats_get_names = mlx5_xstats_get_names,
786 .fw_version_get = mlx5_fw_version_get,
787 .dev_infos_get = mlx5_dev_infos_get,
788 .rx_descriptor_status = mlx5_rx_descriptor_status,
789 .tx_descriptor_status = mlx5_tx_descriptor_status,
792 /* Available operations in flow isolated mode. */
793 const struct eth_dev_ops mlx5_dev_ops_isolate = {
794 .dev_configure = mlx5_dev_configure,
795 .dev_start = mlx5_dev_start,
796 .dev_stop = mlx5_dev_stop,
797 .dev_set_link_down = mlx5_set_link_down,
798 .dev_set_link_up = mlx5_set_link_up,
799 .dev_close = mlx5_dev_close,
800 .promiscuous_enable = mlx5_promiscuous_enable,
801 .promiscuous_disable = mlx5_promiscuous_disable,
802 .allmulticast_enable = mlx5_allmulticast_enable,
803 .allmulticast_disable = mlx5_allmulticast_disable,
804 .link_update = mlx5_link_update,
805 .stats_get = mlx5_stats_get,
806 .stats_reset = mlx5_stats_reset,
807 .xstats_get = mlx5_xstats_get,
808 .xstats_reset = mlx5_xstats_reset,
809 .xstats_get_names = mlx5_xstats_get_names,
810 .fw_version_get = mlx5_fw_version_get,
811 .dev_infos_get = mlx5_dev_infos_get,
812 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
813 .vlan_filter_set = mlx5_vlan_filter_set,
814 .rx_queue_setup = mlx5_rx_queue_setup,
815 .tx_queue_setup = mlx5_tx_queue_setup,
816 .rx_queue_release = mlx5_rx_queue_release,
817 .tx_queue_release = mlx5_tx_queue_release,
818 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
819 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
820 .mac_addr_remove = mlx5_mac_addr_remove,
821 .mac_addr_add = mlx5_mac_addr_add,
822 .mac_addr_set = mlx5_mac_addr_set,
823 .set_mc_addr_list = mlx5_set_mc_addr_list,
824 .mtu_set = mlx5_dev_set_mtu,
825 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
826 .vlan_offload_set = mlx5_vlan_offload_set,
827 .filter_ctrl = mlx5_dev_filter_ctrl,
828 .rx_descriptor_status = mlx5_rx_descriptor_status,
829 .tx_descriptor_status = mlx5_tx_descriptor_status,
830 .rx_queue_intr_enable = mlx5_rx_intr_enable,
831 .rx_queue_intr_disable = mlx5_rx_intr_disable,
832 .is_removed = mlx5_is_removed,
836 * Verify and store value for device argument.
839 * Key argument to verify.
841 * Value associated with key.
846 * 0 on success, a negative errno value otherwise and rte_errno is set.
849 mlx5_args_check(const char *key, const char *val, void *opaque)
851 struct mlx5_dev_config *config = opaque;
854 /* No-op, port representors are processed in mlx5_dev_spawn(). */
855 if (!strcmp(MLX5_REPRESENTOR, key))
858 tmp = strtoul(val, NULL, 0);
861 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
864 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
865 config->cqe_comp = !!tmp;
866 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
867 config->cqe_pad = !!tmp;
868 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
869 config->hw_padding = !!tmp;
870 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
871 config->mprq.enabled = !!tmp;
872 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
873 config->mprq.stride_num_n = tmp;
874 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
875 config->mprq.max_memcpy_len = tmp;
876 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
877 config->mprq.min_rxqs_num = tmp;
878 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
879 config->txq_inline = tmp;
880 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
881 config->txqs_inline = tmp;
882 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
883 config->txqs_vec = tmp;
884 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
886 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
887 config->mpw_hdr_dseg = !!tmp;
888 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
889 config->inline_max_packet_sz = tmp;
890 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
891 config->tx_vec_en = !!tmp;
892 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
893 config->rx_vec_en = !!tmp;
894 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
895 config->l3_vxlan_en = !!tmp;
896 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
897 config->vf_nl_en = !!tmp;
898 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
899 config->dv_esw_en = !!tmp;
900 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
901 config->dv_flow_en = !!tmp;
902 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
903 config->mr_ext_memseg_en = !!tmp;
905 DRV_LOG(WARNING, "%s: unknown parameter", key);
913 * Parse device parameters.
916 * Pointer to device configuration structure.
918 * Device arguments structure.
921 * 0 on success, a negative errno value otherwise and rte_errno is set.
924 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
926 const char **params = (const char *[]){
927 MLX5_RXQ_CQE_COMP_EN,
931 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
932 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
935 MLX5_TXQS_MIN_INLINE,
938 MLX5_TXQ_MPW_HDR_DSEG_EN,
939 MLX5_TXQ_MAX_INLINE_LEN,
946 MLX5_MR_EXT_MEMSEG_EN,
950 struct rte_kvargs *kvlist;
956 /* Following UGLY cast is done to pass checkpatch. */
957 kvlist = rte_kvargs_parse(devargs->args, params);
960 /* Process parameters. */
961 for (i = 0; (params[i] != NULL); ++i) {
962 if (rte_kvargs_count(kvlist, params[i])) {
963 ret = rte_kvargs_process(kvlist, params[i],
964 mlx5_args_check, config);
967 rte_kvargs_free(kvlist);
972 rte_kvargs_free(kvlist);
976 static struct rte_pci_driver mlx5_driver;
979 * PMD global initialization.
981 * Independent from individual device, this function initializes global
982 * per-PMD data structures distinguishing primary and secondary processes.
983 * Hence, each initialization is called once per a process.
986 * 0 on success, a negative errno value otherwise and rte_errno is set.
991 struct mlx5_shared_data *sd;
992 struct mlx5_local_data *ld = &mlx5_local_data;
994 if (mlx5_init_shared_data())
996 sd = mlx5_shared_data;
998 rte_spinlock_lock(&sd->lock);
999 switch (rte_eal_process_type()) {
1000 case RTE_PROC_PRIMARY:
1003 LIST_INIT(&sd->mem_event_cb_list);
1004 rte_rwlock_init(&sd->mem_event_rwlock);
1005 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1006 mlx5_mr_mem_event_cb, NULL);
1007 mlx5_mp_init_primary();
1008 sd->init_done = true;
1010 case RTE_PROC_SECONDARY:
1013 mlx5_mp_init_secondary();
1014 ++sd->secondary_cnt;
1015 ld->init_done = true;
1020 rte_spinlock_unlock(&sd->lock);
1025 * Spawn an Ethernet device from Verbs information.
1028 * Backing DPDK device.
1030 * Verbs device parameters (name, port, switch_info) to spawn.
1032 * Device configuration parameters.
1035 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1036 * is set. The following errors are defined:
1038 * EBUSY: device is not supposed to be spawned.
1039 * EEXIST: device is already spawned
1041 static struct rte_eth_dev *
1042 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1043 struct mlx5_dev_spawn_data *spawn,
1044 struct mlx5_dev_config config)
1046 const struct mlx5_switch_info *switch_info = &spawn->info;
1047 struct mlx5_ibv_shared *sh = NULL;
1048 struct ibv_port_attr port_attr;
1049 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1050 struct rte_eth_dev *eth_dev = NULL;
1051 struct mlx5_priv *priv = NULL;
1053 unsigned int hw_padding = 0;
1055 unsigned int cqe_comp;
1056 unsigned int cqe_pad = 0;
1057 unsigned int tunnel_en = 0;
1058 unsigned int mpls_en = 0;
1059 unsigned int swp = 0;
1060 unsigned int mprq = 0;
1061 unsigned int mprq_min_stride_size_n = 0;
1062 unsigned int mprq_max_stride_size_n = 0;
1063 unsigned int mprq_min_stride_num_n = 0;
1064 unsigned int mprq_max_stride_num_n = 0;
1065 struct ether_addr mac;
1066 char name[RTE_ETH_NAME_MAX_LEN];
1067 int own_domain_id = 0;
1071 /* Determine if this port representor is supposed to be spawned. */
1072 if (switch_info->representor && dpdk_dev->devargs) {
1073 struct rte_eth_devargs eth_da;
1075 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1078 DRV_LOG(ERR, "failed to process device arguments: %s",
1079 strerror(rte_errno));
1082 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1083 if (eth_da.representor_ports[i] ==
1084 (uint16_t)switch_info->port_name)
1086 if (i == eth_da.nb_representor_ports) {
1091 /* Build device name. */
1092 if (!switch_info->representor)
1093 strlcpy(name, dpdk_dev->name, sizeof(name));
1095 snprintf(name, sizeof(name), "%s_representor_%u",
1096 dpdk_dev->name, switch_info->port_name);
1097 /* check if the device is already spawned */
1098 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1102 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1103 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1104 eth_dev = rte_eth_dev_attach_secondary(name);
1105 if (eth_dev == NULL) {
1106 DRV_LOG(ERR, "can not attach rte ethdev");
1110 eth_dev->device = dpdk_dev;
1111 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1112 err = mlx5_proc_priv_init(eth_dev);
1115 /* Receive command fd from primary process */
1116 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1119 /* Remap UAR for Tx queues. */
1120 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1124 * Ethdev pointer is still required as input since
1125 * the primary device is not accessible from the
1126 * secondary process.
1128 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1129 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1132 sh = mlx5_alloc_shared_ibctx(spawn);
1135 config.devx = sh->devx;
1136 #ifdef HAVE_IBV_MLX5_MOD_SWP
1137 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1140 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1141 * as all ConnectX-5 devices.
1143 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1144 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1146 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1147 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1149 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1150 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1151 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1152 DRV_LOG(DEBUG, "enhanced MPW is supported");
1153 mps = MLX5_MPW_ENHANCED;
1155 DRV_LOG(DEBUG, "MPW is supported");
1159 DRV_LOG(DEBUG, "MPW isn't supported");
1160 mps = MLX5_MPW_DISABLED;
1162 #ifdef HAVE_IBV_MLX5_MOD_SWP
1163 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1164 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1165 DRV_LOG(DEBUG, "SWP support: %u", swp);
1168 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1169 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1170 struct mlx5dv_striding_rq_caps mprq_caps =
1171 dv_attr.striding_rq_caps;
1173 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1174 mprq_caps.min_single_stride_log_num_of_bytes);
1175 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1176 mprq_caps.max_single_stride_log_num_of_bytes);
1177 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1178 mprq_caps.min_single_wqe_log_num_of_strides);
1179 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1180 mprq_caps.max_single_wqe_log_num_of_strides);
1181 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1182 mprq_caps.supported_qpts);
1183 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1185 mprq_min_stride_size_n =
1186 mprq_caps.min_single_stride_log_num_of_bytes;
1187 mprq_max_stride_size_n =
1188 mprq_caps.max_single_stride_log_num_of_bytes;
1189 mprq_min_stride_num_n =
1190 mprq_caps.min_single_wqe_log_num_of_strides;
1191 mprq_max_stride_num_n =
1192 mprq_caps.max_single_wqe_log_num_of_strides;
1193 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1194 mprq_min_stride_num_n);
1197 if (RTE_CACHE_LINE_SIZE == 128 &&
1198 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1202 config.cqe_comp = cqe_comp;
1203 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1204 /* Whether device supports 128B Rx CQE padding. */
1205 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1206 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1208 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1209 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1210 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1211 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1212 (dv_attr.tunnel_offloads_caps &
1213 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1215 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1216 tunnel_en ? "" : "not ");
1219 "tunnel offloading disabled due to old OFED/rdma-core version");
1221 config.tunnel_en = tunnel_en;
1222 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1223 mpls_en = ((dv_attr.tunnel_offloads_caps &
1224 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1225 (dv_attr.tunnel_offloads_caps &
1226 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1227 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1228 mpls_en ? "" : "not ");
1230 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1231 " old OFED/rdma-core version or firmware configuration");
1233 config.mpls_en = mpls_en;
1234 /* Check port status. */
1235 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1237 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1240 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1241 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1245 if (port_attr.state != IBV_PORT_ACTIVE)
1246 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1247 mlx5_glue->port_state_str(port_attr.state),
1249 /* Allocate private eth device data. */
1250 priv = rte_zmalloc("ethdev private structure",
1252 RTE_CACHE_LINE_SIZE);
1254 DRV_LOG(ERR, "priv allocation failure");
1259 priv->ibv_port = spawn->ibv_port;
1260 priv->mtu = ETHER_MTU;
1262 /* Initialize UAR access locks for 32bit implementations. */
1263 rte_spinlock_init(&priv->uar_lock_cq);
1264 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1265 rte_spinlock_init(&priv->uar_lock[i]);
1267 /* Some internal functions rely on Netlink sockets, open them now. */
1268 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1269 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1271 priv->representor = !!switch_info->representor;
1272 priv->master = !!switch_info->master;
1273 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1275 * Currently we support single E-Switch per PF configurations
1276 * only and vport_id field contains the vport index for
1277 * associated VF, which is deduced from representor port name.
1278 * For example, let's have the IB device port 10, it has
1279 * attached network device eth0, which has port name attribute
1280 * pf0vf2, we can deduce the VF number as 2, and set vport index
1281 * as 3 (2+1). This assigning schema should be changed if the
1282 * multiple E-Switch instances per PF configurations or/and PCI
1283 * subfunctions are added.
1285 priv->vport_id = switch_info->representor ?
1286 switch_info->port_name + 1 : -1;
1287 /* representor_id field keeps the unmodified port/VF index. */
1288 priv->representor_id = switch_info->representor ?
1289 switch_info->port_name : -1;
1291 * Look for sibling devices in order to reuse their switch domain
1292 * if any, otherwise allocate one.
1294 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1295 const struct mlx5_priv *opriv =
1296 rte_eth_devices[port_id].data->dev_private;
1300 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1302 priv->domain_id = opriv->domain_id;
1305 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1306 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1309 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1310 strerror(rte_errno));
1315 err = mlx5_args(&config, dpdk_dev->devargs);
1318 DRV_LOG(ERR, "failed to process device arguments: %s",
1319 strerror(rte_errno));
1322 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1323 IBV_DEVICE_RAW_IP_CSUM);
1324 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1325 (config.hw_csum ? "" : "not "));
1326 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1327 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1328 DRV_LOG(DEBUG, "counters are not supported");
1330 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1331 if (config.dv_flow_en) {
1332 DRV_LOG(WARNING, "DV flow is not supported");
1333 config.dv_flow_en = 0;
1336 config.ind_table_max_size =
1337 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1339 * Remove this check once DPDK supports larger/variable
1340 * indirection tables.
1342 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1343 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1344 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1345 config.ind_table_max_size);
1346 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1347 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1348 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1349 (config.hw_vlan_strip ? "" : "not "));
1350 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1351 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1352 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1353 (config.hw_fcs_strip ? "" : "not "));
1354 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1355 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1356 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1357 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1358 IBV_DEVICE_PCI_WRITE_END_PADDING);
1360 if (config.hw_padding && !hw_padding) {
1361 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1362 config.hw_padding = 0;
1363 } else if (config.hw_padding) {
1364 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1366 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1367 (sh->device_attr.tso_caps.supported_qpts &
1368 (1 << IBV_QPT_RAW_PACKET)));
1370 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1372 * MPW is disabled by default, while the Enhanced MPW is enabled
1375 if (config.mps == MLX5_ARG_UNSET)
1376 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1379 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1380 DRV_LOG(INFO, "%sMPS is %s",
1381 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1382 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1383 if (config.cqe_comp && !cqe_comp) {
1384 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1385 config.cqe_comp = 0;
1387 if (config.cqe_pad && !cqe_pad) {
1388 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1390 } else if (config.cqe_pad) {
1391 DRV_LOG(INFO, "Rx CQE padding is enabled");
1393 if (config.mprq.enabled && mprq) {
1394 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1395 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1396 config.mprq.stride_num_n =
1397 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1398 mprq_min_stride_num_n);
1400 "the number of strides"
1401 " for Multi-Packet RQ is out of range,"
1402 " setting default value (%u)",
1403 1 << config.mprq.stride_num_n);
1405 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1406 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1407 } else if (config.mprq.enabled && !mprq) {
1408 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1409 config.mprq.enabled = 0;
1411 eth_dev = rte_eth_dev_allocate(name);
1412 if (eth_dev == NULL) {
1413 DRV_LOG(ERR, "can not allocate rte ethdev");
1417 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1418 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1419 if (priv->representor) {
1420 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1421 eth_dev->data->representor_id = priv->representor_id;
1423 eth_dev->data->dev_private = priv;
1424 priv->dev_data = eth_dev->data;
1425 eth_dev->data->mac_addrs = priv->mac;
1426 eth_dev->device = dpdk_dev;
1427 /* Configure the first MAC address by default. */
1428 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1430 "port %u cannot get MAC address, is mlx5_en"
1431 " loaded? (errno: %s)",
1432 eth_dev->data->port_id, strerror(rte_errno));
1437 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1438 eth_dev->data->port_id,
1439 mac.addr_bytes[0], mac.addr_bytes[1],
1440 mac.addr_bytes[2], mac.addr_bytes[3],
1441 mac.addr_bytes[4], mac.addr_bytes[5]);
1444 char ifname[IF_NAMESIZE];
1446 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1447 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1448 eth_dev->data->port_id, ifname);
1450 DRV_LOG(DEBUG, "port %u ifname is unknown",
1451 eth_dev->data->port_id);
1454 /* Get actual MTU if possible. */
1455 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1460 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1462 /* Initialize burst functions to prevent crashes before link-up. */
1463 eth_dev->rx_pkt_burst = removed_rx_burst;
1464 eth_dev->tx_pkt_burst = removed_tx_burst;
1465 eth_dev->dev_ops = &mlx5_dev_ops;
1466 /* Register MAC address. */
1467 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1468 if (config.vf && config.vf_nl_en)
1469 mlx5_nl_mac_addr_sync(eth_dev);
1470 priv->tcf_context = mlx5_flow_tcf_context_create();
1471 if (!priv->tcf_context) {
1474 "flow rules relying on switch offloads will not be"
1475 " supported: cannot open libmnl socket: %s",
1476 strerror(rte_errno));
1478 struct rte_flow_error error;
1479 unsigned int ifindex = mlx5_ifindex(eth_dev);
1484 "cannot retrieve network interface index";
1486 err = mlx5_flow_tcf_init(priv->tcf_context,
1491 "flow rules relying on switch offloads will"
1492 " not be supported: %s: %s",
1493 error.message, strerror(rte_errno));
1494 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1495 priv->tcf_context = NULL;
1498 TAILQ_INIT(&priv->flows);
1499 TAILQ_INIT(&priv->ctrl_flows);
1500 /* Hint libmlx5 to use PMD allocator for data plane resources */
1501 struct mlx5dv_ctx_allocators alctr = {
1502 .alloc = &mlx5_alloc_verbs_buf,
1503 .free = &mlx5_free_verbs_buf,
1506 mlx5_glue->dv_set_context_attr(sh->ctx,
1507 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1508 (void *)((uintptr_t)&alctr));
1509 /* Bring Ethernet device up. */
1510 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1511 eth_dev->data->port_id);
1512 mlx5_set_link_up(eth_dev);
1514 * Even though the interrupt handler is not installed yet,
1515 * interrupts will still trigger on the async_fd from
1516 * Verbs context returned by ibv_open_device().
1518 mlx5_link_update(eth_dev, 0);
1519 #ifdef HAVE_IBV_DEVX_OBJ
1520 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1526 #ifdef HAVE_MLX5DV_DR_ESWITCH
1527 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1528 (switch_info->representor || switch_info->master)))
1529 config.dv_esw_en = 0;
1531 config.dv_esw_en = 0;
1533 /* Store device configuration on private structure. */
1534 priv->config = config;
1535 if (config.dv_flow_en) {
1536 err = mlx5_alloc_shared_dr(priv);
1540 /* Supported Verbs flow priority number detection. */
1541 err = mlx5_flow_discover_priorities(eth_dev);
1546 priv->config.flow_prio = err;
1548 * Once the device is added to the list of memory event
1549 * callback, its global MR cache table cannot be expanded
1550 * on the fly because of deadlock. If it overflows, lookup
1551 * should be done by searching MR list linearly, which is slow.
1553 err = mlx5_mr_btree_init(&priv->mr.cache,
1554 MLX5_MR_BTREE_CACHE_N * 2,
1555 eth_dev->device->numa_node);
1560 /* Add device to memory callback list. */
1561 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1562 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1563 priv, mem_event_cb);
1564 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1569 mlx5_free_shared_dr(priv);
1570 if (priv->nl_socket_route >= 0)
1571 close(priv->nl_socket_route);
1572 if (priv->nl_socket_rdma >= 0)
1573 close(priv->nl_socket_rdma);
1574 if (priv->tcf_context)
1575 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1577 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1579 if (eth_dev != NULL)
1580 eth_dev->data->dev_private = NULL;
1582 if (eth_dev != NULL) {
1583 /* mac_addrs must not be freed alone because part of dev_private */
1584 eth_dev->data->mac_addrs = NULL;
1585 rte_eth_dev_release_port(eth_dev);
1588 mlx5_free_shared_ibctx(sh);
1595 * Comparison callback to sort device data.
1597 * This is meant to be used with qsort().
1600 * Pointer to pointer to first data object.
1602 * Pointer to pointer to second data object.
1605 * 0 if both objects are equal, less than 0 if the first argument is less
1606 * than the second, greater than 0 otherwise.
1609 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1611 const struct mlx5_switch_info *si_a =
1612 &((const struct mlx5_dev_spawn_data *)a)->info;
1613 const struct mlx5_switch_info *si_b =
1614 &((const struct mlx5_dev_spawn_data *)b)->info;
1617 /* Master device first. */
1618 ret = si_b->master - si_a->master;
1621 /* Then representor devices. */
1622 ret = si_b->representor - si_a->representor;
1625 /* Unidentified devices come last in no specific order. */
1626 if (!si_a->representor)
1628 /* Order representors by name. */
1629 return si_a->port_name - si_b->port_name;
1633 * DPDK callback to register a PCI device.
1635 * This function spawns Ethernet devices out of a given PCI device.
1637 * @param[in] pci_drv
1638 * PCI driver structure (mlx5_driver).
1639 * @param[in] pci_dev
1640 * PCI device information.
1643 * 0 on success, a negative errno value otherwise and rte_errno is set.
1646 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1647 struct rte_pci_device *pci_dev)
1649 struct ibv_device **ibv_list;
1651 * Number of found IB Devices matching with requested PCI BDF.
1652 * nd != 1 means there are multiple IB devices over the same
1653 * PCI device and we have representors and master.
1655 unsigned int nd = 0;
1657 * Number of found IB device Ports. nd = 1 and np = 1..n means
1658 * we have the single multiport IB device, and there may be
1659 * representors attached to some of found ports.
1661 unsigned int np = 0;
1663 * Number of DPDK ethernet devices to Spawn - either over
1664 * multiple IB devices or multiple ports of single IB device.
1665 * Actually this is the number of iterations to spawn.
1667 unsigned int ns = 0;
1668 struct mlx5_dev_config dev_config;
1671 ret = mlx5_init_once();
1673 DRV_LOG(ERR, "unable to init PMD global data: %s",
1674 strerror(rte_errno));
1677 assert(pci_drv == &mlx5_driver);
1679 ibv_list = mlx5_glue->get_device_list(&ret);
1681 rte_errno = errno ? errno : ENOSYS;
1682 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1686 * First scan the list of all Infiniband devices to find
1687 * matching ones, gathering into the list.
1689 struct ibv_device *ibv_match[ret + 1];
1695 struct rte_pci_addr pci_addr;
1697 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1698 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1700 if (pci_dev->addr.domain != pci_addr.domain ||
1701 pci_dev->addr.bus != pci_addr.bus ||
1702 pci_dev->addr.devid != pci_addr.devid ||
1703 pci_dev->addr.function != pci_addr.function)
1705 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1706 ibv_list[ret]->name);
1707 ibv_match[nd++] = ibv_list[ret];
1709 ibv_match[nd] = NULL;
1711 /* No device matches, just complain and bail out. */
1712 mlx5_glue->free_device_list(ibv_list);
1714 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1715 " are kernel drivers loaded?",
1716 pci_dev->addr.domain, pci_dev->addr.bus,
1717 pci_dev->addr.devid, pci_dev->addr.function);
1722 nl_route = mlx5_nl_init(NETLINK_ROUTE);
1723 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1726 * Found single matching device may have multiple ports.
1727 * Each port may be representor, we have to check the port
1728 * number and check the representors existence.
1731 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1733 DRV_LOG(WARNING, "can not get IB device \"%s\""
1734 " ports number", ibv_match[0]->name);
1737 * Now we can determine the maximal
1738 * amount of devices to be spawned.
1740 struct mlx5_dev_spawn_data list[np ? np : nd];
1744 * Single IB device with multiple ports found,
1745 * it may be E-Switch master device and representors.
1746 * We have to perform identification trough the ports.
1748 assert(nl_rdma >= 0);
1751 for (i = 1; i <= np; ++i) {
1752 list[ns].max_port = np;
1753 list[ns].ibv_port = i;
1754 list[ns].ibv_dev = ibv_match[0];
1755 list[ns].eth_dev = NULL;
1756 list[ns].ifindex = mlx5_nl_ifindex
1757 (nl_rdma, list[ns].ibv_dev->name, i);
1758 if (!list[ns].ifindex) {
1760 * No network interface index found for the
1761 * specified port, it means there is no
1762 * representor on this port. It's OK,
1763 * there can be disabled ports, for example
1764 * if sriov_numvfs < sriov_totalvfs.
1770 ret = mlx5_nl_switch_info
1774 if (ret || (!list[ns].info.representor &&
1775 !list[ns].info.master)) {
1777 * We failed to recognize representors with
1778 * Netlink, let's try to perform the task
1781 ret = mlx5_sysfs_switch_info
1785 if (!ret && (list[ns].info.representor ^
1786 list[ns].info.master))
1791 "unable to recognize master/representors"
1792 " on the IB device with multiple ports");
1799 * The existence of several matching entries (nd > 1) means
1800 * port representors have been instantiated. No existing Verbs
1801 * call nor sysfs entries can tell them apart, this can only
1802 * be done through Netlink calls assuming kernel drivers are
1803 * recent enough to support them.
1805 * In the event of identification failure through Netlink,
1806 * try again through sysfs, then:
1808 * 1. A single IB device matches (nd == 1) with single
1809 * port (np=0/1) and is not a representor, assume
1810 * no switch support.
1812 * 2. Otherwise no safe assumptions can be made;
1813 * complain louder and bail out.
1816 for (i = 0; i != nd; ++i) {
1817 memset(&list[ns].info, 0, sizeof(list[ns].info));
1818 list[ns].max_port = 1;
1819 list[ns].ibv_port = 1;
1820 list[ns].ibv_dev = ibv_match[i];
1821 list[ns].eth_dev = NULL;
1822 list[ns].ifindex = 0;
1824 list[ns].ifindex = mlx5_nl_ifindex
1825 (nl_rdma, list[ns].ibv_dev->name, 1);
1826 if (!list[ns].ifindex) {
1827 char ifname[IF_NAMESIZE];
1830 * Netlink failed, it may happen with old
1831 * ib_core kernel driver (before 4.16).
1832 * We can assume there is old driver because
1833 * here we are processing single ports IB
1834 * devices. Let's try sysfs to retrieve
1835 * the ifindex. The method works for
1836 * master device only.
1840 * Multiple devices found, assume
1841 * representors, can not distinguish
1842 * master/representor and retrieve
1843 * ifindex via sysfs.
1847 ret = mlx5_get_master_ifname
1848 (ibv_match[i]->ibdev_path, &ifname);
1851 if_nametoindex(ifname);
1852 if (!list[ns].ifindex) {
1854 * No network interface index found
1855 * for the specified device, it means
1856 * there it is neither representor
1864 ret = mlx5_nl_switch_info
1868 if (ret || (!list[ns].info.representor &&
1869 !list[ns].info.master)) {
1871 * We failed to recognize representors with
1872 * Netlink, let's try to perform the task
1875 ret = mlx5_sysfs_switch_info
1879 if (!ret && (list[ns].info.representor ^
1880 list[ns].info.master)) {
1882 } else if ((nd == 1) &&
1883 !list[ns].info.representor &&
1884 !list[ns].info.master) {
1886 * Single IB device with
1887 * one physical port and
1888 * attached network device.
1889 * May be SRIOV is not enabled
1890 * or there is no representors.
1892 DRV_LOG(INFO, "no E-Switch support detected");
1899 "unable to recognize master/representors"
1900 " on the multiple IB devices");
1908 * Sort list to probe devices in natural order for users convenience
1909 * (i.e. master first, then representors from lowest to highest ID).
1911 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1912 /* Default configuration. */
1913 dev_config = (struct mlx5_dev_config){
1915 .mps = MLX5_ARG_UNSET,
1918 .txq_inline = MLX5_ARG_UNSET,
1919 .txqs_inline = MLX5_ARG_UNSET,
1920 .txqs_vec = MLX5_ARG_UNSET,
1921 .inline_max_packet_sz = MLX5_ARG_UNSET,
1923 .mr_ext_memseg_en = 1,
1925 .enabled = 0, /* Disabled by default. */
1926 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1927 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1928 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1932 /* Device specific configuration. */
1933 switch (pci_dev->id.device_id) {
1934 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1935 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1937 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1938 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1939 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1940 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1946 /* Set architecture-dependent default value if unset. */
1947 if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1948 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1949 for (i = 0; i != ns; ++i) {
1952 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1955 if (!list[i].eth_dev) {
1956 if (rte_errno != EBUSY && rte_errno != EEXIST)
1958 /* Device is disabled or already spawned. Ignore it. */
1961 restore = list[i].eth_dev->data->dev_flags;
1962 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1963 /* Restore non-PCI flags cleared by the above call. */
1964 list[i].eth_dev->data->dev_flags |= restore;
1965 rte_eth_dev_probing_finish(list[i].eth_dev);
1969 "probe of PCI device " PCI_PRI_FMT " aborted after"
1970 " encountering an error: %s",
1971 pci_dev->addr.domain, pci_dev->addr.bus,
1972 pci_dev->addr.devid, pci_dev->addr.function,
1973 strerror(rte_errno));
1977 if (!list[i].eth_dev)
1979 mlx5_dev_close(list[i].eth_dev);
1980 /* mac_addrs must not be freed because in dev_private */
1981 list[i].eth_dev->data->mac_addrs = NULL;
1982 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1984 /* Restore original error. */
1991 * Do the routine cleanup:
1992 * - close opened Netlink sockets
1993 * - free the Infiniband device list
2000 mlx5_glue->free_device_list(ibv_list);
2005 * DPDK callback to remove a PCI device.
2007 * This function removes all Ethernet devices belong to a given PCI device.
2009 * @param[in] pci_dev
2010 * Pointer to the PCI device.
2013 * 0 on success, the function cannot fail.
2016 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2020 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2021 rte_eth_dev_close(port_id);
2025 static const struct rte_pci_id mlx5_pci_id_map[] = {
2027 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2028 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2031 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2032 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2035 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2036 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2039 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2040 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2043 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2044 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2047 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2048 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2051 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2052 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2055 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2056 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2059 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2060 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2063 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2064 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2067 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2068 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2071 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2072 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2079 static struct rte_pci_driver mlx5_driver = {
2081 .name = MLX5_DRIVER_NAME
2083 .id_table = mlx5_pci_id_map,
2084 .probe = mlx5_pci_probe,
2085 .remove = mlx5_pci_remove,
2086 .dma_map = mlx5_dma_map,
2087 .dma_unmap = mlx5_dma_unmap,
2088 .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2089 RTE_PCI_DRV_PROBE_AGAIN),
2092 #ifdef RTE_IBVERBS_LINK_DLOPEN
2095 * Suffix RTE_EAL_PMD_PATH with "-glue".
2097 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2098 * suffixing its last component.
2101 * Output buffer, should be large enough otherwise NULL is returned.
2106 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2109 mlx5_glue_path(char *buf, size_t size)
2111 static const char *const bad[] = { "/", ".", "..", NULL };
2112 const char *path = RTE_EAL_PMD_PATH;
2113 size_t len = strlen(path);
2117 while (len && path[len - 1] == '/')
2119 for (off = len; off && path[off - 1] != '/'; --off)
2121 for (i = 0; bad[i]; ++i)
2122 if (!strncmp(path + off, bad[i], (int)(len - off)))
2124 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2125 if (i == -1 || (size_t)i >= size)
2130 "unable to append \"-glue\" to last component of"
2131 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2132 " please re-configure DPDK");
2137 * Initialization routine for run-time dependency on rdma-core.
2140 mlx5_glue_init(void)
2142 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2143 const char *path[] = {
2145 * A basic security check is necessary before trusting
2146 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2148 (geteuid() == getuid() && getegid() == getgid() ?
2149 getenv("MLX5_GLUE_PATH") : NULL),
2151 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2152 * variant, otherwise let dlopen() look up libraries on its
2155 (*RTE_EAL_PMD_PATH ?
2156 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2159 void *handle = NULL;
2163 while (!handle && i != RTE_DIM(path)) {
2172 end = strpbrk(path[i], ":;");
2174 end = path[i] + strlen(path[i]);
2175 len = end - path[i];
2180 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2182 (!len || *(end - 1) == '/') ? "" : "/");
2185 if (sizeof(name) != (size_t)ret + 1)
2187 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2189 handle = dlopen(name, RTLD_LAZY);
2200 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2203 sym = dlsym(handle, "mlx5_glue");
2204 if (!sym || !*sym) {
2208 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2217 "cannot initialize PMD due to missing run-time dependency on"
2218 " rdma-core libraries (libibverbs, libmlx5)");
2225 * Driver initialization routine.
2227 RTE_INIT(rte_mlx5_pmd_init)
2229 /* Initialize driver log type. */
2230 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2231 if (mlx5_logtype >= 0)
2232 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2234 /* Build the static tables for Verbs conversion. */
2235 mlx5_set_ptype_table();
2236 mlx5_set_cksum_table();
2237 mlx5_set_swp_types_table();
2239 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2240 * huge pages. Calling ibv_fork_init() during init allows
2241 * applications to use fork() safely for purposes other than
2242 * using this PMD, which is not supported in forked processes.
2244 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2245 /* Match the size of Rx completion entry to the size of a cacheline. */
2246 if (RTE_CACHE_LINE_SIZE == 128)
2247 setenv("MLX5_CQE_SIZE", "128", 0);
2249 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2250 * cleanup all the Verbs resources even when the device was removed.
2252 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2253 #ifdef RTE_IBVERBS_LINK_DLOPEN
2254 if (mlx5_glue_init())
2259 /* Glue structure must not contain any NULL pointers. */
2263 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2264 assert(((const void *const *)mlx5_glue)[i]);
2267 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2269 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2270 mlx5_glue->version, MLX5_GLUE_VERSION);
2273 mlx5_glue->fork_init();
2274 rte_pci_register(&mlx5_driver);
2277 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2278 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2279 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");