4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
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15 * the documentation and/or other materials provided with the
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
45 #pragma GCC diagnostic ignored "-pedantic"
47 #include <infiniband/verbs.h>
49 #pragma GCC diagnostic error "-pedantic"
52 /* DPDK headers don't like -pedantic. */
54 #pragma GCC diagnostic ignored "-pedantic"
56 #include <rte_malloc.h>
57 #include <rte_ethdev.h>
59 #include <rte_common.h>
61 #pragma GCC diagnostic error "-pedantic"
65 #include "mlx5_utils.h"
66 #include "mlx5_rxtx.h"
67 #include "mlx5_autoconf.h"
68 #include "mlx5_defs.h"
71 * Retrieve integer value from environment variable.
74 * Environment variable name.
77 * Integer value, 0 if the variable is not set.
80 mlx5_getenv_int(const char *name)
82 const char *val = getenv(name);
90 * DPDK callback to close the device.
92 * Destroy all queues and objects, free memory.
95 * Pointer to Ethernet device structure.
98 mlx5_dev_close(struct rte_eth_dev *dev)
100 struct priv *priv = mlx5_get_priv(dev);
105 DEBUG("%p: closing device \"%s\"",
107 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
108 /* In case mlx5_dev_stop() has not been called. */
109 priv_dev_interrupt_handler_uninstall(priv, dev);
110 priv_special_flow_disable_all(priv);
111 priv_mac_addrs_disable(priv);
112 priv_destroy_hash_rxqs(priv);
114 /* Remove flow director elements. */
115 priv_fdir_disable(priv);
116 priv_fdir_delete_filters_list(priv);
118 /* Prevent crashes when queues are still in use. */
119 dev->rx_pkt_burst = removed_rx_burst;
120 dev->tx_pkt_burst = removed_tx_burst;
121 if (priv->rxqs != NULL) {
122 /* XXX race condition if mlx5_rx_burst() is still running. */
124 for (i = 0; (i != priv->rxqs_n); ++i) {
125 tmp = (*priv->rxqs)[i];
128 (*priv->rxqs)[i] = NULL;
135 if (priv->txqs != NULL) {
136 /* XXX race condition if mlx5_tx_burst() is still running. */
138 for (i = 0; (i != priv->txqs_n); ++i) {
139 tmp = (*priv->txqs)[i];
142 (*priv->txqs)[i] = NULL;
149 if (priv->pd != NULL) {
150 assert(priv->ctx != NULL);
151 claim_zero(ibv_dealloc_pd(priv->pd));
152 claim_zero(ibv_close_device(priv->ctx));
154 assert(priv->ctx == NULL);
155 if (priv->rss_conf != NULL) {
156 for (i = 0; (i != hash_rxq_init_n); ++i)
157 rte_free((*priv->rss_conf)[i]);
158 rte_free(priv->rss_conf);
160 if (priv->reta_idx != NULL)
161 rte_free(priv->reta_idx);
163 memset(priv, 0, sizeof(*priv));
166 static const struct eth_dev_ops mlx5_dev_ops = {
167 .dev_configure = mlx5_dev_configure,
168 .dev_start = mlx5_dev_start,
169 .dev_stop = mlx5_dev_stop,
170 .dev_set_link_down = mlx5_set_link_down,
171 .dev_set_link_up = mlx5_set_link_up,
172 .dev_close = mlx5_dev_close,
173 .promiscuous_enable = mlx5_promiscuous_enable,
174 .promiscuous_disable = mlx5_promiscuous_disable,
175 .allmulticast_enable = mlx5_allmulticast_enable,
176 .allmulticast_disable = mlx5_allmulticast_disable,
177 .link_update = mlx5_link_update,
178 .stats_get = mlx5_stats_get,
179 .stats_reset = mlx5_stats_reset,
180 .dev_infos_get = mlx5_dev_infos_get,
181 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
182 .vlan_filter_set = mlx5_vlan_filter_set,
183 .rx_queue_setup = mlx5_rx_queue_setup,
184 .tx_queue_setup = mlx5_tx_queue_setup,
185 .rx_queue_release = mlx5_rx_queue_release,
186 .tx_queue_release = mlx5_tx_queue_release,
187 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
188 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
189 .mac_addr_remove = mlx5_mac_addr_remove,
190 .mac_addr_add = mlx5_mac_addr_add,
191 .mac_addr_set = mlx5_mac_addr_set,
192 .mtu_set = mlx5_dev_set_mtu,
193 #ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
194 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
195 .vlan_offload_set = mlx5_vlan_offload_set,
196 #endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
197 .reta_update = mlx5_dev_rss_reta_update,
198 .reta_query = mlx5_dev_rss_reta_query,
199 .rss_hash_update = mlx5_rss_hash_update,
200 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
201 #ifdef MLX5_FDIR_SUPPORT
202 .filter_ctrl = mlx5_dev_filter_ctrl,
203 #endif /* MLX5_FDIR_SUPPORT */
207 struct rte_pci_addr pci_addr; /* associated PCI address */
208 uint32_t ports; /* physical ports bitfield. */
212 * Get device index in mlx5_dev[] from PCI bus address.
214 * @param[in] pci_addr
215 * PCI bus address to look for.
218 * mlx5_dev[] index on success, -1 on failure.
221 mlx5_dev_idx(struct rte_pci_addr *pci_addr)
226 assert(pci_addr != NULL);
227 for (i = 0; (i != RTE_DIM(mlx5_dev)); ++i) {
228 if ((mlx5_dev[i].pci_addr.domain == pci_addr->domain) &&
229 (mlx5_dev[i].pci_addr.bus == pci_addr->bus) &&
230 (mlx5_dev[i].pci_addr.devid == pci_addr->devid) &&
231 (mlx5_dev[i].pci_addr.function == pci_addr->function))
233 if ((mlx5_dev[i].ports == 0) && (ret == -1))
239 static struct eth_driver mlx5_driver;
242 * DPDK callback to register a PCI device.
244 * This function creates an Ethernet device for each port of a given
248 * PCI driver structure (mlx5_driver).
250 * PCI device information.
253 * 0 on success, negative errno value on failure.
256 mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
258 struct ibv_device **list;
259 struct ibv_device *ibv_dev;
261 struct ibv_context *attr_ctx = NULL;
262 struct ibv_device_attr device_attr;
268 assert(pci_drv == &mlx5_driver.pci_drv);
269 /* Get mlx5_dev[] index. */
270 idx = mlx5_dev_idx(&pci_dev->addr);
272 ERROR("this driver cannot support any more adapters");
275 DEBUG("using driver device index %d", idx);
277 /* Save PCI address. */
278 mlx5_dev[idx].pci_addr = pci_dev->addr;
279 list = ibv_get_device_list(&i);
282 if (errno == ENOSYS) {
283 WARN("cannot list devices, is ib_uverbs loaded?");
290 * For each listed device, check related sysfs entry against
291 * the provided PCI ID.
294 struct rte_pci_addr pci_addr;
297 DEBUG("checking device \"%s\"", list[i]->name);
298 if (mlx5_ibv_device_to_pci_addr(list[i], &pci_addr))
300 if ((pci_dev->addr.domain != pci_addr.domain) ||
301 (pci_dev->addr.bus != pci_addr.bus) ||
302 (pci_dev->addr.devid != pci_addr.devid) ||
303 (pci_dev->addr.function != pci_addr.function))
305 vf = ((pci_dev->id.device_id ==
306 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) ||
307 (pci_dev->id.device_id ==
308 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF));
309 INFO("PCI information matches, using device \"%s\" (VF: %s)",
310 list[i]->name, (vf ? "true" : "false"));
311 attr_ctx = ibv_open_device(list[i]);
315 if (attr_ctx == NULL) {
316 ibv_free_device_list(list);
319 WARN("cannot access device, is mlx5_ib loaded?");
322 WARN("cannot use device, are drivers up to date?");
330 DEBUG("device opened");
331 if (ibv_query_device(attr_ctx, &device_attr))
333 INFO("%u port(s) detected", device_attr.phys_port_cnt);
335 for (i = 0; i < device_attr.phys_port_cnt; i++) {
336 uint32_t port = i + 1; /* ports are indexed from one */
337 uint32_t test = (1 << i);
338 struct ibv_context *ctx = NULL;
339 struct ibv_port_attr port_attr;
340 struct ibv_pd *pd = NULL;
341 struct priv *priv = NULL;
342 struct rte_eth_dev *eth_dev;
343 #ifdef HAVE_EXP_QUERY_DEVICE
344 struct ibv_exp_device_attr exp_device_attr;
345 #endif /* HAVE_EXP_QUERY_DEVICE */
346 struct ether_addr mac;
348 #ifdef HAVE_EXP_QUERY_DEVICE
349 exp_device_attr.comp_mask =
350 IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS |
351 IBV_EXP_DEVICE_ATTR_RX_HASH |
352 #ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
353 IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS |
354 #endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
355 #ifdef HAVE_VERBS_RX_END_PADDING
356 IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN |
357 #endif /* HAVE_VERBS_RX_END_PADDING */
359 #endif /* HAVE_EXP_QUERY_DEVICE */
361 DEBUG("using port %u (%08" PRIx32 ")", port, test);
363 ctx = ibv_open_device(ibv_dev);
367 /* Check port status. */
368 err = ibv_query_port(ctx, port, &port_attr);
370 ERROR("port query failed: %s", strerror(err));
374 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
375 ERROR("port %d is not configured in Ethernet mode",
380 if (port_attr.state != IBV_PORT_ACTIVE)
381 DEBUG("port %d is not active: \"%s\" (%d)",
382 port, ibv_port_state_str(port_attr.state),
385 /* Allocate protection domain. */
386 pd = ibv_alloc_pd(ctx);
388 ERROR("PD allocation failure");
393 mlx5_dev[idx].ports |= test;
395 /* from rte_ethdev.c */
396 priv = rte_zmalloc("ethdev private structure",
398 RTE_CACHE_LINE_SIZE);
400 ERROR("priv allocation failure");
406 priv->device_attr = device_attr;
409 priv->mtu = ETHER_MTU;
410 #ifdef HAVE_EXP_QUERY_DEVICE
411 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
412 ERROR("ibv_exp_query_device() failed");
417 ((exp_device_attr.exp_device_cap_flags &
418 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
419 (exp_device_attr.exp_device_cap_flags &
420 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
421 DEBUG("checksum offloading is %ssupported",
422 (priv->hw_csum ? "" : "not "));
424 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
425 IBV_EXP_DEVICE_VXLAN_SUPPORT);
426 DEBUG("L2 tunnel checksum offloads are %ssupported",
427 (priv->hw_csum_l2tun ? "" : "not "));
429 priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
430 /* Remove this check once DPDK supports larger/variable
431 * indirection tables. */
432 if (priv->ind_table_max_size > (unsigned int)RSS_INDIRECTION_TABLE_SIZE)
433 priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
434 DEBUG("maximum RX indirection table size is %u",
435 priv->ind_table_max_size);
436 #ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
437 priv->hw_vlan_strip = !!(exp_device_attr.wq_vlan_offloads_cap &
438 IBV_EXP_RECEIVE_WQ_CVLAN_STRIP);
439 #endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
440 DEBUG("VLAN stripping is %ssupported",
441 (priv->hw_vlan_strip ? "" : "not "));
443 #ifdef HAVE_VERBS_FCS
444 priv->hw_fcs_strip = !!(exp_device_attr.exp_device_cap_flags &
445 IBV_EXP_DEVICE_SCATTER_FCS);
446 #endif /* HAVE_VERBS_FCS */
447 DEBUG("FCS stripping configuration is %ssupported",
448 (priv->hw_fcs_strip ? "" : "not "));
450 #ifdef HAVE_VERBS_RX_END_PADDING
451 priv->hw_padding = !!exp_device_attr.rx_pad_end_addr_align;
452 #endif /* HAVE_VERBS_RX_END_PADDING */
453 DEBUG("hardware RX end alignment padding is %ssupported",
454 (priv->hw_padding ? "" : "not "));
456 #else /* HAVE_EXP_QUERY_DEVICE */
457 priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
458 #endif /* HAVE_EXP_QUERY_DEVICE */
461 /* Allocate and register default RSS hash keys. */
462 priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
463 sizeof((*priv->rss_conf)[0]), 0);
464 if (priv->rss_conf == NULL) {
468 err = rss_hash_rss_conf_new_key(priv,
469 rss_hash_default_key,
470 rss_hash_default_key_len,
474 /* Configure the first MAC address by default. */
475 if (priv_get_mac(priv, &mac.addr_bytes)) {
476 ERROR("cannot get MAC address, is mlx5_en loaded?"
477 " (errno: %s)", strerror(errno));
480 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
482 mac.addr_bytes[0], mac.addr_bytes[1],
483 mac.addr_bytes[2], mac.addr_bytes[3],
484 mac.addr_bytes[4], mac.addr_bytes[5]);
485 /* Register MAC address. */
486 claim_zero(priv_mac_addr_add(priv, 0,
487 (const uint8_t (*)[ETHER_ADDR_LEN])
489 /* Initialize FD filters list. */
490 err = fdir_init_filters_list(priv);
495 char ifname[IF_NAMESIZE];
497 if (priv_get_ifname(priv, &ifname) == 0)
498 DEBUG("port %u ifname is \"%s\"",
501 DEBUG("port %u ifname is unknown", priv->port);
504 /* Get actual MTU if possible. */
505 priv_get_mtu(priv, &priv->mtu);
506 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
508 /* from rte_ethdev.c */
510 char name[RTE_ETH_NAME_MAX_LEN];
512 snprintf(name, sizeof(name), "%s port %u",
513 ibv_get_device_name(ibv_dev), port);
514 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
516 if (eth_dev == NULL) {
517 ERROR("can not allocate rte ethdev");
522 /* Secondary processes have to use local storage for their
523 * private data as well as a copy of eth_dev->data, but this
524 * pointer must not be modified before burst functions are
525 * actually called. */
526 if (mlx5_is_secondary()) {
527 struct mlx5_secondary_data *sd =
528 &mlx5_secondary_data[eth_dev->data->port_id];
529 sd->primary_priv = eth_dev->data->dev_private;
530 if (sd->primary_priv == NULL) {
531 ERROR("no private data for port %u",
532 eth_dev->data->port_id);
536 sd->shared_dev_data = eth_dev->data;
537 rte_spinlock_init(&sd->lock);
538 memcpy(sd->data.name, sd->shared_dev_data->name,
539 sizeof(sd->data.name));
540 sd->data.dev_private = priv;
541 sd->data.rx_mbuf_alloc_failed = 0;
542 sd->data.mtu = ETHER_MTU;
543 sd->data.port_id = sd->shared_dev_data->port_id;
544 sd->data.mac_addrs = priv->mac;
545 eth_dev->tx_pkt_burst = mlx5_tx_burst_secondary_setup;
546 eth_dev->rx_pkt_burst = mlx5_rx_burst_secondary_setup;
548 eth_dev->data->dev_private = priv;
549 eth_dev->data->rx_mbuf_alloc_failed = 0;
550 eth_dev->data->mtu = ETHER_MTU;
551 eth_dev->data->mac_addrs = priv->mac;
554 eth_dev->pci_dev = pci_dev;
555 rte_eth_copy_pci_info(eth_dev, pci_dev);
556 eth_dev->driver = &mlx5_driver;
558 eth_dev->dev_ops = &mlx5_dev_ops;
560 TAILQ_INIT(ð_dev->link_intr_cbs);
562 /* Bring Ethernet device up. */
563 DEBUG("forcing Ethernet interface up");
564 priv_set_flags(priv, ~IFF_UP, IFF_UP);
569 rte_free(priv->rss_conf);
573 claim_zero(ibv_dealloc_pd(pd));
575 claim_zero(ibv_close_device(ctx));
580 * XXX if something went wrong in the loop above, there is a resource
581 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
582 * long as the dpdk does not provide a way to deallocate a ethdev and a
583 * way to enumerate the registered ethdevs to free the previous ones.
586 /* no port found, complain */
587 if (!mlx5_dev[idx].ports) {
594 claim_zero(ibv_close_device(attr_ctx));
596 ibv_free_device_list(list);
601 static const struct rte_pci_id mlx5_pci_id_map[] = {
603 .vendor_id = PCI_VENDOR_ID_MELLANOX,
604 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4,
605 .subsystem_vendor_id = PCI_ANY_ID,
606 .subsystem_device_id = PCI_ANY_ID
609 .vendor_id = PCI_VENDOR_ID_MELLANOX,
610 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4VF,
611 .subsystem_vendor_id = PCI_ANY_ID,
612 .subsystem_device_id = PCI_ANY_ID
615 .vendor_id = PCI_VENDOR_ID_MELLANOX,
616 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4LX,
617 .subsystem_vendor_id = PCI_ANY_ID,
618 .subsystem_device_id = PCI_ANY_ID
621 .vendor_id = PCI_VENDOR_ID_MELLANOX,
622 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF,
623 .subsystem_vendor_id = PCI_ANY_ID,
624 .subsystem_device_id = PCI_ANY_ID
631 static struct eth_driver mlx5_driver = {
633 .name = MLX5_DRIVER_NAME,
634 .id_table = mlx5_pci_id_map,
635 .devinit = mlx5_pci_devinit,
636 .drv_flags = RTE_PCI_DRV_INTR_LSC,
638 .dev_private_size = sizeof(struct priv)
642 * Driver initialization routine.
645 rte_mlx5_pmd_init(const char *name, const char *args)
650 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
651 * huge pages. Calling ibv_fork_init() during init allows
652 * applications to use fork() safely for purposes other than
653 * using this PMD, which is not supported in forked processes.
655 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
657 rte_eal_pci_register(&mlx5_driver.pci_drv);
661 static struct rte_driver rte_mlx5_driver = {
663 .name = MLX5_DRIVER_NAME,
664 .init = rte_mlx5_pmd_init,
667 PMD_REGISTER_DRIVER(rte_mlx5_driver)