drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. */
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /*
  75  * Device parameter to configure the number of TX queues threshold for
  76  * enabling inline send.
  77  */
  78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  79
  80 /*
  81  * Device parameter to configure the number of TX queues threshold for
  82  * enabling vectorized Tx.
  83  */
  84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  85
  86 /* Device parameter to enable multi-packet send WQEs. */
  87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  88
  89 /* Device parameter to include 2 dsegs in the title WQEBB. */
  90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  91
  92 /* Device parameter to limit the size of inlining packet. */
  93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  94
  95 /* Device parameter to enable hardware Tx vector. */
  96 #define MLX5_TX_VEC_EN "tx_vec_en"
  97
  98 /* Device parameter to enable hardware Rx vector. */
  99 #define MLX5_RX_VEC_EN "rx_vec_en"
 100
 101 /* Allow L3 VXLAN flow creation. */
 102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 103
 104 /* Activate DV flow steering. */
 105 #define MLX5_DV_FLOW_EN "dv_flow_en"
 106
 107 /* Activate Netlink support in VF mode. */
 108 #define MLX5_VF_NL_EN "vf_nl_en"
 109
 110 /* Select port representors to instantiate. */
 111 #define MLX5_REPRESENTOR "representor"
 112
 113 #ifndef HAVE_IBV_MLX5_MOD_MPW
 114 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 115 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 116 #endif
 117
 118 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 119 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 120 #endif
 121
 122 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 123
 124 /* Shared memory between primary and secondary processes. */
 125 struct mlx5_shared_data *mlx5_shared_data;
 126
 127 /* Spinlock for mlx5_shared_data allocation. */
 128 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 129
 130 /** Driver-specific log messages type. */
 131 int mlx5_logtype;
 132
 133 /** Data associated with devices to spawn. */
 134 struct mlx5_dev_spawn_data {
 135         uint32_t ifindex; /**< Network interface index. */
 136         uint32_t max_port; /**< IB device maximal port index. */
 137         uint32_t ibv_port; /**< IB device physical port index. */
 138         struct mlx5_switch_info info; /**< Switch information. */
 139         struct ibv_device *ibv_dev; /**< Associated IB device. */
 140         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 141 };
 142
 143 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 144 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 145
 146 /**
 147  * Allocate shared IB device context. If there is multiport device the
 148  * master and representors will share this context, if there is single
 149  * port dedicated IB device, the context will be used by only given
 150  * port due to unification.
 151  *
 152  * Routine first searches the context for the spesified IB device name,
 153  * if found the shared context assumed and reference counter is incremented.
 154  * If no context found the new one is created and initialized with specified
 155  * IB device context and parameters.
 156  *
 157  * @param[in] spawn
 158  *   Pointer to the IB device attributes (name, port, etc).
 159  *
 160  * @return
 161  *   Pointer to mlx5_ibv_shared object on success,
 162  *   otherwise NULL and rte_errno is set.
 163  */
 164 static struct mlx5_ibv_shared *
 165 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 166 {
 167         struct mlx5_ibv_shared *sh;
 168         int err = 0;
 169
 170         assert(spawn);
 171         /* Secondary process should not create the shared context. */
 172         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 173         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 174         /* Search for IB context by device name. */
 175         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 176                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 177                         sh->refcnt++;
 178                         goto exit;
 179                 }
 180         }
 181         /* No device found, we have to create new sharted context. */
 182         assert(spawn->max_port);
 183         sh = rte_zmalloc("ethdev shared ib context",
 184                          sizeof(struct mlx5_ibv_shared) +
 185                          spawn->max_port *
 186                          sizeof(struct mlx5_ibv_shared_port),
 187                          RTE_CACHE_LINE_SIZE);
 188         if (!sh) {
 189                 DRV_LOG(ERR, "shared context allocation failure");
 190                 rte_errno  = ENOMEM;
 191                 goto exit;
 192         }
 193         /* Try to open IB device with DV first, then usual Verbs. */
 194         errno = 0;
 195         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 196         if (sh->ctx) {
 197                 sh->devx = 1;
 198                 DRV_LOG(DEBUG, "DevX is supported");
 199         } else {
 200                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 201                 if (!sh->ctx) {
 202                         err = errno ? errno : ENODEV;
 203                         goto error;
 204                 }
 205                 DRV_LOG(DEBUG, "DevX is NOT supported");
 206         }
 207         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 208         if (err) {
 209                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 210                 goto error;
 211         }
 212         sh->refcnt = 1;
 213         sh->max_port = spawn->max_port;
 214         strncpy(sh->ibdev_name, sh->ctx->device->name,
 215                 sizeof(sh->ibdev_name));
 216         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 217                 sizeof(sh->ibdev_path));
 218         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 219         if (sh->pd == NULL) {
 220                 DRV_LOG(ERR, "PD allocation failure");
 221                 err = ENOMEM;
 222                 goto error;
 223         }
 224         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 225 exit:
 226         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 227         return sh;
 228 error:
 229         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 230         assert(sh);
 231         if (sh->pd)
 232                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 233         if (sh->ctx)
 234                 claim_zero(mlx5_glue->close_device(sh->ctx));
 235         rte_free(sh);
 236         assert(err > 0);
 237         rte_errno = err;
 238         return NULL;
 239 }
 240
 241 /**
 242  * Free shared IB device context. Decrement counter and if zero free
 243  * all allocated resources and close handles.
 244  *
 245  * @param[in] sh
 246  *   Pointer to mlx5_ibv_shared object to free
 247  */
 248 static void
 249 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 250 {
 251         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 252 #ifndef NDEBUG
 253         /* Check the object presence in the list. */
 254         struct mlx5_ibv_shared *lctx;
 255
 256         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 257                 if (lctx == sh)
 258                         break;
 259         assert(lctx);
 260         if (lctx != sh) {
 261                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 262                 goto exit;
 263         }
 264 #endif
 265         assert(sh);
 266         assert(sh->refcnt);
 267         /* Secondary process should not free the shared context. */
 268         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 269         if (--sh->refcnt)
 270                 goto exit;
 271         LIST_REMOVE(sh, next);
 272         if (sh->pd)
 273                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 274         if (sh->ctx)
 275                 claim_zero(mlx5_glue->close_device(sh->ctx));
 276         rte_free(sh);
 277 exit:
 278         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 279 }
 280
 281
 282 /**
 283  * Prepare shared data between primary and secondary process.
 284  */
 285 static void
 286 mlx5_prepare_shared_data(void)
 287 {
 288         const struct rte_memzone *mz;
 289
 290         rte_spinlock_lock(&mlx5_shared_data_lock);
 291         if (mlx5_shared_data == NULL) {
 292                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 293                         /* Allocate shared memory. */
 294                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 295                                                  sizeof(*mlx5_shared_data),
 296                                                  SOCKET_ID_ANY, 0);
 297                 } else {
 298                         /* Lookup allocated shared memory. */
 299                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 300                 }
 301                 if (mz == NULL)
 302                         rte_panic("Cannot allocate mlx5 shared data\n");
 303                 mlx5_shared_data = mz->addr;
 304                 /* Initialize shared data. */
 305                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 306                         LIST_INIT(&mlx5_shared_data->mem_event_cb_list);
 307                         rte_rwlock_init(&mlx5_shared_data->mem_event_rwlock);
 308                 }
 309                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 310                                                 mlx5_mr_mem_event_cb, NULL);
 311         }
 312         rte_spinlock_unlock(&mlx5_shared_data_lock);
 313 }
 314
 315 /**
 316  * Retrieve integer value from environment variable.
 317  *
 318  * @param[in] name
 319  *   Environment variable name.
 320  *
 321  * @return
 322  *   Integer value, 0 if the variable is not set.
 323  */
 324 int
 325 mlx5_getenv_int(const char *name)
 326 {
 327         const char *val = getenv(name);
 328
 329         if (val == NULL)
 330                 return 0;
 331         return atoi(val);
 332 }
 333
 334 /**
 335  * Verbs callback to allocate a memory. This function should allocate the space
 336  * according to the size provided residing inside a huge page.
 337  * Please note that all allocation must respect the alignment from libmlx5
 338  * (i.e. currently sysconf(_SC_PAGESIZE)).
 339  *
 340  * @param[in] size
 341  *   The size in bytes of the memory to allocate.
 342  * @param[in] data
 343  *   A pointer to the callback data.
 344  *
 345  * @return
 346  *   Allocated buffer, NULL otherwise and rte_errno is set.
 347  */
 348 static void *
 349 mlx5_alloc_verbs_buf(size_t size, void *data)
 350 {
 351         struct mlx5_priv *priv = data;
 352         void *ret;
 353         size_t alignment = sysconf(_SC_PAGESIZE);
 354         unsigned int socket = SOCKET_ID_ANY;
 355
 356         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 357                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 358
 359                 socket = ctrl->socket;
 360         } else if (priv->verbs_alloc_ctx.type ==
 361                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 362                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 363
 364                 socket = ctrl->socket;
 365         }
 366         assert(data != NULL);
 367         ret = rte_malloc_socket(__func__, size, alignment, socket);
 368         if (!ret && size)
 369                 rte_errno = ENOMEM;
 370         return ret;
 371 }
 372
 373 /**
 374  * Verbs callback to free a memory.
 375  *
 376  * @param[in] ptr
 377  *   A pointer to the memory to free.
 378  * @param[in] data
 379  *   A pointer to the callback data.
 380  */
 381 static void
 382 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 383 {
 384         assert(data != NULL);
 385         rte_free(ptr);
 386 }
 387
 388 /**
 389  * DPDK callback to close the device.
 390  *
 391  * Destroy all queues and objects, free memory.
 392  *
 393  * @param dev
 394  *   Pointer to Ethernet device structure.
 395  */
 396 static void
 397 mlx5_dev_close(struct rte_eth_dev *dev)
 398 {
 399         struct mlx5_priv *priv = dev->data->dev_private;
 400         unsigned int i;
 401         int ret;
 402
 403         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 404                 dev->data->port_id,
 405                 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
 406         /* In case mlx5_dev_stop() has not been called. */
 407         mlx5_dev_interrupt_handler_uninstall(dev);
 408         mlx5_traffic_disable(dev);
 409         mlx5_flow_flush(dev, NULL);
 410         /* Prevent crashes when queues are still in use. */
 411         dev->rx_pkt_burst = removed_rx_burst;
 412         dev->tx_pkt_burst = removed_tx_burst;
 413         if (priv->rxqs != NULL) {
 414                 /* XXX race condition if mlx5_rx_burst() is still running. */
 415                 usleep(1000);
 416                 for (i = 0; (i != priv->rxqs_n); ++i)
 417                         mlx5_rxq_release(dev, i);
 418                 priv->rxqs_n = 0;
 419                 priv->rxqs = NULL;
 420         }
 421         if (priv->txqs != NULL) {
 422                 /* XXX race condition if mlx5_tx_burst() is still running. */
 423                 usleep(1000);
 424                 for (i = 0; (i != priv->txqs_n); ++i)
 425                         mlx5_txq_release(dev, i);
 426                 priv->txqs_n = 0;
 427                 priv->txqs = NULL;
 428         }
 429         mlx5_mprq_free_mp(dev);
 430         mlx5_mr_release(dev);
 431         assert(priv->sh);
 432         if (priv->sh)
 433                 mlx5_free_shared_ibctx(priv->sh);
 434         priv->sh = NULL;
 435         if (priv->rss_conf.rss_key != NULL)
 436                 rte_free(priv->rss_conf.rss_key);
 437         if (priv->reta_idx != NULL)
 438                 rte_free(priv->reta_idx);
 439         if (priv->primary_socket)
 440                 mlx5_socket_uninit(dev);
 441         if (priv->config.vf)
 442                 mlx5_nl_mac_addr_flush(dev);
 443         if (priv->nl_socket_route >= 0)
 444                 close(priv->nl_socket_route);
 445         if (priv->nl_socket_rdma >= 0)
 446                 close(priv->nl_socket_rdma);
 447         if (priv->tcf_context)
 448                 mlx5_flow_tcf_context_destroy(priv->tcf_context);
 449         ret = mlx5_hrxq_ibv_verify(dev);
 450         if (ret)
 451                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 452                         dev->data->port_id);
 453         ret = mlx5_ind_table_ibv_verify(dev);
 454         if (ret)
 455                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 456                         dev->data->port_id);
 457         ret = mlx5_rxq_ibv_verify(dev);
 458         if (ret)
 459                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 460                         dev->data->port_id);
 461         ret = mlx5_rxq_verify(dev);
 462         if (ret)
 463                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 464                         dev->data->port_id);
 465         ret = mlx5_txq_ibv_verify(dev);
 466         if (ret)
 467                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 468                         dev->data->port_id);
 469         ret = mlx5_txq_verify(dev);
 470         if (ret)
 471                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 472                         dev->data->port_id);
 473         ret = mlx5_flow_verify(dev);
 474         if (ret)
 475                 DRV_LOG(WARNING, "port %u some flows still remain",
 476                         dev->data->port_id);
 477         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 478                 unsigned int c = 0;
 479                 unsigned int i = mlx5_dev_to_port_id(dev->device, NULL, 0);
 480                 uint16_t port_id[i];
 481
 482                 i = RTE_MIN(mlx5_dev_to_port_id(dev->device, port_id, i), i);
 483                 while (i--) {
 484                         struct mlx5_priv *opriv =
 485                                 rte_eth_devices[port_id[i]].data->dev_private;
 486
 487                         if (!opriv ||
 488                             opriv->domain_id != priv->domain_id ||
 489                             &rte_eth_devices[port_id[i]] == dev)
 490                                 continue;
 491                         ++c;
 492                 }
 493                 if (!c)
 494                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 495         }
 496         memset(priv, 0, sizeof(*priv));
 497         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 498         /*
 499          * Reset mac_addrs to NULL such that it is not freed as part of
 500          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 501          * it is freed when dev_private is freed.
 502          */
 503         dev->data->mac_addrs = NULL;
 504 }
 505
 506 const struct eth_dev_ops mlx5_dev_ops = {
 507         .dev_configure = mlx5_dev_configure,
 508         .dev_start = mlx5_dev_start,
 509         .dev_stop = mlx5_dev_stop,
 510         .dev_set_link_down = mlx5_set_link_down,
 511         .dev_set_link_up = mlx5_set_link_up,
 512         .dev_close = mlx5_dev_close,
 513         .promiscuous_enable = mlx5_promiscuous_enable,
 514         .promiscuous_disable = mlx5_promiscuous_disable,
 515         .allmulticast_enable = mlx5_allmulticast_enable,
 516         .allmulticast_disable = mlx5_allmulticast_disable,
 517         .link_update = mlx5_link_update,
 518         .stats_get = mlx5_stats_get,
 519         .stats_reset = mlx5_stats_reset,
 520         .xstats_get = mlx5_xstats_get,
 521         .xstats_reset = mlx5_xstats_reset,
 522         .xstats_get_names = mlx5_xstats_get_names,
 523         .fw_version_get = mlx5_fw_version_get,
 524         .dev_infos_get = mlx5_dev_infos_get,
 525         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 526         .vlan_filter_set = mlx5_vlan_filter_set,
 527         .rx_queue_setup = mlx5_rx_queue_setup,
 528         .tx_queue_setup = mlx5_tx_queue_setup,
 529         .rx_queue_release = mlx5_rx_queue_release,
 530         .tx_queue_release = mlx5_tx_queue_release,
 531         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 532         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 533         .mac_addr_remove = mlx5_mac_addr_remove,
 534         .mac_addr_add = mlx5_mac_addr_add,
 535         .mac_addr_set = mlx5_mac_addr_set,
 536         .set_mc_addr_list = mlx5_set_mc_addr_list,
 537         .mtu_set = mlx5_dev_set_mtu,
 538         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 539         .vlan_offload_set = mlx5_vlan_offload_set,
 540         .reta_update = mlx5_dev_rss_reta_update,
 541         .reta_query = mlx5_dev_rss_reta_query,
 542         .rss_hash_update = mlx5_rss_hash_update,
 543         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 544         .filter_ctrl = mlx5_dev_filter_ctrl,
 545         .rx_descriptor_status = mlx5_rx_descriptor_status,
 546         .tx_descriptor_status = mlx5_tx_descriptor_status,
 547         .rx_queue_count = mlx5_rx_queue_count,
 548         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 549         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 550         .is_removed = mlx5_is_removed,
 551 };
 552
 553 /* Available operations from secondary process. */
 554 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 555         .stats_get = mlx5_stats_get,
 556         .stats_reset = mlx5_stats_reset,
 557         .xstats_get = mlx5_xstats_get,
 558         .xstats_reset = mlx5_xstats_reset,
 559         .xstats_get_names = mlx5_xstats_get_names,
 560         .fw_version_get = mlx5_fw_version_get,
 561         .dev_infos_get = mlx5_dev_infos_get,
 562         .rx_descriptor_status = mlx5_rx_descriptor_status,
 563         .tx_descriptor_status = mlx5_tx_descriptor_status,
 564 };
 565
 566 /* Available operations in flow isolated mode. */
 567 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 568         .dev_configure = mlx5_dev_configure,
 569         .dev_start = mlx5_dev_start,
 570         .dev_stop = mlx5_dev_stop,
 571         .dev_set_link_down = mlx5_set_link_down,
 572         .dev_set_link_up = mlx5_set_link_up,
 573         .dev_close = mlx5_dev_close,
 574         .promiscuous_enable = mlx5_promiscuous_enable,
 575         .promiscuous_disable = mlx5_promiscuous_disable,
 576         .allmulticast_enable = mlx5_allmulticast_enable,
 577         .allmulticast_disable = mlx5_allmulticast_disable,
 578         .link_update = mlx5_link_update,
 579         .stats_get = mlx5_stats_get,
 580         .stats_reset = mlx5_stats_reset,
 581         .xstats_get = mlx5_xstats_get,
 582         .xstats_reset = mlx5_xstats_reset,
 583         .xstats_get_names = mlx5_xstats_get_names,
 584         .fw_version_get = mlx5_fw_version_get,
 585         .dev_infos_get = mlx5_dev_infos_get,
 586         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 587         .vlan_filter_set = mlx5_vlan_filter_set,
 588         .rx_queue_setup = mlx5_rx_queue_setup,
 589         .tx_queue_setup = mlx5_tx_queue_setup,
 590         .rx_queue_release = mlx5_rx_queue_release,
 591         .tx_queue_release = mlx5_tx_queue_release,
 592         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 593         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 594         .mac_addr_remove = mlx5_mac_addr_remove,
 595         .mac_addr_add = mlx5_mac_addr_add,
 596         .mac_addr_set = mlx5_mac_addr_set,
 597         .set_mc_addr_list = mlx5_set_mc_addr_list,
 598         .mtu_set = mlx5_dev_set_mtu,
 599         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 600         .vlan_offload_set = mlx5_vlan_offload_set,
 601         .filter_ctrl = mlx5_dev_filter_ctrl,
 602         .rx_descriptor_status = mlx5_rx_descriptor_status,
 603         .tx_descriptor_status = mlx5_tx_descriptor_status,
 604         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 605         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 606         .is_removed = mlx5_is_removed,
 607 };
 608
 609 /**
 610  * Verify and store value for device argument.
 611  *
 612  * @param[in] key
 613  *   Key argument to verify.
 614  * @param[in] val
 615  *   Value associated with key.
 616  * @param opaque
 617  *   User data.
 618  *
 619  * @return
 620  *   0 on success, a negative errno value otherwise and rte_errno is set.
 621  */
 622 static int
 623 mlx5_args_check(const char *key, const char *val, void *opaque)
 624 {
 625         struct mlx5_dev_config *config = opaque;
 626         unsigned long tmp;
 627
 628         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 629         if (!strcmp(MLX5_REPRESENTOR, key))
 630                 return 0;
 631         errno = 0;
 632         tmp = strtoul(val, NULL, 0);
 633         if (errno) {
 634                 rte_errno = errno;
 635                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 636                 return -rte_errno;
 637         }
 638         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 639                 config->cqe_comp = !!tmp;
 640         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 641                 config->cqe_pad = !!tmp;
 642         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 643                 config->hw_padding = !!tmp;
 644         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 645                 config->mprq.enabled = !!tmp;
 646         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 647                 config->mprq.stride_num_n = tmp;
 648         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 649                 config->mprq.max_memcpy_len = tmp;
 650         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 651                 config->mprq.min_rxqs_num = tmp;
 652         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
 653                 config->txq_inline = tmp;
 654         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
 655                 config->txqs_inline = tmp;
 656         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
 657                 config->txqs_vec = tmp;
 658         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
 659                 config->mps = !!tmp;
 660         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
 661                 config->mpw_hdr_dseg = !!tmp;
 662         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
 663                 config->inline_max_packet_sz = tmp;
 664         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
 665                 config->tx_vec_en = !!tmp;
 666         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
 667                 config->rx_vec_en = !!tmp;
 668         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
 669                 config->l3_vxlan_en = !!tmp;
 670         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
 671                 config->vf_nl_en = !!tmp;
 672         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
 673                 config->dv_flow_en = !!tmp;
 674         } else {
 675                 DRV_LOG(WARNING, "%s: unknown parameter", key);
 676                 rte_errno = EINVAL;
 677                 return -rte_errno;
 678         }
 679         return 0;
 680 }
 681
 682 /**
 683  * Parse device parameters.
 684  *
 685  * @param config
 686  *   Pointer to device configuration structure.
 687  * @param devargs
 688  *   Device arguments structure.
 689  *
 690  * @return
 691  *   0 on success, a negative errno value otherwise and rte_errno is set.
 692  */
 693 static int
 694 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
 695 {
 696         const char **params = (const char *[]){
 697                 MLX5_RXQ_CQE_COMP_EN,
 698                 MLX5_RXQ_CQE_PAD_EN,
 699                 MLX5_RXQ_PKT_PAD_EN,
 700                 MLX5_RX_MPRQ_EN,
 701                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
 702                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
 703                 MLX5_RXQS_MIN_MPRQ,
 704                 MLX5_TXQ_INLINE,
 705                 MLX5_TXQS_MIN_INLINE,
 706                 MLX5_TXQS_MAX_VEC,
 707                 MLX5_TXQ_MPW_EN,
 708                 MLX5_TXQ_MPW_HDR_DSEG_EN,
 709                 MLX5_TXQ_MAX_INLINE_LEN,
 710                 MLX5_TX_VEC_EN,
 711                 MLX5_RX_VEC_EN,
 712                 MLX5_L3_VXLAN_EN,
 713                 MLX5_VF_NL_EN,
 714                 MLX5_DV_FLOW_EN,
 715                 MLX5_REPRESENTOR,
 716                 NULL,
 717         };
 718         struct rte_kvargs *kvlist;
 719         int ret = 0;
 720         int i;
 721
 722         if (devargs == NULL)
 723                 return 0;
 724         /* Following UGLY cast is done to pass checkpatch. */
 725         kvlist = rte_kvargs_parse(devargs->args, params);
 726         if (kvlist == NULL)
 727                 return 0;
 728         /* Process parameters. */
 729         for (i = 0; (params[i] != NULL); ++i) {
 730                 if (rte_kvargs_count(kvlist, params[i])) {
 731                         ret = rte_kvargs_process(kvlist, params[i],
 732                                                  mlx5_args_check, config);
 733                         if (ret) {
 734                                 rte_errno = EINVAL;
 735                                 rte_kvargs_free(kvlist);
 736                                 return -rte_errno;
 737                         }
 738                 }
 739         }
 740         rte_kvargs_free(kvlist);
 741         return 0;
 742 }
 743
 744 static struct rte_pci_driver mlx5_driver;
 745
 746 /*
 747  * Reserved UAR address space for TXQ UAR(hw doorbell) mapping, process
 748  * local resource used by both primary and secondary to avoid duplicate
 749  * reservation.
 750  * The space has to be available on both primary and secondary process,
 751  * TXQ UAR maps to this area using fixed mmap w/o double check.
 752  */
 753 static void *uar_base;
 754
 755 static int
 756 find_lower_va_bound(const struct rte_memseg_list *msl,
 757                 const struct rte_memseg *ms, void *arg)
 758 {
 759         void **addr = arg;
 760
 761         if (msl->external)
 762                 return 0;
 763         if (*addr == NULL)
 764                 *addr = ms->addr;
 765         else
 766                 *addr = RTE_MIN(*addr, ms->addr);
 767
 768         return 0;
 769 }
 770
 771 /**
 772  * Reserve UAR address space for primary process.
 773  *
 774  * @param[in] dev
 775  *   Pointer to Ethernet device.
 776  *
 777  * @return
 778  *   0 on success, a negative errno value otherwise and rte_errno is set.
 779  */
 780 static int
 781 mlx5_uar_init_primary(struct rte_eth_dev *dev)
 782 {
 783         struct mlx5_priv *priv = dev->data->dev_private;
 784         void *addr = (void *)0;
 785
 786         if (uar_base) { /* UAR address space mapped. */
 787                 priv->uar_base = uar_base;
 788                 return 0;
 789         }
 790         /* find out lower bound of hugepage segments */
 791         rte_memseg_walk(find_lower_va_bound, &addr);
 792
 793         /* keep distance to hugepages to minimize potential conflicts. */
 794         addr = RTE_PTR_SUB(addr, (uintptr_t)(MLX5_UAR_OFFSET + MLX5_UAR_SIZE));
 795         /* anonymous mmap, no real memory consumption. */
 796         addr = mmap(addr, MLX5_UAR_SIZE,
 797                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 798         if (addr == MAP_FAILED) {
 799                 DRV_LOG(ERR,
 800                         "port %u failed to reserve UAR address space, please"
 801                         " adjust MLX5_UAR_SIZE or try --base-virtaddr",
 802                         dev->data->port_id);
 803                 rte_errno = ENOMEM;
 804                 return -rte_errno;
 805         }
 806         /* Accept either same addr or a new addr returned from mmap if target
 807          * range occupied.
 808          */
 809         DRV_LOG(INFO, "port %u reserved UAR address space: %p",
 810                 dev->data->port_id, addr);
 811         priv->uar_base = addr; /* for primary and secondary UAR re-mmap. */
 812         uar_base = addr; /* process local, don't reserve again. */
 813         return 0;
 814 }
 815
 816 /**
 817  * Reserve UAR address space for secondary process, align with
 818  * primary process.
 819  *
 820  * @param[in] dev
 821  *   Pointer to Ethernet device.
 822  *
 823  * @return
 824  *   0 on success, a negative errno value otherwise and rte_errno is set.
 825  */
 826 static int
 827 mlx5_uar_init_secondary(struct rte_eth_dev *dev)
 828 {
 829         struct mlx5_priv *priv = dev->data->dev_private;
 830         void *addr;
 831
 832         assert(priv->uar_base);
 833         if (uar_base) { /* already reserved. */
 834                 assert(uar_base == priv->uar_base);
 835                 return 0;
 836         }
 837         /* anonymous mmap, no real memory consumption. */
 838         addr = mmap(priv->uar_base, MLX5_UAR_SIZE,
 839                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 840         if (addr == MAP_FAILED) {
 841                 DRV_LOG(ERR, "port %u UAR mmap failed: %p size: %llu",
 842                         dev->data->port_id, priv->uar_base, MLX5_UAR_SIZE);
 843                 rte_errno = ENXIO;
 844                 return -rte_errno;
 845         }
 846         if (priv->uar_base != addr) {
 847                 DRV_LOG(ERR,
 848                         "port %u UAR address %p size %llu occupied, please"
 849                         " adjust MLX5_UAR_OFFSET or try EAL parameter"
 850                         " --base-virtaddr",
 851                         dev->data->port_id, priv->uar_base, MLX5_UAR_SIZE);
 852                 rte_errno = ENXIO;
 853                 return -rte_errno;
 854         }
 855         uar_base = addr; /* process local, don't reserve again */
 856         DRV_LOG(INFO, "port %u reserved UAR address space: %p",
 857                 dev->data->port_id, addr);
 858         return 0;
 859 }
 860
 861 /**
 862  * Spawn an Ethernet device from Verbs information.
 863  *
 864  * @param dpdk_dev
 865  *   Backing DPDK device.
 866  * @param spawn
 867  *   Verbs device parameters (name, port, switch_info) to spawn.
 868  * @param config
 869  *   Device configuration parameters.
 870  *
 871  * @return
 872  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 873  *   is set. The following errors are defined:
 874  *
 875  *   EBUSY: device is not supposed to be spawned.
 876  *   EEXIST: device is already spawned
 877  */
 878 static struct rte_eth_dev *
 879 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 880                struct mlx5_dev_spawn_data *spawn,
 881                struct mlx5_dev_config config)
 882 {
 883         const struct mlx5_switch_info *switch_info = &spawn->info;
 884         struct mlx5_ibv_shared *sh = NULL;
 885         struct ibv_port_attr port_attr;
 886         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 887         struct rte_eth_dev *eth_dev = NULL;
 888         struct mlx5_priv *priv = NULL;
 889         int err = 0;
 890         unsigned int hw_padding = 0;
 891         unsigned int mps;
 892         unsigned int cqe_comp;
 893         unsigned int cqe_pad = 0;
 894         unsigned int tunnel_en = 0;
 895         unsigned int mpls_en = 0;
 896         unsigned int swp = 0;
 897         unsigned int mprq = 0;
 898         unsigned int mprq_min_stride_size_n = 0;
 899         unsigned int mprq_max_stride_size_n = 0;
 900         unsigned int mprq_min_stride_num_n = 0;
 901         unsigned int mprq_max_stride_num_n = 0;
 902         struct ether_addr mac;
 903         char name[RTE_ETH_NAME_MAX_LEN];
 904         int own_domain_id = 0;
 905         uint16_t port_id;
 906         unsigned int i;
 907
 908         /* Determine if this port representor is supposed to be spawned. */
 909         if (switch_info->representor && dpdk_dev->devargs) {
 910                 struct rte_eth_devargs eth_da;
 911
 912                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 913                 if (err) {
 914                         rte_errno = -err;
 915                         DRV_LOG(ERR, "failed to process device arguments: %s",
 916                                 strerror(rte_errno));
 917                         return NULL;
 918                 }
 919                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 920                         if (eth_da.representor_ports[i] ==
 921                             (uint16_t)switch_info->port_name)
 922                                 break;
 923                 if (i == eth_da.nb_representor_ports) {
 924                         rte_errno = EBUSY;
 925                         return NULL;
 926                 }
 927         }
 928         /* Build device name. */
 929         if (!switch_info->representor)
 930                 strlcpy(name, dpdk_dev->name, sizeof(name));
 931         else
 932                 snprintf(name, sizeof(name), "%s_representor_%u",
 933                          dpdk_dev->name, switch_info->port_name);
 934         /* check if the device is already spawned */
 935         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 936                 rte_errno = EEXIST;
 937                 return NULL;
 938         }
 939         /* Prepare shared data between primary and secondary process. */
 940         mlx5_prepare_shared_data();
 941         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 942         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 943                 eth_dev = rte_eth_dev_attach_secondary(name);
 944                 if (eth_dev == NULL) {
 945                         DRV_LOG(ERR, "can not attach rte ethdev");
 946                         rte_errno = ENOMEM;
 947                         return NULL;
 948                 }
 949                 eth_dev->device = dpdk_dev;
 950                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 951                 err = mlx5_uar_init_secondary(eth_dev);
 952                 if (err)
 953                         return NULL;
 954                 /* Receive command fd from primary process */
 955                 err = mlx5_socket_connect(eth_dev);
 956                 if (err < 0)
 957                         return NULL;
 958                 /* Remap UAR for Tx queues. */
 959                 err = mlx5_tx_uar_remap(eth_dev, err);
 960                 if (err)
 961                         return NULL;
 962                 /*
 963                  * Ethdev pointer is still required as input since
 964                  * the primary device is not accessible from the
 965                  * secondary process.
 966                  */
 967                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 968                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 969                 return eth_dev;
 970         }
 971         sh = mlx5_alloc_shared_ibctx(spawn);
 972         if (!sh)
 973                 return NULL;
 974         config.devx = sh->devx;
 975 #ifdef HAVE_IBV_MLX5_MOD_SWP
 976         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 977 #endif
 978         /*
 979          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 980          * as all ConnectX-5 devices.
 981          */
 982 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 983         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 984 #endif
 985 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 986         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 987 #endif
 988         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 989         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 990                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 991                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 992                         mps = MLX5_MPW_ENHANCED;
 993                 } else {
 994                         DRV_LOG(DEBUG, "MPW is supported");
 995                         mps = MLX5_MPW;
 996                 }
 997         } else {
 998                 DRV_LOG(DEBUG, "MPW isn't supported");
 999                 mps = MLX5_MPW_DISABLED;
1000         }
1001 #ifdef HAVE_IBV_MLX5_MOD_SWP
1002         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1003                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1004         DRV_LOG(DEBUG, "SWP support: %u", swp);
1005 #endif
1006         config.swp = !!swp;
1007 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1008         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1009                 struct mlx5dv_striding_rq_caps mprq_caps =
1010                         dv_attr.striding_rq_caps;
1011
1012                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1013                         mprq_caps.min_single_stride_log_num_of_bytes);
1014                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1015                         mprq_caps.max_single_stride_log_num_of_bytes);
1016                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1017                         mprq_caps.min_single_wqe_log_num_of_strides);
1018                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1019                         mprq_caps.max_single_wqe_log_num_of_strides);
1020                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1021                         mprq_caps.supported_qpts);
1022                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1023                 mprq = 1;
1024                 mprq_min_stride_size_n =
1025                         mprq_caps.min_single_stride_log_num_of_bytes;
1026                 mprq_max_stride_size_n =
1027                         mprq_caps.max_single_stride_log_num_of_bytes;
1028                 mprq_min_stride_num_n =
1029                         mprq_caps.min_single_wqe_log_num_of_strides;
1030                 mprq_max_stride_num_n =
1031                         mprq_caps.max_single_wqe_log_num_of_strides;
1032                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1033                                                    mprq_min_stride_num_n);
1034         }
1035 #endif
1036         if (RTE_CACHE_LINE_SIZE == 128 &&
1037             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1038                 cqe_comp = 0;
1039         else
1040                 cqe_comp = 1;
1041         config.cqe_comp = cqe_comp;
1042 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1043         /* Whether device supports 128B Rx CQE padding. */
1044         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1045                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1046 #endif
1047 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1048         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1049                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1050                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1051                              (dv_attr.tunnel_offloads_caps &
1052                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1053         }
1054         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1055                 tunnel_en ? "" : "not ");
1056 #else
1057         DRV_LOG(WARNING,
1058                 "tunnel offloading disabled due to old OFED/rdma-core version");
1059 #endif
1060         config.tunnel_en = tunnel_en;
1061 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1062         mpls_en = ((dv_attr.tunnel_offloads_caps &
1063                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1064                    (dv_attr.tunnel_offloads_caps &
1065                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1066         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1067                 mpls_en ? "" : "not ");
1068 #else
1069         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1070                 " old OFED/rdma-core version or firmware configuration");
1071 #endif
1072         config.mpls_en = mpls_en;
1073         /* Check port status. */
1074         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1075         if (err) {
1076                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1077                 goto error;
1078         }
1079         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1080                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1081                 err = EINVAL;
1082                 goto error;
1083         }
1084         if (port_attr.state != IBV_PORT_ACTIVE)
1085                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1086                         mlx5_glue->port_state_str(port_attr.state),
1087                         port_attr.state);
1088         /* Allocate private eth device data. */
1089         priv = rte_zmalloc("ethdev private structure",
1090                            sizeof(*priv),
1091                            RTE_CACHE_LINE_SIZE);
1092         if (priv == NULL) {
1093                 DRV_LOG(ERR, "priv allocation failure");
1094                 err = ENOMEM;
1095                 goto error;
1096         }
1097         priv->sh = sh;
1098         priv->ctx = sh->ctx;
1099         priv->ibv_port = spawn->ibv_port;
1100         priv->device_attr = sh->device_attr;
1101         priv->mtu = ETHER_MTU;
1102 #ifndef RTE_ARCH_64
1103         /* Initialize UAR access locks for 32bit implementations. */
1104         rte_spinlock_init(&priv->uar_lock_cq);
1105         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1106                 rte_spinlock_init(&priv->uar_lock[i]);
1107 #endif
1108         /* Some internal functions rely on Netlink sockets, open them now. */
1109         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1110         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1111         priv->nl_sn = 0;
1112         priv->representor = !!switch_info->representor;
1113         priv->master = !!switch_info->master;
1114         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1115         /*
1116          * Currently we support single E-Switch per PF configurations
1117          * only and vport_id field contains the vport index for
1118          * associated VF, which is deduced from representor port name.
1119          * For exapmple, let's have the IB device port 10, it has
1120          * attached network device eth0, which has port name attribute
1121          * pf0vf2, we can deduce the VF number as 2, and set vport index
1122          * as 3 (2+1). This assigning schema should be changed if the
1123          * multiple E-Switch instances per PF configurations or/and PCI
1124          * subfunctions are added.
1125          */
1126         priv->vport_id = switch_info->representor ?
1127                          switch_info->port_name + 1 : -1;
1128         /* representor_id field keeps the unmodified port/VF index. */
1129         priv->representor_id = switch_info->representor ?
1130                                switch_info->port_name : -1;
1131         /*
1132          * Look for sibling devices in order to reuse their switch domain
1133          * if any, otherwise allocate one.
1134          */
1135         i = mlx5_dev_to_port_id(dpdk_dev, NULL, 0);
1136         if (i > 0) {
1137                 uint16_t port_id[i];
1138
1139                 i = RTE_MIN(mlx5_dev_to_port_id(dpdk_dev, port_id, i), i);
1140                 while (i--) {
1141                         const struct mlx5_priv *opriv =
1142                                 rte_eth_devices[port_id[i]].data->dev_private;
1143
1144                         if (!opriv ||
1145                             opriv->domain_id ==
1146                             RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1147                                 continue;
1148                         priv->domain_id = opriv->domain_id;
1149                         break;
1150                 }
1151         }
1152         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1153                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1154                 if (err) {
1155                         err = rte_errno;
1156                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1157                                 strerror(rte_errno));
1158                         goto error;
1159                 }
1160                 own_domain_id = 1;
1161         }
1162         err = mlx5_args(&config, dpdk_dev->devargs);
1163         if (err) {
1164                 err = rte_errno;
1165                 DRV_LOG(ERR, "failed to process device arguments: %s",
1166                         strerror(rte_errno));
1167                 goto error;
1168         }
1169         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1170                             IBV_DEVICE_RAW_IP_CSUM);
1171         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1172                 (config.hw_csum ? "" : "not "));
1173 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1174         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1175         DRV_LOG(DEBUG, "counters are not supported");
1176 #endif
1177 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1178         if (config.dv_flow_en) {
1179                 DRV_LOG(WARNING, "DV flow is not supported");
1180                 config.dv_flow_en = 0;
1181         }
1182 #endif
1183         config.ind_table_max_size =
1184                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1185         /*
1186          * Remove this check once DPDK supports larger/variable
1187          * indirection tables.
1188          */
1189         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1190                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1191         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1192                 config.ind_table_max_size);
1193         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1194                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1195         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1196                 (config.hw_vlan_strip ? "" : "not "));
1197         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1198                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1199         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1200                 (config.hw_fcs_strip ? "" : "not "));
1201 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1202         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1203 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1204         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1205                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1206 #endif
1207         if (config.hw_padding && !hw_padding) {
1208                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1209                 config.hw_padding = 0;
1210         } else if (config.hw_padding) {
1211                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1212         }
1213         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1214                       (sh->device_attr.tso_caps.supported_qpts &
1215                        (1 << IBV_QPT_RAW_PACKET)));
1216         if (config.tso)
1217                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1218         /*
1219          * MPW is disabled by default, while the Enhanced MPW is enabled
1220          * by default.
1221          */
1222         if (config.mps == MLX5_ARG_UNSET)
1223                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1224                                                           MLX5_MPW_DISABLED;
1225         else
1226                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1227         DRV_LOG(INFO, "%sMPS is %s",
1228                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1229                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1230         if (config.cqe_comp && !cqe_comp) {
1231                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1232                 config.cqe_comp = 0;
1233         }
1234         if (config.cqe_pad && !cqe_pad) {
1235                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1236                 config.cqe_pad = 0;
1237         } else if (config.cqe_pad) {
1238                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1239         }
1240         if (config.mprq.enabled && mprq) {
1241                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1242                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1243                         config.mprq.stride_num_n =
1244                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1245                                         mprq_min_stride_num_n);
1246                         DRV_LOG(WARNING,
1247                                 "the number of strides"
1248                                 " for Multi-Packet RQ is out of range,"
1249                                 " setting default value (%u)",
1250                                 1 << config.mprq.stride_num_n);
1251                 }
1252                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1253                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1254         } else if (config.mprq.enabled && !mprq) {
1255                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1256                 config.mprq.enabled = 0;
1257         }
1258         eth_dev = rte_eth_dev_allocate(name);
1259         if (eth_dev == NULL) {
1260                 DRV_LOG(ERR, "can not allocate rte ethdev");
1261                 err = ENOMEM;
1262                 goto error;
1263         }
1264         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1265         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1266         if (priv->representor) {
1267                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1268                 eth_dev->data->representor_id = priv->representor_id;
1269         }
1270         eth_dev->data->dev_private = priv;
1271         priv->dev_data = eth_dev->data;
1272         eth_dev->data->mac_addrs = priv->mac;
1273         eth_dev->device = dpdk_dev;
1274         err = mlx5_uar_init_primary(eth_dev);
1275         if (err) {
1276                 err = rte_errno;
1277                 goto error;
1278         }
1279         /* Configure the first MAC address by default. */
1280         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1281                 DRV_LOG(ERR,
1282                         "port %u cannot get MAC address, is mlx5_en"
1283                         " loaded? (errno: %s)",
1284                         eth_dev->data->port_id, strerror(rte_errno));
1285                 err = ENODEV;
1286                 goto error;
1287         }
1288         DRV_LOG(INFO,
1289                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1290                 eth_dev->data->port_id,
1291                 mac.addr_bytes[0], mac.addr_bytes[1],
1292                 mac.addr_bytes[2], mac.addr_bytes[3],
1293                 mac.addr_bytes[4], mac.addr_bytes[5]);
1294 #ifndef NDEBUG
1295         {
1296                 char ifname[IF_NAMESIZE];
1297
1298                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1299                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1300                                 eth_dev->data->port_id, ifname);
1301                 else
1302                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1303                                 eth_dev->data->port_id);
1304         }
1305 #endif
1306         /* Get actual MTU if possible. */
1307         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1308         if (err) {
1309                 err = rte_errno;
1310                 goto error;
1311         }
1312         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1313                 priv->mtu);
1314         /* Initialize burst functions to prevent crashes before link-up. */
1315         eth_dev->rx_pkt_burst = removed_rx_burst;
1316         eth_dev->tx_pkt_burst = removed_tx_burst;
1317         eth_dev->dev_ops = &mlx5_dev_ops;
1318         /* Register MAC address. */
1319         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1320         if (config.vf && config.vf_nl_en)
1321                 mlx5_nl_mac_addr_sync(eth_dev);
1322         priv->tcf_context = mlx5_flow_tcf_context_create();
1323         if (!priv->tcf_context) {
1324                 err = -rte_errno;
1325                 DRV_LOG(WARNING,
1326                         "flow rules relying on switch offloads will not be"
1327                         " supported: cannot open libmnl socket: %s",
1328                         strerror(rte_errno));
1329         } else {
1330                 struct rte_flow_error error;
1331                 unsigned int ifindex = mlx5_ifindex(eth_dev);
1332
1333                 if (!ifindex) {
1334                         err = -rte_errno;
1335                         error.message =
1336                                 "cannot retrieve network interface index";
1337                 } else {
1338                         err = mlx5_flow_tcf_init(priv->tcf_context,
1339                                                  ifindex, &error);
1340                 }
1341                 if (err) {
1342                         DRV_LOG(WARNING,
1343                                 "flow rules relying on switch offloads will"
1344                                 " not be supported: %s: %s",
1345                                 error.message, strerror(rte_errno));
1346                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1347                         priv->tcf_context = NULL;
1348                 }
1349         }
1350         TAILQ_INIT(&priv->flows);
1351         TAILQ_INIT(&priv->ctrl_flows);
1352         /* Hint libmlx5 to use PMD allocator for data plane resources */
1353         struct mlx5dv_ctx_allocators alctr = {
1354                 .alloc = &mlx5_alloc_verbs_buf,
1355                 .free = &mlx5_free_verbs_buf,
1356                 .data = priv,
1357         };
1358         mlx5_glue->dv_set_context_attr(sh->ctx,
1359                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1360                                        (void *)((uintptr_t)&alctr));
1361         /* Bring Ethernet device up. */
1362         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1363                 eth_dev->data->port_id);
1364         mlx5_set_link_up(eth_dev);
1365         /*
1366          * Even though the interrupt handler is not installed yet,
1367          * interrupts will still trigger on the asyn_fd from
1368          * Verbs context returned by ibv_open_device().
1369          */
1370         mlx5_link_update(eth_dev, 0);
1371         /* Store device configuration on private structure. */
1372         priv->config = config;
1373         /* Supported Verbs flow priority number detection. */
1374         err = mlx5_flow_discover_priorities(eth_dev);
1375         if (err < 0) {
1376                 err = -err;
1377                 goto error;
1378         }
1379         priv->config.flow_prio = err;
1380         /*
1381          * Once the device is added to the list of memory event
1382          * callback, its global MR cache table cannot be expanded
1383          * on the fly because of deadlock. If it overflows, lookup
1384          * should be done by searching MR list linearly, which is slow.
1385          */
1386         err = mlx5_mr_btree_init(&priv->mr.cache,
1387                                  MLX5_MR_BTREE_CACHE_N * 2,
1388                                  eth_dev->device->numa_node);
1389         if (err) {
1390                 err = rte_errno;
1391                 goto error;
1392         }
1393         /* Add device to memory callback list. */
1394         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1395         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1396                          priv, mem_event_cb);
1397         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1398         return eth_dev;
1399 error:
1400         if (priv) {
1401                 if (priv->nl_socket_route >= 0)
1402                         close(priv->nl_socket_route);
1403                 if (priv->nl_socket_rdma >= 0)
1404                         close(priv->nl_socket_rdma);
1405                 if (priv->tcf_context)
1406                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1407                 if (own_domain_id)
1408                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1409                 rte_free(priv);
1410                 if (eth_dev != NULL)
1411                         eth_dev->data->dev_private = NULL;
1412         }
1413         if (eth_dev != NULL) {
1414                 /* mac_addrs must not be freed alone because part of dev_private */
1415                 eth_dev->data->mac_addrs = NULL;
1416                 rte_eth_dev_release_port(eth_dev);
1417         }
1418         if (sh)
1419                 mlx5_free_shared_ibctx(sh);
1420         assert(err > 0);
1421         rte_errno = err;
1422         return NULL;
1423 }
1424
1425 /**
1426  * Comparison callback to sort device data.
1427  *
1428  * This is meant to be used with qsort().
1429  *
1430  * @param a[in]
1431  *   Pointer to pointer to first data object.
1432  * @param b[in]
1433  *   Pointer to pointer to second data object.
1434  *
1435  * @return
1436  *   0 if both objects are equal, less than 0 if the first argument is less
1437  *   than the second, greater than 0 otherwise.
1438  */
1439 static int
1440 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1441 {
1442         const struct mlx5_switch_info *si_a =
1443                 &((const struct mlx5_dev_spawn_data *)a)->info;
1444         const struct mlx5_switch_info *si_b =
1445                 &((const struct mlx5_dev_spawn_data *)b)->info;
1446         int ret;
1447
1448         /* Master device first. */
1449         ret = si_b->master - si_a->master;
1450         if (ret)
1451                 return ret;
1452         /* Then representor devices. */
1453         ret = si_b->representor - si_a->representor;
1454         if (ret)
1455                 return ret;
1456         /* Unidentified devices come last in no specific order. */
1457         if (!si_a->representor)
1458                 return 0;
1459         /* Order representors by name. */
1460         return si_a->port_name - si_b->port_name;
1461 }
1462
1463 /**
1464  * DPDK callback to register a PCI device.
1465  *
1466  * This function spawns Ethernet devices out of a given PCI device.
1467  *
1468  * @param[in] pci_drv
1469  *   PCI driver structure (mlx5_driver).
1470  * @param[in] pci_dev
1471  *   PCI device information.
1472  *
1473  * @return
1474  *   0 on success, a negative errno value otherwise and rte_errno is set.
1475  */
1476 static int
1477 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1478                struct rte_pci_device *pci_dev)
1479 {
1480         struct ibv_device **ibv_list;
1481         /*
1482          * Number of found IB Devices matching with requested PCI BDF.
1483          * nd != 1 means there are multiple IB devices over the same
1484          * PCI device and we have representors and master.
1485          */
1486         unsigned int nd = 0;
1487         /*
1488          * Number of found IB device Ports. nd = 1 and np = 1..n means
1489          * we have the single multiport IB device, and there may be
1490          * representors attached to some of found ports.
1491          */
1492         unsigned int np = 0;
1493         /*
1494          * Number of DPDK ethernet devices to Spawn - either over
1495          * multiple IB devices or multiple ports of single IB device.
1496          * Actually this is the number of iterations to spawn.
1497          */
1498         unsigned int ns = 0;
1499         struct mlx5_dev_config dev_config;
1500         int ret;
1501
1502         assert(pci_drv == &mlx5_driver);
1503         errno = 0;
1504         ibv_list = mlx5_glue->get_device_list(&ret);
1505         if (!ibv_list) {
1506                 rte_errno = errno ? errno : ENOSYS;
1507                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1508                 return -rte_errno;
1509         }
1510         /*
1511          * First scan the list of all Infiniband devices to find
1512          * matching ones, gathering into the list.
1513          */
1514         struct ibv_device *ibv_match[ret + 1];
1515         int nl_route = -1;
1516         int nl_rdma = -1;
1517         unsigned int i;
1518
1519         while (ret-- > 0) {
1520                 struct rte_pci_addr pci_addr;
1521
1522                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1523                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1524                         continue;
1525                 if (pci_dev->addr.domain != pci_addr.domain ||
1526                     pci_dev->addr.bus != pci_addr.bus ||
1527                     pci_dev->addr.devid != pci_addr.devid ||
1528                     pci_dev->addr.function != pci_addr.function)
1529                         continue;
1530                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1531                         ibv_list[ret]->name);
1532                 ibv_match[nd++] = ibv_list[ret];
1533         }
1534         ibv_match[nd] = NULL;
1535         if (!nd) {
1536                 /* No device macthes, just complain and bail out. */
1537                 mlx5_glue->free_device_list(ibv_list);
1538                 DRV_LOG(WARNING,
1539                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1540                         " are kernel drivers loaded?",
1541                         pci_dev->addr.domain, pci_dev->addr.bus,
1542                         pci_dev->addr.devid, pci_dev->addr.function);
1543                 rte_errno = ENOENT;
1544                 ret = -rte_errno;
1545                 return ret;
1546         }
1547         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1548         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1549         if (nd == 1) {
1550                 /*
1551                  * Found single matching device may have multiple ports.
1552                  * Each port may be representor, we have to check the port
1553                  * number and check the representors existence.
1554                  */
1555                 if (nl_rdma >= 0)
1556                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1557                 if (!np)
1558                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1559                                          " ports number", ibv_match[0]->name);
1560         }
1561         /*
1562          * Now we can determine the maximal
1563          * amount of devices to be spawned.
1564          */
1565         struct mlx5_dev_spawn_data list[np ? np : nd];
1566
1567         if (np > 1) {
1568                 /*
1569                  * Signle IB device with multiple ports found,
1570                  * it may be E-Switch master device and representors.
1571                  * We have to perform identification trough the ports.
1572                  */
1573                 assert(nl_rdma >= 0);
1574                 assert(ns == 0);
1575                 assert(nd == 1);
1576                 for (i = 1; i <= np; ++i) {
1577                         list[ns].max_port = np;
1578                         list[ns].ibv_port = i;
1579                         list[ns].ibv_dev = ibv_match[0];
1580                         list[ns].eth_dev = NULL;
1581                         list[ns].ifindex = mlx5_nl_ifindex
1582                                         (nl_rdma, list[ns].ibv_dev->name, i);
1583                         if (!list[ns].ifindex) {
1584                                 /*
1585                                  * No network interface index found for the
1586                                  * specified port, it means there is no
1587                                  * representor on this port. It's OK,
1588                                  * there can be disabled ports, for example
1589                                  * if sriov_numvfs < sriov_totalvfs.
1590                                  */
1591                                 continue;
1592                         }
1593                         ret = -1;
1594                         if (nl_route >= 0)
1595                                 ret = mlx5_nl_switch_info
1596                                                (nl_route,
1597                                                 list[ns].ifindex,
1598                                                 &list[ns].info);
1599                         if (ret || (!list[ns].info.representor &&
1600                                     !list[ns].info.master)) {
1601                                 /*
1602                                  * We failed to recognize representors with
1603                                  * Netlink, let's try to perform the task
1604                                  * with sysfs.
1605                                  */
1606                                 ret =  mlx5_sysfs_switch_info
1607                                                 (list[ns].ifindex,
1608                                                  &list[ns].info);
1609                         }
1610                         if (!ret && (list[ns].info.representor ^
1611                                      list[ns].info.master))
1612                                 ns++;
1613                 }
1614                 if (!ns) {
1615                         DRV_LOG(ERR,
1616                                 "unable to recognize master/representors"
1617                                 " on the IB device with multiple ports");
1618                         rte_errno = ENOENT;
1619                         ret = -rte_errno;
1620                         goto exit;
1621                 }
1622         } else {
1623                 /*
1624                  * The existence of several matching entries (nd > 1) means
1625                  * port representors have been instantiated. No existing Verbs
1626                  * call nor sysfs entries can tell them apart, this can only
1627                  * be done through Netlink calls assuming kernel drivers are
1628                  * recent enough to support them.
1629                  *
1630                  * In the event of identification failure through Netlink,
1631                  * try again through sysfs, then:
1632                  *
1633                  * 1. A single IB device matches (nd == 1) with single
1634                  *    port (np=0/1) and is not a representor, assume
1635                  *    no switch support.
1636                  *
1637                  * 2. Otherwise no safe assumptions can be made;
1638                  *    complain louder and bail out.
1639                  */
1640                 np = 1;
1641                 for (i = 0; i != nd; ++i) {
1642                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1643                         list[ns].max_port = 1;
1644                         list[ns].ibv_port = 1;
1645                         list[ns].ibv_dev = ibv_match[i];
1646                         list[ns].eth_dev = NULL;
1647                         list[ns].ifindex = 0;
1648                         if (nl_rdma >= 0)
1649                                 list[ns].ifindex = mlx5_nl_ifindex
1650                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1651                         if (!list[ns].ifindex) {
1652                                 /*
1653                                  * No network interface index found for the
1654                                  * specified device, it means there it is not
1655                                  * a representor/master.
1656                                  */
1657                                 continue;
1658                         }
1659                         ret = -1;
1660                         if (nl_route >= 0)
1661                                 ret = mlx5_nl_switch_info
1662                                                (nl_route,
1663                                                 list[ns].ifindex,
1664                                                 &list[ns].info);
1665                         if (ret || (!list[ns].info.representor &&
1666                                     !list[ns].info.master)) {
1667                                 /*
1668                                  * We failed to recognize representors with
1669                                  * Netlink, let's try to perform the task
1670                                  * with sysfs.
1671                                  */
1672                                 ret =  mlx5_sysfs_switch_info
1673                                                 (list[ns].ifindex,
1674                                                  &list[ns].info);
1675                         }
1676                         if (!ret && (list[ns].info.representor ^
1677                                      list[ns].info.master)) {
1678                                 ns++;
1679                         } else if ((nd == 1) &&
1680                                    !list[ns].info.representor &&
1681                                    !list[ns].info.master) {
1682                                 /*
1683                                  * Single IB device with
1684                                  * one physical port and
1685                                  * attached network device.
1686                                  * May be SRIOV is not enabled
1687                                  * or there is no representors.
1688                                  */
1689                                 DRV_LOG(INFO, "no E-Switch support detected");
1690                                 ns++;
1691                                 break;
1692                         }
1693                 }
1694                 if (!ns) {
1695                         DRV_LOG(ERR,
1696                                 "unable to recognize master/representors"
1697                                 " on the multiple IB devices");
1698                         rte_errno = ENOENT;
1699                         ret = -rte_errno;
1700                         goto exit;
1701                 }
1702         }
1703         assert(ns);
1704         /*
1705          * Sort list to probe devices in natural order for users convenience
1706          * (i.e. master first, then representors from lowest to highest ID).
1707          */
1708         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1709         /* Default configuration. */
1710         dev_config = (struct mlx5_dev_config){
1711                 .hw_padding = 0,
1712                 .mps = MLX5_ARG_UNSET,
1713                 .tx_vec_en = 1,
1714                 .rx_vec_en = 1,
1715                 .txq_inline = MLX5_ARG_UNSET,
1716                 .txqs_inline = MLX5_ARG_UNSET,
1717                 .txqs_vec = MLX5_ARG_UNSET,
1718                 .inline_max_packet_sz = MLX5_ARG_UNSET,
1719                 .vf_nl_en = 1,
1720                 .mprq = {
1721                         .enabled = 0, /* Disabled by default. */
1722                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1723                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1724                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1725                 },
1726         };
1727         /* Device specific configuration. */
1728         switch (pci_dev->id.device_id) {
1729         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1730                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1731                 break;
1732         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1733         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1734         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1735         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1736                 dev_config.vf = 1;
1737                 break;
1738         default:
1739                 break;
1740         }
1741         /* Set architecture-dependent default value if unset. */
1742         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1743                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1744         for (i = 0; i != ns; ++i) {
1745                 uint32_t restore;
1746
1747                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1748                                                  &list[i],
1749                                                  dev_config);
1750                 if (!list[i].eth_dev) {
1751                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1752                                 break;
1753                         /* Device is disabled or already spawned. Ignore it. */
1754                         continue;
1755                 }
1756                 restore = list[i].eth_dev->data->dev_flags;
1757                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1758                 /* Restore non-PCI flags cleared by the above call. */
1759                 list[i].eth_dev->data->dev_flags |= restore;
1760                 rte_eth_dev_probing_finish(list[i].eth_dev);
1761         }
1762         if (i != ns) {
1763                 DRV_LOG(ERR,
1764                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1765                         " encountering an error: %s",
1766                         pci_dev->addr.domain, pci_dev->addr.bus,
1767                         pci_dev->addr.devid, pci_dev->addr.function,
1768                         strerror(rte_errno));
1769                 ret = -rte_errno;
1770                 /* Roll back. */
1771                 while (i--) {
1772                         if (!list[i].eth_dev)
1773                                 continue;
1774                         mlx5_dev_close(list[i].eth_dev);
1775                         /* mac_addrs must not be freed because in dev_private */
1776                         list[i].eth_dev->data->mac_addrs = NULL;
1777                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1778                 }
1779                 /* Restore original error. */
1780                 rte_errno = -ret;
1781         } else {
1782                 ret = 0;
1783         }
1784 exit:
1785         /*
1786          * Do the routine cleanup:
1787          * - close opened Netlink sockets
1788          * - free the Infiniband device list
1789          */
1790         if (nl_rdma >= 0)
1791                 close(nl_rdma);
1792         if (nl_route >= 0)
1793                 close(nl_route);
1794         assert(ibv_list);
1795         mlx5_glue->free_device_list(ibv_list);
1796         return ret;
1797 }
1798
1799 /**
1800  * DPDK callback to remove a PCI device.
1801  *
1802  * This function removes all Ethernet devices belong to a given PCI device.
1803  *
1804  * @param[in] pci_dev
1805  *   Pointer to the PCI device.
1806  *
1807  * @return
1808  *   0 on success, the function cannot fail.
1809  */
1810 static int
1811 mlx5_pci_remove(struct rte_pci_device *pci_dev)
1812 {
1813         uint16_t port_id;
1814         struct rte_eth_dev *port;
1815
1816         for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
1817                 port = &rte_eth_devices[port_id];
1818                 if (port->state != RTE_ETH_DEV_UNUSED &&
1819                                 port->device == &pci_dev->device)
1820                         rte_eth_dev_close(port_id);
1821         }
1822         return 0;
1823 }
1824
1825 static const struct rte_pci_id mlx5_pci_id_map[] = {
1826         {
1827                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1828                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
1829         },
1830         {
1831                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1832                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
1833         },
1834         {
1835                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1836                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
1837         },
1838         {
1839                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1840                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
1841         },
1842         {
1843                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1844                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
1845         },
1846         {
1847                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1848                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
1849         },
1850         {
1851                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1852                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
1853         },
1854         {
1855                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1856                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
1857         },
1858         {
1859                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1860                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
1861         },
1862         {
1863                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1864                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
1865         },
1866         {
1867                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1868                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
1869         },
1870         {
1871                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1872                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
1873         },
1874         {
1875                 .vendor_id = 0
1876         }
1877 };
1878
1879 static struct rte_pci_driver mlx5_driver = {
1880         .driver = {
1881                 .name = MLX5_DRIVER_NAME
1882         },
1883         .id_table = mlx5_pci_id_map,
1884         .probe = mlx5_pci_probe,
1885         .remove = mlx5_pci_remove,
1886         .dma_map = mlx5_dma_map,
1887         .dma_unmap = mlx5_dma_unmap,
1888         .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
1889                       RTE_PCI_DRV_PROBE_AGAIN),
1890 };
1891
1892 #ifdef RTE_IBVERBS_LINK_DLOPEN
1893
1894 /**
1895  * Suffix RTE_EAL_PMD_PATH with "-glue".
1896  *
1897  * This function performs a sanity check on RTE_EAL_PMD_PATH before
1898  * suffixing its last component.
1899  *
1900  * @param buf[out]
1901  *   Output buffer, should be large enough otherwise NULL is returned.
1902  * @param size
1903  *   Size of @p out.
1904  *
1905  * @return
1906  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
1907  */
1908 static char *
1909 mlx5_glue_path(char *buf, size_t size)
1910 {
1911         static const char *const bad[] = { "/", ".", "..", NULL };
1912         const char *path = RTE_EAL_PMD_PATH;
1913         size_t len = strlen(path);
1914         size_t off;
1915         int i;
1916
1917         while (len && path[len - 1] == '/')
1918                 --len;
1919         for (off = len; off && path[off - 1] != '/'; --off)
1920                 ;
1921         for (i = 0; bad[i]; ++i)
1922                 if (!strncmp(path + off, bad[i], (int)(len - off)))
1923                         goto error;
1924         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
1925         if (i == -1 || (size_t)i >= size)
1926                 goto error;
1927         return buf;
1928 error:
1929         DRV_LOG(ERR,
1930                 "unable to append \"-glue\" to last component of"
1931                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
1932                 " please re-configure DPDK");
1933         return NULL;
1934 }
1935
1936 /**
1937  * Initialization routine for run-time dependency on rdma-core.
1938  */
1939 static int
1940 mlx5_glue_init(void)
1941 {
1942         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
1943         const char *path[] = {
1944                 /*
1945                  * A basic security check is necessary before trusting
1946                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
1947                  */
1948                 (geteuid() == getuid() && getegid() == getgid() ?
1949                  getenv("MLX5_GLUE_PATH") : NULL),
1950                 /*
1951                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
1952                  * variant, otherwise let dlopen() look up libraries on its
1953                  * own.
1954                  */
1955                 (*RTE_EAL_PMD_PATH ?
1956                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
1957         };
1958         unsigned int i = 0;
1959         void *handle = NULL;
1960         void **sym;
1961         const char *dlmsg;
1962
1963         while (!handle && i != RTE_DIM(path)) {
1964                 const char *end;
1965                 size_t len;
1966                 int ret;
1967
1968                 if (!path[i]) {
1969                         ++i;
1970                         continue;
1971                 }
1972                 end = strpbrk(path[i], ":;");
1973                 if (!end)
1974                         end = path[i] + strlen(path[i]);
1975                 len = end - path[i];
1976                 ret = 0;
1977                 do {
1978                         char name[ret + 1];
1979
1980                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
1981                                        (int)len, path[i],
1982                                        (!len || *(end - 1) == '/') ? "" : "/");
1983                         if (ret == -1)
1984                                 break;
1985                         if (sizeof(name) != (size_t)ret + 1)
1986                                 continue;
1987                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
1988                                 name);
1989                         handle = dlopen(name, RTLD_LAZY);
1990                         break;
1991                 } while (1);
1992                 path[i] = end + 1;
1993                 if (!*end)
1994                         ++i;
1995         }
1996         if (!handle) {
1997                 rte_errno = EINVAL;
1998                 dlmsg = dlerror();
1999                 if (dlmsg)
2000                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2001                 goto glue_error;
2002         }
2003         sym = dlsym(handle, "mlx5_glue");
2004         if (!sym || !*sym) {
2005                 rte_errno = EINVAL;
2006                 dlmsg = dlerror();
2007                 if (dlmsg)
2008                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2009                 goto glue_error;
2010         }
2011         mlx5_glue = *sym;
2012         return 0;
2013 glue_error:
2014         if (handle)
2015                 dlclose(handle);
2016         DRV_LOG(WARNING,
2017                 "cannot initialize PMD due to missing run-time dependency on"
2018                 " rdma-core libraries (libibverbs, libmlx5)");
2019         return -rte_errno;
2020 }
2021
2022 #endif
2023
2024 /**
2025  * Driver initialization routine.
2026  */
2027 RTE_INIT(rte_mlx5_pmd_init)
2028 {
2029         /* Initialize driver log type. */
2030         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2031         if (mlx5_logtype >= 0)
2032                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2033
2034         /* Build the static tables for Verbs conversion. */
2035         mlx5_set_ptype_table();
2036         mlx5_set_cksum_table();
2037         mlx5_set_swp_types_table();
2038         /*
2039          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2040          * huge pages. Calling ibv_fork_init() during init allows
2041          * applications to use fork() safely for purposes other than
2042          * using this PMD, which is not supported in forked processes.
2043          */
2044         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2045         /* Match the size of Rx completion entry to the size of a cacheline. */
2046         if (RTE_CACHE_LINE_SIZE == 128)
2047                 setenv("MLX5_CQE_SIZE", "128", 0);
2048         /*
2049          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2050          * cleanup all the Verbs resources even when the device was removed.
2051          */
2052         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2053 #ifdef RTE_IBVERBS_LINK_DLOPEN
2054         if (mlx5_glue_init())
2055                 return;
2056         assert(mlx5_glue);
2057 #endif
2058 #ifndef NDEBUG
2059         /* Glue structure must not contain any NULL pointers. */
2060         {
2061                 unsigned int i;
2062
2063                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2064                         assert(((const void *const *)mlx5_glue)[i]);
2065         }
2066 #endif
2067         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2068                 DRV_LOG(ERR,
2069                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2070                         mlx5_glue->version, MLX5_GLUE_VERSION);
2071                 return;
2072         }
2073         mlx5_glue->fork_init();
2074         rte_pci_register(&mlx5_driver);
2075 }
2076
2077 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2078 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2079 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");