1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. */
72 #define MLX5_TXQ_INLINE "txq_inline"
75 * Device parameter to configure the number of TX queues threshold for
76 * enabling inline send.
78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
81 * Device parameter to configure the number of TX queues threshold for
82 * enabling vectorized Tx.
84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
86 /* Device parameter to enable multi-packet send WQEs. */
87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
89 /* Device parameter to include 2 dsegs in the title WQEBB. */
90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
92 /* Device parameter to limit the size of inlining packet. */
93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
95 /* Device parameter to enable hardware Tx vector. */
96 #define MLX5_TX_VEC_EN "tx_vec_en"
98 /* Device parameter to enable hardware Rx vector. */
99 #define MLX5_RX_VEC_EN "rx_vec_en"
101 /* Allow L3 VXLAN flow creation. */
102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
104 /* Activate DV flow steering. */
105 #define MLX5_DV_FLOW_EN "dv_flow_en"
107 /* Activate Netlink support in VF mode. */
108 #define MLX5_VF_NL_EN "vf_nl_en"
110 /* Enable extending memsegs when creating a MR. */
111 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
113 /* Select port representors to instantiate. */
114 #define MLX5_REPRESENTOR "representor"
116 #ifndef HAVE_IBV_MLX5_MOD_MPW
117 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
118 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
121 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
122 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
125 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
127 /* Shared memory between primary and secondary processes. */
128 struct mlx5_shared_data *mlx5_shared_data;
130 /* Spinlock for mlx5_shared_data allocation. */
131 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
133 /* Process local data for secondary processes. */
134 static struct mlx5_local_data mlx5_local_data;
136 /** Driver-specific log messages type. */
139 /** Data associated with devices to spawn. */
140 struct mlx5_dev_spawn_data {
141 uint32_t ifindex; /**< Network interface index. */
142 uint32_t max_port; /**< IB device maximal port index. */
143 uint32_t ibv_port; /**< IB device physical port index. */
144 struct mlx5_switch_info info; /**< Switch information. */
145 struct ibv_device *ibv_dev; /**< Associated IB device. */
146 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
149 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
150 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
153 * Allocate shared IB device context. If there is multiport device the
154 * master and representors will share this context, if there is single
155 * port dedicated IB device, the context will be used by only given
156 * port due to unification.
158 * Routine first searches the context for the spesified IB device name,
159 * if found the shared context assumed and reference counter is incremented.
160 * If no context found the new one is created and initialized with specified
161 * IB device context and parameters.
164 * Pointer to the IB device attributes (name, port, etc).
167 * Pointer to mlx5_ibv_shared object on success,
168 * otherwise NULL and rte_errno is set.
170 static struct mlx5_ibv_shared *
171 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
173 struct mlx5_ibv_shared *sh;
178 /* Secondary process should not create the shared context. */
179 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
180 pthread_mutex_lock(&mlx5_ibv_list_mutex);
181 /* Search for IB context by device name. */
182 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
183 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
188 /* No device found, we have to create new sharted context. */
189 assert(spawn->max_port);
190 sh = rte_zmalloc("ethdev shared ib context",
191 sizeof(struct mlx5_ibv_shared) +
193 sizeof(struct mlx5_ibv_shared_port),
194 RTE_CACHE_LINE_SIZE);
196 DRV_LOG(ERR, "shared context allocation failure");
200 /* Try to open IB device with DV first, then usual Verbs. */
202 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
205 DRV_LOG(DEBUG, "DevX is supported");
207 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
209 err = errno ? errno : ENODEV;
212 DRV_LOG(DEBUG, "DevX is NOT supported");
214 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
216 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
220 sh->max_port = spawn->max_port;
221 strncpy(sh->ibdev_name, sh->ctx->device->name,
222 sizeof(sh->ibdev_name));
223 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
224 sizeof(sh->ibdev_path));
225 pthread_mutex_init(&sh->intr_mutex, NULL);
227 * Setting port_id to max unallowed value means
228 * there is no interrupt subhandler installed for
229 * the given port index i.
231 for (i = 0; i < sh->max_port; i++)
232 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
233 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
234 if (sh->pd == NULL) {
235 DRV_LOG(ERR, "PD allocation failure");
239 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
241 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
244 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
247 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
249 claim_zero(mlx5_glue->close_device(sh->ctx));
257 * Free shared IB device context. Decrement counter and if zero free
258 * all allocated resources and close handles.
261 * Pointer to mlx5_ibv_shared object to free
264 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
266 pthread_mutex_lock(&mlx5_ibv_list_mutex);
268 /* Check the object presence in the list. */
269 struct mlx5_ibv_shared *lctx;
271 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
276 DRV_LOG(ERR, "Freeing non-existing shared IB context");
282 /* Secondary process should not free the shared context. */
283 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
286 LIST_REMOVE(sh, next);
288 * Ensure there is no async event handler installed.
289 * Only primary process handles async device events.
291 assert(!sh->intr_cnt);
293 rte_intr_callback_unregister
294 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
295 pthread_mutex_destroy(&sh->intr_mutex);
297 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
299 claim_zero(mlx5_glue->close_device(sh->ctx));
302 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
306 * Initialize DR related data within private structure.
307 * Routine checks the reference counter and does actual
308 * resources creation/iniialization only if counter is zero.
311 * Pointer to the private device data structure.
314 * Zero on success, positive error code otherwise.
317 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
319 #ifdef HAVE_MLX5DV_DR
320 struct mlx5_ibv_shared *sh = priv->sh;
326 /* Shared DV/DR structures is already initialized. */
331 /* Reference counter is zero, we should initialize structures. */
332 ns = mlx5dv_dr_create_ns(sh->ctx, MLX5DV_DR_NS_DOMAIN_INGRESS_BYPASS);
334 DRV_LOG(ERR, "ingress mlx5dv_dr_create_ns failed");
339 ns = mlx5dv_dr_create_ns(sh->ctx, MLX5DV_DR_NS_DOMAIN_EGRESS_BYPASS);
341 DRV_LOG(ERR, "egress mlx5dv_dr_create_ns failed");
351 /* Rollback the created objects. */
353 mlx5dv_dr_destroy_ns(priv->rx_ns);
357 mlx5dv_dr_destroy_ns(priv->tx_ns);
368 * Destroy DR related data within private structure.
371 * Pointer to the private device data structure.
374 mlx5_free_shared_dr(struct mlx5_priv *priv)
376 #ifdef HAVE_MLX5DV_DR
377 struct mlx5_ibv_shared *sh;
379 if (!priv->dr_shared)
384 assert(sh->dv_refcnt);
385 if (sh->dv_refcnt && --sh->dv_refcnt)
388 mlx5dv_dr_destroy_ns(priv->rx_ns);
392 mlx5dv_dr_destroy_ns(priv->tx_ns);
401 * Initialize shared data between primary and secondary process.
403 * A memzone is reserved by primary process and secondary processes attach to
407 * 0 on success, a negative errno value otherwise and rte_errno is set.
410 mlx5_init_shared_data(void)
412 const struct rte_memzone *mz;
415 rte_spinlock_lock(&mlx5_shared_data_lock);
416 if (mlx5_shared_data == NULL) {
417 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
418 /* Allocate shared memory. */
419 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
420 sizeof(*mlx5_shared_data),
424 "Cannot allocate mlx5 shared data\n");
428 mlx5_shared_data = mz->addr;
429 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
430 rte_spinlock_init(&mlx5_shared_data->lock);
432 /* Lookup allocated shared memory. */
433 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
436 "Cannot attach mlx5 shared data\n");
440 mlx5_shared_data = mz->addr;
441 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
445 rte_spinlock_unlock(&mlx5_shared_data_lock);
450 * Uninitialize shared data between primary and secondary process.
452 * The pointer of secondary process is dereferenced and primary process frees
456 mlx5_uninit_shared_data(void)
458 const struct rte_memzone *mz;
460 rte_spinlock_lock(&mlx5_shared_data_lock);
461 if (mlx5_shared_data) {
462 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
463 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
464 rte_memzone_free(mz);
466 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
468 mlx5_shared_data = NULL;
470 rte_spinlock_unlock(&mlx5_shared_data_lock);
474 * Retrieve integer value from environment variable.
477 * Environment variable name.
480 * Integer value, 0 if the variable is not set.
483 mlx5_getenv_int(const char *name)
485 const char *val = getenv(name);
493 * Verbs callback to allocate a memory. This function should allocate the space
494 * according to the size provided residing inside a huge page.
495 * Please note that all allocation must respect the alignment from libmlx5
496 * (i.e. currently sysconf(_SC_PAGESIZE)).
499 * The size in bytes of the memory to allocate.
501 * A pointer to the callback data.
504 * Allocated buffer, NULL otherwise and rte_errno is set.
507 mlx5_alloc_verbs_buf(size_t size, void *data)
509 struct mlx5_priv *priv = data;
511 size_t alignment = sysconf(_SC_PAGESIZE);
512 unsigned int socket = SOCKET_ID_ANY;
514 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
515 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
517 socket = ctrl->socket;
518 } else if (priv->verbs_alloc_ctx.type ==
519 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
520 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
522 socket = ctrl->socket;
524 assert(data != NULL);
525 ret = rte_malloc_socket(__func__, size, alignment, socket);
532 * Verbs callback to free a memory.
535 * A pointer to the memory to free.
537 * A pointer to the callback data.
540 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
542 assert(data != NULL);
547 * DPDK callback to close the device.
549 * Destroy all queues and objects, free memory.
552 * Pointer to Ethernet device structure.
555 mlx5_dev_close(struct rte_eth_dev *dev)
557 struct mlx5_priv *priv = dev->data->dev_private;
561 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
563 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
564 /* In case mlx5_dev_stop() has not been called. */
565 mlx5_dev_interrupt_handler_uninstall(dev);
566 mlx5_traffic_disable(dev);
567 mlx5_flow_flush(dev, NULL);
568 /* Prevent crashes when queues are still in use. */
569 dev->rx_pkt_burst = removed_rx_burst;
570 dev->tx_pkt_burst = removed_tx_burst;
572 /* Disable datapath on secondary process. */
573 mlx5_mp_req_stop_rxtx(dev);
574 if (priv->rxqs != NULL) {
575 /* XXX race condition if mlx5_rx_burst() is still running. */
577 for (i = 0; (i != priv->rxqs_n); ++i)
578 mlx5_rxq_release(dev, i);
582 if (priv->txqs != NULL) {
583 /* XXX race condition if mlx5_tx_burst() is still running. */
585 for (i = 0; (i != priv->txqs_n); ++i)
586 mlx5_txq_release(dev, i);
590 mlx5_mprq_free_mp(dev);
591 mlx5_mr_release(dev);
593 mlx5_free_shared_dr(priv);
595 mlx5_free_shared_ibctx(priv->sh);
597 if (priv->rss_conf.rss_key != NULL)
598 rte_free(priv->rss_conf.rss_key);
599 if (priv->reta_idx != NULL)
600 rte_free(priv->reta_idx);
602 mlx5_nl_mac_addr_flush(dev);
603 if (priv->nl_socket_route >= 0)
604 close(priv->nl_socket_route);
605 if (priv->nl_socket_rdma >= 0)
606 close(priv->nl_socket_rdma);
607 if (priv->tcf_context)
608 mlx5_flow_tcf_context_destroy(priv->tcf_context);
609 ret = mlx5_hrxq_ibv_verify(dev);
611 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
613 ret = mlx5_ind_table_ibv_verify(dev);
615 DRV_LOG(WARNING, "port %u some indirection table still remain",
617 ret = mlx5_rxq_ibv_verify(dev);
619 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
621 ret = mlx5_rxq_verify(dev);
623 DRV_LOG(WARNING, "port %u some Rx queues still remain",
625 ret = mlx5_txq_ibv_verify(dev);
627 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
629 ret = mlx5_txq_verify(dev);
631 DRV_LOG(WARNING, "port %u some Tx queues still remain",
633 ret = mlx5_flow_verify(dev);
635 DRV_LOG(WARNING, "port %u some flows still remain",
637 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
641 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
642 struct mlx5_priv *opriv =
643 rte_eth_devices[port_id].data->dev_private;
646 opriv->domain_id != priv->domain_id ||
647 &rte_eth_devices[port_id] == dev)
652 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
654 memset(priv, 0, sizeof(*priv));
655 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
657 * Reset mac_addrs to NULL such that it is not freed as part of
658 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
659 * it is freed when dev_private is freed.
661 dev->data->mac_addrs = NULL;
664 const struct eth_dev_ops mlx5_dev_ops = {
665 .dev_configure = mlx5_dev_configure,
666 .dev_start = mlx5_dev_start,
667 .dev_stop = mlx5_dev_stop,
668 .dev_set_link_down = mlx5_set_link_down,
669 .dev_set_link_up = mlx5_set_link_up,
670 .dev_close = mlx5_dev_close,
671 .promiscuous_enable = mlx5_promiscuous_enable,
672 .promiscuous_disable = mlx5_promiscuous_disable,
673 .allmulticast_enable = mlx5_allmulticast_enable,
674 .allmulticast_disable = mlx5_allmulticast_disable,
675 .link_update = mlx5_link_update,
676 .stats_get = mlx5_stats_get,
677 .stats_reset = mlx5_stats_reset,
678 .xstats_get = mlx5_xstats_get,
679 .xstats_reset = mlx5_xstats_reset,
680 .xstats_get_names = mlx5_xstats_get_names,
681 .fw_version_get = mlx5_fw_version_get,
682 .dev_infos_get = mlx5_dev_infos_get,
683 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
684 .vlan_filter_set = mlx5_vlan_filter_set,
685 .rx_queue_setup = mlx5_rx_queue_setup,
686 .tx_queue_setup = mlx5_tx_queue_setup,
687 .rx_queue_release = mlx5_rx_queue_release,
688 .tx_queue_release = mlx5_tx_queue_release,
689 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
690 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
691 .mac_addr_remove = mlx5_mac_addr_remove,
692 .mac_addr_add = mlx5_mac_addr_add,
693 .mac_addr_set = mlx5_mac_addr_set,
694 .set_mc_addr_list = mlx5_set_mc_addr_list,
695 .mtu_set = mlx5_dev_set_mtu,
696 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
697 .vlan_offload_set = mlx5_vlan_offload_set,
698 .reta_update = mlx5_dev_rss_reta_update,
699 .reta_query = mlx5_dev_rss_reta_query,
700 .rss_hash_update = mlx5_rss_hash_update,
701 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
702 .filter_ctrl = mlx5_dev_filter_ctrl,
703 .rx_descriptor_status = mlx5_rx_descriptor_status,
704 .tx_descriptor_status = mlx5_tx_descriptor_status,
705 .rx_queue_count = mlx5_rx_queue_count,
706 .rx_queue_intr_enable = mlx5_rx_intr_enable,
707 .rx_queue_intr_disable = mlx5_rx_intr_disable,
708 .is_removed = mlx5_is_removed,
711 /* Available operations from secondary process. */
712 static const struct eth_dev_ops mlx5_dev_sec_ops = {
713 .stats_get = mlx5_stats_get,
714 .stats_reset = mlx5_stats_reset,
715 .xstats_get = mlx5_xstats_get,
716 .xstats_reset = mlx5_xstats_reset,
717 .xstats_get_names = mlx5_xstats_get_names,
718 .fw_version_get = mlx5_fw_version_get,
719 .dev_infos_get = mlx5_dev_infos_get,
720 .rx_descriptor_status = mlx5_rx_descriptor_status,
721 .tx_descriptor_status = mlx5_tx_descriptor_status,
724 /* Available operations in flow isolated mode. */
725 const struct eth_dev_ops mlx5_dev_ops_isolate = {
726 .dev_configure = mlx5_dev_configure,
727 .dev_start = mlx5_dev_start,
728 .dev_stop = mlx5_dev_stop,
729 .dev_set_link_down = mlx5_set_link_down,
730 .dev_set_link_up = mlx5_set_link_up,
731 .dev_close = mlx5_dev_close,
732 .promiscuous_enable = mlx5_promiscuous_enable,
733 .promiscuous_disable = mlx5_promiscuous_disable,
734 .allmulticast_enable = mlx5_allmulticast_enable,
735 .allmulticast_disable = mlx5_allmulticast_disable,
736 .link_update = mlx5_link_update,
737 .stats_get = mlx5_stats_get,
738 .stats_reset = mlx5_stats_reset,
739 .xstats_get = mlx5_xstats_get,
740 .xstats_reset = mlx5_xstats_reset,
741 .xstats_get_names = mlx5_xstats_get_names,
742 .fw_version_get = mlx5_fw_version_get,
743 .dev_infos_get = mlx5_dev_infos_get,
744 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
745 .vlan_filter_set = mlx5_vlan_filter_set,
746 .rx_queue_setup = mlx5_rx_queue_setup,
747 .tx_queue_setup = mlx5_tx_queue_setup,
748 .rx_queue_release = mlx5_rx_queue_release,
749 .tx_queue_release = mlx5_tx_queue_release,
750 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
751 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
752 .mac_addr_remove = mlx5_mac_addr_remove,
753 .mac_addr_add = mlx5_mac_addr_add,
754 .mac_addr_set = mlx5_mac_addr_set,
755 .set_mc_addr_list = mlx5_set_mc_addr_list,
756 .mtu_set = mlx5_dev_set_mtu,
757 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
758 .vlan_offload_set = mlx5_vlan_offload_set,
759 .filter_ctrl = mlx5_dev_filter_ctrl,
760 .rx_descriptor_status = mlx5_rx_descriptor_status,
761 .tx_descriptor_status = mlx5_tx_descriptor_status,
762 .rx_queue_intr_enable = mlx5_rx_intr_enable,
763 .rx_queue_intr_disable = mlx5_rx_intr_disable,
764 .is_removed = mlx5_is_removed,
768 * Verify and store value for device argument.
771 * Key argument to verify.
773 * Value associated with key.
778 * 0 on success, a negative errno value otherwise and rte_errno is set.
781 mlx5_args_check(const char *key, const char *val, void *opaque)
783 struct mlx5_dev_config *config = opaque;
786 /* No-op, port representors are processed in mlx5_dev_spawn(). */
787 if (!strcmp(MLX5_REPRESENTOR, key))
790 tmp = strtoul(val, NULL, 0);
793 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
796 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
797 config->cqe_comp = !!tmp;
798 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
799 config->cqe_pad = !!tmp;
800 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
801 config->hw_padding = !!tmp;
802 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
803 config->mprq.enabled = !!tmp;
804 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
805 config->mprq.stride_num_n = tmp;
806 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
807 config->mprq.max_memcpy_len = tmp;
808 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
809 config->mprq.min_rxqs_num = tmp;
810 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
811 config->txq_inline = tmp;
812 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
813 config->txqs_inline = tmp;
814 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
815 config->txqs_vec = tmp;
816 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
818 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
819 config->mpw_hdr_dseg = !!tmp;
820 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
821 config->inline_max_packet_sz = tmp;
822 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
823 config->tx_vec_en = !!tmp;
824 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
825 config->rx_vec_en = !!tmp;
826 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
827 config->l3_vxlan_en = !!tmp;
828 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
829 config->vf_nl_en = !!tmp;
830 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
831 config->dv_flow_en = !!tmp;
832 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
833 config->mr_ext_memseg_en = !!tmp;
835 DRV_LOG(WARNING, "%s: unknown parameter", key);
843 * Parse device parameters.
846 * Pointer to device configuration structure.
848 * Device arguments structure.
851 * 0 on success, a negative errno value otherwise and rte_errno is set.
854 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
856 const char **params = (const char *[]){
857 MLX5_RXQ_CQE_COMP_EN,
861 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
862 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
865 MLX5_TXQS_MIN_INLINE,
868 MLX5_TXQ_MPW_HDR_DSEG_EN,
869 MLX5_TXQ_MAX_INLINE_LEN,
875 MLX5_MR_EXT_MEMSEG_EN,
879 struct rte_kvargs *kvlist;
885 /* Following UGLY cast is done to pass checkpatch. */
886 kvlist = rte_kvargs_parse(devargs->args, params);
889 /* Process parameters. */
890 for (i = 0; (params[i] != NULL); ++i) {
891 if (rte_kvargs_count(kvlist, params[i])) {
892 ret = rte_kvargs_process(kvlist, params[i],
893 mlx5_args_check, config);
896 rte_kvargs_free(kvlist);
901 rte_kvargs_free(kvlist);
905 static struct rte_pci_driver mlx5_driver;
908 find_lower_va_bound(const struct rte_memseg_list *msl,
909 const struct rte_memseg *ms, void *arg)
918 *addr = RTE_MIN(*addr, ms->addr);
924 * Reserve UAR address space for primary process.
926 * Process local resource is used by both primary and secondary to avoid
927 * duplicate reservation. The space has to be available on both primary and
928 * secondary process, TXQ UAR maps to this area using fixed mmap w/o double
932 * 0 on success, a negative errno value otherwise and rte_errno is set.
935 mlx5_uar_init_primary(void)
937 struct mlx5_shared_data *sd = mlx5_shared_data;
938 void *addr = (void *)0;
942 /* find out lower bound of hugepage segments */
943 rte_memseg_walk(find_lower_va_bound, &addr);
944 /* keep distance to hugepages to minimize potential conflicts. */
945 addr = RTE_PTR_SUB(addr, (uintptr_t)(MLX5_UAR_OFFSET + MLX5_UAR_SIZE));
946 /* anonymous mmap, no real memory consumption. */
947 addr = mmap(addr, MLX5_UAR_SIZE,
948 PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
949 if (addr == MAP_FAILED) {
951 "Failed to reserve UAR address space, please"
952 " adjust MLX5_UAR_SIZE or try --base-virtaddr");
956 /* Accept either same addr or a new addr returned from mmap if target
959 DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
960 sd->uar_base = addr; /* for primary and secondary UAR re-mmap. */
965 * Unmap UAR address space reserved for primary process.
968 mlx5_uar_uninit_primary(void)
970 struct mlx5_shared_data *sd = mlx5_shared_data;
974 munmap(sd->uar_base, MLX5_UAR_SIZE);
979 * Reserve UAR address space for secondary process, align with primary process.
982 * 0 on success, a negative errno value otherwise and rte_errno is set.
985 mlx5_uar_init_secondary(void)
987 struct mlx5_shared_data *sd = mlx5_shared_data;
988 struct mlx5_local_data *ld = &mlx5_local_data;
991 if (ld->uar_base) { /* Already reserved. */
992 assert(sd->uar_base == ld->uar_base);
995 assert(sd->uar_base);
996 /* anonymous mmap, no real memory consumption. */
997 addr = mmap(sd->uar_base, MLX5_UAR_SIZE,
998 PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
999 if (addr == MAP_FAILED) {
1000 DRV_LOG(ERR, "UAR mmap failed: %p size: %llu",
1001 sd->uar_base, MLX5_UAR_SIZE);
1005 if (sd->uar_base != addr) {
1007 "UAR address %p size %llu occupied, please"
1008 " adjust MLX5_UAR_OFFSET or try EAL parameter"
1010 sd->uar_base, MLX5_UAR_SIZE);
1014 ld->uar_base = addr;
1015 DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
1020 * Unmap UAR address space reserved for secondary process.
1023 mlx5_uar_uninit_secondary(void)
1025 struct mlx5_local_data *ld = &mlx5_local_data;
1029 munmap(ld->uar_base, MLX5_UAR_SIZE);
1030 ld->uar_base = NULL;
1034 * PMD global initialization.
1036 * Independent from individual device, this function initializes global
1037 * per-PMD data structures distinguishing primary and secondary processes.
1038 * Hence, each initialization is called once per a process.
1041 * 0 on success, a negative errno value otherwise and rte_errno is set.
1044 mlx5_init_once(void)
1046 struct mlx5_shared_data *sd;
1047 struct mlx5_local_data *ld = &mlx5_local_data;
1050 if (mlx5_init_shared_data())
1052 sd = mlx5_shared_data;
1054 rte_spinlock_lock(&sd->lock);
1055 switch (rte_eal_process_type()) {
1056 case RTE_PROC_PRIMARY:
1059 LIST_INIT(&sd->mem_event_cb_list);
1060 rte_rwlock_init(&sd->mem_event_rwlock);
1061 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1062 mlx5_mr_mem_event_cb, NULL);
1063 mlx5_mp_init_primary();
1064 ret = mlx5_uar_init_primary();
1067 sd->init_done = true;
1069 case RTE_PROC_SECONDARY:
1072 mlx5_mp_init_secondary();
1073 ret = mlx5_uar_init_secondary();
1076 ++sd->secondary_cnt;
1077 ld->init_done = true;
1082 rte_spinlock_unlock(&sd->lock);
1085 switch (rte_eal_process_type()) {
1086 case RTE_PROC_PRIMARY:
1087 mlx5_uar_uninit_primary();
1088 mlx5_mp_uninit_primary();
1089 rte_mem_event_callback_unregister("MLX5_MEM_EVENT_CB", NULL);
1091 case RTE_PROC_SECONDARY:
1092 mlx5_uar_uninit_secondary();
1093 mlx5_mp_uninit_secondary();
1098 rte_spinlock_unlock(&sd->lock);
1099 mlx5_uninit_shared_data();
1104 * Spawn an Ethernet device from Verbs information.
1107 * Backing DPDK device.
1109 * Verbs device parameters (name, port, switch_info) to spawn.
1111 * Device configuration parameters.
1114 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1115 * is set. The following errors are defined:
1117 * EBUSY: device is not supposed to be spawned.
1118 * EEXIST: device is already spawned
1120 static struct rte_eth_dev *
1121 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1122 struct mlx5_dev_spawn_data *spawn,
1123 struct mlx5_dev_config config)
1125 const struct mlx5_switch_info *switch_info = &spawn->info;
1126 struct mlx5_ibv_shared *sh = NULL;
1127 struct ibv_port_attr port_attr;
1128 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1129 struct rte_eth_dev *eth_dev = NULL;
1130 struct mlx5_priv *priv = NULL;
1132 unsigned int hw_padding = 0;
1134 unsigned int cqe_comp;
1135 unsigned int cqe_pad = 0;
1136 unsigned int tunnel_en = 0;
1137 unsigned int mpls_en = 0;
1138 unsigned int swp = 0;
1139 unsigned int mprq = 0;
1140 unsigned int mprq_min_stride_size_n = 0;
1141 unsigned int mprq_max_stride_size_n = 0;
1142 unsigned int mprq_min_stride_num_n = 0;
1143 unsigned int mprq_max_stride_num_n = 0;
1144 struct ether_addr mac;
1145 char name[RTE_ETH_NAME_MAX_LEN];
1146 int own_domain_id = 0;
1150 /* Determine if this port representor is supposed to be spawned. */
1151 if (switch_info->representor && dpdk_dev->devargs) {
1152 struct rte_eth_devargs eth_da;
1154 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1157 DRV_LOG(ERR, "failed to process device arguments: %s",
1158 strerror(rte_errno));
1161 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1162 if (eth_da.representor_ports[i] ==
1163 (uint16_t)switch_info->port_name)
1165 if (i == eth_da.nb_representor_ports) {
1170 /* Build device name. */
1171 if (!switch_info->representor)
1172 strlcpy(name, dpdk_dev->name, sizeof(name));
1174 snprintf(name, sizeof(name), "%s_representor_%u",
1175 dpdk_dev->name, switch_info->port_name);
1176 /* check if the device is already spawned */
1177 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1181 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1182 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1183 eth_dev = rte_eth_dev_attach_secondary(name);
1184 if (eth_dev == NULL) {
1185 DRV_LOG(ERR, "can not attach rte ethdev");
1189 eth_dev->device = dpdk_dev;
1190 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1191 /* Receive command fd from primary process */
1192 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1195 /* Remap UAR for Tx queues. */
1196 err = mlx5_tx_uar_remap(eth_dev, err);
1200 * Ethdev pointer is still required as input since
1201 * the primary device is not accessible from the
1202 * secondary process.
1204 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1205 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1208 sh = mlx5_alloc_shared_ibctx(spawn);
1211 config.devx = sh->devx;
1212 #ifdef HAVE_IBV_MLX5_MOD_SWP
1213 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1216 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1217 * as all ConnectX-5 devices.
1219 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1220 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1222 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1223 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1225 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1226 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1227 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1228 DRV_LOG(DEBUG, "enhanced MPW is supported");
1229 mps = MLX5_MPW_ENHANCED;
1231 DRV_LOG(DEBUG, "MPW is supported");
1235 DRV_LOG(DEBUG, "MPW isn't supported");
1236 mps = MLX5_MPW_DISABLED;
1238 #ifdef HAVE_IBV_MLX5_MOD_SWP
1239 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1240 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1241 DRV_LOG(DEBUG, "SWP support: %u", swp);
1244 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1245 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1246 struct mlx5dv_striding_rq_caps mprq_caps =
1247 dv_attr.striding_rq_caps;
1249 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1250 mprq_caps.min_single_stride_log_num_of_bytes);
1251 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1252 mprq_caps.max_single_stride_log_num_of_bytes);
1253 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1254 mprq_caps.min_single_wqe_log_num_of_strides);
1255 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1256 mprq_caps.max_single_wqe_log_num_of_strides);
1257 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1258 mprq_caps.supported_qpts);
1259 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1261 mprq_min_stride_size_n =
1262 mprq_caps.min_single_stride_log_num_of_bytes;
1263 mprq_max_stride_size_n =
1264 mprq_caps.max_single_stride_log_num_of_bytes;
1265 mprq_min_stride_num_n =
1266 mprq_caps.min_single_wqe_log_num_of_strides;
1267 mprq_max_stride_num_n =
1268 mprq_caps.max_single_wqe_log_num_of_strides;
1269 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1270 mprq_min_stride_num_n);
1273 if (RTE_CACHE_LINE_SIZE == 128 &&
1274 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1278 config.cqe_comp = cqe_comp;
1279 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1280 /* Whether device supports 128B Rx CQE padding. */
1281 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1282 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1284 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1285 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1286 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1287 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1288 (dv_attr.tunnel_offloads_caps &
1289 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1291 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1292 tunnel_en ? "" : "not ");
1295 "tunnel offloading disabled due to old OFED/rdma-core version");
1297 config.tunnel_en = tunnel_en;
1298 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1299 mpls_en = ((dv_attr.tunnel_offloads_caps &
1300 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1301 (dv_attr.tunnel_offloads_caps &
1302 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1303 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1304 mpls_en ? "" : "not ");
1306 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1307 " old OFED/rdma-core version or firmware configuration");
1309 config.mpls_en = mpls_en;
1310 /* Check port status. */
1311 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1313 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1316 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1317 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1321 if (port_attr.state != IBV_PORT_ACTIVE)
1322 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1323 mlx5_glue->port_state_str(port_attr.state),
1325 /* Allocate private eth device data. */
1326 priv = rte_zmalloc("ethdev private structure",
1328 RTE_CACHE_LINE_SIZE);
1330 DRV_LOG(ERR, "priv allocation failure");
1335 priv->ibv_port = spawn->ibv_port;
1336 priv->mtu = ETHER_MTU;
1338 /* Initialize UAR access locks for 32bit implementations. */
1339 rte_spinlock_init(&priv->uar_lock_cq);
1340 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1341 rte_spinlock_init(&priv->uar_lock[i]);
1343 /* Some internal functions rely on Netlink sockets, open them now. */
1344 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1345 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1347 priv->representor = !!switch_info->representor;
1348 priv->master = !!switch_info->master;
1349 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1351 * Currently we support single E-Switch per PF configurations
1352 * only and vport_id field contains the vport index for
1353 * associated VF, which is deduced from representor port name.
1354 * For exapmple, let's have the IB device port 10, it has
1355 * attached network device eth0, which has port name attribute
1356 * pf0vf2, we can deduce the VF number as 2, and set vport index
1357 * as 3 (2+1). This assigning schema should be changed if the
1358 * multiple E-Switch instances per PF configurations or/and PCI
1359 * subfunctions are added.
1361 priv->vport_id = switch_info->representor ?
1362 switch_info->port_name + 1 : -1;
1363 /* representor_id field keeps the unmodified port/VF index. */
1364 priv->representor_id = switch_info->representor ?
1365 switch_info->port_name : -1;
1367 * Look for sibling devices in order to reuse their switch domain
1368 * if any, otherwise allocate one.
1370 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1371 const struct mlx5_priv *opriv =
1372 rte_eth_devices[port_id].data->dev_private;
1376 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1378 priv->domain_id = opriv->domain_id;
1381 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1382 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1385 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1386 strerror(rte_errno));
1391 err = mlx5_args(&config, dpdk_dev->devargs);
1394 DRV_LOG(ERR, "failed to process device arguments: %s",
1395 strerror(rte_errno));
1398 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1399 IBV_DEVICE_RAW_IP_CSUM);
1400 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1401 (config.hw_csum ? "" : "not "));
1402 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1403 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1404 DRV_LOG(DEBUG, "counters are not supported");
1406 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1407 if (config.dv_flow_en) {
1408 DRV_LOG(WARNING, "DV flow is not supported");
1409 config.dv_flow_en = 0;
1412 config.ind_table_max_size =
1413 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1415 * Remove this check once DPDK supports larger/variable
1416 * indirection tables.
1418 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1419 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1420 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1421 config.ind_table_max_size);
1422 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1423 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1424 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1425 (config.hw_vlan_strip ? "" : "not "));
1426 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1427 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1428 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1429 (config.hw_fcs_strip ? "" : "not "));
1430 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1431 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1432 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1433 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1434 IBV_DEVICE_PCI_WRITE_END_PADDING);
1436 if (config.hw_padding && !hw_padding) {
1437 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1438 config.hw_padding = 0;
1439 } else if (config.hw_padding) {
1440 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1442 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1443 (sh->device_attr.tso_caps.supported_qpts &
1444 (1 << IBV_QPT_RAW_PACKET)));
1446 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1448 * MPW is disabled by default, while the Enhanced MPW is enabled
1451 if (config.mps == MLX5_ARG_UNSET)
1452 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1455 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1456 DRV_LOG(INFO, "%sMPS is %s",
1457 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1458 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1459 if (config.cqe_comp && !cqe_comp) {
1460 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1461 config.cqe_comp = 0;
1463 if (config.cqe_pad && !cqe_pad) {
1464 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1466 } else if (config.cqe_pad) {
1467 DRV_LOG(INFO, "Rx CQE padding is enabled");
1469 if (config.mprq.enabled && mprq) {
1470 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1471 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1472 config.mprq.stride_num_n =
1473 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1474 mprq_min_stride_num_n);
1476 "the number of strides"
1477 " for Multi-Packet RQ is out of range,"
1478 " setting default value (%u)",
1479 1 << config.mprq.stride_num_n);
1481 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1482 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1483 } else if (config.mprq.enabled && !mprq) {
1484 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1485 config.mprq.enabled = 0;
1487 eth_dev = rte_eth_dev_allocate(name);
1488 if (eth_dev == NULL) {
1489 DRV_LOG(ERR, "can not allocate rte ethdev");
1493 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1494 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1495 if (priv->representor) {
1496 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1497 eth_dev->data->representor_id = priv->representor_id;
1499 eth_dev->data->dev_private = priv;
1500 priv->dev_data = eth_dev->data;
1501 eth_dev->data->mac_addrs = priv->mac;
1502 eth_dev->device = dpdk_dev;
1503 /* Configure the first MAC address by default. */
1504 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1506 "port %u cannot get MAC address, is mlx5_en"
1507 " loaded? (errno: %s)",
1508 eth_dev->data->port_id, strerror(rte_errno));
1513 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1514 eth_dev->data->port_id,
1515 mac.addr_bytes[0], mac.addr_bytes[1],
1516 mac.addr_bytes[2], mac.addr_bytes[3],
1517 mac.addr_bytes[4], mac.addr_bytes[5]);
1520 char ifname[IF_NAMESIZE];
1522 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1523 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1524 eth_dev->data->port_id, ifname);
1526 DRV_LOG(DEBUG, "port %u ifname is unknown",
1527 eth_dev->data->port_id);
1530 /* Get actual MTU if possible. */
1531 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1536 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1538 /* Initialize burst functions to prevent crashes before link-up. */
1539 eth_dev->rx_pkt_burst = removed_rx_burst;
1540 eth_dev->tx_pkt_burst = removed_tx_burst;
1541 eth_dev->dev_ops = &mlx5_dev_ops;
1542 /* Register MAC address. */
1543 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1544 if (config.vf && config.vf_nl_en)
1545 mlx5_nl_mac_addr_sync(eth_dev);
1546 priv->tcf_context = mlx5_flow_tcf_context_create();
1547 if (!priv->tcf_context) {
1550 "flow rules relying on switch offloads will not be"
1551 " supported: cannot open libmnl socket: %s",
1552 strerror(rte_errno));
1554 struct rte_flow_error error;
1555 unsigned int ifindex = mlx5_ifindex(eth_dev);
1560 "cannot retrieve network interface index";
1562 err = mlx5_flow_tcf_init(priv->tcf_context,
1567 "flow rules relying on switch offloads will"
1568 " not be supported: %s: %s",
1569 error.message, strerror(rte_errno));
1570 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1571 priv->tcf_context = NULL;
1574 if (config.dv_flow_en) {
1575 err = mlx5_alloc_shared_dr(priv);
1579 TAILQ_INIT(&priv->flows);
1580 TAILQ_INIT(&priv->ctrl_flows);
1581 /* Hint libmlx5 to use PMD allocator for data plane resources */
1582 struct mlx5dv_ctx_allocators alctr = {
1583 .alloc = &mlx5_alloc_verbs_buf,
1584 .free = &mlx5_free_verbs_buf,
1587 mlx5_glue->dv_set_context_attr(sh->ctx,
1588 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1589 (void *)((uintptr_t)&alctr));
1590 /* Bring Ethernet device up. */
1591 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1592 eth_dev->data->port_id);
1593 mlx5_set_link_up(eth_dev);
1595 * Even though the interrupt handler is not installed yet,
1596 * interrupts will still trigger on the asyn_fd from
1597 * Verbs context returned by ibv_open_device().
1599 mlx5_link_update(eth_dev, 0);
1600 /* Store device configuration on private structure. */
1601 priv->config = config;
1602 /* Supported Verbs flow priority number detection. */
1603 err = mlx5_flow_discover_priorities(eth_dev);
1608 priv->config.flow_prio = err;
1610 * Once the device is added to the list of memory event
1611 * callback, its global MR cache table cannot be expanded
1612 * on the fly because of deadlock. If it overflows, lookup
1613 * should be done by searching MR list linearly, which is slow.
1615 err = mlx5_mr_btree_init(&priv->mr.cache,
1616 MLX5_MR_BTREE_CACHE_N * 2,
1617 eth_dev->device->numa_node);
1622 /* Add device to memory callback list. */
1623 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1624 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1625 priv, mem_event_cb);
1626 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1631 mlx5_free_shared_dr(priv);
1632 if (priv->nl_socket_route >= 0)
1633 close(priv->nl_socket_route);
1634 if (priv->nl_socket_rdma >= 0)
1635 close(priv->nl_socket_rdma);
1636 if (priv->tcf_context)
1637 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1639 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1641 if (eth_dev != NULL)
1642 eth_dev->data->dev_private = NULL;
1644 if (eth_dev != NULL) {
1645 /* mac_addrs must not be freed alone because part of dev_private */
1646 eth_dev->data->mac_addrs = NULL;
1647 rte_eth_dev_release_port(eth_dev);
1650 mlx5_free_shared_ibctx(sh);
1657 * Comparison callback to sort device data.
1659 * This is meant to be used with qsort().
1662 * Pointer to pointer to first data object.
1664 * Pointer to pointer to second data object.
1667 * 0 if both objects are equal, less than 0 if the first argument is less
1668 * than the second, greater than 0 otherwise.
1671 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1673 const struct mlx5_switch_info *si_a =
1674 &((const struct mlx5_dev_spawn_data *)a)->info;
1675 const struct mlx5_switch_info *si_b =
1676 &((const struct mlx5_dev_spawn_data *)b)->info;
1679 /* Master device first. */
1680 ret = si_b->master - si_a->master;
1683 /* Then representor devices. */
1684 ret = si_b->representor - si_a->representor;
1687 /* Unidentified devices come last in no specific order. */
1688 if (!si_a->representor)
1690 /* Order representors by name. */
1691 return si_a->port_name - si_b->port_name;
1695 * DPDK callback to register a PCI device.
1697 * This function spawns Ethernet devices out of a given PCI device.
1699 * @param[in] pci_drv
1700 * PCI driver structure (mlx5_driver).
1701 * @param[in] pci_dev
1702 * PCI device information.
1705 * 0 on success, a negative errno value otherwise and rte_errno is set.
1708 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1709 struct rte_pci_device *pci_dev)
1711 struct ibv_device **ibv_list;
1713 * Number of found IB Devices matching with requested PCI BDF.
1714 * nd != 1 means there are multiple IB devices over the same
1715 * PCI device and we have representors and master.
1717 unsigned int nd = 0;
1719 * Number of found IB device Ports. nd = 1 and np = 1..n means
1720 * we have the single multiport IB device, and there may be
1721 * representors attached to some of found ports.
1723 unsigned int np = 0;
1725 * Number of DPDK ethernet devices to Spawn - either over
1726 * multiple IB devices or multiple ports of single IB device.
1727 * Actually this is the number of iterations to spawn.
1729 unsigned int ns = 0;
1730 struct mlx5_dev_config dev_config;
1733 ret = mlx5_init_once();
1735 DRV_LOG(ERR, "unable to init PMD global data: %s",
1736 strerror(rte_errno));
1739 assert(pci_drv == &mlx5_driver);
1741 ibv_list = mlx5_glue->get_device_list(&ret);
1743 rte_errno = errno ? errno : ENOSYS;
1744 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1748 * First scan the list of all Infiniband devices to find
1749 * matching ones, gathering into the list.
1751 struct ibv_device *ibv_match[ret + 1];
1757 struct rte_pci_addr pci_addr;
1759 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1760 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1762 if (pci_dev->addr.domain != pci_addr.domain ||
1763 pci_dev->addr.bus != pci_addr.bus ||
1764 pci_dev->addr.devid != pci_addr.devid ||
1765 pci_dev->addr.function != pci_addr.function)
1767 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1768 ibv_list[ret]->name);
1769 ibv_match[nd++] = ibv_list[ret];
1771 ibv_match[nd] = NULL;
1773 /* No device macthes, just complain and bail out. */
1774 mlx5_glue->free_device_list(ibv_list);
1776 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1777 " are kernel drivers loaded?",
1778 pci_dev->addr.domain, pci_dev->addr.bus,
1779 pci_dev->addr.devid, pci_dev->addr.function);
1784 nl_route = mlx5_nl_init(NETLINK_ROUTE);
1785 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1788 * Found single matching device may have multiple ports.
1789 * Each port may be representor, we have to check the port
1790 * number and check the representors existence.
1793 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1795 DRV_LOG(WARNING, "can not get IB device \"%s\""
1796 " ports number", ibv_match[0]->name);
1799 * Now we can determine the maximal
1800 * amount of devices to be spawned.
1802 struct mlx5_dev_spawn_data list[np ? np : nd];
1806 * Signle IB device with multiple ports found,
1807 * it may be E-Switch master device and representors.
1808 * We have to perform identification trough the ports.
1810 assert(nl_rdma >= 0);
1813 for (i = 1; i <= np; ++i) {
1814 list[ns].max_port = np;
1815 list[ns].ibv_port = i;
1816 list[ns].ibv_dev = ibv_match[0];
1817 list[ns].eth_dev = NULL;
1818 list[ns].ifindex = mlx5_nl_ifindex
1819 (nl_rdma, list[ns].ibv_dev->name, i);
1820 if (!list[ns].ifindex) {
1822 * No network interface index found for the
1823 * specified port, it means there is no
1824 * representor on this port. It's OK,
1825 * there can be disabled ports, for example
1826 * if sriov_numvfs < sriov_totalvfs.
1832 ret = mlx5_nl_switch_info
1836 if (ret || (!list[ns].info.representor &&
1837 !list[ns].info.master)) {
1839 * We failed to recognize representors with
1840 * Netlink, let's try to perform the task
1843 ret = mlx5_sysfs_switch_info
1847 if (!ret && (list[ns].info.representor ^
1848 list[ns].info.master))
1853 "unable to recognize master/representors"
1854 " on the IB device with multiple ports");
1861 * The existence of several matching entries (nd > 1) means
1862 * port representors have been instantiated. No existing Verbs
1863 * call nor sysfs entries can tell them apart, this can only
1864 * be done through Netlink calls assuming kernel drivers are
1865 * recent enough to support them.
1867 * In the event of identification failure through Netlink,
1868 * try again through sysfs, then:
1870 * 1. A single IB device matches (nd == 1) with single
1871 * port (np=0/1) and is not a representor, assume
1872 * no switch support.
1874 * 2. Otherwise no safe assumptions can be made;
1875 * complain louder and bail out.
1878 for (i = 0; i != nd; ++i) {
1879 memset(&list[ns].info, 0, sizeof(list[ns].info));
1880 list[ns].max_port = 1;
1881 list[ns].ibv_port = 1;
1882 list[ns].ibv_dev = ibv_match[i];
1883 list[ns].eth_dev = NULL;
1884 list[ns].ifindex = 0;
1886 list[ns].ifindex = mlx5_nl_ifindex
1887 (nl_rdma, list[ns].ibv_dev->name, 1);
1888 if (!list[ns].ifindex) {
1890 * No network interface index found for the
1891 * specified device, it means there it is not
1892 * a representor/master.
1898 ret = mlx5_nl_switch_info
1902 if (ret || (!list[ns].info.representor &&
1903 !list[ns].info.master)) {
1905 * We failed to recognize representors with
1906 * Netlink, let's try to perform the task
1909 ret = mlx5_sysfs_switch_info
1913 if (!ret && (list[ns].info.representor ^
1914 list[ns].info.master)) {
1916 } else if ((nd == 1) &&
1917 !list[ns].info.representor &&
1918 !list[ns].info.master) {
1920 * Single IB device with
1921 * one physical port and
1922 * attached network device.
1923 * May be SRIOV is not enabled
1924 * or there is no representors.
1926 DRV_LOG(INFO, "no E-Switch support detected");
1933 "unable to recognize master/representors"
1934 " on the multiple IB devices");
1942 * Sort list to probe devices in natural order for users convenience
1943 * (i.e. master first, then representors from lowest to highest ID).
1945 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1946 /* Default configuration. */
1947 dev_config = (struct mlx5_dev_config){
1949 .mps = MLX5_ARG_UNSET,
1952 .txq_inline = MLX5_ARG_UNSET,
1953 .txqs_inline = MLX5_ARG_UNSET,
1954 .txqs_vec = MLX5_ARG_UNSET,
1955 .inline_max_packet_sz = MLX5_ARG_UNSET,
1957 .mr_ext_memseg_en = 1,
1959 .enabled = 0, /* Disabled by default. */
1960 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1961 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1962 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1965 /* Device specific configuration. */
1966 switch (pci_dev->id.device_id) {
1967 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1968 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1970 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1971 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1972 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1973 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1979 /* Set architecture-dependent default value if unset. */
1980 if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1981 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1982 for (i = 0; i != ns; ++i) {
1985 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1988 if (!list[i].eth_dev) {
1989 if (rte_errno != EBUSY && rte_errno != EEXIST)
1991 /* Device is disabled or already spawned. Ignore it. */
1994 restore = list[i].eth_dev->data->dev_flags;
1995 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1996 /* Restore non-PCI flags cleared by the above call. */
1997 list[i].eth_dev->data->dev_flags |= restore;
1998 rte_eth_dev_probing_finish(list[i].eth_dev);
2002 "probe of PCI device " PCI_PRI_FMT " aborted after"
2003 " encountering an error: %s",
2004 pci_dev->addr.domain, pci_dev->addr.bus,
2005 pci_dev->addr.devid, pci_dev->addr.function,
2006 strerror(rte_errno));
2010 if (!list[i].eth_dev)
2012 mlx5_dev_close(list[i].eth_dev);
2013 /* mac_addrs must not be freed because in dev_private */
2014 list[i].eth_dev->data->mac_addrs = NULL;
2015 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2017 /* Restore original error. */
2024 * Do the routine cleanup:
2025 * - close opened Netlink sockets
2026 * - free the Infiniband device list
2033 mlx5_glue->free_device_list(ibv_list);
2038 * DPDK callback to remove a PCI device.
2040 * This function removes all Ethernet devices belong to a given PCI device.
2042 * @param[in] pci_dev
2043 * Pointer to the PCI device.
2046 * 0 on success, the function cannot fail.
2049 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2052 struct rte_eth_dev *port;
2054 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
2055 port = &rte_eth_devices[port_id];
2056 if (port->state != RTE_ETH_DEV_UNUSED &&
2057 port->device == &pci_dev->device)
2058 rte_eth_dev_close(port_id);
2063 static const struct rte_pci_id mlx5_pci_id_map[] = {
2065 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2066 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2069 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2070 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2073 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2074 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2077 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2078 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2081 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2082 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2085 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2086 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2089 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2090 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2093 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2094 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2097 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2098 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2101 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2102 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2105 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2106 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2109 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2110 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2117 static struct rte_pci_driver mlx5_driver = {
2119 .name = MLX5_DRIVER_NAME
2121 .id_table = mlx5_pci_id_map,
2122 .probe = mlx5_pci_probe,
2123 .remove = mlx5_pci_remove,
2124 .dma_map = mlx5_dma_map,
2125 .dma_unmap = mlx5_dma_unmap,
2126 .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2127 RTE_PCI_DRV_PROBE_AGAIN),
2130 #ifdef RTE_IBVERBS_LINK_DLOPEN
2133 * Suffix RTE_EAL_PMD_PATH with "-glue".
2135 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2136 * suffixing its last component.
2139 * Output buffer, should be large enough otherwise NULL is returned.
2144 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2147 mlx5_glue_path(char *buf, size_t size)
2149 static const char *const bad[] = { "/", ".", "..", NULL };
2150 const char *path = RTE_EAL_PMD_PATH;
2151 size_t len = strlen(path);
2155 while (len && path[len - 1] == '/')
2157 for (off = len; off && path[off - 1] != '/'; --off)
2159 for (i = 0; bad[i]; ++i)
2160 if (!strncmp(path + off, bad[i], (int)(len - off)))
2162 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2163 if (i == -1 || (size_t)i >= size)
2168 "unable to append \"-glue\" to last component of"
2169 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2170 " please re-configure DPDK");
2175 * Initialization routine for run-time dependency on rdma-core.
2178 mlx5_glue_init(void)
2180 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2181 const char *path[] = {
2183 * A basic security check is necessary before trusting
2184 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2186 (geteuid() == getuid() && getegid() == getgid() ?
2187 getenv("MLX5_GLUE_PATH") : NULL),
2189 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2190 * variant, otherwise let dlopen() look up libraries on its
2193 (*RTE_EAL_PMD_PATH ?
2194 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2197 void *handle = NULL;
2201 while (!handle && i != RTE_DIM(path)) {
2210 end = strpbrk(path[i], ":;");
2212 end = path[i] + strlen(path[i]);
2213 len = end - path[i];
2218 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2220 (!len || *(end - 1) == '/') ? "" : "/");
2223 if (sizeof(name) != (size_t)ret + 1)
2225 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2227 handle = dlopen(name, RTLD_LAZY);
2238 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2241 sym = dlsym(handle, "mlx5_glue");
2242 if (!sym || !*sym) {
2246 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2255 "cannot initialize PMD due to missing run-time dependency on"
2256 " rdma-core libraries (libibverbs, libmlx5)");
2263 * Driver initialization routine.
2265 RTE_INIT(rte_mlx5_pmd_init)
2267 /* Initialize driver log type. */
2268 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2269 if (mlx5_logtype >= 0)
2270 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2272 /* Build the static tables for Verbs conversion. */
2273 mlx5_set_ptype_table();
2274 mlx5_set_cksum_table();
2275 mlx5_set_swp_types_table();
2277 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2278 * huge pages. Calling ibv_fork_init() during init allows
2279 * applications to use fork() safely for purposes other than
2280 * using this PMD, which is not supported in forked processes.
2282 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2283 /* Match the size of Rx completion entry to the size of a cacheline. */
2284 if (RTE_CACHE_LINE_SIZE == 128)
2285 setenv("MLX5_CQE_SIZE", "128", 0);
2287 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2288 * cleanup all the Verbs resources even when the device was removed.
2290 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2291 #ifdef RTE_IBVERBS_LINK_DLOPEN
2292 if (mlx5_glue_init())
2297 /* Glue structure must not contain any NULL pointers. */
2301 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2302 assert(((const void *const *)mlx5_glue)[i]);
2305 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2307 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2308 mlx5_glue->version, MLX5_GLUE_VERSION);
2311 mlx5_glue->fork_init();
2312 rte_pci_register(&mlx5_driver);
2315 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2316 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2317 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");