1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to include 2 dsegs in the title WQEBB.
100 * Deprecated, ignored.
102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
105 * Device parameter to limit the size of inlining packet.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
111 * Device parameter to enable hardware Tx vector.
112 * Deprecated, ignored (no vectorized Tx routines anymore).
114 #define MLX5_TX_VEC_EN "tx_vec_en"
116 /* Device parameter to enable hardware Rx vector. */
117 #define MLX5_RX_VEC_EN "rx_vec_en"
119 /* Allow L3 VXLAN flow creation. */
120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
122 /* Activate DV E-Switch flow steering. */
123 #define MLX5_DV_ESW_EN "dv_esw_en"
125 /* Activate DV flow steering. */
126 #define MLX5_DV_FLOW_EN "dv_flow_en"
128 /* Activate Netlink support in VF mode. */
129 #define MLX5_VF_NL_EN "vf_nl_en"
131 /* Enable extending memsegs when creating a MR. */
132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
134 /* Select port representors to instantiate. */
135 #define MLX5_REPRESENTOR "representor"
137 /* Device parameter to configure the maximum number of dump files per queue. */
138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
140 /* Configure timeout of LRO session (in microseconds). */
141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
143 #ifndef HAVE_IBV_MLX5_MOD_MPW
144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
154 /* Shared memory between primary and secondary processes. */
155 struct mlx5_shared_data *mlx5_shared_data;
157 /* Spinlock for mlx5_shared_data allocation. */
158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
160 /* Process local data for secondary processes. */
161 static struct mlx5_local_data mlx5_local_data;
163 /** Driver-specific log messages type. */
166 /** Data associated with devices to spawn. */
167 struct mlx5_dev_spawn_data {
168 uint32_t ifindex; /**< Network interface index. */
169 uint32_t max_port; /**< IB device maximal port index. */
170 uint32_t ibv_port; /**< IB device physical port index. */
171 int pf_bond; /**< bonding device PF index. < 0 - no bonding */
172 struct mlx5_switch_info info; /**< Switch information. */
173 struct ibv_device *ibv_dev; /**< Associated IB device. */
174 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
175 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
181 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
182 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
185 * Allocate ID pool structure.
188 * Pointer to pool object, NULL value otherwise.
190 struct mlx5_flow_id_pool *
191 mlx5_flow_id_pool_alloc(void)
193 struct mlx5_flow_id_pool *pool;
196 pool = rte_zmalloc("id pool allocation", sizeof(*pool),
197 RTE_CACHE_LINE_SIZE);
199 DRV_LOG(ERR, "can't allocate id pool");
203 mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
204 RTE_CACHE_LINE_SIZE);
206 DRV_LOG(ERR, "can't allocate mem for id pool");
210 pool->free_arr = mem;
211 pool->curr = pool->free_arr;
212 pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
213 pool->base_index = 0;
221 * Release ID pool structure.
224 * Pointer to flow id pool object to free.
227 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
229 rte_free(pool->free_arr);
237 * Pointer to flow id pool.
242 * 0 on success, error value otherwise.
245 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
247 if (pool->curr == pool->free_arr) {
248 if (pool->base_index == UINT32_MAX) {
250 DRV_LOG(ERR, "no free id");
253 *id = ++pool->base_index;
256 *id = *(--pool->curr);
264 * Pointer to flow id pool.
269 * 0 on success, error value otherwise.
272 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
278 if (pool->curr == pool->last) {
279 size = pool->curr - pool->free_arr;
280 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
281 assert(size2 > size);
282 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
284 DRV_LOG(ERR, "can't allocate mem for id pool");
288 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
289 rte_free(pool->free_arr);
290 pool->free_arr = mem;
291 pool->curr = pool->free_arr + size;
292 pool->last = pool->free_arr + size2;
300 * Initialize the counters management structure.
303 * Pointer to mlx5_ibv_shared object to free
306 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
310 TAILQ_INIT(&sh->cmng.flow_counters);
311 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
312 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
316 * Destroy all the resources allocated for a counter memory management.
319 * Pointer to the memory management structure.
322 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
324 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
326 LIST_REMOVE(mng, next);
327 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
328 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
333 * Close and release all the resources of the counters management.
336 * Pointer to mlx5_ibv_shared object to free.
339 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
341 struct mlx5_counter_stats_mem_mng *mng;
348 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
349 if (rte_errno != EINPROGRESS)
353 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
354 struct mlx5_flow_counter_pool *pool;
355 uint32_t batch = !!(i % 2);
357 if (!sh->cmng.ccont[i].pools)
359 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
364 (mlx5_devx_cmd_destroy(pool->min_dcs));
366 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
367 if (pool->counters_raw[j].action)
369 (mlx5_glue->destroy_flow_action
370 (pool->counters_raw[j].action));
371 if (!batch && pool->counters_raw[j].dcs)
372 claim_zero(mlx5_devx_cmd_destroy
373 (pool->counters_raw[j].dcs));
375 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
378 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
380 rte_free(sh->cmng.ccont[i].pools);
382 mng = LIST_FIRST(&sh->cmng.mem_mngs);
384 mlx5_flow_destroy_counter_stat_mem_mng(mng);
385 mng = LIST_FIRST(&sh->cmng.mem_mngs);
387 memset(&sh->cmng, 0, sizeof(sh->cmng));
391 * Extract pdn of PD object using DV API.
394 * Pointer to the verbs PD object.
396 * Pointer to the PD object number variable.
399 * 0 on success, error value otherwise.
401 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
403 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
405 struct mlx5dv_obj obj;
406 struct mlx5dv_pd pd_info;
410 obj.pd.out = &pd_info;
411 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
413 DRV_LOG(DEBUG, "Fail to get PD object info");
419 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
422 * Allocate shared IB device context. If there is multiport device the
423 * master and representors will share this context, if there is single
424 * port dedicated IB device, the context will be used by only given
425 * port due to unification.
427 * Routine first searches the context for the specified IB device name,
428 * if found the shared context assumed and reference counter is incremented.
429 * If no context found the new one is created and initialized with specified
430 * IB device context and parameters.
433 * Pointer to the IB device attributes (name, port, etc).
436 * Pointer to mlx5_ibv_shared object on success,
437 * otherwise NULL and rte_errno is set.
439 static struct mlx5_ibv_shared *
440 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
442 struct mlx5_ibv_shared *sh;
445 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
446 struct mlx5_devx_tis_attr tis_attr = { 0 };
450 /* Secondary process should not create the shared context. */
451 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
452 pthread_mutex_lock(&mlx5_ibv_list_mutex);
453 /* Search for IB context by device name. */
454 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
455 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
460 /* No device found, we have to create new shared context. */
461 assert(spawn->max_port);
462 sh = rte_zmalloc("ethdev shared ib context",
463 sizeof(struct mlx5_ibv_shared) +
465 sizeof(struct mlx5_ibv_shared_port),
466 RTE_CACHE_LINE_SIZE);
468 DRV_LOG(ERR, "shared context allocation failure");
472 /* Try to open IB device with DV first, then usual Verbs. */
474 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
477 DRV_LOG(DEBUG, "DevX is supported");
479 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
481 err = errno ? errno : ENODEV;
484 DRV_LOG(DEBUG, "DevX is NOT supported");
486 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
488 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
492 sh->max_port = spawn->max_port;
493 strncpy(sh->ibdev_name, sh->ctx->device->name,
494 sizeof(sh->ibdev_name));
495 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
496 sizeof(sh->ibdev_path));
497 pthread_mutex_init(&sh->intr_mutex, NULL);
499 * Setting port_id to max unallowed value means
500 * there is no interrupt subhandler installed for
501 * the given port index i.
503 for (i = 0; i < sh->max_port; i++) {
504 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
505 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
507 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
508 if (sh->pd == NULL) {
509 DRV_LOG(ERR, "PD allocation failure");
513 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
515 err = mlx5_get_pdn(sh->pd, &sh->pdn);
517 DRV_LOG(ERR, "Fail to extract pdn from PD");
520 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
522 DRV_LOG(ERR, "TD allocation failure");
526 tis_attr.transport_domain = sh->td->id;
527 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
529 DRV_LOG(ERR, "TIS allocation failure");
534 sh->flow_id_pool = mlx5_flow_id_pool_alloc();
535 if (!sh->flow_id_pool) {
536 DRV_LOG(ERR, "can't create flow id pool");
540 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
542 * Once the device is added to the list of memory event
543 * callback, its global MR cache table cannot be expanded
544 * on the fly because of deadlock. If it overflows, lookup
545 * should be done by searching MR list linearly, which is slow.
547 * At this point the device is not added to the memory
548 * event list yet, context is just being created.
550 err = mlx5_mr_btree_init(&sh->mr.cache,
551 MLX5_MR_BTREE_CACHE_N * 2,
552 spawn->pci_dev->device.numa_node);
557 mlx5_flow_counters_mng_init(sh);
558 /* Add device to memory callback list. */
559 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
560 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
562 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
563 /* Add context to the global device list. */
564 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
566 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
569 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
572 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
574 claim_zero(mlx5_devx_cmd_destroy(sh->td));
576 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
578 claim_zero(mlx5_glue->close_device(sh->ctx));
579 if (sh->flow_id_pool)
580 mlx5_flow_id_pool_release(sh->flow_id_pool);
588 * Free shared IB device context. Decrement counter and if zero free
589 * all allocated resources and close handles.
592 * Pointer to mlx5_ibv_shared object to free
595 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
597 pthread_mutex_lock(&mlx5_ibv_list_mutex);
599 /* Check the object presence in the list. */
600 struct mlx5_ibv_shared *lctx;
602 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
607 DRV_LOG(ERR, "Freeing non-existing shared IB context");
613 /* Secondary process should not free the shared context. */
614 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
617 /* Release created Memory Regions. */
619 /* Remove from memory callback device list. */
620 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
621 LIST_REMOVE(sh, mem_event_cb);
622 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
623 /* Remove context from the global device list. */
624 LIST_REMOVE(sh, next);
626 * Ensure there is no async event handler installed.
627 * Only primary process handles async device events.
629 mlx5_flow_counters_mng_close(sh);
630 assert(!sh->intr_cnt);
632 mlx5_intr_callback_unregister
633 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
634 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
635 if (sh->devx_intr_cnt) {
636 if (sh->intr_handle_devx.fd)
637 rte_intr_callback_unregister(&sh->intr_handle_devx,
638 mlx5_dev_interrupt_handler_devx, sh);
640 mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
643 pthread_mutex_destroy(&sh->intr_mutex);
645 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
647 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
649 claim_zero(mlx5_devx_cmd_destroy(sh->td));
651 claim_zero(mlx5_glue->close_device(sh->ctx));
652 if (sh->flow_id_pool)
653 mlx5_flow_id_pool_release(sh->flow_id_pool);
656 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
660 * Initialize DR related data within private structure.
661 * Routine checks the reference counter and does actual
662 * resources creation/initialization only if counter is zero.
665 * Pointer to the private device data structure.
668 * Zero on success, positive error code otherwise.
671 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
673 #ifdef HAVE_MLX5DV_DR
674 struct mlx5_ibv_shared *sh = priv->sh;
680 /* Shared DV/DR structures is already initialized. */
685 /* Reference counter is zero, we should initialize structures. */
686 domain = mlx5_glue->dr_create_domain(sh->ctx,
687 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
689 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
693 sh->rx_domain = domain;
694 domain = mlx5_glue->dr_create_domain(sh->ctx,
695 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
697 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
701 pthread_mutex_init(&sh->dv_mutex, NULL);
702 sh->tx_domain = domain;
703 #ifdef HAVE_MLX5DV_DR_ESWITCH
704 if (priv->config.dv_esw_en) {
705 domain = mlx5_glue->dr_create_domain
706 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
708 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
712 sh->fdb_domain = domain;
713 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
716 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
722 /* Rollback the created objects. */
724 mlx5_glue->dr_destroy_domain(sh->rx_domain);
725 sh->rx_domain = NULL;
728 mlx5_glue->dr_destroy_domain(sh->tx_domain);
729 sh->tx_domain = NULL;
731 if (sh->fdb_domain) {
732 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
733 sh->fdb_domain = NULL;
735 if (sh->esw_drop_action) {
736 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
737 sh->esw_drop_action = NULL;
739 if (sh->pop_vlan_action) {
740 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
741 sh->pop_vlan_action = NULL;
751 * Destroy DR related data within private structure.
754 * Pointer to the private device data structure.
757 mlx5_free_shared_dr(struct mlx5_priv *priv)
759 #ifdef HAVE_MLX5DV_DR
760 struct mlx5_ibv_shared *sh;
762 if (!priv->dr_shared)
767 assert(sh->dv_refcnt);
768 if (sh->dv_refcnt && --sh->dv_refcnt)
771 mlx5_glue->dr_destroy_domain(sh->rx_domain);
772 sh->rx_domain = NULL;
775 mlx5_glue->dr_destroy_domain(sh->tx_domain);
776 sh->tx_domain = NULL;
778 #ifdef HAVE_MLX5DV_DR_ESWITCH
779 if (sh->fdb_domain) {
780 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
781 sh->fdb_domain = NULL;
783 if (sh->esw_drop_action) {
784 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
785 sh->esw_drop_action = NULL;
788 if (sh->pop_vlan_action) {
789 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
790 sh->pop_vlan_action = NULL;
792 pthread_mutex_destroy(&sh->dv_mutex);
799 * Initialize shared data between primary and secondary process.
801 * A memzone is reserved by primary process and secondary processes attach to
805 * 0 on success, a negative errno value otherwise and rte_errno is set.
808 mlx5_init_shared_data(void)
810 const struct rte_memzone *mz;
813 rte_spinlock_lock(&mlx5_shared_data_lock);
814 if (mlx5_shared_data == NULL) {
815 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
816 /* Allocate shared memory. */
817 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
818 sizeof(*mlx5_shared_data),
822 "Cannot allocate mlx5 shared data");
826 mlx5_shared_data = mz->addr;
827 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
828 rte_spinlock_init(&mlx5_shared_data->lock);
830 /* Lookup allocated shared memory. */
831 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
834 "Cannot attach mlx5 shared data");
838 mlx5_shared_data = mz->addr;
839 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
843 rte_spinlock_unlock(&mlx5_shared_data_lock);
848 * Retrieve integer value from environment variable.
851 * Environment variable name.
854 * Integer value, 0 if the variable is not set.
857 mlx5_getenv_int(const char *name)
859 const char *val = getenv(name);
867 * Verbs callback to allocate a memory. This function should allocate the space
868 * according to the size provided residing inside a huge page.
869 * Please note that all allocation must respect the alignment from libmlx5
870 * (i.e. currently sysconf(_SC_PAGESIZE)).
873 * The size in bytes of the memory to allocate.
875 * A pointer to the callback data.
878 * Allocated buffer, NULL otherwise and rte_errno is set.
881 mlx5_alloc_verbs_buf(size_t size, void *data)
883 struct mlx5_priv *priv = data;
885 size_t alignment = sysconf(_SC_PAGESIZE);
886 unsigned int socket = SOCKET_ID_ANY;
888 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
889 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
891 socket = ctrl->socket;
892 } else if (priv->verbs_alloc_ctx.type ==
893 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
894 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
896 socket = ctrl->socket;
898 assert(data != NULL);
899 ret = rte_malloc_socket(__func__, size, alignment, socket);
906 * Verbs callback to free a memory.
909 * A pointer to the memory to free.
911 * A pointer to the callback data.
914 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
916 assert(data != NULL);
921 * DPDK callback to add udp tunnel port
924 * A pointer to eth_dev
925 * @param[in] udp_tunnel
926 * A pointer to udp tunnel
929 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
932 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
933 struct rte_eth_udp_tunnel *udp_tunnel)
935 assert(udp_tunnel != NULL);
936 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
937 udp_tunnel->udp_port == 4789)
939 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
940 udp_tunnel->udp_port == 4790)
946 * Initialize process private data structure.
949 * Pointer to Ethernet device structure.
952 * 0 on success, a negative errno value otherwise and rte_errno is set.
955 mlx5_proc_priv_init(struct rte_eth_dev *dev)
957 struct mlx5_priv *priv = dev->data->dev_private;
958 struct mlx5_proc_priv *ppriv;
962 * UAR register table follows the process private structure. BlueFlame
963 * registers for Tx queues are stored in the table.
966 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
967 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
968 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
973 ppriv->uar_table_sz = ppriv_size;
974 dev->process_private = ppriv;
979 * Un-initialize process private data structure.
982 * Pointer to Ethernet device structure.
985 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
987 if (!dev->process_private)
989 rte_free(dev->process_private);
990 dev->process_private = NULL;
994 * DPDK callback to close the device.
996 * Destroy all queues and objects, free memory.
999 * Pointer to Ethernet device structure.
1002 mlx5_dev_close(struct rte_eth_dev *dev)
1004 struct mlx5_priv *priv = dev->data->dev_private;
1008 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1010 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1011 /* In case mlx5_dev_stop() has not been called. */
1012 mlx5_dev_interrupt_handler_uninstall(dev);
1013 mlx5_dev_interrupt_handler_devx_uninstall(dev);
1014 mlx5_traffic_disable(dev);
1015 mlx5_flow_flush(dev, NULL);
1016 /* Prevent crashes when queues are still in use. */
1017 dev->rx_pkt_burst = removed_rx_burst;
1018 dev->tx_pkt_burst = removed_tx_burst;
1020 /* Disable datapath on secondary process. */
1021 mlx5_mp_req_stop_rxtx(dev);
1022 if (priv->rxqs != NULL) {
1023 /* XXX race condition if mlx5_rx_burst() is still running. */
1025 for (i = 0; (i != priv->rxqs_n); ++i)
1026 mlx5_rxq_release(dev, i);
1030 if (priv->txqs != NULL) {
1031 /* XXX race condition if mlx5_tx_burst() is still running. */
1033 for (i = 0; (i != priv->txqs_n); ++i)
1034 mlx5_txq_release(dev, i);
1038 mlx5_proc_priv_uninit(dev);
1039 mlx5_mprq_free_mp(dev);
1040 mlx5_free_shared_dr(priv);
1041 if (priv->rss_conf.rss_key != NULL)
1042 rte_free(priv->rss_conf.rss_key);
1043 if (priv->reta_idx != NULL)
1044 rte_free(priv->reta_idx);
1045 if (priv->config.vf)
1046 mlx5_nl_mac_addr_flush(dev);
1047 if (priv->nl_socket_route >= 0)
1048 close(priv->nl_socket_route);
1049 if (priv->nl_socket_rdma >= 0)
1050 close(priv->nl_socket_rdma);
1051 if (priv->vmwa_context)
1052 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1055 * Free the shared context in last turn, because the cleanup
1056 * routines above may use some shared fields, like
1057 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1058 * ifindex if Netlink fails.
1060 mlx5_free_shared_ibctx(priv->sh);
1063 ret = mlx5_hrxq_verify(dev);
1065 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1066 dev->data->port_id);
1067 ret = mlx5_ind_table_obj_verify(dev);
1069 DRV_LOG(WARNING, "port %u some indirection table still remain",
1070 dev->data->port_id);
1071 ret = mlx5_rxq_obj_verify(dev);
1073 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1074 dev->data->port_id);
1075 ret = mlx5_rxq_verify(dev);
1077 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1078 dev->data->port_id);
1079 ret = mlx5_txq_obj_verify(dev);
1081 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1082 dev->data->port_id);
1083 ret = mlx5_txq_verify(dev);
1085 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1086 dev->data->port_id);
1087 ret = mlx5_flow_verify(dev);
1089 DRV_LOG(WARNING, "port %u some flows still remain",
1090 dev->data->port_id);
1091 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1095 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1096 struct mlx5_priv *opriv =
1097 rte_eth_devices[port_id].data->dev_private;
1100 opriv->domain_id != priv->domain_id ||
1101 &rte_eth_devices[port_id] == dev)
1107 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1109 memset(priv, 0, sizeof(*priv));
1110 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1112 * Reset mac_addrs to NULL such that it is not freed as part of
1113 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1114 * it is freed when dev_private is freed.
1116 dev->data->mac_addrs = NULL;
1119 const struct eth_dev_ops mlx5_dev_ops = {
1120 .dev_configure = mlx5_dev_configure,
1121 .dev_start = mlx5_dev_start,
1122 .dev_stop = mlx5_dev_stop,
1123 .dev_set_link_down = mlx5_set_link_down,
1124 .dev_set_link_up = mlx5_set_link_up,
1125 .dev_close = mlx5_dev_close,
1126 .promiscuous_enable = mlx5_promiscuous_enable,
1127 .promiscuous_disable = mlx5_promiscuous_disable,
1128 .allmulticast_enable = mlx5_allmulticast_enable,
1129 .allmulticast_disable = mlx5_allmulticast_disable,
1130 .link_update = mlx5_link_update,
1131 .stats_get = mlx5_stats_get,
1132 .stats_reset = mlx5_stats_reset,
1133 .xstats_get = mlx5_xstats_get,
1134 .xstats_reset = mlx5_xstats_reset,
1135 .xstats_get_names = mlx5_xstats_get_names,
1136 .fw_version_get = mlx5_fw_version_get,
1137 .dev_infos_get = mlx5_dev_infos_get,
1138 .read_clock = mlx5_read_clock,
1139 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1140 .vlan_filter_set = mlx5_vlan_filter_set,
1141 .rx_queue_setup = mlx5_rx_queue_setup,
1142 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1143 .tx_queue_setup = mlx5_tx_queue_setup,
1144 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1145 .rx_queue_release = mlx5_rx_queue_release,
1146 .tx_queue_release = mlx5_tx_queue_release,
1147 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1148 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1149 .mac_addr_remove = mlx5_mac_addr_remove,
1150 .mac_addr_add = mlx5_mac_addr_add,
1151 .mac_addr_set = mlx5_mac_addr_set,
1152 .set_mc_addr_list = mlx5_set_mc_addr_list,
1153 .mtu_set = mlx5_dev_set_mtu,
1154 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1155 .vlan_offload_set = mlx5_vlan_offload_set,
1156 .reta_update = mlx5_dev_rss_reta_update,
1157 .reta_query = mlx5_dev_rss_reta_query,
1158 .rss_hash_update = mlx5_rss_hash_update,
1159 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1160 .filter_ctrl = mlx5_dev_filter_ctrl,
1161 .rx_descriptor_status = mlx5_rx_descriptor_status,
1162 .tx_descriptor_status = mlx5_tx_descriptor_status,
1163 .rx_queue_count = mlx5_rx_queue_count,
1164 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1165 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1166 .is_removed = mlx5_is_removed,
1167 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
1168 .get_module_info = mlx5_get_module_info,
1169 .get_module_eeprom = mlx5_get_module_eeprom,
1170 .hairpin_cap_get = mlx5_hairpin_cap_get,
1173 /* Available operations from secondary process. */
1174 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1175 .stats_get = mlx5_stats_get,
1176 .stats_reset = mlx5_stats_reset,
1177 .xstats_get = mlx5_xstats_get,
1178 .xstats_reset = mlx5_xstats_reset,
1179 .xstats_get_names = mlx5_xstats_get_names,
1180 .fw_version_get = mlx5_fw_version_get,
1181 .dev_infos_get = mlx5_dev_infos_get,
1182 .rx_descriptor_status = mlx5_rx_descriptor_status,
1183 .tx_descriptor_status = mlx5_tx_descriptor_status,
1184 .get_module_info = mlx5_get_module_info,
1185 .get_module_eeprom = mlx5_get_module_eeprom,
1188 /* Available operations in flow isolated mode. */
1189 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1190 .dev_configure = mlx5_dev_configure,
1191 .dev_start = mlx5_dev_start,
1192 .dev_stop = mlx5_dev_stop,
1193 .dev_set_link_down = mlx5_set_link_down,
1194 .dev_set_link_up = mlx5_set_link_up,
1195 .dev_close = mlx5_dev_close,
1196 .promiscuous_enable = mlx5_promiscuous_enable,
1197 .promiscuous_disable = mlx5_promiscuous_disable,
1198 .allmulticast_enable = mlx5_allmulticast_enable,
1199 .allmulticast_disable = mlx5_allmulticast_disable,
1200 .link_update = mlx5_link_update,
1201 .stats_get = mlx5_stats_get,
1202 .stats_reset = mlx5_stats_reset,
1203 .xstats_get = mlx5_xstats_get,
1204 .xstats_reset = mlx5_xstats_reset,
1205 .xstats_get_names = mlx5_xstats_get_names,
1206 .fw_version_get = mlx5_fw_version_get,
1207 .dev_infos_get = mlx5_dev_infos_get,
1208 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1209 .vlan_filter_set = mlx5_vlan_filter_set,
1210 .rx_queue_setup = mlx5_rx_queue_setup,
1211 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1212 .tx_queue_setup = mlx5_tx_queue_setup,
1213 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1214 .rx_queue_release = mlx5_rx_queue_release,
1215 .tx_queue_release = mlx5_tx_queue_release,
1216 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1217 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1218 .mac_addr_remove = mlx5_mac_addr_remove,
1219 .mac_addr_add = mlx5_mac_addr_add,
1220 .mac_addr_set = mlx5_mac_addr_set,
1221 .set_mc_addr_list = mlx5_set_mc_addr_list,
1222 .mtu_set = mlx5_dev_set_mtu,
1223 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1224 .vlan_offload_set = mlx5_vlan_offload_set,
1225 .filter_ctrl = mlx5_dev_filter_ctrl,
1226 .rx_descriptor_status = mlx5_rx_descriptor_status,
1227 .tx_descriptor_status = mlx5_tx_descriptor_status,
1228 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1229 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1230 .is_removed = mlx5_is_removed,
1231 .get_module_info = mlx5_get_module_info,
1232 .get_module_eeprom = mlx5_get_module_eeprom,
1233 .hairpin_cap_get = mlx5_hairpin_cap_get,
1237 * Verify and store value for device argument.
1240 * Key argument to verify.
1242 * Value associated with key.
1247 * 0 on success, a negative errno value otherwise and rte_errno is set.
1250 mlx5_args_check(const char *key, const char *val, void *opaque)
1252 struct mlx5_dev_config *config = opaque;
1255 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1256 if (!strcmp(MLX5_REPRESENTOR, key))
1259 tmp = strtoul(val, NULL, 0);
1262 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1265 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1266 config->cqe_comp = !!tmp;
1267 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1268 config->cqe_pad = !!tmp;
1269 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1270 config->hw_padding = !!tmp;
1271 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1272 config->mprq.enabled = !!tmp;
1273 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1274 config->mprq.stride_num_n = tmp;
1275 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1276 config->mprq.max_memcpy_len = tmp;
1277 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1278 config->mprq.min_rxqs_num = tmp;
1279 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1280 DRV_LOG(WARNING, "%s: deprecated parameter,"
1281 " converted to txq_inline_max", key);
1282 config->txq_inline_max = tmp;
1283 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1284 config->txq_inline_max = tmp;
1285 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1286 config->txq_inline_min = tmp;
1287 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1288 config->txq_inline_mpw = tmp;
1289 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1290 config->txqs_inline = tmp;
1291 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1292 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1293 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1294 config->mps = !!tmp;
1295 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1296 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1297 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1298 DRV_LOG(WARNING, "%s: deprecated parameter,"
1299 " converted to txq_inline_mpw", key);
1300 config->txq_inline_mpw = tmp;
1301 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1302 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1303 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1304 config->rx_vec_en = !!tmp;
1305 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1306 config->l3_vxlan_en = !!tmp;
1307 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1308 config->vf_nl_en = !!tmp;
1309 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1310 config->dv_esw_en = !!tmp;
1311 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1312 config->dv_flow_en = !!tmp;
1313 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1314 config->mr_ext_memseg_en = !!tmp;
1315 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1316 config->max_dump_files_num = tmp;
1317 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1318 config->lro.timeout = tmp;
1320 DRV_LOG(WARNING, "%s: unknown parameter", key);
1328 * Parse device parameters.
1331 * Pointer to device configuration structure.
1333 * Device arguments structure.
1336 * 0 on success, a negative errno value otherwise and rte_errno is set.
1339 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1341 const char **params = (const char *[]){
1342 MLX5_RXQ_CQE_COMP_EN,
1343 MLX5_RXQ_CQE_PAD_EN,
1344 MLX5_RXQ_PKT_PAD_EN,
1346 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1347 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1350 MLX5_TXQ_INLINE_MIN,
1351 MLX5_TXQ_INLINE_MAX,
1352 MLX5_TXQ_INLINE_MPW,
1353 MLX5_TXQS_MIN_INLINE,
1356 MLX5_TXQ_MPW_HDR_DSEG_EN,
1357 MLX5_TXQ_MAX_INLINE_LEN,
1364 MLX5_MR_EXT_MEMSEG_EN,
1366 MLX5_MAX_DUMP_FILES_NUM,
1367 MLX5_LRO_TIMEOUT_USEC,
1370 struct rte_kvargs *kvlist;
1374 if (devargs == NULL)
1376 /* Following UGLY cast is done to pass checkpatch. */
1377 kvlist = rte_kvargs_parse(devargs->args, params);
1378 if (kvlist == NULL) {
1382 /* Process parameters. */
1383 for (i = 0; (params[i] != NULL); ++i) {
1384 if (rte_kvargs_count(kvlist, params[i])) {
1385 ret = rte_kvargs_process(kvlist, params[i],
1386 mlx5_args_check, config);
1389 rte_kvargs_free(kvlist);
1394 rte_kvargs_free(kvlist);
1398 static struct rte_pci_driver mlx5_driver;
1401 * PMD global initialization.
1403 * Independent from individual device, this function initializes global
1404 * per-PMD data structures distinguishing primary and secondary processes.
1405 * Hence, each initialization is called once per a process.
1408 * 0 on success, a negative errno value otherwise and rte_errno is set.
1411 mlx5_init_once(void)
1413 struct mlx5_shared_data *sd;
1414 struct mlx5_local_data *ld = &mlx5_local_data;
1417 if (mlx5_init_shared_data())
1419 sd = mlx5_shared_data;
1421 rte_spinlock_lock(&sd->lock);
1422 switch (rte_eal_process_type()) {
1423 case RTE_PROC_PRIMARY:
1426 LIST_INIT(&sd->mem_event_cb_list);
1427 rte_rwlock_init(&sd->mem_event_rwlock);
1428 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1429 mlx5_mr_mem_event_cb, NULL);
1430 ret = mlx5_mp_init_primary();
1433 sd->init_done = true;
1435 case RTE_PROC_SECONDARY:
1438 ret = mlx5_mp_init_secondary();
1441 ++sd->secondary_cnt;
1442 ld->init_done = true;
1448 rte_spinlock_unlock(&sd->lock);
1453 * Configures the minimal amount of data to inline into WQE
1454 * while sending packets.
1456 * - the txq_inline_min has the maximal priority, if this
1457 * key is specified in devargs
1458 * - if DevX is enabled the inline mode is queried from the
1459 * device (HCA attributes and NIC vport context if needed).
1460 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1461 * and none (0 bytes) for other NICs
1464 * Verbs device parameters (name, port, switch_info) to spawn.
1466 * Device configuration parameters.
1469 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1470 struct mlx5_dev_config *config)
1472 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1473 /* Application defines size of inlined data explicitly. */
1474 switch (spawn->pci_dev->id.device_id) {
1475 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1476 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1477 if (config->txq_inline_min <
1478 (int)MLX5_INLINE_HSIZE_L2) {
1480 "txq_inline_mix aligned to minimal"
1481 " ConnectX-4 required value %d",
1482 (int)MLX5_INLINE_HSIZE_L2);
1483 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1489 if (config->hca_attr.eth_net_offloads) {
1490 /* We have DevX enabled, inline mode queried successfully. */
1491 switch (config->hca_attr.wqe_inline_mode) {
1492 case MLX5_CAP_INLINE_MODE_L2:
1493 /* outer L2 header must be inlined. */
1494 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1496 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1497 /* No inline data are required by NIC. */
1498 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1499 config->hw_vlan_insert =
1500 config->hca_attr.wqe_vlan_insert;
1501 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1503 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1504 /* inline mode is defined by NIC vport context. */
1505 if (!config->hca_attr.eth_virt)
1507 switch (config->hca_attr.vport_inline_mode) {
1508 case MLX5_INLINE_MODE_NONE:
1509 config->txq_inline_min =
1510 MLX5_INLINE_HSIZE_NONE;
1512 case MLX5_INLINE_MODE_L2:
1513 config->txq_inline_min =
1514 MLX5_INLINE_HSIZE_L2;
1516 case MLX5_INLINE_MODE_IP:
1517 config->txq_inline_min =
1518 MLX5_INLINE_HSIZE_L3;
1520 case MLX5_INLINE_MODE_TCP_UDP:
1521 config->txq_inline_min =
1522 MLX5_INLINE_HSIZE_L4;
1524 case MLX5_INLINE_MODE_INNER_L2:
1525 config->txq_inline_min =
1526 MLX5_INLINE_HSIZE_INNER_L2;
1528 case MLX5_INLINE_MODE_INNER_IP:
1529 config->txq_inline_min =
1530 MLX5_INLINE_HSIZE_INNER_L3;
1532 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1533 config->txq_inline_min =
1534 MLX5_INLINE_HSIZE_INNER_L4;
1540 * We get here if we are unable to deduce
1541 * inline data size with DevX. Try PCI ID
1542 * to determine old NICs.
1544 switch (spawn->pci_dev->id.device_id) {
1545 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1546 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1547 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1548 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1549 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1550 config->hw_vlan_insert = 0;
1552 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1553 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1554 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1555 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1557 * These NICs support VLAN insertion from WQE and
1558 * report the wqe_vlan_insert flag. But there is the bug
1559 * and PFC control may be broken, so disable feature.
1561 config->hw_vlan_insert = 0;
1562 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1565 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1569 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1573 * Allocate page of door-bells and register it using DevX API.
1576 * Pointer to Ethernet device.
1579 * Pointer to new page on success, NULL otherwise.
1581 static struct mlx5_devx_dbr_page *
1582 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1584 struct mlx5_priv *priv = dev->data->dev_private;
1585 struct mlx5_devx_dbr_page *page;
1587 /* Allocate space for door-bell page and management data. */
1588 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1589 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1591 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1592 dev->data->port_id);
1595 /* Register allocated memory. */
1596 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1597 MLX5_DBR_PAGE_SIZE, 0);
1599 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1600 dev->data->port_id);
1608 * Find the next available door-bell, allocate new page if needed.
1611 * Pointer to Ethernet device.
1612 * @param [out] dbr_page
1613 * Door-bell page containing the page data.
1616 * Door-bell address offset on success, a negative error value otherwise.
1619 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1621 struct mlx5_priv *priv = dev->data->dev_private;
1622 struct mlx5_devx_dbr_page *page = NULL;
1625 LIST_FOREACH(page, &priv->dbrpgs, next)
1626 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1628 if (!page) { /* No page with free door-bell exists. */
1629 page = mlx5_alloc_dbr_page(dev);
1630 if (!page) /* Failed to allocate new page. */
1632 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1634 /* Loop to find bitmap part with clear bit. */
1636 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1639 /* Find the first clear bit. */
1640 j = rte_bsf64(~page->dbr_bitmap[i]);
1641 assert(i < (MLX5_DBR_PER_PAGE / 64));
1642 page->dbr_bitmap[i] |= (1 << j);
1645 return (((i * 64) + j) * sizeof(uint64_t));
1649 * Release a door-bell record.
1652 * Pointer to Ethernet device.
1653 * @param [in] umem_id
1654 * UMEM ID of page containing the door-bell record to release.
1655 * @param [in] offset
1656 * Offset of door-bell record in page.
1659 * 0 on success, a negative error value otherwise.
1662 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1664 struct mlx5_priv *priv = dev->data->dev_private;
1665 struct mlx5_devx_dbr_page *page = NULL;
1668 LIST_FOREACH(page, &priv->dbrpgs, next)
1669 /* Find the page this address belongs to. */
1670 if (page->umem->umem_id == umem_id)
1675 if (!page->dbr_count) {
1676 /* Page not used, free it and remove from list. */
1677 LIST_REMOVE(page, next);
1679 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1682 /* Mark in bitmap that this door-bell is not in use. */
1683 offset /= MLX5_DBR_SIZE;
1684 int i = offset / 64;
1685 int j = offset % 64;
1687 page->dbr_bitmap[i] &= ~(1 << j);
1693 * Check sibling device configurations.
1695 * Sibling devices sharing the Infiniband device context
1696 * should have compatible configurations. This regards
1697 * representors and bonding slaves.
1700 * Private device descriptor.
1702 * Configuration of the device is going to be created.
1705 * 0 on success, EINVAL otherwise
1708 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1709 struct mlx5_dev_config *config)
1711 struct mlx5_ibv_shared *sh = priv->sh;
1712 struct mlx5_dev_config *sh_conf = NULL;
1716 /* Nothing to compare for the single/first device. */
1717 if (sh->refcnt == 1)
1719 /* Find the device with shared context. */
1720 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1721 struct mlx5_priv *opriv =
1722 rte_eth_devices[port_id].data->dev_private;
1724 if (opriv && opriv != priv && opriv->sh == sh) {
1725 sh_conf = &opriv->config;
1731 if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1732 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1733 " for shared %s context", sh->ibdev_name);
1740 * Spawn an Ethernet device from Verbs information.
1743 * Backing DPDK device.
1745 * Verbs device parameters (name, port, switch_info) to spawn.
1747 * Device configuration parameters.
1750 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1751 * is set. The following errors are defined:
1753 * EBUSY: device is not supposed to be spawned.
1754 * EEXIST: device is already spawned
1756 static struct rte_eth_dev *
1757 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1758 struct mlx5_dev_spawn_data *spawn,
1759 struct mlx5_dev_config config)
1761 const struct mlx5_switch_info *switch_info = &spawn->info;
1762 struct mlx5_ibv_shared *sh = NULL;
1763 struct ibv_port_attr port_attr;
1764 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1765 struct rte_eth_dev *eth_dev = NULL;
1766 struct mlx5_priv *priv = NULL;
1768 unsigned int hw_padding = 0;
1770 unsigned int cqe_comp;
1771 unsigned int cqe_pad = 0;
1772 unsigned int tunnel_en = 0;
1773 unsigned int mpls_en = 0;
1774 unsigned int swp = 0;
1775 unsigned int mprq = 0;
1776 unsigned int mprq_min_stride_size_n = 0;
1777 unsigned int mprq_max_stride_size_n = 0;
1778 unsigned int mprq_min_stride_num_n = 0;
1779 unsigned int mprq_max_stride_num_n = 0;
1780 struct rte_ether_addr mac;
1781 char name[RTE_ETH_NAME_MAX_LEN];
1782 int own_domain_id = 0;
1785 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1786 struct mlx5dv_devx_port devx_port;
1789 /* Determine if this port representor is supposed to be spawned. */
1790 if (switch_info->representor && dpdk_dev->devargs) {
1791 struct rte_eth_devargs eth_da;
1793 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1796 DRV_LOG(ERR, "failed to process device arguments: %s",
1797 strerror(rte_errno));
1800 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1801 if (eth_da.representor_ports[i] ==
1802 (uint16_t)switch_info->port_name)
1804 if (i == eth_da.nb_representor_ports) {
1809 /* Build device name. */
1810 if (spawn->pf_bond < 0) {
1811 /* Single device. */
1812 if (!switch_info->representor)
1813 strlcpy(name, dpdk_dev->name, sizeof(name));
1815 snprintf(name, sizeof(name), "%s_representor_%u",
1816 dpdk_dev->name, switch_info->port_name);
1818 /* Bonding device. */
1819 if (!switch_info->representor)
1820 snprintf(name, sizeof(name), "%s_%s",
1821 dpdk_dev->name, spawn->ibv_dev->name);
1823 snprintf(name, sizeof(name), "%s_%s_representor_%u",
1824 dpdk_dev->name, spawn->ibv_dev->name,
1825 switch_info->port_name);
1827 /* check if the device is already spawned */
1828 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1832 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1833 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1834 eth_dev = rte_eth_dev_attach_secondary(name);
1835 if (eth_dev == NULL) {
1836 DRV_LOG(ERR, "can not attach rte ethdev");
1840 eth_dev->device = dpdk_dev;
1841 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1842 err = mlx5_proc_priv_init(eth_dev);
1845 /* Receive command fd from primary process */
1846 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1849 /* Remap UAR for Tx queues. */
1850 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1854 * Ethdev pointer is still required as input since
1855 * the primary device is not accessible from the
1856 * secondary process.
1858 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1859 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1862 sh = mlx5_alloc_shared_ibctx(spawn);
1865 config.devx = sh->devx;
1866 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1867 config.dest_tir = 1;
1869 #ifdef HAVE_IBV_MLX5_MOD_SWP
1870 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1873 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1874 * as all ConnectX-5 devices.
1876 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1877 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1879 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1880 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1882 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1883 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1884 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1885 DRV_LOG(DEBUG, "enhanced MPW is supported");
1886 mps = MLX5_MPW_ENHANCED;
1888 DRV_LOG(DEBUG, "MPW is supported");
1892 DRV_LOG(DEBUG, "MPW isn't supported");
1893 mps = MLX5_MPW_DISABLED;
1895 #ifdef HAVE_IBV_MLX5_MOD_SWP
1896 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1897 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1898 DRV_LOG(DEBUG, "SWP support: %u", swp);
1901 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1902 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1903 struct mlx5dv_striding_rq_caps mprq_caps =
1904 dv_attr.striding_rq_caps;
1906 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1907 mprq_caps.min_single_stride_log_num_of_bytes);
1908 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1909 mprq_caps.max_single_stride_log_num_of_bytes);
1910 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1911 mprq_caps.min_single_wqe_log_num_of_strides);
1912 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1913 mprq_caps.max_single_wqe_log_num_of_strides);
1914 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1915 mprq_caps.supported_qpts);
1916 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1918 mprq_min_stride_size_n =
1919 mprq_caps.min_single_stride_log_num_of_bytes;
1920 mprq_max_stride_size_n =
1921 mprq_caps.max_single_stride_log_num_of_bytes;
1922 mprq_min_stride_num_n =
1923 mprq_caps.min_single_wqe_log_num_of_strides;
1924 mprq_max_stride_num_n =
1925 mprq_caps.max_single_wqe_log_num_of_strides;
1926 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1927 mprq_min_stride_num_n);
1930 if (RTE_CACHE_LINE_SIZE == 128 &&
1931 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1935 config.cqe_comp = cqe_comp;
1936 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1937 /* Whether device supports 128B Rx CQE padding. */
1938 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1939 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1941 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1942 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1943 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1944 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1945 (dv_attr.tunnel_offloads_caps &
1946 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1948 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1949 tunnel_en ? "" : "not ");
1952 "tunnel offloading disabled due to old OFED/rdma-core version");
1954 config.tunnel_en = tunnel_en;
1955 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1956 mpls_en = ((dv_attr.tunnel_offloads_caps &
1957 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1958 (dv_attr.tunnel_offloads_caps &
1959 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1960 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1961 mpls_en ? "" : "not ");
1963 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1964 " old OFED/rdma-core version or firmware configuration");
1966 config.mpls_en = mpls_en;
1967 /* Check port status. */
1968 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1970 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1973 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1974 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1978 if (port_attr.state != IBV_PORT_ACTIVE)
1979 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1980 mlx5_glue->port_state_str(port_attr.state),
1982 /* Allocate private eth device data. */
1983 priv = rte_zmalloc("ethdev private structure",
1985 RTE_CACHE_LINE_SIZE);
1987 DRV_LOG(ERR, "priv allocation failure");
1992 priv->ibv_port = spawn->ibv_port;
1993 priv->pci_dev = spawn->pci_dev;
1994 priv->mtu = RTE_ETHER_MTU;
1996 /* Initialize UAR access locks for 32bit implementations. */
1997 rte_spinlock_init(&priv->uar_lock_cq);
1998 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1999 rte_spinlock_init(&priv->uar_lock[i]);
2001 /* Some internal functions rely on Netlink sockets, open them now. */
2002 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2003 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2005 priv->representor = !!switch_info->representor;
2006 priv->master = !!switch_info->master;
2007 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2008 priv->vport_meta_tag = 0;
2009 priv->vport_meta_mask = 0;
2010 priv->pf_bond = spawn->pf_bond;
2011 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2013 * The DevX port query API is implemented. E-Switch may use
2014 * either vport or reg_c[0] metadata register to match on
2015 * vport index. The engaged part of metadata register is
2018 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2019 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2020 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port, &devx_port);
2022 DRV_LOG(WARNING, "can't query devx port %d on device %s",
2023 spawn->ibv_port, spawn->ibv_dev->name);
2024 devx_port.comp_mask = 0;
2026 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2027 priv->vport_meta_tag = devx_port.reg_c_0.value;
2028 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2029 if (!priv->vport_meta_mask) {
2030 DRV_LOG(ERR, "vport zero mask for port %d"
2031 " on bonding device %s",
2032 spawn->ibv_port, spawn->ibv_dev->name);
2036 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2037 DRV_LOG(ERR, "invalid vport tag for port %d"
2038 " on bonding device %s",
2039 spawn->ibv_port, spawn->ibv_dev->name);
2043 } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2044 priv->vport_id = devx_port.vport_num;
2045 } else if (spawn->pf_bond >= 0) {
2046 DRV_LOG(ERR, "can't deduce vport index for port %d"
2047 " on bonding device %s",
2048 spawn->ibv_port, spawn->ibv_dev->name);
2052 /* Suppose vport index in compatible way. */
2053 priv->vport_id = switch_info->representor ?
2054 switch_info->port_name + 1 : -1;
2058 * Kernel/rdma_core support single E-Switch per PF configurations
2059 * only and vport_id field contains the vport index for
2060 * associated VF, which is deduced from representor port name.
2061 * For example, let's have the IB device port 10, it has
2062 * attached network device eth0, which has port name attribute
2063 * pf0vf2, we can deduce the VF number as 2, and set vport index
2064 * as 3 (2+1). This assigning schema should be changed if the
2065 * multiple E-Switch instances per PF configurations or/and PCI
2066 * subfunctions are added.
2068 priv->vport_id = switch_info->representor ?
2069 switch_info->port_name + 1 : -1;
2071 /* representor_id field keeps the unmodified VF index. */
2072 priv->representor_id = switch_info->representor ?
2073 switch_info->port_name : -1;
2075 * Look for sibling devices in order to reuse their switch domain
2076 * if any, otherwise allocate one.
2078 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2079 const struct mlx5_priv *opriv =
2080 rte_eth_devices[port_id].data->dev_private;
2083 opriv->sh != priv->sh ||
2085 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2087 priv->domain_id = opriv->domain_id;
2090 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2091 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2094 DRV_LOG(ERR, "unable to allocate switch domain: %s",
2095 strerror(rte_errno));
2100 err = mlx5_args(&config, dpdk_dev->devargs);
2103 DRV_LOG(ERR, "failed to process device arguments: %s",
2104 strerror(rte_errno));
2107 err = mlx5_dev_check_sibling_config(priv, &config);
2110 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2111 IBV_DEVICE_RAW_IP_CSUM);
2112 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2113 (config.hw_csum ? "" : "not "));
2114 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2115 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2116 DRV_LOG(DEBUG, "counters are not supported");
2118 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2119 if (config.dv_flow_en) {
2120 DRV_LOG(WARNING, "DV flow is not supported");
2121 config.dv_flow_en = 0;
2124 config.ind_table_max_size =
2125 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2127 * Remove this check once DPDK supports larger/variable
2128 * indirection tables.
2130 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2131 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2132 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2133 config.ind_table_max_size);
2134 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2135 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2136 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2137 (config.hw_vlan_strip ? "" : "not "));
2138 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2139 IBV_RAW_PACKET_CAP_SCATTER_FCS);
2140 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2141 (config.hw_fcs_strip ? "" : "not "));
2142 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2143 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2144 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2145 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2146 IBV_DEVICE_PCI_WRITE_END_PADDING);
2148 if (config.hw_padding && !hw_padding) {
2149 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2150 config.hw_padding = 0;
2151 } else if (config.hw_padding) {
2152 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2154 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2155 (sh->device_attr.tso_caps.supported_qpts &
2156 (1 << IBV_QPT_RAW_PACKET)));
2158 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2160 * MPW is disabled by default, while the Enhanced MPW is enabled
2163 if (config.mps == MLX5_ARG_UNSET)
2164 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2167 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2168 DRV_LOG(INFO, "%sMPS is %s",
2169 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2170 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2171 if (config.cqe_comp && !cqe_comp) {
2172 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2173 config.cqe_comp = 0;
2175 if (config.cqe_pad && !cqe_pad) {
2176 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2178 } else if (config.cqe_pad) {
2179 DRV_LOG(INFO, "Rx CQE padding is enabled");
2182 priv->counter_fallback = 0;
2183 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2188 if (!config.hca_attr.flow_counters_dump)
2189 priv->counter_fallback = 1;
2190 #ifndef HAVE_IBV_DEVX_ASYNC
2191 priv->counter_fallback = 1;
2193 if (priv->counter_fallback)
2194 DRV_LOG(INFO, "Use fall-back DV counter management");
2195 /* Check for LRO support. */
2196 if (config.dest_tir && config.hca_attr.lro_cap &&
2197 config.dv_flow_en) {
2198 /* TBD check tunnel lro caps. */
2199 config.lro.supported = config.hca_attr.lro_cap;
2200 DRV_LOG(DEBUG, "Device supports LRO");
2202 * If LRO timeout is not configured by application,
2203 * use the minimal supported value.
2205 if (!config.lro.timeout)
2206 config.lro.timeout =
2207 config.hca_attr.lro_timer_supported_periods[0];
2208 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2209 config.lro.timeout);
2212 if (config.mprq.enabled && mprq) {
2213 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2214 config.mprq.stride_num_n < mprq_min_stride_num_n) {
2215 config.mprq.stride_num_n =
2216 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2217 mprq_min_stride_num_n);
2219 "the number of strides"
2220 " for Multi-Packet RQ is out of range,"
2221 " setting default value (%u)",
2222 1 << config.mprq.stride_num_n);
2224 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2225 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2226 } else if (config.mprq.enabled && !mprq) {
2227 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2228 config.mprq.enabled = 0;
2230 if (config.max_dump_files_num == 0)
2231 config.max_dump_files_num = 128;
2232 eth_dev = rte_eth_dev_allocate(name);
2233 if (eth_dev == NULL) {
2234 DRV_LOG(ERR, "can not allocate rte ethdev");
2238 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2239 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2240 if (priv->representor) {
2241 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2242 eth_dev->data->representor_id = priv->representor_id;
2245 * Store associated network device interface index. This index
2246 * is permanent throughout the lifetime of device. So, we may store
2247 * the ifindex here and use the cached value further.
2249 assert(spawn->ifindex);
2250 priv->if_index = spawn->ifindex;
2251 eth_dev->data->dev_private = priv;
2252 priv->dev_data = eth_dev->data;
2253 eth_dev->data->mac_addrs = priv->mac;
2254 eth_dev->device = dpdk_dev;
2255 /* Configure the first MAC address by default. */
2256 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2258 "port %u cannot get MAC address, is mlx5_en"
2259 " loaded? (errno: %s)",
2260 eth_dev->data->port_id, strerror(rte_errno));
2265 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2266 eth_dev->data->port_id,
2267 mac.addr_bytes[0], mac.addr_bytes[1],
2268 mac.addr_bytes[2], mac.addr_bytes[3],
2269 mac.addr_bytes[4], mac.addr_bytes[5]);
2272 char ifname[IF_NAMESIZE];
2274 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2275 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2276 eth_dev->data->port_id, ifname);
2278 DRV_LOG(DEBUG, "port %u ifname is unknown",
2279 eth_dev->data->port_id);
2282 /* Get actual MTU if possible. */
2283 err = mlx5_get_mtu(eth_dev, &priv->mtu);
2288 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2290 /* Initialize burst functions to prevent crashes before link-up. */
2291 eth_dev->rx_pkt_burst = removed_rx_burst;
2292 eth_dev->tx_pkt_burst = removed_tx_burst;
2293 eth_dev->dev_ops = &mlx5_dev_ops;
2294 /* Register MAC address. */
2295 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2296 if (config.vf && config.vf_nl_en)
2297 mlx5_nl_mac_addr_sync(eth_dev);
2298 TAILQ_INIT(&priv->flows);
2299 TAILQ_INIT(&priv->ctrl_flows);
2300 /* Hint libmlx5 to use PMD allocator for data plane resources */
2301 struct mlx5dv_ctx_allocators alctr = {
2302 .alloc = &mlx5_alloc_verbs_buf,
2303 .free = &mlx5_free_verbs_buf,
2306 mlx5_glue->dv_set_context_attr(sh->ctx,
2307 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2308 (void *)((uintptr_t)&alctr));
2309 /* Bring Ethernet device up. */
2310 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2311 eth_dev->data->port_id);
2312 mlx5_set_link_up(eth_dev);
2314 * Even though the interrupt handler is not installed yet,
2315 * interrupts will still trigger on the async_fd from
2316 * Verbs context returned by ibv_open_device().
2318 mlx5_link_update(eth_dev, 0);
2319 #ifdef HAVE_MLX5DV_DR_ESWITCH
2320 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2321 (switch_info->representor || switch_info->master)))
2322 config.dv_esw_en = 0;
2324 config.dv_esw_en = 0;
2326 /* Detect minimal data bytes to inline. */
2327 mlx5_set_min_inline(spawn, &config);
2328 /* Store device configuration on private structure. */
2329 priv->config = config;
2330 /* Create context for virtual machine VLAN workaround. */
2331 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2332 if (config.dv_flow_en) {
2333 err = mlx5_alloc_shared_dr(priv);
2337 /* Supported Verbs flow priority number detection. */
2338 err = mlx5_flow_discover_priorities(eth_dev);
2343 priv->config.flow_prio = err;
2348 mlx5_free_shared_dr(priv);
2349 if (priv->nl_socket_route >= 0)
2350 close(priv->nl_socket_route);
2351 if (priv->nl_socket_rdma >= 0)
2352 close(priv->nl_socket_rdma);
2353 if (priv->vmwa_context)
2354 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2356 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2358 if (eth_dev != NULL)
2359 eth_dev->data->dev_private = NULL;
2361 if (eth_dev != NULL) {
2362 /* mac_addrs must not be freed alone because part of dev_private */
2363 eth_dev->data->mac_addrs = NULL;
2364 rte_eth_dev_release_port(eth_dev);
2367 mlx5_free_shared_ibctx(sh);
2374 * Comparison callback to sort device data.
2376 * This is meant to be used with qsort().
2379 * Pointer to pointer to first data object.
2381 * Pointer to pointer to second data object.
2384 * 0 if both objects are equal, less than 0 if the first argument is less
2385 * than the second, greater than 0 otherwise.
2388 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2390 const struct mlx5_switch_info *si_a =
2391 &((const struct mlx5_dev_spawn_data *)a)->info;
2392 const struct mlx5_switch_info *si_b =
2393 &((const struct mlx5_dev_spawn_data *)b)->info;
2396 /* Master device first. */
2397 ret = si_b->master - si_a->master;
2400 /* Then representor devices. */
2401 ret = si_b->representor - si_a->representor;
2404 /* Unidentified devices come last in no specific order. */
2405 if (!si_a->representor)
2407 /* Order representors by name. */
2408 return si_a->port_name - si_b->port_name;
2412 * Match PCI information for possible slaves of bonding device.
2414 * @param[in] ibv_dev
2415 * Pointer to Infiniband device structure.
2416 * @param[in] pci_dev
2417 * Pointer to PCI device structure to match PCI address.
2418 * @param[in] nl_rdma
2419 * Netlink RDMA group socket handle.
2422 * negative value if no bonding device found, otherwise
2423 * positive index of slave PF in bonding.
2426 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2427 const struct rte_pci_device *pci_dev,
2430 char ifname[IF_NAMESIZE + 1];
2431 unsigned int ifindex;
2437 * Try to get master device name. If something goes
2438 * wrong suppose the lack of kernel support and no
2443 if (!strstr(ibv_dev->name, "bond"))
2445 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2449 * The Master device might not be on the predefined
2450 * port (not on port index 1, it is not garanted),
2451 * we have to scan all Infiniband device port and
2454 for (i = 1; i <= np; ++i) {
2455 /* Check whether Infiniband port is populated. */
2456 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2459 if (!if_indextoname(ifindex, ifname))
2461 /* Try to read bonding slave names from sysfs. */
2463 "/sys/class/net/%s/master/bonding/slaves", ifname);
2464 file = fopen(slaves, "r");
2470 /* Use safe format to check maximal buffer length. */
2471 assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2472 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2473 char tmp_str[IF_NAMESIZE + 32];
2474 struct rte_pci_addr pci_addr;
2475 struct mlx5_switch_info info;
2477 /* Process slave interface names in the loop. */
2478 snprintf(tmp_str, sizeof(tmp_str),
2479 "/sys/class/net/%s", ifname);
2480 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2481 DRV_LOG(WARNING, "can not get PCI address"
2482 " for netdev \"%s\"", ifname);
2485 if (pci_dev->addr.domain != pci_addr.domain ||
2486 pci_dev->addr.bus != pci_addr.bus ||
2487 pci_dev->addr.devid != pci_addr.devid ||
2488 pci_dev->addr.function != pci_addr.function)
2490 /* Slave interface PCI address match found. */
2492 snprintf(tmp_str, sizeof(tmp_str),
2493 "/sys/class/net/%s/phys_port_name", ifname);
2494 file = fopen(tmp_str, "rb");
2497 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2498 if (fscanf(file, "%32s", tmp_str) == 1)
2499 mlx5_translate_port_name(tmp_str, &info);
2500 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2501 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2502 pf = info.port_name;
2511 * DPDK callback to register a PCI device.
2513 * This function spawns Ethernet devices out of a given PCI device.
2515 * @param[in] pci_drv
2516 * PCI driver structure (mlx5_driver).
2517 * @param[in] pci_dev
2518 * PCI device information.
2521 * 0 on success, a negative errno value otherwise and rte_errno is set.
2524 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2525 struct rte_pci_device *pci_dev)
2527 struct ibv_device **ibv_list;
2529 * Number of found IB Devices matching with requested PCI BDF.
2530 * nd != 1 means there are multiple IB devices over the same
2531 * PCI device and we have representors and master.
2533 unsigned int nd = 0;
2535 * Number of found IB device Ports. nd = 1 and np = 1..n means
2536 * we have the single multiport IB device, and there may be
2537 * representors attached to some of found ports.
2539 unsigned int np = 0;
2541 * Number of DPDK ethernet devices to Spawn - either over
2542 * multiple IB devices or multiple ports of single IB device.
2543 * Actually this is the number of iterations to spawn.
2545 unsigned int ns = 0;
2548 * < 0 - no bonding device (single one)
2549 * >= 0 - bonding device (value is slave PF index)
2552 struct mlx5_dev_spawn_data *list = NULL;
2553 struct mlx5_dev_config dev_config;
2556 ret = mlx5_init_once();
2558 DRV_LOG(ERR, "unable to init PMD global data: %s",
2559 strerror(rte_errno));
2562 assert(pci_drv == &mlx5_driver);
2564 ibv_list = mlx5_glue->get_device_list(&ret);
2566 rte_errno = errno ? errno : ENOSYS;
2567 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2571 * First scan the list of all Infiniband devices to find
2572 * matching ones, gathering into the list.
2574 struct ibv_device *ibv_match[ret + 1];
2575 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2576 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2580 struct rte_pci_addr pci_addr;
2582 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2583 bd = mlx5_device_bond_pci_match
2584 (ibv_list[ret], pci_dev, nl_rdma);
2587 * Bonding device detected. Only one match is allowed,
2588 * the bonding is supported over multi-port IB device,
2589 * there should be no matches on representor PCI
2590 * functions or non VF LAG bonding devices with
2591 * specified address.
2595 "multiple PCI match on bonding device"
2596 "\"%s\" found", ibv_list[ret]->name);
2601 DRV_LOG(INFO, "PCI information matches for"
2602 " slave %d bonding device \"%s\"",
2603 bd, ibv_list[ret]->name);
2604 ibv_match[nd++] = ibv_list[ret];
2607 if (mlx5_dev_to_pci_addr
2608 (ibv_list[ret]->ibdev_path, &pci_addr))
2610 if (pci_dev->addr.domain != pci_addr.domain ||
2611 pci_dev->addr.bus != pci_addr.bus ||
2612 pci_dev->addr.devid != pci_addr.devid ||
2613 pci_dev->addr.function != pci_addr.function)
2615 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2616 ibv_list[ret]->name);
2617 ibv_match[nd++] = ibv_list[ret];
2619 ibv_match[nd] = NULL;
2621 /* No device matches, just complain and bail out. */
2623 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2624 " are kernel drivers loaded?",
2625 pci_dev->addr.domain, pci_dev->addr.bus,
2626 pci_dev->addr.devid, pci_dev->addr.function);
2633 * Found single matching device may have multiple ports.
2634 * Each port may be representor, we have to check the port
2635 * number and check the representors existence.
2638 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2640 DRV_LOG(WARNING, "can not get IB device \"%s\""
2641 " ports number", ibv_match[0]->name);
2642 if (bd >= 0 && !np) {
2643 DRV_LOG(ERR, "can not get ports"
2644 " for bonding device");
2650 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2653 * This may happen if there is VF LAG kernel support and
2654 * application is compiled with older rdma_core library.
2657 "No kernel/verbs support for VF LAG bonding found.");
2658 rte_errno = ENOTSUP;
2664 * Now we can determine the maximal
2665 * amount of devices to be spawned.
2667 list = rte_zmalloc("device spawn data",
2668 sizeof(struct mlx5_dev_spawn_data) *
2670 RTE_CACHE_LINE_SIZE);
2672 DRV_LOG(ERR, "spawn data array allocation failure");
2677 if (bd >= 0 || np > 1) {
2679 * Single IB device with multiple ports found,
2680 * it may be E-Switch master device and representors.
2681 * We have to perform identification trough the ports.
2683 assert(nl_rdma >= 0);
2687 for (i = 1; i <= np; ++i) {
2688 list[ns].max_port = np;
2689 list[ns].ibv_port = i;
2690 list[ns].ibv_dev = ibv_match[0];
2691 list[ns].eth_dev = NULL;
2692 list[ns].pci_dev = pci_dev;
2693 list[ns].pf_bond = bd;
2694 list[ns].ifindex = mlx5_nl_ifindex
2695 (nl_rdma, list[ns].ibv_dev->name, i);
2696 if (!list[ns].ifindex) {
2698 * No network interface index found for the
2699 * specified port, it means there is no
2700 * representor on this port. It's OK,
2701 * there can be disabled ports, for example
2702 * if sriov_numvfs < sriov_totalvfs.
2708 ret = mlx5_nl_switch_info
2712 if (ret || (!list[ns].info.representor &&
2713 !list[ns].info.master)) {
2715 * We failed to recognize representors with
2716 * Netlink, let's try to perform the task
2719 ret = mlx5_sysfs_switch_info
2723 if (!ret && bd >= 0) {
2724 switch (list[ns].info.name_type) {
2725 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2726 if (list[ns].info.port_name == bd)
2729 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2730 if (list[ns].info.pf_num == bd)
2738 if (!ret && (list[ns].info.representor ^
2739 list[ns].info.master))
2744 "unable to recognize master/representors"
2745 " on the IB device with multiple ports");
2752 * The existence of several matching entries (nd > 1) means
2753 * port representors have been instantiated. No existing Verbs
2754 * call nor sysfs entries can tell them apart, this can only
2755 * be done through Netlink calls assuming kernel drivers are
2756 * recent enough to support them.
2758 * In the event of identification failure through Netlink,
2759 * try again through sysfs, then:
2761 * 1. A single IB device matches (nd == 1) with single
2762 * port (np=0/1) and is not a representor, assume
2763 * no switch support.
2765 * 2. Otherwise no safe assumptions can be made;
2766 * complain louder and bail out.
2769 for (i = 0; i != nd; ++i) {
2770 memset(&list[ns].info, 0, sizeof(list[ns].info));
2771 list[ns].max_port = 1;
2772 list[ns].ibv_port = 1;
2773 list[ns].ibv_dev = ibv_match[i];
2774 list[ns].eth_dev = NULL;
2775 list[ns].pci_dev = pci_dev;
2776 list[ns].pf_bond = -1;
2777 list[ns].ifindex = 0;
2779 list[ns].ifindex = mlx5_nl_ifindex
2780 (nl_rdma, list[ns].ibv_dev->name, 1);
2781 if (!list[ns].ifindex) {
2782 char ifname[IF_NAMESIZE];
2785 * Netlink failed, it may happen with old
2786 * ib_core kernel driver (before 4.16).
2787 * We can assume there is old driver because
2788 * here we are processing single ports IB
2789 * devices. Let's try sysfs to retrieve
2790 * the ifindex. The method works for
2791 * master device only.
2795 * Multiple devices found, assume
2796 * representors, can not distinguish
2797 * master/representor and retrieve
2798 * ifindex via sysfs.
2802 ret = mlx5_get_master_ifname
2803 (ibv_match[i]->ibdev_path, &ifname);
2806 if_nametoindex(ifname);
2807 if (!list[ns].ifindex) {
2809 * No network interface index found
2810 * for the specified device, it means
2811 * there it is neither representor
2819 ret = mlx5_nl_switch_info
2823 if (ret || (!list[ns].info.representor &&
2824 !list[ns].info.master)) {
2826 * We failed to recognize representors with
2827 * Netlink, let's try to perform the task
2830 ret = mlx5_sysfs_switch_info
2834 if (!ret && (list[ns].info.representor ^
2835 list[ns].info.master)) {
2837 } else if ((nd == 1) &&
2838 !list[ns].info.representor &&
2839 !list[ns].info.master) {
2841 * Single IB device with
2842 * one physical port and
2843 * attached network device.
2844 * May be SRIOV is not enabled
2845 * or there is no representors.
2847 DRV_LOG(INFO, "no E-Switch support detected");
2854 "unable to recognize master/representors"
2855 " on the multiple IB devices");
2863 * Sort list to probe devices in natural order for users convenience
2864 * (i.e. master first, then representors from lowest to highest ID).
2866 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2867 /* Default configuration. */
2868 dev_config = (struct mlx5_dev_config){
2870 .mps = MLX5_ARG_UNSET,
2872 .txq_inline_max = MLX5_ARG_UNSET,
2873 .txq_inline_min = MLX5_ARG_UNSET,
2874 .txq_inline_mpw = MLX5_ARG_UNSET,
2875 .txqs_inline = MLX5_ARG_UNSET,
2877 .mr_ext_memseg_en = 1,
2879 .enabled = 0, /* Disabled by default. */
2880 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2881 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2882 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2886 /* Device specific configuration. */
2887 switch (pci_dev->id.device_id) {
2888 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2889 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2890 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2891 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2892 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2893 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2899 for (i = 0; i != ns; ++i) {
2902 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2905 if (!list[i].eth_dev) {
2906 if (rte_errno != EBUSY && rte_errno != EEXIST)
2908 /* Device is disabled or already spawned. Ignore it. */
2911 restore = list[i].eth_dev->data->dev_flags;
2912 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2913 /* Restore non-PCI flags cleared by the above call. */
2914 list[i].eth_dev->data->dev_flags |= restore;
2915 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
2916 rte_eth_dev_probing_finish(list[i].eth_dev);
2920 "probe of PCI device " PCI_PRI_FMT " aborted after"
2921 " encountering an error: %s",
2922 pci_dev->addr.domain, pci_dev->addr.bus,
2923 pci_dev->addr.devid, pci_dev->addr.function,
2924 strerror(rte_errno));
2928 if (!list[i].eth_dev)
2930 mlx5_dev_close(list[i].eth_dev);
2931 /* mac_addrs must not be freed because in dev_private */
2932 list[i].eth_dev->data->mac_addrs = NULL;
2933 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2935 /* Restore original error. */
2942 * Do the routine cleanup:
2943 * - close opened Netlink sockets
2944 * - free allocated spawn data array
2945 * - free the Infiniband device list
2954 mlx5_glue->free_device_list(ibv_list);
2959 * Look for the ethernet device belonging to mlx5 driver.
2961 * @param[in] port_id
2962 * port_id to start looking for device.
2963 * @param[in] pci_dev
2964 * Pointer to the hint PCI device. When device is being probed
2965 * the its siblings (master and preceding representors might
2966 * not have assigned driver yet (because the mlx5_pci_probe()
2967 * is not completed yet, for this case match on hint PCI
2968 * device may be used to detect sibling device.
2971 * port_id of found device, RTE_MAX_ETHPORT if not found.
2974 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
2976 while (port_id < RTE_MAX_ETHPORTS) {
2977 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2979 if (dev->state != RTE_ETH_DEV_UNUSED &&
2981 (dev->device == &pci_dev->device ||
2982 (dev->device->driver &&
2983 dev->device->driver->name &&
2984 !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
2988 if (port_id >= RTE_MAX_ETHPORTS)
2989 return RTE_MAX_ETHPORTS;
2994 * DPDK callback to remove a PCI device.
2996 * This function removes all Ethernet devices belong to a given PCI device.
2998 * @param[in] pci_dev
2999 * Pointer to the PCI device.
3002 * 0 on success, the function cannot fail.
3005 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3009 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3010 rte_eth_dev_close(port_id);
3014 static const struct rte_pci_id mlx5_pci_id_map[] = {
3016 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3017 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3020 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3021 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3024 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3025 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3028 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3029 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3032 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3033 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3036 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3037 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3040 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3041 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3044 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3045 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3048 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3049 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3052 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3053 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3056 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3057 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3060 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3061 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3068 static struct rte_pci_driver mlx5_driver = {
3070 .name = MLX5_DRIVER_NAME
3072 .id_table = mlx5_pci_id_map,
3073 .probe = mlx5_pci_probe,
3074 .remove = mlx5_pci_remove,
3075 .dma_map = mlx5_dma_map,
3076 .dma_unmap = mlx5_dma_unmap,
3077 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3078 RTE_PCI_DRV_PROBE_AGAIN,
3081 #ifdef RTE_IBVERBS_LINK_DLOPEN
3084 * Suffix RTE_EAL_PMD_PATH with "-glue".
3086 * This function performs a sanity check on RTE_EAL_PMD_PATH before
3087 * suffixing its last component.
3090 * Output buffer, should be large enough otherwise NULL is returned.
3095 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
3098 mlx5_glue_path(char *buf, size_t size)
3100 static const char *const bad[] = { "/", ".", "..", NULL };
3101 const char *path = RTE_EAL_PMD_PATH;
3102 size_t len = strlen(path);
3106 while (len && path[len - 1] == '/')
3108 for (off = len; off && path[off - 1] != '/'; --off)
3110 for (i = 0; bad[i]; ++i)
3111 if (!strncmp(path + off, bad[i], (int)(len - off)))
3113 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3114 if (i == -1 || (size_t)i >= size)
3119 "unable to append \"-glue\" to last component of"
3120 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3121 " please re-configure DPDK");
3126 * Initialization routine for run-time dependency on rdma-core.
3129 mlx5_glue_init(void)
3131 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3132 const char *path[] = {
3134 * A basic security check is necessary before trusting
3135 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3137 (geteuid() == getuid() && getegid() == getgid() ?
3138 getenv("MLX5_GLUE_PATH") : NULL),
3140 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3141 * variant, otherwise let dlopen() look up libraries on its
3144 (*RTE_EAL_PMD_PATH ?
3145 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3148 void *handle = NULL;
3152 while (!handle && i != RTE_DIM(path)) {
3161 end = strpbrk(path[i], ":;");
3163 end = path[i] + strlen(path[i]);
3164 len = end - path[i];
3169 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3171 (!len || *(end - 1) == '/') ? "" : "/");
3174 if (sizeof(name) != (size_t)ret + 1)
3176 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3178 handle = dlopen(name, RTLD_LAZY);
3189 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3192 sym = dlsym(handle, "mlx5_glue");
3193 if (!sym || !*sym) {
3197 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3206 "cannot initialize PMD due to missing run-time dependency on"
3207 " rdma-core libraries (libibverbs, libmlx5)");
3214 * Driver initialization routine.
3216 RTE_INIT(rte_mlx5_pmd_init)
3218 /* Initialize driver log type. */
3219 mlx5_logtype = rte_log_register("pmd.net.mlx5");
3220 if (mlx5_logtype >= 0)
3221 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3223 /* Build the static tables for Verbs conversion. */
3224 mlx5_set_ptype_table();
3225 mlx5_set_cksum_table();
3226 mlx5_set_swp_types_table();
3228 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3229 * huge pages. Calling ibv_fork_init() during init allows
3230 * applications to use fork() safely for purposes other than
3231 * using this PMD, which is not supported in forked processes.
3233 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3234 /* Match the size of Rx completion entry to the size of a cacheline. */
3235 if (RTE_CACHE_LINE_SIZE == 128)
3236 setenv("MLX5_CQE_SIZE", "128", 0);
3238 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3239 * cleanup all the Verbs resources even when the device was removed.
3241 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3242 #ifdef RTE_IBVERBS_LINK_DLOPEN
3243 if (mlx5_glue_init())
3248 /* Glue structure must not contain any NULL pointers. */
3252 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3253 assert(((const void *const *)mlx5_glue)[i]);
3256 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3258 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3259 mlx5_glue->version, MLX5_GLUE_VERSION);
3262 mlx5_glue->fork_init();
3263 rte_pci_register(&mlx5_driver);
3266 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3267 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3268 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");