1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to include 2 dsegs in the title WQEBB.
100 * Deprecated, ignored.
102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
105 * Device parameter to limit the size of inlining packet.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
111 * Device parameter to enable hardware Tx vector.
112 * Deprecated, ignored (no vectorized Tx routines anymore).
114 #define MLX5_TX_VEC_EN "tx_vec_en"
116 /* Device parameter to enable hardware Rx vector. */
117 #define MLX5_RX_VEC_EN "rx_vec_en"
119 /* Allow L3 VXLAN flow creation. */
120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
122 /* Activate DV E-Switch flow steering. */
123 #define MLX5_DV_ESW_EN "dv_esw_en"
125 /* Activate DV flow steering. */
126 #define MLX5_DV_FLOW_EN "dv_flow_en"
128 /* Activate Netlink support in VF mode. */
129 #define MLX5_VF_NL_EN "vf_nl_en"
131 /* Enable extending memsegs when creating a MR. */
132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
134 /* Select port representors to instantiate. */
135 #define MLX5_REPRESENTOR "representor"
137 /* Device parameter to configure the maximum number of dump files per queue. */
138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
140 /* Configure timeout of LRO session (in microseconds). */
141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
143 #ifndef HAVE_IBV_MLX5_MOD_MPW
144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
154 /* Shared memory between primary and secondary processes. */
155 struct mlx5_shared_data *mlx5_shared_data;
157 /* Spinlock for mlx5_shared_data allocation. */
158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
160 /* Process local data for secondary processes. */
161 static struct mlx5_local_data mlx5_local_data;
163 /** Driver-specific log messages type. */
166 /** Data associated with devices to spawn. */
167 struct mlx5_dev_spawn_data {
168 uint32_t ifindex; /**< Network interface index. */
169 uint32_t max_port; /**< IB device maximal port index. */
170 uint32_t ibv_port; /**< IB device physical port index. */
171 int pf_bond; /**< bonding device PF index. < 0 - no bonding */
172 struct mlx5_switch_info info; /**< Switch information. */
173 struct ibv_device *ibv_dev; /**< Associated IB device. */
174 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
175 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
182 * Initialize the counters management structure.
185 * Pointer to mlx5_ibv_shared object to free
188 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
192 TAILQ_INIT(&sh->cmng.flow_counters);
193 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
194 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
198 * Destroy all the resources allocated for a counter memory management.
201 * Pointer to the memory management structure.
204 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
206 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
208 LIST_REMOVE(mng, next);
209 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
210 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
215 * Close and release all the resources of the counters management.
218 * Pointer to mlx5_ibv_shared object to free.
221 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
223 struct mlx5_counter_stats_mem_mng *mng;
230 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
231 if (rte_errno != EINPROGRESS)
235 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
236 struct mlx5_flow_counter_pool *pool;
237 uint32_t batch = !!(i % 2);
239 if (!sh->cmng.ccont[i].pools)
241 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
246 (mlx5_devx_cmd_destroy(pool->min_dcs));
248 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
249 if (pool->counters_raw[j].action)
251 (mlx5_glue->destroy_flow_action
252 (pool->counters_raw[j].action));
253 if (!batch && pool->counters_raw[j].dcs)
254 claim_zero(mlx5_devx_cmd_destroy
255 (pool->counters_raw[j].dcs));
257 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
260 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
262 rte_free(sh->cmng.ccont[i].pools);
264 mng = LIST_FIRST(&sh->cmng.mem_mngs);
266 mlx5_flow_destroy_counter_stat_mem_mng(mng);
267 mng = LIST_FIRST(&sh->cmng.mem_mngs);
269 memset(&sh->cmng, 0, sizeof(sh->cmng));
273 * Extract pdn of PD object using DV API.
276 * Pointer to the verbs PD object.
278 * Pointer to the PD object number variable.
281 * 0 on success, error value otherwise.
283 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
285 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
287 struct mlx5dv_obj obj;
288 struct mlx5dv_pd pd_info;
292 obj.pd.out = &pd_info;
293 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
295 DRV_LOG(DEBUG, "Fail to get PD object info");
301 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
304 * Allocate shared IB device context. If there is multiport device the
305 * master and representors will share this context, if there is single
306 * port dedicated IB device, the context will be used by only given
307 * port due to unification.
309 * Routine first searches the context for the specified IB device name,
310 * if found the shared context assumed and reference counter is incremented.
311 * If no context found the new one is created and initialized with specified
312 * IB device context and parameters.
315 * Pointer to the IB device attributes (name, port, etc).
318 * Pointer to mlx5_ibv_shared object on success,
319 * otherwise NULL and rte_errno is set.
321 static struct mlx5_ibv_shared *
322 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
324 struct mlx5_ibv_shared *sh;
329 /* Secondary process should not create the shared context. */
330 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
331 pthread_mutex_lock(&mlx5_ibv_list_mutex);
332 /* Search for IB context by device name. */
333 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
334 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
339 /* No device found, we have to create new shared context. */
340 assert(spawn->max_port);
341 sh = rte_zmalloc("ethdev shared ib context",
342 sizeof(struct mlx5_ibv_shared) +
344 sizeof(struct mlx5_ibv_shared_port),
345 RTE_CACHE_LINE_SIZE);
347 DRV_LOG(ERR, "shared context allocation failure");
351 /* Try to open IB device with DV first, then usual Verbs. */
353 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
356 DRV_LOG(DEBUG, "DevX is supported");
358 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
360 err = errno ? errno : ENODEV;
363 DRV_LOG(DEBUG, "DevX is NOT supported");
365 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
367 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
371 sh->max_port = spawn->max_port;
372 strncpy(sh->ibdev_name, sh->ctx->device->name,
373 sizeof(sh->ibdev_name));
374 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
375 sizeof(sh->ibdev_path));
376 pthread_mutex_init(&sh->intr_mutex, NULL);
378 * Setting port_id to max unallowed value means
379 * there is no interrupt subhandler installed for
380 * the given port index i.
382 for (i = 0; i < sh->max_port; i++)
383 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
384 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
385 if (sh->pd == NULL) {
386 DRV_LOG(ERR, "PD allocation failure");
390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
391 err = mlx5_get_pdn(sh->pd, &sh->pdn);
393 DRV_LOG(ERR, "Fail to extract pdn from PD");
396 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
398 * Once the device is added to the list of memory event
399 * callback, its global MR cache table cannot be expanded
400 * on the fly because of deadlock. If it overflows, lookup
401 * should be done by searching MR list linearly, which is slow.
403 * At this point the device is not added to the memory
404 * event list yet, context is just being created.
406 err = mlx5_mr_btree_init(&sh->mr.cache,
407 MLX5_MR_BTREE_CACHE_N * 2,
408 spawn->pci_dev->device.numa_node);
413 mlx5_flow_counters_mng_init(sh);
414 /* Add device to memory callback list. */
415 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
416 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
418 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
419 /* Add context to the global device list. */
420 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
422 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
425 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
428 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
430 claim_zero(mlx5_glue->close_device(sh->ctx));
438 * Free shared IB device context. Decrement counter and if zero free
439 * all allocated resources and close handles.
442 * Pointer to mlx5_ibv_shared object to free
445 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
447 pthread_mutex_lock(&mlx5_ibv_list_mutex);
449 /* Check the object presence in the list. */
450 struct mlx5_ibv_shared *lctx;
452 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
457 DRV_LOG(ERR, "Freeing non-existing shared IB context");
463 /* Secondary process should not free the shared context. */
464 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
467 /* Release created Memory Regions. */
469 /* Remove from memory callback device list. */
470 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
471 LIST_REMOVE(sh, mem_event_cb);
472 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
473 /* Remove context from the global device list. */
474 LIST_REMOVE(sh, next);
476 * Ensure there is no async event handler installed.
477 * Only primary process handles async device events.
479 mlx5_flow_counters_mng_close(sh);
480 assert(!sh->intr_cnt);
482 mlx5_intr_callback_unregister
483 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
484 pthread_mutex_destroy(&sh->intr_mutex);
486 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
488 claim_zero(mlx5_glue->close_device(sh->ctx));
491 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
495 * Initialize DR related data within private structure.
496 * Routine checks the reference counter and does actual
497 * resources creation/initialization only if counter is zero.
500 * Pointer to the private device data structure.
503 * Zero on success, positive error code otherwise.
506 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
508 #ifdef HAVE_MLX5DV_DR
509 struct mlx5_ibv_shared *sh = priv->sh;
515 /* Shared DV/DR structures is already initialized. */
520 /* Reference counter is zero, we should initialize structures. */
521 domain = mlx5_glue->dr_create_domain(sh->ctx,
522 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
524 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
528 sh->rx_domain = domain;
529 domain = mlx5_glue->dr_create_domain(sh->ctx,
530 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
532 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
536 pthread_mutex_init(&sh->dv_mutex, NULL);
537 sh->tx_domain = domain;
538 #ifdef HAVE_MLX5DV_DR_ESWITCH
539 if (priv->config.dv_esw_en) {
540 domain = mlx5_glue->dr_create_domain
541 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
543 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
547 sh->fdb_domain = domain;
548 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
551 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
557 /* Rollback the created objects. */
559 mlx5_glue->dr_destroy_domain(sh->rx_domain);
560 sh->rx_domain = NULL;
563 mlx5_glue->dr_destroy_domain(sh->tx_domain);
564 sh->tx_domain = NULL;
566 if (sh->fdb_domain) {
567 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
568 sh->fdb_domain = NULL;
570 if (sh->esw_drop_action) {
571 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
572 sh->esw_drop_action = NULL;
574 if (sh->pop_vlan_action) {
575 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
576 sh->pop_vlan_action = NULL;
586 * Destroy DR related data within private structure.
589 * Pointer to the private device data structure.
592 mlx5_free_shared_dr(struct mlx5_priv *priv)
594 #ifdef HAVE_MLX5DV_DR
595 struct mlx5_ibv_shared *sh;
597 if (!priv->dr_shared)
602 assert(sh->dv_refcnt);
603 if (sh->dv_refcnt && --sh->dv_refcnt)
606 mlx5_glue->dr_destroy_domain(sh->rx_domain);
607 sh->rx_domain = NULL;
610 mlx5_glue->dr_destroy_domain(sh->tx_domain);
611 sh->tx_domain = NULL;
613 #ifdef HAVE_MLX5DV_DR_ESWITCH
614 if (sh->fdb_domain) {
615 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
616 sh->fdb_domain = NULL;
618 if (sh->esw_drop_action) {
619 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
620 sh->esw_drop_action = NULL;
623 if (sh->pop_vlan_action) {
624 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
625 sh->pop_vlan_action = NULL;
627 pthread_mutex_destroy(&sh->dv_mutex);
634 * Initialize shared data between primary and secondary process.
636 * A memzone is reserved by primary process and secondary processes attach to
640 * 0 on success, a negative errno value otherwise and rte_errno is set.
643 mlx5_init_shared_data(void)
645 const struct rte_memzone *mz;
648 rte_spinlock_lock(&mlx5_shared_data_lock);
649 if (mlx5_shared_data == NULL) {
650 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
651 /* Allocate shared memory. */
652 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
653 sizeof(*mlx5_shared_data),
657 "Cannot allocate mlx5 shared data\n");
661 mlx5_shared_data = mz->addr;
662 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
663 rte_spinlock_init(&mlx5_shared_data->lock);
665 /* Lookup allocated shared memory. */
666 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
669 "Cannot attach mlx5 shared data\n");
673 mlx5_shared_data = mz->addr;
674 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
678 rte_spinlock_unlock(&mlx5_shared_data_lock);
683 * Retrieve integer value from environment variable.
686 * Environment variable name.
689 * Integer value, 0 if the variable is not set.
692 mlx5_getenv_int(const char *name)
694 const char *val = getenv(name);
702 * Verbs callback to allocate a memory. This function should allocate the space
703 * according to the size provided residing inside a huge page.
704 * Please note that all allocation must respect the alignment from libmlx5
705 * (i.e. currently sysconf(_SC_PAGESIZE)).
708 * The size in bytes of the memory to allocate.
710 * A pointer to the callback data.
713 * Allocated buffer, NULL otherwise and rte_errno is set.
716 mlx5_alloc_verbs_buf(size_t size, void *data)
718 struct mlx5_priv *priv = data;
720 size_t alignment = sysconf(_SC_PAGESIZE);
721 unsigned int socket = SOCKET_ID_ANY;
723 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
724 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
726 socket = ctrl->socket;
727 } else if (priv->verbs_alloc_ctx.type ==
728 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
729 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
731 socket = ctrl->socket;
733 assert(data != NULL);
734 ret = rte_malloc_socket(__func__, size, alignment, socket);
741 * Verbs callback to free a memory.
744 * A pointer to the memory to free.
746 * A pointer to the callback data.
749 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
751 assert(data != NULL);
756 * DPDK callback to add udp tunnel port
759 * A pointer to eth_dev
760 * @param[in] udp_tunnel
761 * A pointer to udp tunnel
764 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
767 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
768 struct rte_eth_udp_tunnel *udp_tunnel)
770 assert(udp_tunnel != NULL);
771 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
772 udp_tunnel->udp_port == 4789)
774 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
775 udp_tunnel->udp_port == 4790)
781 * Initialize process private data structure.
784 * Pointer to Ethernet device structure.
787 * 0 on success, a negative errno value otherwise and rte_errno is set.
790 mlx5_proc_priv_init(struct rte_eth_dev *dev)
792 struct mlx5_priv *priv = dev->data->dev_private;
793 struct mlx5_proc_priv *ppriv;
797 * UAR register table follows the process private structure. BlueFlame
798 * registers for Tx queues are stored in the table.
801 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
802 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
803 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
808 ppriv->uar_table_sz = ppriv_size;
809 dev->process_private = ppriv;
814 * Un-initialize process private data structure.
817 * Pointer to Ethernet device structure.
820 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
822 if (!dev->process_private)
824 rte_free(dev->process_private);
825 dev->process_private = NULL;
829 * DPDK callback to close the device.
831 * Destroy all queues and objects, free memory.
834 * Pointer to Ethernet device structure.
837 mlx5_dev_close(struct rte_eth_dev *dev)
839 struct mlx5_priv *priv = dev->data->dev_private;
843 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
845 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
846 /* In case mlx5_dev_stop() has not been called. */
847 mlx5_dev_interrupt_handler_uninstall(dev);
848 mlx5_traffic_disable(dev);
849 mlx5_flow_flush(dev, NULL);
850 /* Prevent crashes when queues are still in use. */
851 dev->rx_pkt_burst = removed_rx_burst;
852 dev->tx_pkt_burst = removed_tx_burst;
854 /* Disable datapath on secondary process. */
855 mlx5_mp_req_stop_rxtx(dev);
856 if (priv->rxqs != NULL) {
857 /* XXX race condition if mlx5_rx_burst() is still running. */
859 for (i = 0; (i != priv->rxqs_n); ++i)
860 mlx5_rxq_release(dev, i);
864 if (priv->txqs != NULL) {
865 /* XXX race condition if mlx5_tx_burst() is still running. */
867 for (i = 0; (i != priv->txqs_n); ++i)
868 mlx5_txq_release(dev, i);
872 mlx5_proc_priv_uninit(dev);
873 mlx5_mprq_free_mp(dev);
874 mlx5_free_shared_dr(priv);
875 if (priv->rss_conf.rss_key != NULL)
876 rte_free(priv->rss_conf.rss_key);
877 if (priv->reta_idx != NULL)
878 rte_free(priv->reta_idx);
880 mlx5_nl_mac_addr_flush(dev);
881 if (priv->nl_socket_route >= 0)
882 close(priv->nl_socket_route);
883 if (priv->nl_socket_rdma >= 0)
884 close(priv->nl_socket_rdma);
885 if (priv->vmwa_context)
886 mlx5_vlan_vmwa_exit(priv->vmwa_context);
889 * Free the shared context in last turn, because the cleanup
890 * routines above may use some shared fields, like
891 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
892 * ifindex if Netlink fails.
894 mlx5_free_shared_ibctx(priv->sh);
897 ret = mlx5_hrxq_verify(dev);
899 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
901 ret = mlx5_ind_table_obj_verify(dev);
903 DRV_LOG(WARNING, "port %u some indirection table still remain",
905 ret = mlx5_rxq_obj_verify(dev);
907 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
909 ret = mlx5_rxq_verify(dev);
911 DRV_LOG(WARNING, "port %u some Rx queues still remain",
913 ret = mlx5_txq_ibv_verify(dev);
915 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
917 ret = mlx5_txq_verify(dev);
919 DRV_LOG(WARNING, "port %u some Tx queues still remain",
921 ret = mlx5_flow_verify(dev);
923 DRV_LOG(WARNING, "port %u some flows still remain",
925 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
929 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
930 struct mlx5_priv *opriv =
931 rte_eth_devices[port_id].data->dev_private;
934 opriv->domain_id != priv->domain_id ||
935 &rte_eth_devices[port_id] == dev)
940 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
942 memset(priv, 0, sizeof(*priv));
943 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
945 * Reset mac_addrs to NULL such that it is not freed as part of
946 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
947 * it is freed when dev_private is freed.
949 dev->data->mac_addrs = NULL;
952 const struct eth_dev_ops mlx5_dev_ops = {
953 .dev_configure = mlx5_dev_configure,
954 .dev_start = mlx5_dev_start,
955 .dev_stop = mlx5_dev_stop,
956 .dev_set_link_down = mlx5_set_link_down,
957 .dev_set_link_up = mlx5_set_link_up,
958 .dev_close = mlx5_dev_close,
959 .promiscuous_enable = mlx5_promiscuous_enable,
960 .promiscuous_disable = mlx5_promiscuous_disable,
961 .allmulticast_enable = mlx5_allmulticast_enable,
962 .allmulticast_disable = mlx5_allmulticast_disable,
963 .link_update = mlx5_link_update,
964 .stats_get = mlx5_stats_get,
965 .stats_reset = mlx5_stats_reset,
966 .xstats_get = mlx5_xstats_get,
967 .xstats_reset = mlx5_xstats_reset,
968 .xstats_get_names = mlx5_xstats_get_names,
969 .fw_version_get = mlx5_fw_version_get,
970 .dev_infos_get = mlx5_dev_infos_get,
971 .read_clock = mlx5_read_clock,
972 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
973 .vlan_filter_set = mlx5_vlan_filter_set,
974 .rx_queue_setup = mlx5_rx_queue_setup,
975 .tx_queue_setup = mlx5_tx_queue_setup,
976 .rx_queue_release = mlx5_rx_queue_release,
977 .tx_queue_release = mlx5_tx_queue_release,
978 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
979 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
980 .mac_addr_remove = mlx5_mac_addr_remove,
981 .mac_addr_add = mlx5_mac_addr_add,
982 .mac_addr_set = mlx5_mac_addr_set,
983 .set_mc_addr_list = mlx5_set_mc_addr_list,
984 .mtu_set = mlx5_dev_set_mtu,
985 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
986 .vlan_offload_set = mlx5_vlan_offload_set,
987 .reta_update = mlx5_dev_rss_reta_update,
988 .reta_query = mlx5_dev_rss_reta_query,
989 .rss_hash_update = mlx5_rss_hash_update,
990 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
991 .filter_ctrl = mlx5_dev_filter_ctrl,
992 .rx_descriptor_status = mlx5_rx_descriptor_status,
993 .tx_descriptor_status = mlx5_tx_descriptor_status,
994 .rx_queue_count = mlx5_rx_queue_count,
995 .rx_queue_intr_enable = mlx5_rx_intr_enable,
996 .rx_queue_intr_disable = mlx5_rx_intr_disable,
997 .is_removed = mlx5_is_removed,
998 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
999 .get_module_info = mlx5_get_module_info,
1000 .get_module_eeprom = mlx5_get_module_eeprom,
1003 /* Available operations from secondary process. */
1004 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1005 .stats_get = mlx5_stats_get,
1006 .stats_reset = mlx5_stats_reset,
1007 .xstats_get = mlx5_xstats_get,
1008 .xstats_reset = mlx5_xstats_reset,
1009 .xstats_get_names = mlx5_xstats_get_names,
1010 .fw_version_get = mlx5_fw_version_get,
1011 .dev_infos_get = mlx5_dev_infos_get,
1012 .rx_descriptor_status = mlx5_rx_descriptor_status,
1013 .tx_descriptor_status = mlx5_tx_descriptor_status,
1014 .get_module_info = mlx5_get_module_info,
1015 .get_module_eeprom = mlx5_get_module_eeprom,
1018 /* Available operations in flow isolated mode. */
1019 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1020 .dev_configure = mlx5_dev_configure,
1021 .dev_start = mlx5_dev_start,
1022 .dev_stop = mlx5_dev_stop,
1023 .dev_set_link_down = mlx5_set_link_down,
1024 .dev_set_link_up = mlx5_set_link_up,
1025 .dev_close = mlx5_dev_close,
1026 .promiscuous_enable = mlx5_promiscuous_enable,
1027 .promiscuous_disable = mlx5_promiscuous_disable,
1028 .allmulticast_enable = mlx5_allmulticast_enable,
1029 .allmulticast_disable = mlx5_allmulticast_disable,
1030 .link_update = mlx5_link_update,
1031 .stats_get = mlx5_stats_get,
1032 .stats_reset = mlx5_stats_reset,
1033 .xstats_get = mlx5_xstats_get,
1034 .xstats_reset = mlx5_xstats_reset,
1035 .xstats_get_names = mlx5_xstats_get_names,
1036 .fw_version_get = mlx5_fw_version_get,
1037 .dev_infos_get = mlx5_dev_infos_get,
1038 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1039 .vlan_filter_set = mlx5_vlan_filter_set,
1040 .rx_queue_setup = mlx5_rx_queue_setup,
1041 .tx_queue_setup = mlx5_tx_queue_setup,
1042 .rx_queue_release = mlx5_rx_queue_release,
1043 .tx_queue_release = mlx5_tx_queue_release,
1044 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1045 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1046 .mac_addr_remove = mlx5_mac_addr_remove,
1047 .mac_addr_add = mlx5_mac_addr_add,
1048 .mac_addr_set = mlx5_mac_addr_set,
1049 .set_mc_addr_list = mlx5_set_mc_addr_list,
1050 .mtu_set = mlx5_dev_set_mtu,
1051 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1052 .vlan_offload_set = mlx5_vlan_offload_set,
1053 .filter_ctrl = mlx5_dev_filter_ctrl,
1054 .rx_descriptor_status = mlx5_rx_descriptor_status,
1055 .tx_descriptor_status = mlx5_tx_descriptor_status,
1056 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1057 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1058 .is_removed = mlx5_is_removed,
1059 .get_module_info = mlx5_get_module_info,
1060 .get_module_eeprom = mlx5_get_module_eeprom,
1064 * Verify and store value for device argument.
1067 * Key argument to verify.
1069 * Value associated with key.
1074 * 0 on success, a negative errno value otherwise and rte_errno is set.
1077 mlx5_args_check(const char *key, const char *val, void *opaque)
1079 struct mlx5_dev_config *config = opaque;
1082 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1083 if (!strcmp(MLX5_REPRESENTOR, key))
1086 tmp = strtoul(val, NULL, 0);
1089 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1092 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1093 config->cqe_comp = !!tmp;
1094 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1095 config->cqe_pad = !!tmp;
1096 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1097 config->hw_padding = !!tmp;
1098 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1099 config->mprq.enabled = !!tmp;
1100 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1101 config->mprq.stride_num_n = tmp;
1102 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1103 config->mprq.max_memcpy_len = tmp;
1104 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1105 config->mprq.min_rxqs_num = tmp;
1106 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1107 DRV_LOG(WARNING, "%s: deprecated parameter,"
1108 " converted to txq_inline_max", key);
1109 config->txq_inline_max = tmp;
1110 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1111 config->txq_inline_max = tmp;
1112 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1113 config->txq_inline_min = tmp;
1114 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1115 config->txq_inline_mpw = tmp;
1116 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1117 config->txqs_inline = tmp;
1118 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1119 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1120 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1121 config->mps = !!tmp;
1122 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1123 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1124 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1125 DRV_LOG(WARNING, "%s: deprecated parameter,"
1126 " converted to txq_inline_mpw", key);
1127 config->txq_inline_mpw = tmp;
1128 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1129 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1130 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1131 config->rx_vec_en = !!tmp;
1132 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1133 config->l3_vxlan_en = !!tmp;
1134 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1135 config->vf_nl_en = !!tmp;
1136 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1137 config->dv_esw_en = !!tmp;
1138 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1139 config->dv_flow_en = !!tmp;
1140 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1141 config->mr_ext_memseg_en = !!tmp;
1142 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1143 config->max_dump_files_num = tmp;
1144 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1145 config->lro.timeout = tmp;
1147 DRV_LOG(WARNING, "%s: unknown parameter", key);
1155 * Parse device parameters.
1158 * Pointer to device configuration structure.
1160 * Device arguments structure.
1163 * 0 on success, a negative errno value otherwise and rte_errno is set.
1166 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1168 const char **params = (const char *[]){
1169 MLX5_RXQ_CQE_COMP_EN,
1170 MLX5_RXQ_CQE_PAD_EN,
1171 MLX5_RXQ_PKT_PAD_EN,
1173 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1174 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1177 MLX5_TXQ_INLINE_MIN,
1178 MLX5_TXQ_INLINE_MAX,
1179 MLX5_TXQ_INLINE_MPW,
1180 MLX5_TXQS_MIN_INLINE,
1183 MLX5_TXQ_MPW_HDR_DSEG_EN,
1184 MLX5_TXQ_MAX_INLINE_LEN,
1191 MLX5_MR_EXT_MEMSEG_EN,
1193 MLX5_MAX_DUMP_FILES_NUM,
1194 MLX5_LRO_TIMEOUT_USEC,
1197 struct rte_kvargs *kvlist;
1201 if (devargs == NULL)
1203 /* Following UGLY cast is done to pass checkpatch. */
1204 kvlist = rte_kvargs_parse(devargs->args, params);
1205 if (kvlist == NULL) {
1209 /* Process parameters. */
1210 for (i = 0; (params[i] != NULL); ++i) {
1211 if (rte_kvargs_count(kvlist, params[i])) {
1212 ret = rte_kvargs_process(kvlist, params[i],
1213 mlx5_args_check, config);
1216 rte_kvargs_free(kvlist);
1221 rte_kvargs_free(kvlist);
1225 static struct rte_pci_driver mlx5_driver;
1228 * PMD global initialization.
1230 * Independent from individual device, this function initializes global
1231 * per-PMD data structures distinguishing primary and secondary processes.
1232 * Hence, each initialization is called once per a process.
1235 * 0 on success, a negative errno value otherwise and rte_errno is set.
1238 mlx5_init_once(void)
1240 struct mlx5_shared_data *sd;
1241 struct mlx5_local_data *ld = &mlx5_local_data;
1244 if (mlx5_init_shared_data())
1246 sd = mlx5_shared_data;
1248 rte_spinlock_lock(&sd->lock);
1249 switch (rte_eal_process_type()) {
1250 case RTE_PROC_PRIMARY:
1253 LIST_INIT(&sd->mem_event_cb_list);
1254 rte_rwlock_init(&sd->mem_event_rwlock);
1255 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1256 mlx5_mr_mem_event_cb, NULL);
1257 ret = mlx5_mp_init_primary();
1260 sd->init_done = true;
1262 case RTE_PROC_SECONDARY:
1265 ret = mlx5_mp_init_secondary();
1268 ++sd->secondary_cnt;
1269 ld->init_done = true;
1275 rte_spinlock_unlock(&sd->lock);
1280 * Configures the minimal amount of data to inline into WQE
1281 * while sending packets.
1283 * - the txq_inline_min has the maximal priority, if this
1284 * key is specified in devargs
1285 * - if DevX is enabled the inline mode is queried from the
1286 * device (HCA attributes and NIC vport context if needed).
1287 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1288 * and none (0 bytes) for other NICs
1291 * Verbs device parameters (name, port, switch_info) to spawn.
1293 * Device configuration parameters.
1296 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1297 struct mlx5_dev_config *config)
1299 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1300 /* Application defines size of inlined data explicitly. */
1301 switch (spawn->pci_dev->id.device_id) {
1302 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1303 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1304 if (config->txq_inline_min <
1305 (int)MLX5_INLINE_HSIZE_L2) {
1307 "txq_inline_mix aligned to minimal"
1308 " ConnectX-4 required value %d",
1309 (int)MLX5_INLINE_HSIZE_L2);
1310 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1316 if (config->hca_attr.eth_net_offloads) {
1317 /* We have DevX enabled, inline mode queried successfully. */
1318 switch (config->hca_attr.wqe_inline_mode) {
1319 case MLX5_CAP_INLINE_MODE_L2:
1320 /* outer L2 header must be inlined. */
1321 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1323 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1324 /* No inline data are required by NIC. */
1325 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1326 config->hw_vlan_insert =
1327 config->hca_attr.wqe_vlan_insert;
1328 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1330 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1331 /* inline mode is defined by NIC vport context. */
1332 if (!config->hca_attr.eth_virt)
1334 switch (config->hca_attr.vport_inline_mode) {
1335 case MLX5_INLINE_MODE_NONE:
1336 config->txq_inline_min =
1337 MLX5_INLINE_HSIZE_NONE;
1339 case MLX5_INLINE_MODE_L2:
1340 config->txq_inline_min =
1341 MLX5_INLINE_HSIZE_L2;
1343 case MLX5_INLINE_MODE_IP:
1344 config->txq_inline_min =
1345 MLX5_INLINE_HSIZE_L3;
1347 case MLX5_INLINE_MODE_TCP_UDP:
1348 config->txq_inline_min =
1349 MLX5_INLINE_HSIZE_L4;
1351 case MLX5_INLINE_MODE_INNER_L2:
1352 config->txq_inline_min =
1353 MLX5_INLINE_HSIZE_INNER_L2;
1355 case MLX5_INLINE_MODE_INNER_IP:
1356 config->txq_inline_min =
1357 MLX5_INLINE_HSIZE_INNER_L3;
1359 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1360 config->txq_inline_min =
1361 MLX5_INLINE_HSIZE_INNER_L4;
1367 * We get here if we are unable to deduce
1368 * inline data size with DevX. Try PCI ID
1369 * to determine old NICs.
1371 switch (spawn->pci_dev->id.device_id) {
1372 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1373 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1374 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1375 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1376 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1377 config->hw_vlan_insert = 0;
1379 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1380 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1381 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1382 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1384 * These NICs support VLAN insertion from WQE and
1385 * report the wqe_vlan_insert flag. But there is the bug
1386 * and PFC control may be broken, so disable feature.
1388 config->hw_vlan_insert = 0;
1389 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1392 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1396 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1400 * Allocate page of door-bells and register it using DevX API.
1403 * Pointer to Ethernet device.
1406 * Pointer to new page on success, NULL otherwise.
1408 static struct mlx5_devx_dbr_page *
1409 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1411 struct mlx5_priv *priv = dev->data->dev_private;
1412 struct mlx5_devx_dbr_page *page;
1414 /* Allocate space for door-bell page and management data. */
1415 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1416 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1418 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1419 dev->data->port_id);
1422 /* Register allocated memory. */
1423 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1424 MLX5_DBR_PAGE_SIZE, 0);
1426 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1427 dev->data->port_id);
1435 * Find the next available door-bell, allocate new page if needed.
1438 * Pointer to Ethernet device.
1439 * @param [out] dbr_page
1440 * Door-bell page containing the page data.
1443 * Door-bell address offset on success, a negative error value otherwise.
1446 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1448 struct mlx5_priv *priv = dev->data->dev_private;
1449 struct mlx5_devx_dbr_page *page = NULL;
1452 LIST_FOREACH(page, &priv->dbrpgs, next)
1453 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1455 if (!page) { /* No page with free door-bell exists. */
1456 page = mlx5_alloc_dbr_page(dev);
1457 if (!page) /* Failed to allocate new page. */
1459 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1461 /* Loop to find bitmap part with clear bit. */
1463 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1466 /* Find the first clear bit. */
1467 j = rte_bsf64(~page->dbr_bitmap[i]);
1468 assert(i < (MLX5_DBR_PER_PAGE / 64));
1469 page->dbr_bitmap[i] |= (1 << j);
1472 return (((i * 64) + j) * sizeof(uint64_t));
1476 * Release a door-bell record.
1479 * Pointer to Ethernet device.
1480 * @param [in] umem_id
1481 * UMEM ID of page containing the door-bell record to release.
1482 * @param [in] offset
1483 * Offset of door-bell record in page.
1486 * 0 on success, a negative error value otherwise.
1489 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1491 struct mlx5_priv *priv = dev->data->dev_private;
1492 struct mlx5_devx_dbr_page *page = NULL;
1495 LIST_FOREACH(page, &priv->dbrpgs, next)
1496 /* Find the page this address belongs to. */
1497 if (page->umem->umem_id == umem_id)
1502 if (!page->dbr_count) {
1503 /* Page not used, free it and remove from list. */
1504 LIST_REMOVE(page, next);
1506 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1509 /* Mark in bitmap that this door-bell is not in use. */
1510 offset /= MLX5_DBR_SIZE;
1511 int i = offset / 64;
1512 int j = offset % 64;
1514 page->dbr_bitmap[i] &= ~(1 << j);
1520 * Spawn an Ethernet device from Verbs information.
1523 * Backing DPDK device.
1525 * Verbs device parameters (name, port, switch_info) to spawn.
1527 * Device configuration parameters.
1530 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1531 * is set. The following errors are defined:
1533 * EBUSY: device is not supposed to be spawned.
1534 * EEXIST: device is already spawned
1536 static struct rte_eth_dev *
1537 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1538 struct mlx5_dev_spawn_data *spawn,
1539 struct mlx5_dev_config config)
1541 const struct mlx5_switch_info *switch_info = &spawn->info;
1542 struct mlx5_ibv_shared *sh = NULL;
1543 struct ibv_port_attr port_attr;
1544 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1545 struct rte_eth_dev *eth_dev = NULL;
1546 struct mlx5_priv *priv = NULL;
1548 unsigned int hw_padding = 0;
1550 unsigned int cqe_comp;
1551 unsigned int cqe_pad = 0;
1552 unsigned int tunnel_en = 0;
1553 unsigned int mpls_en = 0;
1554 unsigned int swp = 0;
1555 unsigned int mprq = 0;
1556 unsigned int mprq_min_stride_size_n = 0;
1557 unsigned int mprq_max_stride_size_n = 0;
1558 unsigned int mprq_min_stride_num_n = 0;
1559 unsigned int mprq_max_stride_num_n = 0;
1560 struct rte_ether_addr mac;
1561 char name[RTE_ETH_NAME_MAX_LEN];
1562 int own_domain_id = 0;
1566 /* Determine if this port representor is supposed to be spawned. */
1567 if (switch_info->representor && dpdk_dev->devargs) {
1568 struct rte_eth_devargs eth_da;
1570 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1573 DRV_LOG(ERR, "failed to process device arguments: %s",
1574 strerror(rte_errno));
1577 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1578 if (eth_da.representor_ports[i] ==
1579 (uint16_t)switch_info->port_name)
1581 if (i == eth_da.nb_representor_ports) {
1586 /* Build device name. */
1587 if (spawn->pf_bond < 0) {
1588 /* Single device. */
1589 if (!switch_info->representor)
1590 strlcpy(name, dpdk_dev->name, sizeof(name));
1592 snprintf(name, sizeof(name), "%s_representor_%u",
1593 dpdk_dev->name, switch_info->port_name);
1595 /* Bonding device. */
1596 if (!switch_info->representor)
1597 snprintf(name, sizeof(name), "%s_%s",
1598 dpdk_dev->name, spawn->ibv_dev->name);
1600 snprintf(name, sizeof(name), "%s_%s_representor_%u",
1601 dpdk_dev->name, spawn->ibv_dev->name,
1602 switch_info->port_name);
1604 /* check if the device is already spawned */
1605 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1609 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1610 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1611 eth_dev = rte_eth_dev_attach_secondary(name);
1612 if (eth_dev == NULL) {
1613 DRV_LOG(ERR, "can not attach rte ethdev");
1617 eth_dev->device = dpdk_dev;
1618 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1619 err = mlx5_proc_priv_init(eth_dev);
1622 /* Receive command fd from primary process */
1623 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1626 /* Remap UAR for Tx queues. */
1627 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1631 * Ethdev pointer is still required as input since
1632 * the primary device is not accessible from the
1633 * secondary process.
1635 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1636 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1639 sh = mlx5_alloc_shared_ibctx(spawn);
1642 config.devx = sh->devx;
1643 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1644 config.dest_tir = 1;
1646 #ifdef HAVE_IBV_MLX5_MOD_SWP
1647 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1650 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1651 * as all ConnectX-5 devices.
1653 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1654 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1656 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1657 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1659 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1660 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1661 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1662 DRV_LOG(DEBUG, "enhanced MPW is supported");
1663 mps = MLX5_MPW_ENHANCED;
1665 DRV_LOG(DEBUG, "MPW is supported");
1669 DRV_LOG(DEBUG, "MPW isn't supported");
1670 mps = MLX5_MPW_DISABLED;
1672 #ifdef HAVE_IBV_MLX5_MOD_SWP
1673 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1674 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1675 DRV_LOG(DEBUG, "SWP support: %u", swp);
1678 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1679 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1680 struct mlx5dv_striding_rq_caps mprq_caps =
1681 dv_attr.striding_rq_caps;
1683 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1684 mprq_caps.min_single_stride_log_num_of_bytes);
1685 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1686 mprq_caps.max_single_stride_log_num_of_bytes);
1687 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1688 mprq_caps.min_single_wqe_log_num_of_strides);
1689 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1690 mprq_caps.max_single_wqe_log_num_of_strides);
1691 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1692 mprq_caps.supported_qpts);
1693 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1695 mprq_min_stride_size_n =
1696 mprq_caps.min_single_stride_log_num_of_bytes;
1697 mprq_max_stride_size_n =
1698 mprq_caps.max_single_stride_log_num_of_bytes;
1699 mprq_min_stride_num_n =
1700 mprq_caps.min_single_wqe_log_num_of_strides;
1701 mprq_max_stride_num_n =
1702 mprq_caps.max_single_wqe_log_num_of_strides;
1703 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1704 mprq_min_stride_num_n);
1707 if (RTE_CACHE_LINE_SIZE == 128 &&
1708 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1712 config.cqe_comp = cqe_comp;
1713 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1714 /* Whether device supports 128B Rx CQE padding. */
1715 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1716 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1718 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1719 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1720 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1721 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1722 (dv_attr.tunnel_offloads_caps &
1723 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1725 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1726 tunnel_en ? "" : "not ");
1729 "tunnel offloading disabled due to old OFED/rdma-core version");
1731 config.tunnel_en = tunnel_en;
1732 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1733 mpls_en = ((dv_attr.tunnel_offloads_caps &
1734 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1735 (dv_attr.tunnel_offloads_caps &
1736 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1737 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1738 mpls_en ? "" : "not ");
1740 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1741 " old OFED/rdma-core version or firmware configuration");
1743 config.mpls_en = mpls_en;
1744 /* Check port status. */
1745 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1747 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1750 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1751 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1755 if (port_attr.state != IBV_PORT_ACTIVE)
1756 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1757 mlx5_glue->port_state_str(port_attr.state),
1759 /* Allocate private eth device data. */
1760 priv = rte_zmalloc("ethdev private structure",
1762 RTE_CACHE_LINE_SIZE);
1764 DRV_LOG(ERR, "priv allocation failure");
1769 priv->ibv_port = spawn->ibv_port;
1770 priv->pci_dev = spawn->pci_dev;
1771 priv->mtu = RTE_ETHER_MTU;
1773 /* Initialize UAR access locks for 32bit implementations. */
1774 rte_spinlock_init(&priv->uar_lock_cq);
1775 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1776 rte_spinlock_init(&priv->uar_lock[i]);
1778 /* Some internal functions rely on Netlink sockets, open them now. */
1779 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1780 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1782 priv->representor = !!switch_info->representor;
1783 priv->master = !!switch_info->master;
1784 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1786 * Currently we support single E-Switch per PF configurations
1787 * only and vport_id field contains the vport index for
1788 * associated VF, which is deduced from representor port name.
1789 * For example, let's have the IB device port 10, it has
1790 * attached network device eth0, which has port name attribute
1791 * pf0vf2, we can deduce the VF number as 2, and set vport index
1792 * as 3 (2+1). This assigning schema should be changed if the
1793 * multiple E-Switch instances per PF configurations or/and PCI
1794 * subfunctions are added.
1796 priv->vport_id = switch_info->representor ?
1797 switch_info->port_name + 1 : -1;
1798 /* representor_id field keeps the unmodified port/VF index. */
1799 priv->representor_id = switch_info->representor ?
1800 switch_info->port_name : -1;
1802 * Look for sibling devices in order to reuse their switch domain
1803 * if any, otherwise allocate one.
1805 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1806 const struct mlx5_priv *opriv =
1807 rte_eth_devices[port_id].data->dev_private;
1811 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1813 priv->domain_id = opriv->domain_id;
1816 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1817 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1820 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1821 strerror(rte_errno));
1826 err = mlx5_args(&config, dpdk_dev->devargs);
1829 DRV_LOG(ERR, "failed to process device arguments: %s",
1830 strerror(rte_errno));
1833 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1834 IBV_DEVICE_RAW_IP_CSUM);
1835 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1836 (config.hw_csum ? "" : "not "));
1837 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1838 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1839 DRV_LOG(DEBUG, "counters are not supported");
1841 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1842 if (config.dv_flow_en) {
1843 DRV_LOG(WARNING, "DV flow is not supported");
1844 config.dv_flow_en = 0;
1847 config.ind_table_max_size =
1848 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1850 * Remove this check once DPDK supports larger/variable
1851 * indirection tables.
1853 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1854 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1855 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1856 config.ind_table_max_size);
1857 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1858 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1859 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1860 (config.hw_vlan_strip ? "" : "not "));
1861 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1862 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1863 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1864 (config.hw_fcs_strip ? "" : "not "));
1865 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1866 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1867 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1868 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1869 IBV_DEVICE_PCI_WRITE_END_PADDING);
1871 if (config.hw_padding && !hw_padding) {
1872 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1873 config.hw_padding = 0;
1874 } else if (config.hw_padding) {
1875 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1877 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1878 (sh->device_attr.tso_caps.supported_qpts &
1879 (1 << IBV_QPT_RAW_PACKET)));
1881 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1883 * MPW is disabled by default, while the Enhanced MPW is enabled
1886 if (config.mps == MLX5_ARG_UNSET)
1887 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1890 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1891 DRV_LOG(INFO, "%sMPS is %s",
1892 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1893 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1894 if (config.cqe_comp && !cqe_comp) {
1895 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1896 config.cqe_comp = 0;
1898 if (config.cqe_pad && !cqe_pad) {
1899 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1901 } else if (config.cqe_pad) {
1902 DRV_LOG(INFO, "Rx CQE padding is enabled");
1905 priv->counter_fallback = 0;
1906 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1911 if (!config.hca_attr.flow_counters_dump)
1912 priv->counter_fallback = 1;
1913 #ifndef HAVE_IBV_DEVX_ASYNC
1914 priv->counter_fallback = 1;
1916 if (priv->counter_fallback)
1917 DRV_LOG(INFO, "Use fall-back DV counter management\n");
1918 /* Check for LRO support. */
1919 if (config.dest_tir && config.hca_attr.lro_cap) {
1920 /* TBD check tunnel lro caps. */
1921 config.lro.supported = config.hca_attr.lro_cap;
1922 DRV_LOG(DEBUG, "Device supports LRO");
1924 * If LRO timeout is not configured by application,
1925 * use the minimal supported value.
1927 if (!config.lro.timeout)
1928 config.lro.timeout =
1929 config.hca_attr.lro_timer_supported_periods[0];
1930 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1931 config.lro.timeout);
1934 if (config.mprq.enabled && mprq) {
1935 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1936 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1937 config.mprq.stride_num_n =
1938 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1939 mprq_min_stride_num_n);
1941 "the number of strides"
1942 " for Multi-Packet RQ is out of range,"
1943 " setting default value (%u)",
1944 1 << config.mprq.stride_num_n);
1946 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1947 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1948 } else if (config.mprq.enabled && !mprq) {
1949 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1950 config.mprq.enabled = 0;
1952 if (config.max_dump_files_num == 0)
1953 config.max_dump_files_num = 128;
1954 eth_dev = rte_eth_dev_allocate(name);
1955 if (eth_dev == NULL) {
1956 DRV_LOG(ERR, "can not allocate rte ethdev");
1960 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1961 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1962 if (priv->representor) {
1963 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1964 eth_dev->data->representor_id = priv->representor_id;
1967 * Store associated network device interface index. This index
1968 * is permanent throughout the lifetime of device. So, we may store
1969 * the ifindex here and use the cached value further.
1971 assert(spawn->ifindex);
1972 priv->if_index = spawn->ifindex;
1973 eth_dev->data->dev_private = priv;
1974 priv->dev_data = eth_dev->data;
1975 eth_dev->data->mac_addrs = priv->mac;
1976 eth_dev->device = dpdk_dev;
1977 /* Configure the first MAC address by default. */
1978 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1980 "port %u cannot get MAC address, is mlx5_en"
1981 " loaded? (errno: %s)",
1982 eth_dev->data->port_id, strerror(rte_errno));
1987 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1988 eth_dev->data->port_id,
1989 mac.addr_bytes[0], mac.addr_bytes[1],
1990 mac.addr_bytes[2], mac.addr_bytes[3],
1991 mac.addr_bytes[4], mac.addr_bytes[5]);
1994 char ifname[IF_NAMESIZE];
1996 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1997 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1998 eth_dev->data->port_id, ifname);
2000 DRV_LOG(DEBUG, "port %u ifname is unknown",
2001 eth_dev->data->port_id);
2004 /* Get actual MTU if possible. */
2005 err = mlx5_get_mtu(eth_dev, &priv->mtu);
2010 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2012 /* Initialize burst functions to prevent crashes before link-up. */
2013 eth_dev->rx_pkt_burst = removed_rx_burst;
2014 eth_dev->tx_pkt_burst = removed_tx_burst;
2015 eth_dev->dev_ops = &mlx5_dev_ops;
2016 /* Register MAC address. */
2017 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2018 if (config.vf && config.vf_nl_en)
2019 mlx5_nl_mac_addr_sync(eth_dev);
2020 TAILQ_INIT(&priv->flows);
2021 TAILQ_INIT(&priv->ctrl_flows);
2022 /* Hint libmlx5 to use PMD allocator for data plane resources */
2023 struct mlx5dv_ctx_allocators alctr = {
2024 .alloc = &mlx5_alloc_verbs_buf,
2025 .free = &mlx5_free_verbs_buf,
2028 mlx5_glue->dv_set_context_attr(sh->ctx,
2029 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2030 (void *)((uintptr_t)&alctr));
2031 /* Bring Ethernet device up. */
2032 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2033 eth_dev->data->port_id);
2034 mlx5_set_link_up(eth_dev);
2036 * Even though the interrupt handler is not installed yet,
2037 * interrupts will still trigger on the async_fd from
2038 * Verbs context returned by ibv_open_device().
2040 mlx5_link_update(eth_dev, 0);
2041 #ifdef HAVE_MLX5DV_DR_ESWITCH
2042 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2043 (switch_info->representor || switch_info->master)))
2044 config.dv_esw_en = 0;
2046 config.dv_esw_en = 0;
2048 /* Detect minimal data bytes to inline. */
2049 mlx5_set_min_inline(spawn, &config);
2050 /* Store device configuration on private structure. */
2051 priv->config = config;
2052 /* Create context for virtual machine VLAN workaround. */
2053 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2054 if (config.dv_flow_en) {
2055 err = mlx5_alloc_shared_dr(priv);
2059 /* Supported Verbs flow priority number detection. */
2060 err = mlx5_flow_discover_priorities(eth_dev);
2065 priv->config.flow_prio = err;
2070 mlx5_free_shared_dr(priv);
2071 if (priv->nl_socket_route >= 0)
2072 close(priv->nl_socket_route);
2073 if (priv->nl_socket_rdma >= 0)
2074 close(priv->nl_socket_rdma);
2075 if (priv->vmwa_context)
2076 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2078 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2080 if (eth_dev != NULL)
2081 eth_dev->data->dev_private = NULL;
2083 if (eth_dev != NULL) {
2084 /* mac_addrs must not be freed alone because part of dev_private */
2085 eth_dev->data->mac_addrs = NULL;
2086 rte_eth_dev_release_port(eth_dev);
2089 mlx5_free_shared_ibctx(sh);
2096 * Comparison callback to sort device data.
2098 * This is meant to be used with qsort().
2101 * Pointer to pointer to first data object.
2103 * Pointer to pointer to second data object.
2106 * 0 if both objects are equal, less than 0 if the first argument is less
2107 * than the second, greater than 0 otherwise.
2110 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2112 const struct mlx5_switch_info *si_a =
2113 &((const struct mlx5_dev_spawn_data *)a)->info;
2114 const struct mlx5_switch_info *si_b =
2115 &((const struct mlx5_dev_spawn_data *)b)->info;
2118 /* Master device first. */
2119 ret = si_b->master - si_a->master;
2122 /* Then representor devices. */
2123 ret = si_b->representor - si_a->representor;
2126 /* Unidentified devices come last in no specific order. */
2127 if (!si_a->representor)
2129 /* Order representors by name. */
2130 return si_a->port_name - si_b->port_name;
2134 * Match PCI information for possible slaves of bonding device.
2136 * @param[in] ibv_dev
2137 * Pointer to Infiniband device structure.
2138 * @param[in] pci_dev
2139 * Pointer to PCI device structure to match PCI address.
2140 * @param[in] nl_rdma
2141 * Netlink RDMA group socket handle.
2144 * negative value if no bonding device found, otherwise
2145 * positive index of slave PF in bonding.
2148 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2149 const struct rte_pci_device *pci_dev,
2152 char ifname[IF_NAMESIZE + 1];
2153 unsigned int ifindex;
2159 * Try to get master device name. If something goes
2160 * wrong suppose the lack of kernel support and no
2165 if (!strstr(ibv_dev->name, "bond"))
2167 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2171 * The Master device might not be on the predefined
2172 * port (not on port index 1, it is not garanted),
2173 * we have to scan all Infiniband device port and
2176 for (i = 1; i <= np; ++i) {
2177 /* Check whether Infiniband port is populated. */
2178 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2181 if (!if_indextoname(ifindex, ifname))
2183 /* Try to read bonding slave names from sysfs. */
2185 "/sys/class/net/%s/master/bonding/slaves", ifname);
2186 file = fopen(slaves, "r");
2192 /* Use safe format to check maximal buffer length. */
2193 assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2194 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2195 char tmp_str[IF_NAMESIZE + 32];
2196 struct rte_pci_addr pci_addr;
2197 struct mlx5_switch_info info;
2199 /* Process slave interface names in the loop. */
2200 snprintf(tmp_str, sizeof(tmp_str),
2201 "/sys/class/net/%s", ifname);
2202 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2203 DRV_LOG(WARNING, "can not get PCI address"
2204 " for netdev \"%s\"", ifname);
2207 if (pci_dev->addr.domain != pci_addr.domain ||
2208 pci_dev->addr.bus != pci_addr.bus ||
2209 pci_dev->addr.devid != pci_addr.devid ||
2210 pci_dev->addr.function != pci_addr.function)
2212 /* Slave interface PCI address match found. */
2214 snprintf(tmp_str, sizeof(tmp_str),
2215 "/sys/class/net/%s/phys_port_name", ifname);
2216 file = fopen(tmp_str, "rb");
2219 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2220 if (fscanf(file, "%32s", tmp_str) == 1)
2221 mlx5_translate_port_name(tmp_str, &info);
2222 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2223 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2224 pf = info.port_name;
2233 * DPDK callback to register a PCI device.
2235 * This function spawns Ethernet devices out of a given PCI device.
2237 * @param[in] pci_drv
2238 * PCI driver structure (mlx5_driver).
2239 * @param[in] pci_dev
2240 * PCI device information.
2243 * 0 on success, a negative errno value otherwise and rte_errno is set.
2246 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2247 struct rte_pci_device *pci_dev)
2249 struct ibv_device **ibv_list;
2251 * Number of found IB Devices matching with requested PCI BDF.
2252 * nd != 1 means there are multiple IB devices over the same
2253 * PCI device and we have representors and master.
2255 unsigned int nd = 0;
2257 * Number of found IB device Ports. nd = 1 and np = 1..n means
2258 * we have the single multiport IB device, and there may be
2259 * representors attached to some of found ports.
2261 unsigned int np = 0;
2263 * Number of DPDK ethernet devices to Spawn - either over
2264 * multiple IB devices or multiple ports of single IB device.
2265 * Actually this is the number of iterations to spawn.
2267 unsigned int ns = 0;
2270 * < 0 - no bonding device (single one)
2271 * >= 0 - bonding device (value is slave PF index)
2274 struct mlx5_dev_spawn_data *list = NULL;
2275 struct mlx5_dev_config dev_config;
2278 ret = mlx5_init_once();
2280 DRV_LOG(ERR, "unable to init PMD global data: %s",
2281 strerror(rte_errno));
2284 assert(pci_drv == &mlx5_driver);
2286 ibv_list = mlx5_glue->get_device_list(&ret);
2288 rte_errno = errno ? errno : ENOSYS;
2289 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2293 * First scan the list of all Infiniband devices to find
2294 * matching ones, gathering into the list.
2296 struct ibv_device *ibv_match[ret + 1];
2297 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2298 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2302 struct rte_pci_addr pci_addr;
2304 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2305 bd = mlx5_device_bond_pci_match
2306 (ibv_list[ret], pci_dev, nl_rdma);
2309 * Bonding device detected. Only one match is allowed,
2310 * the bonding is supported over multi-port IB device,
2311 * there should be no matches on representor PCI
2312 * functions or non VF LAG bonding devices with
2313 * specified address.
2317 "multiple PCI match on bonding device"
2318 "\"%s\" found", ibv_list[ret]->name);
2323 DRV_LOG(INFO, "PCI information matches for"
2324 " slave %d bonding device \"%s\"",
2325 bd, ibv_list[ret]->name);
2326 ibv_match[nd++] = ibv_list[ret];
2329 if (mlx5_dev_to_pci_addr
2330 (ibv_list[ret]->ibdev_path, &pci_addr))
2332 if (pci_dev->addr.domain != pci_addr.domain ||
2333 pci_dev->addr.bus != pci_addr.bus ||
2334 pci_dev->addr.devid != pci_addr.devid ||
2335 pci_dev->addr.function != pci_addr.function)
2337 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2338 ibv_list[ret]->name);
2339 ibv_match[nd++] = ibv_list[ret];
2341 ibv_match[nd] = NULL;
2343 /* No device matches, just complain and bail out. */
2345 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2346 " are kernel drivers loaded?",
2347 pci_dev->addr.domain, pci_dev->addr.bus,
2348 pci_dev->addr.devid, pci_dev->addr.function);
2355 * Found single matching device may have multiple ports.
2356 * Each port may be representor, we have to check the port
2357 * number and check the representors existence.
2360 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2362 DRV_LOG(WARNING, "can not get IB device \"%s\""
2363 " ports number", ibv_match[0]->name);
2364 if (bd >= 0 && !np) {
2365 DRV_LOG(ERR, "can not get ports"
2366 " for bonding device");
2372 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2375 * This may happen if there is VF LAG kernel support and
2376 * application is compiled with older rdma_core library.
2379 "No kernel/verbs support for VF LAG bonding found.");
2380 rte_errno = ENOTSUP;
2386 * Now we can determine the maximal
2387 * amount of devices to be spawned.
2389 list = rte_zmalloc("device spawn data",
2390 sizeof(struct mlx5_dev_spawn_data) *
2392 RTE_CACHE_LINE_SIZE);
2394 DRV_LOG(ERR, "spawn data array allocation failure");
2399 if (bd >= 0 || np > 1) {
2401 * Single IB device with multiple ports found,
2402 * it may be E-Switch master device and representors.
2403 * We have to perform identification trough the ports.
2405 assert(nl_rdma >= 0);
2409 for (i = 1; i <= np; ++i) {
2410 list[ns].max_port = np;
2411 list[ns].ibv_port = i;
2412 list[ns].ibv_dev = ibv_match[0];
2413 list[ns].eth_dev = NULL;
2414 list[ns].pci_dev = pci_dev;
2415 list[ns].pf_bond = bd;
2416 list[ns].ifindex = mlx5_nl_ifindex
2417 (nl_rdma, list[ns].ibv_dev->name, i);
2418 if (!list[ns].ifindex) {
2420 * No network interface index found for the
2421 * specified port, it means there is no
2422 * representor on this port. It's OK,
2423 * there can be disabled ports, for example
2424 * if sriov_numvfs < sriov_totalvfs.
2430 ret = mlx5_nl_switch_info
2434 if (ret || (!list[ns].info.representor &&
2435 !list[ns].info.master)) {
2437 * We failed to recognize representors with
2438 * Netlink, let's try to perform the task
2441 ret = mlx5_sysfs_switch_info
2445 if (!ret && bd >= 0) {
2446 switch (list[ns].info.name_type) {
2447 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2448 if (list[ns].info.port_name == bd)
2451 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2452 if (list[ns].info.pf_num == bd)
2460 if (!ret && (list[ns].info.representor ^
2461 list[ns].info.master))
2466 "unable to recognize master/representors"
2467 " on the IB device with multiple ports");
2474 * The existence of several matching entries (nd > 1) means
2475 * port representors have been instantiated. No existing Verbs
2476 * call nor sysfs entries can tell them apart, this can only
2477 * be done through Netlink calls assuming kernel drivers are
2478 * recent enough to support them.
2480 * In the event of identification failure through Netlink,
2481 * try again through sysfs, then:
2483 * 1. A single IB device matches (nd == 1) with single
2484 * port (np=0/1) and is not a representor, assume
2485 * no switch support.
2487 * 2. Otherwise no safe assumptions can be made;
2488 * complain louder and bail out.
2491 for (i = 0; i != nd; ++i) {
2492 memset(&list[ns].info, 0, sizeof(list[ns].info));
2493 list[ns].max_port = 1;
2494 list[ns].ibv_port = 1;
2495 list[ns].ibv_dev = ibv_match[i];
2496 list[ns].eth_dev = NULL;
2497 list[ns].pci_dev = pci_dev;
2498 list[ns].pf_bond = -1;
2499 list[ns].ifindex = 0;
2501 list[ns].ifindex = mlx5_nl_ifindex
2502 (nl_rdma, list[ns].ibv_dev->name, 1);
2503 if (!list[ns].ifindex) {
2504 char ifname[IF_NAMESIZE];
2507 * Netlink failed, it may happen with old
2508 * ib_core kernel driver (before 4.16).
2509 * We can assume there is old driver because
2510 * here we are processing single ports IB
2511 * devices. Let's try sysfs to retrieve
2512 * the ifindex. The method works for
2513 * master device only.
2517 * Multiple devices found, assume
2518 * representors, can not distinguish
2519 * master/representor and retrieve
2520 * ifindex via sysfs.
2524 ret = mlx5_get_master_ifname
2525 (ibv_match[i]->ibdev_path, &ifname);
2528 if_nametoindex(ifname);
2529 if (!list[ns].ifindex) {
2531 * No network interface index found
2532 * for the specified device, it means
2533 * there it is neither representor
2541 ret = mlx5_nl_switch_info
2545 if (ret || (!list[ns].info.representor &&
2546 !list[ns].info.master)) {
2548 * We failed to recognize representors with
2549 * Netlink, let's try to perform the task
2552 ret = mlx5_sysfs_switch_info
2556 if (!ret && (list[ns].info.representor ^
2557 list[ns].info.master)) {
2559 } else if ((nd == 1) &&
2560 !list[ns].info.representor &&
2561 !list[ns].info.master) {
2563 * Single IB device with
2564 * one physical port and
2565 * attached network device.
2566 * May be SRIOV is not enabled
2567 * or there is no representors.
2569 DRV_LOG(INFO, "no E-Switch support detected");
2576 "unable to recognize master/representors"
2577 " on the multiple IB devices");
2585 * Sort list to probe devices in natural order for users convenience
2586 * (i.e. master first, then representors from lowest to highest ID).
2588 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2589 /* Default configuration. */
2590 dev_config = (struct mlx5_dev_config){
2592 .mps = MLX5_ARG_UNSET,
2594 .txq_inline_max = MLX5_ARG_UNSET,
2595 .txq_inline_min = MLX5_ARG_UNSET,
2596 .txq_inline_mpw = MLX5_ARG_UNSET,
2597 .txqs_inline = MLX5_ARG_UNSET,
2599 .mr_ext_memseg_en = 1,
2601 .enabled = 0, /* Disabled by default. */
2602 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2603 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2604 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2608 /* Device specific configuration. */
2609 switch (pci_dev->id.device_id) {
2610 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2611 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2612 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2613 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2614 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2615 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2621 for (i = 0; i != ns; ++i) {
2624 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2627 if (!list[i].eth_dev) {
2628 if (rte_errno != EBUSY && rte_errno != EEXIST)
2630 /* Device is disabled or already spawned. Ignore it. */
2633 restore = list[i].eth_dev->data->dev_flags;
2634 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2635 /* Restore non-PCI flags cleared by the above call. */
2636 list[i].eth_dev->data->dev_flags |= restore;
2637 rte_eth_dev_probing_finish(list[i].eth_dev);
2641 "probe of PCI device " PCI_PRI_FMT " aborted after"
2642 " encountering an error: %s",
2643 pci_dev->addr.domain, pci_dev->addr.bus,
2644 pci_dev->addr.devid, pci_dev->addr.function,
2645 strerror(rte_errno));
2649 if (!list[i].eth_dev)
2651 mlx5_dev_close(list[i].eth_dev);
2652 /* mac_addrs must not be freed because in dev_private */
2653 list[i].eth_dev->data->mac_addrs = NULL;
2654 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2656 /* Restore original error. */
2663 * Do the routine cleanup:
2664 * - close opened Netlink sockets
2665 * - free allocated spawn data array
2666 * - free the Infiniband device list
2675 mlx5_glue->free_device_list(ibv_list);
2680 * DPDK callback to remove a PCI device.
2682 * This function removes all Ethernet devices belong to a given PCI device.
2684 * @param[in] pci_dev
2685 * Pointer to the PCI device.
2688 * 0 on success, the function cannot fail.
2691 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2695 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2696 rte_eth_dev_close(port_id);
2700 static const struct rte_pci_id mlx5_pci_id_map[] = {
2702 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2703 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2706 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2707 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2710 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2711 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2714 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2715 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2718 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2719 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2722 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2723 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2726 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2727 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2730 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2731 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2734 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2735 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2738 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2739 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2742 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2743 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2746 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2747 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2754 static struct rte_pci_driver mlx5_driver = {
2756 .name = MLX5_DRIVER_NAME
2758 .id_table = mlx5_pci_id_map,
2759 .probe = mlx5_pci_probe,
2760 .remove = mlx5_pci_remove,
2761 .dma_map = mlx5_dma_map,
2762 .dma_unmap = mlx5_dma_unmap,
2763 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2764 RTE_PCI_DRV_PROBE_AGAIN,
2767 #ifdef RTE_IBVERBS_LINK_DLOPEN
2770 * Suffix RTE_EAL_PMD_PATH with "-glue".
2772 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2773 * suffixing its last component.
2776 * Output buffer, should be large enough otherwise NULL is returned.
2781 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2784 mlx5_glue_path(char *buf, size_t size)
2786 static const char *const bad[] = { "/", ".", "..", NULL };
2787 const char *path = RTE_EAL_PMD_PATH;
2788 size_t len = strlen(path);
2792 while (len && path[len - 1] == '/')
2794 for (off = len; off && path[off - 1] != '/'; --off)
2796 for (i = 0; bad[i]; ++i)
2797 if (!strncmp(path + off, bad[i], (int)(len - off)))
2799 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2800 if (i == -1 || (size_t)i >= size)
2805 "unable to append \"-glue\" to last component of"
2806 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2807 " please re-configure DPDK");
2812 * Initialization routine for run-time dependency on rdma-core.
2815 mlx5_glue_init(void)
2817 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2818 const char *path[] = {
2820 * A basic security check is necessary before trusting
2821 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2823 (geteuid() == getuid() && getegid() == getgid() ?
2824 getenv("MLX5_GLUE_PATH") : NULL),
2826 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2827 * variant, otherwise let dlopen() look up libraries on its
2830 (*RTE_EAL_PMD_PATH ?
2831 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2834 void *handle = NULL;
2838 while (!handle && i != RTE_DIM(path)) {
2847 end = strpbrk(path[i], ":;");
2849 end = path[i] + strlen(path[i]);
2850 len = end - path[i];
2855 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2857 (!len || *(end - 1) == '/') ? "" : "/");
2860 if (sizeof(name) != (size_t)ret + 1)
2862 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2864 handle = dlopen(name, RTLD_LAZY);
2875 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2878 sym = dlsym(handle, "mlx5_glue");
2879 if (!sym || !*sym) {
2883 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2892 "cannot initialize PMD due to missing run-time dependency on"
2893 " rdma-core libraries (libibverbs, libmlx5)");
2900 * Driver initialization routine.
2902 RTE_INIT(rte_mlx5_pmd_init)
2904 /* Initialize driver log type. */
2905 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2906 if (mlx5_logtype >= 0)
2907 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2909 /* Build the static tables for Verbs conversion. */
2910 mlx5_set_ptype_table();
2911 mlx5_set_cksum_table();
2912 mlx5_set_swp_types_table();
2914 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2915 * huge pages. Calling ibv_fork_init() during init allows
2916 * applications to use fork() safely for purposes other than
2917 * using this PMD, which is not supported in forked processes.
2919 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2920 /* Match the size of Rx completion entry to the size of a cacheline. */
2921 if (RTE_CACHE_LINE_SIZE == 128)
2922 setenv("MLX5_CQE_SIZE", "128", 0);
2924 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2925 * cleanup all the Verbs resources even when the device was removed.
2927 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2928 #ifdef RTE_IBVERBS_LINK_DLOPEN
2929 if (mlx5_glue_init())
2934 /* Glue structure must not contain any NULL pointers. */
2938 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2939 assert(((const void *const *)mlx5_glue)[i]);
2942 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2944 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2945 mlx5_glue->version, MLX5_GLUE_VERSION);
2948 mlx5_glue->fork_init();
2949 rte_pci_register(&mlx5_driver);
2952 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2953 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2954 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");