1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to include 2 dsegs in the title WQEBB.
100 * Deprecated, ignored.
102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
105 * Device parameter to limit the size of inlining packet.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
111 * Device parameter to enable hardware Tx vector.
112 * Deprecated, ignored (no vectorized Tx routines anymore).
114 #define MLX5_TX_VEC_EN "tx_vec_en"
116 /* Device parameter to enable hardware Rx vector. */
117 #define MLX5_RX_VEC_EN "rx_vec_en"
119 /* Allow L3 VXLAN flow creation. */
120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
122 /* Activate DV E-Switch flow steering. */
123 #define MLX5_DV_ESW_EN "dv_esw_en"
125 /* Activate DV flow steering. */
126 #define MLX5_DV_FLOW_EN "dv_flow_en"
128 /* Activate Netlink support in VF mode. */
129 #define MLX5_VF_NL_EN "vf_nl_en"
131 /* Enable extending memsegs when creating a MR. */
132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
134 /* Select port representors to instantiate. */
135 #define MLX5_REPRESENTOR "representor"
137 /* Device parameter to configure the maximum number of dump files per queue. */
138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
140 /* Configure timeout of LRO session (in microseconds). */
141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
143 #ifndef HAVE_IBV_MLX5_MOD_MPW
144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
154 /* Shared memory between primary and secondary processes. */
155 struct mlx5_shared_data *mlx5_shared_data;
157 /* Spinlock for mlx5_shared_data allocation. */
158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
160 /* Process local data for secondary processes. */
161 static struct mlx5_local_data mlx5_local_data;
163 /** Driver-specific log messages type. */
166 /** Data associated with devices to spawn. */
167 struct mlx5_dev_spawn_data {
168 uint32_t ifindex; /**< Network interface index. */
169 uint32_t max_port; /**< IB device maximal port index. */
170 uint32_t ibv_port; /**< IB device physical port index. */
171 int pf_bond; /**< bonding device PF index. < 0 - no bonding */
172 struct mlx5_switch_info info; /**< Switch information. */
173 struct ibv_device *ibv_dev; /**< Associated IB device. */
174 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
175 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
182 * Initialize the counters management structure.
185 * Pointer to mlx5_ibv_shared object to free
188 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
192 TAILQ_INIT(&sh->cmng.flow_counters);
193 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
194 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
198 * Destroy all the resources allocated for a counter memory management.
201 * Pointer to the memory management structure.
204 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
206 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
208 LIST_REMOVE(mng, next);
209 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
210 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
215 * Close and release all the resources of the counters management.
218 * Pointer to mlx5_ibv_shared object to free.
221 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
223 struct mlx5_counter_stats_mem_mng *mng;
230 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
231 if (rte_errno != EINPROGRESS)
235 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
236 struct mlx5_flow_counter_pool *pool;
237 uint32_t batch = !!(i % 2);
239 if (!sh->cmng.ccont[i].pools)
241 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
246 (mlx5_devx_cmd_destroy(pool->min_dcs));
248 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
249 if (pool->counters_raw[j].action)
251 (mlx5_glue->destroy_flow_action
252 (pool->counters_raw[j].action));
253 if (!batch && pool->counters_raw[j].dcs)
254 claim_zero(mlx5_devx_cmd_destroy
255 (pool->counters_raw[j].dcs));
257 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
260 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
262 rte_free(sh->cmng.ccont[i].pools);
264 mng = LIST_FIRST(&sh->cmng.mem_mngs);
266 mlx5_flow_destroy_counter_stat_mem_mng(mng);
267 mng = LIST_FIRST(&sh->cmng.mem_mngs);
269 memset(&sh->cmng, 0, sizeof(sh->cmng));
273 * Extract pdn of PD object using DV API.
276 * Pointer to the verbs PD object.
278 * Pointer to the PD object number variable.
281 * 0 on success, error value otherwise.
283 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
285 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
287 struct mlx5dv_obj obj;
288 struct mlx5dv_pd pd_info;
292 obj.pd.out = &pd_info;
293 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
295 DRV_LOG(DEBUG, "Fail to get PD object info");
301 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
304 * Allocate shared IB device context. If there is multiport device the
305 * master and representors will share this context, if there is single
306 * port dedicated IB device, the context will be used by only given
307 * port due to unification.
309 * Routine first searches the context for the specified IB device name,
310 * if found the shared context assumed and reference counter is incremented.
311 * If no context found the new one is created and initialized with specified
312 * IB device context and parameters.
315 * Pointer to the IB device attributes (name, port, etc).
318 * Pointer to mlx5_ibv_shared object on success,
319 * otherwise NULL and rte_errno is set.
321 static struct mlx5_ibv_shared *
322 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
324 struct mlx5_ibv_shared *sh;
329 /* Secondary process should not create the shared context. */
330 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
331 pthread_mutex_lock(&mlx5_ibv_list_mutex);
332 /* Search for IB context by device name. */
333 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
334 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
339 /* No device found, we have to create new shared context. */
340 assert(spawn->max_port);
341 sh = rte_zmalloc("ethdev shared ib context",
342 sizeof(struct mlx5_ibv_shared) +
344 sizeof(struct mlx5_ibv_shared_port),
345 RTE_CACHE_LINE_SIZE);
347 DRV_LOG(ERR, "shared context allocation failure");
351 /* Try to open IB device with DV first, then usual Verbs. */
353 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
356 DRV_LOG(DEBUG, "DevX is supported");
358 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
360 err = errno ? errno : ENODEV;
363 DRV_LOG(DEBUG, "DevX is NOT supported");
365 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
367 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
371 sh->max_port = spawn->max_port;
372 strncpy(sh->ibdev_name, sh->ctx->device->name,
373 sizeof(sh->ibdev_name));
374 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
375 sizeof(sh->ibdev_path));
376 pthread_mutex_init(&sh->intr_mutex, NULL);
378 * Setting port_id to max unallowed value means
379 * there is no interrupt subhandler installed for
380 * the given port index i.
382 for (i = 0; i < sh->max_port; i++) {
383 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
384 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
386 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
387 if (sh->pd == NULL) {
388 DRV_LOG(ERR, "PD allocation failure");
392 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
393 err = mlx5_get_pdn(sh->pd, &sh->pdn);
395 DRV_LOG(ERR, "Fail to extract pdn from PD");
398 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
400 * Once the device is added to the list of memory event
401 * callback, its global MR cache table cannot be expanded
402 * on the fly because of deadlock. If it overflows, lookup
403 * should be done by searching MR list linearly, which is slow.
405 * At this point the device is not added to the memory
406 * event list yet, context is just being created.
408 err = mlx5_mr_btree_init(&sh->mr.cache,
409 MLX5_MR_BTREE_CACHE_N * 2,
410 spawn->pci_dev->device.numa_node);
415 mlx5_flow_counters_mng_init(sh);
416 /* Add device to memory callback list. */
417 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
418 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
420 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
421 /* Add context to the global device list. */
422 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
424 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
427 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
430 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
432 claim_zero(mlx5_glue->close_device(sh->ctx));
440 * Free shared IB device context. Decrement counter and if zero free
441 * all allocated resources and close handles.
444 * Pointer to mlx5_ibv_shared object to free
447 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
449 pthread_mutex_lock(&mlx5_ibv_list_mutex);
451 /* Check the object presence in the list. */
452 struct mlx5_ibv_shared *lctx;
454 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
459 DRV_LOG(ERR, "Freeing non-existing shared IB context");
465 /* Secondary process should not free the shared context. */
466 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
469 /* Release created Memory Regions. */
471 /* Remove from memory callback device list. */
472 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
473 LIST_REMOVE(sh, mem_event_cb);
474 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
475 /* Remove context from the global device list. */
476 LIST_REMOVE(sh, next);
478 * Ensure there is no async event handler installed.
479 * Only primary process handles async device events.
481 mlx5_flow_counters_mng_close(sh);
482 assert(!sh->intr_cnt);
484 mlx5_intr_callback_unregister
485 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
486 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
487 if (sh->devx_intr_cnt) {
488 if (sh->intr_handle_devx.fd)
489 rte_intr_callback_unregister(&sh->intr_handle_devx,
490 mlx5_dev_interrupt_handler_devx, sh);
492 mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
495 pthread_mutex_destroy(&sh->intr_mutex);
497 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
499 claim_zero(mlx5_glue->close_device(sh->ctx));
502 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
506 * Initialize DR related data within private structure.
507 * Routine checks the reference counter and does actual
508 * resources creation/initialization only if counter is zero.
511 * Pointer to the private device data structure.
514 * Zero on success, positive error code otherwise.
517 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
519 #ifdef HAVE_MLX5DV_DR
520 struct mlx5_ibv_shared *sh = priv->sh;
526 /* Shared DV/DR structures is already initialized. */
531 /* Reference counter is zero, we should initialize structures. */
532 domain = mlx5_glue->dr_create_domain(sh->ctx,
533 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
535 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
539 sh->rx_domain = domain;
540 domain = mlx5_glue->dr_create_domain(sh->ctx,
541 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
543 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
547 pthread_mutex_init(&sh->dv_mutex, NULL);
548 sh->tx_domain = domain;
549 #ifdef HAVE_MLX5DV_DR_ESWITCH
550 if (priv->config.dv_esw_en) {
551 domain = mlx5_glue->dr_create_domain
552 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
554 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
558 sh->fdb_domain = domain;
559 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
562 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
568 /* Rollback the created objects. */
570 mlx5_glue->dr_destroy_domain(sh->rx_domain);
571 sh->rx_domain = NULL;
574 mlx5_glue->dr_destroy_domain(sh->tx_domain);
575 sh->tx_domain = NULL;
577 if (sh->fdb_domain) {
578 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
579 sh->fdb_domain = NULL;
581 if (sh->esw_drop_action) {
582 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
583 sh->esw_drop_action = NULL;
585 if (sh->pop_vlan_action) {
586 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
587 sh->pop_vlan_action = NULL;
597 * Destroy DR related data within private structure.
600 * Pointer to the private device data structure.
603 mlx5_free_shared_dr(struct mlx5_priv *priv)
605 #ifdef HAVE_MLX5DV_DR
606 struct mlx5_ibv_shared *sh;
608 if (!priv->dr_shared)
613 assert(sh->dv_refcnt);
614 if (sh->dv_refcnt && --sh->dv_refcnt)
617 mlx5_glue->dr_destroy_domain(sh->rx_domain);
618 sh->rx_domain = NULL;
621 mlx5_glue->dr_destroy_domain(sh->tx_domain);
622 sh->tx_domain = NULL;
624 #ifdef HAVE_MLX5DV_DR_ESWITCH
625 if (sh->fdb_domain) {
626 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
627 sh->fdb_domain = NULL;
629 if (sh->esw_drop_action) {
630 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
631 sh->esw_drop_action = NULL;
634 if (sh->pop_vlan_action) {
635 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
636 sh->pop_vlan_action = NULL;
638 pthread_mutex_destroy(&sh->dv_mutex);
645 * Initialize shared data between primary and secondary process.
647 * A memzone is reserved by primary process and secondary processes attach to
651 * 0 on success, a negative errno value otherwise and rte_errno is set.
654 mlx5_init_shared_data(void)
656 const struct rte_memzone *mz;
659 rte_spinlock_lock(&mlx5_shared_data_lock);
660 if (mlx5_shared_data == NULL) {
661 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
662 /* Allocate shared memory. */
663 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
664 sizeof(*mlx5_shared_data),
668 "Cannot allocate mlx5 shared data\n");
672 mlx5_shared_data = mz->addr;
673 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
674 rte_spinlock_init(&mlx5_shared_data->lock);
676 /* Lookup allocated shared memory. */
677 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
680 "Cannot attach mlx5 shared data\n");
684 mlx5_shared_data = mz->addr;
685 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
689 rte_spinlock_unlock(&mlx5_shared_data_lock);
694 * Retrieve integer value from environment variable.
697 * Environment variable name.
700 * Integer value, 0 if the variable is not set.
703 mlx5_getenv_int(const char *name)
705 const char *val = getenv(name);
713 * Verbs callback to allocate a memory. This function should allocate the space
714 * according to the size provided residing inside a huge page.
715 * Please note that all allocation must respect the alignment from libmlx5
716 * (i.e. currently sysconf(_SC_PAGESIZE)).
719 * The size in bytes of the memory to allocate.
721 * A pointer to the callback data.
724 * Allocated buffer, NULL otherwise and rte_errno is set.
727 mlx5_alloc_verbs_buf(size_t size, void *data)
729 struct mlx5_priv *priv = data;
731 size_t alignment = sysconf(_SC_PAGESIZE);
732 unsigned int socket = SOCKET_ID_ANY;
734 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
735 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
737 socket = ctrl->socket;
738 } else if (priv->verbs_alloc_ctx.type ==
739 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
740 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
742 socket = ctrl->socket;
744 assert(data != NULL);
745 ret = rte_malloc_socket(__func__, size, alignment, socket);
752 * Verbs callback to free a memory.
755 * A pointer to the memory to free.
757 * A pointer to the callback data.
760 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
762 assert(data != NULL);
767 * DPDK callback to add udp tunnel port
770 * A pointer to eth_dev
771 * @param[in] udp_tunnel
772 * A pointer to udp tunnel
775 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
778 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
779 struct rte_eth_udp_tunnel *udp_tunnel)
781 assert(udp_tunnel != NULL);
782 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
783 udp_tunnel->udp_port == 4789)
785 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
786 udp_tunnel->udp_port == 4790)
792 * Initialize process private data structure.
795 * Pointer to Ethernet device structure.
798 * 0 on success, a negative errno value otherwise and rte_errno is set.
801 mlx5_proc_priv_init(struct rte_eth_dev *dev)
803 struct mlx5_priv *priv = dev->data->dev_private;
804 struct mlx5_proc_priv *ppriv;
808 * UAR register table follows the process private structure. BlueFlame
809 * registers for Tx queues are stored in the table.
812 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
813 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
814 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
819 ppriv->uar_table_sz = ppriv_size;
820 dev->process_private = ppriv;
825 * Un-initialize process private data structure.
828 * Pointer to Ethernet device structure.
831 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
833 if (!dev->process_private)
835 rte_free(dev->process_private);
836 dev->process_private = NULL;
840 * DPDK callback to close the device.
842 * Destroy all queues and objects, free memory.
845 * Pointer to Ethernet device structure.
848 mlx5_dev_close(struct rte_eth_dev *dev)
850 struct mlx5_priv *priv = dev->data->dev_private;
854 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
856 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
857 /* In case mlx5_dev_stop() has not been called. */
858 mlx5_dev_interrupt_handler_uninstall(dev);
859 mlx5_dev_interrupt_handler_devx_uninstall(dev);
860 mlx5_traffic_disable(dev);
861 mlx5_flow_flush(dev, NULL);
862 /* Prevent crashes when queues are still in use. */
863 dev->rx_pkt_burst = removed_rx_burst;
864 dev->tx_pkt_burst = removed_tx_burst;
866 /* Disable datapath on secondary process. */
867 mlx5_mp_req_stop_rxtx(dev);
868 if (priv->rxqs != NULL) {
869 /* XXX race condition if mlx5_rx_burst() is still running. */
871 for (i = 0; (i != priv->rxqs_n); ++i)
872 mlx5_rxq_release(dev, i);
876 if (priv->txqs != NULL) {
877 /* XXX race condition if mlx5_tx_burst() is still running. */
879 for (i = 0; (i != priv->txqs_n); ++i)
880 mlx5_txq_release(dev, i);
884 mlx5_proc_priv_uninit(dev);
885 mlx5_mprq_free_mp(dev);
886 mlx5_free_shared_dr(priv);
887 if (priv->rss_conf.rss_key != NULL)
888 rte_free(priv->rss_conf.rss_key);
889 if (priv->reta_idx != NULL)
890 rte_free(priv->reta_idx);
892 mlx5_nl_mac_addr_flush(dev);
893 if (priv->nl_socket_route >= 0)
894 close(priv->nl_socket_route);
895 if (priv->nl_socket_rdma >= 0)
896 close(priv->nl_socket_rdma);
897 if (priv->vmwa_context)
898 mlx5_vlan_vmwa_exit(priv->vmwa_context);
901 * Free the shared context in last turn, because the cleanup
902 * routines above may use some shared fields, like
903 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
904 * ifindex if Netlink fails.
906 mlx5_free_shared_ibctx(priv->sh);
909 ret = mlx5_hrxq_verify(dev);
911 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
913 ret = mlx5_ind_table_obj_verify(dev);
915 DRV_LOG(WARNING, "port %u some indirection table still remain",
917 ret = mlx5_rxq_obj_verify(dev);
919 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
921 ret = mlx5_rxq_verify(dev);
923 DRV_LOG(WARNING, "port %u some Rx queues still remain",
925 ret = mlx5_txq_ibv_verify(dev);
927 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
929 ret = mlx5_txq_verify(dev);
931 DRV_LOG(WARNING, "port %u some Tx queues still remain",
933 ret = mlx5_flow_verify(dev);
935 DRV_LOG(WARNING, "port %u some flows still remain",
937 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
941 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
942 struct mlx5_priv *opriv =
943 rte_eth_devices[port_id].data->dev_private;
946 opriv->domain_id != priv->domain_id ||
947 &rte_eth_devices[port_id] == dev)
953 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
955 memset(priv, 0, sizeof(*priv));
956 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
958 * Reset mac_addrs to NULL such that it is not freed as part of
959 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
960 * it is freed when dev_private is freed.
962 dev->data->mac_addrs = NULL;
965 const struct eth_dev_ops mlx5_dev_ops = {
966 .dev_configure = mlx5_dev_configure,
967 .dev_start = mlx5_dev_start,
968 .dev_stop = mlx5_dev_stop,
969 .dev_set_link_down = mlx5_set_link_down,
970 .dev_set_link_up = mlx5_set_link_up,
971 .dev_close = mlx5_dev_close,
972 .promiscuous_enable = mlx5_promiscuous_enable,
973 .promiscuous_disable = mlx5_promiscuous_disable,
974 .allmulticast_enable = mlx5_allmulticast_enable,
975 .allmulticast_disable = mlx5_allmulticast_disable,
976 .link_update = mlx5_link_update,
977 .stats_get = mlx5_stats_get,
978 .stats_reset = mlx5_stats_reset,
979 .xstats_get = mlx5_xstats_get,
980 .xstats_reset = mlx5_xstats_reset,
981 .xstats_get_names = mlx5_xstats_get_names,
982 .fw_version_get = mlx5_fw_version_get,
983 .dev_infos_get = mlx5_dev_infos_get,
984 .read_clock = mlx5_read_clock,
985 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
986 .vlan_filter_set = mlx5_vlan_filter_set,
987 .rx_queue_setup = mlx5_rx_queue_setup,
988 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
989 .tx_queue_setup = mlx5_tx_queue_setup,
990 .rx_queue_release = mlx5_rx_queue_release,
991 .tx_queue_release = mlx5_tx_queue_release,
992 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
993 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
994 .mac_addr_remove = mlx5_mac_addr_remove,
995 .mac_addr_add = mlx5_mac_addr_add,
996 .mac_addr_set = mlx5_mac_addr_set,
997 .set_mc_addr_list = mlx5_set_mc_addr_list,
998 .mtu_set = mlx5_dev_set_mtu,
999 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1000 .vlan_offload_set = mlx5_vlan_offload_set,
1001 .reta_update = mlx5_dev_rss_reta_update,
1002 .reta_query = mlx5_dev_rss_reta_query,
1003 .rss_hash_update = mlx5_rss_hash_update,
1004 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1005 .filter_ctrl = mlx5_dev_filter_ctrl,
1006 .rx_descriptor_status = mlx5_rx_descriptor_status,
1007 .tx_descriptor_status = mlx5_tx_descriptor_status,
1008 .rx_queue_count = mlx5_rx_queue_count,
1009 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1010 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1011 .is_removed = mlx5_is_removed,
1012 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
1013 .get_module_info = mlx5_get_module_info,
1014 .get_module_eeprom = mlx5_get_module_eeprom,
1017 /* Available operations from secondary process. */
1018 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1019 .stats_get = mlx5_stats_get,
1020 .stats_reset = mlx5_stats_reset,
1021 .xstats_get = mlx5_xstats_get,
1022 .xstats_reset = mlx5_xstats_reset,
1023 .xstats_get_names = mlx5_xstats_get_names,
1024 .fw_version_get = mlx5_fw_version_get,
1025 .dev_infos_get = mlx5_dev_infos_get,
1026 .rx_descriptor_status = mlx5_rx_descriptor_status,
1027 .tx_descriptor_status = mlx5_tx_descriptor_status,
1028 .get_module_info = mlx5_get_module_info,
1029 .get_module_eeprom = mlx5_get_module_eeprom,
1032 /* Available operations in flow isolated mode. */
1033 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1034 .dev_configure = mlx5_dev_configure,
1035 .dev_start = mlx5_dev_start,
1036 .dev_stop = mlx5_dev_stop,
1037 .dev_set_link_down = mlx5_set_link_down,
1038 .dev_set_link_up = mlx5_set_link_up,
1039 .dev_close = mlx5_dev_close,
1040 .promiscuous_enable = mlx5_promiscuous_enable,
1041 .promiscuous_disable = mlx5_promiscuous_disable,
1042 .allmulticast_enable = mlx5_allmulticast_enable,
1043 .allmulticast_disable = mlx5_allmulticast_disable,
1044 .link_update = mlx5_link_update,
1045 .stats_get = mlx5_stats_get,
1046 .stats_reset = mlx5_stats_reset,
1047 .xstats_get = mlx5_xstats_get,
1048 .xstats_reset = mlx5_xstats_reset,
1049 .xstats_get_names = mlx5_xstats_get_names,
1050 .fw_version_get = mlx5_fw_version_get,
1051 .dev_infos_get = mlx5_dev_infos_get,
1052 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1053 .vlan_filter_set = mlx5_vlan_filter_set,
1054 .rx_queue_setup = mlx5_rx_queue_setup,
1055 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1056 .tx_queue_setup = mlx5_tx_queue_setup,
1057 .rx_queue_release = mlx5_rx_queue_release,
1058 .tx_queue_release = mlx5_tx_queue_release,
1059 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1060 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1061 .mac_addr_remove = mlx5_mac_addr_remove,
1062 .mac_addr_add = mlx5_mac_addr_add,
1063 .mac_addr_set = mlx5_mac_addr_set,
1064 .set_mc_addr_list = mlx5_set_mc_addr_list,
1065 .mtu_set = mlx5_dev_set_mtu,
1066 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1067 .vlan_offload_set = mlx5_vlan_offload_set,
1068 .filter_ctrl = mlx5_dev_filter_ctrl,
1069 .rx_descriptor_status = mlx5_rx_descriptor_status,
1070 .tx_descriptor_status = mlx5_tx_descriptor_status,
1071 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1072 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1073 .is_removed = mlx5_is_removed,
1074 .get_module_info = mlx5_get_module_info,
1075 .get_module_eeprom = mlx5_get_module_eeprom,
1079 * Verify and store value for device argument.
1082 * Key argument to verify.
1084 * Value associated with key.
1089 * 0 on success, a negative errno value otherwise and rte_errno is set.
1092 mlx5_args_check(const char *key, const char *val, void *opaque)
1094 struct mlx5_dev_config *config = opaque;
1097 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1098 if (!strcmp(MLX5_REPRESENTOR, key))
1101 tmp = strtoul(val, NULL, 0);
1104 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1107 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1108 config->cqe_comp = !!tmp;
1109 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1110 config->cqe_pad = !!tmp;
1111 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1112 config->hw_padding = !!tmp;
1113 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1114 config->mprq.enabled = !!tmp;
1115 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1116 config->mprq.stride_num_n = tmp;
1117 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1118 config->mprq.max_memcpy_len = tmp;
1119 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1120 config->mprq.min_rxqs_num = tmp;
1121 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1122 DRV_LOG(WARNING, "%s: deprecated parameter,"
1123 " converted to txq_inline_max", key);
1124 config->txq_inline_max = tmp;
1125 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1126 config->txq_inline_max = tmp;
1127 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1128 config->txq_inline_min = tmp;
1129 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1130 config->txq_inline_mpw = tmp;
1131 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1132 config->txqs_inline = tmp;
1133 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1134 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1135 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1136 config->mps = !!tmp;
1137 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1138 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1139 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1140 DRV_LOG(WARNING, "%s: deprecated parameter,"
1141 " converted to txq_inline_mpw", key);
1142 config->txq_inline_mpw = tmp;
1143 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1144 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1145 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1146 config->rx_vec_en = !!tmp;
1147 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1148 config->l3_vxlan_en = !!tmp;
1149 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1150 config->vf_nl_en = !!tmp;
1151 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1152 config->dv_esw_en = !!tmp;
1153 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1154 config->dv_flow_en = !!tmp;
1155 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1156 config->mr_ext_memseg_en = !!tmp;
1157 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1158 config->max_dump_files_num = tmp;
1159 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1160 config->lro.timeout = tmp;
1162 DRV_LOG(WARNING, "%s: unknown parameter", key);
1170 * Parse device parameters.
1173 * Pointer to device configuration structure.
1175 * Device arguments structure.
1178 * 0 on success, a negative errno value otherwise and rte_errno is set.
1181 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1183 const char **params = (const char *[]){
1184 MLX5_RXQ_CQE_COMP_EN,
1185 MLX5_RXQ_CQE_PAD_EN,
1186 MLX5_RXQ_PKT_PAD_EN,
1188 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1189 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1192 MLX5_TXQ_INLINE_MIN,
1193 MLX5_TXQ_INLINE_MAX,
1194 MLX5_TXQ_INLINE_MPW,
1195 MLX5_TXQS_MIN_INLINE,
1198 MLX5_TXQ_MPW_HDR_DSEG_EN,
1199 MLX5_TXQ_MAX_INLINE_LEN,
1206 MLX5_MR_EXT_MEMSEG_EN,
1208 MLX5_MAX_DUMP_FILES_NUM,
1209 MLX5_LRO_TIMEOUT_USEC,
1212 struct rte_kvargs *kvlist;
1216 if (devargs == NULL)
1218 /* Following UGLY cast is done to pass checkpatch. */
1219 kvlist = rte_kvargs_parse(devargs->args, params);
1220 if (kvlist == NULL) {
1224 /* Process parameters. */
1225 for (i = 0; (params[i] != NULL); ++i) {
1226 if (rte_kvargs_count(kvlist, params[i])) {
1227 ret = rte_kvargs_process(kvlist, params[i],
1228 mlx5_args_check, config);
1231 rte_kvargs_free(kvlist);
1236 rte_kvargs_free(kvlist);
1240 static struct rte_pci_driver mlx5_driver;
1243 * PMD global initialization.
1245 * Independent from individual device, this function initializes global
1246 * per-PMD data structures distinguishing primary and secondary processes.
1247 * Hence, each initialization is called once per a process.
1250 * 0 on success, a negative errno value otherwise and rte_errno is set.
1253 mlx5_init_once(void)
1255 struct mlx5_shared_data *sd;
1256 struct mlx5_local_data *ld = &mlx5_local_data;
1259 if (mlx5_init_shared_data())
1261 sd = mlx5_shared_data;
1263 rte_spinlock_lock(&sd->lock);
1264 switch (rte_eal_process_type()) {
1265 case RTE_PROC_PRIMARY:
1268 LIST_INIT(&sd->mem_event_cb_list);
1269 rte_rwlock_init(&sd->mem_event_rwlock);
1270 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1271 mlx5_mr_mem_event_cb, NULL);
1272 ret = mlx5_mp_init_primary();
1275 sd->init_done = true;
1277 case RTE_PROC_SECONDARY:
1280 ret = mlx5_mp_init_secondary();
1283 ++sd->secondary_cnt;
1284 ld->init_done = true;
1290 rte_spinlock_unlock(&sd->lock);
1295 * Configures the minimal amount of data to inline into WQE
1296 * while sending packets.
1298 * - the txq_inline_min has the maximal priority, if this
1299 * key is specified in devargs
1300 * - if DevX is enabled the inline mode is queried from the
1301 * device (HCA attributes and NIC vport context if needed).
1302 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1303 * and none (0 bytes) for other NICs
1306 * Verbs device parameters (name, port, switch_info) to spawn.
1308 * Device configuration parameters.
1311 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1312 struct mlx5_dev_config *config)
1314 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1315 /* Application defines size of inlined data explicitly. */
1316 switch (spawn->pci_dev->id.device_id) {
1317 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1318 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1319 if (config->txq_inline_min <
1320 (int)MLX5_INLINE_HSIZE_L2) {
1322 "txq_inline_mix aligned to minimal"
1323 " ConnectX-4 required value %d",
1324 (int)MLX5_INLINE_HSIZE_L2);
1325 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1331 if (config->hca_attr.eth_net_offloads) {
1332 /* We have DevX enabled, inline mode queried successfully. */
1333 switch (config->hca_attr.wqe_inline_mode) {
1334 case MLX5_CAP_INLINE_MODE_L2:
1335 /* outer L2 header must be inlined. */
1336 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1338 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1339 /* No inline data are required by NIC. */
1340 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1341 config->hw_vlan_insert =
1342 config->hca_attr.wqe_vlan_insert;
1343 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1345 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1346 /* inline mode is defined by NIC vport context. */
1347 if (!config->hca_attr.eth_virt)
1349 switch (config->hca_attr.vport_inline_mode) {
1350 case MLX5_INLINE_MODE_NONE:
1351 config->txq_inline_min =
1352 MLX5_INLINE_HSIZE_NONE;
1354 case MLX5_INLINE_MODE_L2:
1355 config->txq_inline_min =
1356 MLX5_INLINE_HSIZE_L2;
1358 case MLX5_INLINE_MODE_IP:
1359 config->txq_inline_min =
1360 MLX5_INLINE_HSIZE_L3;
1362 case MLX5_INLINE_MODE_TCP_UDP:
1363 config->txq_inline_min =
1364 MLX5_INLINE_HSIZE_L4;
1366 case MLX5_INLINE_MODE_INNER_L2:
1367 config->txq_inline_min =
1368 MLX5_INLINE_HSIZE_INNER_L2;
1370 case MLX5_INLINE_MODE_INNER_IP:
1371 config->txq_inline_min =
1372 MLX5_INLINE_HSIZE_INNER_L3;
1374 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1375 config->txq_inline_min =
1376 MLX5_INLINE_HSIZE_INNER_L4;
1382 * We get here if we are unable to deduce
1383 * inline data size with DevX. Try PCI ID
1384 * to determine old NICs.
1386 switch (spawn->pci_dev->id.device_id) {
1387 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1388 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1389 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1390 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1391 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1392 config->hw_vlan_insert = 0;
1394 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1395 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1396 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1397 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1399 * These NICs support VLAN insertion from WQE and
1400 * report the wqe_vlan_insert flag. But there is the bug
1401 * and PFC control may be broken, so disable feature.
1403 config->hw_vlan_insert = 0;
1404 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1407 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1411 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1415 * Allocate page of door-bells and register it using DevX API.
1418 * Pointer to Ethernet device.
1421 * Pointer to new page on success, NULL otherwise.
1423 static struct mlx5_devx_dbr_page *
1424 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1426 struct mlx5_priv *priv = dev->data->dev_private;
1427 struct mlx5_devx_dbr_page *page;
1429 /* Allocate space for door-bell page and management data. */
1430 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1431 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1433 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1434 dev->data->port_id);
1437 /* Register allocated memory. */
1438 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1439 MLX5_DBR_PAGE_SIZE, 0);
1441 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1442 dev->data->port_id);
1450 * Find the next available door-bell, allocate new page if needed.
1453 * Pointer to Ethernet device.
1454 * @param [out] dbr_page
1455 * Door-bell page containing the page data.
1458 * Door-bell address offset on success, a negative error value otherwise.
1461 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1463 struct mlx5_priv *priv = dev->data->dev_private;
1464 struct mlx5_devx_dbr_page *page = NULL;
1467 LIST_FOREACH(page, &priv->dbrpgs, next)
1468 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1470 if (!page) { /* No page with free door-bell exists. */
1471 page = mlx5_alloc_dbr_page(dev);
1472 if (!page) /* Failed to allocate new page. */
1474 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1476 /* Loop to find bitmap part with clear bit. */
1478 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1481 /* Find the first clear bit. */
1482 j = rte_bsf64(~page->dbr_bitmap[i]);
1483 assert(i < (MLX5_DBR_PER_PAGE / 64));
1484 page->dbr_bitmap[i] |= (1 << j);
1487 return (((i * 64) + j) * sizeof(uint64_t));
1491 * Release a door-bell record.
1494 * Pointer to Ethernet device.
1495 * @param [in] umem_id
1496 * UMEM ID of page containing the door-bell record to release.
1497 * @param [in] offset
1498 * Offset of door-bell record in page.
1501 * 0 on success, a negative error value otherwise.
1504 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1506 struct mlx5_priv *priv = dev->data->dev_private;
1507 struct mlx5_devx_dbr_page *page = NULL;
1510 LIST_FOREACH(page, &priv->dbrpgs, next)
1511 /* Find the page this address belongs to. */
1512 if (page->umem->umem_id == umem_id)
1517 if (!page->dbr_count) {
1518 /* Page not used, free it and remove from list. */
1519 LIST_REMOVE(page, next);
1521 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1524 /* Mark in bitmap that this door-bell is not in use. */
1525 offset /= MLX5_DBR_SIZE;
1526 int i = offset / 64;
1527 int j = offset % 64;
1529 page->dbr_bitmap[i] &= ~(1 << j);
1535 * Check sibling device configurations.
1537 * Sibling devices sharing the Infiniband device context
1538 * should have compatible configurations. This regards
1539 * representors and bonding slaves.
1542 * Private device descriptor.
1544 * Configuration of the device is going to be created.
1547 * 0 on success, EINVAL otherwise
1550 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1551 struct mlx5_dev_config *config)
1553 struct mlx5_ibv_shared *sh = priv->sh;
1554 struct mlx5_dev_config *sh_conf = NULL;
1558 /* Nothing to compare for the single/first device. */
1559 if (sh->refcnt == 1)
1561 /* Find the device with shared context. */
1562 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1563 struct mlx5_priv *opriv =
1564 rte_eth_devices[port_id].data->dev_private;
1566 if (opriv && opriv != priv && opriv->sh == sh) {
1567 sh_conf = &opriv->config;
1573 if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1574 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1575 " for shared %s context", sh->ibdev_name);
1582 * Spawn an Ethernet device from Verbs information.
1585 * Backing DPDK device.
1587 * Verbs device parameters (name, port, switch_info) to spawn.
1589 * Device configuration parameters.
1592 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1593 * is set. The following errors are defined:
1595 * EBUSY: device is not supposed to be spawned.
1596 * EEXIST: device is already spawned
1598 static struct rte_eth_dev *
1599 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1600 struct mlx5_dev_spawn_data *spawn,
1601 struct mlx5_dev_config config)
1603 const struct mlx5_switch_info *switch_info = &spawn->info;
1604 struct mlx5_ibv_shared *sh = NULL;
1605 struct ibv_port_attr port_attr;
1606 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1607 struct rte_eth_dev *eth_dev = NULL;
1608 struct mlx5_priv *priv = NULL;
1610 unsigned int hw_padding = 0;
1612 unsigned int cqe_comp;
1613 unsigned int cqe_pad = 0;
1614 unsigned int tunnel_en = 0;
1615 unsigned int mpls_en = 0;
1616 unsigned int swp = 0;
1617 unsigned int mprq = 0;
1618 unsigned int mprq_min_stride_size_n = 0;
1619 unsigned int mprq_max_stride_size_n = 0;
1620 unsigned int mprq_min_stride_num_n = 0;
1621 unsigned int mprq_max_stride_num_n = 0;
1622 struct rte_ether_addr mac;
1623 char name[RTE_ETH_NAME_MAX_LEN];
1624 int own_domain_id = 0;
1627 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1628 struct mlx5dv_devx_port devx_port;
1631 /* Determine if this port representor is supposed to be spawned. */
1632 if (switch_info->representor && dpdk_dev->devargs) {
1633 struct rte_eth_devargs eth_da;
1635 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1638 DRV_LOG(ERR, "failed to process device arguments: %s",
1639 strerror(rte_errno));
1642 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1643 if (eth_da.representor_ports[i] ==
1644 (uint16_t)switch_info->port_name)
1646 if (i == eth_da.nb_representor_ports) {
1651 /* Build device name. */
1652 if (spawn->pf_bond < 0) {
1653 /* Single device. */
1654 if (!switch_info->representor)
1655 strlcpy(name, dpdk_dev->name, sizeof(name));
1657 snprintf(name, sizeof(name), "%s_representor_%u",
1658 dpdk_dev->name, switch_info->port_name);
1660 /* Bonding device. */
1661 if (!switch_info->representor)
1662 snprintf(name, sizeof(name), "%s_%s",
1663 dpdk_dev->name, spawn->ibv_dev->name);
1665 snprintf(name, sizeof(name), "%s_%s_representor_%u",
1666 dpdk_dev->name, spawn->ibv_dev->name,
1667 switch_info->port_name);
1669 /* check if the device is already spawned */
1670 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1674 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1675 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1676 eth_dev = rte_eth_dev_attach_secondary(name);
1677 if (eth_dev == NULL) {
1678 DRV_LOG(ERR, "can not attach rte ethdev");
1682 eth_dev->device = dpdk_dev;
1683 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1684 err = mlx5_proc_priv_init(eth_dev);
1687 /* Receive command fd from primary process */
1688 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1691 /* Remap UAR for Tx queues. */
1692 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1696 * Ethdev pointer is still required as input since
1697 * the primary device is not accessible from the
1698 * secondary process.
1700 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1701 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1704 sh = mlx5_alloc_shared_ibctx(spawn);
1707 config.devx = sh->devx;
1708 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1709 config.dest_tir = 1;
1711 #ifdef HAVE_IBV_MLX5_MOD_SWP
1712 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1715 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1716 * as all ConnectX-5 devices.
1718 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1719 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1721 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1722 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1724 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1725 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1726 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1727 DRV_LOG(DEBUG, "enhanced MPW is supported");
1728 mps = MLX5_MPW_ENHANCED;
1730 DRV_LOG(DEBUG, "MPW is supported");
1734 DRV_LOG(DEBUG, "MPW isn't supported");
1735 mps = MLX5_MPW_DISABLED;
1737 #ifdef HAVE_IBV_MLX5_MOD_SWP
1738 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1739 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1740 DRV_LOG(DEBUG, "SWP support: %u", swp);
1743 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1744 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1745 struct mlx5dv_striding_rq_caps mprq_caps =
1746 dv_attr.striding_rq_caps;
1748 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1749 mprq_caps.min_single_stride_log_num_of_bytes);
1750 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1751 mprq_caps.max_single_stride_log_num_of_bytes);
1752 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1753 mprq_caps.min_single_wqe_log_num_of_strides);
1754 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1755 mprq_caps.max_single_wqe_log_num_of_strides);
1756 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1757 mprq_caps.supported_qpts);
1758 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1760 mprq_min_stride_size_n =
1761 mprq_caps.min_single_stride_log_num_of_bytes;
1762 mprq_max_stride_size_n =
1763 mprq_caps.max_single_stride_log_num_of_bytes;
1764 mprq_min_stride_num_n =
1765 mprq_caps.min_single_wqe_log_num_of_strides;
1766 mprq_max_stride_num_n =
1767 mprq_caps.max_single_wqe_log_num_of_strides;
1768 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1769 mprq_min_stride_num_n);
1772 if (RTE_CACHE_LINE_SIZE == 128 &&
1773 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1777 config.cqe_comp = cqe_comp;
1778 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1779 /* Whether device supports 128B Rx CQE padding. */
1780 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1781 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1783 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1784 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1785 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1786 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1787 (dv_attr.tunnel_offloads_caps &
1788 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1790 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1791 tunnel_en ? "" : "not ");
1794 "tunnel offloading disabled due to old OFED/rdma-core version");
1796 config.tunnel_en = tunnel_en;
1797 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1798 mpls_en = ((dv_attr.tunnel_offloads_caps &
1799 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1800 (dv_attr.tunnel_offloads_caps &
1801 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1802 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1803 mpls_en ? "" : "not ");
1805 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1806 " old OFED/rdma-core version or firmware configuration");
1808 config.mpls_en = mpls_en;
1809 /* Check port status. */
1810 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1812 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1815 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1816 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1820 if (port_attr.state != IBV_PORT_ACTIVE)
1821 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1822 mlx5_glue->port_state_str(port_attr.state),
1824 /* Allocate private eth device data. */
1825 priv = rte_zmalloc("ethdev private structure",
1827 RTE_CACHE_LINE_SIZE);
1829 DRV_LOG(ERR, "priv allocation failure");
1834 priv->ibv_port = spawn->ibv_port;
1835 priv->pci_dev = spawn->pci_dev;
1836 priv->mtu = RTE_ETHER_MTU;
1838 /* Initialize UAR access locks for 32bit implementations. */
1839 rte_spinlock_init(&priv->uar_lock_cq);
1840 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1841 rte_spinlock_init(&priv->uar_lock[i]);
1843 /* Some internal functions rely on Netlink sockets, open them now. */
1844 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1845 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1847 priv->representor = !!switch_info->representor;
1848 priv->master = !!switch_info->master;
1849 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1850 priv->vport_meta_tag = 0;
1851 priv->vport_meta_mask = 0;
1852 priv->pf_bond = spawn->pf_bond;
1853 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1855 * The DevX port query API is implemented. E-Switch may use
1856 * either vport or reg_c[0] metadata register to match on
1857 * vport index. The engaged part of metadata register is
1860 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1861 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1862 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port, &devx_port);
1864 DRV_LOG(WARNING, "can't query devx port %d on device %s\n",
1865 spawn->ibv_port, spawn->ibv_dev->name);
1866 devx_port.comp_mask = 0;
1868 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1869 priv->vport_meta_tag = devx_port.reg_c_0.value;
1870 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1871 if (!priv->vport_meta_mask) {
1872 DRV_LOG(ERR, "vport zero mask for port %d"
1873 " on bonding device %s\n",
1874 spawn->ibv_port, spawn->ibv_dev->name);
1878 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1879 DRV_LOG(ERR, "invalid vport tag for port %d"
1880 " on bonding device %s\n",
1881 spawn->ibv_port, spawn->ibv_dev->name);
1885 } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1886 priv->vport_id = devx_port.vport_num;
1887 } else if (spawn->pf_bond >= 0) {
1888 DRV_LOG(ERR, "can't deduce vport index for port %d"
1889 " on bonding device %s\n",
1890 spawn->ibv_port, spawn->ibv_dev->name);
1894 /* Suppose vport index in compatible way. */
1895 priv->vport_id = switch_info->representor ?
1896 switch_info->port_name + 1 : -1;
1900 * Kernel/rdma_core support single E-Switch per PF configurations
1901 * only and vport_id field contains the vport index for
1902 * associated VF, which is deduced from representor port name.
1903 * For example, let's have the IB device port 10, it has
1904 * attached network device eth0, which has port name attribute
1905 * pf0vf2, we can deduce the VF number as 2, and set vport index
1906 * as 3 (2+1). This assigning schema should be changed if the
1907 * multiple E-Switch instances per PF configurations or/and PCI
1908 * subfunctions are added.
1910 priv->vport_id = switch_info->representor ?
1911 switch_info->port_name + 1 : -1;
1913 /* representor_id field keeps the unmodified VF index. */
1914 priv->representor_id = switch_info->representor ?
1915 switch_info->port_name : -1;
1917 * Look for sibling devices in order to reuse their switch domain
1918 * if any, otherwise allocate one.
1920 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1921 const struct mlx5_priv *opriv =
1922 rte_eth_devices[port_id].data->dev_private;
1925 opriv->sh != priv->sh ||
1927 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1929 priv->domain_id = opriv->domain_id;
1932 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1933 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1936 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1937 strerror(rte_errno));
1942 err = mlx5_args(&config, dpdk_dev->devargs);
1945 DRV_LOG(ERR, "failed to process device arguments: %s",
1946 strerror(rte_errno));
1949 err = mlx5_dev_check_sibling_config(priv, &config);
1952 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1953 IBV_DEVICE_RAW_IP_CSUM);
1954 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1955 (config.hw_csum ? "" : "not "));
1956 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1957 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1958 DRV_LOG(DEBUG, "counters are not supported");
1960 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1961 if (config.dv_flow_en) {
1962 DRV_LOG(WARNING, "DV flow is not supported");
1963 config.dv_flow_en = 0;
1966 config.ind_table_max_size =
1967 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1969 * Remove this check once DPDK supports larger/variable
1970 * indirection tables.
1972 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1973 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1974 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1975 config.ind_table_max_size);
1976 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1977 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1978 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1979 (config.hw_vlan_strip ? "" : "not "));
1980 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1981 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1982 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1983 (config.hw_fcs_strip ? "" : "not "));
1984 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1985 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1986 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1987 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1988 IBV_DEVICE_PCI_WRITE_END_PADDING);
1990 if (config.hw_padding && !hw_padding) {
1991 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1992 config.hw_padding = 0;
1993 } else if (config.hw_padding) {
1994 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1996 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1997 (sh->device_attr.tso_caps.supported_qpts &
1998 (1 << IBV_QPT_RAW_PACKET)));
2000 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2002 * MPW is disabled by default, while the Enhanced MPW is enabled
2005 if (config.mps == MLX5_ARG_UNSET)
2006 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2009 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2010 DRV_LOG(INFO, "%sMPS is %s",
2011 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2012 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2013 if (config.cqe_comp && !cqe_comp) {
2014 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2015 config.cqe_comp = 0;
2017 if (config.cqe_pad && !cqe_pad) {
2018 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2020 } else if (config.cqe_pad) {
2021 DRV_LOG(INFO, "Rx CQE padding is enabled");
2024 priv->counter_fallback = 0;
2025 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2030 if (!config.hca_attr.flow_counters_dump)
2031 priv->counter_fallback = 1;
2032 #ifndef HAVE_IBV_DEVX_ASYNC
2033 priv->counter_fallback = 1;
2035 if (priv->counter_fallback)
2036 DRV_LOG(INFO, "Use fall-back DV counter management\n");
2037 /* Check for LRO support. */
2038 if (config.dest_tir && config.hca_attr.lro_cap &&
2039 config.dv_flow_en) {
2040 /* TBD check tunnel lro caps. */
2041 config.lro.supported = config.hca_attr.lro_cap;
2042 DRV_LOG(DEBUG, "Device supports LRO");
2044 * If LRO timeout is not configured by application,
2045 * use the minimal supported value.
2047 if (!config.lro.timeout)
2048 config.lro.timeout =
2049 config.hca_attr.lro_timer_supported_periods[0];
2050 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2051 config.lro.timeout);
2054 if (config.mprq.enabled && mprq) {
2055 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2056 config.mprq.stride_num_n < mprq_min_stride_num_n) {
2057 config.mprq.stride_num_n =
2058 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2059 mprq_min_stride_num_n);
2061 "the number of strides"
2062 " for Multi-Packet RQ is out of range,"
2063 " setting default value (%u)",
2064 1 << config.mprq.stride_num_n);
2066 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2067 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2068 } else if (config.mprq.enabled && !mprq) {
2069 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2070 config.mprq.enabled = 0;
2072 if (config.max_dump_files_num == 0)
2073 config.max_dump_files_num = 128;
2074 eth_dev = rte_eth_dev_allocate(name);
2075 if (eth_dev == NULL) {
2076 DRV_LOG(ERR, "can not allocate rte ethdev");
2080 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2081 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2082 if (priv->representor) {
2083 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2084 eth_dev->data->representor_id = priv->representor_id;
2087 * Store associated network device interface index. This index
2088 * is permanent throughout the lifetime of device. So, we may store
2089 * the ifindex here and use the cached value further.
2091 assert(spawn->ifindex);
2092 priv->if_index = spawn->ifindex;
2093 eth_dev->data->dev_private = priv;
2094 priv->dev_data = eth_dev->data;
2095 eth_dev->data->mac_addrs = priv->mac;
2096 eth_dev->device = dpdk_dev;
2097 /* Configure the first MAC address by default. */
2098 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2100 "port %u cannot get MAC address, is mlx5_en"
2101 " loaded? (errno: %s)",
2102 eth_dev->data->port_id, strerror(rte_errno));
2107 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2108 eth_dev->data->port_id,
2109 mac.addr_bytes[0], mac.addr_bytes[1],
2110 mac.addr_bytes[2], mac.addr_bytes[3],
2111 mac.addr_bytes[4], mac.addr_bytes[5]);
2114 char ifname[IF_NAMESIZE];
2116 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2117 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2118 eth_dev->data->port_id, ifname);
2120 DRV_LOG(DEBUG, "port %u ifname is unknown",
2121 eth_dev->data->port_id);
2124 /* Get actual MTU if possible. */
2125 err = mlx5_get_mtu(eth_dev, &priv->mtu);
2130 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2132 /* Initialize burst functions to prevent crashes before link-up. */
2133 eth_dev->rx_pkt_burst = removed_rx_burst;
2134 eth_dev->tx_pkt_burst = removed_tx_burst;
2135 eth_dev->dev_ops = &mlx5_dev_ops;
2136 /* Register MAC address. */
2137 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2138 if (config.vf && config.vf_nl_en)
2139 mlx5_nl_mac_addr_sync(eth_dev);
2140 TAILQ_INIT(&priv->flows);
2141 TAILQ_INIT(&priv->ctrl_flows);
2142 /* Hint libmlx5 to use PMD allocator for data plane resources */
2143 struct mlx5dv_ctx_allocators alctr = {
2144 .alloc = &mlx5_alloc_verbs_buf,
2145 .free = &mlx5_free_verbs_buf,
2148 mlx5_glue->dv_set_context_attr(sh->ctx,
2149 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2150 (void *)((uintptr_t)&alctr));
2151 /* Bring Ethernet device up. */
2152 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2153 eth_dev->data->port_id);
2154 mlx5_set_link_up(eth_dev);
2156 * Even though the interrupt handler is not installed yet,
2157 * interrupts will still trigger on the async_fd from
2158 * Verbs context returned by ibv_open_device().
2160 mlx5_link_update(eth_dev, 0);
2161 #ifdef HAVE_MLX5DV_DR_ESWITCH
2162 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2163 (switch_info->representor || switch_info->master)))
2164 config.dv_esw_en = 0;
2166 config.dv_esw_en = 0;
2168 /* Detect minimal data bytes to inline. */
2169 mlx5_set_min_inline(spawn, &config);
2170 /* Store device configuration on private structure. */
2171 priv->config = config;
2172 /* Create context for virtual machine VLAN workaround. */
2173 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2174 if (config.dv_flow_en) {
2175 err = mlx5_alloc_shared_dr(priv);
2179 /* Supported Verbs flow priority number detection. */
2180 err = mlx5_flow_discover_priorities(eth_dev);
2185 priv->config.flow_prio = err;
2190 mlx5_free_shared_dr(priv);
2191 if (priv->nl_socket_route >= 0)
2192 close(priv->nl_socket_route);
2193 if (priv->nl_socket_rdma >= 0)
2194 close(priv->nl_socket_rdma);
2195 if (priv->vmwa_context)
2196 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2198 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2200 if (eth_dev != NULL)
2201 eth_dev->data->dev_private = NULL;
2203 if (eth_dev != NULL) {
2204 /* mac_addrs must not be freed alone because part of dev_private */
2205 eth_dev->data->mac_addrs = NULL;
2206 rte_eth_dev_release_port(eth_dev);
2209 mlx5_free_shared_ibctx(sh);
2216 * Comparison callback to sort device data.
2218 * This is meant to be used with qsort().
2221 * Pointer to pointer to first data object.
2223 * Pointer to pointer to second data object.
2226 * 0 if both objects are equal, less than 0 if the first argument is less
2227 * than the second, greater than 0 otherwise.
2230 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2232 const struct mlx5_switch_info *si_a =
2233 &((const struct mlx5_dev_spawn_data *)a)->info;
2234 const struct mlx5_switch_info *si_b =
2235 &((const struct mlx5_dev_spawn_data *)b)->info;
2238 /* Master device first. */
2239 ret = si_b->master - si_a->master;
2242 /* Then representor devices. */
2243 ret = si_b->representor - si_a->representor;
2246 /* Unidentified devices come last in no specific order. */
2247 if (!si_a->representor)
2249 /* Order representors by name. */
2250 return si_a->port_name - si_b->port_name;
2254 * Match PCI information for possible slaves of bonding device.
2256 * @param[in] ibv_dev
2257 * Pointer to Infiniband device structure.
2258 * @param[in] pci_dev
2259 * Pointer to PCI device structure to match PCI address.
2260 * @param[in] nl_rdma
2261 * Netlink RDMA group socket handle.
2264 * negative value if no bonding device found, otherwise
2265 * positive index of slave PF in bonding.
2268 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2269 const struct rte_pci_device *pci_dev,
2272 char ifname[IF_NAMESIZE + 1];
2273 unsigned int ifindex;
2279 * Try to get master device name. If something goes
2280 * wrong suppose the lack of kernel support and no
2285 if (!strstr(ibv_dev->name, "bond"))
2287 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2291 * The Master device might not be on the predefined
2292 * port (not on port index 1, it is not garanted),
2293 * we have to scan all Infiniband device port and
2296 for (i = 1; i <= np; ++i) {
2297 /* Check whether Infiniband port is populated. */
2298 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2301 if (!if_indextoname(ifindex, ifname))
2303 /* Try to read bonding slave names from sysfs. */
2305 "/sys/class/net/%s/master/bonding/slaves", ifname);
2306 file = fopen(slaves, "r");
2312 /* Use safe format to check maximal buffer length. */
2313 assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2314 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2315 char tmp_str[IF_NAMESIZE + 32];
2316 struct rte_pci_addr pci_addr;
2317 struct mlx5_switch_info info;
2319 /* Process slave interface names in the loop. */
2320 snprintf(tmp_str, sizeof(tmp_str),
2321 "/sys/class/net/%s", ifname);
2322 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2323 DRV_LOG(WARNING, "can not get PCI address"
2324 " for netdev \"%s\"", ifname);
2327 if (pci_dev->addr.domain != pci_addr.domain ||
2328 pci_dev->addr.bus != pci_addr.bus ||
2329 pci_dev->addr.devid != pci_addr.devid ||
2330 pci_dev->addr.function != pci_addr.function)
2332 /* Slave interface PCI address match found. */
2334 snprintf(tmp_str, sizeof(tmp_str),
2335 "/sys/class/net/%s/phys_port_name", ifname);
2336 file = fopen(tmp_str, "rb");
2339 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2340 if (fscanf(file, "%32s", tmp_str) == 1)
2341 mlx5_translate_port_name(tmp_str, &info);
2342 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2343 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2344 pf = info.port_name;
2353 * DPDK callback to register a PCI device.
2355 * This function spawns Ethernet devices out of a given PCI device.
2357 * @param[in] pci_drv
2358 * PCI driver structure (mlx5_driver).
2359 * @param[in] pci_dev
2360 * PCI device information.
2363 * 0 on success, a negative errno value otherwise and rte_errno is set.
2366 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2367 struct rte_pci_device *pci_dev)
2369 struct ibv_device **ibv_list;
2371 * Number of found IB Devices matching with requested PCI BDF.
2372 * nd != 1 means there are multiple IB devices over the same
2373 * PCI device and we have representors and master.
2375 unsigned int nd = 0;
2377 * Number of found IB device Ports. nd = 1 and np = 1..n means
2378 * we have the single multiport IB device, and there may be
2379 * representors attached to some of found ports.
2381 unsigned int np = 0;
2383 * Number of DPDK ethernet devices to Spawn - either over
2384 * multiple IB devices or multiple ports of single IB device.
2385 * Actually this is the number of iterations to spawn.
2387 unsigned int ns = 0;
2390 * < 0 - no bonding device (single one)
2391 * >= 0 - bonding device (value is slave PF index)
2394 struct mlx5_dev_spawn_data *list = NULL;
2395 struct mlx5_dev_config dev_config;
2398 ret = mlx5_init_once();
2400 DRV_LOG(ERR, "unable to init PMD global data: %s",
2401 strerror(rte_errno));
2404 assert(pci_drv == &mlx5_driver);
2406 ibv_list = mlx5_glue->get_device_list(&ret);
2408 rte_errno = errno ? errno : ENOSYS;
2409 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2413 * First scan the list of all Infiniband devices to find
2414 * matching ones, gathering into the list.
2416 struct ibv_device *ibv_match[ret + 1];
2417 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2418 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2422 struct rte_pci_addr pci_addr;
2424 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2425 bd = mlx5_device_bond_pci_match
2426 (ibv_list[ret], pci_dev, nl_rdma);
2429 * Bonding device detected. Only one match is allowed,
2430 * the bonding is supported over multi-port IB device,
2431 * there should be no matches on representor PCI
2432 * functions or non VF LAG bonding devices with
2433 * specified address.
2437 "multiple PCI match on bonding device"
2438 "\"%s\" found", ibv_list[ret]->name);
2443 DRV_LOG(INFO, "PCI information matches for"
2444 " slave %d bonding device \"%s\"",
2445 bd, ibv_list[ret]->name);
2446 ibv_match[nd++] = ibv_list[ret];
2449 if (mlx5_dev_to_pci_addr
2450 (ibv_list[ret]->ibdev_path, &pci_addr))
2452 if (pci_dev->addr.domain != pci_addr.domain ||
2453 pci_dev->addr.bus != pci_addr.bus ||
2454 pci_dev->addr.devid != pci_addr.devid ||
2455 pci_dev->addr.function != pci_addr.function)
2457 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2458 ibv_list[ret]->name);
2459 ibv_match[nd++] = ibv_list[ret];
2461 ibv_match[nd] = NULL;
2463 /* No device matches, just complain and bail out. */
2465 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2466 " are kernel drivers loaded?",
2467 pci_dev->addr.domain, pci_dev->addr.bus,
2468 pci_dev->addr.devid, pci_dev->addr.function);
2475 * Found single matching device may have multiple ports.
2476 * Each port may be representor, we have to check the port
2477 * number and check the representors existence.
2480 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2482 DRV_LOG(WARNING, "can not get IB device \"%s\""
2483 " ports number", ibv_match[0]->name);
2484 if (bd >= 0 && !np) {
2485 DRV_LOG(ERR, "can not get ports"
2486 " for bonding device");
2492 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2495 * This may happen if there is VF LAG kernel support and
2496 * application is compiled with older rdma_core library.
2499 "No kernel/verbs support for VF LAG bonding found.");
2500 rte_errno = ENOTSUP;
2506 * Now we can determine the maximal
2507 * amount of devices to be spawned.
2509 list = rte_zmalloc("device spawn data",
2510 sizeof(struct mlx5_dev_spawn_data) *
2512 RTE_CACHE_LINE_SIZE);
2514 DRV_LOG(ERR, "spawn data array allocation failure");
2519 if (bd >= 0 || np > 1) {
2521 * Single IB device with multiple ports found,
2522 * it may be E-Switch master device and representors.
2523 * We have to perform identification trough the ports.
2525 assert(nl_rdma >= 0);
2529 for (i = 1; i <= np; ++i) {
2530 list[ns].max_port = np;
2531 list[ns].ibv_port = i;
2532 list[ns].ibv_dev = ibv_match[0];
2533 list[ns].eth_dev = NULL;
2534 list[ns].pci_dev = pci_dev;
2535 list[ns].pf_bond = bd;
2536 list[ns].ifindex = mlx5_nl_ifindex
2537 (nl_rdma, list[ns].ibv_dev->name, i);
2538 if (!list[ns].ifindex) {
2540 * No network interface index found for the
2541 * specified port, it means there is no
2542 * representor on this port. It's OK,
2543 * there can be disabled ports, for example
2544 * if sriov_numvfs < sriov_totalvfs.
2550 ret = mlx5_nl_switch_info
2554 if (ret || (!list[ns].info.representor &&
2555 !list[ns].info.master)) {
2557 * We failed to recognize representors with
2558 * Netlink, let's try to perform the task
2561 ret = mlx5_sysfs_switch_info
2565 if (!ret && bd >= 0) {
2566 switch (list[ns].info.name_type) {
2567 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2568 if (list[ns].info.port_name == bd)
2571 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2572 if (list[ns].info.pf_num == bd)
2580 if (!ret && (list[ns].info.representor ^
2581 list[ns].info.master))
2586 "unable to recognize master/representors"
2587 " on the IB device with multiple ports");
2594 * The existence of several matching entries (nd > 1) means
2595 * port representors have been instantiated. No existing Verbs
2596 * call nor sysfs entries can tell them apart, this can only
2597 * be done through Netlink calls assuming kernel drivers are
2598 * recent enough to support them.
2600 * In the event of identification failure through Netlink,
2601 * try again through sysfs, then:
2603 * 1. A single IB device matches (nd == 1) with single
2604 * port (np=0/1) and is not a representor, assume
2605 * no switch support.
2607 * 2. Otherwise no safe assumptions can be made;
2608 * complain louder and bail out.
2611 for (i = 0; i != nd; ++i) {
2612 memset(&list[ns].info, 0, sizeof(list[ns].info));
2613 list[ns].max_port = 1;
2614 list[ns].ibv_port = 1;
2615 list[ns].ibv_dev = ibv_match[i];
2616 list[ns].eth_dev = NULL;
2617 list[ns].pci_dev = pci_dev;
2618 list[ns].pf_bond = -1;
2619 list[ns].ifindex = 0;
2621 list[ns].ifindex = mlx5_nl_ifindex
2622 (nl_rdma, list[ns].ibv_dev->name, 1);
2623 if (!list[ns].ifindex) {
2624 char ifname[IF_NAMESIZE];
2627 * Netlink failed, it may happen with old
2628 * ib_core kernel driver (before 4.16).
2629 * We can assume there is old driver because
2630 * here we are processing single ports IB
2631 * devices. Let's try sysfs to retrieve
2632 * the ifindex. The method works for
2633 * master device only.
2637 * Multiple devices found, assume
2638 * representors, can not distinguish
2639 * master/representor and retrieve
2640 * ifindex via sysfs.
2644 ret = mlx5_get_master_ifname
2645 (ibv_match[i]->ibdev_path, &ifname);
2648 if_nametoindex(ifname);
2649 if (!list[ns].ifindex) {
2651 * No network interface index found
2652 * for the specified device, it means
2653 * there it is neither representor
2661 ret = mlx5_nl_switch_info
2665 if (ret || (!list[ns].info.representor &&
2666 !list[ns].info.master)) {
2668 * We failed to recognize representors with
2669 * Netlink, let's try to perform the task
2672 ret = mlx5_sysfs_switch_info
2676 if (!ret && (list[ns].info.representor ^
2677 list[ns].info.master)) {
2679 } else if ((nd == 1) &&
2680 !list[ns].info.representor &&
2681 !list[ns].info.master) {
2683 * Single IB device with
2684 * one physical port and
2685 * attached network device.
2686 * May be SRIOV is not enabled
2687 * or there is no representors.
2689 DRV_LOG(INFO, "no E-Switch support detected");
2696 "unable to recognize master/representors"
2697 " on the multiple IB devices");
2705 * Sort list to probe devices in natural order for users convenience
2706 * (i.e. master first, then representors from lowest to highest ID).
2708 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2709 /* Default configuration. */
2710 dev_config = (struct mlx5_dev_config){
2712 .mps = MLX5_ARG_UNSET,
2714 .txq_inline_max = MLX5_ARG_UNSET,
2715 .txq_inline_min = MLX5_ARG_UNSET,
2716 .txq_inline_mpw = MLX5_ARG_UNSET,
2717 .txqs_inline = MLX5_ARG_UNSET,
2719 .mr_ext_memseg_en = 1,
2721 .enabled = 0, /* Disabled by default. */
2722 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2723 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2724 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2728 /* Device specific configuration. */
2729 switch (pci_dev->id.device_id) {
2730 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2731 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2732 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2733 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2734 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2735 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2741 for (i = 0; i != ns; ++i) {
2744 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2747 if (!list[i].eth_dev) {
2748 if (rte_errno != EBUSY && rte_errno != EEXIST)
2750 /* Device is disabled or already spawned. Ignore it. */
2753 restore = list[i].eth_dev->data->dev_flags;
2754 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2755 /* Restore non-PCI flags cleared by the above call. */
2756 list[i].eth_dev->data->dev_flags |= restore;
2757 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
2758 rte_eth_dev_probing_finish(list[i].eth_dev);
2762 "probe of PCI device " PCI_PRI_FMT " aborted after"
2763 " encountering an error: %s",
2764 pci_dev->addr.domain, pci_dev->addr.bus,
2765 pci_dev->addr.devid, pci_dev->addr.function,
2766 strerror(rte_errno));
2770 if (!list[i].eth_dev)
2772 mlx5_dev_close(list[i].eth_dev);
2773 /* mac_addrs must not be freed because in dev_private */
2774 list[i].eth_dev->data->mac_addrs = NULL;
2775 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2777 /* Restore original error. */
2784 * Do the routine cleanup:
2785 * - close opened Netlink sockets
2786 * - free allocated spawn data array
2787 * - free the Infiniband device list
2796 mlx5_glue->free_device_list(ibv_list);
2801 * Look for the ethernet device belonging to mlx5 driver.
2803 * @param[in] port_id
2804 * port_id to start looking for device.
2805 * @param[in] pci_dev
2806 * Pointer to the hint PCI device. When device is being probed
2807 * the its siblings (master and preceding representors might
2808 * not have assigned driver yet (because the mlx5_pci_probe()
2809 * is not completed yet, for this case match on hint PCI
2810 * device may be used to detect sibling device.
2813 * port_id of found device, RTE_MAX_ETHPORT if not found.
2816 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
2818 while (port_id < RTE_MAX_ETHPORTS) {
2819 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2821 if (dev->state != RTE_ETH_DEV_UNUSED &&
2823 (dev->device == &pci_dev->device ||
2824 (dev->device->driver &&
2825 dev->device->driver->name &&
2826 !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
2830 if (port_id >= RTE_MAX_ETHPORTS)
2831 return RTE_MAX_ETHPORTS;
2836 * DPDK callback to remove a PCI device.
2838 * This function removes all Ethernet devices belong to a given PCI device.
2840 * @param[in] pci_dev
2841 * Pointer to the PCI device.
2844 * 0 on success, the function cannot fail.
2847 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2851 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2852 rte_eth_dev_close(port_id);
2856 static const struct rte_pci_id mlx5_pci_id_map[] = {
2858 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2859 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2862 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2863 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2866 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2867 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2870 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2871 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2874 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2875 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2878 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2879 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2882 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2883 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2886 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2887 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2890 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2891 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2894 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2895 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2898 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2899 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2902 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2903 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2910 static struct rte_pci_driver mlx5_driver = {
2912 .name = MLX5_DRIVER_NAME
2914 .id_table = mlx5_pci_id_map,
2915 .probe = mlx5_pci_probe,
2916 .remove = mlx5_pci_remove,
2917 .dma_map = mlx5_dma_map,
2918 .dma_unmap = mlx5_dma_unmap,
2919 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2920 RTE_PCI_DRV_PROBE_AGAIN,
2923 #ifdef RTE_IBVERBS_LINK_DLOPEN
2926 * Suffix RTE_EAL_PMD_PATH with "-glue".
2928 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2929 * suffixing its last component.
2932 * Output buffer, should be large enough otherwise NULL is returned.
2937 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2940 mlx5_glue_path(char *buf, size_t size)
2942 static const char *const bad[] = { "/", ".", "..", NULL };
2943 const char *path = RTE_EAL_PMD_PATH;
2944 size_t len = strlen(path);
2948 while (len && path[len - 1] == '/')
2950 for (off = len; off && path[off - 1] != '/'; --off)
2952 for (i = 0; bad[i]; ++i)
2953 if (!strncmp(path + off, bad[i], (int)(len - off)))
2955 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2956 if (i == -1 || (size_t)i >= size)
2961 "unable to append \"-glue\" to last component of"
2962 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2963 " please re-configure DPDK");
2968 * Initialization routine for run-time dependency on rdma-core.
2971 mlx5_glue_init(void)
2973 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2974 const char *path[] = {
2976 * A basic security check is necessary before trusting
2977 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2979 (geteuid() == getuid() && getegid() == getgid() ?
2980 getenv("MLX5_GLUE_PATH") : NULL),
2982 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2983 * variant, otherwise let dlopen() look up libraries on its
2986 (*RTE_EAL_PMD_PATH ?
2987 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2990 void *handle = NULL;
2994 while (!handle && i != RTE_DIM(path)) {
3003 end = strpbrk(path[i], ":;");
3005 end = path[i] + strlen(path[i]);
3006 len = end - path[i];
3011 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3013 (!len || *(end - 1) == '/') ? "" : "/");
3016 if (sizeof(name) != (size_t)ret + 1)
3018 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3020 handle = dlopen(name, RTLD_LAZY);
3031 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3034 sym = dlsym(handle, "mlx5_glue");
3035 if (!sym || !*sym) {
3039 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3048 "cannot initialize PMD due to missing run-time dependency on"
3049 " rdma-core libraries (libibverbs, libmlx5)");
3056 * Driver initialization routine.
3058 RTE_INIT(rte_mlx5_pmd_init)
3060 /* Initialize driver log type. */
3061 mlx5_logtype = rte_log_register("pmd.net.mlx5");
3062 if (mlx5_logtype >= 0)
3063 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3065 /* Build the static tables for Verbs conversion. */
3066 mlx5_set_ptype_table();
3067 mlx5_set_cksum_table();
3068 mlx5_set_swp_types_table();
3070 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3071 * huge pages. Calling ibv_fork_init() during init allows
3072 * applications to use fork() safely for purposes other than
3073 * using this PMD, which is not supported in forked processes.
3075 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3076 /* Match the size of Rx completion entry to the size of a cacheline. */
3077 if (RTE_CACHE_LINE_SIZE == 128)
3078 setenv("MLX5_CQE_SIZE", "128", 0);
3080 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3081 * cleanup all the Verbs resources even when the device was removed.
3083 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3084 #ifdef RTE_IBVERBS_LINK_DLOPEN
3085 if (mlx5_glue_init())
3090 /* Glue structure must not contain any NULL pointers. */
3094 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3095 assert(((const void *const *)mlx5_glue)[i]);
3098 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3100 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3101 mlx5_glue->version, MLX5_GLUE_VERSION);
3104 mlx5_glue->fork_init();
3105 rte_pci_register(&mlx5_driver);
3108 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3109 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3110 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");