1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
40 #include <rte_alarm.h>
43 #include "mlx5_utils.h"
44 #include "mlx5_rxtx.h"
45 #include "mlx5_autoconf.h"
46 #include "mlx5_defs.h"
47 #include "mlx5_glue.h"
49 #include "mlx5_flow.h"
51 /* Device parameter to enable RX completion queue compression. */
52 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
54 /* Device parameter to enable RX completion entry padding to 128B. */
55 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
57 /* Device parameter to enable padding Rx packet to cacheline size. */
58 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
60 /* Device parameter to enable Multi-Packet Rx queue. */
61 #define MLX5_RX_MPRQ_EN "mprq_en"
63 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
64 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
66 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
67 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
69 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
70 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
72 /* Device parameter to configure inline send. Deprecated, ignored.*/
73 #define MLX5_TXQ_INLINE "txq_inline"
75 /* Device parameter to limit packet size to inline with ordinary SEND. */
76 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
78 /* Device parameter to configure minimal data size to inline. */
79 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
81 /* Device parameter to limit packet size to inline with Enhanced MPW. */
82 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
85 * Device parameter to configure the number of TX queues threshold for
86 * enabling inline send.
88 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
91 * Device parameter to configure the number of TX queues threshold for
92 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
94 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
96 /* Device parameter to enable multi-packet send WQEs. */
97 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
100 * Device parameter to include 2 dsegs in the title WQEBB.
101 * Deprecated, ignored.
103 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
106 * Device parameter to limit the size of inlining packet.
107 * Deprecated, ignored.
109 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
112 * Device parameter to enable hardware Tx vector.
113 * Deprecated, ignored (no vectorized Tx routines anymore).
115 #define MLX5_TX_VEC_EN "tx_vec_en"
117 /* Device parameter to enable hardware Rx vector. */
118 #define MLX5_RX_VEC_EN "rx_vec_en"
120 /* Allow L3 VXLAN flow creation. */
121 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
123 /* Activate DV E-Switch flow steering. */
124 #define MLX5_DV_ESW_EN "dv_esw_en"
126 /* Activate DV flow steering. */
127 #define MLX5_DV_FLOW_EN "dv_flow_en"
129 /* Activate Netlink support in VF mode. */
130 #define MLX5_VF_NL_EN "vf_nl_en"
132 /* Enable extending memsegs when creating a MR. */
133 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
135 /* Select port representors to instantiate. */
136 #define MLX5_REPRESENTOR "representor"
138 /* Device parameter to configure the maximum number of dump files per queue. */
139 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
141 /* Configure timeout of LRO session (in microseconds). */
142 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
144 #ifndef HAVE_IBV_MLX5_MOD_MPW
145 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
146 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
149 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
150 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
153 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
155 /* Shared memory between primary and secondary processes. */
156 struct mlx5_shared_data *mlx5_shared_data;
158 /* Spinlock for mlx5_shared_data allocation. */
159 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
161 /* Process local data for secondary processes. */
162 static struct mlx5_local_data mlx5_local_data;
164 /** Driver-specific log messages type. */
167 /** Data associated with devices to spawn. */
168 struct mlx5_dev_spawn_data {
169 uint32_t ifindex; /**< Network interface index. */
170 uint32_t max_port; /**< IB device maximal port index. */
171 uint32_t ibv_port; /**< IB device physical port index. */
172 struct mlx5_switch_info info; /**< Switch information. */
173 struct ibv_device *ibv_dev; /**< Associated IB device. */
174 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
175 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
182 * Initialize the counters management structure.
185 * Pointer to mlx5_ibv_shared object to free
188 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
192 TAILQ_INIT(&sh->cmng.flow_counters);
193 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
194 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
198 * Destroy all the resources allocated for a counter memory management.
201 * Pointer to the memory management structure.
204 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
206 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
208 LIST_REMOVE(mng, next);
209 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
210 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
215 * Close and release all the resources of the counters management.
218 * Pointer to mlx5_ibv_shared object to free.
221 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
223 struct mlx5_counter_stats_mem_mng *mng;
230 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
231 if (rte_errno != EINPROGRESS)
235 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
236 struct mlx5_flow_counter_pool *pool;
237 uint32_t batch = !!(i % 2);
239 if (!sh->cmng.ccont[i].pools)
241 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
246 (mlx5_devx_cmd_destroy(pool->min_dcs));
248 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
249 if (pool->counters_raw[j].action)
251 (mlx5_glue->destroy_flow_action
252 (pool->counters_raw[j].action));
253 if (!batch && pool->counters_raw[j].dcs)
254 claim_zero(mlx5_devx_cmd_destroy
255 (pool->counters_raw[j].dcs));
257 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
260 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
262 rte_free(sh->cmng.ccont[i].pools);
264 mng = LIST_FIRST(&sh->cmng.mem_mngs);
266 mlx5_flow_destroy_counter_stat_mem_mng(mng);
267 mng = LIST_FIRST(&sh->cmng.mem_mngs);
269 memset(&sh->cmng, 0, sizeof(sh->cmng));
273 * Extract pdn of PD object using DV API.
276 * Pointer to the verbs PD object.
278 * Pointer to the PD object number variable.
281 * 0 on success, error value otherwise.
283 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
285 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
287 struct mlx5dv_obj obj;
288 struct mlx5dv_pd pd_info;
292 obj.pd.out = &pd_info;
293 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
295 DRV_LOG(DEBUG, "Fail to get PD object info");
301 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
304 * Allocate shared IB device context. If there is multiport device the
305 * master and representors will share this context, if there is single
306 * port dedicated IB device, the context will be used by only given
307 * port due to unification.
309 * Routine first searches the context for the specified IB device name,
310 * if found the shared context assumed and reference counter is incremented.
311 * If no context found the new one is created and initialized with specified
312 * IB device context and parameters.
315 * Pointer to the IB device attributes (name, port, etc).
318 * Pointer to mlx5_ibv_shared object on success,
319 * otherwise NULL and rte_errno is set.
321 static struct mlx5_ibv_shared *
322 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
324 struct mlx5_ibv_shared *sh;
329 /* Secondary process should not create the shared context. */
330 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
331 pthread_mutex_lock(&mlx5_ibv_list_mutex);
332 /* Search for IB context by device name. */
333 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
334 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
339 /* No device found, we have to create new shared context. */
340 assert(spawn->max_port);
341 sh = rte_zmalloc("ethdev shared ib context",
342 sizeof(struct mlx5_ibv_shared) +
344 sizeof(struct mlx5_ibv_shared_port),
345 RTE_CACHE_LINE_SIZE);
347 DRV_LOG(ERR, "shared context allocation failure");
351 /* Try to open IB device with DV first, then usual Verbs. */
353 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
356 DRV_LOG(DEBUG, "DevX is supported");
358 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
360 err = errno ? errno : ENODEV;
363 DRV_LOG(DEBUG, "DevX is NOT supported");
365 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
367 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
371 sh->max_port = spawn->max_port;
372 strncpy(sh->ibdev_name, sh->ctx->device->name,
373 sizeof(sh->ibdev_name));
374 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
375 sizeof(sh->ibdev_path));
376 sh->pci_dev = spawn->pci_dev;
377 pthread_mutex_init(&sh->intr_mutex, NULL);
379 * Setting port_id to max unallowed value means
380 * there is no interrupt subhandler installed for
381 * the given port index i.
383 for (i = 0; i < sh->max_port; i++)
384 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
385 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
386 if (sh->pd == NULL) {
387 DRV_LOG(ERR, "PD allocation failure");
391 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
392 err = mlx5_get_pdn(sh->pd, &sh->pdn);
394 DRV_LOG(ERR, "Fail to extract pdn from PD");
397 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
399 * Once the device is added to the list of memory event
400 * callback, its global MR cache table cannot be expanded
401 * on the fly because of deadlock. If it overflows, lookup
402 * should be done by searching MR list linearly, which is slow.
404 * At this point the device is not added to the memory
405 * event list yet, context is just being created.
407 err = mlx5_mr_btree_init(&sh->mr.cache,
408 MLX5_MR_BTREE_CACHE_N * 2,
409 sh->pci_dev->device.numa_node);
414 mlx5_flow_counters_mng_init(sh);
415 /* Add device to memory callback list. */
416 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
417 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
419 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
420 /* Add context to the global device list. */
421 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
423 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
426 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
429 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
431 claim_zero(mlx5_glue->close_device(sh->ctx));
439 * Free shared IB device context. Decrement counter and if zero free
440 * all allocated resources and close handles.
443 * Pointer to mlx5_ibv_shared object to free
446 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
448 pthread_mutex_lock(&mlx5_ibv_list_mutex);
450 /* Check the object presence in the list. */
451 struct mlx5_ibv_shared *lctx;
453 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
458 DRV_LOG(ERR, "Freeing non-existing shared IB context");
464 /* Secondary process should not free the shared context. */
465 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
468 /* Release created Memory Regions. */
470 /* Remove from memory callback device list. */
471 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
472 LIST_REMOVE(sh, mem_event_cb);
473 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
474 /* Remove context from the global device list. */
475 LIST_REMOVE(sh, next);
477 * Ensure there is no async event handler installed.
478 * Only primary process handles async device events.
480 mlx5_flow_counters_mng_close(sh);
481 assert(!sh->intr_cnt);
483 mlx5_intr_callback_unregister
484 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
485 pthread_mutex_destroy(&sh->intr_mutex);
487 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
489 claim_zero(mlx5_glue->close_device(sh->ctx));
492 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
496 * Initialize DR related data within private structure.
497 * Routine checks the reference counter and does actual
498 * resources creation/initialization only if counter is zero.
501 * Pointer to the private device data structure.
504 * Zero on success, positive error code otherwise.
507 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
509 #ifdef HAVE_MLX5DV_DR
510 struct mlx5_ibv_shared *sh = priv->sh;
516 /* Shared DV/DR structures is already initialized. */
521 /* Reference counter is zero, we should initialize structures. */
522 domain = mlx5_glue->dr_create_domain(sh->ctx,
523 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
525 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
529 sh->rx_domain = domain;
530 domain = mlx5_glue->dr_create_domain(sh->ctx,
531 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
533 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
537 pthread_mutex_init(&sh->dv_mutex, NULL);
538 sh->tx_domain = domain;
539 #ifdef HAVE_MLX5DV_DR_ESWITCH
540 if (priv->config.dv_esw_en) {
541 domain = mlx5_glue->dr_create_domain
542 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
544 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
548 sh->fdb_domain = domain;
549 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
557 /* Rollback the created objects. */
559 mlx5_glue->dr_destroy_domain(sh->rx_domain);
560 sh->rx_domain = NULL;
563 mlx5_glue->dr_destroy_domain(sh->tx_domain);
564 sh->tx_domain = NULL;
566 if (sh->fdb_domain) {
567 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
568 sh->fdb_domain = NULL;
570 if (sh->esw_drop_action) {
571 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
572 sh->esw_drop_action = NULL;
582 * Destroy DR related data within private structure.
585 * Pointer to the private device data structure.
588 mlx5_free_shared_dr(struct mlx5_priv *priv)
590 #ifdef HAVE_MLX5DV_DR
591 struct mlx5_ibv_shared *sh;
593 if (!priv->dr_shared)
598 assert(sh->dv_refcnt);
599 if (sh->dv_refcnt && --sh->dv_refcnt)
602 mlx5_glue->dr_destroy_domain(sh->rx_domain);
603 sh->rx_domain = NULL;
606 mlx5_glue->dr_destroy_domain(sh->tx_domain);
607 sh->tx_domain = NULL;
609 #ifdef HAVE_MLX5DV_DR_ESWITCH
610 if (sh->fdb_domain) {
611 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
612 sh->fdb_domain = NULL;
614 if (sh->esw_drop_action) {
615 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
616 sh->esw_drop_action = NULL;
619 pthread_mutex_destroy(&sh->dv_mutex);
626 * Initialize shared data between primary and secondary process.
628 * A memzone is reserved by primary process and secondary processes attach to
632 * 0 on success, a negative errno value otherwise and rte_errno is set.
635 mlx5_init_shared_data(void)
637 const struct rte_memzone *mz;
640 rte_spinlock_lock(&mlx5_shared_data_lock);
641 if (mlx5_shared_data == NULL) {
642 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
643 /* Allocate shared memory. */
644 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
645 sizeof(*mlx5_shared_data),
649 "Cannot allocate mlx5 shared data\n");
653 mlx5_shared_data = mz->addr;
654 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
655 rte_spinlock_init(&mlx5_shared_data->lock);
657 /* Lookup allocated shared memory. */
658 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
661 "Cannot attach mlx5 shared data\n");
665 mlx5_shared_data = mz->addr;
666 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
670 rte_spinlock_unlock(&mlx5_shared_data_lock);
675 * Retrieve integer value from environment variable.
678 * Environment variable name.
681 * Integer value, 0 if the variable is not set.
684 mlx5_getenv_int(const char *name)
686 const char *val = getenv(name);
694 * Verbs callback to allocate a memory. This function should allocate the space
695 * according to the size provided residing inside a huge page.
696 * Please note that all allocation must respect the alignment from libmlx5
697 * (i.e. currently sysconf(_SC_PAGESIZE)).
700 * The size in bytes of the memory to allocate.
702 * A pointer to the callback data.
705 * Allocated buffer, NULL otherwise and rte_errno is set.
708 mlx5_alloc_verbs_buf(size_t size, void *data)
710 struct mlx5_priv *priv = data;
712 size_t alignment = sysconf(_SC_PAGESIZE);
713 unsigned int socket = SOCKET_ID_ANY;
715 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
716 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
718 socket = ctrl->socket;
719 } else if (priv->verbs_alloc_ctx.type ==
720 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
721 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
723 socket = ctrl->socket;
725 assert(data != NULL);
726 ret = rte_malloc_socket(__func__, size, alignment, socket);
733 * Verbs callback to free a memory.
736 * A pointer to the memory to free.
738 * A pointer to the callback data.
741 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
743 assert(data != NULL);
748 * Initialize process private data structure.
751 * Pointer to Ethernet device structure.
754 * 0 on success, a negative errno value otherwise and rte_errno is set.
757 mlx5_proc_priv_init(struct rte_eth_dev *dev)
759 struct mlx5_priv *priv = dev->data->dev_private;
760 struct mlx5_proc_priv *ppriv;
764 * UAR register table follows the process private structure. BlueFlame
765 * registers for Tx queues are stored in the table.
768 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
769 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
770 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
775 ppriv->uar_table_sz = ppriv_size;
776 dev->process_private = ppriv;
781 * Un-initialize process private data structure.
784 * Pointer to Ethernet device structure.
787 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
789 if (!dev->process_private)
791 rte_free(dev->process_private);
792 dev->process_private = NULL;
796 * DPDK callback to close the device.
798 * Destroy all queues and objects, free memory.
801 * Pointer to Ethernet device structure.
804 mlx5_dev_close(struct rte_eth_dev *dev)
806 struct mlx5_priv *priv = dev->data->dev_private;
810 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
812 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
813 /* In case mlx5_dev_stop() has not been called. */
814 mlx5_dev_interrupt_handler_uninstall(dev);
815 mlx5_traffic_disable(dev);
816 mlx5_flow_flush(dev, NULL);
817 /* Prevent crashes when queues are still in use. */
818 dev->rx_pkt_burst = removed_rx_burst;
819 dev->tx_pkt_burst = removed_tx_burst;
821 /* Disable datapath on secondary process. */
822 mlx5_mp_req_stop_rxtx(dev);
823 if (priv->rxqs != NULL) {
824 /* XXX race condition if mlx5_rx_burst() is still running. */
826 for (i = 0; (i != priv->rxqs_n); ++i)
827 mlx5_rxq_release(dev, i);
831 if (priv->txqs != NULL) {
832 /* XXX race condition if mlx5_tx_burst() is still running. */
834 for (i = 0; (i != priv->txqs_n); ++i)
835 mlx5_txq_release(dev, i);
839 mlx5_proc_priv_uninit(dev);
840 mlx5_mprq_free_mp(dev);
841 mlx5_free_shared_dr(priv);
842 if (priv->rss_conf.rss_key != NULL)
843 rte_free(priv->rss_conf.rss_key);
844 if (priv->reta_idx != NULL)
845 rte_free(priv->reta_idx);
847 mlx5_nl_mac_addr_flush(dev);
848 if (priv->nl_socket_route >= 0)
849 close(priv->nl_socket_route);
850 if (priv->nl_socket_rdma >= 0)
851 close(priv->nl_socket_rdma);
852 if (priv->vmwa_context)
853 mlx5_vlan_vmwa_exit(priv->vmwa_context);
856 * Free the shared context in last turn, because the cleanup
857 * routines above may use some shared fields, like
858 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
859 * ifindex if Netlink fails.
861 mlx5_free_shared_ibctx(priv->sh);
864 ret = mlx5_hrxq_verify(dev);
866 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
868 ret = mlx5_ind_table_obj_verify(dev);
870 DRV_LOG(WARNING, "port %u some indirection table still remain",
872 ret = mlx5_rxq_obj_verify(dev);
874 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
876 ret = mlx5_rxq_verify(dev);
878 DRV_LOG(WARNING, "port %u some Rx queues still remain",
880 ret = mlx5_txq_ibv_verify(dev);
882 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
884 ret = mlx5_txq_verify(dev);
886 DRV_LOG(WARNING, "port %u some Tx queues still remain",
888 ret = mlx5_flow_verify(dev);
890 DRV_LOG(WARNING, "port %u some flows still remain",
892 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
896 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
897 struct mlx5_priv *opriv =
898 rte_eth_devices[port_id].data->dev_private;
901 opriv->domain_id != priv->domain_id ||
902 &rte_eth_devices[port_id] == dev)
907 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
909 memset(priv, 0, sizeof(*priv));
910 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
912 * Reset mac_addrs to NULL such that it is not freed as part of
913 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
914 * it is freed when dev_private is freed.
916 dev->data->mac_addrs = NULL;
919 const struct eth_dev_ops mlx5_dev_ops = {
920 .dev_configure = mlx5_dev_configure,
921 .dev_start = mlx5_dev_start,
922 .dev_stop = mlx5_dev_stop,
923 .dev_set_link_down = mlx5_set_link_down,
924 .dev_set_link_up = mlx5_set_link_up,
925 .dev_close = mlx5_dev_close,
926 .promiscuous_enable = mlx5_promiscuous_enable,
927 .promiscuous_disable = mlx5_promiscuous_disable,
928 .allmulticast_enable = mlx5_allmulticast_enable,
929 .allmulticast_disable = mlx5_allmulticast_disable,
930 .link_update = mlx5_link_update,
931 .stats_get = mlx5_stats_get,
932 .stats_reset = mlx5_stats_reset,
933 .xstats_get = mlx5_xstats_get,
934 .xstats_reset = mlx5_xstats_reset,
935 .xstats_get_names = mlx5_xstats_get_names,
936 .fw_version_get = mlx5_fw_version_get,
937 .dev_infos_get = mlx5_dev_infos_get,
938 .read_clock = mlx5_read_clock,
939 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
940 .vlan_filter_set = mlx5_vlan_filter_set,
941 .rx_queue_setup = mlx5_rx_queue_setup,
942 .tx_queue_setup = mlx5_tx_queue_setup,
943 .rx_queue_release = mlx5_rx_queue_release,
944 .tx_queue_release = mlx5_tx_queue_release,
945 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
946 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
947 .mac_addr_remove = mlx5_mac_addr_remove,
948 .mac_addr_add = mlx5_mac_addr_add,
949 .mac_addr_set = mlx5_mac_addr_set,
950 .set_mc_addr_list = mlx5_set_mc_addr_list,
951 .mtu_set = mlx5_dev_set_mtu,
952 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
953 .vlan_offload_set = mlx5_vlan_offload_set,
954 .reta_update = mlx5_dev_rss_reta_update,
955 .reta_query = mlx5_dev_rss_reta_query,
956 .rss_hash_update = mlx5_rss_hash_update,
957 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
958 .filter_ctrl = mlx5_dev_filter_ctrl,
959 .rx_descriptor_status = mlx5_rx_descriptor_status,
960 .tx_descriptor_status = mlx5_tx_descriptor_status,
961 .rx_queue_count = mlx5_rx_queue_count,
962 .rx_queue_intr_enable = mlx5_rx_intr_enable,
963 .rx_queue_intr_disable = mlx5_rx_intr_disable,
964 .is_removed = mlx5_is_removed,
967 /* Available operations from secondary process. */
968 static const struct eth_dev_ops mlx5_dev_sec_ops = {
969 .stats_get = mlx5_stats_get,
970 .stats_reset = mlx5_stats_reset,
971 .xstats_get = mlx5_xstats_get,
972 .xstats_reset = mlx5_xstats_reset,
973 .xstats_get_names = mlx5_xstats_get_names,
974 .fw_version_get = mlx5_fw_version_get,
975 .dev_infos_get = mlx5_dev_infos_get,
976 .rx_descriptor_status = mlx5_rx_descriptor_status,
977 .tx_descriptor_status = mlx5_tx_descriptor_status,
980 /* Available operations in flow isolated mode. */
981 const struct eth_dev_ops mlx5_dev_ops_isolate = {
982 .dev_configure = mlx5_dev_configure,
983 .dev_start = mlx5_dev_start,
984 .dev_stop = mlx5_dev_stop,
985 .dev_set_link_down = mlx5_set_link_down,
986 .dev_set_link_up = mlx5_set_link_up,
987 .dev_close = mlx5_dev_close,
988 .promiscuous_enable = mlx5_promiscuous_enable,
989 .promiscuous_disable = mlx5_promiscuous_disable,
990 .allmulticast_enable = mlx5_allmulticast_enable,
991 .allmulticast_disable = mlx5_allmulticast_disable,
992 .link_update = mlx5_link_update,
993 .stats_get = mlx5_stats_get,
994 .stats_reset = mlx5_stats_reset,
995 .xstats_get = mlx5_xstats_get,
996 .xstats_reset = mlx5_xstats_reset,
997 .xstats_get_names = mlx5_xstats_get_names,
998 .fw_version_get = mlx5_fw_version_get,
999 .dev_infos_get = mlx5_dev_infos_get,
1000 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1001 .vlan_filter_set = mlx5_vlan_filter_set,
1002 .rx_queue_setup = mlx5_rx_queue_setup,
1003 .tx_queue_setup = mlx5_tx_queue_setup,
1004 .rx_queue_release = mlx5_rx_queue_release,
1005 .tx_queue_release = mlx5_tx_queue_release,
1006 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1007 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1008 .mac_addr_remove = mlx5_mac_addr_remove,
1009 .mac_addr_add = mlx5_mac_addr_add,
1010 .mac_addr_set = mlx5_mac_addr_set,
1011 .set_mc_addr_list = mlx5_set_mc_addr_list,
1012 .mtu_set = mlx5_dev_set_mtu,
1013 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1014 .vlan_offload_set = mlx5_vlan_offload_set,
1015 .filter_ctrl = mlx5_dev_filter_ctrl,
1016 .rx_descriptor_status = mlx5_rx_descriptor_status,
1017 .tx_descriptor_status = mlx5_tx_descriptor_status,
1018 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1019 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1020 .is_removed = mlx5_is_removed,
1024 * Verify and store value for device argument.
1027 * Key argument to verify.
1029 * Value associated with key.
1034 * 0 on success, a negative errno value otherwise and rte_errno is set.
1037 mlx5_args_check(const char *key, const char *val, void *opaque)
1039 struct mlx5_dev_config *config = opaque;
1042 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1043 if (!strcmp(MLX5_REPRESENTOR, key))
1046 tmp = strtoul(val, NULL, 0);
1049 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1052 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1053 config->cqe_comp = !!tmp;
1054 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1055 config->cqe_pad = !!tmp;
1056 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1057 config->hw_padding = !!tmp;
1058 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1059 config->mprq.enabled = !!tmp;
1060 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1061 config->mprq.stride_num_n = tmp;
1062 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1063 config->mprq.max_memcpy_len = tmp;
1064 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1065 config->mprq.min_rxqs_num = tmp;
1066 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1067 DRV_LOG(WARNING, "%s: deprecated parameter,"
1068 " converted to txq_inline_max", key);
1069 config->txq_inline_max = tmp;
1070 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1071 config->txq_inline_max = tmp;
1072 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1073 config->txq_inline_min = tmp;
1074 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1075 config->txq_inline_mpw = tmp;
1076 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1077 config->txqs_inline = tmp;
1078 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1079 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1080 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1081 config->mps = !!tmp;
1082 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1083 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1084 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1085 DRV_LOG(WARNING, "%s: deprecated parameter,"
1086 " converted to txq_inline_mpw", key);
1087 config->txq_inline_mpw = tmp;
1088 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1089 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1090 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1091 config->rx_vec_en = !!tmp;
1092 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1093 config->l3_vxlan_en = !!tmp;
1094 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1095 config->vf_nl_en = !!tmp;
1096 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1097 config->dv_esw_en = !!tmp;
1098 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1099 config->dv_flow_en = !!tmp;
1100 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1101 config->mr_ext_memseg_en = !!tmp;
1102 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1103 config->max_dump_files_num = tmp;
1104 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1105 config->lro.timeout = tmp;
1107 DRV_LOG(WARNING, "%s: unknown parameter", key);
1115 * Parse device parameters.
1118 * Pointer to device configuration structure.
1120 * Device arguments structure.
1123 * 0 on success, a negative errno value otherwise and rte_errno is set.
1126 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1128 const char **params = (const char *[]){
1129 MLX5_RXQ_CQE_COMP_EN,
1130 MLX5_RXQ_CQE_PAD_EN,
1131 MLX5_RXQ_PKT_PAD_EN,
1133 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1134 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1137 MLX5_TXQ_INLINE_MIN,
1138 MLX5_TXQ_INLINE_MAX,
1139 MLX5_TXQ_INLINE_MPW,
1140 MLX5_TXQS_MIN_INLINE,
1143 MLX5_TXQ_MPW_HDR_DSEG_EN,
1144 MLX5_TXQ_MAX_INLINE_LEN,
1151 MLX5_MR_EXT_MEMSEG_EN,
1153 MLX5_MAX_DUMP_FILES_NUM,
1154 MLX5_LRO_TIMEOUT_USEC,
1157 struct rte_kvargs *kvlist;
1161 if (devargs == NULL)
1163 /* Following UGLY cast is done to pass checkpatch. */
1164 kvlist = rte_kvargs_parse(devargs->args, params);
1165 if (kvlist == NULL) {
1169 /* Process parameters. */
1170 for (i = 0; (params[i] != NULL); ++i) {
1171 if (rte_kvargs_count(kvlist, params[i])) {
1172 ret = rte_kvargs_process(kvlist, params[i],
1173 mlx5_args_check, config);
1176 rte_kvargs_free(kvlist);
1181 rte_kvargs_free(kvlist);
1185 static struct rte_pci_driver mlx5_driver;
1188 * PMD global initialization.
1190 * Independent from individual device, this function initializes global
1191 * per-PMD data structures distinguishing primary and secondary processes.
1192 * Hence, each initialization is called once per a process.
1195 * 0 on success, a negative errno value otherwise and rte_errno is set.
1198 mlx5_init_once(void)
1200 struct mlx5_shared_data *sd;
1201 struct mlx5_local_data *ld = &mlx5_local_data;
1204 if (mlx5_init_shared_data())
1206 sd = mlx5_shared_data;
1208 rte_spinlock_lock(&sd->lock);
1209 switch (rte_eal_process_type()) {
1210 case RTE_PROC_PRIMARY:
1213 LIST_INIT(&sd->mem_event_cb_list);
1214 rte_rwlock_init(&sd->mem_event_rwlock);
1215 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1216 mlx5_mr_mem_event_cb, NULL);
1217 ret = mlx5_mp_init_primary();
1220 sd->init_done = true;
1222 case RTE_PROC_SECONDARY:
1225 ret = mlx5_mp_init_secondary();
1228 ++sd->secondary_cnt;
1229 ld->init_done = true;
1235 rte_spinlock_unlock(&sd->lock);
1240 * Configures the minimal amount of data to inline into WQE
1241 * while sending packets.
1243 * - the txq_inline_min has the maximal priority, if this
1244 * key is specified in devargs
1245 * - if DevX is enabled the inline mode is queried from the
1246 * device (HCA attributes and NIC vport context if needed).
1247 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1248 * and none (0 bytes) for other NICs
1251 * Verbs device parameters (name, port, switch_info) to spawn.
1253 * Device configuration parameters.
1256 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1257 struct mlx5_dev_config *config)
1259 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1260 /* Application defines size of inlined data explicitly. */
1261 switch (spawn->pci_dev->id.device_id) {
1262 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1263 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1264 if (config->txq_inline_min <
1265 (int)MLX5_INLINE_HSIZE_L2) {
1267 "txq_inline_mix aligned to minimal"
1268 " ConnectX-4 required value %d",
1269 (int)MLX5_INLINE_HSIZE_L2);
1270 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1276 if (config->hca_attr.eth_net_offloads) {
1277 /* We have DevX enabled, inline mode queried successfully. */
1278 switch (config->hca_attr.wqe_inline_mode) {
1279 case MLX5_CAP_INLINE_MODE_L2:
1280 /* outer L2 header must be inlined. */
1281 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1283 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1284 /* No inline data are required by NIC. */
1285 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1286 config->hw_vlan_insert =
1287 config->hca_attr.wqe_vlan_insert;
1288 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1290 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1291 /* inline mode is defined by NIC vport context. */
1292 if (!config->hca_attr.eth_virt)
1294 switch (config->hca_attr.vport_inline_mode) {
1295 case MLX5_INLINE_MODE_NONE:
1296 config->txq_inline_min =
1297 MLX5_INLINE_HSIZE_NONE;
1299 case MLX5_INLINE_MODE_L2:
1300 config->txq_inline_min =
1301 MLX5_INLINE_HSIZE_L2;
1303 case MLX5_INLINE_MODE_IP:
1304 config->txq_inline_min =
1305 MLX5_INLINE_HSIZE_L3;
1307 case MLX5_INLINE_MODE_TCP_UDP:
1308 config->txq_inline_min =
1309 MLX5_INLINE_HSIZE_L4;
1311 case MLX5_INLINE_MODE_INNER_L2:
1312 config->txq_inline_min =
1313 MLX5_INLINE_HSIZE_INNER_L2;
1315 case MLX5_INLINE_MODE_INNER_IP:
1316 config->txq_inline_min =
1317 MLX5_INLINE_HSIZE_INNER_L3;
1319 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1320 config->txq_inline_min =
1321 MLX5_INLINE_HSIZE_INNER_L4;
1327 * We get here if we are unable to deduce
1328 * inline data size with DevX. Try PCI ID
1329 * to determine old NICs.
1331 switch (spawn->pci_dev->id.device_id) {
1332 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1333 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1334 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1335 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1336 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1337 config->hw_vlan_insert = 0;
1339 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1340 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1341 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1342 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1344 * These NICs support VLAN insertion from WQE and
1345 * report the wqe_vlan_insert flag. But there is the bug
1346 * and PFC control may be broken, so disable feature.
1348 config->hw_vlan_insert = 0;
1349 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1352 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1356 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1360 * Allocate page of door-bells and register it using DevX API.
1363 * Pointer to Ethernet device.
1366 * Pointer to new page on success, NULL otherwise.
1368 static struct mlx5_devx_dbr_page *
1369 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1371 struct mlx5_priv *priv = dev->data->dev_private;
1372 struct mlx5_devx_dbr_page *page;
1374 /* Allocate space for door-bell page and management data. */
1375 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1376 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1378 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1379 dev->data->port_id);
1382 /* Register allocated memory. */
1383 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1384 MLX5_DBR_PAGE_SIZE, 0);
1386 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1387 dev->data->port_id);
1395 * Find the next available door-bell, allocate new page if needed.
1398 * Pointer to Ethernet device.
1399 * @param [out] dbr_page
1400 * Door-bell page containing the page data.
1403 * Door-bell address offset on success, a negative error value otherwise.
1406 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1408 struct mlx5_priv *priv = dev->data->dev_private;
1409 struct mlx5_devx_dbr_page *page = NULL;
1412 LIST_FOREACH(page, &priv->dbrpgs, next)
1413 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1415 if (!page) { /* No page with free door-bell exists. */
1416 page = mlx5_alloc_dbr_page(dev);
1417 if (!page) /* Failed to allocate new page. */
1419 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1421 /* Loop to find bitmap part with clear bit. */
1423 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1426 /* Find the first clear bit. */
1427 j = rte_bsf64(~page->dbr_bitmap[i]);
1428 assert(i < (MLX5_DBR_PER_PAGE / 64));
1429 page->dbr_bitmap[i] |= (1 << j);
1432 return (((i * 64) + j) * sizeof(uint64_t));
1436 * Release a door-bell record.
1439 * Pointer to Ethernet device.
1440 * @param [in] umem_id
1441 * UMEM ID of page containing the door-bell record to release.
1442 * @param [in] offset
1443 * Offset of door-bell record in page.
1446 * 0 on success, a negative error value otherwise.
1449 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1451 struct mlx5_priv *priv = dev->data->dev_private;
1452 struct mlx5_devx_dbr_page *page = NULL;
1455 LIST_FOREACH(page, &priv->dbrpgs, next)
1456 /* Find the page this address belongs to. */
1457 if (page->umem->umem_id == umem_id)
1462 if (!page->dbr_count) {
1463 /* Page not used, free it and remove from list. */
1464 LIST_REMOVE(page, next);
1466 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1469 /* Mark in bitmap that this door-bell is not in use. */
1470 offset /= MLX5_DBR_SIZE;
1471 int i = offset / 64;
1472 int j = offset % 64;
1474 page->dbr_bitmap[i] &= ~(1 << j);
1480 * Spawn an Ethernet device from Verbs information.
1483 * Backing DPDK device.
1485 * Verbs device parameters (name, port, switch_info) to spawn.
1487 * Device configuration parameters.
1490 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1491 * is set. The following errors are defined:
1493 * EBUSY: device is not supposed to be spawned.
1494 * EEXIST: device is already spawned
1496 static struct rte_eth_dev *
1497 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1498 struct mlx5_dev_spawn_data *spawn,
1499 struct mlx5_dev_config config)
1501 const struct mlx5_switch_info *switch_info = &spawn->info;
1502 struct mlx5_ibv_shared *sh = NULL;
1503 struct ibv_port_attr port_attr;
1504 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1505 struct rte_eth_dev *eth_dev = NULL;
1506 struct mlx5_priv *priv = NULL;
1508 unsigned int hw_padding = 0;
1510 unsigned int cqe_comp;
1511 unsigned int cqe_pad = 0;
1512 unsigned int tunnel_en = 0;
1513 unsigned int mpls_en = 0;
1514 unsigned int swp = 0;
1515 unsigned int mprq = 0;
1516 unsigned int mprq_min_stride_size_n = 0;
1517 unsigned int mprq_max_stride_size_n = 0;
1518 unsigned int mprq_min_stride_num_n = 0;
1519 unsigned int mprq_max_stride_num_n = 0;
1520 struct rte_ether_addr mac;
1521 char name[RTE_ETH_NAME_MAX_LEN];
1522 int own_domain_id = 0;
1526 /* Determine if this port representor is supposed to be spawned. */
1527 if (switch_info->representor && dpdk_dev->devargs) {
1528 struct rte_eth_devargs eth_da;
1530 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1533 DRV_LOG(ERR, "failed to process device arguments: %s",
1534 strerror(rte_errno));
1537 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1538 if (eth_da.representor_ports[i] ==
1539 (uint16_t)switch_info->port_name)
1541 if (i == eth_da.nb_representor_ports) {
1546 /* Build device name. */
1547 if (!switch_info->representor)
1548 strlcpy(name, dpdk_dev->name, sizeof(name));
1550 snprintf(name, sizeof(name), "%s_representor_%u",
1551 dpdk_dev->name, switch_info->port_name);
1552 /* check if the device is already spawned */
1553 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1557 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1558 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1559 eth_dev = rte_eth_dev_attach_secondary(name);
1560 if (eth_dev == NULL) {
1561 DRV_LOG(ERR, "can not attach rte ethdev");
1565 eth_dev->device = dpdk_dev;
1566 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1567 err = mlx5_proc_priv_init(eth_dev);
1570 /* Receive command fd from primary process */
1571 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1574 /* Remap UAR for Tx queues. */
1575 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1579 * Ethdev pointer is still required as input since
1580 * the primary device is not accessible from the
1581 * secondary process.
1583 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1584 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1587 sh = mlx5_alloc_shared_ibctx(spawn);
1590 config.devx = sh->devx;
1591 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1592 config.dest_tir = 1;
1594 #ifdef HAVE_IBV_MLX5_MOD_SWP
1595 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1598 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1599 * as all ConnectX-5 devices.
1601 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1602 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1604 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1605 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1607 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1608 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1609 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1610 DRV_LOG(DEBUG, "enhanced MPW is supported");
1611 mps = MLX5_MPW_ENHANCED;
1613 DRV_LOG(DEBUG, "MPW is supported");
1617 DRV_LOG(DEBUG, "MPW isn't supported");
1618 mps = MLX5_MPW_DISABLED;
1620 #ifdef HAVE_IBV_MLX5_MOD_SWP
1621 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1622 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1623 DRV_LOG(DEBUG, "SWP support: %u", swp);
1626 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1627 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1628 struct mlx5dv_striding_rq_caps mprq_caps =
1629 dv_attr.striding_rq_caps;
1631 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1632 mprq_caps.min_single_stride_log_num_of_bytes);
1633 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1634 mprq_caps.max_single_stride_log_num_of_bytes);
1635 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1636 mprq_caps.min_single_wqe_log_num_of_strides);
1637 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1638 mprq_caps.max_single_wqe_log_num_of_strides);
1639 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1640 mprq_caps.supported_qpts);
1641 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1643 mprq_min_stride_size_n =
1644 mprq_caps.min_single_stride_log_num_of_bytes;
1645 mprq_max_stride_size_n =
1646 mprq_caps.max_single_stride_log_num_of_bytes;
1647 mprq_min_stride_num_n =
1648 mprq_caps.min_single_wqe_log_num_of_strides;
1649 mprq_max_stride_num_n =
1650 mprq_caps.max_single_wqe_log_num_of_strides;
1651 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1652 mprq_min_stride_num_n);
1655 if (RTE_CACHE_LINE_SIZE == 128 &&
1656 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1660 config.cqe_comp = cqe_comp;
1661 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1662 /* Whether device supports 128B Rx CQE padding. */
1663 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1664 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1666 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1667 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1668 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1669 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1670 (dv_attr.tunnel_offloads_caps &
1671 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1673 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1674 tunnel_en ? "" : "not ");
1677 "tunnel offloading disabled due to old OFED/rdma-core version");
1679 config.tunnel_en = tunnel_en;
1680 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1681 mpls_en = ((dv_attr.tunnel_offloads_caps &
1682 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1683 (dv_attr.tunnel_offloads_caps &
1684 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1685 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1686 mpls_en ? "" : "not ");
1688 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1689 " old OFED/rdma-core version or firmware configuration");
1691 config.mpls_en = mpls_en;
1692 /* Check port status. */
1693 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1695 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1698 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1699 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1703 if (port_attr.state != IBV_PORT_ACTIVE)
1704 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1705 mlx5_glue->port_state_str(port_attr.state),
1707 /* Allocate private eth device data. */
1708 priv = rte_zmalloc("ethdev private structure",
1710 RTE_CACHE_LINE_SIZE);
1712 DRV_LOG(ERR, "priv allocation failure");
1717 priv->ibv_port = spawn->ibv_port;
1718 priv->mtu = RTE_ETHER_MTU;
1720 /* Initialize UAR access locks for 32bit implementations. */
1721 rte_spinlock_init(&priv->uar_lock_cq);
1722 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1723 rte_spinlock_init(&priv->uar_lock[i]);
1725 /* Some internal functions rely on Netlink sockets, open them now. */
1726 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1727 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1729 priv->representor = !!switch_info->representor;
1730 priv->master = !!switch_info->master;
1731 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1733 * Currently we support single E-Switch per PF configurations
1734 * only and vport_id field contains the vport index for
1735 * associated VF, which is deduced from representor port name.
1736 * For example, let's have the IB device port 10, it has
1737 * attached network device eth0, which has port name attribute
1738 * pf0vf2, we can deduce the VF number as 2, and set vport index
1739 * as 3 (2+1). This assigning schema should be changed if the
1740 * multiple E-Switch instances per PF configurations or/and PCI
1741 * subfunctions are added.
1743 priv->vport_id = switch_info->representor ?
1744 switch_info->port_name + 1 : -1;
1745 /* representor_id field keeps the unmodified port/VF index. */
1746 priv->representor_id = switch_info->representor ?
1747 switch_info->port_name : -1;
1749 * Look for sibling devices in order to reuse their switch domain
1750 * if any, otherwise allocate one.
1752 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1753 const struct mlx5_priv *opriv =
1754 rte_eth_devices[port_id].data->dev_private;
1758 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1760 priv->domain_id = opriv->domain_id;
1763 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1764 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1767 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1768 strerror(rte_errno));
1773 err = mlx5_args(&config, dpdk_dev->devargs);
1776 DRV_LOG(ERR, "failed to process device arguments: %s",
1777 strerror(rte_errno));
1780 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1781 IBV_DEVICE_RAW_IP_CSUM);
1782 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1783 (config.hw_csum ? "" : "not "));
1784 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1785 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1786 DRV_LOG(DEBUG, "counters are not supported");
1788 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1789 if (config.dv_flow_en) {
1790 DRV_LOG(WARNING, "DV flow is not supported");
1791 config.dv_flow_en = 0;
1794 config.ind_table_max_size =
1795 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1797 * Remove this check once DPDK supports larger/variable
1798 * indirection tables.
1800 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1801 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1802 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1803 config.ind_table_max_size);
1804 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1805 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1806 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1807 (config.hw_vlan_strip ? "" : "not "));
1808 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1809 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1810 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1811 (config.hw_fcs_strip ? "" : "not "));
1812 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1813 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1814 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1815 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1816 IBV_DEVICE_PCI_WRITE_END_PADDING);
1818 if (config.hw_padding && !hw_padding) {
1819 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1820 config.hw_padding = 0;
1821 } else if (config.hw_padding) {
1822 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1824 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1825 (sh->device_attr.tso_caps.supported_qpts &
1826 (1 << IBV_QPT_RAW_PACKET)));
1828 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1830 * MPW is disabled by default, while the Enhanced MPW is enabled
1833 if (config.mps == MLX5_ARG_UNSET)
1834 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1837 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1838 DRV_LOG(INFO, "%sMPS is %s",
1839 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1840 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1841 if (config.cqe_comp && !cqe_comp) {
1842 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1843 config.cqe_comp = 0;
1845 if (config.cqe_pad && !cqe_pad) {
1846 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1848 } else if (config.cqe_pad) {
1849 DRV_LOG(INFO, "Rx CQE padding is enabled");
1852 priv->counter_fallback = 0;
1853 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1858 if (!config.hca_attr.flow_counters_dump)
1859 priv->counter_fallback = 1;
1860 #ifndef HAVE_IBV_DEVX_ASYNC
1861 priv->counter_fallback = 1;
1863 if (priv->counter_fallback)
1864 DRV_LOG(INFO, "Use fall-back DV counter management\n");
1865 /* Check for LRO support. */
1866 if (config.dest_tir && config.hca_attr.lro_cap) {
1867 /* TBD check tunnel lro caps. */
1868 config.lro.supported = config.hca_attr.lro_cap;
1869 DRV_LOG(DEBUG, "Device supports LRO");
1871 * If LRO timeout is not configured by application,
1872 * use the minimal supported value.
1874 if (!config.lro.timeout)
1875 config.lro.timeout =
1876 config.hca_attr.lro_timer_supported_periods[0];
1877 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1878 config.lro.timeout);
1881 if (config.mprq.enabled && mprq) {
1882 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1883 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1884 config.mprq.stride_num_n =
1885 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1886 mprq_min_stride_num_n);
1888 "the number of strides"
1889 " for Multi-Packet RQ is out of range,"
1890 " setting default value (%u)",
1891 1 << config.mprq.stride_num_n);
1893 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1894 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1895 } else if (config.mprq.enabled && !mprq) {
1896 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1897 config.mprq.enabled = 0;
1899 if (config.max_dump_files_num == 0)
1900 config.max_dump_files_num = 128;
1901 eth_dev = rte_eth_dev_allocate(name);
1902 if (eth_dev == NULL) {
1903 DRV_LOG(ERR, "can not allocate rte ethdev");
1907 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1908 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1909 if (priv->representor) {
1910 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1911 eth_dev->data->representor_id = priv->representor_id;
1914 * Store associated network device interface index. This index
1915 * is permanent throughout the lifetime of device. So, we may store
1916 * the ifindex here and use the cached value further.
1918 assert(spawn->ifindex);
1919 priv->if_index = spawn->ifindex;
1920 eth_dev->data->dev_private = priv;
1921 priv->dev_data = eth_dev->data;
1922 eth_dev->data->mac_addrs = priv->mac;
1923 eth_dev->device = dpdk_dev;
1924 /* Configure the first MAC address by default. */
1925 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1927 "port %u cannot get MAC address, is mlx5_en"
1928 " loaded? (errno: %s)",
1929 eth_dev->data->port_id, strerror(rte_errno));
1934 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1935 eth_dev->data->port_id,
1936 mac.addr_bytes[0], mac.addr_bytes[1],
1937 mac.addr_bytes[2], mac.addr_bytes[3],
1938 mac.addr_bytes[4], mac.addr_bytes[5]);
1941 char ifname[IF_NAMESIZE];
1943 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1944 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1945 eth_dev->data->port_id, ifname);
1947 DRV_LOG(DEBUG, "port %u ifname is unknown",
1948 eth_dev->data->port_id);
1951 /* Get actual MTU if possible. */
1952 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1957 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1959 /* Initialize burst functions to prevent crashes before link-up. */
1960 eth_dev->rx_pkt_burst = removed_rx_burst;
1961 eth_dev->tx_pkt_burst = removed_tx_burst;
1962 eth_dev->dev_ops = &mlx5_dev_ops;
1963 /* Register MAC address. */
1964 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1965 if (config.vf && config.vf_nl_en)
1966 mlx5_nl_mac_addr_sync(eth_dev);
1967 TAILQ_INIT(&priv->flows);
1968 TAILQ_INIT(&priv->ctrl_flows);
1969 /* Hint libmlx5 to use PMD allocator for data plane resources */
1970 struct mlx5dv_ctx_allocators alctr = {
1971 .alloc = &mlx5_alloc_verbs_buf,
1972 .free = &mlx5_free_verbs_buf,
1975 mlx5_glue->dv_set_context_attr(sh->ctx,
1976 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1977 (void *)((uintptr_t)&alctr));
1978 /* Bring Ethernet device up. */
1979 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1980 eth_dev->data->port_id);
1981 mlx5_set_link_up(eth_dev);
1983 * Even though the interrupt handler is not installed yet,
1984 * interrupts will still trigger on the async_fd from
1985 * Verbs context returned by ibv_open_device().
1987 mlx5_link_update(eth_dev, 0);
1988 #ifdef HAVE_MLX5DV_DR_ESWITCH
1989 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1990 (switch_info->representor || switch_info->master)))
1991 config.dv_esw_en = 0;
1993 config.dv_esw_en = 0;
1995 /* Detect minimal data bytes to inline. */
1996 mlx5_set_min_inline(spawn, &config);
1997 /* Store device configuration on private structure. */
1998 priv->config = config;
1999 /* Create context for virtual machine VLAN workaround. */
2000 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2001 if (config.dv_flow_en) {
2002 err = mlx5_alloc_shared_dr(priv);
2006 /* Supported Verbs flow priority number detection. */
2007 err = mlx5_flow_discover_priorities(eth_dev);
2012 priv->config.flow_prio = err;
2017 mlx5_free_shared_dr(priv);
2018 if (priv->nl_socket_route >= 0)
2019 close(priv->nl_socket_route);
2020 if (priv->nl_socket_rdma >= 0)
2021 close(priv->nl_socket_rdma);
2022 if (priv->vmwa_context)
2023 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2025 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2027 if (eth_dev != NULL)
2028 eth_dev->data->dev_private = NULL;
2030 if (eth_dev != NULL) {
2031 /* mac_addrs must not be freed alone because part of dev_private */
2032 eth_dev->data->mac_addrs = NULL;
2033 rte_eth_dev_release_port(eth_dev);
2036 mlx5_free_shared_ibctx(sh);
2043 * Comparison callback to sort device data.
2045 * This is meant to be used with qsort().
2048 * Pointer to pointer to first data object.
2050 * Pointer to pointer to second data object.
2053 * 0 if both objects are equal, less than 0 if the first argument is less
2054 * than the second, greater than 0 otherwise.
2057 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2059 const struct mlx5_switch_info *si_a =
2060 &((const struct mlx5_dev_spawn_data *)a)->info;
2061 const struct mlx5_switch_info *si_b =
2062 &((const struct mlx5_dev_spawn_data *)b)->info;
2065 /* Master device first. */
2066 ret = si_b->master - si_a->master;
2069 /* Then representor devices. */
2070 ret = si_b->representor - si_a->representor;
2073 /* Unidentified devices come last in no specific order. */
2074 if (!si_a->representor)
2076 /* Order representors by name. */
2077 return si_a->port_name - si_b->port_name;
2081 * DPDK callback to register a PCI device.
2083 * This function spawns Ethernet devices out of a given PCI device.
2085 * @param[in] pci_drv
2086 * PCI driver structure (mlx5_driver).
2087 * @param[in] pci_dev
2088 * PCI device information.
2091 * 0 on success, a negative errno value otherwise and rte_errno is set.
2094 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2095 struct rte_pci_device *pci_dev)
2097 struct ibv_device **ibv_list;
2099 * Number of found IB Devices matching with requested PCI BDF.
2100 * nd != 1 means there are multiple IB devices over the same
2101 * PCI device and we have representors and master.
2103 unsigned int nd = 0;
2105 * Number of found IB device Ports. nd = 1 and np = 1..n means
2106 * we have the single multiport IB device, and there may be
2107 * representors attached to some of found ports.
2109 unsigned int np = 0;
2111 * Number of DPDK ethernet devices to Spawn - either over
2112 * multiple IB devices or multiple ports of single IB device.
2113 * Actually this is the number of iterations to spawn.
2115 unsigned int ns = 0;
2116 struct mlx5_dev_config dev_config;
2119 ret = mlx5_init_once();
2121 DRV_LOG(ERR, "unable to init PMD global data: %s",
2122 strerror(rte_errno));
2125 assert(pci_drv == &mlx5_driver);
2127 ibv_list = mlx5_glue->get_device_list(&ret);
2129 rte_errno = errno ? errno : ENOSYS;
2130 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2134 * First scan the list of all Infiniband devices to find
2135 * matching ones, gathering into the list.
2137 struct ibv_device *ibv_match[ret + 1];
2143 struct rte_pci_addr pci_addr;
2145 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2146 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
2148 if (pci_dev->addr.domain != pci_addr.domain ||
2149 pci_dev->addr.bus != pci_addr.bus ||
2150 pci_dev->addr.devid != pci_addr.devid ||
2151 pci_dev->addr.function != pci_addr.function)
2153 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2154 ibv_list[ret]->name);
2155 ibv_match[nd++] = ibv_list[ret];
2157 ibv_match[nd] = NULL;
2159 /* No device matches, just complain and bail out. */
2160 mlx5_glue->free_device_list(ibv_list);
2162 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2163 " are kernel drivers loaded?",
2164 pci_dev->addr.domain, pci_dev->addr.bus,
2165 pci_dev->addr.devid, pci_dev->addr.function);
2170 nl_route = mlx5_nl_init(NETLINK_ROUTE);
2171 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2174 * Found single matching device may have multiple ports.
2175 * Each port may be representor, we have to check the port
2176 * number and check the representors existence.
2179 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2181 DRV_LOG(WARNING, "can not get IB device \"%s\""
2182 " ports number", ibv_match[0]->name);
2185 * Now we can determine the maximal
2186 * amount of devices to be spawned.
2188 struct mlx5_dev_spawn_data list[np ? np : nd];
2192 * Single IB device with multiple ports found,
2193 * it may be E-Switch master device and representors.
2194 * We have to perform identification trough the ports.
2196 assert(nl_rdma >= 0);
2199 for (i = 1; i <= np; ++i) {
2200 list[ns].max_port = np;
2201 list[ns].ibv_port = i;
2202 list[ns].ibv_dev = ibv_match[0];
2203 list[ns].eth_dev = NULL;
2204 list[ns].pci_dev = pci_dev;
2205 list[ns].ifindex = mlx5_nl_ifindex
2206 (nl_rdma, list[ns].ibv_dev->name, i);
2207 if (!list[ns].ifindex) {
2209 * No network interface index found for the
2210 * specified port, it means there is no
2211 * representor on this port. It's OK,
2212 * there can be disabled ports, for example
2213 * if sriov_numvfs < sriov_totalvfs.
2219 ret = mlx5_nl_switch_info
2223 if (ret || (!list[ns].info.representor &&
2224 !list[ns].info.master)) {
2226 * We failed to recognize representors with
2227 * Netlink, let's try to perform the task
2230 ret = mlx5_sysfs_switch_info
2234 if (!ret && (list[ns].info.representor ^
2235 list[ns].info.master))
2240 "unable to recognize master/representors"
2241 " on the IB device with multiple ports");
2248 * The existence of several matching entries (nd > 1) means
2249 * port representors have been instantiated. No existing Verbs
2250 * call nor sysfs entries can tell them apart, this can only
2251 * be done through Netlink calls assuming kernel drivers are
2252 * recent enough to support them.
2254 * In the event of identification failure through Netlink,
2255 * try again through sysfs, then:
2257 * 1. A single IB device matches (nd == 1) with single
2258 * port (np=0/1) and is not a representor, assume
2259 * no switch support.
2261 * 2. Otherwise no safe assumptions can be made;
2262 * complain louder and bail out.
2265 for (i = 0; i != nd; ++i) {
2266 memset(&list[ns].info, 0, sizeof(list[ns].info));
2267 list[ns].max_port = 1;
2268 list[ns].ibv_port = 1;
2269 list[ns].ibv_dev = ibv_match[i];
2270 list[ns].eth_dev = NULL;
2271 list[ns].pci_dev = pci_dev;
2272 list[ns].ifindex = 0;
2274 list[ns].ifindex = mlx5_nl_ifindex
2275 (nl_rdma, list[ns].ibv_dev->name, 1);
2276 if (!list[ns].ifindex) {
2277 char ifname[IF_NAMESIZE];
2280 * Netlink failed, it may happen with old
2281 * ib_core kernel driver (before 4.16).
2282 * We can assume there is old driver because
2283 * here we are processing single ports IB
2284 * devices. Let's try sysfs to retrieve
2285 * the ifindex. The method works for
2286 * master device only.
2290 * Multiple devices found, assume
2291 * representors, can not distinguish
2292 * master/representor and retrieve
2293 * ifindex via sysfs.
2297 ret = mlx5_get_master_ifname
2298 (ibv_match[i]->ibdev_path, &ifname);
2301 if_nametoindex(ifname);
2302 if (!list[ns].ifindex) {
2304 * No network interface index found
2305 * for the specified device, it means
2306 * there it is neither representor
2314 ret = mlx5_nl_switch_info
2318 if (ret || (!list[ns].info.representor &&
2319 !list[ns].info.master)) {
2321 * We failed to recognize representors with
2322 * Netlink, let's try to perform the task
2325 ret = mlx5_sysfs_switch_info
2329 if (!ret && (list[ns].info.representor ^
2330 list[ns].info.master)) {
2332 } else if ((nd == 1) &&
2333 !list[ns].info.representor &&
2334 !list[ns].info.master) {
2336 * Single IB device with
2337 * one physical port and
2338 * attached network device.
2339 * May be SRIOV is not enabled
2340 * or there is no representors.
2342 DRV_LOG(INFO, "no E-Switch support detected");
2349 "unable to recognize master/representors"
2350 " on the multiple IB devices");
2358 * Sort list to probe devices in natural order for users convenience
2359 * (i.e. master first, then representors from lowest to highest ID).
2361 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2362 /* Default configuration. */
2363 dev_config = (struct mlx5_dev_config){
2365 .mps = MLX5_ARG_UNSET,
2367 .txq_inline_max = MLX5_ARG_UNSET,
2368 .txq_inline_min = MLX5_ARG_UNSET,
2369 .txq_inline_mpw = MLX5_ARG_UNSET,
2370 .txqs_inline = MLX5_ARG_UNSET,
2372 .mr_ext_memseg_en = 1,
2374 .enabled = 0, /* Disabled by default. */
2375 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2376 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2377 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2381 /* Device specific configuration. */
2382 switch (pci_dev->id.device_id) {
2383 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2384 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2385 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2386 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2392 for (i = 0; i != ns; ++i) {
2395 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2398 if (!list[i].eth_dev) {
2399 if (rte_errno != EBUSY && rte_errno != EEXIST)
2401 /* Device is disabled or already spawned. Ignore it. */
2404 restore = list[i].eth_dev->data->dev_flags;
2405 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2406 /* Restore non-PCI flags cleared by the above call. */
2407 list[i].eth_dev->data->dev_flags |= restore;
2408 rte_eth_dev_probing_finish(list[i].eth_dev);
2412 "probe of PCI device " PCI_PRI_FMT " aborted after"
2413 " encountering an error: %s",
2414 pci_dev->addr.domain, pci_dev->addr.bus,
2415 pci_dev->addr.devid, pci_dev->addr.function,
2416 strerror(rte_errno));
2420 if (!list[i].eth_dev)
2422 mlx5_dev_close(list[i].eth_dev);
2423 /* mac_addrs must not be freed because in dev_private */
2424 list[i].eth_dev->data->mac_addrs = NULL;
2425 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2427 /* Restore original error. */
2434 * Do the routine cleanup:
2435 * - close opened Netlink sockets
2436 * - free the Infiniband device list
2443 mlx5_glue->free_device_list(ibv_list);
2448 * DPDK callback to remove a PCI device.
2450 * This function removes all Ethernet devices belong to a given PCI device.
2452 * @param[in] pci_dev
2453 * Pointer to the PCI device.
2456 * 0 on success, the function cannot fail.
2459 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2463 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2464 rte_eth_dev_close(port_id);
2468 static const struct rte_pci_id mlx5_pci_id_map[] = {
2470 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2471 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2474 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2475 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2478 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2479 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2482 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2483 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2486 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2487 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2490 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2491 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2494 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2495 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2498 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2499 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2502 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2503 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2506 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2507 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2510 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2511 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2514 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2515 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2522 static struct rte_pci_driver mlx5_driver = {
2524 .name = MLX5_DRIVER_NAME
2526 .id_table = mlx5_pci_id_map,
2527 .probe = mlx5_pci_probe,
2528 .remove = mlx5_pci_remove,
2529 .dma_map = mlx5_dma_map,
2530 .dma_unmap = mlx5_dma_unmap,
2531 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2532 RTE_PCI_DRV_PROBE_AGAIN,
2535 #ifdef RTE_IBVERBS_LINK_DLOPEN
2538 * Suffix RTE_EAL_PMD_PATH with "-glue".
2540 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2541 * suffixing its last component.
2544 * Output buffer, should be large enough otherwise NULL is returned.
2549 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2552 mlx5_glue_path(char *buf, size_t size)
2554 static const char *const bad[] = { "/", ".", "..", NULL };
2555 const char *path = RTE_EAL_PMD_PATH;
2556 size_t len = strlen(path);
2560 while (len && path[len - 1] == '/')
2562 for (off = len; off && path[off - 1] != '/'; --off)
2564 for (i = 0; bad[i]; ++i)
2565 if (!strncmp(path + off, bad[i], (int)(len - off)))
2567 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2568 if (i == -1 || (size_t)i >= size)
2573 "unable to append \"-glue\" to last component of"
2574 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2575 " please re-configure DPDK");
2580 * Initialization routine for run-time dependency on rdma-core.
2583 mlx5_glue_init(void)
2585 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2586 const char *path[] = {
2588 * A basic security check is necessary before trusting
2589 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2591 (geteuid() == getuid() && getegid() == getgid() ?
2592 getenv("MLX5_GLUE_PATH") : NULL),
2594 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2595 * variant, otherwise let dlopen() look up libraries on its
2598 (*RTE_EAL_PMD_PATH ?
2599 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2602 void *handle = NULL;
2606 while (!handle && i != RTE_DIM(path)) {
2615 end = strpbrk(path[i], ":;");
2617 end = path[i] + strlen(path[i]);
2618 len = end - path[i];
2623 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2625 (!len || *(end - 1) == '/') ? "" : "/");
2628 if (sizeof(name) != (size_t)ret + 1)
2630 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2632 handle = dlopen(name, RTLD_LAZY);
2643 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2646 sym = dlsym(handle, "mlx5_glue");
2647 if (!sym || !*sym) {
2651 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2660 "cannot initialize PMD due to missing run-time dependency on"
2661 " rdma-core libraries (libibverbs, libmlx5)");
2668 * Driver initialization routine.
2670 RTE_INIT(rte_mlx5_pmd_init)
2672 /* Initialize driver log type. */
2673 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2674 if (mlx5_logtype >= 0)
2675 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2677 /* Build the static tables for Verbs conversion. */
2678 mlx5_set_ptype_table();
2679 mlx5_set_cksum_table();
2680 mlx5_set_swp_types_table();
2682 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2683 * huge pages. Calling ibv_fork_init() during init allows
2684 * applications to use fork() safely for purposes other than
2685 * using this PMD, which is not supported in forked processes.
2687 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2688 /* Match the size of Rx completion entry to the size of a cacheline. */
2689 if (RTE_CACHE_LINE_SIZE == 128)
2690 setenv("MLX5_CQE_SIZE", "128", 0);
2692 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2693 * cleanup all the Verbs resources even when the device was removed.
2695 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2696 #ifdef RTE_IBVERBS_LINK_DLOPEN
2697 if (mlx5_glue_init())
2702 /* Glue structure must not contain any NULL pointers. */
2706 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2707 assert(((const void *const *)mlx5_glue)[i]);
2710 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2712 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2713 mlx5_glue->version, MLX5_GLUE_VERSION);
2716 mlx5_glue->fork_init();
2717 rte_pci_register(&mlx5_driver);
2720 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2721 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2722 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");