4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
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12 * notice, this list of conditions and the following disclaimer.
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14 * notice, this list of conditions and the following disclaimer in
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17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
46 #pragma GCC diagnostic ignored "-Wpedantic"
48 #include <infiniband/verbs.h>
50 #pragma GCC diagnostic error "-Wpedantic"
53 /* DPDK headers don't like -pedantic. */
55 #pragma GCC diagnostic ignored "-Wpedantic"
57 #include <rte_malloc.h>
58 #include <rte_ethdev.h>
60 #include <rte_common.h>
61 #include <rte_kvargs.h>
63 #pragma GCC diagnostic error "-Wpedantic"
67 #include "mlx5_utils.h"
68 #include "mlx5_rxtx.h"
69 #include "mlx5_autoconf.h"
70 #include "mlx5_defs.h"
72 /* Device parameter to enable RX completion queue compression. */
73 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
75 /* Device parameter to configure inline send. */
76 #define MLX5_TXQ_INLINE "txq_inline"
79 * Device parameter to configure the number of TX queues threshold for
80 * enabling inline send.
82 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
84 /* Device parameter to enable multi-packet send WQEs. */
85 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
87 /* Device parameter to enable hardware TSO offload. */
88 #define MLX5_TSO "tso"
91 * Retrieve integer value from environment variable.
94 * Environment variable name.
97 * Integer value, 0 if the variable is not set.
100 mlx5_getenv_int(const char *name)
102 const char *val = getenv(name);
110 * DPDK callback to close the device.
112 * Destroy all queues and objects, free memory.
115 * Pointer to Ethernet device structure.
118 mlx5_dev_close(struct rte_eth_dev *dev)
120 struct priv *priv = mlx5_get_priv(dev);
124 DEBUG("%p: closing device \"%s\"",
126 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
127 /* In case mlx5_dev_stop() has not been called. */
128 priv_dev_interrupt_handler_uninstall(priv, dev);
129 priv_special_flow_disable_all(priv);
130 priv_mac_addrs_disable(priv);
131 priv_destroy_hash_rxqs(priv);
133 /* Remove flow director elements. */
134 priv_fdir_disable(priv);
135 priv_fdir_delete_filters_list(priv);
137 /* Prevent crashes when queues are still in use. */
138 dev->rx_pkt_burst = removed_rx_burst;
139 dev->tx_pkt_burst = removed_tx_burst;
140 if (priv->rxqs != NULL) {
141 /* XXX race condition if mlx5_rx_burst() is still running. */
143 for (i = 0; (i != priv->rxqs_n); ++i) {
144 struct rxq *rxq = (*priv->rxqs)[i];
145 struct rxq_ctrl *rxq_ctrl;
149 rxq_ctrl = container_of(rxq, struct rxq_ctrl, rxq);
150 (*priv->rxqs)[i] = NULL;
151 rxq_cleanup(rxq_ctrl);
157 if (priv->txqs != NULL) {
158 /* XXX race condition if mlx5_tx_burst() is still running. */
160 for (i = 0; (i != priv->txqs_n); ++i) {
161 struct txq *txq = (*priv->txqs)[i];
162 struct txq_ctrl *txq_ctrl;
166 txq_ctrl = container_of(txq, struct txq_ctrl, txq);
167 (*priv->txqs)[i] = NULL;
168 txq_cleanup(txq_ctrl);
174 if (priv->pd != NULL) {
175 assert(priv->ctx != NULL);
176 claim_zero(ibv_dealloc_pd(priv->pd));
177 claim_zero(ibv_close_device(priv->ctx));
179 assert(priv->ctx == NULL);
180 if (priv->rss_conf != NULL) {
181 for (i = 0; (i != hash_rxq_init_n); ++i)
182 rte_free((*priv->rss_conf)[i]);
183 rte_free(priv->rss_conf);
185 if (priv->reta_idx != NULL)
186 rte_free(priv->reta_idx);
188 memset(priv, 0, sizeof(*priv));
191 static const struct eth_dev_ops mlx5_dev_ops = {
192 .dev_configure = mlx5_dev_configure,
193 .dev_start = mlx5_dev_start,
194 .dev_stop = mlx5_dev_stop,
195 .dev_set_link_down = mlx5_set_link_down,
196 .dev_set_link_up = mlx5_set_link_up,
197 .dev_close = mlx5_dev_close,
198 .promiscuous_enable = mlx5_promiscuous_enable,
199 .promiscuous_disable = mlx5_promiscuous_disable,
200 .allmulticast_enable = mlx5_allmulticast_enable,
201 .allmulticast_disable = mlx5_allmulticast_disable,
202 .link_update = mlx5_link_update,
203 .stats_get = mlx5_stats_get,
204 .stats_reset = mlx5_stats_reset,
205 .xstats_get = mlx5_xstats_get,
206 .xstats_reset = mlx5_xstats_reset,
207 .xstats_get_names = mlx5_xstats_get_names,
208 .dev_infos_get = mlx5_dev_infos_get,
209 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
210 .vlan_filter_set = mlx5_vlan_filter_set,
211 .rx_queue_setup = mlx5_rx_queue_setup,
212 .tx_queue_setup = mlx5_tx_queue_setup,
213 .rx_queue_release = mlx5_rx_queue_release,
214 .tx_queue_release = mlx5_tx_queue_release,
215 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
216 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
217 .mac_addr_remove = mlx5_mac_addr_remove,
218 .mac_addr_add = mlx5_mac_addr_add,
219 .mac_addr_set = mlx5_mac_addr_set,
220 .mtu_set = mlx5_dev_set_mtu,
221 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
222 .vlan_offload_set = mlx5_vlan_offload_set,
223 .reta_update = mlx5_dev_rss_reta_update,
224 .reta_query = mlx5_dev_rss_reta_query,
225 .rss_hash_update = mlx5_rss_hash_update,
226 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
227 .filter_ctrl = mlx5_dev_filter_ctrl,
228 .rx_descriptor_status = mlx5_rx_descriptor_status,
229 .tx_descriptor_status = mlx5_tx_descriptor_status,
233 struct rte_pci_addr pci_addr; /* associated PCI address */
234 uint32_t ports; /* physical ports bitfield. */
238 * Get device index in mlx5_dev[] from PCI bus address.
240 * @param[in] pci_addr
241 * PCI bus address to look for.
244 * mlx5_dev[] index on success, -1 on failure.
247 mlx5_dev_idx(struct rte_pci_addr *pci_addr)
252 assert(pci_addr != NULL);
253 for (i = 0; (i != RTE_DIM(mlx5_dev)); ++i) {
254 if ((mlx5_dev[i].pci_addr.domain == pci_addr->domain) &&
255 (mlx5_dev[i].pci_addr.bus == pci_addr->bus) &&
256 (mlx5_dev[i].pci_addr.devid == pci_addr->devid) &&
257 (mlx5_dev[i].pci_addr.function == pci_addr->function))
259 if ((mlx5_dev[i].ports == 0) && (ret == -1))
266 * Verify and store value for device argument.
269 * Key argument to verify.
271 * Value associated with key.
276 * 0 on success, negative errno value on failure.
279 mlx5_args_check(const char *key, const char *val, void *opaque)
281 struct priv *priv = opaque;
285 tmp = strtoul(val, NULL, 0);
287 WARN("%s: \"%s\" is not a valid integer", key, val);
290 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
291 priv->cqe_comp = !!tmp;
292 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
293 priv->txq_inline = tmp;
294 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
295 priv->txqs_inline = tmp;
296 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
297 priv->mps &= !!tmp; /* Enable MPW only if HW supports */
298 } else if (strcmp(MLX5_TSO, key) == 0) {
301 WARN("%s: unknown parameter", key);
308 * Parse device parameters.
311 * Pointer to private structure.
313 * Device arguments structure.
316 * 0 on success, errno value on failure.
319 mlx5_args(struct priv *priv, struct rte_devargs *devargs)
321 const char **params = (const char *[]){
322 MLX5_RXQ_CQE_COMP_EN,
324 MLX5_TXQS_MIN_INLINE,
329 struct rte_kvargs *kvlist;
335 /* Following UGLY cast is done to pass checkpatch. */
336 kvlist = rte_kvargs_parse(devargs->args, params);
339 /* Process parameters. */
340 for (i = 0; (params[i] != NULL); ++i) {
341 if (rte_kvargs_count(kvlist, params[i])) {
342 ret = rte_kvargs_process(kvlist, params[i],
343 mlx5_args_check, priv);
345 rte_kvargs_free(kvlist);
350 rte_kvargs_free(kvlist);
354 static struct eth_driver mlx5_driver;
357 * DPDK callback to register a PCI device.
359 * This function creates an Ethernet device for each port of a given
363 * PCI driver structure (mlx5_driver).
365 * PCI device information.
368 * 0 on success, negative errno value on failure.
371 mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
373 struct ibv_device **list;
374 struct ibv_device *ibv_dev;
376 struct ibv_context *attr_ctx = NULL;
377 struct ibv_device_attr device_attr;
384 assert(pci_drv == &mlx5_driver.pci_drv);
385 /* Get mlx5_dev[] index. */
386 idx = mlx5_dev_idx(&pci_dev->addr);
388 ERROR("this driver cannot support any more adapters");
391 DEBUG("using driver device index %d", idx);
393 /* Save PCI address. */
394 mlx5_dev[idx].pci_addr = pci_dev->addr;
395 list = ibv_get_device_list(&i);
398 if (errno == ENOSYS) {
399 WARN("cannot list devices, is ib_uverbs loaded?");
406 * For each listed device, check related sysfs entry against
407 * the provided PCI ID.
410 struct rte_pci_addr pci_addr;
413 DEBUG("checking device \"%s\"", list[i]->name);
414 if (mlx5_ibv_device_to_pci_addr(list[i], &pci_addr))
416 if ((pci_dev->addr.domain != pci_addr.domain) ||
417 (pci_dev->addr.bus != pci_addr.bus) ||
418 (pci_dev->addr.devid != pci_addr.devid) ||
419 (pci_dev->addr.function != pci_addr.function))
421 sriov = ((pci_dev->id.device_id ==
422 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) ||
423 (pci_dev->id.device_id ==
424 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF) ||
425 (pci_dev->id.device_id ==
426 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF) ||
427 (pci_dev->id.device_id ==
428 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF));
430 * Multi-packet send is supported by ConnectX-4 Lx PF as well
431 * as all ConnectX-5 devices.
433 switch (pci_dev->id.device_id) {
434 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
435 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
436 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
437 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
438 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
444 INFO("PCI information matches, using device \"%s\""
445 " (SR-IOV: %s, MPS: %s)",
447 sriov ? "true" : "false",
448 mps ? "true" : "false");
449 attr_ctx = ibv_open_device(list[i]);
453 if (attr_ctx == NULL) {
454 ibv_free_device_list(list);
457 WARN("cannot access device, is mlx5_ib loaded?");
460 WARN("cannot use device, are drivers up to date?");
468 DEBUG("device opened");
469 if (ibv_query_device(attr_ctx, &device_attr))
471 INFO("%u port(s) detected", device_attr.phys_port_cnt);
473 for (i = 0; i < device_attr.phys_port_cnt; i++) {
474 uint32_t port = i + 1; /* ports are indexed from one */
475 uint32_t test = (1 << i);
476 struct ibv_context *ctx = NULL;
477 struct ibv_port_attr port_attr;
478 struct ibv_pd *pd = NULL;
479 struct priv *priv = NULL;
480 struct rte_eth_dev *eth_dev;
481 struct ibv_exp_device_attr exp_device_attr;
482 struct ether_addr mac;
483 uint16_t num_vfs = 0;
485 exp_device_attr.comp_mask =
486 IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS |
487 IBV_EXP_DEVICE_ATTR_RX_HASH |
488 IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS |
489 IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN |
490 IBV_EXP_DEVICE_ATTR_TSO_CAPS |
493 DEBUG("using port %u (%08" PRIx32 ")", port, test);
495 ctx = ibv_open_device(ibv_dev);
499 /* Check port status. */
500 err = ibv_query_port(ctx, port, &port_attr);
502 ERROR("port query failed: %s", strerror(err));
506 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
507 ERROR("port %d is not configured in Ethernet mode",
512 if (port_attr.state != IBV_PORT_ACTIVE)
513 DEBUG("port %d is not active: \"%s\" (%d)",
514 port, ibv_port_state_str(port_attr.state),
517 /* Allocate protection domain. */
518 pd = ibv_alloc_pd(ctx);
520 ERROR("PD allocation failure");
525 mlx5_dev[idx].ports |= test;
527 /* from rte_ethdev.c */
528 priv = rte_zmalloc("ethdev private structure",
530 RTE_CACHE_LINE_SIZE);
532 ERROR("priv allocation failure");
538 priv->device_attr = device_attr;
541 priv->mtu = ETHER_MTU;
542 priv->mps = mps; /* Enable MPW by default if supported. */
543 priv->cqe_comp = 1; /* Enable compression by default. */
544 err = mlx5_args(priv, pci_dev->device.devargs);
546 ERROR("failed to process device arguments: %s",
550 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
551 ERROR("ibv_exp_query_device() failed");
556 ((exp_device_attr.exp_device_cap_flags &
557 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
558 (exp_device_attr.exp_device_cap_flags &
559 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
560 DEBUG("checksum offloading is %ssupported",
561 (priv->hw_csum ? "" : "not "));
563 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
564 IBV_EXP_DEVICE_VXLAN_SUPPORT);
565 DEBUG("L2 tunnel checksum offloads are %ssupported",
566 (priv->hw_csum_l2tun ? "" : "not "));
568 priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
569 /* Remove this check once DPDK supports larger/variable
570 * indirection tables. */
571 if (priv->ind_table_max_size >
572 (unsigned int)ETH_RSS_RETA_SIZE_512)
573 priv->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
574 DEBUG("maximum RX indirection table size is %u",
575 priv->ind_table_max_size);
576 priv->hw_vlan_strip = !!(exp_device_attr.wq_vlan_offloads_cap &
577 IBV_EXP_RECEIVE_WQ_CVLAN_STRIP);
578 DEBUG("VLAN stripping is %ssupported",
579 (priv->hw_vlan_strip ? "" : "not "));
581 priv->hw_fcs_strip = !!(exp_device_attr.exp_device_cap_flags &
582 IBV_EXP_DEVICE_SCATTER_FCS);
583 DEBUG("FCS stripping configuration is %ssupported",
584 (priv->hw_fcs_strip ? "" : "not "));
586 priv->hw_padding = !!exp_device_attr.rx_pad_end_addr_align;
587 DEBUG("hardware RX end alignment padding is %ssupported",
588 (priv->hw_padding ? "" : "not "));
590 priv_get_num_vfs(priv, &num_vfs);
591 priv->sriov = (num_vfs || sriov);
592 priv->tso = ((priv->tso) &&
593 (exp_device_attr.tso_caps.max_tso > 0) &&
594 (exp_device_attr.tso_caps.supported_qpts &
595 (1 << IBV_QPT_RAW_ETH)));
597 priv->max_tso_payload_sz =
598 exp_device_attr.tso_caps.max_tso;
599 if (priv->mps && !mps) {
600 ERROR("multi-packet send not supported on this device"
601 " (" MLX5_TXQ_MPW_EN ")");
604 } else if (priv->mps && priv->tso) {
605 WARN("multi-packet send not supported in conjunction "
606 "with TSO. MPS disabled");
609 /* Allocate and register default RSS hash keys. */
610 priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
611 sizeof((*priv->rss_conf)[0]), 0);
612 if (priv->rss_conf == NULL) {
616 err = rss_hash_rss_conf_new_key(priv,
617 rss_hash_default_key,
618 rss_hash_default_key_len,
622 /* Configure the first MAC address by default. */
623 if (priv_get_mac(priv, &mac.addr_bytes)) {
624 ERROR("cannot get MAC address, is mlx5_en loaded?"
625 " (errno: %s)", strerror(errno));
628 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
630 mac.addr_bytes[0], mac.addr_bytes[1],
631 mac.addr_bytes[2], mac.addr_bytes[3],
632 mac.addr_bytes[4], mac.addr_bytes[5]);
633 /* Register MAC address. */
634 claim_zero(priv_mac_addr_add(priv, 0,
635 (const uint8_t (*)[ETHER_ADDR_LEN])
637 /* Initialize FD filters list. */
638 err = fdir_init_filters_list(priv);
643 char ifname[IF_NAMESIZE];
645 if (priv_get_ifname(priv, &ifname) == 0)
646 DEBUG("port %u ifname is \"%s\"",
649 DEBUG("port %u ifname is unknown", priv->port);
652 /* Get actual MTU if possible. */
653 priv_get_mtu(priv, &priv->mtu);
654 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
656 /* from rte_ethdev.c */
658 char name[RTE_ETH_NAME_MAX_LEN];
660 snprintf(name, sizeof(name), "%s port %u",
661 ibv_get_device_name(ibv_dev), port);
662 eth_dev = rte_eth_dev_allocate(name);
664 if (eth_dev == NULL) {
665 ERROR("can not allocate rte ethdev");
670 /* Secondary processes have to use local storage for their
671 * private data as well as a copy of eth_dev->data, but this
672 * pointer must not be modified before burst functions are
673 * actually called. */
674 if (mlx5_is_secondary()) {
675 struct mlx5_secondary_data *sd =
676 &mlx5_secondary_data[eth_dev->data->port_id];
677 sd->primary_priv = eth_dev->data->dev_private;
678 if (sd->primary_priv == NULL) {
679 ERROR("no private data for port %u",
680 eth_dev->data->port_id);
684 sd->shared_dev_data = eth_dev->data;
685 rte_spinlock_init(&sd->lock);
686 memcpy(sd->data.name, sd->shared_dev_data->name,
687 sizeof(sd->data.name));
688 sd->data.dev_private = priv;
689 sd->data.rx_mbuf_alloc_failed = 0;
690 sd->data.mtu = ETHER_MTU;
691 sd->data.port_id = sd->shared_dev_data->port_id;
692 sd->data.mac_addrs = priv->mac;
693 eth_dev->tx_pkt_burst = mlx5_tx_burst_secondary_setup;
694 eth_dev->rx_pkt_burst = mlx5_rx_burst_secondary_setup;
696 eth_dev->data->dev_private = priv;
697 eth_dev->data->mac_addrs = priv->mac;
700 eth_dev->device = &pci_dev->device;
701 rte_eth_copy_pci_info(eth_dev, pci_dev);
702 eth_dev->driver = &mlx5_driver;
704 eth_dev->dev_ops = &mlx5_dev_ops;
706 /* Bring Ethernet device up. */
707 DEBUG("forcing Ethernet interface up");
708 priv_set_flags(priv, ~IFF_UP, IFF_UP);
709 mlx5_link_update(priv->dev, 1);
714 rte_free(priv->rss_conf);
718 claim_zero(ibv_dealloc_pd(pd));
720 claim_zero(ibv_close_device(ctx));
725 * XXX if something went wrong in the loop above, there is a resource
726 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
727 * long as the dpdk does not provide a way to deallocate a ethdev and a
728 * way to enumerate the registered ethdevs to free the previous ones.
731 /* no port found, complain */
732 if (!mlx5_dev[idx].ports) {
739 claim_zero(ibv_close_device(attr_ctx));
741 ibv_free_device_list(list);
746 static const struct rte_pci_id mlx5_pci_id_map[] = {
748 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
749 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
752 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
753 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
756 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
757 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
760 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
761 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
764 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
765 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
768 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
769 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
772 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
773 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
776 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
777 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
784 static struct eth_driver mlx5_driver = {
787 .name = MLX5_DRIVER_NAME
789 .id_table = mlx5_pci_id_map,
790 .probe = mlx5_pci_probe,
791 .drv_flags = RTE_PCI_DRV_INTR_LSC,
793 .dev_private_size = sizeof(struct priv)
797 * Driver initialization routine.
799 RTE_INIT(rte_mlx5_pmd_init);
801 rte_mlx5_pmd_init(void)
804 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
805 * huge pages. Calling ibv_fork_init() during init allows
806 * applications to use fork() safely for purposes other than
807 * using this PMD, which is not supported in forked processes.
809 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
811 rte_eal_pci_register(&mlx5_driver.pci_drv);
814 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
815 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
816 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");