1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. */
72 #define MLX5_TXQ_INLINE "txq_inline"
75 * Device parameter to configure the number of TX queues threshold for
76 * enabling inline send.
78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
81 * Device parameter to configure the number of TX queues threshold for
82 * enabling vectorized Tx.
84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
86 /* Device parameter to enable multi-packet send WQEs. */
87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
89 /* Device parameter to include 2 dsegs in the title WQEBB. */
90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
92 /* Device parameter to limit the size of inlining packet. */
93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
95 /* Device parameter to enable hardware Tx vector. */
96 #define MLX5_TX_VEC_EN "tx_vec_en"
98 /* Device parameter to enable hardware Rx vector. */
99 #define MLX5_RX_VEC_EN "rx_vec_en"
101 /* Allow L3 VXLAN flow creation. */
102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
104 /* Activate DV E-Switch flow steering. */
105 #define MLX5_DV_ESW_EN "dv_esw_en"
107 /* Activate DV flow steering. */
108 #define MLX5_DV_FLOW_EN "dv_flow_en"
110 /* Activate Netlink support in VF mode. */
111 #define MLX5_VF_NL_EN "vf_nl_en"
113 /* Enable extending memsegs when creating a MR. */
114 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
116 /* Select port representors to instantiate. */
117 #define MLX5_REPRESENTOR "representor"
119 /* Device parameter to configure the maximum number of dump files per queue. */
120 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
122 #ifndef HAVE_IBV_MLX5_MOD_MPW
123 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
124 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
127 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
128 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
131 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
133 /* Shared memory between primary and secondary processes. */
134 struct mlx5_shared_data *mlx5_shared_data;
136 /* Spinlock for mlx5_shared_data allocation. */
137 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
139 /* Process local data for secondary processes. */
140 static struct mlx5_local_data mlx5_local_data;
142 /** Driver-specific log messages type. */
145 /** Data associated with devices to spawn. */
146 struct mlx5_dev_spawn_data {
147 uint32_t ifindex; /**< Network interface index. */
148 uint32_t max_port; /**< IB device maximal port index. */
149 uint32_t ibv_port; /**< IB device physical port index. */
150 struct mlx5_switch_info info; /**< Switch information. */
151 struct ibv_device *ibv_dev; /**< Associated IB device. */
152 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
153 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
156 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
157 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
160 * Allocate shared IB device context. If there is multiport device the
161 * master and representors will share this context, if there is single
162 * port dedicated IB device, the context will be used by only given
163 * port due to unification.
165 * Routine first searches the context for the specified IB device name,
166 * if found the shared context assumed and reference counter is incremented.
167 * If no context found the new one is created and initialized with specified
168 * IB device context and parameters.
171 * Pointer to the IB device attributes (name, port, etc).
174 * Pointer to mlx5_ibv_shared object on success,
175 * otherwise NULL and rte_errno is set.
177 static struct mlx5_ibv_shared *
178 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
180 struct mlx5_ibv_shared *sh;
185 /* Secondary process should not create the shared context. */
186 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
187 pthread_mutex_lock(&mlx5_ibv_list_mutex);
188 /* Search for IB context by device name. */
189 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
190 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
195 /* No device found, we have to create new shared context. */
196 assert(spawn->max_port);
197 sh = rte_zmalloc("ethdev shared ib context",
198 sizeof(struct mlx5_ibv_shared) +
200 sizeof(struct mlx5_ibv_shared_port),
201 RTE_CACHE_LINE_SIZE);
203 DRV_LOG(ERR, "shared context allocation failure");
207 /* Try to open IB device with DV first, then usual Verbs. */
209 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
212 DRV_LOG(DEBUG, "DevX is supported");
214 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
216 err = errno ? errno : ENODEV;
219 DRV_LOG(DEBUG, "DevX is NOT supported");
221 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
223 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
227 sh->max_port = spawn->max_port;
228 strncpy(sh->ibdev_name, sh->ctx->device->name,
229 sizeof(sh->ibdev_name));
230 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
231 sizeof(sh->ibdev_path));
232 sh->pci_dev = spawn->pci_dev;
233 pthread_mutex_init(&sh->intr_mutex, NULL);
235 * Setting port_id to max unallowed value means
236 * there is no interrupt subhandler installed for
237 * the given port index i.
239 for (i = 0; i < sh->max_port; i++)
240 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
241 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
242 if (sh->pd == NULL) {
243 DRV_LOG(ERR, "PD allocation failure");
248 * Once the device is added to the list of memory event
249 * callback, its global MR cache table cannot be expanded
250 * on the fly because of deadlock. If it overflows, lookup
251 * should be done by searching MR list linearly, which is slow.
253 * At this point the device is not added to the memory
254 * event list yet, context is just being created.
256 err = mlx5_mr_btree_init(&sh->mr.cache,
257 MLX5_MR_BTREE_CACHE_N * 2,
258 sh->pci_dev->device.numa_node);
263 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
265 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
268 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
271 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
273 claim_zero(mlx5_glue->close_device(sh->ctx));
281 * Free shared IB device context. Decrement counter and if zero free
282 * all allocated resources and close handles.
285 * Pointer to mlx5_ibv_shared object to free
288 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
290 pthread_mutex_lock(&mlx5_ibv_list_mutex);
292 /* Check the object presence in the list. */
293 struct mlx5_ibv_shared *lctx;
295 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
300 DRV_LOG(ERR, "Freeing non-existing shared IB context");
306 /* Secondary process should not free the shared context. */
307 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
310 /* Release created Memory Regions. */
312 LIST_REMOVE(sh, next);
314 * Ensure there is no async event handler installed.
315 * Only primary process handles async device events.
317 assert(!sh->intr_cnt);
319 mlx5_intr_callback_unregister
320 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
321 pthread_mutex_destroy(&sh->intr_mutex);
323 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
325 claim_zero(mlx5_glue->close_device(sh->ctx));
328 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
332 * Initialize DR related data within private structure.
333 * Routine checks the reference counter and does actual
334 * resources creation/initialization only if counter is zero.
337 * Pointer to the private device data structure.
340 * Zero on success, positive error code otherwise.
343 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
345 #ifdef HAVE_MLX5DV_DR
346 struct mlx5_ibv_shared *sh = priv->sh;
352 /* Shared DV/DR structures is already initialized. */
357 /* Reference counter is zero, we should initialize structures. */
358 domain = mlx5_glue->dr_create_domain(sh->ctx,
359 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
361 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
365 sh->rx_domain = domain;
366 domain = mlx5_glue->dr_create_domain(sh->ctx,
367 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
369 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
373 pthread_mutex_init(&sh->dv_mutex, NULL);
374 sh->tx_domain = domain;
375 #ifdef HAVE_MLX5DV_DR_ESWITCH
376 if (priv->config.dv_esw_en) {
377 domain = mlx5_glue->dr_create_domain
378 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
380 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
384 sh->fdb_domain = domain;
385 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
393 /* Rollback the created objects. */
395 mlx5_glue->dr_destroy_domain(sh->rx_domain);
396 sh->rx_domain = NULL;
399 mlx5_glue->dr_destroy_domain(sh->tx_domain);
400 sh->tx_domain = NULL;
402 if (sh->fdb_domain) {
403 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
404 sh->fdb_domain = NULL;
406 if (sh->esw_drop_action) {
407 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
408 sh->esw_drop_action = NULL;
418 * Destroy DR related data within private structure.
421 * Pointer to the private device data structure.
424 mlx5_free_shared_dr(struct mlx5_priv *priv)
426 #ifdef HAVE_MLX5DV_DR
427 struct mlx5_ibv_shared *sh;
429 if (!priv->dr_shared)
434 assert(sh->dv_refcnt);
435 if (sh->dv_refcnt && --sh->dv_refcnt)
438 mlx5_glue->dr_destroy_domain(sh->rx_domain);
439 sh->rx_domain = NULL;
442 mlx5_glue->dr_destroy_domain(sh->tx_domain);
443 sh->tx_domain = NULL;
445 #ifdef HAVE_MLX5DV_DR_ESWITCH
446 if (sh->fdb_domain) {
447 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
448 sh->fdb_domain = NULL;
450 if (sh->esw_drop_action) {
451 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
452 sh->esw_drop_action = NULL;
455 pthread_mutex_destroy(&sh->dv_mutex);
462 * Initialize shared data between primary and secondary process.
464 * A memzone is reserved by primary process and secondary processes attach to
468 * 0 on success, a negative errno value otherwise and rte_errno is set.
471 mlx5_init_shared_data(void)
473 const struct rte_memzone *mz;
476 rte_spinlock_lock(&mlx5_shared_data_lock);
477 if (mlx5_shared_data == NULL) {
478 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
479 /* Allocate shared memory. */
480 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
481 sizeof(*mlx5_shared_data),
485 "Cannot allocate mlx5 shared data\n");
489 mlx5_shared_data = mz->addr;
490 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
491 rte_spinlock_init(&mlx5_shared_data->lock);
493 /* Lookup allocated shared memory. */
494 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
497 "Cannot attach mlx5 shared data\n");
501 mlx5_shared_data = mz->addr;
502 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
506 rte_spinlock_unlock(&mlx5_shared_data_lock);
511 * Retrieve integer value from environment variable.
514 * Environment variable name.
517 * Integer value, 0 if the variable is not set.
520 mlx5_getenv_int(const char *name)
522 const char *val = getenv(name);
530 * Verbs callback to allocate a memory. This function should allocate the space
531 * according to the size provided residing inside a huge page.
532 * Please note that all allocation must respect the alignment from libmlx5
533 * (i.e. currently sysconf(_SC_PAGESIZE)).
536 * The size in bytes of the memory to allocate.
538 * A pointer to the callback data.
541 * Allocated buffer, NULL otherwise and rte_errno is set.
544 mlx5_alloc_verbs_buf(size_t size, void *data)
546 struct mlx5_priv *priv = data;
548 size_t alignment = sysconf(_SC_PAGESIZE);
549 unsigned int socket = SOCKET_ID_ANY;
551 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
552 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
554 socket = ctrl->socket;
555 } else if (priv->verbs_alloc_ctx.type ==
556 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
557 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
559 socket = ctrl->socket;
561 assert(data != NULL);
562 ret = rte_malloc_socket(__func__, size, alignment, socket);
569 * Verbs callback to free a memory.
572 * A pointer to the memory to free.
574 * A pointer to the callback data.
577 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
579 assert(data != NULL);
584 * Initialize process private data structure.
587 * Pointer to Ethernet device structure.
590 * 0 on success, a negative errno value otherwise and rte_errno is set.
593 mlx5_proc_priv_init(struct rte_eth_dev *dev)
595 struct mlx5_priv *priv = dev->data->dev_private;
596 struct mlx5_proc_priv *ppriv;
600 * UAR register table follows the process private structure. BlueFlame
601 * registers for Tx queues are stored in the table.
604 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
605 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
606 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
611 ppriv->uar_table_sz = ppriv_size;
612 dev->process_private = ppriv;
617 * Un-initialize process private data structure.
620 * Pointer to Ethernet device structure.
623 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
625 if (!dev->process_private)
627 rte_free(dev->process_private);
628 dev->process_private = NULL;
632 * DPDK callback to close the device.
634 * Destroy all queues and objects, free memory.
637 * Pointer to Ethernet device structure.
640 mlx5_dev_close(struct rte_eth_dev *dev)
642 struct mlx5_priv *priv = dev->data->dev_private;
646 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
648 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
649 /* In case mlx5_dev_stop() has not been called. */
650 mlx5_dev_interrupt_handler_uninstall(dev);
651 mlx5_traffic_disable(dev);
652 mlx5_flow_flush(dev, NULL);
653 /* Prevent crashes when queues are still in use. */
654 dev->rx_pkt_burst = removed_rx_burst;
655 dev->tx_pkt_burst = removed_tx_burst;
657 /* Disable datapath on secondary process. */
658 mlx5_mp_req_stop_rxtx(dev);
659 if (priv->rxqs != NULL) {
660 /* XXX race condition if mlx5_rx_burst() is still running. */
662 for (i = 0; (i != priv->rxqs_n); ++i)
663 mlx5_rxq_release(dev, i);
667 if (priv->txqs != NULL) {
668 /* XXX race condition if mlx5_tx_burst() is still running. */
670 for (i = 0; (i != priv->txqs_n); ++i)
671 mlx5_txq_release(dev, i);
675 mlx5_proc_priv_uninit(dev);
676 mlx5_mprq_free_mp(dev);
677 /* Remove from memory callback device list. */
678 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
680 LIST_REMOVE(priv->sh, mem_event_cb);
681 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
682 mlx5_free_shared_dr(priv);
683 if (priv->rss_conf.rss_key != NULL)
684 rte_free(priv->rss_conf.rss_key);
685 if (priv->reta_idx != NULL)
686 rte_free(priv->reta_idx);
688 mlx5_nl_mac_addr_flush(dev);
689 if (priv->nl_socket_route >= 0)
690 close(priv->nl_socket_route);
691 if (priv->nl_socket_rdma >= 0)
692 close(priv->nl_socket_rdma);
695 * Free the shared context in last turn, because the cleanup
696 * routines above may use some shared fields, like
697 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
698 * ifindex if Netlink fails.
700 mlx5_free_shared_ibctx(priv->sh);
703 ret = mlx5_hrxq_ibv_verify(dev);
705 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
707 ret = mlx5_ind_table_ibv_verify(dev);
709 DRV_LOG(WARNING, "port %u some indirection table still remain",
711 ret = mlx5_rxq_ibv_verify(dev);
713 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
715 ret = mlx5_rxq_verify(dev);
717 DRV_LOG(WARNING, "port %u some Rx queues still remain",
719 ret = mlx5_txq_ibv_verify(dev);
721 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
723 ret = mlx5_txq_verify(dev);
725 DRV_LOG(WARNING, "port %u some Tx queues still remain",
727 ret = mlx5_flow_verify(dev);
729 DRV_LOG(WARNING, "port %u some flows still remain",
731 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
735 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
736 struct mlx5_priv *opriv =
737 rte_eth_devices[port_id].data->dev_private;
740 opriv->domain_id != priv->domain_id ||
741 &rte_eth_devices[port_id] == dev)
746 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
748 memset(priv, 0, sizeof(*priv));
749 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
751 * Reset mac_addrs to NULL such that it is not freed as part of
752 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
753 * it is freed when dev_private is freed.
755 dev->data->mac_addrs = NULL;
758 const struct eth_dev_ops mlx5_dev_ops = {
759 .dev_configure = mlx5_dev_configure,
760 .dev_start = mlx5_dev_start,
761 .dev_stop = mlx5_dev_stop,
762 .dev_set_link_down = mlx5_set_link_down,
763 .dev_set_link_up = mlx5_set_link_up,
764 .dev_close = mlx5_dev_close,
765 .promiscuous_enable = mlx5_promiscuous_enable,
766 .promiscuous_disable = mlx5_promiscuous_disable,
767 .allmulticast_enable = mlx5_allmulticast_enable,
768 .allmulticast_disable = mlx5_allmulticast_disable,
769 .link_update = mlx5_link_update,
770 .stats_get = mlx5_stats_get,
771 .stats_reset = mlx5_stats_reset,
772 .xstats_get = mlx5_xstats_get,
773 .xstats_reset = mlx5_xstats_reset,
774 .xstats_get_names = mlx5_xstats_get_names,
775 .fw_version_get = mlx5_fw_version_get,
776 .dev_infos_get = mlx5_dev_infos_get,
777 .read_clock = mlx5_read_clock,
778 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
779 .vlan_filter_set = mlx5_vlan_filter_set,
780 .rx_queue_setup = mlx5_rx_queue_setup,
781 .tx_queue_setup = mlx5_tx_queue_setup,
782 .rx_queue_release = mlx5_rx_queue_release,
783 .tx_queue_release = mlx5_tx_queue_release,
784 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
785 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
786 .mac_addr_remove = mlx5_mac_addr_remove,
787 .mac_addr_add = mlx5_mac_addr_add,
788 .mac_addr_set = mlx5_mac_addr_set,
789 .set_mc_addr_list = mlx5_set_mc_addr_list,
790 .mtu_set = mlx5_dev_set_mtu,
791 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
792 .vlan_offload_set = mlx5_vlan_offload_set,
793 .reta_update = mlx5_dev_rss_reta_update,
794 .reta_query = mlx5_dev_rss_reta_query,
795 .rss_hash_update = mlx5_rss_hash_update,
796 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
797 .filter_ctrl = mlx5_dev_filter_ctrl,
798 .rx_descriptor_status = mlx5_rx_descriptor_status,
799 .tx_descriptor_status = mlx5_tx_descriptor_status,
800 .rx_queue_count = mlx5_rx_queue_count,
801 .rx_queue_intr_enable = mlx5_rx_intr_enable,
802 .rx_queue_intr_disable = mlx5_rx_intr_disable,
803 .is_removed = mlx5_is_removed,
806 /* Available operations from secondary process. */
807 static const struct eth_dev_ops mlx5_dev_sec_ops = {
808 .stats_get = mlx5_stats_get,
809 .stats_reset = mlx5_stats_reset,
810 .xstats_get = mlx5_xstats_get,
811 .xstats_reset = mlx5_xstats_reset,
812 .xstats_get_names = mlx5_xstats_get_names,
813 .fw_version_get = mlx5_fw_version_get,
814 .dev_infos_get = mlx5_dev_infos_get,
815 .rx_descriptor_status = mlx5_rx_descriptor_status,
816 .tx_descriptor_status = mlx5_tx_descriptor_status,
819 /* Available operations in flow isolated mode. */
820 const struct eth_dev_ops mlx5_dev_ops_isolate = {
821 .dev_configure = mlx5_dev_configure,
822 .dev_start = mlx5_dev_start,
823 .dev_stop = mlx5_dev_stop,
824 .dev_set_link_down = mlx5_set_link_down,
825 .dev_set_link_up = mlx5_set_link_up,
826 .dev_close = mlx5_dev_close,
827 .promiscuous_enable = mlx5_promiscuous_enable,
828 .promiscuous_disable = mlx5_promiscuous_disable,
829 .allmulticast_enable = mlx5_allmulticast_enable,
830 .allmulticast_disable = mlx5_allmulticast_disable,
831 .link_update = mlx5_link_update,
832 .stats_get = mlx5_stats_get,
833 .stats_reset = mlx5_stats_reset,
834 .xstats_get = mlx5_xstats_get,
835 .xstats_reset = mlx5_xstats_reset,
836 .xstats_get_names = mlx5_xstats_get_names,
837 .fw_version_get = mlx5_fw_version_get,
838 .dev_infos_get = mlx5_dev_infos_get,
839 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
840 .vlan_filter_set = mlx5_vlan_filter_set,
841 .rx_queue_setup = mlx5_rx_queue_setup,
842 .tx_queue_setup = mlx5_tx_queue_setup,
843 .rx_queue_release = mlx5_rx_queue_release,
844 .tx_queue_release = mlx5_tx_queue_release,
845 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
846 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
847 .mac_addr_remove = mlx5_mac_addr_remove,
848 .mac_addr_add = mlx5_mac_addr_add,
849 .mac_addr_set = mlx5_mac_addr_set,
850 .set_mc_addr_list = mlx5_set_mc_addr_list,
851 .mtu_set = mlx5_dev_set_mtu,
852 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
853 .vlan_offload_set = mlx5_vlan_offload_set,
854 .filter_ctrl = mlx5_dev_filter_ctrl,
855 .rx_descriptor_status = mlx5_rx_descriptor_status,
856 .tx_descriptor_status = mlx5_tx_descriptor_status,
857 .rx_queue_intr_enable = mlx5_rx_intr_enable,
858 .rx_queue_intr_disable = mlx5_rx_intr_disable,
859 .is_removed = mlx5_is_removed,
863 * Verify and store value for device argument.
866 * Key argument to verify.
868 * Value associated with key.
873 * 0 on success, a negative errno value otherwise and rte_errno is set.
876 mlx5_args_check(const char *key, const char *val, void *opaque)
878 struct mlx5_dev_config *config = opaque;
881 /* No-op, port representors are processed in mlx5_dev_spawn(). */
882 if (!strcmp(MLX5_REPRESENTOR, key))
885 tmp = strtoul(val, NULL, 0);
888 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
891 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
892 config->cqe_comp = !!tmp;
893 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
894 config->cqe_pad = !!tmp;
895 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
896 config->hw_padding = !!tmp;
897 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
898 config->mprq.enabled = !!tmp;
899 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
900 config->mprq.stride_num_n = tmp;
901 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
902 config->mprq.max_memcpy_len = tmp;
903 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
904 config->mprq.min_rxqs_num = tmp;
905 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
906 config->txq_inline = tmp;
907 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
908 config->txqs_inline = tmp;
909 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
910 config->txqs_vec = tmp;
911 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
913 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
914 config->mpw_hdr_dseg = !!tmp;
915 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
916 config->inline_max_packet_sz = tmp;
917 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
918 config->tx_vec_en = !!tmp;
919 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
920 config->rx_vec_en = !!tmp;
921 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
922 config->l3_vxlan_en = !!tmp;
923 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
924 config->vf_nl_en = !!tmp;
925 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
926 config->dv_esw_en = !!tmp;
927 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
928 config->dv_flow_en = !!tmp;
929 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
930 config->mr_ext_memseg_en = !!tmp;
931 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
932 config->max_dump_files_num = tmp;
934 DRV_LOG(WARNING, "%s: unknown parameter", key);
942 * Parse device parameters.
945 * Pointer to device configuration structure.
947 * Device arguments structure.
950 * 0 on success, a negative errno value otherwise and rte_errno is set.
953 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
955 const char **params = (const char *[]){
956 MLX5_RXQ_CQE_COMP_EN,
960 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
961 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
964 MLX5_TXQS_MIN_INLINE,
967 MLX5_TXQ_MPW_HDR_DSEG_EN,
968 MLX5_TXQ_MAX_INLINE_LEN,
975 MLX5_MR_EXT_MEMSEG_EN,
977 MLX5_MAX_DUMP_FILES_NUM,
980 struct rte_kvargs *kvlist;
986 /* Following UGLY cast is done to pass checkpatch. */
987 kvlist = rte_kvargs_parse(devargs->args, params);
988 if (kvlist == NULL) {
992 /* Process parameters. */
993 for (i = 0; (params[i] != NULL); ++i) {
994 if (rte_kvargs_count(kvlist, params[i])) {
995 ret = rte_kvargs_process(kvlist, params[i],
996 mlx5_args_check, config);
999 rte_kvargs_free(kvlist);
1004 rte_kvargs_free(kvlist);
1008 static struct rte_pci_driver mlx5_driver;
1011 * PMD global initialization.
1013 * Independent from individual device, this function initializes global
1014 * per-PMD data structures distinguishing primary and secondary processes.
1015 * Hence, each initialization is called once per a process.
1018 * 0 on success, a negative errno value otherwise and rte_errno is set.
1021 mlx5_init_once(void)
1023 struct mlx5_shared_data *sd;
1024 struct mlx5_local_data *ld = &mlx5_local_data;
1027 if (mlx5_init_shared_data())
1029 sd = mlx5_shared_data;
1031 rte_spinlock_lock(&sd->lock);
1032 switch (rte_eal_process_type()) {
1033 case RTE_PROC_PRIMARY:
1036 LIST_INIT(&sd->mem_event_cb_list);
1037 rte_rwlock_init(&sd->mem_event_rwlock);
1038 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1039 mlx5_mr_mem_event_cb, NULL);
1040 ret = mlx5_mp_init_primary();
1043 sd->init_done = true;
1045 case RTE_PROC_SECONDARY:
1048 ret = mlx5_mp_init_secondary();
1051 ++sd->secondary_cnt;
1052 ld->init_done = true;
1058 rte_spinlock_unlock(&sd->lock);
1063 * Spawn an Ethernet device from Verbs information.
1066 * Backing DPDK device.
1068 * Verbs device parameters (name, port, switch_info) to spawn.
1070 * Device configuration parameters.
1073 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1074 * is set. The following errors are defined:
1076 * EBUSY: device is not supposed to be spawned.
1077 * EEXIST: device is already spawned
1079 static struct rte_eth_dev *
1080 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1081 struct mlx5_dev_spawn_data *spawn,
1082 struct mlx5_dev_config config)
1084 const struct mlx5_switch_info *switch_info = &spawn->info;
1085 struct mlx5_ibv_shared *sh = NULL;
1086 struct ibv_port_attr port_attr;
1087 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1088 struct rte_eth_dev *eth_dev = NULL;
1089 struct mlx5_priv *priv = NULL;
1091 unsigned int hw_padding = 0;
1093 unsigned int cqe_comp;
1094 unsigned int cqe_pad = 0;
1095 unsigned int tunnel_en = 0;
1096 unsigned int mpls_en = 0;
1097 unsigned int swp = 0;
1098 unsigned int mprq = 0;
1099 unsigned int mprq_min_stride_size_n = 0;
1100 unsigned int mprq_max_stride_size_n = 0;
1101 unsigned int mprq_min_stride_num_n = 0;
1102 unsigned int mprq_max_stride_num_n = 0;
1103 struct rte_ether_addr mac;
1104 char name[RTE_ETH_NAME_MAX_LEN];
1105 int own_domain_id = 0;
1109 /* Determine if this port representor is supposed to be spawned. */
1110 if (switch_info->representor && dpdk_dev->devargs) {
1111 struct rte_eth_devargs eth_da;
1113 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1116 DRV_LOG(ERR, "failed to process device arguments: %s",
1117 strerror(rte_errno));
1120 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1121 if (eth_da.representor_ports[i] ==
1122 (uint16_t)switch_info->port_name)
1124 if (i == eth_da.nb_representor_ports) {
1129 /* Build device name. */
1130 if (!switch_info->representor)
1131 strlcpy(name, dpdk_dev->name, sizeof(name));
1133 snprintf(name, sizeof(name), "%s_representor_%u",
1134 dpdk_dev->name, switch_info->port_name);
1135 /* check if the device is already spawned */
1136 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1140 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1141 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1142 eth_dev = rte_eth_dev_attach_secondary(name);
1143 if (eth_dev == NULL) {
1144 DRV_LOG(ERR, "can not attach rte ethdev");
1148 eth_dev->device = dpdk_dev;
1149 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1150 err = mlx5_proc_priv_init(eth_dev);
1153 /* Receive command fd from primary process */
1154 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1157 /* Remap UAR for Tx queues. */
1158 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1162 * Ethdev pointer is still required as input since
1163 * the primary device is not accessible from the
1164 * secondary process.
1166 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1167 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1170 sh = mlx5_alloc_shared_ibctx(spawn);
1173 config.devx = sh->devx;
1174 #ifdef HAVE_IBV_MLX5_MOD_SWP
1175 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1178 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1179 * as all ConnectX-5 devices.
1181 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1182 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1184 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1185 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1187 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1188 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1189 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1190 DRV_LOG(DEBUG, "enhanced MPW is supported");
1191 mps = MLX5_MPW_ENHANCED;
1193 DRV_LOG(DEBUG, "MPW is supported");
1197 DRV_LOG(DEBUG, "MPW isn't supported");
1198 mps = MLX5_MPW_DISABLED;
1200 #ifdef HAVE_IBV_MLX5_MOD_SWP
1201 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1202 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1203 DRV_LOG(DEBUG, "SWP support: %u", swp);
1206 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1207 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1208 struct mlx5dv_striding_rq_caps mprq_caps =
1209 dv_attr.striding_rq_caps;
1211 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1212 mprq_caps.min_single_stride_log_num_of_bytes);
1213 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1214 mprq_caps.max_single_stride_log_num_of_bytes);
1215 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1216 mprq_caps.min_single_wqe_log_num_of_strides);
1217 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1218 mprq_caps.max_single_wqe_log_num_of_strides);
1219 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1220 mprq_caps.supported_qpts);
1221 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1223 mprq_min_stride_size_n =
1224 mprq_caps.min_single_stride_log_num_of_bytes;
1225 mprq_max_stride_size_n =
1226 mprq_caps.max_single_stride_log_num_of_bytes;
1227 mprq_min_stride_num_n =
1228 mprq_caps.min_single_wqe_log_num_of_strides;
1229 mprq_max_stride_num_n =
1230 mprq_caps.max_single_wqe_log_num_of_strides;
1231 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1232 mprq_min_stride_num_n);
1235 if (RTE_CACHE_LINE_SIZE == 128 &&
1236 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1240 config.cqe_comp = cqe_comp;
1241 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1242 /* Whether device supports 128B Rx CQE padding. */
1243 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1244 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1246 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1247 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1248 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1249 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1250 (dv_attr.tunnel_offloads_caps &
1251 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1253 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1254 tunnel_en ? "" : "not ");
1257 "tunnel offloading disabled due to old OFED/rdma-core version");
1259 config.tunnel_en = tunnel_en;
1260 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1261 mpls_en = ((dv_attr.tunnel_offloads_caps &
1262 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1263 (dv_attr.tunnel_offloads_caps &
1264 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1265 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1266 mpls_en ? "" : "not ");
1268 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1269 " old OFED/rdma-core version or firmware configuration");
1271 config.mpls_en = mpls_en;
1272 /* Check port status. */
1273 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1275 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1278 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1279 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1283 if (port_attr.state != IBV_PORT_ACTIVE)
1284 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1285 mlx5_glue->port_state_str(port_attr.state),
1287 /* Allocate private eth device data. */
1288 priv = rte_zmalloc("ethdev private structure",
1290 RTE_CACHE_LINE_SIZE);
1292 DRV_LOG(ERR, "priv allocation failure");
1297 priv->ibv_port = spawn->ibv_port;
1298 priv->mtu = RTE_ETHER_MTU;
1300 /* Initialize UAR access locks for 32bit implementations. */
1301 rte_spinlock_init(&priv->uar_lock_cq);
1302 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1303 rte_spinlock_init(&priv->uar_lock[i]);
1305 /* Some internal functions rely on Netlink sockets, open them now. */
1306 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1307 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1309 priv->representor = !!switch_info->representor;
1310 priv->master = !!switch_info->master;
1311 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1313 * Currently we support single E-Switch per PF configurations
1314 * only and vport_id field contains the vport index for
1315 * associated VF, which is deduced from representor port name.
1316 * For example, let's have the IB device port 10, it has
1317 * attached network device eth0, which has port name attribute
1318 * pf0vf2, we can deduce the VF number as 2, and set vport index
1319 * as 3 (2+1). This assigning schema should be changed if the
1320 * multiple E-Switch instances per PF configurations or/and PCI
1321 * subfunctions are added.
1323 priv->vport_id = switch_info->representor ?
1324 switch_info->port_name + 1 : -1;
1325 /* representor_id field keeps the unmodified port/VF index. */
1326 priv->representor_id = switch_info->representor ?
1327 switch_info->port_name : -1;
1329 * Look for sibling devices in order to reuse their switch domain
1330 * if any, otherwise allocate one.
1332 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1333 const struct mlx5_priv *opriv =
1334 rte_eth_devices[port_id].data->dev_private;
1338 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1340 priv->domain_id = opriv->domain_id;
1343 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1344 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1347 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1348 strerror(rte_errno));
1353 err = mlx5_args(&config, dpdk_dev->devargs);
1356 DRV_LOG(ERR, "failed to process device arguments: %s",
1357 strerror(rte_errno));
1360 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1361 IBV_DEVICE_RAW_IP_CSUM);
1362 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1363 (config.hw_csum ? "" : "not "));
1364 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1365 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1366 DRV_LOG(DEBUG, "counters are not supported");
1368 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1369 if (config.dv_flow_en) {
1370 DRV_LOG(WARNING, "DV flow is not supported");
1371 config.dv_flow_en = 0;
1374 config.ind_table_max_size =
1375 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1377 * Remove this check once DPDK supports larger/variable
1378 * indirection tables.
1380 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1381 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1382 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1383 config.ind_table_max_size);
1384 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1385 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1386 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1387 (config.hw_vlan_strip ? "" : "not "));
1388 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1389 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1390 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1391 (config.hw_fcs_strip ? "" : "not "));
1392 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1393 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1394 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1395 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1396 IBV_DEVICE_PCI_WRITE_END_PADDING);
1398 if (config.hw_padding && !hw_padding) {
1399 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1400 config.hw_padding = 0;
1401 } else if (config.hw_padding) {
1402 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1404 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1405 (sh->device_attr.tso_caps.supported_qpts &
1406 (1 << IBV_QPT_RAW_PACKET)));
1408 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1410 * MPW is disabled by default, while the Enhanced MPW is enabled
1413 if (config.mps == MLX5_ARG_UNSET)
1414 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1417 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1418 DRV_LOG(INFO, "%sMPS is %s",
1419 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1420 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1421 if (config.cqe_comp && !cqe_comp) {
1422 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1423 config.cqe_comp = 0;
1425 if (config.cqe_pad && !cqe_pad) {
1426 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1428 } else if (config.cqe_pad) {
1429 DRV_LOG(INFO, "Rx CQE padding is enabled");
1431 if (config.mprq.enabled && mprq) {
1432 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1433 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1434 config.mprq.stride_num_n =
1435 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1436 mprq_min_stride_num_n);
1438 "the number of strides"
1439 " for Multi-Packet RQ is out of range,"
1440 " setting default value (%u)",
1441 1 << config.mprq.stride_num_n);
1443 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1444 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1445 } else if (config.mprq.enabled && !mprq) {
1446 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1447 config.mprq.enabled = 0;
1449 if (config.max_dump_files_num == 0)
1450 config.max_dump_files_num = 128;
1451 eth_dev = rte_eth_dev_allocate(name);
1452 if (eth_dev == NULL) {
1453 DRV_LOG(ERR, "can not allocate rte ethdev");
1457 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1458 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1459 if (priv->representor) {
1460 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1461 eth_dev->data->representor_id = priv->representor_id;
1463 eth_dev->data->dev_private = priv;
1464 priv->dev_data = eth_dev->data;
1465 eth_dev->data->mac_addrs = priv->mac;
1466 eth_dev->device = dpdk_dev;
1467 /* Configure the first MAC address by default. */
1468 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1470 "port %u cannot get MAC address, is mlx5_en"
1471 " loaded? (errno: %s)",
1472 eth_dev->data->port_id, strerror(rte_errno));
1477 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1478 eth_dev->data->port_id,
1479 mac.addr_bytes[0], mac.addr_bytes[1],
1480 mac.addr_bytes[2], mac.addr_bytes[3],
1481 mac.addr_bytes[4], mac.addr_bytes[5]);
1484 char ifname[IF_NAMESIZE];
1486 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1487 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1488 eth_dev->data->port_id, ifname);
1490 DRV_LOG(DEBUG, "port %u ifname is unknown",
1491 eth_dev->data->port_id);
1494 /* Get actual MTU if possible. */
1495 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1500 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1502 /* Initialize burst functions to prevent crashes before link-up. */
1503 eth_dev->rx_pkt_burst = removed_rx_burst;
1504 eth_dev->tx_pkt_burst = removed_tx_burst;
1505 eth_dev->dev_ops = &mlx5_dev_ops;
1506 /* Register MAC address. */
1507 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1508 if (config.vf && config.vf_nl_en)
1509 mlx5_nl_mac_addr_sync(eth_dev);
1510 TAILQ_INIT(&priv->flows);
1511 TAILQ_INIT(&priv->ctrl_flows);
1512 /* Hint libmlx5 to use PMD allocator for data plane resources */
1513 struct mlx5dv_ctx_allocators alctr = {
1514 .alloc = &mlx5_alloc_verbs_buf,
1515 .free = &mlx5_free_verbs_buf,
1518 mlx5_glue->dv_set_context_attr(sh->ctx,
1519 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1520 (void *)((uintptr_t)&alctr));
1521 /* Bring Ethernet device up. */
1522 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1523 eth_dev->data->port_id);
1524 mlx5_set_link_up(eth_dev);
1526 * Even though the interrupt handler is not installed yet,
1527 * interrupts will still trigger on the async_fd from
1528 * Verbs context returned by ibv_open_device().
1530 mlx5_link_update(eth_dev, 0);
1531 #ifdef HAVE_IBV_DEVX_OBJ
1533 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1540 #ifdef HAVE_MLX5DV_DR_ESWITCH
1541 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1542 (switch_info->representor || switch_info->master)))
1543 config.dv_esw_en = 0;
1545 config.dv_esw_en = 0;
1547 /* Store device configuration on private structure. */
1548 priv->config = config;
1549 if (config.dv_flow_en) {
1550 err = mlx5_alloc_shared_dr(priv);
1554 /* Supported Verbs flow priority number detection. */
1555 err = mlx5_flow_discover_priorities(eth_dev);
1560 priv->config.flow_prio = err;
1561 /* Add device to memory callback list. */
1562 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1563 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1565 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1570 mlx5_free_shared_dr(priv);
1571 if (priv->nl_socket_route >= 0)
1572 close(priv->nl_socket_route);
1573 if (priv->nl_socket_rdma >= 0)
1574 close(priv->nl_socket_rdma);
1576 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1578 if (eth_dev != NULL)
1579 eth_dev->data->dev_private = NULL;
1581 if (eth_dev != NULL) {
1582 /* mac_addrs must not be freed alone because part of dev_private */
1583 eth_dev->data->mac_addrs = NULL;
1584 rte_eth_dev_release_port(eth_dev);
1587 mlx5_free_shared_ibctx(sh);
1594 * Comparison callback to sort device data.
1596 * This is meant to be used with qsort().
1599 * Pointer to pointer to first data object.
1601 * Pointer to pointer to second data object.
1604 * 0 if both objects are equal, less than 0 if the first argument is less
1605 * than the second, greater than 0 otherwise.
1608 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1610 const struct mlx5_switch_info *si_a =
1611 &((const struct mlx5_dev_spawn_data *)a)->info;
1612 const struct mlx5_switch_info *si_b =
1613 &((const struct mlx5_dev_spawn_data *)b)->info;
1616 /* Master device first. */
1617 ret = si_b->master - si_a->master;
1620 /* Then representor devices. */
1621 ret = si_b->representor - si_a->representor;
1624 /* Unidentified devices come last in no specific order. */
1625 if (!si_a->representor)
1627 /* Order representors by name. */
1628 return si_a->port_name - si_b->port_name;
1632 * DPDK callback to register a PCI device.
1634 * This function spawns Ethernet devices out of a given PCI device.
1636 * @param[in] pci_drv
1637 * PCI driver structure (mlx5_driver).
1638 * @param[in] pci_dev
1639 * PCI device information.
1642 * 0 on success, a negative errno value otherwise and rte_errno is set.
1645 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1646 struct rte_pci_device *pci_dev)
1648 struct ibv_device **ibv_list;
1650 * Number of found IB Devices matching with requested PCI BDF.
1651 * nd != 1 means there are multiple IB devices over the same
1652 * PCI device and we have representors and master.
1654 unsigned int nd = 0;
1656 * Number of found IB device Ports. nd = 1 and np = 1..n means
1657 * we have the single multiport IB device, and there may be
1658 * representors attached to some of found ports.
1660 unsigned int np = 0;
1662 * Number of DPDK ethernet devices to Spawn - either over
1663 * multiple IB devices or multiple ports of single IB device.
1664 * Actually this is the number of iterations to spawn.
1666 unsigned int ns = 0;
1667 struct mlx5_dev_config dev_config;
1670 ret = mlx5_init_once();
1672 DRV_LOG(ERR, "unable to init PMD global data: %s",
1673 strerror(rte_errno));
1676 assert(pci_drv == &mlx5_driver);
1678 ibv_list = mlx5_glue->get_device_list(&ret);
1680 rte_errno = errno ? errno : ENOSYS;
1681 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1685 * First scan the list of all Infiniband devices to find
1686 * matching ones, gathering into the list.
1688 struct ibv_device *ibv_match[ret + 1];
1694 struct rte_pci_addr pci_addr;
1696 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1697 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1699 if (pci_dev->addr.domain != pci_addr.domain ||
1700 pci_dev->addr.bus != pci_addr.bus ||
1701 pci_dev->addr.devid != pci_addr.devid ||
1702 pci_dev->addr.function != pci_addr.function)
1704 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1705 ibv_list[ret]->name);
1706 ibv_match[nd++] = ibv_list[ret];
1708 ibv_match[nd] = NULL;
1710 /* No device matches, just complain and bail out. */
1711 mlx5_glue->free_device_list(ibv_list);
1713 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1714 " are kernel drivers loaded?",
1715 pci_dev->addr.domain, pci_dev->addr.bus,
1716 pci_dev->addr.devid, pci_dev->addr.function);
1721 nl_route = mlx5_nl_init(NETLINK_ROUTE);
1722 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1725 * Found single matching device may have multiple ports.
1726 * Each port may be representor, we have to check the port
1727 * number and check the representors existence.
1730 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1732 DRV_LOG(WARNING, "can not get IB device \"%s\""
1733 " ports number", ibv_match[0]->name);
1736 * Now we can determine the maximal
1737 * amount of devices to be spawned.
1739 struct mlx5_dev_spawn_data list[np ? np : nd];
1743 * Single IB device with multiple ports found,
1744 * it may be E-Switch master device and representors.
1745 * We have to perform identification trough the ports.
1747 assert(nl_rdma >= 0);
1750 for (i = 1; i <= np; ++i) {
1751 list[ns].max_port = np;
1752 list[ns].ibv_port = i;
1753 list[ns].ibv_dev = ibv_match[0];
1754 list[ns].eth_dev = NULL;
1755 list[ns].pci_dev = pci_dev;
1756 list[ns].ifindex = mlx5_nl_ifindex
1757 (nl_rdma, list[ns].ibv_dev->name, i);
1758 if (!list[ns].ifindex) {
1760 * No network interface index found for the
1761 * specified port, it means there is no
1762 * representor on this port. It's OK,
1763 * there can be disabled ports, for example
1764 * if sriov_numvfs < sriov_totalvfs.
1770 ret = mlx5_nl_switch_info
1774 if (ret || (!list[ns].info.representor &&
1775 !list[ns].info.master)) {
1777 * We failed to recognize representors with
1778 * Netlink, let's try to perform the task
1781 ret = mlx5_sysfs_switch_info
1785 if (!ret && (list[ns].info.representor ^
1786 list[ns].info.master))
1791 "unable to recognize master/representors"
1792 " on the IB device with multiple ports");
1799 * The existence of several matching entries (nd > 1) means
1800 * port representors have been instantiated. No existing Verbs
1801 * call nor sysfs entries can tell them apart, this can only
1802 * be done through Netlink calls assuming kernel drivers are
1803 * recent enough to support them.
1805 * In the event of identification failure through Netlink,
1806 * try again through sysfs, then:
1808 * 1. A single IB device matches (nd == 1) with single
1809 * port (np=0/1) and is not a representor, assume
1810 * no switch support.
1812 * 2. Otherwise no safe assumptions can be made;
1813 * complain louder and bail out.
1816 for (i = 0; i != nd; ++i) {
1817 memset(&list[ns].info, 0, sizeof(list[ns].info));
1818 list[ns].max_port = 1;
1819 list[ns].ibv_port = 1;
1820 list[ns].ibv_dev = ibv_match[i];
1821 list[ns].eth_dev = NULL;
1822 list[ns].pci_dev = pci_dev;
1823 list[ns].ifindex = 0;
1825 list[ns].ifindex = mlx5_nl_ifindex
1826 (nl_rdma, list[ns].ibv_dev->name, 1);
1827 if (!list[ns].ifindex) {
1828 char ifname[IF_NAMESIZE];
1831 * Netlink failed, it may happen with old
1832 * ib_core kernel driver (before 4.16).
1833 * We can assume there is old driver because
1834 * here we are processing single ports IB
1835 * devices. Let's try sysfs to retrieve
1836 * the ifindex. The method works for
1837 * master device only.
1841 * Multiple devices found, assume
1842 * representors, can not distinguish
1843 * master/representor and retrieve
1844 * ifindex via sysfs.
1848 ret = mlx5_get_master_ifname
1849 (ibv_match[i]->ibdev_path, &ifname);
1852 if_nametoindex(ifname);
1853 if (!list[ns].ifindex) {
1855 * No network interface index found
1856 * for the specified device, it means
1857 * there it is neither representor
1865 ret = mlx5_nl_switch_info
1869 if (ret || (!list[ns].info.representor &&
1870 !list[ns].info.master)) {
1872 * We failed to recognize representors with
1873 * Netlink, let's try to perform the task
1876 ret = mlx5_sysfs_switch_info
1880 if (!ret && (list[ns].info.representor ^
1881 list[ns].info.master)) {
1883 } else if ((nd == 1) &&
1884 !list[ns].info.representor &&
1885 !list[ns].info.master) {
1887 * Single IB device with
1888 * one physical port and
1889 * attached network device.
1890 * May be SRIOV is not enabled
1891 * or there is no representors.
1893 DRV_LOG(INFO, "no E-Switch support detected");
1900 "unable to recognize master/representors"
1901 " on the multiple IB devices");
1909 * Sort list to probe devices in natural order for users convenience
1910 * (i.e. master first, then representors from lowest to highest ID).
1912 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1913 /* Default configuration. */
1914 dev_config = (struct mlx5_dev_config){
1916 .mps = MLX5_ARG_UNSET,
1919 .txq_inline = MLX5_ARG_UNSET,
1920 .txqs_inline = MLX5_ARG_UNSET,
1921 .txqs_vec = MLX5_ARG_UNSET,
1922 .inline_max_packet_sz = MLX5_ARG_UNSET,
1924 .mr_ext_memseg_en = 1,
1926 .enabled = 0, /* Disabled by default. */
1927 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1928 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1929 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1933 /* Device specific configuration. */
1934 switch (pci_dev->id.device_id) {
1935 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1936 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1938 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1939 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1940 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1941 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1947 /* Set architecture-dependent default value if unset. */
1948 if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1949 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1950 for (i = 0; i != ns; ++i) {
1953 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1956 if (!list[i].eth_dev) {
1957 if (rte_errno != EBUSY && rte_errno != EEXIST)
1959 /* Device is disabled or already spawned. Ignore it. */
1962 restore = list[i].eth_dev->data->dev_flags;
1963 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1964 /* Restore non-PCI flags cleared by the above call. */
1965 list[i].eth_dev->data->dev_flags |= restore;
1966 rte_eth_dev_probing_finish(list[i].eth_dev);
1970 "probe of PCI device " PCI_PRI_FMT " aborted after"
1971 " encountering an error: %s",
1972 pci_dev->addr.domain, pci_dev->addr.bus,
1973 pci_dev->addr.devid, pci_dev->addr.function,
1974 strerror(rte_errno));
1978 if (!list[i].eth_dev)
1980 mlx5_dev_close(list[i].eth_dev);
1981 /* mac_addrs must not be freed because in dev_private */
1982 list[i].eth_dev->data->mac_addrs = NULL;
1983 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1985 /* Restore original error. */
1992 * Do the routine cleanup:
1993 * - close opened Netlink sockets
1994 * - free the Infiniband device list
2001 mlx5_glue->free_device_list(ibv_list);
2006 * DPDK callback to remove a PCI device.
2008 * This function removes all Ethernet devices belong to a given PCI device.
2010 * @param[in] pci_dev
2011 * Pointer to the PCI device.
2014 * 0 on success, the function cannot fail.
2017 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2021 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2022 rte_eth_dev_close(port_id);
2026 static const struct rte_pci_id mlx5_pci_id_map[] = {
2028 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2029 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2032 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2033 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2036 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2037 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2040 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2041 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2044 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2045 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2048 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2049 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2052 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2053 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2056 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2057 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2060 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2061 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2064 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2065 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2068 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2069 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2072 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2073 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2080 static struct rte_pci_driver mlx5_driver = {
2082 .name = MLX5_DRIVER_NAME
2084 .id_table = mlx5_pci_id_map,
2085 .probe = mlx5_pci_probe,
2086 .remove = mlx5_pci_remove,
2087 .dma_map = mlx5_dma_map,
2088 .dma_unmap = mlx5_dma_unmap,
2089 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2090 RTE_PCI_DRV_PROBE_AGAIN | RTE_PCI_DRV_IOVA_AS_VA,
2093 #ifdef RTE_IBVERBS_LINK_DLOPEN
2096 * Suffix RTE_EAL_PMD_PATH with "-glue".
2098 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2099 * suffixing its last component.
2102 * Output buffer, should be large enough otherwise NULL is returned.
2107 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2110 mlx5_glue_path(char *buf, size_t size)
2112 static const char *const bad[] = { "/", ".", "..", NULL };
2113 const char *path = RTE_EAL_PMD_PATH;
2114 size_t len = strlen(path);
2118 while (len && path[len - 1] == '/')
2120 for (off = len; off && path[off - 1] != '/'; --off)
2122 for (i = 0; bad[i]; ++i)
2123 if (!strncmp(path + off, bad[i], (int)(len - off)))
2125 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2126 if (i == -1 || (size_t)i >= size)
2131 "unable to append \"-glue\" to last component of"
2132 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2133 " please re-configure DPDK");
2138 * Initialization routine for run-time dependency on rdma-core.
2141 mlx5_glue_init(void)
2143 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2144 const char *path[] = {
2146 * A basic security check is necessary before trusting
2147 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2149 (geteuid() == getuid() && getegid() == getgid() ?
2150 getenv("MLX5_GLUE_PATH") : NULL),
2152 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2153 * variant, otherwise let dlopen() look up libraries on its
2156 (*RTE_EAL_PMD_PATH ?
2157 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2160 void *handle = NULL;
2164 while (!handle && i != RTE_DIM(path)) {
2173 end = strpbrk(path[i], ":;");
2175 end = path[i] + strlen(path[i]);
2176 len = end - path[i];
2181 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2183 (!len || *(end - 1) == '/') ? "" : "/");
2186 if (sizeof(name) != (size_t)ret + 1)
2188 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2190 handle = dlopen(name, RTLD_LAZY);
2201 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2204 sym = dlsym(handle, "mlx5_glue");
2205 if (!sym || !*sym) {
2209 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2218 "cannot initialize PMD due to missing run-time dependency on"
2219 " rdma-core libraries (libibverbs, libmlx5)");
2226 * Driver initialization routine.
2228 RTE_INIT(rte_mlx5_pmd_init)
2230 /* Initialize driver log type. */
2231 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2232 if (mlx5_logtype >= 0)
2233 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2235 /* Build the static tables for Verbs conversion. */
2236 mlx5_set_ptype_table();
2237 mlx5_set_cksum_table();
2238 mlx5_set_swp_types_table();
2240 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2241 * huge pages. Calling ibv_fork_init() during init allows
2242 * applications to use fork() safely for purposes other than
2243 * using this PMD, which is not supported in forked processes.
2245 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2246 /* Match the size of Rx completion entry to the size of a cacheline. */
2247 if (RTE_CACHE_LINE_SIZE == 128)
2248 setenv("MLX5_CQE_SIZE", "128", 0);
2250 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2251 * cleanup all the Verbs resources even when the device was removed.
2253 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2254 #ifdef RTE_IBVERBS_LINK_DLOPEN
2255 if (mlx5_glue_init())
2260 /* Glue structure must not contain any NULL pointers. */
2264 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2265 assert(((const void *const *)mlx5_glue)[i]);
2268 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2270 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2271 mlx5_glue->version, MLX5_GLUE_VERSION);
2274 mlx5_glue->fork_init();
2275 rte_pci_register(&mlx5_driver);
2278 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2279 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2280 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");