net/mlx5: support fine grain dynamic flag
[dpdk.git] / drivers / net / mlx5 / mlx5.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2015 6WIND S.A.
3  * Copyright 2015 Mellanox Technologies, Ltd
4  */
5
6 #include <stddef.h>
7 #include <unistd.h>
8 #include <string.h>
9 #include <assert.h>
10 #include <stdint.h>
11 #include <stdlib.h>
12 #include <errno.h>
13 #include <net/if.h>
14 #include <sys/mman.h>
15 #include <linux/rtnetlink.h>
16
17 /* Verbs header. */
18 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
19 #ifdef PEDANTIC
20 #pragma GCC diagnostic ignored "-Wpedantic"
21 #endif
22 #include <infiniband/verbs.h>
23 #ifdef PEDANTIC
24 #pragma GCC diagnostic error "-Wpedantic"
25 #endif
26
27 #include <rte_malloc.h>
28 #include <rte_ethdev_driver.h>
29 #include <rte_ethdev_pci.h>
30 #include <rte_pci.h>
31 #include <rte_bus_pci.h>
32 #include <rte_common.h>
33 #include <rte_config.h>
34 #include <rte_kvargs.h>
35 #include <rte_rwlock.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_alarm.h>
39
40 #include <mlx5_glue.h>
41 #include <mlx5_devx_cmds.h>
42 #include <mlx5_common.h>
43
44 #include "mlx5_defs.h"
45 #include "mlx5.h"
46 #include "mlx5_utils.h"
47 #include "mlx5_rxtx.h"
48 #include "mlx5_autoconf.h"
49 #include "mlx5_mr.h"
50 #include "mlx5_flow.h"
51 #include "rte_pmd_mlx5.h"
52
53 /* Device parameter to enable RX completion queue compression. */
54 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
55
56 /* Device parameter to enable RX completion entry padding to 128B. */
57 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
58
59 /* Device parameter to enable padding Rx packet to cacheline size. */
60 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
61
62 /* Device parameter to enable Multi-Packet Rx queue. */
63 #define MLX5_RX_MPRQ_EN "mprq_en"
64
65 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
66 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
67
68 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
69 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
70
71 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
72 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
73
74 /* Device parameter to configure inline send. Deprecated, ignored.*/
75 #define MLX5_TXQ_INLINE "txq_inline"
76
77 /* Device parameter to limit packet size to inline with ordinary SEND. */
78 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
79
80 /* Device parameter to configure minimal data size to inline. */
81 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
82
83 /* Device parameter to limit packet size to inline with Enhanced MPW. */
84 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
85
86 /*
87  * Device parameter to configure the number of TX queues threshold for
88  * enabling inline send.
89  */
90 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
91
92 /*
93  * Device parameter to configure the number of TX queues threshold for
94  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
95  */
96 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
97
98 /* Device parameter to enable multi-packet send WQEs. */
99 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
100
101 /*
102  * Device parameter to force doorbell register mapping
103  * to non-cahed region eliminating the extra write memory barrier.
104  */
105 #define MLX5_TX_DB_NC "tx_db_nc"
106
107 /*
108  * Device parameter to include 2 dsegs in the title WQEBB.
109  * Deprecated, ignored.
110  */
111 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
112
113 /*
114  * Device parameter to limit the size of inlining packet.
115  * Deprecated, ignored.
116  */
117 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
118
119 /*
120  * Device parameter to enable hardware Tx vector.
121  * Deprecated, ignored (no vectorized Tx routines anymore).
122  */
123 #define MLX5_TX_VEC_EN "tx_vec_en"
124
125 /* Device parameter to enable hardware Rx vector. */
126 #define MLX5_RX_VEC_EN "rx_vec_en"
127
128 /* Allow L3 VXLAN flow creation. */
129 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
130
131 /* Activate DV E-Switch flow steering. */
132 #define MLX5_DV_ESW_EN "dv_esw_en"
133
134 /* Activate DV flow steering. */
135 #define MLX5_DV_FLOW_EN "dv_flow_en"
136
137 /* Enable extensive flow metadata support. */
138 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
139
140 /* Activate Netlink support in VF mode. */
141 #define MLX5_VF_NL_EN "vf_nl_en"
142
143 /* Enable extending memsegs when creating a MR. */
144 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
145
146 /* Select port representors to instantiate. */
147 #define MLX5_REPRESENTOR "representor"
148
149 /* Device parameter to configure the maximum number of dump files per queue. */
150 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
151
152 /* Configure timeout of LRO session (in microseconds). */
153 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
154
155 #ifndef HAVE_IBV_MLX5_MOD_MPW
156 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
157 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
158 #endif
159
160 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
161 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
162 #endif
163
164 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
165
166 /* Shared memory between primary and secondary processes. */
167 struct mlx5_shared_data *mlx5_shared_data;
168
169 /* Spinlock for mlx5_shared_data allocation. */
170 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
171
172 /* Process local data for secondary processes. */
173 static struct mlx5_local_data mlx5_local_data;
174
175 /** Driver-specific log messages type. */
176 int mlx5_logtype;
177
178 /** Data associated with devices to spawn. */
179 struct mlx5_dev_spawn_data {
180         uint32_t ifindex; /**< Network interface index. */
181         uint32_t max_port; /**< IB device maximal port index. */
182         uint32_t ibv_port; /**< IB device physical port index. */
183         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
184         struct mlx5_switch_info info; /**< Switch information. */
185         struct ibv_device *ibv_dev; /**< Associated IB device. */
186         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
187         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
188 };
189
190 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
191 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
192
193 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
194 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
195
196 #define MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE 4096
197 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
198
199 /**
200  * Allocate ID pool structure.
201  *
202  * @param[in] max_id
203  *   The maximum id can be allocated from the pool.
204  *
205  * @return
206  *   Pointer to pool object, NULL value otherwise.
207  */
208 struct mlx5_flow_id_pool *
209 mlx5_flow_id_pool_alloc(uint32_t max_id)
210 {
211         struct mlx5_flow_id_pool *pool;
212         void *mem;
213
214         pool = rte_zmalloc("id pool allocation", sizeof(*pool),
215                            RTE_CACHE_LINE_SIZE);
216         if (!pool) {
217                 DRV_LOG(ERR, "can't allocate id pool");
218                 rte_errno  = ENOMEM;
219                 return NULL;
220         }
221         mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
222                           RTE_CACHE_LINE_SIZE);
223         if (!mem) {
224                 DRV_LOG(ERR, "can't allocate mem for id pool");
225                 rte_errno  = ENOMEM;
226                 goto error;
227         }
228         pool->free_arr = mem;
229         pool->curr = pool->free_arr;
230         pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
231         pool->base_index = 0;
232         pool->max_id = max_id;
233         return pool;
234 error:
235         rte_free(pool);
236         return NULL;
237 }
238
239 /**
240  * Release ID pool structure.
241  *
242  * @param[in] pool
243  *   Pointer to flow id pool object to free.
244  */
245 void
246 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
247 {
248         rte_free(pool->free_arr);
249         rte_free(pool);
250 }
251
252 /**
253  * Generate ID.
254  *
255  * @param[in] pool
256  *   Pointer to flow id pool.
257  * @param[out] id
258  *   The generated ID.
259  *
260  * @return
261  *   0 on success, error value otherwise.
262  */
263 uint32_t
264 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
265 {
266         if (pool->curr == pool->free_arr) {
267                 if (pool->base_index == pool->max_id) {
268                         rte_errno  = ENOMEM;
269                         DRV_LOG(ERR, "no free id");
270                         return -rte_errno;
271                 }
272                 *id = ++pool->base_index;
273                 return 0;
274         }
275         *id = *(--pool->curr);
276         return 0;
277 }
278
279 /**
280  * Release ID.
281  *
282  * @param[in] pool
283  *   Pointer to flow id pool.
284  * @param[out] id
285  *   The generated ID.
286  *
287  * @return
288  *   0 on success, error value otherwise.
289  */
290 uint32_t
291 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
292 {
293         uint32_t size;
294         uint32_t size2;
295         void *mem;
296
297         if (pool->curr == pool->last) {
298                 size = pool->curr - pool->free_arr;
299                 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
300                 assert(size2 > size);
301                 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
302                 if (!mem) {
303                         DRV_LOG(ERR, "can't allocate mem for id pool");
304                         rte_errno  = ENOMEM;
305                         return -rte_errno;
306                 }
307                 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
308                 rte_free(pool->free_arr);
309                 pool->free_arr = mem;
310                 pool->curr = pool->free_arr + size;
311                 pool->last = pool->free_arr + size2;
312         }
313         *pool->curr = id;
314         pool->curr++;
315         return 0;
316 }
317
318 /**
319  * Initialize the counters management structure.
320  *
321  * @param[in] sh
322  *   Pointer to mlx5_ibv_shared object to free
323  */
324 static void
325 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
326 {
327         uint8_t i;
328
329         TAILQ_INIT(&sh->cmng.flow_counters);
330         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
331                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
332 }
333
334 /**
335  * Destroy all the resources allocated for a counter memory management.
336  *
337  * @param[in] mng
338  *   Pointer to the memory management structure.
339  */
340 static void
341 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
342 {
343         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
344
345         LIST_REMOVE(mng, next);
346         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
347         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
348         rte_free(mem);
349 }
350
351 /**
352  * Close and release all the resources of the counters management.
353  *
354  * @param[in] sh
355  *   Pointer to mlx5_ibv_shared object to free.
356  */
357 static void
358 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
359 {
360         struct mlx5_counter_stats_mem_mng *mng;
361         uint8_t i;
362         int j;
363         int retries = 1024;
364
365         rte_errno = 0;
366         while (--retries) {
367                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
368                 if (rte_errno != EINPROGRESS)
369                         break;
370                 rte_pause();
371         }
372         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
373                 struct mlx5_flow_counter_pool *pool;
374                 uint32_t batch = !!(i % 2);
375
376                 if (!sh->cmng.ccont[i].pools)
377                         continue;
378                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
379                 while (pool) {
380                         if (batch) {
381                                 if (pool->min_dcs)
382                                         claim_zero
383                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
384                         }
385                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
386                                 if (pool->counters_raw[j].action)
387                                         claim_zero
388                                         (mlx5_glue->destroy_flow_action
389                                                (pool->counters_raw[j].action));
390                                 if (!batch && pool->counters_raw[j].dcs)
391                                         claim_zero(mlx5_devx_cmd_destroy
392                                                   (pool->counters_raw[j].dcs));
393                         }
394                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
395                                      next);
396                         rte_free(pool);
397                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
398                 }
399                 rte_free(sh->cmng.ccont[i].pools);
400         }
401         mng = LIST_FIRST(&sh->cmng.mem_mngs);
402         while (mng) {
403                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
404                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
405         }
406         memset(&sh->cmng, 0, sizeof(sh->cmng));
407 }
408
409 /**
410  * Extract pdn of PD object using DV API.
411  *
412  * @param[in] pd
413  *   Pointer to the verbs PD object.
414  * @param[out] pdn
415  *   Pointer to the PD object number variable.
416  *
417  * @return
418  *   0 on success, error value otherwise.
419  */
420 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
421 static int
422 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
423 {
424         struct mlx5dv_obj obj;
425         struct mlx5dv_pd pd_info;
426         int ret = 0;
427
428         obj.pd.in = pd;
429         obj.pd.out = &pd_info;
430         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
431         if (ret) {
432                 DRV_LOG(DEBUG, "Fail to get PD object info");
433                 return ret;
434         }
435         *pdn = pd_info.pdn;
436         return 0;
437 }
438 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
439
440 static int
441 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
442 {
443         char *env;
444         int value;
445
446         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
447         /* Get environment variable to store. */
448         env = getenv(MLX5_SHUT_UP_BF);
449         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
450         if (config->dbnc == MLX5_ARG_UNSET)
451                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
452         else
453                 setenv(MLX5_SHUT_UP_BF,
454                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
455         return value;
456 }
457
458 static void
459 mlx5_restore_doorbell_mapping_env(int value)
460 {
461         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
462         /* Restore the original environment variable state. */
463         if (value == MLX5_ARG_UNSET)
464                 unsetenv(MLX5_SHUT_UP_BF);
465         else
466                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
467 }
468
469 /**
470  * Allocate shared IB device context. If there is multiport device the
471  * master and representors will share this context, if there is single
472  * port dedicated IB device, the context will be used by only given
473  * port due to unification.
474  *
475  * Routine first searches the context for the specified IB device name,
476  * if found the shared context assumed and reference counter is incremented.
477  * If no context found the new one is created and initialized with specified
478  * IB device context and parameters.
479  *
480  * @param[in] spawn
481  *   Pointer to the IB device attributes (name, port, etc).
482  * @param[in] config
483  *   Pointer to device configuration structure.
484  *
485  * @return
486  *   Pointer to mlx5_ibv_shared object on success,
487  *   otherwise NULL and rte_errno is set.
488  */
489 static struct mlx5_ibv_shared *
490 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
491                         const struct mlx5_dev_config *config)
492 {
493         struct mlx5_ibv_shared *sh;
494         int dbmap_env;
495         int err = 0;
496         uint32_t i;
497 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
498         struct mlx5_devx_tis_attr tis_attr = { 0 };
499 #endif
500
501         assert(spawn);
502         /* Secondary process should not create the shared context. */
503         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
504         pthread_mutex_lock(&mlx5_ibv_list_mutex);
505         /* Search for IB context by device name. */
506         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
507                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
508                         sh->refcnt++;
509                         goto exit;
510                 }
511         }
512         /* No device found, we have to create new shared context. */
513         assert(spawn->max_port);
514         sh = rte_zmalloc("ethdev shared ib context",
515                          sizeof(struct mlx5_ibv_shared) +
516                          spawn->max_port *
517                          sizeof(struct mlx5_ibv_shared_port),
518                          RTE_CACHE_LINE_SIZE);
519         if (!sh) {
520                 DRV_LOG(ERR, "shared context allocation failure");
521                 rte_errno  = ENOMEM;
522                 goto exit;
523         }
524         /*
525          * Configure environment variable "MLX5_BF_SHUT_UP"
526          * before the device creation. The rdma_core library
527          * checks the variable at device creation and
528          * stores the result internally.
529          */
530         dbmap_env = mlx5_config_doorbell_mapping_env(config);
531         /* Try to open IB device with DV first, then usual Verbs. */
532         errno = 0;
533         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
534         if (sh->ctx) {
535                 sh->devx = 1;
536                 DRV_LOG(DEBUG, "DevX is supported");
537                 /* The device is created, no need for environment. */
538                 mlx5_restore_doorbell_mapping_env(dbmap_env);
539         } else {
540                 /* The environment variable is still configured. */
541                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
542                 err = errno ? errno : ENODEV;
543                 /*
544                  * The environment variable is not needed anymore,
545                  * all device creation attempts are completed.
546                  */
547                 mlx5_restore_doorbell_mapping_env(dbmap_env);
548                 if (!sh->ctx)
549                         goto error;
550                 DRV_LOG(DEBUG, "DevX is NOT supported");
551         }
552         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
553         if (err) {
554                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
555                 goto error;
556         }
557         sh->refcnt = 1;
558         sh->max_port = spawn->max_port;
559         strncpy(sh->ibdev_name, sh->ctx->device->name,
560                 sizeof(sh->ibdev_name));
561         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
562                 sizeof(sh->ibdev_path));
563         pthread_mutex_init(&sh->intr_mutex, NULL);
564         /*
565          * Setting port_id to max unallowed value means
566          * there is no interrupt subhandler installed for
567          * the given port index i.
568          */
569         for (i = 0; i < sh->max_port; i++) {
570                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
571                 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
572         }
573         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
574         if (sh->pd == NULL) {
575                 DRV_LOG(ERR, "PD allocation failure");
576                 err = ENOMEM;
577                 goto error;
578         }
579 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
580         if (sh->devx) {
581                 err = mlx5_get_pdn(sh->pd, &sh->pdn);
582                 if (err) {
583                         DRV_LOG(ERR, "Fail to extract pdn from PD");
584                         goto error;
585                 }
586                 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
587                 if (!sh->td) {
588                         DRV_LOG(ERR, "TD allocation failure");
589                         err = ENOMEM;
590                         goto error;
591                 }
592                 tis_attr.transport_domain = sh->td->id;
593                 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
594                 if (!sh->tis) {
595                         DRV_LOG(ERR, "TIS allocation failure");
596                         err = ENOMEM;
597                         goto error;
598                 }
599         }
600         sh->flow_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX);
601         if (!sh->flow_id_pool) {
602                 DRV_LOG(ERR, "can't create flow id pool");
603                 err = ENOMEM;
604                 goto error;
605         }
606 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
607         /*
608          * Once the device is added to the list of memory event
609          * callback, its global MR cache table cannot be expanded
610          * on the fly because of deadlock. If it overflows, lookup
611          * should be done by searching MR list linearly, which is slow.
612          *
613          * At this point the device is not added to the memory
614          * event list yet, context is just being created.
615          */
616         err = mlx5_mr_btree_init(&sh->mr.cache,
617                                  MLX5_MR_BTREE_CACHE_N * 2,
618                                  spawn->pci_dev->device.numa_node);
619         if (err) {
620                 err = rte_errno;
621                 goto error;
622         }
623         mlx5_flow_counters_mng_init(sh);
624         /* Add device to memory callback list. */
625         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
626         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
627                          sh, mem_event_cb);
628         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
629         /* Add context to the global device list. */
630         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
631 exit:
632         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
633         return sh;
634 error:
635         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
636         assert(sh);
637         if (sh->tis)
638                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
639         if (sh->td)
640                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
641         if (sh->pd)
642                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
643         if (sh->ctx)
644                 claim_zero(mlx5_glue->close_device(sh->ctx));
645         if (sh->flow_id_pool)
646                 mlx5_flow_id_pool_release(sh->flow_id_pool);
647         rte_free(sh);
648         assert(err > 0);
649         rte_errno = err;
650         return NULL;
651 }
652
653 /**
654  * Free shared IB device context. Decrement counter and if zero free
655  * all allocated resources and close handles.
656  *
657  * @param[in] sh
658  *   Pointer to mlx5_ibv_shared object to free
659  */
660 static void
661 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
662 {
663         pthread_mutex_lock(&mlx5_ibv_list_mutex);
664 #ifndef NDEBUG
665         /* Check the object presence in the list. */
666         struct mlx5_ibv_shared *lctx;
667
668         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
669                 if (lctx == sh)
670                         break;
671         assert(lctx);
672         if (lctx != sh) {
673                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
674                 goto exit;
675         }
676 #endif
677         assert(sh);
678         assert(sh->refcnt);
679         /* Secondary process should not free the shared context. */
680         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
681         if (--sh->refcnt)
682                 goto exit;
683         /* Release created Memory Regions. */
684         mlx5_mr_release(sh);
685         /* Remove from memory callback device list. */
686         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
687         LIST_REMOVE(sh, mem_event_cb);
688         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
689         /* Remove context from the global device list. */
690         LIST_REMOVE(sh, next);
691         /*
692          *  Ensure there is no async event handler installed.
693          *  Only primary process handles async device events.
694          **/
695         mlx5_flow_counters_mng_close(sh);
696         assert(!sh->intr_cnt);
697         if (sh->intr_cnt)
698                 mlx5_intr_callback_unregister
699                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
700 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
701         if (sh->devx_intr_cnt) {
702                 if (sh->intr_handle_devx.fd)
703                         rte_intr_callback_unregister(&sh->intr_handle_devx,
704                                           mlx5_dev_interrupt_handler_devx, sh);
705                 if (sh->devx_comp)
706                         mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
707         }
708 #endif
709         pthread_mutex_destroy(&sh->intr_mutex);
710         if (sh->pd)
711                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
712         if (sh->tis)
713                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
714         if (sh->td)
715                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
716         if (sh->ctx)
717                 claim_zero(mlx5_glue->close_device(sh->ctx));
718         if (sh->flow_id_pool)
719                 mlx5_flow_id_pool_release(sh->flow_id_pool);
720         rte_free(sh);
721 exit:
722         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
723 }
724
725 /**
726  * Destroy table hash list and all the root entries per domain.
727  *
728  * @param[in] priv
729  *   Pointer to the private device data structure.
730  */
731 static void
732 mlx5_free_table_hash_list(struct mlx5_priv *priv)
733 {
734         struct mlx5_ibv_shared *sh = priv->sh;
735         struct mlx5_flow_tbl_data_entry *tbl_data;
736         union mlx5_flow_tbl_key table_key = {
737                 {
738                         .table_id = 0,
739                         .reserved = 0,
740                         .domain = 0,
741                         .direction = 0,
742                 }
743         };
744         struct mlx5_hlist_entry *pos;
745
746         if (!sh->flow_tbls)
747                 return;
748         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
749         if (pos) {
750                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
751                                         entry);
752                 assert(tbl_data);
753                 mlx5_hlist_remove(sh->flow_tbls, pos);
754                 rte_free(tbl_data);
755         }
756         table_key.direction = 1;
757         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
758         if (pos) {
759                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
760                                         entry);
761                 assert(tbl_data);
762                 mlx5_hlist_remove(sh->flow_tbls, pos);
763                 rte_free(tbl_data);
764         }
765         table_key.direction = 0;
766         table_key.domain = 1;
767         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
768         if (pos) {
769                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
770                                         entry);
771                 assert(tbl_data);
772                 mlx5_hlist_remove(sh->flow_tbls, pos);
773                 rte_free(tbl_data);
774         }
775         mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
776 }
777
778 /**
779  * Initialize flow table hash list and create the root tables entry
780  * for each domain.
781  *
782  * @param[in] priv
783  *   Pointer to the private device data structure.
784  *
785  * @return
786  *   Zero on success, positive error code otherwise.
787  */
788 static int
789 mlx5_alloc_table_hash_list(struct mlx5_priv *priv)
790 {
791         struct mlx5_ibv_shared *sh = priv->sh;
792         char s[MLX5_HLIST_NAMESIZE];
793         int err = 0;
794
795         assert(sh);
796         snprintf(s, sizeof(s), "%s_flow_table", priv->sh->ibdev_name);
797         sh->flow_tbls = mlx5_hlist_create(s, MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE);
798         if (!sh->flow_tbls) {
799                 DRV_LOG(ERR, "flow tables with hash creation failed.\n");
800                 err = ENOMEM;
801                 return err;
802         }
803 #ifndef HAVE_MLX5DV_DR
804         /*
805          * In case we have not DR support, the zero tables should be created
806          * because DV expect to see them even if they cannot be created by
807          * RDMA-CORE.
808          */
809         union mlx5_flow_tbl_key table_key = {
810                 {
811                         .table_id = 0,
812                         .reserved = 0,
813                         .domain = 0,
814                         .direction = 0,
815                 }
816         };
817         struct mlx5_flow_tbl_data_entry *tbl_data = rte_zmalloc(NULL,
818                                                           sizeof(*tbl_data), 0);
819
820         if (!tbl_data) {
821                 err = ENOMEM;
822                 goto error;
823         }
824         tbl_data->entry.key = table_key.v64;
825         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
826         if (err)
827                 goto error;
828         rte_atomic32_init(&tbl_data->tbl.refcnt);
829         rte_atomic32_inc(&tbl_data->tbl.refcnt);
830         table_key.direction = 1;
831         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
832         if (!tbl_data) {
833                 err = ENOMEM;
834                 goto error;
835         }
836         tbl_data->entry.key = table_key.v64;
837         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
838         if (err)
839                 goto error;
840         rte_atomic32_init(&tbl_data->tbl.refcnt);
841         rte_atomic32_inc(&tbl_data->tbl.refcnt);
842         table_key.direction = 0;
843         table_key.domain = 1;
844         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
845         if (!tbl_data) {
846                 err = ENOMEM;
847                 goto error;
848         }
849         tbl_data->entry.key = table_key.v64;
850         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
851         if (err)
852                 goto error;
853         rte_atomic32_init(&tbl_data->tbl.refcnt);
854         rte_atomic32_inc(&tbl_data->tbl.refcnt);
855         return err;
856 error:
857         mlx5_free_table_hash_list(priv);
858 #endif /* HAVE_MLX5DV_DR */
859         return err;
860 }
861
862 /**
863  * Initialize DR related data within private structure.
864  * Routine checks the reference counter and does actual
865  * resources creation/initialization only if counter is zero.
866  *
867  * @param[in] priv
868  *   Pointer to the private device data structure.
869  *
870  * @return
871  *   Zero on success, positive error code otherwise.
872  */
873 static int
874 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
875 {
876         struct mlx5_ibv_shared *sh = priv->sh;
877         char s[MLX5_HLIST_NAMESIZE];
878         int err = 0;
879
880         if (!sh->flow_tbls)
881                 err = mlx5_alloc_table_hash_list(priv);
882         else
883                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
884                         (void *)sh->flow_tbls);
885         if (err)
886                 return err;
887         /* Create tags hash list table. */
888         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
889         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
890         if (!sh->tag_table) {
891                 DRV_LOG(ERR, "tags with hash creation failed.\n");
892                 err = ENOMEM;
893                 goto error;
894         }
895 #ifdef HAVE_MLX5DV_DR
896         void *domain;
897
898         if (sh->dv_refcnt) {
899                 /* Shared DV/DR structures is already initialized. */
900                 sh->dv_refcnt++;
901                 priv->dr_shared = 1;
902                 return 0;
903         }
904         /* Reference counter is zero, we should initialize structures. */
905         domain = mlx5_glue->dr_create_domain(sh->ctx,
906                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
907         if (!domain) {
908                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
909                 err = errno;
910                 goto error;
911         }
912         sh->rx_domain = domain;
913         domain = mlx5_glue->dr_create_domain(sh->ctx,
914                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
915         if (!domain) {
916                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
917                 err = errno;
918                 goto error;
919         }
920         pthread_mutex_init(&sh->dv_mutex, NULL);
921         sh->tx_domain = domain;
922 #ifdef HAVE_MLX5DV_DR_ESWITCH
923         if (priv->config.dv_esw_en) {
924                 domain  = mlx5_glue->dr_create_domain
925                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
926                 if (!domain) {
927                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
928                         err = errno;
929                         goto error;
930                 }
931                 sh->fdb_domain = domain;
932                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
933         }
934 #endif
935         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
936 #endif /* HAVE_MLX5DV_DR */
937         sh->dv_refcnt++;
938         priv->dr_shared = 1;
939         return 0;
940 error:
941         /* Rollback the created objects. */
942         if (sh->rx_domain) {
943                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
944                 sh->rx_domain = NULL;
945         }
946         if (sh->tx_domain) {
947                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
948                 sh->tx_domain = NULL;
949         }
950         if (sh->fdb_domain) {
951                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
952                 sh->fdb_domain = NULL;
953         }
954         if (sh->esw_drop_action) {
955                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
956                 sh->esw_drop_action = NULL;
957         }
958         if (sh->pop_vlan_action) {
959                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
960                 sh->pop_vlan_action = NULL;
961         }
962         if (sh->tag_table) {
963                 /* tags should be destroyed with flow before. */
964                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
965                 sh->tag_table = NULL;
966         }
967         mlx5_free_table_hash_list(priv);
968         return err;
969 }
970
971 /**
972  * Destroy DR related data within private structure.
973  *
974  * @param[in] priv
975  *   Pointer to the private device data structure.
976  */
977 static void
978 mlx5_free_shared_dr(struct mlx5_priv *priv)
979 {
980         struct mlx5_ibv_shared *sh;
981
982         if (!priv->dr_shared)
983                 return;
984         priv->dr_shared = 0;
985         sh = priv->sh;
986         assert(sh);
987 #ifdef HAVE_MLX5DV_DR
988         assert(sh->dv_refcnt);
989         if (sh->dv_refcnt && --sh->dv_refcnt)
990                 return;
991         if (sh->rx_domain) {
992                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
993                 sh->rx_domain = NULL;
994         }
995         if (sh->tx_domain) {
996                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
997                 sh->tx_domain = NULL;
998         }
999 #ifdef HAVE_MLX5DV_DR_ESWITCH
1000         if (sh->fdb_domain) {
1001                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
1002                 sh->fdb_domain = NULL;
1003         }
1004         if (sh->esw_drop_action) {
1005                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
1006                 sh->esw_drop_action = NULL;
1007         }
1008 #endif
1009         if (sh->pop_vlan_action) {
1010                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
1011                 sh->pop_vlan_action = NULL;
1012         }
1013         pthread_mutex_destroy(&sh->dv_mutex);
1014 #endif /* HAVE_MLX5DV_DR */
1015         if (sh->tag_table) {
1016                 /* tags should be destroyed with flow before. */
1017                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
1018                 sh->tag_table = NULL;
1019         }
1020         mlx5_free_table_hash_list(priv);
1021 }
1022
1023 /**
1024  * Initialize shared data between primary and secondary process.
1025  *
1026  * A memzone is reserved by primary process and secondary processes attach to
1027  * the memzone.
1028  *
1029  * @return
1030  *   0 on success, a negative errno value otherwise and rte_errno is set.
1031  */
1032 static int
1033 mlx5_init_shared_data(void)
1034 {
1035         const struct rte_memzone *mz;
1036         int ret = 0;
1037
1038         rte_spinlock_lock(&mlx5_shared_data_lock);
1039         if (mlx5_shared_data == NULL) {
1040                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1041                         /* Allocate shared memory. */
1042                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
1043                                                  sizeof(*mlx5_shared_data),
1044                                                  SOCKET_ID_ANY, 0);
1045                         if (mz == NULL) {
1046                                 DRV_LOG(ERR,
1047                                         "Cannot allocate mlx5 shared data");
1048                                 ret = -rte_errno;
1049                                 goto error;
1050                         }
1051                         mlx5_shared_data = mz->addr;
1052                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
1053                         rte_spinlock_init(&mlx5_shared_data->lock);
1054                 } else {
1055                         /* Lookup allocated shared memory. */
1056                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
1057                         if (mz == NULL) {
1058                                 DRV_LOG(ERR,
1059                                         "Cannot attach mlx5 shared data");
1060                                 ret = -rte_errno;
1061                                 goto error;
1062                         }
1063                         mlx5_shared_data = mz->addr;
1064                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
1065                 }
1066         }
1067 error:
1068         rte_spinlock_unlock(&mlx5_shared_data_lock);
1069         return ret;
1070 }
1071
1072 /**
1073  * Retrieve integer value from environment variable.
1074  *
1075  * @param[in] name
1076  *   Environment variable name.
1077  *
1078  * @return
1079  *   Integer value, 0 if the variable is not set.
1080  */
1081 int
1082 mlx5_getenv_int(const char *name)
1083 {
1084         const char *val = getenv(name);
1085
1086         if (val == NULL)
1087                 return 0;
1088         return atoi(val);
1089 }
1090
1091 /**
1092  * Verbs callback to allocate a memory. This function should allocate the space
1093  * according to the size provided residing inside a huge page.
1094  * Please note that all allocation must respect the alignment from libmlx5
1095  * (i.e. currently sysconf(_SC_PAGESIZE)).
1096  *
1097  * @param[in] size
1098  *   The size in bytes of the memory to allocate.
1099  * @param[in] data
1100  *   A pointer to the callback data.
1101  *
1102  * @return
1103  *   Allocated buffer, NULL otherwise and rte_errno is set.
1104  */
1105 static void *
1106 mlx5_alloc_verbs_buf(size_t size, void *data)
1107 {
1108         struct mlx5_priv *priv = data;
1109         void *ret;
1110         size_t alignment = sysconf(_SC_PAGESIZE);
1111         unsigned int socket = SOCKET_ID_ANY;
1112
1113         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
1114                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1115
1116                 socket = ctrl->socket;
1117         } else if (priv->verbs_alloc_ctx.type ==
1118                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
1119                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1120
1121                 socket = ctrl->socket;
1122         }
1123         assert(data != NULL);
1124         ret = rte_malloc_socket(__func__, size, alignment, socket);
1125         if (!ret && size)
1126                 rte_errno = ENOMEM;
1127         return ret;
1128 }
1129
1130 /**
1131  * Verbs callback to free a memory.
1132  *
1133  * @param[in] ptr
1134  *   A pointer to the memory to free.
1135  * @param[in] data
1136  *   A pointer to the callback data.
1137  */
1138 static void
1139 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
1140 {
1141         assert(data != NULL);
1142         rte_free(ptr);
1143 }
1144
1145 /**
1146  * DPDK callback to add udp tunnel port
1147  *
1148  * @param[in] dev
1149  *   A pointer to eth_dev
1150  * @param[in] udp_tunnel
1151  *   A pointer to udp tunnel
1152  *
1153  * @return
1154  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
1155  */
1156 int
1157 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
1158                          struct rte_eth_udp_tunnel *udp_tunnel)
1159 {
1160         assert(udp_tunnel != NULL);
1161         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
1162             udp_tunnel->udp_port == 4789)
1163                 return 0;
1164         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
1165             udp_tunnel->udp_port == 4790)
1166                 return 0;
1167         return -ENOTSUP;
1168 }
1169
1170 /**
1171  * Initialize process private data structure.
1172  *
1173  * @param dev
1174  *   Pointer to Ethernet device structure.
1175  *
1176  * @return
1177  *   0 on success, a negative errno value otherwise and rte_errno is set.
1178  */
1179 int
1180 mlx5_proc_priv_init(struct rte_eth_dev *dev)
1181 {
1182         struct mlx5_priv *priv = dev->data->dev_private;
1183         struct mlx5_proc_priv *ppriv;
1184         size_t ppriv_size;
1185
1186         /*
1187          * UAR register table follows the process private structure. BlueFlame
1188          * registers for Tx queues are stored in the table.
1189          */
1190         ppriv_size =
1191                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
1192         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
1193                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1194         if (!ppriv) {
1195                 rte_errno = ENOMEM;
1196                 return -rte_errno;
1197         }
1198         ppriv->uar_table_sz = ppriv_size;
1199         dev->process_private = ppriv;
1200         return 0;
1201 }
1202
1203 /**
1204  * Un-initialize process private data structure.
1205  *
1206  * @param dev
1207  *   Pointer to Ethernet device structure.
1208  */
1209 static void
1210 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
1211 {
1212         if (!dev->process_private)
1213                 return;
1214         rte_free(dev->process_private);
1215         dev->process_private = NULL;
1216 }
1217
1218 /**
1219  * DPDK callback to close the device.
1220  *
1221  * Destroy all queues and objects, free memory.
1222  *
1223  * @param dev
1224  *   Pointer to Ethernet device structure.
1225  */
1226 static void
1227 mlx5_dev_close(struct rte_eth_dev *dev)
1228 {
1229         struct mlx5_priv *priv = dev->data->dev_private;
1230         unsigned int i;
1231         int ret;
1232
1233         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1234                 dev->data->port_id,
1235                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1236         /* In case mlx5_dev_stop() has not been called. */
1237         mlx5_dev_interrupt_handler_uninstall(dev);
1238         mlx5_dev_interrupt_handler_devx_uninstall(dev);
1239         mlx5_traffic_disable(dev);
1240         mlx5_flow_flush(dev, NULL);
1241         mlx5_flow_meter_flush(dev, NULL);
1242         /* Prevent crashes when queues are still in use. */
1243         dev->rx_pkt_burst = removed_rx_burst;
1244         dev->tx_pkt_burst = removed_tx_burst;
1245         rte_wmb();
1246         /* Disable datapath on secondary process. */
1247         mlx5_mp_req_stop_rxtx(dev);
1248         if (priv->rxqs != NULL) {
1249                 /* XXX race condition if mlx5_rx_burst() is still running. */
1250                 usleep(1000);
1251                 for (i = 0; (i != priv->rxqs_n); ++i)
1252                         mlx5_rxq_release(dev, i);
1253                 priv->rxqs_n = 0;
1254                 priv->rxqs = NULL;
1255         }
1256         if (priv->txqs != NULL) {
1257                 /* XXX race condition if mlx5_tx_burst() is still running. */
1258                 usleep(1000);
1259                 for (i = 0; (i != priv->txqs_n); ++i)
1260                         mlx5_txq_release(dev, i);
1261                 priv->txqs_n = 0;
1262                 priv->txqs = NULL;
1263         }
1264         mlx5_proc_priv_uninit(dev);
1265         if (priv->mreg_cp_tbl)
1266                 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1267         mlx5_mprq_free_mp(dev);
1268         mlx5_free_shared_dr(priv);
1269         if (priv->rss_conf.rss_key != NULL)
1270                 rte_free(priv->rss_conf.rss_key);
1271         if (priv->reta_idx != NULL)
1272                 rte_free(priv->reta_idx);
1273         if (priv->config.vf)
1274                 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
1275                                        dev->data->mac_addrs,
1276                                        MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
1277         if (priv->nl_socket_route >= 0)
1278                 close(priv->nl_socket_route);
1279         if (priv->nl_socket_rdma >= 0)
1280                 close(priv->nl_socket_rdma);
1281         if (priv->vmwa_context)
1282                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1283         if (priv->sh) {
1284                 /*
1285                  * Free the shared context in last turn, because the cleanup
1286                  * routines above may use some shared fields, like
1287                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1288                  * ifindex if Netlink fails.
1289                  */
1290                 mlx5_free_shared_ibctx(priv->sh);
1291                 priv->sh = NULL;
1292         }
1293         ret = mlx5_hrxq_verify(dev);
1294         if (ret)
1295                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1296                         dev->data->port_id);
1297         ret = mlx5_ind_table_obj_verify(dev);
1298         if (ret)
1299                 DRV_LOG(WARNING, "port %u some indirection table still remain",
1300                         dev->data->port_id);
1301         ret = mlx5_rxq_obj_verify(dev);
1302         if (ret)
1303                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1304                         dev->data->port_id);
1305         ret = mlx5_rxq_verify(dev);
1306         if (ret)
1307                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1308                         dev->data->port_id);
1309         ret = mlx5_txq_obj_verify(dev);
1310         if (ret)
1311                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1312                         dev->data->port_id);
1313         ret = mlx5_txq_verify(dev);
1314         if (ret)
1315                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1316                         dev->data->port_id);
1317         ret = mlx5_flow_verify(dev);
1318         if (ret)
1319                 DRV_LOG(WARNING, "port %u some flows still remain",
1320                         dev->data->port_id);
1321         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1322                 unsigned int c = 0;
1323                 uint16_t port_id;
1324
1325                 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1326                         struct mlx5_priv *opriv =
1327                                 rte_eth_devices[port_id].data->dev_private;
1328
1329                         if (!opriv ||
1330                             opriv->domain_id != priv->domain_id ||
1331                             &rte_eth_devices[port_id] == dev)
1332                                 continue;
1333                         ++c;
1334                         break;
1335                 }
1336                 if (!c)
1337                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1338         }
1339         memset(priv, 0, sizeof(*priv));
1340         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1341         /*
1342          * Reset mac_addrs to NULL such that it is not freed as part of
1343          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1344          * it is freed when dev_private is freed.
1345          */
1346         dev->data->mac_addrs = NULL;
1347 }
1348
1349 const struct eth_dev_ops mlx5_dev_ops = {
1350         .dev_configure = mlx5_dev_configure,
1351         .dev_start = mlx5_dev_start,
1352         .dev_stop = mlx5_dev_stop,
1353         .dev_set_link_down = mlx5_set_link_down,
1354         .dev_set_link_up = mlx5_set_link_up,
1355         .dev_close = mlx5_dev_close,
1356         .promiscuous_enable = mlx5_promiscuous_enable,
1357         .promiscuous_disable = mlx5_promiscuous_disable,
1358         .allmulticast_enable = mlx5_allmulticast_enable,
1359         .allmulticast_disable = mlx5_allmulticast_disable,
1360         .link_update = mlx5_link_update,
1361         .stats_get = mlx5_stats_get,
1362         .stats_reset = mlx5_stats_reset,
1363         .xstats_get = mlx5_xstats_get,
1364         .xstats_reset = mlx5_xstats_reset,
1365         .xstats_get_names = mlx5_xstats_get_names,
1366         .fw_version_get = mlx5_fw_version_get,
1367         .dev_infos_get = mlx5_dev_infos_get,
1368         .read_clock = mlx5_read_clock,
1369         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1370         .vlan_filter_set = mlx5_vlan_filter_set,
1371         .rx_queue_setup = mlx5_rx_queue_setup,
1372         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1373         .tx_queue_setup = mlx5_tx_queue_setup,
1374         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1375         .rx_queue_release = mlx5_rx_queue_release,
1376         .tx_queue_release = mlx5_tx_queue_release,
1377         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1378         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1379         .mac_addr_remove = mlx5_mac_addr_remove,
1380         .mac_addr_add = mlx5_mac_addr_add,
1381         .mac_addr_set = mlx5_mac_addr_set,
1382         .set_mc_addr_list = mlx5_set_mc_addr_list,
1383         .mtu_set = mlx5_dev_set_mtu,
1384         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1385         .vlan_offload_set = mlx5_vlan_offload_set,
1386         .reta_update = mlx5_dev_rss_reta_update,
1387         .reta_query = mlx5_dev_rss_reta_query,
1388         .rss_hash_update = mlx5_rss_hash_update,
1389         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1390         .filter_ctrl = mlx5_dev_filter_ctrl,
1391         .rx_descriptor_status = mlx5_rx_descriptor_status,
1392         .tx_descriptor_status = mlx5_tx_descriptor_status,
1393         .rx_queue_count = mlx5_rx_queue_count,
1394         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1395         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1396         .is_removed = mlx5_is_removed,
1397         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1398         .get_module_info = mlx5_get_module_info,
1399         .get_module_eeprom = mlx5_get_module_eeprom,
1400         .hairpin_cap_get = mlx5_hairpin_cap_get,
1401         .mtr_ops_get = mlx5_flow_meter_ops_get,
1402 };
1403
1404 /* Available operations from secondary process. */
1405 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1406         .stats_get = mlx5_stats_get,
1407         .stats_reset = mlx5_stats_reset,
1408         .xstats_get = mlx5_xstats_get,
1409         .xstats_reset = mlx5_xstats_reset,
1410         .xstats_get_names = mlx5_xstats_get_names,
1411         .fw_version_get = mlx5_fw_version_get,
1412         .dev_infos_get = mlx5_dev_infos_get,
1413         .rx_descriptor_status = mlx5_rx_descriptor_status,
1414         .tx_descriptor_status = mlx5_tx_descriptor_status,
1415         .get_module_info = mlx5_get_module_info,
1416         .get_module_eeprom = mlx5_get_module_eeprom,
1417 };
1418
1419 /* Available operations in flow isolated mode. */
1420 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1421         .dev_configure = mlx5_dev_configure,
1422         .dev_start = mlx5_dev_start,
1423         .dev_stop = mlx5_dev_stop,
1424         .dev_set_link_down = mlx5_set_link_down,
1425         .dev_set_link_up = mlx5_set_link_up,
1426         .dev_close = mlx5_dev_close,
1427         .promiscuous_enable = mlx5_promiscuous_enable,
1428         .promiscuous_disable = mlx5_promiscuous_disable,
1429         .allmulticast_enable = mlx5_allmulticast_enable,
1430         .allmulticast_disable = mlx5_allmulticast_disable,
1431         .link_update = mlx5_link_update,
1432         .stats_get = mlx5_stats_get,
1433         .stats_reset = mlx5_stats_reset,
1434         .xstats_get = mlx5_xstats_get,
1435         .xstats_reset = mlx5_xstats_reset,
1436         .xstats_get_names = mlx5_xstats_get_names,
1437         .fw_version_get = mlx5_fw_version_get,
1438         .dev_infos_get = mlx5_dev_infos_get,
1439         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1440         .vlan_filter_set = mlx5_vlan_filter_set,
1441         .rx_queue_setup = mlx5_rx_queue_setup,
1442         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1443         .tx_queue_setup = mlx5_tx_queue_setup,
1444         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1445         .rx_queue_release = mlx5_rx_queue_release,
1446         .tx_queue_release = mlx5_tx_queue_release,
1447         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1448         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1449         .mac_addr_remove = mlx5_mac_addr_remove,
1450         .mac_addr_add = mlx5_mac_addr_add,
1451         .mac_addr_set = mlx5_mac_addr_set,
1452         .set_mc_addr_list = mlx5_set_mc_addr_list,
1453         .mtu_set = mlx5_dev_set_mtu,
1454         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1455         .vlan_offload_set = mlx5_vlan_offload_set,
1456         .filter_ctrl = mlx5_dev_filter_ctrl,
1457         .rx_descriptor_status = mlx5_rx_descriptor_status,
1458         .tx_descriptor_status = mlx5_tx_descriptor_status,
1459         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1460         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1461         .is_removed = mlx5_is_removed,
1462         .get_module_info = mlx5_get_module_info,
1463         .get_module_eeprom = mlx5_get_module_eeprom,
1464         .hairpin_cap_get = mlx5_hairpin_cap_get,
1465         .mtr_ops_get = mlx5_flow_meter_ops_get,
1466 };
1467
1468 /**
1469  * Verify and store value for device argument.
1470  *
1471  * @param[in] key
1472  *   Key argument to verify.
1473  * @param[in] val
1474  *   Value associated with key.
1475  * @param opaque
1476  *   User data.
1477  *
1478  * @return
1479  *   0 on success, a negative errno value otherwise and rte_errno is set.
1480  */
1481 static int
1482 mlx5_args_check(const char *key, const char *val, void *opaque)
1483 {
1484         struct mlx5_dev_config *config = opaque;
1485         unsigned long tmp;
1486
1487         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1488         if (!strcmp(MLX5_REPRESENTOR, key))
1489                 return 0;
1490         errno = 0;
1491         tmp = strtoul(val, NULL, 0);
1492         if (errno) {
1493                 rte_errno = errno;
1494                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1495                 return -rte_errno;
1496         }
1497         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1498                 config->cqe_comp = !!tmp;
1499         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1500                 config->cqe_pad = !!tmp;
1501         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1502                 config->hw_padding = !!tmp;
1503         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1504                 config->mprq.enabled = !!tmp;
1505         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1506                 config->mprq.stride_num_n = tmp;
1507         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1508                 config->mprq.max_memcpy_len = tmp;
1509         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1510                 config->mprq.min_rxqs_num = tmp;
1511         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1512                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1513                                  " converted to txq_inline_max", key);
1514                 config->txq_inline_max = tmp;
1515         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1516                 config->txq_inline_max = tmp;
1517         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1518                 config->txq_inline_min = tmp;
1519         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1520                 config->txq_inline_mpw = tmp;
1521         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1522                 config->txqs_inline = tmp;
1523         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1524                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1525         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1526                 config->mps = !!tmp;
1527         } else if (strcmp(MLX5_TX_DB_NC, key) == 0) {
1528                 if (tmp != MLX5_TXDB_CACHED &&
1529                     tmp != MLX5_TXDB_NCACHED &&
1530                     tmp != MLX5_TXDB_HEURISTIC) {
1531                         DRV_LOG(ERR, "invalid Tx doorbell "
1532                                      "mapping parameter");
1533                         rte_errno = EINVAL;
1534                         return -rte_errno;
1535                 }
1536                 config->dbnc = tmp;
1537         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1538                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1539         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1540                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1541                                  " converted to txq_inline_mpw", key);
1542                 config->txq_inline_mpw = tmp;
1543         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1544                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1545         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1546                 config->rx_vec_en = !!tmp;
1547         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1548                 config->l3_vxlan_en = !!tmp;
1549         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1550                 config->vf_nl_en = !!tmp;
1551         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1552                 config->dv_esw_en = !!tmp;
1553         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1554                 config->dv_flow_en = !!tmp;
1555         } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1556                 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1557                     tmp != MLX5_XMETA_MODE_META16 &&
1558                     tmp != MLX5_XMETA_MODE_META32) {
1559                         DRV_LOG(ERR, "invalid extensive "
1560                                      "metadata parameter");
1561                         rte_errno = EINVAL;
1562                         return -rte_errno;
1563                 }
1564                 config->dv_xmeta_en = tmp;
1565         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1566                 config->mr_ext_memseg_en = !!tmp;
1567         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1568                 config->max_dump_files_num = tmp;
1569         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1570                 config->lro.timeout = tmp;
1571         } else if (strcmp(MLX5_CLASS_ARG_NAME, key) == 0) {
1572                 DRV_LOG(DEBUG, "class argument is %s.", val);
1573         } else {
1574                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1575                 rte_errno = EINVAL;
1576                 return -rte_errno;
1577         }
1578         return 0;
1579 }
1580
1581 /**
1582  * Parse device parameters.
1583  *
1584  * @param config
1585  *   Pointer to device configuration structure.
1586  * @param devargs
1587  *   Device arguments structure.
1588  *
1589  * @return
1590  *   0 on success, a negative errno value otherwise and rte_errno is set.
1591  */
1592 static int
1593 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1594 {
1595         const char **params = (const char *[]){
1596                 MLX5_RXQ_CQE_COMP_EN,
1597                 MLX5_RXQ_CQE_PAD_EN,
1598                 MLX5_RXQ_PKT_PAD_EN,
1599                 MLX5_RX_MPRQ_EN,
1600                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1601                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1602                 MLX5_RXQS_MIN_MPRQ,
1603                 MLX5_TXQ_INLINE,
1604                 MLX5_TXQ_INLINE_MIN,
1605                 MLX5_TXQ_INLINE_MAX,
1606                 MLX5_TXQ_INLINE_MPW,
1607                 MLX5_TXQS_MIN_INLINE,
1608                 MLX5_TXQS_MAX_VEC,
1609                 MLX5_TXQ_MPW_EN,
1610                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1611                 MLX5_TXQ_MAX_INLINE_LEN,
1612                 MLX5_TX_DB_NC,
1613                 MLX5_TX_VEC_EN,
1614                 MLX5_RX_VEC_EN,
1615                 MLX5_L3_VXLAN_EN,
1616                 MLX5_VF_NL_EN,
1617                 MLX5_DV_ESW_EN,
1618                 MLX5_DV_FLOW_EN,
1619                 MLX5_DV_XMETA_EN,
1620                 MLX5_MR_EXT_MEMSEG_EN,
1621                 MLX5_REPRESENTOR,
1622                 MLX5_MAX_DUMP_FILES_NUM,
1623                 MLX5_LRO_TIMEOUT_USEC,
1624                 MLX5_CLASS_ARG_NAME,
1625                 NULL,
1626         };
1627         struct rte_kvargs *kvlist;
1628         int ret = 0;
1629         int i;
1630
1631         if (devargs == NULL)
1632                 return 0;
1633         /* Following UGLY cast is done to pass checkpatch. */
1634         kvlist = rte_kvargs_parse(devargs->args, params);
1635         if (kvlist == NULL) {
1636                 rte_errno = EINVAL;
1637                 return -rte_errno;
1638         }
1639         /* Process parameters. */
1640         for (i = 0; (params[i] != NULL); ++i) {
1641                 if (rte_kvargs_count(kvlist, params[i])) {
1642                         ret = rte_kvargs_process(kvlist, params[i],
1643                                                  mlx5_args_check, config);
1644                         if (ret) {
1645                                 rte_errno = EINVAL;
1646                                 rte_kvargs_free(kvlist);
1647                                 return -rte_errno;
1648                         }
1649                 }
1650         }
1651         rte_kvargs_free(kvlist);
1652         return 0;
1653 }
1654
1655 static struct rte_pci_driver mlx5_driver;
1656
1657 /**
1658  * PMD global initialization.
1659  *
1660  * Independent from individual device, this function initializes global
1661  * per-PMD data structures distinguishing primary and secondary processes.
1662  * Hence, each initialization is called once per a process.
1663  *
1664  * @return
1665  *   0 on success, a negative errno value otherwise and rte_errno is set.
1666  */
1667 static int
1668 mlx5_init_once(void)
1669 {
1670         struct mlx5_shared_data *sd;
1671         struct mlx5_local_data *ld = &mlx5_local_data;
1672         int ret = 0;
1673
1674         if (mlx5_init_shared_data())
1675                 return -rte_errno;
1676         sd = mlx5_shared_data;
1677         assert(sd);
1678         rte_spinlock_lock(&sd->lock);
1679         switch (rte_eal_process_type()) {
1680         case RTE_PROC_PRIMARY:
1681                 if (sd->init_done)
1682                         break;
1683                 LIST_INIT(&sd->mem_event_cb_list);
1684                 rte_rwlock_init(&sd->mem_event_rwlock);
1685                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1686                                                 mlx5_mr_mem_event_cb, NULL);
1687                 ret = mlx5_mp_init_primary();
1688                 if (ret)
1689                         goto out;
1690                 sd->init_done = true;
1691                 break;
1692         case RTE_PROC_SECONDARY:
1693                 if (ld->init_done)
1694                         break;
1695                 ret = mlx5_mp_init_secondary();
1696                 if (ret)
1697                         goto out;
1698                 ++sd->secondary_cnt;
1699                 ld->init_done = true;
1700                 break;
1701         default:
1702                 break;
1703         }
1704 out:
1705         rte_spinlock_unlock(&sd->lock);
1706         return ret;
1707 }
1708
1709 /**
1710  * Configures the minimal amount of data to inline into WQE
1711  * while sending packets.
1712  *
1713  * - the txq_inline_min has the maximal priority, if this
1714  *   key is specified in devargs
1715  * - if DevX is enabled the inline mode is queried from the
1716  *   device (HCA attributes and NIC vport context if needed).
1717  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1718  *   and none (0 bytes) for other NICs
1719  *
1720  * @param spawn
1721  *   Verbs device parameters (name, port, switch_info) to spawn.
1722  * @param config
1723  *   Device configuration parameters.
1724  */
1725 static void
1726 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1727                     struct mlx5_dev_config *config)
1728 {
1729         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1730                 /* Application defines size of inlined data explicitly. */
1731                 switch (spawn->pci_dev->id.device_id) {
1732                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1733                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1734                         if (config->txq_inline_min <
1735                                        (int)MLX5_INLINE_HSIZE_L2) {
1736                                 DRV_LOG(DEBUG,
1737                                         "txq_inline_mix aligned to minimal"
1738                                         " ConnectX-4 required value %d",
1739                                         (int)MLX5_INLINE_HSIZE_L2);
1740                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1741                         }
1742                         break;
1743                 }
1744                 goto exit;
1745         }
1746         if (config->hca_attr.eth_net_offloads) {
1747                 /* We have DevX enabled, inline mode queried successfully. */
1748                 switch (config->hca_attr.wqe_inline_mode) {
1749                 case MLX5_CAP_INLINE_MODE_L2:
1750                         /* outer L2 header must be inlined. */
1751                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1752                         goto exit;
1753                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1754                         /* No inline data are required by NIC. */
1755                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1756                         config->hw_vlan_insert =
1757                                 config->hca_attr.wqe_vlan_insert;
1758                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1759                         goto exit;
1760                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1761                         /* inline mode is defined by NIC vport context. */
1762                         if (!config->hca_attr.eth_virt)
1763                                 break;
1764                         switch (config->hca_attr.vport_inline_mode) {
1765                         case MLX5_INLINE_MODE_NONE:
1766                                 config->txq_inline_min =
1767                                         MLX5_INLINE_HSIZE_NONE;
1768                                 goto exit;
1769                         case MLX5_INLINE_MODE_L2:
1770                                 config->txq_inline_min =
1771                                         MLX5_INLINE_HSIZE_L2;
1772                                 goto exit;
1773                         case MLX5_INLINE_MODE_IP:
1774                                 config->txq_inline_min =
1775                                         MLX5_INLINE_HSIZE_L3;
1776                                 goto exit;
1777                         case MLX5_INLINE_MODE_TCP_UDP:
1778                                 config->txq_inline_min =
1779                                         MLX5_INLINE_HSIZE_L4;
1780                                 goto exit;
1781                         case MLX5_INLINE_MODE_INNER_L2:
1782                                 config->txq_inline_min =
1783                                         MLX5_INLINE_HSIZE_INNER_L2;
1784                                 goto exit;
1785                         case MLX5_INLINE_MODE_INNER_IP:
1786                                 config->txq_inline_min =
1787                                         MLX5_INLINE_HSIZE_INNER_L3;
1788                                 goto exit;
1789                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1790                                 config->txq_inline_min =
1791                                         MLX5_INLINE_HSIZE_INNER_L4;
1792                                 goto exit;
1793                         }
1794                 }
1795         }
1796         /*
1797          * We get here if we are unable to deduce
1798          * inline data size with DevX. Try PCI ID
1799          * to determine old NICs.
1800          */
1801         switch (spawn->pci_dev->id.device_id) {
1802         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1803         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1804         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1805         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1806                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1807                 config->hw_vlan_insert = 0;
1808                 break;
1809         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1810         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1811         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1812         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1813                 /*
1814                  * These NICs support VLAN insertion from WQE and
1815                  * report the wqe_vlan_insert flag. But there is the bug
1816                  * and PFC control may be broken, so disable feature.
1817                  */
1818                 config->hw_vlan_insert = 0;
1819                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1820                 break;
1821         default:
1822                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1823                 break;
1824         }
1825 exit:
1826         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1827 }
1828
1829 /**
1830  * Configures the metadata mask fields in the shared context.
1831  *
1832  * @param [in] dev
1833  *   Pointer to Ethernet device.
1834  */
1835 static void
1836 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1837 {
1838         struct mlx5_priv *priv = dev->data->dev_private;
1839         struct mlx5_ibv_shared *sh = priv->sh;
1840         uint32_t meta, mark, reg_c0;
1841
1842         reg_c0 = ~priv->vport_meta_mask;
1843         switch (priv->config.dv_xmeta_en) {
1844         case MLX5_XMETA_MODE_LEGACY:
1845                 meta = UINT32_MAX;
1846                 mark = MLX5_FLOW_MARK_MASK;
1847                 break;
1848         case MLX5_XMETA_MODE_META16:
1849                 meta = reg_c0 >> rte_bsf32(reg_c0);
1850                 mark = MLX5_FLOW_MARK_MASK;
1851                 break;
1852         case MLX5_XMETA_MODE_META32:
1853                 meta = UINT32_MAX;
1854                 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1855                 break;
1856         default:
1857                 meta = 0;
1858                 mark = 0;
1859                 assert(false);
1860                 break;
1861         }
1862         if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1863                 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1864                                  sh->dv_mark_mask, mark);
1865         else
1866                 sh->dv_mark_mask = mark;
1867         if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1868                 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1869                                  sh->dv_meta_mask, meta);
1870         else
1871                 sh->dv_meta_mask = meta;
1872         if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1873                 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1874                                  sh->dv_meta_mask, reg_c0);
1875         else
1876                 sh->dv_regc0_mask = reg_c0;
1877         DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1878         DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1879         DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1880         DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1881 }
1882
1883 /**
1884  * Allocate page of door-bells and register it using DevX API.
1885  *
1886  * @param [in] dev
1887  *   Pointer to Ethernet device.
1888  *
1889  * @return
1890  *   Pointer to new page on success, NULL otherwise.
1891  */
1892 static struct mlx5_devx_dbr_page *
1893 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1894 {
1895         struct mlx5_priv *priv = dev->data->dev_private;
1896         struct mlx5_devx_dbr_page *page;
1897
1898         /* Allocate space for door-bell page and management data. */
1899         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1900                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1901         if (!page) {
1902                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1903                         dev->data->port_id);
1904                 return NULL;
1905         }
1906         /* Register allocated memory. */
1907         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1908                                               MLX5_DBR_PAGE_SIZE, 0);
1909         if (!page->umem) {
1910                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1911                         dev->data->port_id);
1912                 rte_free(page);
1913                 return NULL;
1914         }
1915         return page;
1916 }
1917
1918 /**
1919  * Find the next available door-bell, allocate new page if needed.
1920  *
1921  * @param [in] dev
1922  *   Pointer to Ethernet device.
1923  * @param [out] dbr_page
1924  *   Door-bell page containing the page data.
1925  *
1926  * @return
1927  *   Door-bell address offset on success, a negative error value otherwise.
1928  */
1929 int64_t
1930 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1931 {
1932         struct mlx5_priv *priv = dev->data->dev_private;
1933         struct mlx5_devx_dbr_page *page = NULL;
1934         uint32_t i, j;
1935
1936         LIST_FOREACH(page, &priv->dbrpgs, next)
1937                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1938                         break;
1939         if (!page) { /* No page with free door-bell exists. */
1940                 page = mlx5_alloc_dbr_page(dev);
1941                 if (!page) /* Failed to allocate new page. */
1942                         return (-1);
1943                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1944         }
1945         /* Loop to find bitmap part with clear bit. */
1946         for (i = 0;
1947              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1948              i++)
1949                 ; /* Empty. */
1950         /* Find the first clear bit. */
1951         j = rte_bsf64(~page->dbr_bitmap[i]);
1952         assert(i < (MLX5_DBR_PER_PAGE / 64));
1953         page->dbr_bitmap[i] |= (1 << j);
1954         page->dbr_count++;
1955         *dbr_page = page;
1956         return (((i * 64) + j) * sizeof(uint64_t));
1957 }
1958
1959 /**
1960  * Release a door-bell record.
1961  *
1962  * @param [in] dev
1963  *   Pointer to Ethernet device.
1964  * @param [in] umem_id
1965  *   UMEM ID of page containing the door-bell record to release.
1966  * @param [in] offset
1967  *   Offset of door-bell record in page.
1968  *
1969  * @return
1970  *   0 on success, a negative error value otherwise.
1971  */
1972 int32_t
1973 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1974 {
1975         struct mlx5_priv *priv = dev->data->dev_private;
1976         struct mlx5_devx_dbr_page *page = NULL;
1977         int ret = 0;
1978
1979         LIST_FOREACH(page, &priv->dbrpgs, next)
1980                 /* Find the page this address belongs to. */
1981                 if (page->umem->umem_id == umem_id)
1982                         break;
1983         if (!page)
1984                 return -EINVAL;
1985         page->dbr_count--;
1986         if (!page->dbr_count) {
1987                 /* Page not used, free it and remove from list. */
1988                 LIST_REMOVE(page, next);
1989                 if (page->umem)
1990                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1991                 rte_free(page);
1992         } else {
1993                 /* Mark in bitmap that this door-bell is not in use. */
1994                 offset /= MLX5_DBR_SIZE;
1995                 int i = offset / 64;
1996                 int j = offset % 64;
1997
1998                 page->dbr_bitmap[i] &= ~(1 << j);
1999         }
2000         return ret;
2001 }
2002
2003 int
2004 rte_pmd_mlx5_get_dyn_flag_names(char *names[], unsigned int n)
2005 {
2006         static const char *const dynf_names[] = {
2007                 RTE_PMD_MLX5_FINE_GRANULARITY_INLINE,
2008                 RTE_MBUF_DYNFLAG_METADATA_NAME
2009         };
2010         unsigned int i;
2011
2012         if (n < RTE_DIM(dynf_names))
2013                 return -ENOMEM;
2014         for (i = 0; i < RTE_DIM(dynf_names); i++) {
2015                 if (names[i] == NULL)
2016                         return -EINVAL;
2017                 strcpy(names[i], dynf_names[i]);
2018         }
2019         return RTE_DIM(dynf_names);
2020 }
2021
2022 /**
2023  * Check sibling device configurations.
2024  *
2025  * Sibling devices sharing the Infiniband device context
2026  * should have compatible configurations. This regards
2027  * representors and bonding slaves.
2028  *
2029  * @param priv
2030  *   Private device descriptor.
2031  * @param config
2032  *   Configuration of the device is going to be created.
2033  *
2034  * @return
2035  *   0 on success, EINVAL otherwise
2036  */
2037 static int
2038 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
2039                               struct mlx5_dev_config *config)
2040 {
2041         struct mlx5_ibv_shared *sh = priv->sh;
2042         struct mlx5_dev_config *sh_conf = NULL;
2043         uint16_t port_id;
2044
2045         assert(sh);
2046         /* Nothing to compare for the single/first device. */
2047         if (sh->refcnt == 1)
2048                 return 0;
2049         /* Find the device with shared context. */
2050         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2051                 struct mlx5_priv *opriv =
2052                         rte_eth_devices[port_id].data->dev_private;
2053
2054                 if (opriv && opriv != priv && opriv->sh == sh) {
2055                         sh_conf = &opriv->config;
2056                         break;
2057                 }
2058         }
2059         if (!sh_conf)
2060                 return 0;
2061         if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
2062                 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
2063                              " for shared %s context", sh->ibdev_name);
2064                 rte_errno = EINVAL;
2065                 return rte_errno;
2066         }
2067         if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
2068                 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
2069                              " for shared %s context", sh->ibdev_name);
2070                 rte_errno = EINVAL;
2071                 return rte_errno;
2072         }
2073         return 0;
2074 }
2075 /**
2076  * Spawn an Ethernet device from Verbs information.
2077  *
2078  * @param dpdk_dev
2079  *   Backing DPDK device.
2080  * @param spawn
2081  *   Verbs device parameters (name, port, switch_info) to spawn.
2082  * @param config
2083  *   Device configuration parameters.
2084  *
2085  * @return
2086  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
2087  *   is set. The following errors are defined:
2088  *
2089  *   EBUSY: device is not supposed to be spawned.
2090  *   EEXIST: device is already spawned
2091  */
2092 static struct rte_eth_dev *
2093 mlx5_dev_spawn(struct rte_device *dpdk_dev,
2094                struct mlx5_dev_spawn_data *spawn,
2095                struct mlx5_dev_config config)
2096 {
2097         const struct mlx5_switch_info *switch_info = &spawn->info;
2098         struct mlx5_ibv_shared *sh = NULL;
2099         struct ibv_port_attr port_attr;
2100         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
2101         struct rte_eth_dev *eth_dev = NULL;
2102         struct mlx5_priv *priv = NULL;
2103         int err = 0;
2104         unsigned int hw_padding = 0;
2105         unsigned int mps;
2106         unsigned int cqe_comp;
2107         unsigned int cqe_pad = 0;
2108         unsigned int tunnel_en = 0;
2109         unsigned int mpls_en = 0;
2110         unsigned int swp = 0;
2111         unsigned int mprq = 0;
2112         unsigned int mprq_min_stride_size_n = 0;
2113         unsigned int mprq_max_stride_size_n = 0;
2114         unsigned int mprq_min_stride_num_n = 0;
2115         unsigned int mprq_max_stride_num_n = 0;
2116         struct rte_ether_addr mac;
2117         char name[RTE_ETH_NAME_MAX_LEN];
2118         int own_domain_id = 0;
2119         uint16_t port_id;
2120         unsigned int i;
2121 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2122         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
2123 #endif
2124
2125         /* Determine if this port representor is supposed to be spawned. */
2126         if (switch_info->representor && dpdk_dev->devargs) {
2127                 struct rte_eth_devargs eth_da;
2128
2129                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
2130                 if (err) {
2131                         rte_errno = -err;
2132                         DRV_LOG(ERR, "failed to process device arguments: %s",
2133                                 strerror(rte_errno));
2134                         return NULL;
2135                 }
2136                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
2137                         if (eth_da.representor_ports[i] ==
2138                             (uint16_t)switch_info->port_name)
2139                                 break;
2140                 if (i == eth_da.nb_representor_ports) {
2141                         rte_errno = EBUSY;
2142                         return NULL;
2143                 }
2144         }
2145         /* Build device name. */
2146         if (spawn->pf_bond <  0) {
2147                 /* Single device. */
2148                 if (!switch_info->representor)
2149                         strlcpy(name, dpdk_dev->name, sizeof(name));
2150                 else
2151                         snprintf(name, sizeof(name), "%s_representor_%u",
2152                                  dpdk_dev->name, switch_info->port_name);
2153         } else {
2154                 /* Bonding device. */
2155                 if (!switch_info->representor)
2156                         snprintf(name, sizeof(name), "%s_%s",
2157                                  dpdk_dev->name, spawn->ibv_dev->name);
2158                 else
2159                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
2160                                  dpdk_dev->name, spawn->ibv_dev->name,
2161                                  switch_info->port_name);
2162         }
2163         /* check if the device is already spawned */
2164         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
2165                 rte_errno = EEXIST;
2166                 return NULL;
2167         }
2168         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
2169         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
2170                 eth_dev = rte_eth_dev_attach_secondary(name);
2171                 if (eth_dev == NULL) {
2172                         DRV_LOG(ERR, "can not attach rte ethdev");
2173                         rte_errno = ENOMEM;
2174                         return NULL;
2175                 }
2176                 eth_dev->device = dpdk_dev;
2177                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
2178                 err = mlx5_proc_priv_init(eth_dev);
2179                 if (err)
2180                         return NULL;
2181                 /* Receive command fd from primary process */
2182                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
2183                 if (err < 0)
2184                         return NULL;
2185                 /* Remap UAR for Tx queues. */
2186                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
2187                 if (err)
2188                         return NULL;
2189                 /*
2190                  * Ethdev pointer is still required as input since
2191                  * the primary device is not accessible from the
2192                  * secondary process.
2193                  */
2194                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
2195                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
2196                 return eth_dev;
2197         }
2198         /*
2199          * Some parameters ("tx_db_nc" in particularly) are needed in
2200          * advance to create dv/verbs device context. We proceed the
2201          * devargs here to get ones, and later proceed devargs again
2202          * to override some hardware settings.
2203          */
2204         err = mlx5_args(&config, dpdk_dev->devargs);
2205         if (err) {
2206                 err = rte_errno;
2207                 DRV_LOG(ERR, "failed to process device arguments: %s",
2208                         strerror(rte_errno));
2209                 goto error;
2210         }
2211         sh = mlx5_alloc_shared_ibctx(spawn, &config);
2212         if (!sh)
2213                 return NULL;
2214         config.devx = sh->devx;
2215 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
2216         config.dest_tir = 1;
2217 #endif
2218 #ifdef HAVE_IBV_MLX5_MOD_SWP
2219         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
2220 #endif
2221         /*
2222          * Multi-packet send is supported by ConnectX-4 Lx PF as well
2223          * as all ConnectX-5 devices.
2224          */
2225 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2226         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
2227 #endif
2228 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2229         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
2230 #endif
2231         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
2232         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
2233                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
2234                         DRV_LOG(DEBUG, "enhanced MPW is supported");
2235                         mps = MLX5_MPW_ENHANCED;
2236                 } else {
2237                         DRV_LOG(DEBUG, "MPW is supported");
2238                         mps = MLX5_MPW;
2239                 }
2240         } else {
2241                 DRV_LOG(DEBUG, "MPW isn't supported");
2242                 mps = MLX5_MPW_DISABLED;
2243         }
2244 #ifdef HAVE_IBV_MLX5_MOD_SWP
2245         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
2246                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
2247         DRV_LOG(DEBUG, "SWP support: %u", swp);
2248 #endif
2249         config.swp = !!swp;
2250 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2251         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
2252                 struct mlx5dv_striding_rq_caps mprq_caps =
2253                         dv_attr.striding_rq_caps;
2254
2255                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
2256                         mprq_caps.min_single_stride_log_num_of_bytes);
2257                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
2258                         mprq_caps.max_single_stride_log_num_of_bytes);
2259                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
2260                         mprq_caps.min_single_wqe_log_num_of_strides);
2261                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
2262                         mprq_caps.max_single_wqe_log_num_of_strides);
2263                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
2264                         mprq_caps.supported_qpts);
2265                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
2266                 mprq = 1;
2267                 mprq_min_stride_size_n =
2268                         mprq_caps.min_single_stride_log_num_of_bytes;
2269                 mprq_max_stride_size_n =
2270                         mprq_caps.max_single_stride_log_num_of_bytes;
2271                 mprq_min_stride_num_n =
2272                         mprq_caps.min_single_wqe_log_num_of_strides;
2273                 mprq_max_stride_num_n =
2274                         mprq_caps.max_single_wqe_log_num_of_strides;
2275                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2276                                                    mprq_min_stride_num_n);
2277         }
2278 #endif
2279         if (RTE_CACHE_LINE_SIZE == 128 &&
2280             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2281                 cqe_comp = 0;
2282         else
2283                 cqe_comp = 1;
2284         config.cqe_comp = cqe_comp;
2285 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2286         /* Whether device supports 128B Rx CQE padding. */
2287         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2288                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2289 #endif
2290 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2291         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2292                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2293                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2294                              (dv_attr.tunnel_offloads_caps &
2295                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
2296                              (dv_attr.tunnel_offloads_caps &
2297                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
2298         }
2299         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2300                 tunnel_en ? "" : "not ");
2301 #else
2302         DRV_LOG(WARNING,
2303                 "tunnel offloading disabled due to old OFED/rdma-core version");
2304 #endif
2305         config.tunnel_en = tunnel_en;
2306 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2307         mpls_en = ((dv_attr.tunnel_offloads_caps &
2308                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2309                    (dv_attr.tunnel_offloads_caps &
2310                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2311         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2312                 mpls_en ? "" : "not ");
2313 #else
2314         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2315                 " old OFED/rdma-core version or firmware configuration");
2316 #endif
2317         config.mpls_en = mpls_en;
2318         /* Check port status. */
2319         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2320         if (err) {
2321                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2322                 goto error;
2323         }
2324         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2325                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2326                 err = EINVAL;
2327                 goto error;
2328         }
2329         if (port_attr.state != IBV_PORT_ACTIVE)
2330                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2331                         mlx5_glue->port_state_str(port_attr.state),
2332                         port_attr.state);
2333         /* Allocate private eth device data. */
2334         priv = rte_zmalloc("ethdev private structure",
2335                            sizeof(*priv),
2336                            RTE_CACHE_LINE_SIZE);
2337         if (priv == NULL) {
2338                 DRV_LOG(ERR, "priv allocation failure");
2339                 err = ENOMEM;
2340                 goto error;
2341         }
2342         priv->sh = sh;
2343         priv->ibv_port = spawn->ibv_port;
2344         priv->pci_dev = spawn->pci_dev;
2345         priv->mtu = RTE_ETHER_MTU;
2346 #ifndef RTE_ARCH_64
2347         /* Initialize UAR access locks for 32bit implementations. */
2348         rte_spinlock_init(&priv->uar_lock_cq);
2349         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2350                 rte_spinlock_init(&priv->uar_lock[i]);
2351 #endif
2352         /* Some internal functions rely on Netlink sockets, open them now. */
2353         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2354         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2355         priv->representor = !!switch_info->representor;
2356         priv->master = !!switch_info->master;
2357         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2358         priv->vport_meta_tag = 0;
2359         priv->vport_meta_mask = 0;
2360         priv->pf_bond = spawn->pf_bond;
2361 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2362         /*
2363          * The DevX port query API is implemented. E-Switch may use
2364          * either vport or reg_c[0] metadata register to match on
2365          * vport index. The engaged part of metadata register is
2366          * defined by mask.
2367          */
2368         if (switch_info->representor || switch_info->master) {
2369                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2370                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2371                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2372                                                  &devx_port);
2373                 if (err) {
2374                         DRV_LOG(WARNING,
2375                                 "can't query devx port %d on device %s",
2376                                 spawn->ibv_port, spawn->ibv_dev->name);
2377                         devx_port.comp_mask = 0;
2378                 }
2379         }
2380         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2381                 priv->vport_meta_tag = devx_port.reg_c_0.value;
2382                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2383                 if (!priv->vport_meta_mask) {
2384                         DRV_LOG(ERR, "vport zero mask for port %d"
2385                                      " on bonding device %s",
2386                                      spawn->ibv_port, spawn->ibv_dev->name);
2387                         err = ENOTSUP;
2388                         goto error;
2389                 }
2390                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2391                         DRV_LOG(ERR, "invalid vport tag for port %d"
2392                                      " on bonding device %s",
2393                                      spawn->ibv_port, spawn->ibv_dev->name);
2394                         err = ENOTSUP;
2395                         goto error;
2396                 }
2397         }
2398         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2399                 priv->vport_id = devx_port.vport_num;
2400         } else if (spawn->pf_bond >= 0) {
2401                 DRV_LOG(ERR, "can't deduce vport index for port %d"
2402                              " on bonding device %s",
2403                              spawn->ibv_port, spawn->ibv_dev->name);
2404                 err = ENOTSUP;
2405                 goto error;
2406         } else {
2407                 /* Suppose vport index in compatible way. */
2408                 priv->vport_id = switch_info->representor ?
2409                                  switch_info->port_name + 1 : -1;
2410         }
2411 #else
2412         /*
2413          * Kernel/rdma_core support single E-Switch per PF configurations
2414          * only and vport_id field contains the vport index for
2415          * associated VF, which is deduced from representor port name.
2416          * For example, let's have the IB device port 10, it has
2417          * attached network device eth0, which has port name attribute
2418          * pf0vf2, we can deduce the VF number as 2, and set vport index
2419          * as 3 (2+1). This assigning schema should be changed if the
2420          * multiple E-Switch instances per PF configurations or/and PCI
2421          * subfunctions are added.
2422          */
2423         priv->vport_id = switch_info->representor ?
2424                          switch_info->port_name + 1 : -1;
2425 #endif
2426         /* representor_id field keeps the unmodified VF index. */
2427         priv->representor_id = switch_info->representor ?
2428                                switch_info->port_name : -1;
2429         /*
2430          * Look for sibling devices in order to reuse their switch domain
2431          * if any, otherwise allocate one.
2432          */
2433         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2434                 const struct mlx5_priv *opriv =
2435                         rte_eth_devices[port_id].data->dev_private;
2436
2437                 if (!opriv ||
2438                     opriv->sh != priv->sh ||
2439                         opriv->domain_id ==
2440                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2441                         continue;
2442                 priv->domain_id = opriv->domain_id;
2443                 break;
2444         }
2445         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2446                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2447                 if (err) {
2448                         err = rte_errno;
2449                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
2450                                 strerror(rte_errno));
2451                         goto error;
2452                 }
2453                 own_domain_id = 1;
2454         }
2455         /* Override some values set by hardware configuration. */
2456         mlx5_args(&config, dpdk_dev->devargs);
2457         err = mlx5_dev_check_sibling_config(priv, &config);
2458         if (err)
2459                 goto error;
2460         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2461                             IBV_DEVICE_RAW_IP_CSUM);
2462         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2463                 (config.hw_csum ? "" : "not "));
2464 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2465         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2466         DRV_LOG(DEBUG, "counters are not supported");
2467 #endif
2468 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
2469         if (config.dv_flow_en) {
2470                 DRV_LOG(WARNING, "DV flow is not supported");
2471                 config.dv_flow_en = 0;
2472         }
2473 #endif
2474         config.ind_table_max_size =
2475                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2476         /*
2477          * Remove this check once DPDK supports larger/variable
2478          * indirection tables.
2479          */
2480         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2481                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2482         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2483                 config.ind_table_max_size);
2484         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2485                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2486         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2487                 (config.hw_vlan_strip ? "" : "not "));
2488         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2489                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
2490         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2491                 (config.hw_fcs_strip ? "" : "not "));
2492 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2493         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2494 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2495         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2496                         IBV_DEVICE_PCI_WRITE_END_PADDING);
2497 #endif
2498         if (config.hw_padding && !hw_padding) {
2499                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2500                 config.hw_padding = 0;
2501         } else if (config.hw_padding) {
2502                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2503         }
2504         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2505                       (sh->device_attr.tso_caps.supported_qpts &
2506                        (1 << IBV_QPT_RAW_PACKET)));
2507         if (config.tso)
2508                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2509         /*
2510          * MPW is disabled by default, while the Enhanced MPW is enabled
2511          * by default.
2512          */
2513         if (config.mps == MLX5_ARG_UNSET)
2514                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2515                                                           MLX5_MPW_DISABLED;
2516         else
2517                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2518         DRV_LOG(INFO, "%sMPS is %s",
2519                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " :
2520                 config.mps == MLX5_MPW ? "legacy " : "",
2521                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2522         if (config.cqe_comp && !cqe_comp) {
2523                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2524                 config.cqe_comp = 0;
2525         }
2526         if (config.cqe_pad && !cqe_pad) {
2527                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2528                 config.cqe_pad = 0;
2529         } else if (config.cqe_pad) {
2530                 DRV_LOG(INFO, "Rx CQE padding is enabled");
2531         }
2532         if (config.devx) {
2533                 priv->counter_fallback = 0;
2534                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2535                 if (err) {
2536                         err = -err;
2537                         goto error;
2538                 }
2539                 if (!config.hca_attr.flow_counters_dump)
2540                         priv->counter_fallback = 1;
2541 #ifndef HAVE_IBV_DEVX_ASYNC
2542                 priv->counter_fallback = 1;
2543 #endif
2544                 if (priv->counter_fallback)
2545                         DRV_LOG(INFO, "Use fall-back DV counter management");
2546                 /* Check for LRO support. */
2547                 if (config.dest_tir && config.hca_attr.lro_cap &&
2548                     config.dv_flow_en) {
2549                         /* TBD check tunnel lro caps. */
2550                         config.lro.supported = config.hca_attr.lro_cap;
2551                         DRV_LOG(DEBUG, "Device supports LRO");
2552                         /*
2553                          * If LRO timeout is not configured by application,
2554                          * use the minimal supported value.
2555                          */
2556                         if (!config.lro.timeout)
2557                                 config.lro.timeout =
2558                                 config.hca_attr.lro_timer_supported_periods[0];
2559                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2560                                 config.lro.timeout);
2561                 }
2562 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2563                 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2564                     config.dv_flow_en) {
2565                         uint8_t reg_c_mask =
2566                                 config.hca_attr.qos.flow_meter_reg_c_ids;
2567                         /*
2568                          * Meter needs two REG_C's for color match and pre-sfx
2569                          * flow match. Here get the REG_C for color match.
2570                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
2571                          */
2572                         reg_c_mask &= 0xfc;
2573                         if (__builtin_popcount(reg_c_mask) < 1) {
2574                                 priv->mtr_en = 0;
2575                                 DRV_LOG(WARNING, "No available register for"
2576                                         " meter.");
2577                         } else {
2578                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2579                                                       REG_C_0;
2580                                 priv->mtr_en = 1;
2581                                 priv->mtr_reg_share =
2582                                       config.hca_attr.qos.flow_meter_reg_share;
2583                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2584                                         priv->mtr_color_reg);
2585                         }
2586                 }
2587 #endif
2588         }
2589         if (config.mprq.enabled && mprq) {
2590                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2591                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
2592                         config.mprq.stride_num_n =
2593                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2594                                         mprq_min_stride_num_n);
2595                         DRV_LOG(WARNING,
2596                                 "the number of strides"
2597                                 " for Multi-Packet RQ is out of range,"
2598                                 " setting default value (%u)",
2599                                 1 << config.mprq.stride_num_n);
2600                 }
2601                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2602                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2603         } else if (config.mprq.enabled && !mprq) {
2604                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2605                 config.mprq.enabled = 0;
2606         }
2607         if (config.max_dump_files_num == 0)
2608                 config.max_dump_files_num = 128;
2609         eth_dev = rte_eth_dev_allocate(name);
2610         if (eth_dev == NULL) {
2611                 DRV_LOG(ERR, "can not allocate rte ethdev");
2612                 err = ENOMEM;
2613                 goto error;
2614         }
2615         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2616         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2617         if (priv->representor) {
2618                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2619                 eth_dev->data->representor_id = priv->representor_id;
2620         }
2621         /*
2622          * Store associated network device interface index. This index
2623          * is permanent throughout the lifetime of device. So, we may store
2624          * the ifindex here and use the cached value further.
2625          */
2626         assert(spawn->ifindex);
2627         priv->if_index = spawn->ifindex;
2628         eth_dev->data->dev_private = priv;
2629         priv->dev_data = eth_dev->data;
2630         eth_dev->data->mac_addrs = priv->mac;
2631         eth_dev->device = dpdk_dev;
2632         /* Configure the first MAC address by default. */
2633         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2634                 DRV_LOG(ERR,
2635                         "port %u cannot get MAC address, is mlx5_en"
2636                         " loaded? (errno: %s)",
2637                         eth_dev->data->port_id, strerror(rte_errno));
2638                 err = ENODEV;
2639                 goto error;
2640         }
2641         DRV_LOG(INFO,
2642                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2643                 eth_dev->data->port_id,
2644                 mac.addr_bytes[0], mac.addr_bytes[1],
2645                 mac.addr_bytes[2], mac.addr_bytes[3],
2646                 mac.addr_bytes[4], mac.addr_bytes[5]);
2647 #ifndef NDEBUG
2648         {
2649                 char ifname[IF_NAMESIZE];
2650
2651                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2652                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2653                                 eth_dev->data->port_id, ifname);
2654                 else
2655                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2656                                 eth_dev->data->port_id);
2657         }
2658 #endif
2659         /* Get actual MTU if possible. */
2660         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2661         if (err) {
2662                 err = rte_errno;
2663                 goto error;
2664         }
2665         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2666                 priv->mtu);
2667         /* Initialize burst functions to prevent crashes before link-up. */
2668         eth_dev->rx_pkt_burst = removed_rx_burst;
2669         eth_dev->tx_pkt_burst = removed_tx_burst;
2670         eth_dev->dev_ops = &mlx5_dev_ops;
2671         /* Register MAC address. */
2672         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2673         if (config.vf && config.vf_nl_en)
2674                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
2675                                       mlx5_ifindex(eth_dev),
2676                                       eth_dev->data->mac_addrs,
2677                                       MLX5_MAX_MAC_ADDRESSES);
2678         TAILQ_INIT(&priv->flows);
2679         TAILQ_INIT(&priv->ctrl_flows);
2680         TAILQ_INIT(&priv->flow_meters);
2681         TAILQ_INIT(&priv->flow_meter_profiles);
2682         /* Hint libmlx5 to use PMD allocator for data plane resources */
2683         struct mlx5dv_ctx_allocators alctr = {
2684                 .alloc = &mlx5_alloc_verbs_buf,
2685                 .free = &mlx5_free_verbs_buf,
2686                 .data = priv,
2687         };
2688         mlx5_glue->dv_set_context_attr(sh->ctx,
2689                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2690                                        (void *)((uintptr_t)&alctr));
2691         /* Bring Ethernet device up. */
2692         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2693                 eth_dev->data->port_id);
2694         mlx5_set_link_up(eth_dev);
2695         /*
2696          * Even though the interrupt handler is not installed yet,
2697          * interrupts will still trigger on the async_fd from
2698          * Verbs context returned by ibv_open_device().
2699          */
2700         mlx5_link_update(eth_dev, 0);
2701 #ifdef HAVE_MLX5DV_DR_ESWITCH
2702         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2703               (switch_info->representor || switch_info->master)))
2704                 config.dv_esw_en = 0;
2705 #else
2706         config.dv_esw_en = 0;
2707 #endif
2708         /* Detect minimal data bytes to inline. */
2709         mlx5_set_min_inline(spawn, &config);
2710         /* Store device configuration on private structure. */
2711         priv->config = config;
2712         /* Create context for virtual machine VLAN workaround. */
2713         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2714         if (config.dv_flow_en) {
2715                 err = mlx5_alloc_shared_dr(priv);
2716                 if (err)
2717                         goto error;
2718                 /*
2719                  * RSS id is shared with meter flow id. Meter flow id can only
2720                  * use the 24 MSB of the register.
2721                  */
2722                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
2723                                      MLX5_MTR_COLOR_BITS);
2724                 if (!priv->qrss_id_pool) {
2725                         DRV_LOG(ERR, "can't create flow id pool");
2726                         err = ENOMEM;
2727                         goto error;
2728                 }
2729         }
2730         /* Supported Verbs flow priority number detection. */
2731         err = mlx5_flow_discover_priorities(eth_dev);
2732         if (err < 0) {
2733                 err = -err;
2734                 goto error;
2735         }
2736         priv->config.flow_prio = err;
2737         if (!priv->config.dv_esw_en &&
2738             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2739                 DRV_LOG(WARNING, "metadata mode %u is not supported "
2740                                  "(no E-Switch)", priv->config.dv_xmeta_en);
2741                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2742         }
2743         mlx5_set_metadata_mask(eth_dev);
2744         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2745             !priv->sh->dv_regc0_mask) {
2746                 DRV_LOG(ERR, "metadata mode %u is not supported "
2747                              "(no metadata reg_c[0] is available)",
2748                              priv->config.dv_xmeta_en);
2749                         err = ENOTSUP;
2750                         goto error;
2751         }
2752         /* Query availibility of metadata reg_c's. */
2753         err = mlx5_flow_discover_mreg_c(eth_dev);
2754         if (err < 0) {
2755                 err = -err;
2756                 goto error;
2757         }
2758         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2759                 DRV_LOG(DEBUG,
2760                         "port %u extensive metadata register is not supported",
2761                         eth_dev->data->port_id);
2762                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2763                         DRV_LOG(ERR, "metadata mode %u is not supported "
2764                                      "(no metadata registers available)",
2765                                      priv->config.dv_xmeta_en);
2766                         err = ENOTSUP;
2767                         goto error;
2768                 }
2769         }
2770         if (priv->config.dv_flow_en &&
2771             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2772             mlx5_flow_ext_mreg_supported(eth_dev) &&
2773             priv->sh->dv_regc0_mask) {
2774                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2775                                                       MLX5_FLOW_MREG_HTABLE_SZ);
2776                 if (!priv->mreg_cp_tbl) {
2777                         err = ENOMEM;
2778                         goto error;
2779                 }
2780         }
2781         return eth_dev;
2782 error:
2783         if (priv) {
2784                 if (priv->mreg_cp_tbl)
2785                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2786                 if (priv->sh)
2787                         mlx5_free_shared_dr(priv);
2788                 if (priv->nl_socket_route >= 0)
2789                         close(priv->nl_socket_route);
2790                 if (priv->nl_socket_rdma >= 0)
2791                         close(priv->nl_socket_rdma);
2792                 if (priv->vmwa_context)
2793                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2794                 if (priv->qrss_id_pool)
2795                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
2796                 if (own_domain_id)
2797                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2798                 rte_free(priv);
2799                 if (eth_dev != NULL)
2800                         eth_dev->data->dev_private = NULL;
2801         }
2802         if (eth_dev != NULL) {
2803                 /* mac_addrs must not be freed alone because part of dev_private */
2804                 eth_dev->data->mac_addrs = NULL;
2805                 rte_eth_dev_release_port(eth_dev);
2806         }
2807         if (sh)
2808                 mlx5_free_shared_ibctx(sh);
2809         assert(err > 0);
2810         rte_errno = err;
2811         return NULL;
2812 }
2813
2814 /**
2815  * Comparison callback to sort device data.
2816  *
2817  * This is meant to be used with qsort().
2818  *
2819  * @param a[in]
2820  *   Pointer to pointer to first data object.
2821  * @param b[in]
2822  *   Pointer to pointer to second data object.
2823  *
2824  * @return
2825  *   0 if both objects are equal, less than 0 if the first argument is less
2826  *   than the second, greater than 0 otherwise.
2827  */
2828 static int
2829 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2830 {
2831         const struct mlx5_switch_info *si_a =
2832                 &((const struct mlx5_dev_spawn_data *)a)->info;
2833         const struct mlx5_switch_info *si_b =
2834                 &((const struct mlx5_dev_spawn_data *)b)->info;
2835         int ret;
2836
2837         /* Master device first. */
2838         ret = si_b->master - si_a->master;
2839         if (ret)
2840                 return ret;
2841         /* Then representor devices. */
2842         ret = si_b->representor - si_a->representor;
2843         if (ret)
2844                 return ret;
2845         /* Unidentified devices come last in no specific order. */
2846         if (!si_a->representor)
2847                 return 0;
2848         /* Order representors by name. */
2849         return si_a->port_name - si_b->port_name;
2850 }
2851
2852 /**
2853  * Match PCI information for possible slaves of bonding device.
2854  *
2855  * @param[in] ibv_dev
2856  *   Pointer to Infiniband device structure.
2857  * @param[in] pci_dev
2858  *   Pointer to PCI device structure to match PCI address.
2859  * @param[in] nl_rdma
2860  *   Netlink RDMA group socket handle.
2861  *
2862  * @return
2863  *   negative value if no bonding device found, otherwise
2864  *   positive index of slave PF in bonding.
2865  */
2866 static int
2867 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2868                            const struct rte_pci_device *pci_dev,
2869                            int nl_rdma)
2870 {
2871         char ifname[IF_NAMESIZE + 1];
2872         unsigned int ifindex;
2873         unsigned int np, i;
2874         FILE *file = NULL;
2875         int pf = -1;
2876
2877         /*
2878          * Try to get master device name. If something goes
2879          * wrong suppose the lack of kernel support and no
2880          * bonding devices.
2881          */
2882         if (nl_rdma < 0)
2883                 return -1;
2884         if (!strstr(ibv_dev->name, "bond"))
2885                 return -1;
2886         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2887         if (!np)
2888                 return -1;
2889         /*
2890          * The Master device might not be on the predefined
2891          * port (not on port index 1, it is not garanted),
2892          * we have to scan all Infiniband device port and
2893          * find master.
2894          */
2895         for (i = 1; i <= np; ++i) {
2896                 /* Check whether Infiniband port is populated. */
2897                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2898                 if (!ifindex)
2899                         continue;
2900                 if (!if_indextoname(ifindex, ifname))
2901                         continue;
2902                 /* Try to read bonding slave names from sysfs. */
2903                 MKSTR(slaves,
2904                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2905                 file = fopen(slaves, "r");
2906                 if (file)
2907                         break;
2908         }
2909         if (!file)
2910                 return -1;
2911         /* Use safe format to check maximal buffer length. */
2912         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2913         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2914                 char tmp_str[IF_NAMESIZE + 32];
2915                 struct rte_pci_addr pci_addr;
2916                 struct mlx5_switch_info info;
2917
2918                 /* Process slave interface names in the loop. */
2919                 snprintf(tmp_str, sizeof(tmp_str),
2920                          "/sys/class/net/%s", ifname);
2921                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2922                         DRV_LOG(WARNING, "can not get PCI address"
2923                                          " for netdev \"%s\"", ifname);
2924                         continue;
2925                 }
2926                 if (pci_dev->addr.domain != pci_addr.domain ||
2927                     pci_dev->addr.bus != pci_addr.bus ||
2928                     pci_dev->addr.devid != pci_addr.devid ||
2929                     pci_dev->addr.function != pci_addr.function)
2930                         continue;
2931                 /* Slave interface PCI address match found. */
2932                 fclose(file);
2933                 snprintf(tmp_str, sizeof(tmp_str),
2934                          "/sys/class/net/%s/phys_port_name", ifname);
2935                 file = fopen(tmp_str, "rb");
2936                 if (!file)
2937                         break;
2938                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2939                 if (fscanf(file, "%32s", tmp_str) == 1)
2940                         mlx5_translate_port_name(tmp_str, &info);
2941                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2942                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2943                         pf = info.port_name;
2944                 break;
2945         }
2946         if (file)
2947                 fclose(file);
2948         return pf;
2949 }
2950
2951 /**
2952  * DPDK callback to register a PCI device.
2953  *
2954  * This function spawns Ethernet devices out of a given PCI device.
2955  *
2956  * @param[in] pci_drv
2957  *   PCI driver structure (mlx5_driver).
2958  * @param[in] pci_dev
2959  *   PCI device information.
2960  *
2961  * @return
2962  *   0 on success, a negative errno value otherwise and rte_errno is set.
2963  */
2964 static int
2965 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2966                struct rte_pci_device *pci_dev)
2967 {
2968         struct ibv_device **ibv_list;
2969         /*
2970          * Number of found IB Devices matching with requested PCI BDF.
2971          * nd != 1 means there are multiple IB devices over the same
2972          * PCI device and we have representors and master.
2973          */
2974         unsigned int nd = 0;
2975         /*
2976          * Number of found IB device Ports. nd = 1 and np = 1..n means
2977          * we have the single multiport IB device, and there may be
2978          * representors attached to some of found ports.
2979          */
2980         unsigned int np = 0;
2981         /*
2982          * Number of DPDK ethernet devices to Spawn - either over
2983          * multiple IB devices or multiple ports of single IB device.
2984          * Actually this is the number of iterations to spawn.
2985          */
2986         unsigned int ns = 0;
2987         /*
2988          * Bonding device
2989          *   < 0 - no bonding device (single one)
2990          *  >= 0 - bonding device (value is slave PF index)
2991          */
2992         int bd = -1;
2993         struct mlx5_dev_spawn_data *list = NULL;
2994         struct mlx5_dev_config dev_config;
2995         int ret;
2996
2997         if (mlx5_class_get(pci_dev->device.devargs) != MLX5_CLASS_NET) {
2998                 DRV_LOG(DEBUG, "Skip probing - should be probed by other mlx5"
2999                         " driver.");
3000                 return 1;
3001         }
3002         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3003                 mlx5_pmd_socket_init();
3004         ret = mlx5_init_once();
3005         if (ret) {
3006                 DRV_LOG(ERR, "unable to init PMD global data: %s",
3007                         strerror(rte_errno));
3008                 return -rte_errno;
3009         }
3010         assert(pci_drv == &mlx5_driver);
3011         errno = 0;
3012         ibv_list = mlx5_glue->get_device_list(&ret);
3013         if (!ibv_list) {
3014                 rte_errno = errno ? errno : ENOSYS;
3015                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
3016                 return -rte_errno;
3017         }
3018         /*
3019          * First scan the list of all Infiniband devices to find
3020          * matching ones, gathering into the list.
3021          */
3022         struct ibv_device *ibv_match[ret + 1];
3023         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
3024         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
3025         unsigned int i;
3026
3027         while (ret-- > 0) {
3028                 struct rte_pci_addr pci_addr;
3029
3030                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
3031                 bd = mlx5_device_bond_pci_match
3032                                 (ibv_list[ret], pci_dev, nl_rdma);
3033                 if (bd >= 0) {
3034                         /*
3035                          * Bonding device detected. Only one match is allowed,
3036                          * the bonding is supported over multi-port IB device,
3037                          * there should be no matches on representor PCI
3038                          * functions or non VF LAG bonding devices with
3039                          * specified address.
3040                          */
3041                         if (nd) {
3042                                 DRV_LOG(ERR,
3043                                         "multiple PCI match on bonding device"
3044                                         "\"%s\" found", ibv_list[ret]->name);
3045                                 rte_errno = ENOENT;
3046                                 ret = -rte_errno;
3047                                 goto exit;
3048                         }
3049                         DRV_LOG(INFO, "PCI information matches for"
3050                                       " slave %d bonding device \"%s\"",
3051                                       bd, ibv_list[ret]->name);
3052                         ibv_match[nd++] = ibv_list[ret];
3053                         break;
3054                 }
3055                 if (mlx5_dev_to_pci_addr
3056                         (ibv_list[ret]->ibdev_path, &pci_addr))
3057                         continue;
3058                 if (pci_dev->addr.domain != pci_addr.domain ||
3059                     pci_dev->addr.bus != pci_addr.bus ||
3060                     pci_dev->addr.devid != pci_addr.devid ||
3061                     pci_dev->addr.function != pci_addr.function)
3062                         continue;
3063                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
3064                         ibv_list[ret]->name);
3065                 ibv_match[nd++] = ibv_list[ret];
3066         }
3067         ibv_match[nd] = NULL;
3068         if (!nd) {
3069                 /* No device matches, just complain and bail out. */
3070                 DRV_LOG(WARNING,
3071                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
3072                         " are kernel drivers loaded?",
3073                         pci_dev->addr.domain, pci_dev->addr.bus,
3074                         pci_dev->addr.devid, pci_dev->addr.function);
3075                 rte_errno = ENOENT;
3076                 ret = -rte_errno;
3077                 goto exit;
3078         }
3079         if (nd == 1) {
3080                 /*
3081                  * Found single matching device may have multiple ports.
3082                  * Each port may be representor, we have to check the port
3083                  * number and check the representors existence.
3084                  */
3085                 if (nl_rdma >= 0)
3086                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
3087                 if (!np)
3088                         DRV_LOG(WARNING, "can not get IB device \"%s\""
3089                                          " ports number", ibv_match[0]->name);
3090                 if (bd >= 0 && !np) {
3091                         DRV_LOG(ERR, "can not get ports"
3092                                      " for bonding device");
3093                         rte_errno = ENOENT;
3094                         ret = -rte_errno;
3095                         goto exit;
3096                 }
3097         }
3098 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
3099         if (bd >= 0) {
3100                 /*
3101                  * This may happen if there is VF LAG kernel support and
3102                  * application is compiled with older rdma_core library.
3103                  */
3104                 DRV_LOG(ERR,
3105                         "No kernel/verbs support for VF LAG bonding found.");
3106                 rte_errno = ENOTSUP;
3107                 ret = -rte_errno;
3108                 goto exit;
3109         }
3110 #endif
3111         /*
3112          * Now we can determine the maximal
3113          * amount of devices to be spawned.
3114          */
3115         list = rte_zmalloc("device spawn data",
3116                          sizeof(struct mlx5_dev_spawn_data) *
3117                          (np ? np : nd),
3118                          RTE_CACHE_LINE_SIZE);
3119         if (!list) {
3120                 DRV_LOG(ERR, "spawn data array allocation failure");
3121                 rte_errno = ENOMEM;
3122                 ret = -rte_errno;
3123                 goto exit;
3124         }
3125         if (bd >= 0 || np > 1) {
3126                 /*
3127                  * Single IB device with multiple ports found,
3128                  * it may be E-Switch master device and representors.
3129                  * We have to perform identification trough the ports.
3130                  */
3131                 assert(nl_rdma >= 0);
3132                 assert(ns == 0);
3133                 assert(nd == 1);
3134                 assert(np);
3135                 for (i = 1; i <= np; ++i) {
3136                         list[ns].max_port = np;
3137                         list[ns].ibv_port = i;
3138                         list[ns].ibv_dev = ibv_match[0];
3139                         list[ns].eth_dev = NULL;
3140                         list[ns].pci_dev = pci_dev;
3141                         list[ns].pf_bond = bd;
3142                         list[ns].ifindex = mlx5_nl_ifindex
3143                                         (nl_rdma, list[ns].ibv_dev->name, i);
3144                         if (!list[ns].ifindex) {
3145                                 /*
3146                                  * No network interface index found for the
3147                                  * specified port, it means there is no
3148                                  * representor on this port. It's OK,
3149                                  * there can be disabled ports, for example
3150                                  * if sriov_numvfs < sriov_totalvfs.
3151                                  */
3152                                 continue;
3153                         }
3154                         ret = -1;
3155                         if (nl_route >= 0)
3156                                 ret = mlx5_nl_switch_info
3157                                                (nl_route,
3158                                                 list[ns].ifindex,
3159                                                 &list[ns].info);
3160                         if (ret || (!list[ns].info.representor &&
3161                                     !list[ns].info.master)) {
3162                                 /*
3163                                  * We failed to recognize representors with
3164                                  * Netlink, let's try to perform the task
3165                                  * with sysfs.
3166                                  */
3167                                 ret =  mlx5_sysfs_switch_info
3168                                                 (list[ns].ifindex,
3169                                                  &list[ns].info);
3170                         }
3171                         if (!ret && bd >= 0) {
3172                                 switch (list[ns].info.name_type) {
3173                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
3174                                         if (list[ns].info.port_name == bd)
3175                                                 ns++;
3176                                         break;
3177                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
3178                                         if (list[ns].info.pf_num == bd)
3179                                                 ns++;
3180                                         break;
3181                                 default:
3182                                         break;
3183                                 }
3184                                 continue;
3185                         }
3186                         if (!ret && (list[ns].info.representor ^
3187                                      list[ns].info.master))
3188                                 ns++;
3189                 }
3190                 if (!ns) {
3191                         DRV_LOG(ERR,
3192                                 "unable to recognize master/representors"
3193                                 " on the IB device with multiple ports");
3194                         rte_errno = ENOENT;
3195                         ret = -rte_errno;
3196                         goto exit;
3197                 }
3198         } else {
3199                 /*
3200                  * The existence of several matching entries (nd > 1) means
3201                  * port representors have been instantiated. No existing Verbs
3202                  * call nor sysfs entries can tell them apart, this can only
3203                  * be done through Netlink calls assuming kernel drivers are
3204                  * recent enough to support them.
3205                  *
3206                  * In the event of identification failure through Netlink,
3207                  * try again through sysfs, then:
3208                  *
3209                  * 1. A single IB device matches (nd == 1) with single
3210                  *    port (np=0/1) and is not a representor, assume
3211                  *    no switch support.
3212                  *
3213                  * 2. Otherwise no safe assumptions can be made;
3214                  *    complain louder and bail out.
3215                  */
3216                 np = 1;
3217                 for (i = 0; i != nd; ++i) {
3218                         memset(&list[ns].info, 0, sizeof(list[ns].info));
3219                         list[ns].max_port = 1;
3220                         list[ns].ibv_port = 1;
3221                         list[ns].ibv_dev = ibv_match[i];
3222                         list[ns].eth_dev = NULL;
3223                         list[ns].pci_dev = pci_dev;
3224                         list[ns].pf_bond = -1;
3225                         list[ns].ifindex = 0;
3226                         if (nl_rdma >= 0)
3227                                 list[ns].ifindex = mlx5_nl_ifindex
3228                                         (nl_rdma, list[ns].ibv_dev->name, 1);
3229                         if (!list[ns].ifindex) {
3230                                 char ifname[IF_NAMESIZE];
3231
3232                                 /*
3233                                  * Netlink failed, it may happen with old
3234                                  * ib_core kernel driver (before 4.16).
3235                                  * We can assume there is old driver because
3236                                  * here we are processing single ports IB
3237                                  * devices. Let's try sysfs to retrieve
3238                                  * the ifindex. The method works for
3239                                  * master device only.
3240                                  */
3241                                 if (nd > 1) {
3242                                         /*
3243                                          * Multiple devices found, assume
3244                                          * representors, can not distinguish
3245                                          * master/representor and retrieve
3246                                          * ifindex via sysfs.
3247                                          */
3248                                         continue;
3249                                 }
3250                                 ret = mlx5_get_master_ifname
3251                                         (ibv_match[i]->ibdev_path, &ifname);
3252                                 if (!ret)
3253                                         list[ns].ifindex =
3254                                                 if_nametoindex(ifname);
3255                                 if (!list[ns].ifindex) {
3256                                         /*
3257                                          * No network interface index found
3258                                          * for the specified device, it means
3259                                          * there it is neither representor
3260                                          * nor master.
3261                                          */
3262                                         continue;
3263                                 }
3264                         }
3265                         ret = -1;
3266                         if (nl_route >= 0)
3267                                 ret = mlx5_nl_switch_info
3268                                                (nl_route,
3269                                                 list[ns].ifindex,
3270                                                 &list[ns].info);
3271                         if (ret || (!list[ns].info.representor &&
3272                                     !list[ns].info.master)) {
3273                                 /*
3274                                  * We failed to recognize representors with
3275                                  * Netlink, let's try to perform the task
3276                                  * with sysfs.
3277                                  */
3278                                 ret =  mlx5_sysfs_switch_info
3279                                                 (list[ns].ifindex,
3280                                                  &list[ns].info);
3281                         }
3282                         if (!ret && (list[ns].info.representor ^
3283                                      list[ns].info.master)) {
3284                                 ns++;
3285                         } else if ((nd == 1) &&
3286                                    !list[ns].info.representor &&
3287                                    !list[ns].info.master) {
3288                                 /*
3289                                  * Single IB device with
3290                                  * one physical port and
3291                                  * attached network device.
3292                                  * May be SRIOV is not enabled
3293                                  * or there is no representors.
3294                                  */
3295                                 DRV_LOG(INFO, "no E-Switch support detected");
3296                                 ns++;
3297                                 break;
3298                         }
3299                 }
3300                 if (!ns) {
3301                         DRV_LOG(ERR,
3302                                 "unable to recognize master/representors"
3303                                 " on the multiple IB devices");
3304                         rte_errno = ENOENT;
3305                         ret = -rte_errno;
3306                         goto exit;
3307                 }
3308         }
3309         assert(ns);
3310         /*
3311          * Sort list to probe devices in natural order for users convenience
3312          * (i.e. master first, then representors from lowest to highest ID).
3313          */
3314         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3315         /* Default configuration. */
3316         dev_config = (struct mlx5_dev_config){
3317                 .hw_padding = 0,
3318                 .mps = MLX5_ARG_UNSET,
3319                 .dbnc = MLX5_ARG_UNSET,
3320                 .rx_vec_en = 1,
3321                 .txq_inline_max = MLX5_ARG_UNSET,
3322                 .txq_inline_min = MLX5_ARG_UNSET,
3323                 .txq_inline_mpw = MLX5_ARG_UNSET,
3324                 .txqs_inline = MLX5_ARG_UNSET,
3325                 .vf_nl_en = 1,
3326                 .mr_ext_memseg_en = 1,
3327                 .mprq = {
3328                         .enabled = 0, /* Disabled by default. */
3329                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3330                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3331                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3332                 },
3333                 .dv_esw_en = 1,
3334                 .dv_flow_en = 1,
3335         };
3336         /* Device specific configuration. */
3337         switch (pci_dev->id.device_id) {
3338         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3339         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3340         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3341         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3342         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3343         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3344         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3345                 dev_config.vf = 1;
3346                 break;
3347         default:
3348                 break;
3349         }
3350         for (i = 0; i != ns; ++i) {
3351                 uint32_t restore;
3352
3353                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3354                                                  &list[i],
3355                                                  dev_config);
3356                 if (!list[i].eth_dev) {
3357                         if (rte_errno != EBUSY && rte_errno != EEXIST)
3358                                 break;
3359                         /* Device is disabled or already spawned. Ignore it. */
3360                         continue;
3361                 }
3362                 restore = list[i].eth_dev->data->dev_flags;
3363                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3364                 /* Restore non-PCI flags cleared by the above call. */
3365                 list[i].eth_dev->data->dev_flags |= restore;
3366                 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3367                 rte_eth_dev_probing_finish(list[i].eth_dev);
3368         }
3369         if (i != ns) {
3370                 DRV_LOG(ERR,
3371                         "probe of PCI device " PCI_PRI_FMT " aborted after"
3372                         " encountering an error: %s",
3373                         pci_dev->addr.domain, pci_dev->addr.bus,
3374                         pci_dev->addr.devid, pci_dev->addr.function,
3375                         strerror(rte_errno));
3376                 ret = -rte_errno;
3377                 /* Roll back. */
3378                 while (i--) {
3379                         if (!list[i].eth_dev)
3380                                 continue;
3381                         mlx5_dev_close(list[i].eth_dev);
3382                         /* mac_addrs must not be freed because in dev_private */
3383                         list[i].eth_dev->data->mac_addrs = NULL;
3384                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3385                 }
3386                 /* Restore original error. */
3387                 rte_errno = -ret;
3388         } else {
3389                 ret = 0;
3390         }
3391 exit:
3392         /*
3393          * Do the routine cleanup:
3394          * - close opened Netlink sockets
3395          * - free allocated spawn data array
3396          * - free the Infiniband device list
3397          */
3398         if (nl_rdma >= 0)
3399                 close(nl_rdma);
3400         if (nl_route >= 0)
3401                 close(nl_route);
3402         if (list)
3403                 rte_free(list);
3404         assert(ibv_list);
3405         mlx5_glue->free_device_list(ibv_list);
3406         return ret;
3407 }
3408
3409 /**
3410  * Look for the ethernet device belonging to mlx5 driver.
3411  *
3412  * @param[in] port_id
3413  *   port_id to start looking for device.
3414  * @param[in] pci_dev
3415  *   Pointer to the hint PCI device. When device is being probed
3416  *   the its siblings (master and preceding representors might
3417  *   not have assigned driver yet (because the mlx5_pci_probe()
3418  *   is not completed yet, for this case match on hint PCI
3419  *   device may be used to detect sibling device.
3420  *
3421  * @return
3422  *   port_id of found device, RTE_MAX_ETHPORT if not found.
3423  */
3424 uint16_t
3425 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3426 {
3427         while (port_id < RTE_MAX_ETHPORTS) {
3428                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3429
3430                 if (dev->state != RTE_ETH_DEV_UNUSED &&
3431                     dev->device &&
3432                     (dev->device == &pci_dev->device ||
3433                      (dev->device->driver &&
3434                      dev->device->driver->name &&
3435                      !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3436                         break;
3437                 port_id++;
3438         }
3439         if (port_id >= RTE_MAX_ETHPORTS)
3440                 return RTE_MAX_ETHPORTS;
3441         return port_id;
3442 }
3443
3444 /**
3445  * DPDK callback to remove a PCI device.
3446  *
3447  * This function removes all Ethernet devices belong to a given PCI device.
3448  *
3449  * @param[in] pci_dev
3450  *   Pointer to the PCI device.
3451  *
3452  * @return
3453  *   0 on success, the function cannot fail.
3454  */
3455 static int
3456 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3457 {
3458         uint16_t port_id;
3459
3460         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3461                 rte_eth_dev_close(port_id);
3462         return 0;
3463 }
3464
3465 static const struct rte_pci_id mlx5_pci_id_map[] = {
3466         {
3467                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3468                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3469         },
3470         {
3471                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3472                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3473         },
3474         {
3475                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3476                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3477         },
3478         {
3479                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3480                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3481         },
3482         {
3483                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3484                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3485         },
3486         {
3487                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3488                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3489         },
3490         {
3491                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3492                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3493         },
3494         {
3495                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3496                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3497         },
3498         {
3499                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3500                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3501         },
3502         {
3503                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3504                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3505         },
3506         {
3507                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3508                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3509         },
3510         {
3511                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3512                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3513         },
3514         {
3515                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3516                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3517         },
3518         {
3519                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3520                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3521         },
3522         {
3523                 .vendor_id = 0
3524         }
3525 };
3526
3527 static struct rte_pci_driver mlx5_driver = {
3528         .driver = {
3529                 .name = MLX5_DRIVER_NAME
3530         },
3531         .id_table = mlx5_pci_id_map,
3532         .probe = mlx5_pci_probe,
3533         .remove = mlx5_pci_remove,
3534         .dma_map = mlx5_dma_map,
3535         .dma_unmap = mlx5_dma_unmap,
3536         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3537                      RTE_PCI_DRV_PROBE_AGAIN,
3538 };
3539
3540 /**
3541  * Driver initialization routine.
3542  */
3543 RTE_INIT(rte_mlx5_pmd_init)
3544 {
3545         /* Initialize driver log type. */
3546         mlx5_logtype = rte_log_register("pmd.net.mlx5");
3547         if (mlx5_logtype >= 0)
3548                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3549
3550         /* Build the static tables for Verbs conversion. */
3551         mlx5_set_ptype_table();
3552         mlx5_set_cksum_table();
3553         mlx5_set_swp_types_table();
3554         if (mlx5_glue)
3555                 rte_pci_register(&mlx5_driver);
3556 }
3557
3558 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3559 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3560 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");