1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to include 2 dsegs in the title WQEBB.
100 * Deprecated, ignored.
102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
105 * Device parameter to limit the size of inlining packet.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
111 * Device parameter to enable hardware Tx vector.
112 * Deprecated, ignored (no vectorized Tx routines anymore).
114 #define MLX5_TX_VEC_EN "tx_vec_en"
116 /* Device parameter to enable hardware Rx vector. */
117 #define MLX5_RX_VEC_EN "rx_vec_en"
119 /* Allow L3 VXLAN flow creation. */
120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
122 /* Activate DV E-Switch flow steering. */
123 #define MLX5_DV_ESW_EN "dv_esw_en"
125 /* Activate DV flow steering. */
126 #define MLX5_DV_FLOW_EN "dv_flow_en"
128 /* Activate Netlink support in VF mode. */
129 #define MLX5_VF_NL_EN "vf_nl_en"
131 /* Enable extending memsegs when creating a MR. */
132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
134 /* Select port representors to instantiate. */
135 #define MLX5_REPRESENTOR "representor"
137 /* Device parameter to configure the maximum number of dump files per queue. */
138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
140 /* Configure timeout of LRO session (in microseconds). */
141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
143 #ifndef HAVE_IBV_MLX5_MOD_MPW
144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
154 /* Shared memory between primary and secondary processes. */
155 struct mlx5_shared_data *mlx5_shared_data;
157 /* Spinlock for mlx5_shared_data allocation. */
158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
160 /* Process local data for secondary processes. */
161 static struct mlx5_local_data mlx5_local_data;
163 /** Driver-specific log messages type. */
166 /** Data associated with devices to spawn. */
167 struct mlx5_dev_spawn_data {
168 uint32_t ifindex; /**< Network interface index. */
169 uint32_t max_port; /**< IB device maximal port index. */
170 uint32_t ibv_port; /**< IB device physical port index. */
171 int pf_bond; /**< bonding device PF index. < 0 - no bonding */
172 struct mlx5_switch_info info; /**< Switch information. */
173 struct ibv_device *ibv_dev; /**< Associated IB device. */
174 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
175 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
182 * Initialize the counters management structure.
185 * Pointer to mlx5_ibv_shared object to free
188 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
192 TAILQ_INIT(&sh->cmng.flow_counters);
193 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
194 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
198 * Destroy all the resources allocated for a counter memory management.
201 * Pointer to the memory management structure.
204 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
206 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
208 LIST_REMOVE(mng, next);
209 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
210 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
215 * Close and release all the resources of the counters management.
218 * Pointer to mlx5_ibv_shared object to free.
221 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
223 struct mlx5_counter_stats_mem_mng *mng;
230 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
231 if (rte_errno != EINPROGRESS)
235 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
236 struct mlx5_flow_counter_pool *pool;
237 uint32_t batch = !!(i % 2);
239 if (!sh->cmng.ccont[i].pools)
241 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
246 (mlx5_devx_cmd_destroy(pool->min_dcs));
248 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
249 if (pool->counters_raw[j].action)
251 (mlx5_glue->destroy_flow_action
252 (pool->counters_raw[j].action));
253 if (!batch && pool->counters_raw[j].dcs)
254 claim_zero(mlx5_devx_cmd_destroy
255 (pool->counters_raw[j].dcs));
257 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
260 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
262 rte_free(sh->cmng.ccont[i].pools);
264 mng = LIST_FIRST(&sh->cmng.mem_mngs);
266 mlx5_flow_destroy_counter_stat_mem_mng(mng);
267 mng = LIST_FIRST(&sh->cmng.mem_mngs);
269 memset(&sh->cmng, 0, sizeof(sh->cmng));
273 * Extract pdn of PD object using DV API.
276 * Pointer to the verbs PD object.
278 * Pointer to the PD object number variable.
281 * 0 on success, error value otherwise.
283 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
285 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
287 struct mlx5dv_obj obj;
288 struct mlx5dv_pd pd_info;
292 obj.pd.out = &pd_info;
293 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
295 DRV_LOG(DEBUG, "Fail to get PD object info");
301 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
304 * Allocate shared IB device context. If there is multiport device the
305 * master and representors will share this context, if there is single
306 * port dedicated IB device, the context will be used by only given
307 * port due to unification.
309 * Routine first searches the context for the specified IB device name,
310 * if found the shared context assumed and reference counter is incremented.
311 * If no context found the new one is created and initialized with specified
312 * IB device context and parameters.
315 * Pointer to the IB device attributes (name, port, etc).
318 * Pointer to mlx5_ibv_shared object on success,
319 * otherwise NULL and rte_errno is set.
321 static struct mlx5_ibv_shared *
322 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
324 struct mlx5_ibv_shared *sh;
327 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
328 struct mlx5_devx_tis_attr tis_attr = { 0 };
332 /* Secondary process should not create the shared context. */
333 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
334 pthread_mutex_lock(&mlx5_ibv_list_mutex);
335 /* Search for IB context by device name. */
336 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
337 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
342 /* No device found, we have to create new shared context. */
343 assert(spawn->max_port);
344 sh = rte_zmalloc("ethdev shared ib context",
345 sizeof(struct mlx5_ibv_shared) +
347 sizeof(struct mlx5_ibv_shared_port),
348 RTE_CACHE_LINE_SIZE);
350 DRV_LOG(ERR, "shared context allocation failure");
354 /* Try to open IB device with DV first, then usual Verbs. */
356 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
359 DRV_LOG(DEBUG, "DevX is supported");
361 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
363 err = errno ? errno : ENODEV;
366 DRV_LOG(DEBUG, "DevX is NOT supported");
368 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
370 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
374 sh->max_port = spawn->max_port;
375 strncpy(sh->ibdev_name, sh->ctx->device->name,
376 sizeof(sh->ibdev_name));
377 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
378 sizeof(sh->ibdev_path));
379 pthread_mutex_init(&sh->intr_mutex, NULL);
381 * Setting port_id to max unallowed value means
382 * there is no interrupt subhandler installed for
383 * the given port index i.
385 for (i = 0; i < sh->max_port; i++) {
386 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
387 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
389 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
390 if (sh->pd == NULL) {
391 DRV_LOG(ERR, "PD allocation failure");
395 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
397 err = mlx5_get_pdn(sh->pd, &sh->pdn);
399 DRV_LOG(ERR, "Fail to extract pdn from PD");
402 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
404 DRV_LOG(ERR, "TD allocation failure");
408 tis_attr.transport_domain = sh->td->id;
409 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
411 DRV_LOG(ERR, "TIS allocation failure");
416 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
418 * Once the device is added to the list of memory event
419 * callback, its global MR cache table cannot be expanded
420 * on the fly because of deadlock. If it overflows, lookup
421 * should be done by searching MR list linearly, which is slow.
423 * At this point the device is not added to the memory
424 * event list yet, context is just being created.
426 err = mlx5_mr_btree_init(&sh->mr.cache,
427 MLX5_MR_BTREE_CACHE_N * 2,
428 spawn->pci_dev->device.numa_node);
433 mlx5_flow_counters_mng_init(sh);
434 /* Add device to memory callback list. */
435 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
436 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
438 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
439 /* Add context to the global device list. */
440 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
442 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
445 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
448 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
450 claim_zero(mlx5_devx_cmd_destroy(sh->td));
452 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
454 claim_zero(mlx5_glue->close_device(sh->ctx));
462 * Free shared IB device context. Decrement counter and if zero free
463 * all allocated resources and close handles.
466 * Pointer to mlx5_ibv_shared object to free
469 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
471 pthread_mutex_lock(&mlx5_ibv_list_mutex);
473 /* Check the object presence in the list. */
474 struct mlx5_ibv_shared *lctx;
476 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
481 DRV_LOG(ERR, "Freeing non-existing shared IB context");
487 /* Secondary process should not free the shared context. */
488 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
491 /* Release created Memory Regions. */
493 /* Remove from memory callback device list. */
494 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
495 LIST_REMOVE(sh, mem_event_cb);
496 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
497 /* Remove context from the global device list. */
498 LIST_REMOVE(sh, next);
500 * Ensure there is no async event handler installed.
501 * Only primary process handles async device events.
503 mlx5_flow_counters_mng_close(sh);
504 assert(!sh->intr_cnt);
506 mlx5_intr_callback_unregister
507 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
508 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
509 if (sh->devx_intr_cnt) {
510 if (sh->intr_handle_devx.fd)
511 rte_intr_callback_unregister(&sh->intr_handle_devx,
512 mlx5_dev_interrupt_handler_devx, sh);
514 mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
517 pthread_mutex_destroy(&sh->intr_mutex);
519 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
521 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
523 claim_zero(mlx5_devx_cmd_destroy(sh->td));
525 claim_zero(mlx5_glue->close_device(sh->ctx));
528 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
532 * Initialize DR related data within private structure.
533 * Routine checks the reference counter and does actual
534 * resources creation/initialization only if counter is zero.
537 * Pointer to the private device data structure.
540 * Zero on success, positive error code otherwise.
543 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
545 #ifdef HAVE_MLX5DV_DR
546 struct mlx5_ibv_shared *sh = priv->sh;
552 /* Shared DV/DR structures is already initialized. */
557 /* Reference counter is zero, we should initialize structures. */
558 domain = mlx5_glue->dr_create_domain(sh->ctx,
559 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
561 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
565 sh->rx_domain = domain;
566 domain = mlx5_glue->dr_create_domain(sh->ctx,
567 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
569 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
573 pthread_mutex_init(&sh->dv_mutex, NULL);
574 sh->tx_domain = domain;
575 #ifdef HAVE_MLX5DV_DR_ESWITCH
576 if (priv->config.dv_esw_en) {
577 domain = mlx5_glue->dr_create_domain
578 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
580 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
584 sh->fdb_domain = domain;
585 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
588 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
594 /* Rollback the created objects. */
596 mlx5_glue->dr_destroy_domain(sh->rx_domain);
597 sh->rx_domain = NULL;
600 mlx5_glue->dr_destroy_domain(sh->tx_domain);
601 sh->tx_domain = NULL;
603 if (sh->fdb_domain) {
604 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
605 sh->fdb_domain = NULL;
607 if (sh->esw_drop_action) {
608 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
609 sh->esw_drop_action = NULL;
611 if (sh->pop_vlan_action) {
612 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
613 sh->pop_vlan_action = NULL;
623 * Destroy DR related data within private structure.
626 * Pointer to the private device data structure.
629 mlx5_free_shared_dr(struct mlx5_priv *priv)
631 #ifdef HAVE_MLX5DV_DR
632 struct mlx5_ibv_shared *sh;
634 if (!priv->dr_shared)
639 assert(sh->dv_refcnt);
640 if (sh->dv_refcnt && --sh->dv_refcnt)
643 mlx5_glue->dr_destroy_domain(sh->rx_domain);
644 sh->rx_domain = NULL;
647 mlx5_glue->dr_destroy_domain(sh->tx_domain);
648 sh->tx_domain = NULL;
650 #ifdef HAVE_MLX5DV_DR_ESWITCH
651 if (sh->fdb_domain) {
652 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
653 sh->fdb_domain = NULL;
655 if (sh->esw_drop_action) {
656 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
657 sh->esw_drop_action = NULL;
660 if (sh->pop_vlan_action) {
661 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
662 sh->pop_vlan_action = NULL;
664 pthread_mutex_destroy(&sh->dv_mutex);
671 * Initialize shared data between primary and secondary process.
673 * A memzone is reserved by primary process and secondary processes attach to
677 * 0 on success, a negative errno value otherwise and rte_errno is set.
680 mlx5_init_shared_data(void)
682 const struct rte_memzone *mz;
685 rte_spinlock_lock(&mlx5_shared_data_lock);
686 if (mlx5_shared_data == NULL) {
687 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
688 /* Allocate shared memory. */
689 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
690 sizeof(*mlx5_shared_data),
694 "Cannot allocate mlx5 shared data\n");
698 mlx5_shared_data = mz->addr;
699 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
700 rte_spinlock_init(&mlx5_shared_data->lock);
702 /* Lookup allocated shared memory. */
703 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
706 "Cannot attach mlx5 shared data\n");
710 mlx5_shared_data = mz->addr;
711 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
715 rte_spinlock_unlock(&mlx5_shared_data_lock);
720 * Retrieve integer value from environment variable.
723 * Environment variable name.
726 * Integer value, 0 if the variable is not set.
729 mlx5_getenv_int(const char *name)
731 const char *val = getenv(name);
739 * Verbs callback to allocate a memory. This function should allocate the space
740 * according to the size provided residing inside a huge page.
741 * Please note that all allocation must respect the alignment from libmlx5
742 * (i.e. currently sysconf(_SC_PAGESIZE)).
745 * The size in bytes of the memory to allocate.
747 * A pointer to the callback data.
750 * Allocated buffer, NULL otherwise and rte_errno is set.
753 mlx5_alloc_verbs_buf(size_t size, void *data)
755 struct mlx5_priv *priv = data;
757 size_t alignment = sysconf(_SC_PAGESIZE);
758 unsigned int socket = SOCKET_ID_ANY;
760 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
761 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
763 socket = ctrl->socket;
764 } else if (priv->verbs_alloc_ctx.type ==
765 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
766 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
768 socket = ctrl->socket;
770 assert(data != NULL);
771 ret = rte_malloc_socket(__func__, size, alignment, socket);
778 * Verbs callback to free a memory.
781 * A pointer to the memory to free.
783 * A pointer to the callback data.
786 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
788 assert(data != NULL);
793 * DPDK callback to add udp tunnel port
796 * A pointer to eth_dev
797 * @param[in] udp_tunnel
798 * A pointer to udp tunnel
801 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
804 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
805 struct rte_eth_udp_tunnel *udp_tunnel)
807 assert(udp_tunnel != NULL);
808 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
809 udp_tunnel->udp_port == 4789)
811 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
812 udp_tunnel->udp_port == 4790)
818 * Initialize process private data structure.
821 * Pointer to Ethernet device structure.
824 * 0 on success, a negative errno value otherwise and rte_errno is set.
827 mlx5_proc_priv_init(struct rte_eth_dev *dev)
829 struct mlx5_priv *priv = dev->data->dev_private;
830 struct mlx5_proc_priv *ppriv;
834 * UAR register table follows the process private structure. BlueFlame
835 * registers for Tx queues are stored in the table.
838 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
839 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
840 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
845 ppriv->uar_table_sz = ppriv_size;
846 dev->process_private = ppriv;
851 * Un-initialize process private data structure.
854 * Pointer to Ethernet device structure.
857 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
859 if (!dev->process_private)
861 rte_free(dev->process_private);
862 dev->process_private = NULL;
866 * DPDK callback to close the device.
868 * Destroy all queues and objects, free memory.
871 * Pointer to Ethernet device structure.
874 mlx5_dev_close(struct rte_eth_dev *dev)
876 struct mlx5_priv *priv = dev->data->dev_private;
880 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
882 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
883 /* In case mlx5_dev_stop() has not been called. */
884 mlx5_dev_interrupt_handler_uninstall(dev);
885 mlx5_dev_interrupt_handler_devx_uninstall(dev);
886 mlx5_traffic_disable(dev);
887 mlx5_flow_flush(dev, NULL);
888 /* Prevent crashes when queues are still in use. */
889 dev->rx_pkt_burst = removed_rx_burst;
890 dev->tx_pkt_burst = removed_tx_burst;
892 /* Disable datapath on secondary process. */
893 mlx5_mp_req_stop_rxtx(dev);
894 if (priv->rxqs != NULL) {
895 /* XXX race condition if mlx5_rx_burst() is still running. */
897 for (i = 0; (i != priv->rxqs_n); ++i)
898 mlx5_rxq_release(dev, i);
902 if (priv->txqs != NULL) {
903 /* XXX race condition if mlx5_tx_burst() is still running. */
905 for (i = 0; (i != priv->txqs_n); ++i)
906 mlx5_txq_release(dev, i);
910 mlx5_proc_priv_uninit(dev);
911 mlx5_mprq_free_mp(dev);
912 mlx5_free_shared_dr(priv);
913 if (priv->rss_conf.rss_key != NULL)
914 rte_free(priv->rss_conf.rss_key);
915 if (priv->reta_idx != NULL)
916 rte_free(priv->reta_idx);
918 mlx5_nl_mac_addr_flush(dev);
919 if (priv->nl_socket_route >= 0)
920 close(priv->nl_socket_route);
921 if (priv->nl_socket_rdma >= 0)
922 close(priv->nl_socket_rdma);
923 if (priv->vmwa_context)
924 mlx5_vlan_vmwa_exit(priv->vmwa_context);
927 * Free the shared context in last turn, because the cleanup
928 * routines above may use some shared fields, like
929 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
930 * ifindex if Netlink fails.
932 mlx5_free_shared_ibctx(priv->sh);
935 ret = mlx5_hrxq_verify(dev);
937 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
939 ret = mlx5_ind_table_obj_verify(dev);
941 DRV_LOG(WARNING, "port %u some indirection table still remain",
943 ret = mlx5_rxq_obj_verify(dev);
945 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
947 ret = mlx5_rxq_verify(dev);
949 DRV_LOG(WARNING, "port %u some Rx queues still remain",
951 ret = mlx5_txq_obj_verify(dev);
953 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
955 ret = mlx5_txq_verify(dev);
957 DRV_LOG(WARNING, "port %u some Tx queues still remain",
959 ret = mlx5_flow_verify(dev);
961 DRV_LOG(WARNING, "port %u some flows still remain",
963 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
967 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
968 struct mlx5_priv *opriv =
969 rte_eth_devices[port_id].data->dev_private;
972 opriv->domain_id != priv->domain_id ||
973 &rte_eth_devices[port_id] == dev)
979 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
981 memset(priv, 0, sizeof(*priv));
982 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
984 * Reset mac_addrs to NULL such that it is not freed as part of
985 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
986 * it is freed when dev_private is freed.
988 dev->data->mac_addrs = NULL;
991 const struct eth_dev_ops mlx5_dev_ops = {
992 .dev_configure = mlx5_dev_configure,
993 .dev_start = mlx5_dev_start,
994 .dev_stop = mlx5_dev_stop,
995 .dev_set_link_down = mlx5_set_link_down,
996 .dev_set_link_up = mlx5_set_link_up,
997 .dev_close = mlx5_dev_close,
998 .promiscuous_enable = mlx5_promiscuous_enable,
999 .promiscuous_disable = mlx5_promiscuous_disable,
1000 .allmulticast_enable = mlx5_allmulticast_enable,
1001 .allmulticast_disable = mlx5_allmulticast_disable,
1002 .link_update = mlx5_link_update,
1003 .stats_get = mlx5_stats_get,
1004 .stats_reset = mlx5_stats_reset,
1005 .xstats_get = mlx5_xstats_get,
1006 .xstats_reset = mlx5_xstats_reset,
1007 .xstats_get_names = mlx5_xstats_get_names,
1008 .fw_version_get = mlx5_fw_version_get,
1009 .dev_infos_get = mlx5_dev_infos_get,
1010 .read_clock = mlx5_read_clock,
1011 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1012 .vlan_filter_set = mlx5_vlan_filter_set,
1013 .rx_queue_setup = mlx5_rx_queue_setup,
1014 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1015 .tx_queue_setup = mlx5_tx_queue_setup,
1016 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1017 .rx_queue_release = mlx5_rx_queue_release,
1018 .tx_queue_release = mlx5_tx_queue_release,
1019 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1020 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1021 .mac_addr_remove = mlx5_mac_addr_remove,
1022 .mac_addr_add = mlx5_mac_addr_add,
1023 .mac_addr_set = mlx5_mac_addr_set,
1024 .set_mc_addr_list = mlx5_set_mc_addr_list,
1025 .mtu_set = mlx5_dev_set_mtu,
1026 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1027 .vlan_offload_set = mlx5_vlan_offload_set,
1028 .reta_update = mlx5_dev_rss_reta_update,
1029 .reta_query = mlx5_dev_rss_reta_query,
1030 .rss_hash_update = mlx5_rss_hash_update,
1031 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1032 .filter_ctrl = mlx5_dev_filter_ctrl,
1033 .rx_descriptor_status = mlx5_rx_descriptor_status,
1034 .tx_descriptor_status = mlx5_tx_descriptor_status,
1035 .rx_queue_count = mlx5_rx_queue_count,
1036 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1037 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1038 .is_removed = mlx5_is_removed,
1039 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
1040 .get_module_info = mlx5_get_module_info,
1041 .get_module_eeprom = mlx5_get_module_eeprom,
1042 .hairpin_cap_get = mlx5_hairpin_cap_get,
1045 /* Available operations from secondary process. */
1046 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1047 .stats_get = mlx5_stats_get,
1048 .stats_reset = mlx5_stats_reset,
1049 .xstats_get = mlx5_xstats_get,
1050 .xstats_reset = mlx5_xstats_reset,
1051 .xstats_get_names = mlx5_xstats_get_names,
1052 .fw_version_get = mlx5_fw_version_get,
1053 .dev_infos_get = mlx5_dev_infos_get,
1054 .rx_descriptor_status = mlx5_rx_descriptor_status,
1055 .tx_descriptor_status = mlx5_tx_descriptor_status,
1056 .get_module_info = mlx5_get_module_info,
1057 .get_module_eeprom = mlx5_get_module_eeprom,
1060 /* Available operations in flow isolated mode. */
1061 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1062 .dev_configure = mlx5_dev_configure,
1063 .dev_start = mlx5_dev_start,
1064 .dev_stop = mlx5_dev_stop,
1065 .dev_set_link_down = mlx5_set_link_down,
1066 .dev_set_link_up = mlx5_set_link_up,
1067 .dev_close = mlx5_dev_close,
1068 .promiscuous_enable = mlx5_promiscuous_enable,
1069 .promiscuous_disable = mlx5_promiscuous_disable,
1070 .allmulticast_enable = mlx5_allmulticast_enable,
1071 .allmulticast_disable = mlx5_allmulticast_disable,
1072 .link_update = mlx5_link_update,
1073 .stats_get = mlx5_stats_get,
1074 .stats_reset = mlx5_stats_reset,
1075 .xstats_get = mlx5_xstats_get,
1076 .xstats_reset = mlx5_xstats_reset,
1077 .xstats_get_names = mlx5_xstats_get_names,
1078 .fw_version_get = mlx5_fw_version_get,
1079 .dev_infos_get = mlx5_dev_infos_get,
1080 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1081 .vlan_filter_set = mlx5_vlan_filter_set,
1082 .rx_queue_setup = mlx5_rx_queue_setup,
1083 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1084 .tx_queue_setup = mlx5_tx_queue_setup,
1085 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1086 .rx_queue_release = mlx5_rx_queue_release,
1087 .tx_queue_release = mlx5_tx_queue_release,
1088 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1089 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1090 .mac_addr_remove = mlx5_mac_addr_remove,
1091 .mac_addr_add = mlx5_mac_addr_add,
1092 .mac_addr_set = mlx5_mac_addr_set,
1093 .set_mc_addr_list = mlx5_set_mc_addr_list,
1094 .mtu_set = mlx5_dev_set_mtu,
1095 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1096 .vlan_offload_set = mlx5_vlan_offload_set,
1097 .filter_ctrl = mlx5_dev_filter_ctrl,
1098 .rx_descriptor_status = mlx5_rx_descriptor_status,
1099 .tx_descriptor_status = mlx5_tx_descriptor_status,
1100 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1101 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1102 .is_removed = mlx5_is_removed,
1103 .get_module_info = mlx5_get_module_info,
1104 .get_module_eeprom = mlx5_get_module_eeprom,
1105 .hairpin_cap_get = mlx5_hairpin_cap_get,
1109 * Verify and store value for device argument.
1112 * Key argument to verify.
1114 * Value associated with key.
1119 * 0 on success, a negative errno value otherwise and rte_errno is set.
1122 mlx5_args_check(const char *key, const char *val, void *opaque)
1124 struct mlx5_dev_config *config = opaque;
1127 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1128 if (!strcmp(MLX5_REPRESENTOR, key))
1131 tmp = strtoul(val, NULL, 0);
1134 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1137 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1138 config->cqe_comp = !!tmp;
1139 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1140 config->cqe_pad = !!tmp;
1141 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1142 config->hw_padding = !!tmp;
1143 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1144 config->mprq.enabled = !!tmp;
1145 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1146 config->mprq.stride_num_n = tmp;
1147 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1148 config->mprq.max_memcpy_len = tmp;
1149 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1150 config->mprq.min_rxqs_num = tmp;
1151 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1152 DRV_LOG(WARNING, "%s: deprecated parameter,"
1153 " converted to txq_inline_max", key);
1154 config->txq_inline_max = tmp;
1155 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1156 config->txq_inline_max = tmp;
1157 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1158 config->txq_inline_min = tmp;
1159 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1160 config->txq_inline_mpw = tmp;
1161 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1162 config->txqs_inline = tmp;
1163 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1164 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1165 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1166 config->mps = !!tmp;
1167 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1168 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1169 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1170 DRV_LOG(WARNING, "%s: deprecated parameter,"
1171 " converted to txq_inline_mpw", key);
1172 config->txq_inline_mpw = tmp;
1173 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1174 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1175 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1176 config->rx_vec_en = !!tmp;
1177 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1178 config->l3_vxlan_en = !!tmp;
1179 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1180 config->vf_nl_en = !!tmp;
1181 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1182 config->dv_esw_en = !!tmp;
1183 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1184 config->dv_flow_en = !!tmp;
1185 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1186 config->mr_ext_memseg_en = !!tmp;
1187 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1188 config->max_dump_files_num = tmp;
1189 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1190 config->lro.timeout = tmp;
1192 DRV_LOG(WARNING, "%s: unknown parameter", key);
1200 * Parse device parameters.
1203 * Pointer to device configuration structure.
1205 * Device arguments structure.
1208 * 0 on success, a negative errno value otherwise and rte_errno is set.
1211 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1213 const char **params = (const char *[]){
1214 MLX5_RXQ_CQE_COMP_EN,
1215 MLX5_RXQ_CQE_PAD_EN,
1216 MLX5_RXQ_PKT_PAD_EN,
1218 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1219 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1222 MLX5_TXQ_INLINE_MIN,
1223 MLX5_TXQ_INLINE_MAX,
1224 MLX5_TXQ_INLINE_MPW,
1225 MLX5_TXQS_MIN_INLINE,
1228 MLX5_TXQ_MPW_HDR_DSEG_EN,
1229 MLX5_TXQ_MAX_INLINE_LEN,
1236 MLX5_MR_EXT_MEMSEG_EN,
1238 MLX5_MAX_DUMP_FILES_NUM,
1239 MLX5_LRO_TIMEOUT_USEC,
1242 struct rte_kvargs *kvlist;
1246 if (devargs == NULL)
1248 /* Following UGLY cast is done to pass checkpatch. */
1249 kvlist = rte_kvargs_parse(devargs->args, params);
1250 if (kvlist == NULL) {
1254 /* Process parameters. */
1255 for (i = 0; (params[i] != NULL); ++i) {
1256 if (rte_kvargs_count(kvlist, params[i])) {
1257 ret = rte_kvargs_process(kvlist, params[i],
1258 mlx5_args_check, config);
1261 rte_kvargs_free(kvlist);
1266 rte_kvargs_free(kvlist);
1270 static struct rte_pci_driver mlx5_driver;
1273 * PMD global initialization.
1275 * Independent from individual device, this function initializes global
1276 * per-PMD data structures distinguishing primary and secondary processes.
1277 * Hence, each initialization is called once per a process.
1280 * 0 on success, a negative errno value otherwise and rte_errno is set.
1283 mlx5_init_once(void)
1285 struct mlx5_shared_data *sd;
1286 struct mlx5_local_data *ld = &mlx5_local_data;
1289 if (mlx5_init_shared_data())
1291 sd = mlx5_shared_data;
1293 rte_spinlock_lock(&sd->lock);
1294 switch (rte_eal_process_type()) {
1295 case RTE_PROC_PRIMARY:
1298 LIST_INIT(&sd->mem_event_cb_list);
1299 rte_rwlock_init(&sd->mem_event_rwlock);
1300 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1301 mlx5_mr_mem_event_cb, NULL);
1302 ret = mlx5_mp_init_primary();
1305 sd->init_done = true;
1307 case RTE_PROC_SECONDARY:
1310 ret = mlx5_mp_init_secondary();
1313 ++sd->secondary_cnt;
1314 ld->init_done = true;
1320 rte_spinlock_unlock(&sd->lock);
1325 * Configures the minimal amount of data to inline into WQE
1326 * while sending packets.
1328 * - the txq_inline_min has the maximal priority, if this
1329 * key is specified in devargs
1330 * - if DevX is enabled the inline mode is queried from the
1331 * device (HCA attributes and NIC vport context if needed).
1332 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1333 * and none (0 bytes) for other NICs
1336 * Verbs device parameters (name, port, switch_info) to spawn.
1338 * Device configuration parameters.
1341 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1342 struct mlx5_dev_config *config)
1344 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1345 /* Application defines size of inlined data explicitly. */
1346 switch (spawn->pci_dev->id.device_id) {
1347 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1348 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1349 if (config->txq_inline_min <
1350 (int)MLX5_INLINE_HSIZE_L2) {
1352 "txq_inline_mix aligned to minimal"
1353 " ConnectX-4 required value %d",
1354 (int)MLX5_INLINE_HSIZE_L2);
1355 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1361 if (config->hca_attr.eth_net_offloads) {
1362 /* We have DevX enabled, inline mode queried successfully. */
1363 switch (config->hca_attr.wqe_inline_mode) {
1364 case MLX5_CAP_INLINE_MODE_L2:
1365 /* outer L2 header must be inlined. */
1366 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1368 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1369 /* No inline data are required by NIC. */
1370 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1371 config->hw_vlan_insert =
1372 config->hca_attr.wqe_vlan_insert;
1373 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1375 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1376 /* inline mode is defined by NIC vport context. */
1377 if (!config->hca_attr.eth_virt)
1379 switch (config->hca_attr.vport_inline_mode) {
1380 case MLX5_INLINE_MODE_NONE:
1381 config->txq_inline_min =
1382 MLX5_INLINE_HSIZE_NONE;
1384 case MLX5_INLINE_MODE_L2:
1385 config->txq_inline_min =
1386 MLX5_INLINE_HSIZE_L2;
1388 case MLX5_INLINE_MODE_IP:
1389 config->txq_inline_min =
1390 MLX5_INLINE_HSIZE_L3;
1392 case MLX5_INLINE_MODE_TCP_UDP:
1393 config->txq_inline_min =
1394 MLX5_INLINE_HSIZE_L4;
1396 case MLX5_INLINE_MODE_INNER_L2:
1397 config->txq_inline_min =
1398 MLX5_INLINE_HSIZE_INNER_L2;
1400 case MLX5_INLINE_MODE_INNER_IP:
1401 config->txq_inline_min =
1402 MLX5_INLINE_HSIZE_INNER_L3;
1404 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1405 config->txq_inline_min =
1406 MLX5_INLINE_HSIZE_INNER_L4;
1412 * We get here if we are unable to deduce
1413 * inline data size with DevX. Try PCI ID
1414 * to determine old NICs.
1416 switch (spawn->pci_dev->id.device_id) {
1417 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1418 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1419 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1420 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1421 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1422 config->hw_vlan_insert = 0;
1424 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1425 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1426 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1427 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1429 * These NICs support VLAN insertion from WQE and
1430 * report the wqe_vlan_insert flag. But there is the bug
1431 * and PFC control may be broken, so disable feature.
1433 config->hw_vlan_insert = 0;
1434 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1437 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1441 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1445 * Allocate page of door-bells and register it using DevX API.
1448 * Pointer to Ethernet device.
1451 * Pointer to new page on success, NULL otherwise.
1453 static struct mlx5_devx_dbr_page *
1454 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1456 struct mlx5_priv *priv = dev->data->dev_private;
1457 struct mlx5_devx_dbr_page *page;
1459 /* Allocate space for door-bell page and management data. */
1460 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1461 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1463 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1464 dev->data->port_id);
1467 /* Register allocated memory. */
1468 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1469 MLX5_DBR_PAGE_SIZE, 0);
1471 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1472 dev->data->port_id);
1480 * Find the next available door-bell, allocate new page if needed.
1483 * Pointer to Ethernet device.
1484 * @param [out] dbr_page
1485 * Door-bell page containing the page data.
1488 * Door-bell address offset on success, a negative error value otherwise.
1491 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1493 struct mlx5_priv *priv = dev->data->dev_private;
1494 struct mlx5_devx_dbr_page *page = NULL;
1497 LIST_FOREACH(page, &priv->dbrpgs, next)
1498 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1500 if (!page) { /* No page with free door-bell exists. */
1501 page = mlx5_alloc_dbr_page(dev);
1502 if (!page) /* Failed to allocate new page. */
1504 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1506 /* Loop to find bitmap part with clear bit. */
1508 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1511 /* Find the first clear bit. */
1512 j = rte_bsf64(~page->dbr_bitmap[i]);
1513 assert(i < (MLX5_DBR_PER_PAGE / 64));
1514 page->dbr_bitmap[i] |= (1 << j);
1517 return (((i * 64) + j) * sizeof(uint64_t));
1521 * Release a door-bell record.
1524 * Pointer to Ethernet device.
1525 * @param [in] umem_id
1526 * UMEM ID of page containing the door-bell record to release.
1527 * @param [in] offset
1528 * Offset of door-bell record in page.
1531 * 0 on success, a negative error value otherwise.
1534 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1536 struct mlx5_priv *priv = dev->data->dev_private;
1537 struct mlx5_devx_dbr_page *page = NULL;
1540 LIST_FOREACH(page, &priv->dbrpgs, next)
1541 /* Find the page this address belongs to. */
1542 if (page->umem->umem_id == umem_id)
1547 if (!page->dbr_count) {
1548 /* Page not used, free it and remove from list. */
1549 LIST_REMOVE(page, next);
1551 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1554 /* Mark in bitmap that this door-bell is not in use. */
1555 offset /= MLX5_DBR_SIZE;
1556 int i = offset / 64;
1557 int j = offset % 64;
1559 page->dbr_bitmap[i] &= ~(1 << j);
1565 * Check sibling device configurations.
1567 * Sibling devices sharing the Infiniband device context
1568 * should have compatible configurations. This regards
1569 * representors and bonding slaves.
1572 * Private device descriptor.
1574 * Configuration of the device is going to be created.
1577 * 0 on success, EINVAL otherwise
1580 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1581 struct mlx5_dev_config *config)
1583 struct mlx5_ibv_shared *sh = priv->sh;
1584 struct mlx5_dev_config *sh_conf = NULL;
1588 /* Nothing to compare for the single/first device. */
1589 if (sh->refcnt == 1)
1591 /* Find the device with shared context. */
1592 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1593 struct mlx5_priv *opriv =
1594 rte_eth_devices[port_id].data->dev_private;
1596 if (opriv && opriv != priv && opriv->sh == sh) {
1597 sh_conf = &opriv->config;
1603 if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1604 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1605 " for shared %s context", sh->ibdev_name);
1612 * Spawn an Ethernet device from Verbs information.
1615 * Backing DPDK device.
1617 * Verbs device parameters (name, port, switch_info) to spawn.
1619 * Device configuration parameters.
1622 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1623 * is set. The following errors are defined:
1625 * EBUSY: device is not supposed to be spawned.
1626 * EEXIST: device is already spawned
1628 static struct rte_eth_dev *
1629 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1630 struct mlx5_dev_spawn_data *spawn,
1631 struct mlx5_dev_config config)
1633 const struct mlx5_switch_info *switch_info = &spawn->info;
1634 struct mlx5_ibv_shared *sh = NULL;
1635 struct ibv_port_attr port_attr;
1636 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1637 struct rte_eth_dev *eth_dev = NULL;
1638 struct mlx5_priv *priv = NULL;
1640 unsigned int hw_padding = 0;
1642 unsigned int cqe_comp;
1643 unsigned int cqe_pad = 0;
1644 unsigned int tunnel_en = 0;
1645 unsigned int mpls_en = 0;
1646 unsigned int swp = 0;
1647 unsigned int mprq = 0;
1648 unsigned int mprq_min_stride_size_n = 0;
1649 unsigned int mprq_max_stride_size_n = 0;
1650 unsigned int mprq_min_stride_num_n = 0;
1651 unsigned int mprq_max_stride_num_n = 0;
1652 struct rte_ether_addr mac;
1653 char name[RTE_ETH_NAME_MAX_LEN];
1654 int own_domain_id = 0;
1657 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1658 struct mlx5dv_devx_port devx_port;
1661 /* Determine if this port representor is supposed to be spawned. */
1662 if (switch_info->representor && dpdk_dev->devargs) {
1663 struct rte_eth_devargs eth_da;
1665 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1668 DRV_LOG(ERR, "failed to process device arguments: %s",
1669 strerror(rte_errno));
1672 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1673 if (eth_da.representor_ports[i] ==
1674 (uint16_t)switch_info->port_name)
1676 if (i == eth_da.nb_representor_ports) {
1681 /* Build device name. */
1682 if (spawn->pf_bond < 0) {
1683 /* Single device. */
1684 if (!switch_info->representor)
1685 strlcpy(name, dpdk_dev->name, sizeof(name));
1687 snprintf(name, sizeof(name), "%s_representor_%u",
1688 dpdk_dev->name, switch_info->port_name);
1690 /* Bonding device. */
1691 if (!switch_info->representor)
1692 snprintf(name, sizeof(name), "%s_%s",
1693 dpdk_dev->name, spawn->ibv_dev->name);
1695 snprintf(name, sizeof(name), "%s_%s_representor_%u",
1696 dpdk_dev->name, spawn->ibv_dev->name,
1697 switch_info->port_name);
1699 /* check if the device is already spawned */
1700 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1704 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1705 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1706 eth_dev = rte_eth_dev_attach_secondary(name);
1707 if (eth_dev == NULL) {
1708 DRV_LOG(ERR, "can not attach rte ethdev");
1712 eth_dev->device = dpdk_dev;
1713 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1714 err = mlx5_proc_priv_init(eth_dev);
1717 /* Receive command fd from primary process */
1718 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1721 /* Remap UAR for Tx queues. */
1722 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1726 * Ethdev pointer is still required as input since
1727 * the primary device is not accessible from the
1728 * secondary process.
1730 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1731 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1734 sh = mlx5_alloc_shared_ibctx(spawn);
1737 config.devx = sh->devx;
1738 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1739 config.dest_tir = 1;
1741 #ifdef HAVE_IBV_MLX5_MOD_SWP
1742 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1745 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1746 * as all ConnectX-5 devices.
1748 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1749 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1751 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1752 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1754 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1755 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1756 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1757 DRV_LOG(DEBUG, "enhanced MPW is supported");
1758 mps = MLX5_MPW_ENHANCED;
1760 DRV_LOG(DEBUG, "MPW is supported");
1764 DRV_LOG(DEBUG, "MPW isn't supported");
1765 mps = MLX5_MPW_DISABLED;
1767 #ifdef HAVE_IBV_MLX5_MOD_SWP
1768 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1769 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1770 DRV_LOG(DEBUG, "SWP support: %u", swp);
1773 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1774 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1775 struct mlx5dv_striding_rq_caps mprq_caps =
1776 dv_attr.striding_rq_caps;
1778 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1779 mprq_caps.min_single_stride_log_num_of_bytes);
1780 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1781 mprq_caps.max_single_stride_log_num_of_bytes);
1782 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1783 mprq_caps.min_single_wqe_log_num_of_strides);
1784 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1785 mprq_caps.max_single_wqe_log_num_of_strides);
1786 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1787 mprq_caps.supported_qpts);
1788 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1790 mprq_min_stride_size_n =
1791 mprq_caps.min_single_stride_log_num_of_bytes;
1792 mprq_max_stride_size_n =
1793 mprq_caps.max_single_stride_log_num_of_bytes;
1794 mprq_min_stride_num_n =
1795 mprq_caps.min_single_wqe_log_num_of_strides;
1796 mprq_max_stride_num_n =
1797 mprq_caps.max_single_wqe_log_num_of_strides;
1798 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1799 mprq_min_stride_num_n);
1802 if (RTE_CACHE_LINE_SIZE == 128 &&
1803 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1807 config.cqe_comp = cqe_comp;
1808 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1809 /* Whether device supports 128B Rx CQE padding. */
1810 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1811 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1813 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1814 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1815 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1816 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1817 (dv_attr.tunnel_offloads_caps &
1818 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1820 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1821 tunnel_en ? "" : "not ");
1824 "tunnel offloading disabled due to old OFED/rdma-core version");
1826 config.tunnel_en = tunnel_en;
1827 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1828 mpls_en = ((dv_attr.tunnel_offloads_caps &
1829 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1830 (dv_attr.tunnel_offloads_caps &
1831 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1832 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1833 mpls_en ? "" : "not ");
1835 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1836 " old OFED/rdma-core version or firmware configuration");
1838 config.mpls_en = mpls_en;
1839 /* Check port status. */
1840 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1842 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1845 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1846 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1850 if (port_attr.state != IBV_PORT_ACTIVE)
1851 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1852 mlx5_glue->port_state_str(port_attr.state),
1854 /* Allocate private eth device data. */
1855 priv = rte_zmalloc("ethdev private structure",
1857 RTE_CACHE_LINE_SIZE);
1859 DRV_LOG(ERR, "priv allocation failure");
1864 priv->ibv_port = spawn->ibv_port;
1865 priv->pci_dev = spawn->pci_dev;
1866 priv->mtu = RTE_ETHER_MTU;
1868 /* Initialize UAR access locks for 32bit implementations. */
1869 rte_spinlock_init(&priv->uar_lock_cq);
1870 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1871 rte_spinlock_init(&priv->uar_lock[i]);
1873 /* Some internal functions rely on Netlink sockets, open them now. */
1874 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1875 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1877 priv->representor = !!switch_info->representor;
1878 priv->master = !!switch_info->master;
1879 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1880 priv->vport_meta_tag = 0;
1881 priv->vport_meta_mask = 0;
1882 priv->pf_bond = spawn->pf_bond;
1883 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1885 * The DevX port query API is implemented. E-Switch may use
1886 * either vport or reg_c[0] metadata register to match on
1887 * vport index. The engaged part of metadata register is
1890 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1891 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1892 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port, &devx_port);
1894 DRV_LOG(WARNING, "can't query devx port %d on device %s\n",
1895 spawn->ibv_port, spawn->ibv_dev->name);
1896 devx_port.comp_mask = 0;
1898 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1899 priv->vport_meta_tag = devx_port.reg_c_0.value;
1900 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1901 if (!priv->vport_meta_mask) {
1902 DRV_LOG(ERR, "vport zero mask for port %d"
1903 " on bonding device %s\n",
1904 spawn->ibv_port, spawn->ibv_dev->name);
1908 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1909 DRV_LOG(ERR, "invalid vport tag for port %d"
1910 " on bonding device %s\n",
1911 spawn->ibv_port, spawn->ibv_dev->name);
1915 } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1916 priv->vport_id = devx_port.vport_num;
1917 } else if (spawn->pf_bond >= 0) {
1918 DRV_LOG(ERR, "can't deduce vport index for port %d"
1919 " on bonding device %s\n",
1920 spawn->ibv_port, spawn->ibv_dev->name);
1924 /* Suppose vport index in compatible way. */
1925 priv->vport_id = switch_info->representor ?
1926 switch_info->port_name + 1 : -1;
1930 * Kernel/rdma_core support single E-Switch per PF configurations
1931 * only and vport_id field contains the vport index for
1932 * associated VF, which is deduced from representor port name.
1933 * For example, let's have the IB device port 10, it has
1934 * attached network device eth0, which has port name attribute
1935 * pf0vf2, we can deduce the VF number as 2, and set vport index
1936 * as 3 (2+1). This assigning schema should be changed if the
1937 * multiple E-Switch instances per PF configurations or/and PCI
1938 * subfunctions are added.
1940 priv->vport_id = switch_info->representor ?
1941 switch_info->port_name + 1 : -1;
1943 /* representor_id field keeps the unmodified VF index. */
1944 priv->representor_id = switch_info->representor ?
1945 switch_info->port_name : -1;
1947 * Look for sibling devices in order to reuse their switch domain
1948 * if any, otherwise allocate one.
1950 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1951 const struct mlx5_priv *opriv =
1952 rte_eth_devices[port_id].data->dev_private;
1955 opriv->sh != priv->sh ||
1957 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1959 priv->domain_id = opriv->domain_id;
1962 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1963 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1966 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1967 strerror(rte_errno));
1972 err = mlx5_args(&config, dpdk_dev->devargs);
1975 DRV_LOG(ERR, "failed to process device arguments: %s",
1976 strerror(rte_errno));
1979 err = mlx5_dev_check_sibling_config(priv, &config);
1982 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1983 IBV_DEVICE_RAW_IP_CSUM);
1984 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1985 (config.hw_csum ? "" : "not "));
1986 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1987 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1988 DRV_LOG(DEBUG, "counters are not supported");
1990 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1991 if (config.dv_flow_en) {
1992 DRV_LOG(WARNING, "DV flow is not supported");
1993 config.dv_flow_en = 0;
1996 config.ind_table_max_size =
1997 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1999 * Remove this check once DPDK supports larger/variable
2000 * indirection tables.
2002 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2003 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2004 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2005 config.ind_table_max_size);
2006 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2007 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2008 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2009 (config.hw_vlan_strip ? "" : "not "));
2010 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2011 IBV_RAW_PACKET_CAP_SCATTER_FCS);
2012 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2013 (config.hw_fcs_strip ? "" : "not "));
2014 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2015 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2016 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2017 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2018 IBV_DEVICE_PCI_WRITE_END_PADDING);
2020 if (config.hw_padding && !hw_padding) {
2021 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2022 config.hw_padding = 0;
2023 } else if (config.hw_padding) {
2024 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2026 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2027 (sh->device_attr.tso_caps.supported_qpts &
2028 (1 << IBV_QPT_RAW_PACKET)));
2030 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2032 * MPW is disabled by default, while the Enhanced MPW is enabled
2035 if (config.mps == MLX5_ARG_UNSET)
2036 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2039 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2040 DRV_LOG(INFO, "%sMPS is %s",
2041 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2042 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2043 if (config.cqe_comp && !cqe_comp) {
2044 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2045 config.cqe_comp = 0;
2047 if (config.cqe_pad && !cqe_pad) {
2048 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2050 } else if (config.cqe_pad) {
2051 DRV_LOG(INFO, "Rx CQE padding is enabled");
2054 priv->counter_fallback = 0;
2055 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2060 if (!config.hca_attr.flow_counters_dump)
2061 priv->counter_fallback = 1;
2062 #ifndef HAVE_IBV_DEVX_ASYNC
2063 priv->counter_fallback = 1;
2065 if (priv->counter_fallback)
2066 DRV_LOG(INFO, "Use fall-back DV counter management\n");
2067 /* Check for LRO support. */
2068 if (config.dest_tir && config.hca_attr.lro_cap &&
2069 config.dv_flow_en) {
2070 /* TBD check tunnel lro caps. */
2071 config.lro.supported = config.hca_attr.lro_cap;
2072 DRV_LOG(DEBUG, "Device supports LRO");
2074 * If LRO timeout is not configured by application,
2075 * use the minimal supported value.
2077 if (!config.lro.timeout)
2078 config.lro.timeout =
2079 config.hca_attr.lro_timer_supported_periods[0];
2080 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2081 config.lro.timeout);
2084 if (config.mprq.enabled && mprq) {
2085 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2086 config.mprq.stride_num_n < mprq_min_stride_num_n) {
2087 config.mprq.stride_num_n =
2088 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2089 mprq_min_stride_num_n);
2091 "the number of strides"
2092 " for Multi-Packet RQ is out of range,"
2093 " setting default value (%u)",
2094 1 << config.mprq.stride_num_n);
2096 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2097 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2098 } else if (config.mprq.enabled && !mprq) {
2099 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2100 config.mprq.enabled = 0;
2102 if (config.max_dump_files_num == 0)
2103 config.max_dump_files_num = 128;
2104 eth_dev = rte_eth_dev_allocate(name);
2105 if (eth_dev == NULL) {
2106 DRV_LOG(ERR, "can not allocate rte ethdev");
2110 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2111 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2112 if (priv->representor) {
2113 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2114 eth_dev->data->representor_id = priv->representor_id;
2117 * Store associated network device interface index. This index
2118 * is permanent throughout the lifetime of device. So, we may store
2119 * the ifindex here and use the cached value further.
2121 assert(spawn->ifindex);
2122 priv->if_index = spawn->ifindex;
2123 eth_dev->data->dev_private = priv;
2124 priv->dev_data = eth_dev->data;
2125 eth_dev->data->mac_addrs = priv->mac;
2126 eth_dev->device = dpdk_dev;
2127 /* Configure the first MAC address by default. */
2128 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2130 "port %u cannot get MAC address, is mlx5_en"
2131 " loaded? (errno: %s)",
2132 eth_dev->data->port_id, strerror(rte_errno));
2137 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2138 eth_dev->data->port_id,
2139 mac.addr_bytes[0], mac.addr_bytes[1],
2140 mac.addr_bytes[2], mac.addr_bytes[3],
2141 mac.addr_bytes[4], mac.addr_bytes[5]);
2144 char ifname[IF_NAMESIZE];
2146 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2147 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2148 eth_dev->data->port_id, ifname);
2150 DRV_LOG(DEBUG, "port %u ifname is unknown",
2151 eth_dev->data->port_id);
2154 /* Get actual MTU if possible. */
2155 err = mlx5_get_mtu(eth_dev, &priv->mtu);
2160 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2162 /* Initialize burst functions to prevent crashes before link-up. */
2163 eth_dev->rx_pkt_burst = removed_rx_burst;
2164 eth_dev->tx_pkt_burst = removed_tx_burst;
2165 eth_dev->dev_ops = &mlx5_dev_ops;
2166 /* Register MAC address. */
2167 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2168 if (config.vf && config.vf_nl_en)
2169 mlx5_nl_mac_addr_sync(eth_dev);
2170 TAILQ_INIT(&priv->flows);
2171 TAILQ_INIT(&priv->ctrl_flows);
2172 /* Hint libmlx5 to use PMD allocator for data plane resources */
2173 struct mlx5dv_ctx_allocators alctr = {
2174 .alloc = &mlx5_alloc_verbs_buf,
2175 .free = &mlx5_free_verbs_buf,
2178 mlx5_glue->dv_set_context_attr(sh->ctx,
2179 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2180 (void *)((uintptr_t)&alctr));
2181 /* Bring Ethernet device up. */
2182 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2183 eth_dev->data->port_id);
2184 mlx5_set_link_up(eth_dev);
2186 * Even though the interrupt handler is not installed yet,
2187 * interrupts will still trigger on the async_fd from
2188 * Verbs context returned by ibv_open_device().
2190 mlx5_link_update(eth_dev, 0);
2191 #ifdef HAVE_MLX5DV_DR_ESWITCH
2192 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2193 (switch_info->representor || switch_info->master)))
2194 config.dv_esw_en = 0;
2196 config.dv_esw_en = 0;
2198 /* Detect minimal data bytes to inline. */
2199 mlx5_set_min_inline(spawn, &config);
2200 /* Store device configuration on private structure. */
2201 priv->config = config;
2202 /* Create context for virtual machine VLAN workaround. */
2203 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2204 if (config.dv_flow_en) {
2205 err = mlx5_alloc_shared_dr(priv);
2209 /* Supported Verbs flow priority number detection. */
2210 err = mlx5_flow_discover_priorities(eth_dev);
2215 priv->config.flow_prio = err;
2220 mlx5_free_shared_dr(priv);
2221 if (priv->nl_socket_route >= 0)
2222 close(priv->nl_socket_route);
2223 if (priv->nl_socket_rdma >= 0)
2224 close(priv->nl_socket_rdma);
2225 if (priv->vmwa_context)
2226 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2228 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2230 if (eth_dev != NULL)
2231 eth_dev->data->dev_private = NULL;
2233 if (eth_dev != NULL) {
2234 /* mac_addrs must not be freed alone because part of dev_private */
2235 eth_dev->data->mac_addrs = NULL;
2236 rte_eth_dev_release_port(eth_dev);
2239 mlx5_free_shared_ibctx(sh);
2246 * Comparison callback to sort device data.
2248 * This is meant to be used with qsort().
2251 * Pointer to pointer to first data object.
2253 * Pointer to pointer to second data object.
2256 * 0 if both objects are equal, less than 0 if the first argument is less
2257 * than the second, greater than 0 otherwise.
2260 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2262 const struct mlx5_switch_info *si_a =
2263 &((const struct mlx5_dev_spawn_data *)a)->info;
2264 const struct mlx5_switch_info *si_b =
2265 &((const struct mlx5_dev_spawn_data *)b)->info;
2268 /* Master device first. */
2269 ret = si_b->master - si_a->master;
2272 /* Then representor devices. */
2273 ret = si_b->representor - si_a->representor;
2276 /* Unidentified devices come last in no specific order. */
2277 if (!si_a->representor)
2279 /* Order representors by name. */
2280 return si_a->port_name - si_b->port_name;
2284 * Match PCI information for possible slaves of bonding device.
2286 * @param[in] ibv_dev
2287 * Pointer to Infiniband device structure.
2288 * @param[in] pci_dev
2289 * Pointer to PCI device structure to match PCI address.
2290 * @param[in] nl_rdma
2291 * Netlink RDMA group socket handle.
2294 * negative value if no bonding device found, otherwise
2295 * positive index of slave PF in bonding.
2298 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2299 const struct rte_pci_device *pci_dev,
2302 char ifname[IF_NAMESIZE + 1];
2303 unsigned int ifindex;
2309 * Try to get master device name. If something goes
2310 * wrong suppose the lack of kernel support and no
2315 if (!strstr(ibv_dev->name, "bond"))
2317 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2321 * The Master device might not be on the predefined
2322 * port (not on port index 1, it is not garanted),
2323 * we have to scan all Infiniband device port and
2326 for (i = 1; i <= np; ++i) {
2327 /* Check whether Infiniband port is populated. */
2328 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2331 if (!if_indextoname(ifindex, ifname))
2333 /* Try to read bonding slave names from sysfs. */
2335 "/sys/class/net/%s/master/bonding/slaves", ifname);
2336 file = fopen(slaves, "r");
2342 /* Use safe format to check maximal buffer length. */
2343 assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2344 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2345 char tmp_str[IF_NAMESIZE + 32];
2346 struct rte_pci_addr pci_addr;
2347 struct mlx5_switch_info info;
2349 /* Process slave interface names in the loop. */
2350 snprintf(tmp_str, sizeof(tmp_str),
2351 "/sys/class/net/%s", ifname);
2352 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2353 DRV_LOG(WARNING, "can not get PCI address"
2354 " for netdev \"%s\"", ifname);
2357 if (pci_dev->addr.domain != pci_addr.domain ||
2358 pci_dev->addr.bus != pci_addr.bus ||
2359 pci_dev->addr.devid != pci_addr.devid ||
2360 pci_dev->addr.function != pci_addr.function)
2362 /* Slave interface PCI address match found. */
2364 snprintf(tmp_str, sizeof(tmp_str),
2365 "/sys/class/net/%s/phys_port_name", ifname);
2366 file = fopen(tmp_str, "rb");
2369 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2370 if (fscanf(file, "%32s", tmp_str) == 1)
2371 mlx5_translate_port_name(tmp_str, &info);
2372 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2373 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2374 pf = info.port_name;
2383 * DPDK callback to register a PCI device.
2385 * This function spawns Ethernet devices out of a given PCI device.
2387 * @param[in] pci_drv
2388 * PCI driver structure (mlx5_driver).
2389 * @param[in] pci_dev
2390 * PCI device information.
2393 * 0 on success, a negative errno value otherwise and rte_errno is set.
2396 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2397 struct rte_pci_device *pci_dev)
2399 struct ibv_device **ibv_list;
2401 * Number of found IB Devices matching with requested PCI BDF.
2402 * nd != 1 means there are multiple IB devices over the same
2403 * PCI device and we have representors and master.
2405 unsigned int nd = 0;
2407 * Number of found IB device Ports. nd = 1 and np = 1..n means
2408 * we have the single multiport IB device, and there may be
2409 * representors attached to some of found ports.
2411 unsigned int np = 0;
2413 * Number of DPDK ethernet devices to Spawn - either over
2414 * multiple IB devices or multiple ports of single IB device.
2415 * Actually this is the number of iterations to spawn.
2417 unsigned int ns = 0;
2420 * < 0 - no bonding device (single one)
2421 * >= 0 - bonding device (value is slave PF index)
2424 struct mlx5_dev_spawn_data *list = NULL;
2425 struct mlx5_dev_config dev_config;
2428 ret = mlx5_init_once();
2430 DRV_LOG(ERR, "unable to init PMD global data: %s",
2431 strerror(rte_errno));
2434 assert(pci_drv == &mlx5_driver);
2436 ibv_list = mlx5_glue->get_device_list(&ret);
2438 rte_errno = errno ? errno : ENOSYS;
2439 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2443 * First scan the list of all Infiniband devices to find
2444 * matching ones, gathering into the list.
2446 struct ibv_device *ibv_match[ret + 1];
2447 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2448 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2452 struct rte_pci_addr pci_addr;
2454 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2455 bd = mlx5_device_bond_pci_match
2456 (ibv_list[ret], pci_dev, nl_rdma);
2459 * Bonding device detected. Only one match is allowed,
2460 * the bonding is supported over multi-port IB device,
2461 * there should be no matches on representor PCI
2462 * functions or non VF LAG bonding devices with
2463 * specified address.
2467 "multiple PCI match on bonding device"
2468 "\"%s\" found", ibv_list[ret]->name);
2473 DRV_LOG(INFO, "PCI information matches for"
2474 " slave %d bonding device \"%s\"",
2475 bd, ibv_list[ret]->name);
2476 ibv_match[nd++] = ibv_list[ret];
2479 if (mlx5_dev_to_pci_addr
2480 (ibv_list[ret]->ibdev_path, &pci_addr))
2482 if (pci_dev->addr.domain != pci_addr.domain ||
2483 pci_dev->addr.bus != pci_addr.bus ||
2484 pci_dev->addr.devid != pci_addr.devid ||
2485 pci_dev->addr.function != pci_addr.function)
2487 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2488 ibv_list[ret]->name);
2489 ibv_match[nd++] = ibv_list[ret];
2491 ibv_match[nd] = NULL;
2493 /* No device matches, just complain and bail out. */
2495 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2496 " are kernel drivers loaded?",
2497 pci_dev->addr.domain, pci_dev->addr.bus,
2498 pci_dev->addr.devid, pci_dev->addr.function);
2505 * Found single matching device may have multiple ports.
2506 * Each port may be representor, we have to check the port
2507 * number and check the representors existence.
2510 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2512 DRV_LOG(WARNING, "can not get IB device \"%s\""
2513 " ports number", ibv_match[0]->name);
2514 if (bd >= 0 && !np) {
2515 DRV_LOG(ERR, "can not get ports"
2516 " for bonding device");
2522 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2525 * This may happen if there is VF LAG kernel support and
2526 * application is compiled with older rdma_core library.
2529 "No kernel/verbs support for VF LAG bonding found.");
2530 rte_errno = ENOTSUP;
2536 * Now we can determine the maximal
2537 * amount of devices to be spawned.
2539 list = rte_zmalloc("device spawn data",
2540 sizeof(struct mlx5_dev_spawn_data) *
2542 RTE_CACHE_LINE_SIZE);
2544 DRV_LOG(ERR, "spawn data array allocation failure");
2549 if (bd >= 0 || np > 1) {
2551 * Single IB device with multiple ports found,
2552 * it may be E-Switch master device and representors.
2553 * We have to perform identification trough the ports.
2555 assert(nl_rdma >= 0);
2559 for (i = 1; i <= np; ++i) {
2560 list[ns].max_port = np;
2561 list[ns].ibv_port = i;
2562 list[ns].ibv_dev = ibv_match[0];
2563 list[ns].eth_dev = NULL;
2564 list[ns].pci_dev = pci_dev;
2565 list[ns].pf_bond = bd;
2566 list[ns].ifindex = mlx5_nl_ifindex
2567 (nl_rdma, list[ns].ibv_dev->name, i);
2568 if (!list[ns].ifindex) {
2570 * No network interface index found for the
2571 * specified port, it means there is no
2572 * representor on this port. It's OK,
2573 * there can be disabled ports, for example
2574 * if sriov_numvfs < sriov_totalvfs.
2580 ret = mlx5_nl_switch_info
2584 if (ret || (!list[ns].info.representor &&
2585 !list[ns].info.master)) {
2587 * We failed to recognize representors with
2588 * Netlink, let's try to perform the task
2591 ret = mlx5_sysfs_switch_info
2595 if (!ret && bd >= 0) {
2596 switch (list[ns].info.name_type) {
2597 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2598 if (list[ns].info.port_name == bd)
2601 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2602 if (list[ns].info.pf_num == bd)
2610 if (!ret && (list[ns].info.representor ^
2611 list[ns].info.master))
2616 "unable to recognize master/representors"
2617 " on the IB device with multiple ports");
2624 * The existence of several matching entries (nd > 1) means
2625 * port representors have been instantiated. No existing Verbs
2626 * call nor sysfs entries can tell them apart, this can only
2627 * be done through Netlink calls assuming kernel drivers are
2628 * recent enough to support them.
2630 * In the event of identification failure through Netlink,
2631 * try again through sysfs, then:
2633 * 1. A single IB device matches (nd == 1) with single
2634 * port (np=0/1) and is not a representor, assume
2635 * no switch support.
2637 * 2. Otherwise no safe assumptions can be made;
2638 * complain louder and bail out.
2641 for (i = 0; i != nd; ++i) {
2642 memset(&list[ns].info, 0, sizeof(list[ns].info));
2643 list[ns].max_port = 1;
2644 list[ns].ibv_port = 1;
2645 list[ns].ibv_dev = ibv_match[i];
2646 list[ns].eth_dev = NULL;
2647 list[ns].pci_dev = pci_dev;
2648 list[ns].pf_bond = -1;
2649 list[ns].ifindex = 0;
2651 list[ns].ifindex = mlx5_nl_ifindex
2652 (nl_rdma, list[ns].ibv_dev->name, 1);
2653 if (!list[ns].ifindex) {
2654 char ifname[IF_NAMESIZE];
2657 * Netlink failed, it may happen with old
2658 * ib_core kernel driver (before 4.16).
2659 * We can assume there is old driver because
2660 * here we are processing single ports IB
2661 * devices. Let's try sysfs to retrieve
2662 * the ifindex. The method works for
2663 * master device only.
2667 * Multiple devices found, assume
2668 * representors, can not distinguish
2669 * master/representor and retrieve
2670 * ifindex via sysfs.
2674 ret = mlx5_get_master_ifname
2675 (ibv_match[i]->ibdev_path, &ifname);
2678 if_nametoindex(ifname);
2679 if (!list[ns].ifindex) {
2681 * No network interface index found
2682 * for the specified device, it means
2683 * there it is neither representor
2691 ret = mlx5_nl_switch_info
2695 if (ret || (!list[ns].info.representor &&
2696 !list[ns].info.master)) {
2698 * We failed to recognize representors with
2699 * Netlink, let's try to perform the task
2702 ret = mlx5_sysfs_switch_info
2706 if (!ret && (list[ns].info.representor ^
2707 list[ns].info.master)) {
2709 } else if ((nd == 1) &&
2710 !list[ns].info.representor &&
2711 !list[ns].info.master) {
2713 * Single IB device with
2714 * one physical port and
2715 * attached network device.
2716 * May be SRIOV is not enabled
2717 * or there is no representors.
2719 DRV_LOG(INFO, "no E-Switch support detected");
2726 "unable to recognize master/representors"
2727 " on the multiple IB devices");
2735 * Sort list to probe devices in natural order for users convenience
2736 * (i.e. master first, then representors from lowest to highest ID).
2738 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2739 /* Default configuration. */
2740 dev_config = (struct mlx5_dev_config){
2742 .mps = MLX5_ARG_UNSET,
2744 .txq_inline_max = MLX5_ARG_UNSET,
2745 .txq_inline_min = MLX5_ARG_UNSET,
2746 .txq_inline_mpw = MLX5_ARG_UNSET,
2747 .txqs_inline = MLX5_ARG_UNSET,
2749 .mr_ext_memseg_en = 1,
2751 .enabled = 0, /* Disabled by default. */
2752 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2753 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2754 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2758 /* Device specific configuration. */
2759 switch (pci_dev->id.device_id) {
2760 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2761 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2762 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2763 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2764 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2765 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2771 for (i = 0; i != ns; ++i) {
2774 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2777 if (!list[i].eth_dev) {
2778 if (rte_errno != EBUSY && rte_errno != EEXIST)
2780 /* Device is disabled or already spawned. Ignore it. */
2783 restore = list[i].eth_dev->data->dev_flags;
2784 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2785 /* Restore non-PCI flags cleared by the above call. */
2786 list[i].eth_dev->data->dev_flags |= restore;
2787 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
2788 rte_eth_dev_probing_finish(list[i].eth_dev);
2792 "probe of PCI device " PCI_PRI_FMT " aborted after"
2793 " encountering an error: %s",
2794 pci_dev->addr.domain, pci_dev->addr.bus,
2795 pci_dev->addr.devid, pci_dev->addr.function,
2796 strerror(rte_errno));
2800 if (!list[i].eth_dev)
2802 mlx5_dev_close(list[i].eth_dev);
2803 /* mac_addrs must not be freed because in dev_private */
2804 list[i].eth_dev->data->mac_addrs = NULL;
2805 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2807 /* Restore original error. */
2814 * Do the routine cleanup:
2815 * - close opened Netlink sockets
2816 * - free allocated spawn data array
2817 * - free the Infiniband device list
2826 mlx5_glue->free_device_list(ibv_list);
2831 * Look for the ethernet device belonging to mlx5 driver.
2833 * @param[in] port_id
2834 * port_id to start looking for device.
2835 * @param[in] pci_dev
2836 * Pointer to the hint PCI device. When device is being probed
2837 * the its siblings (master and preceding representors might
2838 * not have assigned driver yet (because the mlx5_pci_probe()
2839 * is not completed yet, for this case match on hint PCI
2840 * device may be used to detect sibling device.
2843 * port_id of found device, RTE_MAX_ETHPORT if not found.
2846 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
2848 while (port_id < RTE_MAX_ETHPORTS) {
2849 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2851 if (dev->state != RTE_ETH_DEV_UNUSED &&
2853 (dev->device == &pci_dev->device ||
2854 (dev->device->driver &&
2855 dev->device->driver->name &&
2856 !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
2860 if (port_id >= RTE_MAX_ETHPORTS)
2861 return RTE_MAX_ETHPORTS;
2866 * DPDK callback to remove a PCI device.
2868 * This function removes all Ethernet devices belong to a given PCI device.
2870 * @param[in] pci_dev
2871 * Pointer to the PCI device.
2874 * 0 on success, the function cannot fail.
2877 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2881 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2882 rte_eth_dev_close(port_id);
2886 static const struct rte_pci_id mlx5_pci_id_map[] = {
2888 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2889 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2892 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2893 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2896 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2897 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2900 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2901 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2904 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2905 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2908 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2909 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2912 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2913 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2916 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2917 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2920 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2921 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2924 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2925 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2928 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2929 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2932 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2933 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2940 static struct rte_pci_driver mlx5_driver = {
2942 .name = MLX5_DRIVER_NAME
2944 .id_table = mlx5_pci_id_map,
2945 .probe = mlx5_pci_probe,
2946 .remove = mlx5_pci_remove,
2947 .dma_map = mlx5_dma_map,
2948 .dma_unmap = mlx5_dma_unmap,
2949 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2950 RTE_PCI_DRV_PROBE_AGAIN,
2953 #ifdef RTE_IBVERBS_LINK_DLOPEN
2956 * Suffix RTE_EAL_PMD_PATH with "-glue".
2958 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2959 * suffixing its last component.
2962 * Output buffer, should be large enough otherwise NULL is returned.
2967 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2970 mlx5_glue_path(char *buf, size_t size)
2972 static const char *const bad[] = { "/", ".", "..", NULL };
2973 const char *path = RTE_EAL_PMD_PATH;
2974 size_t len = strlen(path);
2978 while (len && path[len - 1] == '/')
2980 for (off = len; off && path[off - 1] != '/'; --off)
2982 for (i = 0; bad[i]; ++i)
2983 if (!strncmp(path + off, bad[i], (int)(len - off)))
2985 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2986 if (i == -1 || (size_t)i >= size)
2991 "unable to append \"-glue\" to last component of"
2992 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2993 " please re-configure DPDK");
2998 * Initialization routine for run-time dependency on rdma-core.
3001 mlx5_glue_init(void)
3003 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3004 const char *path[] = {
3006 * A basic security check is necessary before trusting
3007 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3009 (geteuid() == getuid() && getegid() == getgid() ?
3010 getenv("MLX5_GLUE_PATH") : NULL),
3012 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3013 * variant, otherwise let dlopen() look up libraries on its
3016 (*RTE_EAL_PMD_PATH ?
3017 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3020 void *handle = NULL;
3024 while (!handle && i != RTE_DIM(path)) {
3033 end = strpbrk(path[i], ":;");
3035 end = path[i] + strlen(path[i]);
3036 len = end - path[i];
3041 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3043 (!len || *(end - 1) == '/') ? "" : "/");
3046 if (sizeof(name) != (size_t)ret + 1)
3048 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3050 handle = dlopen(name, RTLD_LAZY);
3061 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3064 sym = dlsym(handle, "mlx5_glue");
3065 if (!sym || !*sym) {
3069 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3078 "cannot initialize PMD due to missing run-time dependency on"
3079 " rdma-core libraries (libibverbs, libmlx5)");
3086 * Driver initialization routine.
3088 RTE_INIT(rte_mlx5_pmd_init)
3090 /* Initialize driver log type. */
3091 mlx5_logtype = rte_log_register("pmd.net.mlx5");
3092 if (mlx5_logtype >= 0)
3093 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3095 /* Build the static tables for Verbs conversion. */
3096 mlx5_set_ptype_table();
3097 mlx5_set_cksum_table();
3098 mlx5_set_swp_types_table();
3100 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3101 * huge pages. Calling ibv_fork_init() during init allows
3102 * applications to use fork() safely for purposes other than
3103 * using this PMD, which is not supported in forked processes.
3105 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3106 /* Match the size of Rx completion entry to the size of a cacheline. */
3107 if (RTE_CACHE_LINE_SIZE == 128)
3108 setenv("MLX5_CQE_SIZE", "128", 0);
3110 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3111 * cleanup all the Verbs resources even when the device was removed.
3113 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3114 #ifdef RTE_IBVERBS_LINK_DLOPEN
3115 if (mlx5_glue_init())
3120 /* Glue structure must not contain any NULL pointers. */
3124 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3125 assert(((const void *const *)mlx5_glue)[i]);
3128 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3130 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3131 mlx5_glue->version, MLX5_GLUE_VERSION);
3134 mlx5_glue->fork_init();
3135 rte_pci_register(&mlx5_driver);
3138 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3139 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3140 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");