1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
40 #include <rte_alarm.h>
43 #include "mlx5_utils.h"
44 #include "mlx5_rxtx.h"
45 #include "mlx5_autoconf.h"
46 #include "mlx5_defs.h"
47 #include "mlx5_glue.h"
49 #include "mlx5_flow.h"
51 /* Device parameter to enable RX completion queue compression. */
52 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
54 /* Device parameter to enable RX completion entry padding to 128B. */
55 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
57 /* Device parameter to enable padding Rx packet to cacheline size. */
58 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
60 /* Device parameter to enable Multi-Packet Rx queue. */
61 #define MLX5_RX_MPRQ_EN "mprq_en"
63 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
64 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
66 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
67 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
69 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
70 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
72 /* Device parameter to configure inline send. Deprecated, ignored.*/
73 #define MLX5_TXQ_INLINE "txq_inline"
75 /* Device parameter to limit packet size to inline with ordinary SEND. */
76 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
78 /* Device parameter to configure minimal data size to inline. */
79 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
81 /* Device parameter to limit packet size to inline with Enhanced MPW. */
82 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
85 * Device parameter to configure the number of TX queues threshold for
86 * enabling inline send.
88 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
91 * Device parameter to configure the number of TX queues threshold for
92 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
94 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
96 /* Device parameter to enable multi-packet send WQEs. */
97 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
100 * Device parameter to include 2 dsegs in the title WQEBB.
101 * Deprecated, ignored.
103 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
106 * Device parameter to limit the size of inlining packet.
107 * Deprecated, ignored.
109 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
112 * Device parameter to enable hardware Tx vector.
113 * Deprecated, ignored (no vectorized Tx routines anymore).
115 #define MLX5_TX_VEC_EN "tx_vec_en"
117 /* Device parameter to enable hardware Rx vector. */
118 #define MLX5_RX_VEC_EN "rx_vec_en"
120 /* Allow L3 VXLAN flow creation. */
121 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
123 /* Activate DV E-Switch flow steering. */
124 #define MLX5_DV_ESW_EN "dv_esw_en"
126 /* Activate DV flow steering. */
127 #define MLX5_DV_FLOW_EN "dv_flow_en"
129 /* Activate Netlink support in VF mode. */
130 #define MLX5_VF_NL_EN "vf_nl_en"
132 /* Enable extending memsegs when creating a MR. */
133 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
135 /* Select port representors to instantiate. */
136 #define MLX5_REPRESENTOR "representor"
138 /* Device parameter to configure the maximum number of dump files per queue. */
139 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
141 /* Configure timeout of LRO session (in microseconds). */
142 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
144 #ifndef HAVE_IBV_MLX5_MOD_MPW
145 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
146 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
149 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
150 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
153 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
155 /* Shared memory between primary and secondary processes. */
156 struct mlx5_shared_data *mlx5_shared_data;
158 /* Spinlock for mlx5_shared_data allocation. */
159 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
161 /* Process local data for secondary processes. */
162 static struct mlx5_local_data mlx5_local_data;
164 /** Driver-specific log messages type. */
167 /** Data associated with devices to spawn. */
168 struct mlx5_dev_spawn_data {
169 uint32_t ifindex; /**< Network interface index. */
170 uint32_t max_port; /**< IB device maximal port index. */
171 uint32_t ibv_port; /**< IB device physical port index. */
172 struct mlx5_switch_info info; /**< Switch information. */
173 struct ibv_device *ibv_dev; /**< Associated IB device. */
174 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
175 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
182 * Initialize the counters management structure.
185 * Pointer to mlx5_ibv_shared object to free
188 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
192 TAILQ_INIT(&sh->cmng.flow_counters);
193 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
194 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
198 * Destroy all the resources allocated for a counter memory management.
201 * Pointer to the memory management structure.
204 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
206 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
208 LIST_REMOVE(mng, next);
209 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
210 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
215 * Close and release all the resources of the counters management.
218 * Pointer to mlx5_ibv_shared object to free.
221 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
223 struct mlx5_counter_stats_mem_mng *mng;
230 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
231 if (rte_errno != EINPROGRESS)
235 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
236 struct mlx5_flow_counter_pool *pool;
237 uint32_t batch = !!(i % 2);
239 if (!sh->cmng.ccont[i].pools)
241 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
246 (mlx5_devx_cmd_destroy(pool->min_dcs));
248 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
249 if (pool->counters_raw[j].action)
251 (mlx5_glue->destroy_flow_action
252 (pool->counters_raw[j].action));
253 if (!batch && pool->counters_raw[j].dcs)
254 claim_zero(mlx5_devx_cmd_destroy
255 (pool->counters_raw[j].dcs));
257 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
260 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
262 rte_free(sh->cmng.ccont[i].pools);
264 mng = LIST_FIRST(&sh->cmng.mem_mngs);
266 mlx5_flow_destroy_counter_stat_mem_mng(mng);
267 mng = LIST_FIRST(&sh->cmng.mem_mngs);
269 memset(&sh->cmng, 0, sizeof(sh->cmng));
273 * Extract pdn of PD object using DV API.
276 * Pointer to the verbs PD object.
278 * Pointer to the PD object number variable.
281 * 0 on success, error value otherwise.
283 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
285 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
287 struct mlx5dv_obj obj;
288 struct mlx5dv_pd pd_info;
292 obj.pd.out = &pd_info;
293 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
295 DRV_LOG(DEBUG, "Fail to get PD object info");
301 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
304 * Allocate shared IB device context. If there is multiport device the
305 * master and representors will share this context, if there is single
306 * port dedicated IB device, the context will be used by only given
307 * port due to unification.
309 * Routine first searches the context for the specified IB device name,
310 * if found the shared context assumed and reference counter is incremented.
311 * If no context found the new one is created and initialized with specified
312 * IB device context and parameters.
315 * Pointer to the IB device attributes (name, port, etc).
318 * Pointer to mlx5_ibv_shared object on success,
319 * otherwise NULL and rte_errno is set.
321 static struct mlx5_ibv_shared *
322 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
324 struct mlx5_ibv_shared *sh;
329 /* Secondary process should not create the shared context. */
330 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
331 pthread_mutex_lock(&mlx5_ibv_list_mutex);
332 /* Search for IB context by device name. */
333 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
334 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
339 /* No device found, we have to create new shared context. */
340 assert(spawn->max_port);
341 sh = rte_zmalloc("ethdev shared ib context",
342 sizeof(struct mlx5_ibv_shared) +
344 sizeof(struct mlx5_ibv_shared_port),
345 RTE_CACHE_LINE_SIZE);
347 DRV_LOG(ERR, "shared context allocation failure");
351 /* Try to open IB device with DV first, then usual Verbs. */
353 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
356 DRV_LOG(DEBUG, "DevX is supported");
358 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
360 err = errno ? errno : ENODEV;
363 DRV_LOG(DEBUG, "DevX is NOT supported");
365 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
367 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
371 sh->max_port = spawn->max_port;
372 strncpy(sh->ibdev_name, sh->ctx->device->name,
373 sizeof(sh->ibdev_name));
374 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
375 sizeof(sh->ibdev_path));
376 sh->pci_dev = spawn->pci_dev;
377 pthread_mutex_init(&sh->intr_mutex, NULL);
379 * Setting port_id to max unallowed value means
380 * there is no interrupt subhandler installed for
381 * the given port index i.
383 for (i = 0; i < sh->max_port; i++)
384 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
385 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
386 if (sh->pd == NULL) {
387 DRV_LOG(ERR, "PD allocation failure");
391 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
392 err = mlx5_get_pdn(sh->pd, &sh->pdn);
394 DRV_LOG(ERR, "Fail to extract pdn from PD");
397 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
399 * Once the device is added to the list of memory event
400 * callback, its global MR cache table cannot be expanded
401 * on the fly because of deadlock. If it overflows, lookup
402 * should be done by searching MR list linearly, which is slow.
404 * At this point the device is not added to the memory
405 * event list yet, context is just being created.
407 err = mlx5_mr_btree_init(&sh->mr.cache,
408 MLX5_MR_BTREE_CACHE_N * 2,
409 sh->pci_dev->device.numa_node);
414 mlx5_flow_counters_mng_init(sh);
415 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
417 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
420 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
423 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
425 claim_zero(mlx5_glue->close_device(sh->ctx));
433 * Free shared IB device context. Decrement counter and if zero free
434 * all allocated resources and close handles.
437 * Pointer to mlx5_ibv_shared object to free
440 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
442 pthread_mutex_lock(&mlx5_ibv_list_mutex);
444 /* Check the object presence in the list. */
445 struct mlx5_ibv_shared *lctx;
447 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
452 DRV_LOG(ERR, "Freeing non-existing shared IB context");
458 /* Secondary process should not free the shared context. */
459 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
462 /* Release created Memory Regions. */
464 LIST_REMOVE(sh, next);
466 * Ensure there is no async event handler installed.
467 * Only primary process handles async device events.
469 mlx5_flow_counters_mng_close(sh);
470 assert(!sh->intr_cnt);
472 mlx5_intr_callback_unregister
473 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
474 pthread_mutex_destroy(&sh->intr_mutex);
476 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
478 claim_zero(mlx5_glue->close_device(sh->ctx));
481 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
485 * Initialize DR related data within private structure.
486 * Routine checks the reference counter and does actual
487 * resources creation/initialization only if counter is zero.
490 * Pointer to the private device data structure.
493 * Zero on success, positive error code otherwise.
496 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
498 #ifdef HAVE_MLX5DV_DR
499 struct mlx5_ibv_shared *sh = priv->sh;
505 /* Shared DV/DR structures is already initialized. */
510 /* Reference counter is zero, we should initialize structures. */
511 domain = mlx5_glue->dr_create_domain(sh->ctx,
512 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
514 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
518 sh->rx_domain = domain;
519 domain = mlx5_glue->dr_create_domain(sh->ctx,
520 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
522 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
526 pthread_mutex_init(&sh->dv_mutex, NULL);
527 sh->tx_domain = domain;
528 #ifdef HAVE_MLX5DV_DR_ESWITCH
529 if (priv->config.dv_esw_en) {
530 domain = mlx5_glue->dr_create_domain
531 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
533 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
537 sh->fdb_domain = domain;
538 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
546 /* Rollback the created objects. */
548 mlx5_glue->dr_destroy_domain(sh->rx_domain);
549 sh->rx_domain = NULL;
552 mlx5_glue->dr_destroy_domain(sh->tx_domain);
553 sh->tx_domain = NULL;
555 if (sh->fdb_domain) {
556 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
557 sh->fdb_domain = NULL;
559 if (sh->esw_drop_action) {
560 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
561 sh->esw_drop_action = NULL;
571 * Destroy DR related data within private structure.
574 * Pointer to the private device data structure.
577 mlx5_free_shared_dr(struct mlx5_priv *priv)
579 #ifdef HAVE_MLX5DV_DR
580 struct mlx5_ibv_shared *sh;
582 if (!priv->dr_shared)
587 assert(sh->dv_refcnt);
588 if (sh->dv_refcnt && --sh->dv_refcnt)
591 mlx5_glue->dr_destroy_domain(sh->rx_domain);
592 sh->rx_domain = NULL;
595 mlx5_glue->dr_destroy_domain(sh->tx_domain);
596 sh->tx_domain = NULL;
598 #ifdef HAVE_MLX5DV_DR_ESWITCH
599 if (sh->fdb_domain) {
600 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
601 sh->fdb_domain = NULL;
603 if (sh->esw_drop_action) {
604 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
605 sh->esw_drop_action = NULL;
608 pthread_mutex_destroy(&sh->dv_mutex);
615 * Initialize shared data between primary and secondary process.
617 * A memzone is reserved by primary process and secondary processes attach to
621 * 0 on success, a negative errno value otherwise and rte_errno is set.
624 mlx5_init_shared_data(void)
626 const struct rte_memzone *mz;
629 rte_spinlock_lock(&mlx5_shared_data_lock);
630 if (mlx5_shared_data == NULL) {
631 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
632 /* Allocate shared memory. */
633 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
634 sizeof(*mlx5_shared_data),
638 "Cannot allocate mlx5 shared data\n");
642 mlx5_shared_data = mz->addr;
643 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
644 rte_spinlock_init(&mlx5_shared_data->lock);
646 /* Lookup allocated shared memory. */
647 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
650 "Cannot attach mlx5 shared data\n");
654 mlx5_shared_data = mz->addr;
655 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
659 rte_spinlock_unlock(&mlx5_shared_data_lock);
664 * Retrieve integer value from environment variable.
667 * Environment variable name.
670 * Integer value, 0 if the variable is not set.
673 mlx5_getenv_int(const char *name)
675 const char *val = getenv(name);
683 * Verbs callback to allocate a memory. This function should allocate the space
684 * according to the size provided residing inside a huge page.
685 * Please note that all allocation must respect the alignment from libmlx5
686 * (i.e. currently sysconf(_SC_PAGESIZE)).
689 * The size in bytes of the memory to allocate.
691 * A pointer to the callback data.
694 * Allocated buffer, NULL otherwise and rte_errno is set.
697 mlx5_alloc_verbs_buf(size_t size, void *data)
699 struct mlx5_priv *priv = data;
701 size_t alignment = sysconf(_SC_PAGESIZE);
702 unsigned int socket = SOCKET_ID_ANY;
704 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
705 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
707 socket = ctrl->socket;
708 } else if (priv->verbs_alloc_ctx.type ==
709 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
710 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
712 socket = ctrl->socket;
714 assert(data != NULL);
715 ret = rte_malloc_socket(__func__, size, alignment, socket);
722 * Verbs callback to free a memory.
725 * A pointer to the memory to free.
727 * A pointer to the callback data.
730 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
732 assert(data != NULL);
737 * Initialize process private data structure.
740 * Pointer to Ethernet device structure.
743 * 0 on success, a negative errno value otherwise and rte_errno is set.
746 mlx5_proc_priv_init(struct rte_eth_dev *dev)
748 struct mlx5_priv *priv = dev->data->dev_private;
749 struct mlx5_proc_priv *ppriv;
753 * UAR register table follows the process private structure. BlueFlame
754 * registers for Tx queues are stored in the table.
757 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
758 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
759 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
764 ppriv->uar_table_sz = ppriv_size;
765 dev->process_private = ppriv;
770 * Un-initialize process private data structure.
773 * Pointer to Ethernet device structure.
776 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
778 if (!dev->process_private)
780 rte_free(dev->process_private);
781 dev->process_private = NULL;
785 * DPDK callback to close the device.
787 * Destroy all queues and objects, free memory.
790 * Pointer to Ethernet device structure.
793 mlx5_dev_close(struct rte_eth_dev *dev)
795 struct mlx5_priv *priv = dev->data->dev_private;
799 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
801 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
802 /* In case mlx5_dev_stop() has not been called. */
803 mlx5_dev_interrupt_handler_uninstall(dev);
804 mlx5_traffic_disable(dev);
805 mlx5_flow_flush(dev, NULL);
806 /* Prevent crashes when queues are still in use. */
807 dev->rx_pkt_burst = removed_rx_burst;
808 dev->tx_pkt_burst = removed_tx_burst;
810 /* Disable datapath on secondary process. */
811 mlx5_mp_req_stop_rxtx(dev);
812 if (priv->rxqs != NULL) {
813 /* XXX race condition if mlx5_rx_burst() is still running. */
815 for (i = 0; (i != priv->rxqs_n); ++i)
816 mlx5_rxq_release(dev, i);
820 if (priv->txqs != NULL) {
821 /* XXX race condition if mlx5_tx_burst() is still running. */
823 for (i = 0; (i != priv->txqs_n); ++i)
824 mlx5_txq_release(dev, i);
828 mlx5_proc_priv_uninit(dev);
829 mlx5_mprq_free_mp(dev);
830 /* Remove from memory callback device list. */
831 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
833 LIST_REMOVE(priv->sh, mem_event_cb);
834 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
835 mlx5_free_shared_dr(priv);
836 if (priv->rss_conf.rss_key != NULL)
837 rte_free(priv->rss_conf.rss_key);
838 if (priv->reta_idx != NULL)
839 rte_free(priv->reta_idx);
841 mlx5_nl_mac_addr_flush(dev);
842 if (priv->nl_socket_route >= 0)
843 close(priv->nl_socket_route);
844 if (priv->nl_socket_rdma >= 0)
845 close(priv->nl_socket_rdma);
846 if (priv->vmwa_context)
847 mlx5_vlan_vmwa_exit(priv->vmwa_context);
850 * Free the shared context in last turn, because the cleanup
851 * routines above may use some shared fields, like
852 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
853 * ifindex if Netlink fails.
855 mlx5_free_shared_ibctx(priv->sh);
858 ret = mlx5_hrxq_verify(dev);
860 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
862 ret = mlx5_ind_table_obj_verify(dev);
864 DRV_LOG(WARNING, "port %u some indirection table still remain",
866 ret = mlx5_rxq_obj_verify(dev);
868 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
870 ret = mlx5_rxq_verify(dev);
872 DRV_LOG(WARNING, "port %u some Rx queues still remain",
874 ret = mlx5_txq_ibv_verify(dev);
876 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
878 ret = mlx5_txq_verify(dev);
880 DRV_LOG(WARNING, "port %u some Tx queues still remain",
882 ret = mlx5_flow_verify(dev);
884 DRV_LOG(WARNING, "port %u some flows still remain",
886 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
890 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
891 struct mlx5_priv *opriv =
892 rte_eth_devices[port_id].data->dev_private;
895 opriv->domain_id != priv->domain_id ||
896 &rte_eth_devices[port_id] == dev)
901 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
903 memset(priv, 0, sizeof(*priv));
904 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
906 * Reset mac_addrs to NULL such that it is not freed as part of
907 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
908 * it is freed when dev_private is freed.
910 dev->data->mac_addrs = NULL;
913 const struct eth_dev_ops mlx5_dev_ops = {
914 .dev_configure = mlx5_dev_configure,
915 .dev_start = mlx5_dev_start,
916 .dev_stop = mlx5_dev_stop,
917 .dev_set_link_down = mlx5_set_link_down,
918 .dev_set_link_up = mlx5_set_link_up,
919 .dev_close = mlx5_dev_close,
920 .promiscuous_enable = mlx5_promiscuous_enable,
921 .promiscuous_disable = mlx5_promiscuous_disable,
922 .allmulticast_enable = mlx5_allmulticast_enable,
923 .allmulticast_disable = mlx5_allmulticast_disable,
924 .link_update = mlx5_link_update,
925 .stats_get = mlx5_stats_get,
926 .stats_reset = mlx5_stats_reset,
927 .xstats_get = mlx5_xstats_get,
928 .xstats_reset = mlx5_xstats_reset,
929 .xstats_get_names = mlx5_xstats_get_names,
930 .fw_version_get = mlx5_fw_version_get,
931 .dev_infos_get = mlx5_dev_infos_get,
932 .read_clock = mlx5_read_clock,
933 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
934 .vlan_filter_set = mlx5_vlan_filter_set,
935 .rx_queue_setup = mlx5_rx_queue_setup,
936 .tx_queue_setup = mlx5_tx_queue_setup,
937 .rx_queue_release = mlx5_rx_queue_release,
938 .tx_queue_release = mlx5_tx_queue_release,
939 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
940 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
941 .mac_addr_remove = mlx5_mac_addr_remove,
942 .mac_addr_add = mlx5_mac_addr_add,
943 .mac_addr_set = mlx5_mac_addr_set,
944 .set_mc_addr_list = mlx5_set_mc_addr_list,
945 .mtu_set = mlx5_dev_set_mtu,
946 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
947 .vlan_offload_set = mlx5_vlan_offload_set,
948 .reta_update = mlx5_dev_rss_reta_update,
949 .reta_query = mlx5_dev_rss_reta_query,
950 .rss_hash_update = mlx5_rss_hash_update,
951 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
952 .filter_ctrl = mlx5_dev_filter_ctrl,
953 .rx_descriptor_status = mlx5_rx_descriptor_status,
954 .tx_descriptor_status = mlx5_tx_descriptor_status,
955 .rx_queue_count = mlx5_rx_queue_count,
956 .rx_queue_intr_enable = mlx5_rx_intr_enable,
957 .rx_queue_intr_disable = mlx5_rx_intr_disable,
958 .is_removed = mlx5_is_removed,
961 /* Available operations from secondary process. */
962 static const struct eth_dev_ops mlx5_dev_sec_ops = {
963 .stats_get = mlx5_stats_get,
964 .stats_reset = mlx5_stats_reset,
965 .xstats_get = mlx5_xstats_get,
966 .xstats_reset = mlx5_xstats_reset,
967 .xstats_get_names = mlx5_xstats_get_names,
968 .fw_version_get = mlx5_fw_version_get,
969 .dev_infos_get = mlx5_dev_infos_get,
970 .rx_descriptor_status = mlx5_rx_descriptor_status,
971 .tx_descriptor_status = mlx5_tx_descriptor_status,
974 /* Available operations in flow isolated mode. */
975 const struct eth_dev_ops mlx5_dev_ops_isolate = {
976 .dev_configure = mlx5_dev_configure,
977 .dev_start = mlx5_dev_start,
978 .dev_stop = mlx5_dev_stop,
979 .dev_set_link_down = mlx5_set_link_down,
980 .dev_set_link_up = mlx5_set_link_up,
981 .dev_close = mlx5_dev_close,
982 .promiscuous_enable = mlx5_promiscuous_enable,
983 .promiscuous_disable = mlx5_promiscuous_disable,
984 .allmulticast_enable = mlx5_allmulticast_enable,
985 .allmulticast_disable = mlx5_allmulticast_disable,
986 .link_update = mlx5_link_update,
987 .stats_get = mlx5_stats_get,
988 .stats_reset = mlx5_stats_reset,
989 .xstats_get = mlx5_xstats_get,
990 .xstats_reset = mlx5_xstats_reset,
991 .xstats_get_names = mlx5_xstats_get_names,
992 .fw_version_get = mlx5_fw_version_get,
993 .dev_infos_get = mlx5_dev_infos_get,
994 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
995 .vlan_filter_set = mlx5_vlan_filter_set,
996 .rx_queue_setup = mlx5_rx_queue_setup,
997 .tx_queue_setup = mlx5_tx_queue_setup,
998 .rx_queue_release = mlx5_rx_queue_release,
999 .tx_queue_release = mlx5_tx_queue_release,
1000 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1001 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1002 .mac_addr_remove = mlx5_mac_addr_remove,
1003 .mac_addr_add = mlx5_mac_addr_add,
1004 .mac_addr_set = mlx5_mac_addr_set,
1005 .set_mc_addr_list = mlx5_set_mc_addr_list,
1006 .mtu_set = mlx5_dev_set_mtu,
1007 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1008 .vlan_offload_set = mlx5_vlan_offload_set,
1009 .filter_ctrl = mlx5_dev_filter_ctrl,
1010 .rx_descriptor_status = mlx5_rx_descriptor_status,
1011 .tx_descriptor_status = mlx5_tx_descriptor_status,
1012 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1013 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1014 .is_removed = mlx5_is_removed,
1018 * Verify and store value for device argument.
1021 * Key argument to verify.
1023 * Value associated with key.
1028 * 0 on success, a negative errno value otherwise and rte_errno is set.
1031 mlx5_args_check(const char *key, const char *val, void *opaque)
1033 struct mlx5_dev_config *config = opaque;
1036 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1037 if (!strcmp(MLX5_REPRESENTOR, key))
1040 tmp = strtoul(val, NULL, 0);
1043 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1046 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1047 config->cqe_comp = !!tmp;
1048 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1049 config->cqe_pad = !!tmp;
1050 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1051 config->hw_padding = !!tmp;
1052 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1053 config->mprq.enabled = !!tmp;
1054 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1055 config->mprq.stride_num_n = tmp;
1056 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1057 config->mprq.max_memcpy_len = tmp;
1058 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1059 config->mprq.min_rxqs_num = tmp;
1060 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1061 DRV_LOG(WARNING, "%s: deprecated parameter,"
1062 " converted to txq_inline_max", key);
1063 config->txq_inline_max = tmp;
1064 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1065 config->txq_inline_max = tmp;
1066 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1067 config->txq_inline_min = tmp;
1068 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1069 config->txq_inline_mpw = tmp;
1070 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1071 config->txqs_inline = tmp;
1072 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1073 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1074 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1075 config->mps = !!tmp;
1076 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1077 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1078 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1079 DRV_LOG(WARNING, "%s: deprecated parameter,"
1080 " converted to txq_inline_mpw", key);
1081 config->txq_inline_mpw = tmp;
1082 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1083 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1084 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1085 config->rx_vec_en = !!tmp;
1086 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1087 config->l3_vxlan_en = !!tmp;
1088 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1089 config->vf_nl_en = !!tmp;
1090 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1091 config->dv_esw_en = !!tmp;
1092 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1093 config->dv_flow_en = !!tmp;
1094 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1095 config->mr_ext_memseg_en = !!tmp;
1096 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1097 config->max_dump_files_num = tmp;
1098 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1099 config->lro.timeout = tmp;
1101 DRV_LOG(WARNING, "%s: unknown parameter", key);
1109 * Parse device parameters.
1112 * Pointer to device configuration structure.
1114 * Device arguments structure.
1117 * 0 on success, a negative errno value otherwise and rte_errno is set.
1120 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1122 const char **params = (const char *[]){
1123 MLX5_RXQ_CQE_COMP_EN,
1124 MLX5_RXQ_CQE_PAD_EN,
1125 MLX5_RXQ_PKT_PAD_EN,
1127 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1128 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1131 MLX5_TXQ_INLINE_MIN,
1132 MLX5_TXQ_INLINE_MAX,
1133 MLX5_TXQ_INLINE_MPW,
1134 MLX5_TXQS_MIN_INLINE,
1137 MLX5_TXQ_MPW_HDR_DSEG_EN,
1138 MLX5_TXQ_MAX_INLINE_LEN,
1145 MLX5_MR_EXT_MEMSEG_EN,
1147 MLX5_MAX_DUMP_FILES_NUM,
1148 MLX5_LRO_TIMEOUT_USEC,
1151 struct rte_kvargs *kvlist;
1155 if (devargs == NULL)
1157 /* Following UGLY cast is done to pass checkpatch. */
1158 kvlist = rte_kvargs_parse(devargs->args, params);
1159 if (kvlist == NULL) {
1163 /* Process parameters. */
1164 for (i = 0; (params[i] != NULL); ++i) {
1165 if (rte_kvargs_count(kvlist, params[i])) {
1166 ret = rte_kvargs_process(kvlist, params[i],
1167 mlx5_args_check, config);
1170 rte_kvargs_free(kvlist);
1175 rte_kvargs_free(kvlist);
1179 static struct rte_pci_driver mlx5_driver;
1182 * PMD global initialization.
1184 * Independent from individual device, this function initializes global
1185 * per-PMD data structures distinguishing primary and secondary processes.
1186 * Hence, each initialization is called once per a process.
1189 * 0 on success, a negative errno value otherwise and rte_errno is set.
1192 mlx5_init_once(void)
1194 struct mlx5_shared_data *sd;
1195 struct mlx5_local_data *ld = &mlx5_local_data;
1198 if (mlx5_init_shared_data())
1200 sd = mlx5_shared_data;
1202 rte_spinlock_lock(&sd->lock);
1203 switch (rte_eal_process_type()) {
1204 case RTE_PROC_PRIMARY:
1207 LIST_INIT(&sd->mem_event_cb_list);
1208 rte_rwlock_init(&sd->mem_event_rwlock);
1209 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1210 mlx5_mr_mem_event_cb, NULL);
1211 ret = mlx5_mp_init_primary();
1214 sd->init_done = true;
1216 case RTE_PROC_SECONDARY:
1219 ret = mlx5_mp_init_secondary();
1222 ++sd->secondary_cnt;
1223 ld->init_done = true;
1229 rte_spinlock_unlock(&sd->lock);
1234 * Configures the minimal amount of data to inline into WQE
1235 * while sending packets.
1237 * - the txq_inline_min has the maximal priority, if this
1238 * key is specified in devargs
1239 * - if DevX is enabled the inline mode is queried from the
1240 * device (HCA attributes and NIC vport context if needed).
1241 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1242 * and none (0 bytes) for other NICs
1245 * Verbs device parameters (name, port, switch_info) to spawn.
1247 * Device configuration parameters.
1250 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1251 struct mlx5_dev_config *config)
1253 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1254 /* Application defines size of inlined data explicitly. */
1255 switch (spawn->pci_dev->id.device_id) {
1256 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1257 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1258 if (config->txq_inline_min <
1259 (int)MLX5_INLINE_HSIZE_L2) {
1261 "txq_inline_mix aligned to minimal"
1262 " ConnectX-4 required value %d",
1263 (int)MLX5_INLINE_HSIZE_L2);
1264 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1270 if (config->hca_attr.eth_net_offloads) {
1271 /* We have DevX enabled, inline mode queried successfully. */
1272 switch (config->hca_attr.wqe_inline_mode) {
1273 case MLX5_CAP_INLINE_MODE_L2:
1274 /* outer L2 header must be inlined. */
1275 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1277 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1278 /* No inline data are required by NIC. */
1279 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1280 config->hw_vlan_insert =
1281 config->hca_attr.wqe_vlan_insert;
1282 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1284 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1285 /* inline mode is defined by NIC vport context. */
1286 if (!config->hca_attr.eth_virt)
1288 switch (config->hca_attr.vport_inline_mode) {
1289 case MLX5_INLINE_MODE_NONE:
1290 config->txq_inline_min =
1291 MLX5_INLINE_HSIZE_NONE;
1293 case MLX5_INLINE_MODE_L2:
1294 config->txq_inline_min =
1295 MLX5_INLINE_HSIZE_L2;
1297 case MLX5_INLINE_MODE_IP:
1298 config->txq_inline_min =
1299 MLX5_INLINE_HSIZE_L3;
1301 case MLX5_INLINE_MODE_TCP_UDP:
1302 config->txq_inline_min =
1303 MLX5_INLINE_HSIZE_L4;
1305 case MLX5_INLINE_MODE_INNER_L2:
1306 config->txq_inline_min =
1307 MLX5_INLINE_HSIZE_INNER_L2;
1309 case MLX5_INLINE_MODE_INNER_IP:
1310 config->txq_inline_min =
1311 MLX5_INLINE_HSIZE_INNER_L3;
1313 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1314 config->txq_inline_min =
1315 MLX5_INLINE_HSIZE_INNER_L4;
1321 * We get here if we are unable to deduce
1322 * inline data size with DevX. Try PCI ID
1323 * to determine old NICs.
1325 switch (spawn->pci_dev->id.device_id) {
1326 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1327 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1328 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1329 config->hw_vlan_insert = 0;
1331 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1332 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1333 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1334 config->hw_vlan_insert = 0;
1336 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1337 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1338 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1339 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1341 * These NICs support VLAN insertion from WQE and
1342 * report the wqe_vlan_insert flag. But there is the bug
1343 * and PFC control may be broken, so disable feature.
1345 config->hw_vlan_insert = 0;
1348 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1352 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1356 * Allocate page of door-bells and register it using DevX API.
1359 * Pointer to Ethernet device.
1362 * Pointer to new page on success, NULL otherwise.
1364 static struct mlx5_devx_dbr_page *
1365 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1367 struct mlx5_priv *priv = dev->data->dev_private;
1368 struct mlx5_devx_dbr_page *page;
1370 /* Allocate space for door-bell page and management data. */
1371 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1372 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1374 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1375 dev->data->port_id);
1378 /* Register allocated memory. */
1379 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1380 MLX5_DBR_PAGE_SIZE, 0);
1382 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1383 dev->data->port_id);
1391 * Find the next available door-bell, allocate new page if needed.
1394 * Pointer to Ethernet device.
1395 * @param [out] dbr_page
1396 * Door-bell page containing the page data.
1399 * Door-bell address offset on success, a negative error value otherwise.
1402 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1404 struct mlx5_priv *priv = dev->data->dev_private;
1405 struct mlx5_devx_dbr_page *page = NULL;
1408 LIST_FOREACH(page, &priv->dbrpgs, next)
1409 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1411 if (!page) { /* No page with free door-bell exists. */
1412 page = mlx5_alloc_dbr_page(dev);
1413 if (!page) /* Failed to allocate new page. */
1415 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1417 /* Loop to find bitmap part with clear bit. */
1419 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1422 /* Find the first clear bit. */
1423 j = rte_bsf64(~page->dbr_bitmap[i]);
1424 assert(i < (MLX5_DBR_PER_PAGE / 64));
1425 page->dbr_bitmap[i] |= (1 << j);
1428 return (((i * 64) + j) * sizeof(uint64_t));
1432 * Release a door-bell record.
1435 * Pointer to Ethernet device.
1436 * @param [in] umem_id
1437 * UMEM ID of page containing the door-bell record to release.
1438 * @param [in] offset
1439 * Offset of door-bell record in page.
1442 * 0 on success, a negative error value otherwise.
1445 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1447 struct mlx5_priv *priv = dev->data->dev_private;
1448 struct mlx5_devx_dbr_page *page = NULL;
1451 LIST_FOREACH(page, &priv->dbrpgs, next)
1452 /* Find the page this address belongs to. */
1453 if (page->umem->umem_id == umem_id)
1458 if (!page->dbr_count) {
1459 /* Page not used, free it and remove from list. */
1460 LIST_REMOVE(page, next);
1462 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1465 /* Mark in bitmap that this door-bell is not in use. */
1466 offset /= MLX5_DBR_SIZE;
1467 int i = offset / 64;
1468 int j = offset % 64;
1470 page->dbr_bitmap[i] &= ~(1 << j);
1476 * Spawn an Ethernet device from Verbs information.
1479 * Backing DPDK device.
1481 * Verbs device parameters (name, port, switch_info) to spawn.
1483 * Device configuration parameters.
1486 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1487 * is set. The following errors are defined:
1489 * EBUSY: device is not supposed to be spawned.
1490 * EEXIST: device is already spawned
1492 static struct rte_eth_dev *
1493 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1494 struct mlx5_dev_spawn_data *spawn,
1495 struct mlx5_dev_config config)
1497 const struct mlx5_switch_info *switch_info = &spawn->info;
1498 struct mlx5_ibv_shared *sh = NULL;
1499 struct ibv_port_attr port_attr;
1500 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1501 struct rte_eth_dev *eth_dev = NULL;
1502 struct mlx5_priv *priv = NULL;
1504 unsigned int hw_padding = 0;
1506 unsigned int cqe_comp;
1507 unsigned int cqe_pad = 0;
1508 unsigned int tunnel_en = 0;
1509 unsigned int mpls_en = 0;
1510 unsigned int swp = 0;
1511 unsigned int mprq = 0;
1512 unsigned int mprq_min_stride_size_n = 0;
1513 unsigned int mprq_max_stride_size_n = 0;
1514 unsigned int mprq_min_stride_num_n = 0;
1515 unsigned int mprq_max_stride_num_n = 0;
1516 struct rte_ether_addr mac;
1517 char name[RTE_ETH_NAME_MAX_LEN];
1518 int own_domain_id = 0;
1522 /* Determine if this port representor is supposed to be spawned. */
1523 if (switch_info->representor && dpdk_dev->devargs) {
1524 struct rte_eth_devargs eth_da;
1526 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1529 DRV_LOG(ERR, "failed to process device arguments: %s",
1530 strerror(rte_errno));
1533 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1534 if (eth_da.representor_ports[i] ==
1535 (uint16_t)switch_info->port_name)
1537 if (i == eth_da.nb_representor_ports) {
1542 /* Build device name. */
1543 if (!switch_info->representor)
1544 strlcpy(name, dpdk_dev->name, sizeof(name));
1546 snprintf(name, sizeof(name), "%s_representor_%u",
1547 dpdk_dev->name, switch_info->port_name);
1548 /* check if the device is already spawned */
1549 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1553 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1554 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1555 eth_dev = rte_eth_dev_attach_secondary(name);
1556 if (eth_dev == NULL) {
1557 DRV_LOG(ERR, "can not attach rte ethdev");
1561 eth_dev->device = dpdk_dev;
1562 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1563 err = mlx5_proc_priv_init(eth_dev);
1566 /* Receive command fd from primary process */
1567 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1570 /* Remap UAR for Tx queues. */
1571 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1575 * Ethdev pointer is still required as input since
1576 * the primary device is not accessible from the
1577 * secondary process.
1579 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1580 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1583 sh = mlx5_alloc_shared_ibctx(spawn);
1586 config.devx = sh->devx;
1587 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1588 config.dest_tir = 1;
1590 #ifdef HAVE_IBV_MLX5_MOD_SWP
1591 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1594 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1595 * as all ConnectX-5 devices.
1597 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1598 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1600 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1601 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1603 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1604 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1605 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1606 DRV_LOG(DEBUG, "enhanced MPW is supported");
1607 mps = MLX5_MPW_ENHANCED;
1609 DRV_LOG(DEBUG, "MPW is supported");
1613 DRV_LOG(DEBUG, "MPW isn't supported");
1614 mps = MLX5_MPW_DISABLED;
1616 #ifdef HAVE_IBV_MLX5_MOD_SWP
1617 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1618 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1619 DRV_LOG(DEBUG, "SWP support: %u", swp);
1622 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1623 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1624 struct mlx5dv_striding_rq_caps mprq_caps =
1625 dv_attr.striding_rq_caps;
1627 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1628 mprq_caps.min_single_stride_log_num_of_bytes);
1629 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1630 mprq_caps.max_single_stride_log_num_of_bytes);
1631 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1632 mprq_caps.min_single_wqe_log_num_of_strides);
1633 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1634 mprq_caps.max_single_wqe_log_num_of_strides);
1635 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1636 mprq_caps.supported_qpts);
1637 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1639 mprq_min_stride_size_n =
1640 mprq_caps.min_single_stride_log_num_of_bytes;
1641 mprq_max_stride_size_n =
1642 mprq_caps.max_single_stride_log_num_of_bytes;
1643 mprq_min_stride_num_n =
1644 mprq_caps.min_single_wqe_log_num_of_strides;
1645 mprq_max_stride_num_n =
1646 mprq_caps.max_single_wqe_log_num_of_strides;
1647 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1648 mprq_min_stride_num_n);
1651 if (RTE_CACHE_LINE_SIZE == 128 &&
1652 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1656 config.cqe_comp = cqe_comp;
1657 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1658 /* Whether device supports 128B Rx CQE padding. */
1659 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1660 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1662 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1663 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1664 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1665 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1666 (dv_attr.tunnel_offloads_caps &
1667 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1669 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1670 tunnel_en ? "" : "not ");
1673 "tunnel offloading disabled due to old OFED/rdma-core version");
1675 config.tunnel_en = tunnel_en;
1676 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1677 mpls_en = ((dv_attr.tunnel_offloads_caps &
1678 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1679 (dv_attr.tunnel_offloads_caps &
1680 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1681 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1682 mpls_en ? "" : "not ");
1684 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1685 " old OFED/rdma-core version or firmware configuration");
1687 config.mpls_en = mpls_en;
1688 /* Check port status. */
1689 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1691 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1694 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1695 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1699 if (port_attr.state != IBV_PORT_ACTIVE)
1700 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1701 mlx5_glue->port_state_str(port_attr.state),
1703 /* Allocate private eth device data. */
1704 priv = rte_zmalloc("ethdev private structure",
1706 RTE_CACHE_LINE_SIZE);
1708 DRV_LOG(ERR, "priv allocation failure");
1713 priv->ibv_port = spawn->ibv_port;
1714 priv->mtu = RTE_ETHER_MTU;
1716 /* Initialize UAR access locks for 32bit implementations. */
1717 rte_spinlock_init(&priv->uar_lock_cq);
1718 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1719 rte_spinlock_init(&priv->uar_lock[i]);
1721 /* Some internal functions rely on Netlink sockets, open them now. */
1722 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1723 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1725 priv->representor = !!switch_info->representor;
1726 priv->master = !!switch_info->master;
1727 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1729 * Currently we support single E-Switch per PF configurations
1730 * only and vport_id field contains the vport index for
1731 * associated VF, which is deduced from representor port name.
1732 * For example, let's have the IB device port 10, it has
1733 * attached network device eth0, which has port name attribute
1734 * pf0vf2, we can deduce the VF number as 2, and set vport index
1735 * as 3 (2+1). This assigning schema should be changed if the
1736 * multiple E-Switch instances per PF configurations or/and PCI
1737 * subfunctions are added.
1739 priv->vport_id = switch_info->representor ?
1740 switch_info->port_name + 1 : -1;
1741 /* representor_id field keeps the unmodified port/VF index. */
1742 priv->representor_id = switch_info->representor ?
1743 switch_info->port_name : -1;
1745 * Look for sibling devices in order to reuse their switch domain
1746 * if any, otherwise allocate one.
1748 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1749 const struct mlx5_priv *opriv =
1750 rte_eth_devices[port_id].data->dev_private;
1754 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1756 priv->domain_id = opriv->domain_id;
1759 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1760 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1763 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1764 strerror(rte_errno));
1769 err = mlx5_args(&config, dpdk_dev->devargs);
1772 DRV_LOG(ERR, "failed to process device arguments: %s",
1773 strerror(rte_errno));
1776 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1777 IBV_DEVICE_RAW_IP_CSUM);
1778 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1779 (config.hw_csum ? "" : "not "));
1780 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1781 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1782 DRV_LOG(DEBUG, "counters are not supported");
1784 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1785 if (config.dv_flow_en) {
1786 DRV_LOG(WARNING, "DV flow is not supported");
1787 config.dv_flow_en = 0;
1790 config.ind_table_max_size =
1791 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1793 * Remove this check once DPDK supports larger/variable
1794 * indirection tables.
1796 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1797 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1798 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1799 config.ind_table_max_size);
1800 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1801 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1802 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1803 (config.hw_vlan_strip ? "" : "not "));
1804 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1805 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1806 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1807 (config.hw_fcs_strip ? "" : "not "));
1808 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1809 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1810 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1811 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1812 IBV_DEVICE_PCI_WRITE_END_PADDING);
1814 if (config.hw_padding && !hw_padding) {
1815 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1816 config.hw_padding = 0;
1817 } else if (config.hw_padding) {
1818 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1820 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1821 (sh->device_attr.tso_caps.supported_qpts &
1822 (1 << IBV_QPT_RAW_PACKET)));
1824 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1826 * MPW is disabled by default, while the Enhanced MPW is enabled
1829 if (config.mps == MLX5_ARG_UNSET)
1830 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1833 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1834 DRV_LOG(INFO, "%sMPS is %s",
1835 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1836 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1837 if (config.cqe_comp && !cqe_comp) {
1838 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1839 config.cqe_comp = 0;
1841 if (config.cqe_pad && !cqe_pad) {
1842 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1844 } else if (config.cqe_pad) {
1845 DRV_LOG(INFO, "Rx CQE padding is enabled");
1848 priv->counter_fallback = 0;
1849 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1854 if (!config.hca_attr.flow_counters_dump)
1855 priv->counter_fallback = 1;
1856 #ifndef HAVE_IBV_DEVX_ASYNC
1857 priv->counter_fallback = 1;
1859 if (priv->counter_fallback)
1860 DRV_LOG(INFO, "Use fall-back DV counter management\n");
1861 /* Check for LRO support. */
1862 if (config.dest_tir && config.hca_attr.lro_cap) {
1863 /* TBD check tunnel lro caps. */
1864 config.lro.supported = config.hca_attr.lro_cap;
1865 DRV_LOG(DEBUG, "Device supports LRO");
1867 * If LRO timeout is not configured by application,
1868 * use the minimal supported value.
1870 if (!config.lro.timeout)
1871 config.lro.timeout =
1872 config.hca_attr.lro_timer_supported_periods[0];
1873 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1874 config.lro.timeout);
1877 if (config.mprq.enabled && mprq) {
1878 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1879 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1880 config.mprq.stride_num_n =
1881 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1882 mprq_min_stride_num_n);
1884 "the number of strides"
1885 " for Multi-Packet RQ is out of range,"
1886 " setting default value (%u)",
1887 1 << config.mprq.stride_num_n);
1889 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1890 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1891 } else if (config.mprq.enabled && !mprq) {
1892 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1893 config.mprq.enabled = 0;
1895 if (config.max_dump_files_num == 0)
1896 config.max_dump_files_num = 128;
1897 eth_dev = rte_eth_dev_allocate(name);
1898 if (eth_dev == NULL) {
1899 DRV_LOG(ERR, "can not allocate rte ethdev");
1903 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1904 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1905 if (priv->representor) {
1906 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1907 eth_dev->data->representor_id = priv->representor_id;
1910 * Store associated network device interface index. This index
1911 * is permanent throughout the lifetime of device. So, we may store
1912 * the ifindex here and use the cached value further.
1914 assert(spawn->ifindex);
1915 priv->if_index = spawn->ifindex;
1916 eth_dev->data->dev_private = priv;
1917 priv->dev_data = eth_dev->data;
1918 eth_dev->data->mac_addrs = priv->mac;
1919 eth_dev->device = dpdk_dev;
1920 /* Configure the first MAC address by default. */
1921 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1923 "port %u cannot get MAC address, is mlx5_en"
1924 " loaded? (errno: %s)",
1925 eth_dev->data->port_id, strerror(rte_errno));
1930 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1931 eth_dev->data->port_id,
1932 mac.addr_bytes[0], mac.addr_bytes[1],
1933 mac.addr_bytes[2], mac.addr_bytes[3],
1934 mac.addr_bytes[4], mac.addr_bytes[5]);
1937 char ifname[IF_NAMESIZE];
1939 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1940 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1941 eth_dev->data->port_id, ifname);
1943 DRV_LOG(DEBUG, "port %u ifname is unknown",
1944 eth_dev->data->port_id);
1947 /* Get actual MTU if possible. */
1948 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1953 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1955 /* Initialize burst functions to prevent crashes before link-up. */
1956 eth_dev->rx_pkt_burst = removed_rx_burst;
1957 eth_dev->tx_pkt_burst = removed_tx_burst;
1958 eth_dev->dev_ops = &mlx5_dev_ops;
1959 /* Register MAC address. */
1960 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1961 if (config.vf && config.vf_nl_en)
1962 mlx5_nl_mac_addr_sync(eth_dev);
1963 TAILQ_INIT(&priv->flows);
1964 TAILQ_INIT(&priv->ctrl_flows);
1965 /* Hint libmlx5 to use PMD allocator for data plane resources */
1966 struct mlx5dv_ctx_allocators alctr = {
1967 .alloc = &mlx5_alloc_verbs_buf,
1968 .free = &mlx5_free_verbs_buf,
1971 mlx5_glue->dv_set_context_attr(sh->ctx,
1972 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1973 (void *)((uintptr_t)&alctr));
1974 /* Bring Ethernet device up. */
1975 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1976 eth_dev->data->port_id);
1977 mlx5_set_link_up(eth_dev);
1979 * Even though the interrupt handler is not installed yet,
1980 * interrupts will still trigger on the async_fd from
1981 * Verbs context returned by ibv_open_device().
1983 mlx5_link_update(eth_dev, 0);
1984 #ifdef HAVE_MLX5DV_DR_ESWITCH
1985 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1986 (switch_info->representor || switch_info->master)))
1987 config.dv_esw_en = 0;
1989 config.dv_esw_en = 0;
1991 /* Detect minimal data bytes to inline. */
1992 mlx5_set_min_inline(spawn, &config);
1993 /* Store device configuration on private structure. */
1994 priv->config = config;
1995 /* Create context for virtual machine VLAN workaround. */
1996 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1997 if (config.dv_flow_en) {
1998 err = mlx5_alloc_shared_dr(priv);
2002 /* Supported Verbs flow priority number detection. */
2003 err = mlx5_flow_discover_priorities(eth_dev);
2008 priv->config.flow_prio = err;
2009 /* Add device to memory callback list. */
2010 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
2011 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
2013 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
2018 mlx5_free_shared_dr(priv);
2019 if (priv->nl_socket_route >= 0)
2020 close(priv->nl_socket_route);
2021 if (priv->nl_socket_rdma >= 0)
2022 close(priv->nl_socket_rdma);
2023 if (priv->vmwa_context)
2024 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2026 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2028 if (eth_dev != NULL)
2029 eth_dev->data->dev_private = NULL;
2031 if (eth_dev != NULL) {
2032 /* mac_addrs must not be freed alone because part of dev_private */
2033 eth_dev->data->mac_addrs = NULL;
2034 rte_eth_dev_release_port(eth_dev);
2037 mlx5_free_shared_ibctx(sh);
2044 * Comparison callback to sort device data.
2046 * This is meant to be used with qsort().
2049 * Pointer to pointer to first data object.
2051 * Pointer to pointer to second data object.
2054 * 0 if both objects are equal, less than 0 if the first argument is less
2055 * than the second, greater than 0 otherwise.
2058 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2060 const struct mlx5_switch_info *si_a =
2061 &((const struct mlx5_dev_spawn_data *)a)->info;
2062 const struct mlx5_switch_info *si_b =
2063 &((const struct mlx5_dev_spawn_data *)b)->info;
2066 /* Master device first. */
2067 ret = si_b->master - si_a->master;
2070 /* Then representor devices. */
2071 ret = si_b->representor - si_a->representor;
2074 /* Unidentified devices come last in no specific order. */
2075 if (!si_a->representor)
2077 /* Order representors by name. */
2078 return si_a->port_name - si_b->port_name;
2082 * DPDK callback to register a PCI device.
2084 * This function spawns Ethernet devices out of a given PCI device.
2086 * @param[in] pci_drv
2087 * PCI driver structure (mlx5_driver).
2088 * @param[in] pci_dev
2089 * PCI device information.
2092 * 0 on success, a negative errno value otherwise and rte_errno is set.
2095 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2096 struct rte_pci_device *pci_dev)
2098 struct ibv_device **ibv_list;
2100 * Number of found IB Devices matching with requested PCI BDF.
2101 * nd != 1 means there are multiple IB devices over the same
2102 * PCI device and we have representors and master.
2104 unsigned int nd = 0;
2106 * Number of found IB device Ports. nd = 1 and np = 1..n means
2107 * we have the single multiport IB device, and there may be
2108 * representors attached to some of found ports.
2110 unsigned int np = 0;
2112 * Number of DPDK ethernet devices to Spawn - either over
2113 * multiple IB devices or multiple ports of single IB device.
2114 * Actually this is the number of iterations to spawn.
2116 unsigned int ns = 0;
2117 struct mlx5_dev_config dev_config;
2120 ret = mlx5_init_once();
2122 DRV_LOG(ERR, "unable to init PMD global data: %s",
2123 strerror(rte_errno));
2126 assert(pci_drv == &mlx5_driver);
2128 ibv_list = mlx5_glue->get_device_list(&ret);
2130 rte_errno = errno ? errno : ENOSYS;
2131 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2135 * First scan the list of all Infiniband devices to find
2136 * matching ones, gathering into the list.
2138 struct ibv_device *ibv_match[ret + 1];
2144 struct rte_pci_addr pci_addr;
2146 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2147 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
2149 if (pci_dev->addr.domain != pci_addr.domain ||
2150 pci_dev->addr.bus != pci_addr.bus ||
2151 pci_dev->addr.devid != pci_addr.devid ||
2152 pci_dev->addr.function != pci_addr.function)
2154 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2155 ibv_list[ret]->name);
2156 ibv_match[nd++] = ibv_list[ret];
2158 ibv_match[nd] = NULL;
2160 /* No device matches, just complain and bail out. */
2161 mlx5_glue->free_device_list(ibv_list);
2163 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2164 " are kernel drivers loaded?",
2165 pci_dev->addr.domain, pci_dev->addr.bus,
2166 pci_dev->addr.devid, pci_dev->addr.function);
2171 nl_route = mlx5_nl_init(NETLINK_ROUTE);
2172 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2175 * Found single matching device may have multiple ports.
2176 * Each port may be representor, we have to check the port
2177 * number and check the representors existence.
2180 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2182 DRV_LOG(WARNING, "can not get IB device \"%s\""
2183 " ports number", ibv_match[0]->name);
2186 * Now we can determine the maximal
2187 * amount of devices to be spawned.
2189 struct mlx5_dev_spawn_data list[np ? np : nd];
2193 * Single IB device with multiple ports found,
2194 * it may be E-Switch master device and representors.
2195 * We have to perform identification trough the ports.
2197 assert(nl_rdma >= 0);
2200 for (i = 1; i <= np; ++i) {
2201 list[ns].max_port = np;
2202 list[ns].ibv_port = i;
2203 list[ns].ibv_dev = ibv_match[0];
2204 list[ns].eth_dev = NULL;
2205 list[ns].pci_dev = pci_dev;
2206 list[ns].ifindex = mlx5_nl_ifindex
2207 (nl_rdma, list[ns].ibv_dev->name, i);
2208 if (!list[ns].ifindex) {
2210 * No network interface index found for the
2211 * specified port, it means there is no
2212 * representor on this port. It's OK,
2213 * there can be disabled ports, for example
2214 * if sriov_numvfs < sriov_totalvfs.
2220 ret = mlx5_nl_switch_info
2224 if (ret || (!list[ns].info.representor &&
2225 !list[ns].info.master)) {
2227 * We failed to recognize representors with
2228 * Netlink, let's try to perform the task
2231 ret = mlx5_sysfs_switch_info
2235 if (!ret && (list[ns].info.representor ^
2236 list[ns].info.master))
2241 "unable to recognize master/representors"
2242 " on the IB device with multiple ports");
2249 * The existence of several matching entries (nd > 1) means
2250 * port representors have been instantiated. No existing Verbs
2251 * call nor sysfs entries can tell them apart, this can only
2252 * be done through Netlink calls assuming kernel drivers are
2253 * recent enough to support them.
2255 * In the event of identification failure through Netlink,
2256 * try again through sysfs, then:
2258 * 1. A single IB device matches (nd == 1) with single
2259 * port (np=0/1) and is not a representor, assume
2260 * no switch support.
2262 * 2. Otherwise no safe assumptions can be made;
2263 * complain louder and bail out.
2266 for (i = 0; i != nd; ++i) {
2267 memset(&list[ns].info, 0, sizeof(list[ns].info));
2268 list[ns].max_port = 1;
2269 list[ns].ibv_port = 1;
2270 list[ns].ibv_dev = ibv_match[i];
2271 list[ns].eth_dev = NULL;
2272 list[ns].pci_dev = pci_dev;
2273 list[ns].ifindex = 0;
2275 list[ns].ifindex = mlx5_nl_ifindex
2276 (nl_rdma, list[ns].ibv_dev->name, 1);
2277 if (!list[ns].ifindex) {
2278 char ifname[IF_NAMESIZE];
2281 * Netlink failed, it may happen with old
2282 * ib_core kernel driver (before 4.16).
2283 * We can assume there is old driver because
2284 * here we are processing single ports IB
2285 * devices. Let's try sysfs to retrieve
2286 * the ifindex. The method works for
2287 * master device only.
2291 * Multiple devices found, assume
2292 * representors, can not distinguish
2293 * master/representor and retrieve
2294 * ifindex via sysfs.
2298 ret = mlx5_get_master_ifname
2299 (ibv_match[i]->ibdev_path, &ifname);
2302 if_nametoindex(ifname);
2303 if (!list[ns].ifindex) {
2305 * No network interface index found
2306 * for the specified device, it means
2307 * there it is neither representor
2315 ret = mlx5_nl_switch_info
2319 if (ret || (!list[ns].info.representor &&
2320 !list[ns].info.master)) {
2322 * We failed to recognize representors with
2323 * Netlink, let's try to perform the task
2326 ret = mlx5_sysfs_switch_info
2330 if (!ret && (list[ns].info.representor ^
2331 list[ns].info.master)) {
2333 } else if ((nd == 1) &&
2334 !list[ns].info.representor &&
2335 !list[ns].info.master) {
2337 * Single IB device with
2338 * one physical port and
2339 * attached network device.
2340 * May be SRIOV is not enabled
2341 * or there is no representors.
2343 DRV_LOG(INFO, "no E-Switch support detected");
2350 "unable to recognize master/representors"
2351 " on the multiple IB devices");
2359 * Sort list to probe devices in natural order for users convenience
2360 * (i.e. master first, then representors from lowest to highest ID).
2362 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2363 /* Default configuration. */
2364 dev_config = (struct mlx5_dev_config){
2366 .mps = MLX5_ARG_UNSET,
2368 .txq_inline_max = MLX5_ARG_UNSET,
2369 .txq_inline_min = MLX5_ARG_UNSET,
2370 .txq_inline_mpw = MLX5_ARG_UNSET,
2371 .txqs_inline = MLX5_ARG_UNSET,
2373 .mr_ext_memseg_en = 1,
2375 .enabled = 0, /* Disabled by default. */
2376 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2377 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2378 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2382 /* Device specific configuration. */
2383 switch (pci_dev->id.device_id) {
2384 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2385 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2386 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2387 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2393 for (i = 0; i != ns; ++i) {
2396 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2399 if (!list[i].eth_dev) {
2400 if (rte_errno != EBUSY && rte_errno != EEXIST)
2402 /* Device is disabled or already spawned. Ignore it. */
2405 restore = list[i].eth_dev->data->dev_flags;
2406 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2407 /* Restore non-PCI flags cleared by the above call. */
2408 list[i].eth_dev->data->dev_flags |= restore;
2409 rte_eth_dev_probing_finish(list[i].eth_dev);
2413 "probe of PCI device " PCI_PRI_FMT " aborted after"
2414 " encountering an error: %s",
2415 pci_dev->addr.domain, pci_dev->addr.bus,
2416 pci_dev->addr.devid, pci_dev->addr.function,
2417 strerror(rte_errno));
2421 if (!list[i].eth_dev)
2423 mlx5_dev_close(list[i].eth_dev);
2424 /* mac_addrs must not be freed because in dev_private */
2425 list[i].eth_dev->data->mac_addrs = NULL;
2426 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2428 /* Restore original error. */
2435 * Do the routine cleanup:
2436 * - close opened Netlink sockets
2437 * - free the Infiniband device list
2444 mlx5_glue->free_device_list(ibv_list);
2449 * DPDK callback to remove a PCI device.
2451 * This function removes all Ethernet devices belong to a given PCI device.
2453 * @param[in] pci_dev
2454 * Pointer to the PCI device.
2457 * 0 on success, the function cannot fail.
2460 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2464 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2465 rte_eth_dev_close(port_id);
2469 static const struct rte_pci_id mlx5_pci_id_map[] = {
2471 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2472 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2475 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2476 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2479 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2480 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2483 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2484 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2487 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2488 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2491 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2492 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2495 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2496 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2499 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2500 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2503 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2504 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2507 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2508 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2511 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2512 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2515 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2516 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2523 static struct rte_pci_driver mlx5_driver = {
2525 .name = MLX5_DRIVER_NAME
2527 .id_table = mlx5_pci_id_map,
2528 .probe = mlx5_pci_probe,
2529 .remove = mlx5_pci_remove,
2530 .dma_map = mlx5_dma_map,
2531 .dma_unmap = mlx5_dma_unmap,
2532 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2533 RTE_PCI_DRV_PROBE_AGAIN,
2536 #ifdef RTE_IBVERBS_LINK_DLOPEN
2539 * Suffix RTE_EAL_PMD_PATH with "-glue".
2541 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2542 * suffixing its last component.
2545 * Output buffer, should be large enough otherwise NULL is returned.
2550 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2553 mlx5_glue_path(char *buf, size_t size)
2555 static const char *const bad[] = { "/", ".", "..", NULL };
2556 const char *path = RTE_EAL_PMD_PATH;
2557 size_t len = strlen(path);
2561 while (len && path[len - 1] == '/')
2563 for (off = len; off && path[off - 1] != '/'; --off)
2565 for (i = 0; bad[i]; ++i)
2566 if (!strncmp(path + off, bad[i], (int)(len - off)))
2568 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2569 if (i == -1 || (size_t)i >= size)
2574 "unable to append \"-glue\" to last component of"
2575 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2576 " please re-configure DPDK");
2581 * Initialization routine for run-time dependency on rdma-core.
2584 mlx5_glue_init(void)
2586 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2587 const char *path[] = {
2589 * A basic security check is necessary before trusting
2590 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2592 (geteuid() == getuid() && getegid() == getgid() ?
2593 getenv("MLX5_GLUE_PATH") : NULL),
2595 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2596 * variant, otherwise let dlopen() look up libraries on its
2599 (*RTE_EAL_PMD_PATH ?
2600 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2603 void *handle = NULL;
2607 while (!handle && i != RTE_DIM(path)) {
2616 end = strpbrk(path[i], ":;");
2618 end = path[i] + strlen(path[i]);
2619 len = end - path[i];
2624 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2626 (!len || *(end - 1) == '/') ? "" : "/");
2629 if (sizeof(name) != (size_t)ret + 1)
2631 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2633 handle = dlopen(name, RTLD_LAZY);
2644 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2647 sym = dlsym(handle, "mlx5_glue");
2648 if (!sym || !*sym) {
2652 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2661 "cannot initialize PMD due to missing run-time dependency on"
2662 " rdma-core libraries (libibverbs, libmlx5)");
2669 * Driver initialization routine.
2671 RTE_INIT(rte_mlx5_pmd_init)
2673 /* Initialize driver log type. */
2674 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2675 if (mlx5_logtype >= 0)
2676 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2678 /* Build the static tables for Verbs conversion. */
2679 mlx5_set_ptype_table();
2680 mlx5_set_cksum_table();
2681 mlx5_set_swp_types_table();
2683 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2684 * huge pages. Calling ibv_fork_init() during init allows
2685 * applications to use fork() safely for purposes other than
2686 * using this PMD, which is not supported in forked processes.
2688 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2689 /* Match the size of Rx completion entry to the size of a cacheline. */
2690 if (RTE_CACHE_LINE_SIZE == 128)
2691 setenv("MLX5_CQE_SIZE", "128", 0);
2693 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2694 * cleanup all the Verbs resources even when the device was removed.
2696 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2697 #ifdef RTE_IBVERBS_LINK_DLOPEN
2698 if (mlx5_glue_init())
2703 /* Glue structure must not contain any NULL pointers. */
2707 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2708 assert(((const void *const *)mlx5_glue)[i]);
2711 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2713 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2714 mlx5_glue->version, MLX5_GLUE_VERSION);
2717 mlx5_glue->fork_init();
2718 rte_pci_register(&mlx5_driver);
2721 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2722 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2723 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");