drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to force doorbell register mapping
 100  * to non-cahed region eliminating the extra write memory barrier.
 101  */
 102 #define MLX5_TX_DB_NC "tx_db_nc"
 103
 104 /*
 105  * Device parameter to include 2 dsegs in the title WQEBB.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 109
 110 /*
 111  * Device parameter to limit the size of inlining packet.
 112  * Deprecated, ignored.
 113  */
 114 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 115
 116 /*
 117  * Device parameter to enable hardware Tx vector.
 118  * Deprecated, ignored (no vectorized Tx routines anymore).
 119  */
 120 #define MLX5_TX_VEC_EN "tx_vec_en"
 121
 122 /* Device parameter to enable hardware Rx vector. */
 123 #define MLX5_RX_VEC_EN "rx_vec_en"
 124
 125 /* Allow L3 VXLAN flow creation. */
 126 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 127
 128 /* Activate DV E-Switch flow steering. */
 129 #define MLX5_DV_ESW_EN "dv_esw_en"
 130
 131 /* Activate DV flow steering. */
 132 #define MLX5_DV_FLOW_EN "dv_flow_en"
 133
 134 /* Enable extensive flow metadata support. */
 135 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
 136
 137 /* Activate Netlink support in VF mode. */
 138 #define MLX5_VF_NL_EN "vf_nl_en"
 139
 140 /* Enable extending memsegs when creating a MR. */
 141 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 142
 143 /* Select port representors to instantiate. */
 144 #define MLX5_REPRESENTOR "representor"
 145
 146 /* Device parameter to configure the maximum number of dump files per queue. */
 147 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 148
 149 /* Configure timeout of LRO session (in microseconds). */
 150 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 151
 152 #ifndef HAVE_IBV_MLX5_MOD_MPW
 153 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 154 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 155 #endif
 156
 157 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 158 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 159 #endif
 160
 161 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 162
 163 /* Shared memory between primary and secondary processes. */
 164 struct mlx5_shared_data *mlx5_shared_data;
 165
 166 /* Spinlock for mlx5_shared_data allocation. */
 167 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 168
 169 /* Process local data for secondary processes. */
 170 static struct mlx5_local_data mlx5_local_data;
 171
 172 /** Driver-specific log messages type. */
 173 int mlx5_logtype;
 174
 175 /** Data associated with devices to spawn. */
 176 struct mlx5_dev_spawn_data {
 177         uint32_t ifindex; /**< Network interface index. */
 178         uint32_t max_port; /**< IB device maximal port index. */
 179         uint32_t ibv_port; /**< IB device physical port index. */
 180         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
 181         struct mlx5_switch_info info; /**< Switch information. */
 182         struct ibv_device *ibv_dev; /**< Associated IB device. */
 183         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 184         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 185 };
 186
 187 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 188 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 189
 190 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
 191 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
 192
 193 #define MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE 4096
 194 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
 195
 196 /**
 197  * Allocate ID pool structure.
 198  *
 199  * @return
 200  *   Pointer to pool object, NULL value otherwise.
 201  */
 202 struct mlx5_flow_id_pool *
 203 mlx5_flow_id_pool_alloc(void)
 204 {
 205         struct mlx5_flow_id_pool *pool;
 206         void *mem;
 207
 208         pool = rte_zmalloc("id pool allocation", sizeof(*pool),
 209                            RTE_CACHE_LINE_SIZE);
 210         if (!pool) {
 211                 DRV_LOG(ERR, "can't allocate id pool");
 212                 rte_errno  = ENOMEM;
 213                 return NULL;
 214         }
 215         mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
 216                           RTE_CACHE_LINE_SIZE);
 217         if (!mem) {
 218                 DRV_LOG(ERR, "can't allocate mem for id pool");
 219                 rte_errno  = ENOMEM;
 220                 goto error;
 221         }
 222         pool->free_arr = mem;
 223         pool->curr = pool->free_arr;
 224         pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
 225         pool->base_index = 0;
 226         return pool;
 227 error:
 228         rte_free(pool);
 229         return NULL;
 230 }
 231
 232 /**
 233  * Release ID pool structure.
 234  *
 235  * @param[in] pool
 236  *   Pointer to flow id pool object to free.
 237  */
 238 void
 239 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
 240 {
 241         rte_free(pool->free_arr);
 242         rte_free(pool);
 243 }
 244
 245 /**
 246  * Generate ID.
 247  *
 248  * @param[in] pool
 249  *   Pointer to flow id pool.
 250  * @param[out] id
 251  *   The generated ID.
 252  *
 253  * @return
 254  *   0 on success, error value otherwise.
 255  */
 256 uint32_t
 257 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
 258 {
 259         if (pool->curr == pool->free_arr) {
 260                 if (pool->base_index == UINT32_MAX) {
 261                         rte_errno  = ENOMEM;
 262                         DRV_LOG(ERR, "no free id");
 263                         return -rte_errno;
 264                 }
 265                 *id = ++pool->base_index;
 266                 return 0;
 267         }
 268         *id = *(--pool->curr);
 269         return 0;
 270 }
 271
 272 /**
 273  * Release ID.
 274  *
 275  * @param[in] pool
 276  *   Pointer to flow id pool.
 277  * @param[out] id
 278  *   The generated ID.
 279  *
 280  * @return
 281  *   0 on success, error value otherwise.
 282  */
 283 uint32_t
 284 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
 285 {
 286         uint32_t size;
 287         uint32_t size2;
 288         void *mem;
 289
 290         if (pool->curr == pool->last) {
 291                 size = pool->curr - pool->free_arr;
 292                 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
 293                 assert(size2 > size);
 294                 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
 295                 if (!mem) {
 296                         DRV_LOG(ERR, "can't allocate mem for id pool");
 297                         rte_errno  = ENOMEM;
 298                         return -rte_errno;
 299                 }
 300                 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
 301                 rte_free(pool->free_arr);
 302                 pool->free_arr = mem;
 303                 pool->curr = pool->free_arr + size;
 304                 pool->last = pool->free_arr + size2;
 305         }
 306         *pool->curr = id;
 307         pool->curr++;
 308         return 0;
 309 }
 310
 311 /**
 312  * Initialize the counters management structure.
 313  *
 314  * @param[in] sh
 315  *   Pointer to mlx5_ibv_shared object to free
 316  */
 317 static void
 318 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 319 {
 320         uint8_t i;
 321
 322         TAILQ_INIT(&sh->cmng.flow_counters);
 323         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 324                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 325 }
 326
 327 /**
 328  * Destroy all the resources allocated for a counter memory management.
 329  *
 330  * @param[in] mng
 331  *   Pointer to the memory management structure.
 332  */
 333 static void
 334 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 335 {
 336         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 337
 338         LIST_REMOVE(mng, next);
 339         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 340         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 341         rte_free(mem);
 342 }
 343
 344 /**
 345  * Close and release all the resources of the counters management.
 346  *
 347  * @param[in] sh
 348  *   Pointer to mlx5_ibv_shared object to free.
 349  */
 350 static void
 351 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 352 {
 353         struct mlx5_counter_stats_mem_mng *mng;
 354         uint8_t i;
 355         int j;
 356         int retries = 1024;
 357
 358         rte_errno = 0;
 359         while (--retries) {
 360                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 361                 if (rte_errno != EINPROGRESS)
 362                         break;
 363                 rte_pause();
 364         }
 365         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 366                 struct mlx5_flow_counter_pool *pool;
 367                 uint32_t batch = !!(i % 2);
 368
 369                 if (!sh->cmng.ccont[i].pools)
 370                         continue;
 371                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 372                 while (pool) {
 373                         if (batch) {
 374                                 if (pool->min_dcs)
 375                                         claim_zero
 376                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 377                         }
 378                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 379                                 if (pool->counters_raw[j].action)
 380                                         claim_zero
 381                                         (mlx5_glue->destroy_flow_action
 382                                                (pool->counters_raw[j].action));
 383                                 if (!batch && pool->counters_raw[j].dcs)
 384                                         claim_zero(mlx5_devx_cmd_destroy
 385                                                   (pool->counters_raw[j].dcs));
 386                         }
 387                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 388                                      next);
 389                         rte_free(pool);
 390                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 391                 }
 392                 rte_free(sh->cmng.ccont[i].pools);
 393         }
 394         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 395         while (mng) {
 396                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 397                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 398         }
 399         memset(&sh->cmng, 0, sizeof(sh->cmng));
 400 }
 401
 402 /**
 403  * Extract pdn of PD object using DV API.
 404  *
 405  * @param[in] pd
 406  *   Pointer to the verbs PD object.
 407  * @param[out] pdn
 408  *   Pointer to the PD object number variable.
 409  *
 410  * @return
 411  *   0 on success, error value otherwise.
 412  */
 413 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 414 static int
 415 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 416 {
 417         struct mlx5dv_obj obj;
 418         struct mlx5dv_pd pd_info;
 419         int ret = 0;
 420
 421         obj.pd.in = pd;
 422         obj.pd.out = &pd_info;
 423         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 424         if (ret) {
 425                 DRV_LOG(DEBUG, "Fail to get PD object info");
 426                 return ret;
 427         }
 428         *pdn = pd_info.pdn;
 429         return 0;
 430 }
 431 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 432
 433 static int
 434 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
 435 {
 436         char *env;
 437         int value;
 438
 439         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 440         /* Get environment variable to store. */
 441         env = getenv(MLX5_SHUT_UP_BF);
 442         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
 443         if (config->dbnc == MLX5_ARG_UNSET)
 444                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
 445         else
 446                 setenv(MLX5_SHUT_UP_BF, config->dbnc ? "1" : "0", 1);
 447         return value;
 448 }
 449
 450 static void
 451 mlx5_restore_doorbell_mapping_env(int value)
 452 {
 453         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 454         /* Restore the original environment variable state. */
 455         if (value == MLX5_ARG_UNSET)
 456                 unsetenv(MLX5_SHUT_UP_BF);
 457         else
 458                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
 459 }
 460
 461 /**
 462  * Allocate shared IB device context. If there is multiport device the
 463  * master and representors will share this context, if there is single
 464  * port dedicated IB device, the context will be used by only given
 465  * port due to unification.
 466  *
 467  * Routine first searches the context for the specified IB device name,
 468  * if found the shared context assumed and reference counter is incremented.
 469  * If no context found the new one is created and initialized with specified
 470  * IB device context and parameters.
 471  *
 472  * @param[in] spawn
 473  *   Pointer to the IB device attributes (name, port, etc).
 474  * @param[in] config
 475  *   Pointer to device configuration structure.
 476  *
 477  * @return
 478  *   Pointer to mlx5_ibv_shared object on success,
 479  *   otherwise NULL and rte_errno is set.
 480  */
 481 static struct mlx5_ibv_shared *
 482 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
 483                         const struct mlx5_dev_config *config)
 484 {
 485         struct mlx5_ibv_shared *sh;
 486         int dbmap_env;
 487         int err = 0;
 488         uint32_t i;
 489 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 490         struct mlx5_devx_tis_attr tis_attr = { 0 };
 491 #endif
 492
 493         assert(spawn);
 494         /* Secondary process should not create the shared context. */
 495         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 496         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 497         /* Search for IB context by device name. */
 498         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 499                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 500                         sh->refcnt++;
 501                         goto exit;
 502                 }
 503         }
 504         /* No device found, we have to create new shared context. */
 505         assert(spawn->max_port);
 506         sh = rte_zmalloc("ethdev shared ib context",
 507                          sizeof(struct mlx5_ibv_shared) +
 508                          spawn->max_port *
 509                          sizeof(struct mlx5_ibv_shared_port),
 510                          RTE_CACHE_LINE_SIZE);
 511         if (!sh) {
 512                 DRV_LOG(ERR, "shared context allocation failure");
 513                 rte_errno  = ENOMEM;
 514                 goto exit;
 515         }
 516         /*
 517          * Configure environment variable "MLX5_BF_SHUT_UP"
 518          * before the device creation. The rdma_core library
 519          * checks the variable at device creation and
 520          * stores the result internally.
 521          */
 522         dbmap_env = mlx5_config_doorbell_mapping_env(config);
 523         /* Try to open IB device with DV first, then usual Verbs. */
 524         errno = 0;
 525         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 526         if (sh->ctx) {
 527                 sh->devx = 1;
 528                 DRV_LOG(DEBUG, "DevX is supported");
 529                 /* The device is created, no need for environment. */
 530                 mlx5_restore_doorbell_mapping_env(dbmap_env);
 531         } else {
 532                 /* The environment variable is still configured. */
 533                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 534                 err = errno ? errno : ENODEV;
 535                 /*
 536                  * The environment variable is not needed anymore,
 537                  * all device creation attempts are completed.
 538                  */
 539                 mlx5_restore_doorbell_mapping_env(dbmap_env);
 540                 if (!sh->ctx)
 541                         goto error;
 542                 DRV_LOG(DEBUG, "DevX is NOT supported");
 543         }
 544         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 545         if (err) {
 546                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 547                 goto error;
 548         }
 549         sh->refcnt = 1;
 550         sh->max_port = spawn->max_port;
 551         strncpy(sh->ibdev_name, sh->ctx->device->name,
 552                 sizeof(sh->ibdev_name));
 553         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 554                 sizeof(sh->ibdev_path));
 555         pthread_mutex_init(&sh->intr_mutex, NULL);
 556         /*
 557          * Setting port_id to max unallowed value means
 558          * there is no interrupt subhandler installed for
 559          * the given port index i.
 560          */
 561         for (i = 0; i < sh->max_port; i++) {
 562                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 563                 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
 564         }
 565         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 566         if (sh->pd == NULL) {
 567                 DRV_LOG(ERR, "PD allocation failure");
 568                 err = ENOMEM;
 569                 goto error;
 570         }
 571 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 572         if (sh->devx) {
 573                 err = mlx5_get_pdn(sh->pd, &sh->pdn);
 574                 if (err) {
 575                         DRV_LOG(ERR, "Fail to extract pdn from PD");
 576                         goto error;
 577                 }
 578                 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
 579                 if (!sh->td) {
 580                         DRV_LOG(ERR, "TD allocation failure");
 581                         err = ENOMEM;
 582                         goto error;
 583                 }
 584                 tis_attr.transport_domain = sh->td->id;
 585                 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
 586                 if (!sh->tis) {
 587                         DRV_LOG(ERR, "TIS allocation failure");
 588                         err = ENOMEM;
 589                         goto error;
 590                 }
 591         }
 592         sh->flow_id_pool = mlx5_flow_id_pool_alloc();
 593         if (!sh->flow_id_pool) {
 594                 DRV_LOG(ERR, "can't create flow id pool");
 595                 err = ENOMEM;
 596                 goto error;
 597         }
 598 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 599         /*
 600          * Once the device is added to the list of memory event
 601          * callback, its global MR cache table cannot be expanded
 602          * on the fly because of deadlock. If it overflows, lookup
 603          * should be done by searching MR list linearly, which is slow.
 604          *
 605          * At this point the device is not added to the memory
 606          * event list yet, context is just being created.
 607          */
 608         err = mlx5_mr_btree_init(&sh->mr.cache,
 609                                  MLX5_MR_BTREE_CACHE_N * 2,
 610                                  spawn->pci_dev->device.numa_node);
 611         if (err) {
 612                 err = rte_errno;
 613                 goto error;
 614         }
 615         mlx5_flow_counters_mng_init(sh);
 616         /* Add device to memory callback list. */
 617         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 618         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 619                          sh, mem_event_cb);
 620         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 621         /* Add context to the global device list. */
 622         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 623 exit:
 624         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 625         return sh;
 626 error:
 627         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 628         assert(sh);
 629         if (sh->tis)
 630                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 631         if (sh->td)
 632                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 633         if (sh->pd)
 634                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 635         if (sh->ctx)
 636                 claim_zero(mlx5_glue->close_device(sh->ctx));
 637         if (sh->flow_id_pool)
 638                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 639         rte_free(sh);
 640         assert(err > 0);
 641         rte_errno = err;
 642         return NULL;
 643 }
 644
 645 /**
 646  * Free shared IB device context. Decrement counter and if zero free
 647  * all allocated resources and close handles.
 648  *
 649  * @param[in] sh
 650  *   Pointer to mlx5_ibv_shared object to free
 651  */
 652 static void
 653 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 654 {
 655         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 656 #ifndef NDEBUG
 657         /* Check the object presence in the list. */
 658         struct mlx5_ibv_shared *lctx;
 659
 660         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 661                 if (lctx == sh)
 662                         break;
 663         assert(lctx);
 664         if (lctx != sh) {
 665                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 666                 goto exit;
 667         }
 668 #endif
 669         assert(sh);
 670         assert(sh->refcnt);
 671         /* Secondary process should not free the shared context. */
 672         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 673         if (--sh->refcnt)
 674                 goto exit;
 675         /* Release created Memory Regions. */
 676         mlx5_mr_release(sh);
 677         /* Remove from memory callback device list. */
 678         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 679         LIST_REMOVE(sh, mem_event_cb);
 680         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 681         /* Remove context from the global device list. */
 682         LIST_REMOVE(sh, next);
 683         /*
 684          *  Ensure there is no async event handler installed.
 685          *  Only primary process handles async device events.
 686          **/
 687         mlx5_flow_counters_mng_close(sh);
 688         assert(!sh->intr_cnt);
 689         if (sh->intr_cnt)
 690                 mlx5_intr_callback_unregister
 691                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 692 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
 693         if (sh->devx_intr_cnt) {
 694                 if (sh->intr_handle_devx.fd)
 695                         rte_intr_callback_unregister(&sh->intr_handle_devx,
 696                                           mlx5_dev_interrupt_handler_devx, sh);
 697                 if (sh->devx_comp)
 698                         mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
 699         }
 700 #endif
 701         pthread_mutex_destroy(&sh->intr_mutex);
 702         if (sh->pd)
 703                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 704         if (sh->tis)
 705                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 706         if (sh->td)
 707                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 708         if (sh->ctx)
 709                 claim_zero(mlx5_glue->close_device(sh->ctx));
 710         if (sh->flow_id_pool)
 711                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 712         rte_free(sh);
 713 exit:
 714         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 715 }
 716
 717 /**
 718  * Initialize DR related data within private structure.
 719  * Routine checks the reference counter and does actual
 720  * resources creation/initialization only if counter is zero.
 721  *
 722  * @param[in] priv
 723  *   Pointer to the private device data structure.
 724  *
 725  * @return
 726  *   Zero on success, positive error code otherwise.
 727  */
 728 static int
 729 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 730 {
 731 #ifdef HAVE_MLX5DV_DR
 732         struct mlx5_ibv_shared *sh = priv->sh;
 733         int err = 0;
 734         void *domain;
 735         char s[MLX5_HLIST_NAMESIZE];
 736
 737         assert(sh);
 738         if (sh->dv_refcnt) {
 739                 /* Shared DV/DR structures is already initialized. */
 740                 sh->dv_refcnt++;
 741                 priv->dr_shared = 1;
 742                 return 0;
 743         }
 744         /* Reference counter is zero, we should initialize structures. */
 745         domain = mlx5_glue->dr_create_domain(sh->ctx,
 746                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 747         if (!domain) {
 748                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 749                 err = errno;
 750                 goto error;
 751         }
 752         sh->rx_domain = domain;
 753         domain = mlx5_glue->dr_create_domain(sh->ctx,
 754                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 755         if (!domain) {
 756                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 757                 err = errno;
 758                 goto error;
 759         }
 760         pthread_mutex_init(&sh->dv_mutex, NULL);
 761         sh->tx_domain = domain;
 762 #ifdef HAVE_MLX5DV_DR_ESWITCH
 763         if (priv->config.dv_esw_en) {
 764                 domain  = mlx5_glue->dr_create_domain
 765                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 766                 if (!domain) {
 767                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 768                         err = errno;
 769                         goto error;
 770                 }
 771                 sh->fdb_domain = domain;
 772                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 773         }
 774 #endif
 775         snprintf(s, sizeof(s), "%s_flow_table", priv->sh->ibdev_name);
 776         sh->flow_tbls = mlx5_hlist_create(s,
 777                                           MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE);
 778         if (!sh->flow_tbls) {
 779                 DRV_LOG(ERR, "flow tables with hash creation failed.\n");
 780                 err = -ENOMEM;
 781                 goto error;
 782         }
 783         /* create tags hash list table. */
 784         snprintf(s, sizeof(s), "%s_tags", priv->sh->ibdev_name);
 785         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 786         if (!sh->flow_tbls) {
 787                 DRV_LOG(ERR, "tags with hash creation failed.\n");
 788                 err = -ENOMEM;
 789                 goto error;
 790         }
 791         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 792         sh->dv_refcnt++;
 793         priv->dr_shared = 1;
 794         return 0;
 795
 796 error:
 797        /* Rollback the created objects. */
 798         if (sh->rx_domain) {
 799                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 800                 sh->rx_domain = NULL;
 801         }
 802         if (sh->tx_domain) {
 803                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 804                 sh->tx_domain = NULL;
 805         }
 806         if (sh->fdb_domain) {
 807                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 808                 sh->fdb_domain = NULL;
 809         }
 810         if (sh->flow_tbls) {
 811                 mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
 812                 sh->flow_tbls = NULL;
 813         }
 814         if (sh->esw_drop_action) {
 815                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 816                 sh->esw_drop_action = NULL;
 817         }
 818         if (sh->pop_vlan_action) {
 819                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 820                 sh->pop_vlan_action = NULL;
 821         }
 822         return err;
 823 #else
 824         (void)priv;
 825         return 0;
 826 #endif
 827 }
 828
 829 /**
 830  * Destroy DR related data within private structure.
 831  *
 832  * @param[in] priv
 833  *   Pointer to the private device data structure.
 834  */
 835 static void
 836 mlx5_free_shared_dr(struct mlx5_priv *priv)
 837 {
 838 #ifdef HAVE_MLX5DV_DR
 839         struct mlx5_ibv_shared *sh;
 840
 841         if (!priv->dr_shared)
 842                 return;
 843         priv->dr_shared = 0;
 844         sh = priv->sh;
 845         assert(sh);
 846         assert(sh->dv_refcnt);
 847         if (sh->dv_refcnt && --sh->dv_refcnt)
 848                 return;
 849         if (sh->flow_tbls) {
 850                 /* flow table entries should be handled properly before. */
 851                 mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
 852                 sh->flow_tbls = NULL;
 853         }
 854         if (sh->tag_table) {
 855                 /* tags should be destroyed with flow before. */
 856                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 857                 sh->tag_table = NULL;
 858         }
 859         if (sh->rx_domain) {
 860                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 861                 sh->rx_domain = NULL;
 862         }
 863         if (sh->tx_domain) {
 864                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 865                 sh->tx_domain = NULL;
 866         }
 867 #ifdef HAVE_MLX5DV_DR_ESWITCH
 868         if (sh->fdb_domain) {
 869                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 870                 sh->fdb_domain = NULL;
 871         }
 872         if (sh->esw_drop_action) {
 873                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 874                 sh->esw_drop_action = NULL;
 875         }
 876 #endif
 877         if (sh->pop_vlan_action) {
 878                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 879                 sh->pop_vlan_action = NULL;
 880         }
 881         pthread_mutex_destroy(&sh->dv_mutex);
 882 #else
 883         (void)priv;
 884 #endif
 885 }
 886
 887 /**
 888  * Initialize shared data between primary and secondary process.
 889  *
 890  * A memzone is reserved by primary process and secondary processes attach to
 891  * the memzone.
 892  *
 893  * @return
 894  *   0 on success, a negative errno value otherwise and rte_errno is set.
 895  */
 896 static int
 897 mlx5_init_shared_data(void)
 898 {
 899         const struct rte_memzone *mz;
 900         int ret = 0;
 901
 902         rte_spinlock_lock(&mlx5_shared_data_lock);
 903         if (mlx5_shared_data == NULL) {
 904                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 905                         /* Allocate shared memory. */
 906                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 907                                                  sizeof(*mlx5_shared_data),
 908                                                  SOCKET_ID_ANY, 0);
 909                         if (mz == NULL) {
 910                                 DRV_LOG(ERR,
 911                                         "Cannot allocate mlx5 shared data");
 912                                 ret = -rte_errno;
 913                                 goto error;
 914                         }
 915                         mlx5_shared_data = mz->addr;
 916                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 917                         rte_spinlock_init(&mlx5_shared_data->lock);
 918                 } else {
 919                         /* Lookup allocated shared memory. */
 920                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 921                         if (mz == NULL) {
 922                                 DRV_LOG(ERR,
 923                                         "Cannot attach mlx5 shared data");
 924                                 ret = -rte_errno;
 925                                 goto error;
 926                         }
 927                         mlx5_shared_data = mz->addr;
 928                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 929                 }
 930         }
 931 error:
 932         rte_spinlock_unlock(&mlx5_shared_data_lock);
 933         return ret;
 934 }
 935
 936 /**
 937  * Retrieve integer value from environment variable.
 938  *
 939  * @param[in] name
 940  *   Environment variable name.
 941  *
 942  * @return
 943  *   Integer value, 0 if the variable is not set.
 944  */
 945 int
 946 mlx5_getenv_int(const char *name)
 947 {
 948         const char *val = getenv(name);
 949
 950         if (val == NULL)
 951                 return 0;
 952         return atoi(val);
 953 }
 954
 955 /**
 956  * Verbs callback to allocate a memory. This function should allocate the space
 957  * according to the size provided residing inside a huge page.
 958  * Please note that all allocation must respect the alignment from libmlx5
 959  * (i.e. currently sysconf(_SC_PAGESIZE)).
 960  *
 961  * @param[in] size
 962  *   The size in bytes of the memory to allocate.
 963  * @param[in] data
 964  *   A pointer to the callback data.
 965  *
 966  * @return
 967  *   Allocated buffer, NULL otherwise and rte_errno is set.
 968  */
 969 static void *
 970 mlx5_alloc_verbs_buf(size_t size, void *data)
 971 {
 972         struct mlx5_priv *priv = data;
 973         void *ret;
 974         size_t alignment = sysconf(_SC_PAGESIZE);
 975         unsigned int socket = SOCKET_ID_ANY;
 976
 977         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 978                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 979
 980                 socket = ctrl->socket;
 981         } else if (priv->verbs_alloc_ctx.type ==
 982                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 983                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 984
 985                 socket = ctrl->socket;
 986         }
 987         assert(data != NULL);
 988         ret = rte_malloc_socket(__func__, size, alignment, socket);
 989         if (!ret && size)
 990                 rte_errno = ENOMEM;
 991         return ret;
 992 }
 993
 994 /**
 995  * Verbs callback to free a memory.
 996  *
 997  * @param[in] ptr
 998  *   A pointer to the memory to free.
 999  * @param[in] data
1000  *   A pointer to the callback data.
1001  */
1002 static void
1003 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
1004 {
1005         assert(data != NULL);
1006         rte_free(ptr);
1007 }
1008
1009 /**
1010  * DPDK callback to add udp tunnel port
1011  *
1012  * @param[in] dev
1013  *   A pointer to eth_dev
1014  * @param[in] udp_tunnel
1015  *   A pointer to udp tunnel
1016  *
1017  * @return
1018  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
1019  */
1020 int
1021 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
1022                          struct rte_eth_udp_tunnel *udp_tunnel)
1023 {
1024         assert(udp_tunnel != NULL);
1025         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
1026             udp_tunnel->udp_port == 4789)
1027                 return 0;
1028         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
1029             udp_tunnel->udp_port == 4790)
1030                 return 0;
1031         return -ENOTSUP;
1032 }
1033
1034 /**
1035  * Initialize process private data structure.
1036  *
1037  * @param dev
1038  *   Pointer to Ethernet device structure.
1039  *
1040  * @return
1041  *   0 on success, a negative errno value otherwise and rte_errno is set.
1042  */
1043 int
1044 mlx5_proc_priv_init(struct rte_eth_dev *dev)
1045 {
1046         struct mlx5_priv *priv = dev->data->dev_private;
1047         struct mlx5_proc_priv *ppriv;
1048         size_t ppriv_size;
1049
1050         /*
1051          * UAR register table follows the process private structure. BlueFlame
1052          * registers for Tx queues are stored in the table.
1053          */
1054         ppriv_size =
1055                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
1056         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
1057                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1058         if (!ppriv) {
1059                 rte_errno = ENOMEM;
1060                 return -rte_errno;
1061         }
1062         ppriv->uar_table_sz = ppriv_size;
1063         dev->process_private = ppriv;
1064         return 0;
1065 }
1066
1067 /**
1068  * Un-initialize process private data structure.
1069  *
1070  * @param dev
1071  *   Pointer to Ethernet device structure.
1072  */
1073 static void
1074 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
1075 {
1076         if (!dev->process_private)
1077                 return;
1078         rte_free(dev->process_private);
1079         dev->process_private = NULL;
1080 }
1081
1082 /**
1083  * DPDK callback to close the device.
1084  *
1085  * Destroy all queues and objects, free memory.
1086  *
1087  * @param dev
1088  *   Pointer to Ethernet device structure.
1089  */
1090 static void
1091 mlx5_dev_close(struct rte_eth_dev *dev)
1092 {
1093         struct mlx5_priv *priv = dev->data->dev_private;
1094         unsigned int i;
1095         int ret;
1096
1097         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1098                 dev->data->port_id,
1099                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1100         /* In case mlx5_dev_stop() has not been called. */
1101         mlx5_dev_interrupt_handler_uninstall(dev);
1102         mlx5_dev_interrupt_handler_devx_uninstall(dev);
1103         mlx5_traffic_disable(dev);
1104         mlx5_flow_flush(dev, NULL);
1105         mlx5_flow_meter_flush(dev, NULL);
1106         /* Prevent crashes when queues are still in use. */
1107         dev->rx_pkt_burst = removed_rx_burst;
1108         dev->tx_pkt_burst = removed_tx_burst;
1109         rte_wmb();
1110         /* Disable datapath on secondary process. */
1111         mlx5_mp_req_stop_rxtx(dev);
1112         if (priv->rxqs != NULL) {
1113                 /* XXX race condition if mlx5_rx_burst() is still running. */
1114                 usleep(1000);
1115                 for (i = 0; (i != priv->rxqs_n); ++i)
1116                         mlx5_rxq_release(dev, i);
1117                 priv->rxqs_n = 0;
1118                 priv->rxqs = NULL;
1119         }
1120         if (priv->txqs != NULL) {
1121                 /* XXX race condition if mlx5_tx_burst() is still running. */
1122                 usleep(1000);
1123                 for (i = 0; (i != priv->txqs_n); ++i)
1124                         mlx5_txq_release(dev, i);
1125                 priv->txqs_n = 0;
1126                 priv->txqs = NULL;
1127         }
1128         mlx5_proc_priv_uninit(dev);
1129         if (priv->mreg_cp_tbl)
1130                 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1131         mlx5_mprq_free_mp(dev);
1132         mlx5_free_shared_dr(priv);
1133         if (priv->rss_conf.rss_key != NULL)
1134                 rte_free(priv->rss_conf.rss_key);
1135         if (priv->reta_idx != NULL)
1136                 rte_free(priv->reta_idx);
1137         if (priv->config.vf)
1138                 mlx5_nl_mac_addr_flush(dev);
1139         if (priv->nl_socket_route >= 0)
1140                 close(priv->nl_socket_route);
1141         if (priv->nl_socket_rdma >= 0)
1142                 close(priv->nl_socket_rdma);
1143         if (priv->vmwa_context)
1144                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1145         if (priv->sh) {
1146                 /*
1147                  * Free the shared context in last turn, because the cleanup
1148                  * routines above may use some shared fields, like
1149                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1150                  * ifindex if Netlink fails.
1151                  */
1152                 mlx5_free_shared_ibctx(priv->sh);
1153                 priv->sh = NULL;
1154         }
1155         ret = mlx5_hrxq_verify(dev);
1156         if (ret)
1157                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1158                         dev->data->port_id);
1159         ret = mlx5_ind_table_obj_verify(dev);
1160         if (ret)
1161                 DRV_LOG(WARNING, "port %u some indirection table still remain",
1162                         dev->data->port_id);
1163         ret = mlx5_rxq_obj_verify(dev);
1164         if (ret)
1165                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1166                         dev->data->port_id);
1167         ret = mlx5_rxq_verify(dev);
1168         if (ret)
1169                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1170                         dev->data->port_id);
1171         ret = mlx5_txq_obj_verify(dev);
1172         if (ret)
1173                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1174                         dev->data->port_id);
1175         ret = mlx5_txq_verify(dev);
1176         if (ret)
1177                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1178                         dev->data->port_id);
1179         ret = mlx5_flow_verify(dev);
1180         if (ret)
1181                 DRV_LOG(WARNING, "port %u some flows still remain",
1182                         dev->data->port_id);
1183         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1184                 unsigned int c = 0;
1185                 uint16_t port_id;
1186
1187                 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1188                         struct mlx5_priv *opriv =
1189                                 rte_eth_devices[port_id].data->dev_private;
1190
1191                         if (!opriv ||
1192                             opriv->domain_id != priv->domain_id ||
1193                             &rte_eth_devices[port_id] == dev)
1194                                 continue;
1195                         ++c;
1196                         break;
1197                 }
1198                 if (!c)
1199                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1200         }
1201         memset(priv, 0, sizeof(*priv));
1202         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1203         /*
1204          * Reset mac_addrs to NULL such that it is not freed as part of
1205          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1206          * it is freed when dev_private is freed.
1207          */
1208         dev->data->mac_addrs = NULL;
1209 }
1210
1211 const struct eth_dev_ops mlx5_dev_ops = {
1212         .dev_configure = mlx5_dev_configure,
1213         .dev_start = mlx5_dev_start,
1214         .dev_stop = mlx5_dev_stop,
1215         .dev_set_link_down = mlx5_set_link_down,
1216         .dev_set_link_up = mlx5_set_link_up,
1217         .dev_close = mlx5_dev_close,
1218         .promiscuous_enable = mlx5_promiscuous_enable,
1219         .promiscuous_disable = mlx5_promiscuous_disable,
1220         .allmulticast_enable = mlx5_allmulticast_enable,
1221         .allmulticast_disable = mlx5_allmulticast_disable,
1222         .link_update = mlx5_link_update,
1223         .stats_get = mlx5_stats_get,
1224         .stats_reset = mlx5_stats_reset,
1225         .xstats_get = mlx5_xstats_get,
1226         .xstats_reset = mlx5_xstats_reset,
1227         .xstats_get_names = mlx5_xstats_get_names,
1228         .fw_version_get = mlx5_fw_version_get,
1229         .dev_infos_get = mlx5_dev_infos_get,
1230         .read_clock = mlx5_read_clock,
1231         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1232         .vlan_filter_set = mlx5_vlan_filter_set,
1233         .rx_queue_setup = mlx5_rx_queue_setup,
1234         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1235         .tx_queue_setup = mlx5_tx_queue_setup,
1236         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1237         .rx_queue_release = mlx5_rx_queue_release,
1238         .tx_queue_release = mlx5_tx_queue_release,
1239         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1240         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1241         .mac_addr_remove = mlx5_mac_addr_remove,
1242         .mac_addr_add = mlx5_mac_addr_add,
1243         .mac_addr_set = mlx5_mac_addr_set,
1244         .set_mc_addr_list = mlx5_set_mc_addr_list,
1245         .mtu_set = mlx5_dev_set_mtu,
1246         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1247         .vlan_offload_set = mlx5_vlan_offload_set,
1248         .reta_update = mlx5_dev_rss_reta_update,
1249         .reta_query = mlx5_dev_rss_reta_query,
1250         .rss_hash_update = mlx5_rss_hash_update,
1251         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1252         .filter_ctrl = mlx5_dev_filter_ctrl,
1253         .rx_descriptor_status = mlx5_rx_descriptor_status,
1254         .tx_descriptor_status = mlx5_tx_descriptor_status,
1255         .rx_queue_count = mlx5_rx_queue_count,
1256         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1257         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1258         .is_removed = mlx5_is_removed,
1259         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1260         .get_module_info = mlx5_get_module_info,
1261         .get_module_eeprom = mlx5_get_module_eeprom,
1262         .hairpin_cap_get = mlx5_hairpin_cap_get,
1263         .mtr_ops_get = mlx5_flow_meter_ops_get,
1264 };
1265
1266 /* Available operations from secondary process. */
1267 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1268         .stats_get = mlx5_stats_get,
1269         .stats_reset = mlx5_stats_reset,
1270         .xstats_get = mlx5_xstats_get,
1271         .xstats_reset = mlx5_xstats_reset,
1272         .xstats_get_names = mlx5_xstats_get_names,
1273         .fw_version_get = mlx5_fw_version_get,
1274         .dev_infos_get = mlx5_dev_infos_get,
1275         .rx_descriptor_status = mlx5_rx_descriptor_status,
1276         .tx_descriptor_status = mlx5_tx_descriptor_status,
1277         .get_module_info = mlx5_get_module_info,
1278         .get_module_eeprom = mlx5_get_module_eeprom,
1279 };
1280
1281 /* Available operations in flow isolated mode. */
1282 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1283         .dev_configure = mlx5_dev_configure,
1284         .dev_start = mlx5_dev_start,
1285         .dev_stop = mlx5_dev_stop,
1286         .dev_set_link_down = mlx5_set_link_down,
1287         .dev_set_link_up = mlx5_set_link_up,
1288         .dev_close = mlx5_dev_close,
1289         .promiscuous_enable = mlx5_promiscuous_enable,
1290         .promiscuous_disable = mlx5_promiscuous_disable,
1291         .allmulticast_enable = mlx5_allmulticast_enable,
1292         .allmulticast_disable = mlx5_allmulticast_disable,
1293         .link_update = mlx5_link_update,
1294         .stats_get = mlx5_stats_get,
1295         .stats_reset = mlx5_stats_reset,
1296         .xstats_get = mlx5_xstats_get,
1297         .xstats_reset = mlx5_xstats_reset,
1298         .xstats_get_names = mlx5_xstats_get_names,
1299         .fw_version_get = mlx5_fw_version_get,
1300         .dev_infos_get = mlx5_dev_infos_get,
1301         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1302         .vlan_filter_set = mlx5_vlan_filter_set,
1303         .rx_queue_setup = mlx5_rx_queue_setup,
1304         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1305         .tx_queue_setup = mlx5_tx_queue_setup,
1306         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1307         .rx_queue_release = mlx5_rx_queue_release,
1308         .tx_queue_release = mlx5_tx_queue_release,
1309         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1310         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1311         .mac_addr_remove = mlx5_mac_addr_remove,
1312         .mac_addr_add = mlx5_mac_addr_add,
1313         .mac_addr_set = mlx5_mac_addr_set,
1314         .set_mc_addr_list = mlx5_set_mc_addr_list,
1315         .mtu_set = mlx5_dev_set_mtu,
1316         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1317         .vlan_offload_set = mlx5_vlan_offload_set,
1318         .filter_ctrl = mlx5_dev_filter_ctrl,
1319         .rx_descriptor_status = mlx5_rx_descriptor_status,
1320         .tx_descriptor_status = mlx5_tx_descriptor_status,
1321         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1322         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1323         .is_removed = mlx5_is_removed,
1324         .get_module_info = mlx5_get_module_info,
1325         .get_module_eeprom = mlx5_get_module_eeprom,
1326         .hairpin_cap_get = mlx5_hairpin_cap_get,
1327         .mtr_ops_get = mlx5_flow_meter_ops_get,
1328 };
1329
1330 /**
1331  * Verify and store value for device argument.
1332  *
1333  * @param[in] key
1334  *   Key argument to verify.
1335  * @param[in] val
1336  *   Value associated with key.
1337  * @param opaque
1338  *   User data.
1339  *
1340  * @return
1341  *   0 on success, a negative errno value otherwise and rte_errno is set.
1342  */
1343 static int
1344 mlx5_args_check(const char *key, const char *val, void *opaque)
1345 {
1346         struct mlx5_dev_config *config = opaque;
1347         unsigned long tmp;
1348
1349         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1350         if (!strcmp(MLX5_REPRESENTOR, key))
1351                 return 0;
1352         errno = 0;
1353         tmp = strtoul(val, NULL, 0);
1354         if (errno) {
1355                 rte_errno = errno;
1356                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1357                 return -rte_errno;
1358         }
1359         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1360                 config->cqe_comp = !!tmp;
1361         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1362                 config->cqe_pad = !!tmp;
1363         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1364                 config->hw_padding = !!tmp;
1365         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1366                 config->mprq.enabled = !!tmp;
1367         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1368                 config->mprq.stride_num_n = tmp;
1369         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1370                 config->mprq.max_memcpy_len = tmp;
1371         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1372                 config->mprq.min_rxqs_num = tmp;
1373         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1374                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1375                                  " converted to txq_inline_max", key);
1376                 config->txq_inline_max = tmp;
1377         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1378                 config->txq_inline_max = tmp;
1379         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1380                 config->txq_inline_min = tmp;
1381         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1382                 config->txq_inline_mpw = tmp;
1383         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1384                 config->txqs_inline = tmp;
1385         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1386                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1387         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1388                 config->mps = !!tmp;
1389         } else if (strcmp(MLX5_TX_DB_NC, key) == 0) {
1390                 config->dbnc = !!tmp;
1391         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1392                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1393         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1394                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1395                                  " converted to txq_inline_mpw", key);
1396                 config->txq_inline_mpw = tmp;
1397         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1398                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1399         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1400                 config->rx_vec_en = !!tmp;
1401         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1402                 config->l3_vxlan_en = !!tmp;
1403         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1404                 config->vf_nl_en = !!tmp;
1405         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1406                 config->dv_esw_en = !!tmp;
1407         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1408                 config->dv_flow_en = !!tmp;
1409         } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1410                 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1411                     tmp != MLX5_XMETA_MODE_META16 &&
1412                     tmp != MLX5_XMETA_MODE_META32) {
1413                         DRV_LOG(WARNING, "invalid extensive "
1414                                          "metadata parameter");
1415                         rte_errno = EINVAL;
1416                         return -rte_errno;
1417                 }
1418                 config->dv_xmeta_en = tmp;
1419         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1420                 config->mr_ext_memseg_en = !!tmp;
1421         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1422                 config->max_dump_files_num = tmp;
1423         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1424                 config->lro.timeout = tmp;
1425         } else {
1426                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1427                 rte_errno = EINVAL;
1428                 return -rte_errno;
1429         }
1430         return 0;
1431 }
1432
1433 /**
1434  * Parse device parameters.
1435  *
1436  * @param config
1437  *   Pointer to device configuration structure.
1438  * @param devargs
1439  *   Device arguments structure.
1440  *
1441  * @return
1442  *   0 on success, a negative errno value otherwise and rte_errno is set.
1443  */
1444 static int
1445 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1446 {
1447         const char **params = (const char *[]){
1448                 MLX5_RXQ_CQE_COMP_EN,
1449                 MLX5_RXQ_CQE_PAD_EN,
1450                 MLX5_RXQ_PKT_PAD_EN,
1451                 MLX5_RX_MPRQ_EN,
1452                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1453                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1454                 MLX5_RXQS_MIN_MPRQ,
1455                 MLX5_TXQ_INLINE,
1456                 MLX5_TXQ_INLINE_MIN,
1457                 MLX5_TXQ_INLINE_MAX,
1458                 MLX5_TXQ_INLINE_MPW,
1459                 MLX5_TXQS_MIN_INLINE,
1460                 MLX5_TXQS_MAX_VEC,
1461                 MLX5_TXQ_MPW_EN,
1462                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1463                 MLX5_TXQ_MAX_INLINE_LEN,
1464                 MLX5_TX_DB_NC,
1465                 MLX5_TX_VEC_EN,
1466                 MLX5_RX_VEC_EN,
1467                 MLX5_L3_VXLAN_EN,
1468                 MLX5_VF_NL_EN,
1469                 MLX5_DV_ESW_EN,
1470                 MLX5_DV_FLOW_EN,
1471                 MLX5_DV_XMETA_EN,
1472                 MLX5_MR_EXT_MEMSEG_EN,
1473                 MLX5_REPRESENTOR,
1474                 MLX5_MAX_DUMP_FILES_NUM,
1475                 MLX5_LRO_TIMEOUT_USEC,
1476                 NULL,
1477         };
1478         struct rte_kvargs *kvlist;
1479         int ret = 0;
1480         int i;
1481
1482         if (devargs == NULL)
1483                 return 0;
1484         /* Following UGLY cast is done to pass checkpatch. */
1485         kvlist = rte_kvargs_parse(devargs->args, params);
1486         if (kvlist == NULL) {
1487                 rte_errno = EINVAL;
1488                 return -rte_errno;
1489         }
1490         /* Process parameters. */
1491         for (i = 0; (params[i] != NULL); ++i) {
1492                 if (rte_kvargs_count(kvlist, params[i])) {
1493                         ret = rte_kvargs_process(kvlist, params[i],
1494                                                  mlx5_args_check, config);
1495                         if (ret) {
1496                                 rte_errno = EINVAL;
1497                                 rte_kvargs_free(kvlist);
1498                                 return -rte_errno;
1499                         }
1500                 }
1501         }
1502         rte_kvargs_free(kvlist);
1503         return 0;
1504 }
1505
1506 static struct rte_pci_driver mlx5_driver;
1507
1508 /**
1509  * PMD global initialization.
1510  *
1511  * Independent from individual device, this function initializes global
1512  * per-PMD data structures distinguishing primary and secondary processes.
1513  * Hence, each initialization is called once per a process.
1514  *
1515  * @return
1516  *   0 on success, a negative errno value otherwise and rte_errno is set.
1517  */
1518 static int
1519 mlx5_init_once(void)
1520 {
1521         struct mlx5_shared_data *sd;
1522         struct mlx5_local_data *ld = &mlx5_local_data;
1523         int ret = 0;
1524
1525         if (mlx5_init_shared_data())
1526                 return -rte_errno;
1527         sd = mlx5_shared_data;
1528         assert(sd);
1529         rte_spinlock_lock(&sd->lock);
1530         switch (rte_eal_process_type()) {
1531         case RTE_PROC_PRIMARY:
1532                 if (sd->init_done)
1533                         break;
1534                 LIST_INIT(&sd->mem_event_cb_list);
1535                 rte_rwlock_init(&sd->mem_event_rwlock);
1536                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1537                                                 mlx5_mr_mem_event_cb, NULL);
1538                 ret = mlx5_mp_init_primary();
1539                 if (ret)
1540                         goto out;
1541                 sd->init_done = true;
1542                 break;
1543         case RTE_PROC_SECONDARY:
1544                 if (ld->init_done)
1545                         break;
1546                 ret = mlx5_mp_init_secondary();
1547                 if (ret)
1548                         goto out;
1549                 ++sd->secondary_cnt;
1550                 ld->init_done = true;
1551                 break;
1552         default:
1553                 break;
1554         }
1555 out:
1556         rte_spinlock_unlock(&sd->lock);
1557         return ret;
1558 }
1559
1560 /**
1561  * Configures the minimal amount of data to inline into WQE
1562  * while sending packets.
1563  *
1564  * - the txq_inline_min has the maximal priority, if this
1565  *   key is specified in devargs
1566  * - if DevX is enabled the inline mode is queried from the
1567  *   device (HCA attributes and NIC vport context if needed).
1568  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1569  *   and none (0 bytes) for other NICs
1570  *
1571  * @param spawn
1572  *   Verbs device parameters (name, port, switch_info) to spawn.
1573  * @param config
1574  *   Device configuration parameters.
1575  */
1576 static void
1577 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1578                     struct mlx5_dev_config *config)
1579 {
1580         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1581                 /* Application defines size of inlined data explicitly. */
1582                 switch (spawn->pci_dev->id.device_id) {
1583                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1584                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1585                         if (config->txq_inline_min <
1586                                        (int)MLX5_INLINE_HSIZE_L2) {
1587                                 DRV_LOG(DEBUG,
1588                                         "txq_inline_mix aligned to minimal"
1589                                         " ConnectX-4 required value %d",
1590                                         (int)MLX5_INLINE_HSIZE_L2);
1591                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1592                         }
1593                         break;
1594                 }
1595                 goto exit;
1596         }
1597         if (config->hca_attr.eth_net_offloads) {
1598                 /* We have DevX enabled, inline mode queried successfully. */
1599                 switch (config->hca_attr.wqe_inline_mode) {
1600                 case MLX5_CAP_INLINE_MODE_L2:
1601                         /* outer L2 header must be inlined. */
1602                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1603                         goto exit;
1604                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1605                         /* No inline data are required by NIC. */
1606                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1607                         config->hw_vlan_insert =
1608                                 config->hca_attr.wqe_vlan_insert;
1609                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1610                         goto exit;
1611                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1612                         /* inline mode is defined by NIC vport context. */
1613                         if (!config->hca_attr.eth_virt)
1614                                 break;
1615                         switch (config->hca_attr.vport_inline_mode) {
1616                         case MLX5_INLINE_MODE_NONE:
1617                                 config->txq_inline_min =
1618                                         MLX5_INLINE_HSIZE_NONE;
1619                                 goto exit;
1620                         case MLX5_INLINE_MODE_L2:
1621                                 config->txq_inline_min =
1622                                         MLX5_INLINE_HSIZE_L2;
1623                                 goto exit;
1624                         case MLX5_INLINE_MODE_IP:
1625                                 config->txq_inline_min =
1626                                         MLX5_INLINE_HSIZE_L3;
1627                                 goto exit;
1628                         case MLX5_INLINE_MODE_TCP_UDP:
1629                                 config->txq_inline_min =
1630                                         MLX5_INLINE_HSIZE_L4;
1631                                 goto exit;
1632                         case MLX5_INLINE_MODE_INNER_L2:
1633                                 config->txq_inline_min =
1634                                         MLX5_INLINE_HSIZE_INNER_L2;
1635                                 goto exit;
1636                         case MLX5_INLINE_MODE_INNER_IP:
1637                                 config->txq_inline_min =
1638                                         MLX5_INLINE_HSIZE_INNER_L3;
1639                                 goto exit;
1640                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1641                                 config->txq_inline_min =
1642                                         MLX5_INLINE_HSIZE_INNER_L4;
1643                                 goto exit;
1644                         }
1645                 }
1646         }
1647         /*
1648          * We get here if we are unable to deduce
1649          * inline data size with DevX. Try PCI ID
1650          * to determine old NICs.
1651          */
1652         switch (spawn->pci_dev->id.device_id) {
1653         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1654         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1655         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1656         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1657                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1658                 config->hw_vlan_insert = 0;
1659                 break;
1660         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1661         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1662         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1663         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1664                 /*
1665                  * These NICs support VLAN insertion from WQE and
1666                  * report the wqe_vlan_insert flag. But there is the bug
1667                  * and PFC control may be broken, so disable feature.
1668                  */
1669                 config->hw_vlan_insert = 0;
1670                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1671                 break;
1672         default:
1673                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1674                 break;
1675         }
1676 exit:
1677         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1678 }
1679
1680 /**
1681  * Configures the metadata mask fields in the shared context.
1682  *
1683  * @param [in] dev
1684  *   Pointer to Ethernet device.
1685  */
1686 static void
1687 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1688 {
1689         struct mlx5_priv *priv = dev->data->dev_private;
1690         struct mlx5_ibv_shared *sh = priv->sh;
1691         uint32_t meta, mark, reg_c0;
1692
1693         reg_c0 = ~priv->vport_meta_mask;
1694         switch (priv->config.dv_xmeta_en) {
1695         case MLX5_XMETA_MODE_LEGACY:
1696                 meta = UINT32_MAX;
1697                 mark = MLX5_FLOW_MARK_MASK;
1698                 break;
1699         case MLX5_XMETA_MODE_META16:
1700                 meta = reg_c0 >> rte_bsf32(reg_c0);
1701                 mark = MLX5_FLOW_MARK_MASK;
1702                 break;
1703         case MLX5_XMETA_MODE_META32:
1704                 meta = UINT32_MAX;
1705                 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1706                 break;
1707         default:
1708                 meta = 0;
1709                 mark = 0;
1710                 assert(false);
1711                 break;
1712         }
1713         if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1714                 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1715                                  sh->dv_mark_mask, mark);
1716         else
1717                 sh->dv_mark_mask = mark;
1718         if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1719                 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1720                                  sh->dv_meta_mask, meta);
1721         else
1722                 sh->dv_meta_mask = meta;
1723         if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1724                 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1725                                  sh->dv_meta_mask, reg_c0);
1726         else
1727                 sh->dv_regc0_mask = reg_c0;
1728         DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1729         DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1730         DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1731         DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1732 }
1733
1734 /**
1735  * Allocate page of door-bells and register it using DevX API.
1736  *
1737  * @param [in] dev
1738  *   Pointer to Ethernet device.
1739  *
1740  * @return
1741  *   Pointer to new page on success, NULL otherwise.
1742  */
1743 static struct mlx5_devx_dbr_page *
1744 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1745 {
1746         struct mlx5_priv *priv = dev->data->dev_private;
1747         struct mlx5_devx_dbr_page *page;
1748
1749         /* Allocate space for door-bell page and management data. */
1750         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1751                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1752         if (!page) {
1753                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1754                         dev->data->port_id);
1755                 return NULL;
1756         }
1757         /* Register allocated memory. */
1758         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1759                                               MLX5_DBR_PAGE_SIZE, 0);
1760         if (!page->umem) {
1761                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1762                         dev->data->port_id);
1763                 rte_free(page);
1764                 return NULL;
1765         }
1766         return page;
1767 }
1768
1769 /**
1770  * Find the next available door-bell, allocate new page if needed.
1771  *
1772  * @param [in] dev
1773  *   Pointer to Ethernet device.
1774  * @param [out] dbr_page
1775  *   Door-bell page containing the page data.
1776  *
1777  * @return
1778  *   Door-bell address offset on success, a negative error value otherwise.
1779  */
1780 int64_t
1781 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1782 {
1783         struct mlx5_priv *priv = dev->data->dev_private;
1784         struct mlx5_devx_dbr_page *page = NULL;
1785         uint32_t i, j;
1786
1787         LIST_FOREACH(page, &priv->dbrpgs, next)
1788                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1789                         break;
1790         if (!page) { /* No page with free door-bell exists. */
1791                 page = mlx5_alloc_dbr_page(dev);
1792                 if (!page) /* Failed to allocate new page. */
1793                         return (-1);
1794                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1795         }
1796         /* Loop to find bitmap part with clear bit. */
1797         for (i = 0;
1798              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1799              i++)
1800                 ; /* Empty. */
1801         /* Find the first clear bit. */
1802         j = rte_bsf64(~page->dbr_bitmap[i]);
1803         assert(i < (MLX5_DBR_PER_PAGE / 64));
1804         page->dbr_bitmap[i] |= (1 << j);
1805         page->dbr_count++;
1806         *dbr_page = page;
1807         return (((i * 64) + j) * sizeof(uint64_t));
1808 }
1809
1810 /**
1811  * Release a door-bell record.
1812  *
1813  * @param [in] dev
1814  *   Pointer to Ethernet device.
1815  * @param [in] umem_id
1816  *   UMEM ID of page containing the door-bell record to release.
1817  * @param [in] offset
1818  *   Offset of door-bell record in page.
1819  *
1820  * @return
1821  *   0 on success, a negative error value otherwise.
1822  */
1823 int32_t
1824 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1825 {
1826         struct mlx5_priv *priv = dev->data->dev_private;
1827         struct mlx5_devx_dbr_page *page = NULL;
1828         int ret = 0;
1829
1830         LIST_FOREACH(page, &priv->dbrpgs, next)
1831                 /* Find the page this address belongs to. */
1832                 if (page->umem->umem_id == umem_id)
1833                         break;
1834         if (!page)
1835                 return -EINVAL;
1836         page->dbr_count--;
1837         if (!page->dbr_count) {
1838                 /* Page not used, free it and remove from list. */
1839                 LIST_REMOVE(page, next);
1840                 if (page->umem)
1841                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1842                 rte_free(page);
1843         } else {
1844                 /* Mark in bitmap that this door-bell is not in use. */
1845                 offset /= MLX5_DBR_SIZE;
1846                 int i = offset / 64;
1847                 int j = offset % 64;
1848
1849                 page->dbr_bitmap[i] &= ~(1 << j);
1850         }
1851         return ret;
1852 }
1853
1854 /**
1855  * Check sibling device configurations.
1856  *
1857  * Sibling devices sharing the Infiniband device context
1858  * should have compatible configurations. This regards
1859  * representors and bonding slaves.
1860  *
1861  * @param priv
1862  *   Private device descriptor.
1863  * @param config
1864  *   Configuration of the device is going to be created.
1865  *
1866  * @return
1867  *   0 on success, EINVAL otherwise
1868  */
1869 static int
1870 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1871                               struct mlx5_dev_config *config)
1872 {
1873         struct mlx5_ibv_shared *sh = priv->sh;
1874         struct mlx5_dev_config *sh_conf = NULL;
1875         uint16_t port_id;
1876
1877         assert(sh);
1878         /* Nothing to compare for the single/first device. */
1879         if (sh->refcnt == 1)
1880                 return 0;
1881         /* Find the device with shared context. */
1882         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1883                 struct mlx5_priv *opriv =
1884                         rte_eth_devices[port_id].data->dev_private;
1885
1886                 if (opriv && opriv != priv && opriv->sh == sh) {
1887                         sh_conf = &opriv->config;
1888                         break;
1889                 }
1890         }
1891         if (!sh_conf)
1892                 return 0;
1893         if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1894                 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1895                              " for shared %s context", sh->ibdev_name);
1896                 rte_errno = EINVAL;
1897                 return rte_errno;
1898         }
1899         if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
1900                 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
1901                              " for shared %s context", sh->ibdev_name);
1902                 rte_errno = EINVAL;
1903                 return rte_errno;
1904         }
1905         return 0;
1906 }
1907 /**
1908  * Spawn an Ethernet device from Verbs information.
1909  *
1910  * @param dpdk_dev
1911  *   Backing DPDK device.
1912  * @param spawn
1913  *   Verbs device parameters (name, port, switch_info) to spawn.
1914  * @param config
1915  *   Device configuration parameters.
1916  *
1917  * @return
1918  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1919  *   is set. The following errors are defined:
1920  *
1921  *   EBUSY: device is not supposed to be spawned.
1922  *   EEXIST: device is already spawned
1923  */
1924 static struct rte_eth_dev *
1925 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1926                struct mlx5_dev_spawn_data *spawn,
1927                struct mlx5_dev_config config)
1928 {
1929         const struct mlx5_switch_info *switch_info = &spawn->info;
1930         struct mlx5_ibv_shared *sh = NULL;
1931         struct ibv_port_attr port_attr;
1932         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1933         struct rte_eth_dev *eth_dev = NULL;
1934         struct mlx5_priv *priv = NULL;
1935         int err = 0;
1936         unsigned int hw_padding = 0;
1937         unsigned int mps;
1938         unsigned int cqe_comp;
1939         unsigned int cqe_pad = 0;
1940         unsigned int tunnel_en = 0;
1941         unsigned int mpls_en = 0;
1942         unsigned int swp = 0;
1943         unsigned int mprq = 0;
1944         unsigned int mprq_min_stride_size_n = 0;
1945         unsigned int mprq_max_stride_size_n = 0;
1946         unsigned int mprq_min_stride_num_n = 0;
1947         unsigned int mprq_max_stride_num_n = 0;
1948         struct rte_ether_addr mac;
1949         char name[RTE_ETH_NAME_MAX_LEN];
1950         int own_domain_id = 0;
1951         uint16_t port_id;
1952         unsigned int i;
1953 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1954         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
1955 #endif
1956
1957         /* Determine if this port representor is supposed to be spawned. */
1958         if (switch_info->representor && dpdk_dev->devargs) {
1959                 struct rte_eth_devargs eth_da;
1960
1961                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1962                 if (err) {
1963                         rte_errno = -err;
1964                         DRV_LOG(ERR, "failed to process device arguments: %s",
1965                                 strerror(rte_errno));
1966                         return NULL;
1967                 }
1968                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1969                         if (eth_da.representor_ports[i] ==
1970                             (uint16_t)switch_info->port_name)
1971                                 break;
1972                 if (i == eth_da.nb_representor_ports) {
1973                         rte_errno = EBUSY;
1974                         return NULL;
1975                 }
1976         }
1977         /* Build device name. */
1978         if (spawn->pf_bond <  0) {
1979                 /* Single device. */
1980                 if (!switch_info->representor)
1981                         strlcpy(name, dpdk_dev->name, sizeof(name));
1982                 else
1983                         snprintf(name, sizeof(name), "%s_representor_%u",
1984                                  dpdk_dev->name, switch_info->port_name);
1985         } else {
1986                 /* Bonding device. */
1987                 if (!switch_info->representor)
1988                         snprintf(name, sizeof(name), "%s_%s",
1989                                  dpdk_dev->name, spawn->ibv_dev->name);
1990                 else
1991                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
1992                                  dpdk_dev->name, spawn->ibv_dev->name,
1993                                  switch_info->port_name);
1994         }
1995         /* check if the device is already spawned */
1996         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1997                 rte_errno = EEXIST;
1998                 return NULL;
1999         }
2000         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
2001         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
2002                 eth_dev = rte_eth_dev_attach_secondary(name);
2003                 if (eth_dev == NULL) {
2004                         DRV_LOG(ERR, "can not attach rte ethdev");
2005                         rte_errno = ENOMEM;
2006                         return NULL;
2007                 }
2008                 eth_dev->device = dpdk_dev;
2009                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
2010                 err = mlx5_proc_priv_init(eth_dev);
2011                 if (err)
2012                         return NULL;
2013                 /* Receive command fd from primary process */
2014                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
2015                 if (err < 0)
2016                         return NULL;
2017                 /* Remap UAR for Tx queues. */
2018                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
2019                 if (err)
2020                         return NULL;
2021                 /*
2022                  * Ethdev pointer is still required as input since
2023                  * the primary device is not accessible from the
2024                  * secondary process.
2025                  */
2026                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
2027                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
2028                 return eth_dev;
2029         }
2030         /*
2031          * Some parameters ("tx_db_nc" in particularly) are needed in
2032          * advance to create dv/verbs device context. We proceed the
2033          * devargs here to get ones, and later proceed devargs again
2034          * to override some hardware settings.
2035          */
2036         err = mlx5_args(&config, dpdk_dev->devargs);
2037         if (err) {
2038                 err = rte_errno;
2039                 DRV_LOG(ERR, "failed to process device arguments: %s",
2040                         strerror(rte_errno));
2041                 goto error;
2042         }
2043         sh = mlx5_alloc_shared_ibctx(spawn, &config);
2044         if (!sh)
2045                 return NULL;
2046         config.devx = sh->devx;
2047 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
2048         config.dest_tir = 1;
2049 #endif
2050 #ifdef HAVE_IBV_MLX5_MOD_SWP
2051         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
2052 #endif
2053         /*
2054          * Multi-packet send is supported by ConnectX-4 Lx PF as well
2055          * as all ConnectX-5 devices.
2056          */
2057 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2058         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
2059 #endif
2060 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2061         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
2062 #endif
2063         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
2064         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
2065                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
2066                         DRV_LOG(DEBUG, "enhanced MPW is supported");
2067                         mps = MLX5_MPW_ENHANCED;
2068                 } else {
2069                         DRV_LOG(DEBUG, "MPW is supported");
2070                         mps = MLX5_MPW;
2071                 }
2072         } else {
2073                 DRV_LOG(DEBUG, "MPW isn't supported");
2074                 mps = MLX5_MPW_DISABLED;
2075         }
2076 #ifdef HAVE_IBV_MLX5_MOD_SWP
2077         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
2078                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
2079         DRV_LOG(DEBUG, "SWP support: %u", swp);
2080 #endif
2081         config.swp = !!swp;
2082 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2083         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
2084                 struct mlx5dv_striding_rq_caps mprq_caps =
2085                         dv_attr.striding_rq_caps;
2086
2087                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
2088                         mprq_caps.min_single_stride_log_num_of_bytes);
2089                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
2090                         mprq_caps.max_single_stride_log_num_of_bytes);
2091                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
2092                         mprq_caps.min_single_wqe_log_num_of_strides);
2093                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
2094                         mprq_caps.max_single_wqe_log_num_of_strides);
2095                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
2096                         mprq_caps.supported_qpts);
2097                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
2098                 mprq = 1;
2099                 mprq_min_stride_size_n =
2100                         mprq_caps.min_single_stride_log_num_of_bytes;
2101                 mprq_max_stride_size_n =
2102                         mprq_caps.max_single_stride_log_num_of_bytes;
2103                 mprq_min_stride_num_n =
2104                         mprq_caps.min_single_wqe_log_num_of_strides;
2105                 mprq_max_stride_num_n =
2106                         mprq_caps.max_single_wqe_log_num_of_strides;
2107                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2108                                                    mprq_min_stride_num_n);
2109         }
2110 #endif
2111         if (RTE_CACHE_LINE_SIZE == 128 &&
2112             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2113                 cqe_comp = 0;
2114         else
2115                 cqe_comp = 1;
2116         config.cqe_comp = cqe_comp;
2117 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2118         /* Whether device supports 128B Rx CQE padding. */
2119         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2120                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2121 #endif
2122 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2123         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2124                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2125                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2126                              (dv_attr.tunnel_offloads_caps &
2127                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
2128         }
2129         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2130                 tunnel_en ? "" : "not ");
2131 #else
2132         DRV_LOG(WARNING,
2133                 "tunnel offloading disabled due to old OFED/rdma-core version");
2134 #endif
2135         config.tunnel_en = tunnel_en;
2136 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2137         mpls_en = ((dv_attr.tunnel_offloads_caps &
2138                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2139                    (dv_attr.tunnel_offloads_caps &
2140                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2141         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2142                 mpls_en ? "" : "not ");
2143 #else
2144         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2145                 " old OFED/rdma-core version or firmware configuration");
2146 #endif
2147         config.mpls_en = mpls_en;
2148         /* Check port status. */
2149         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2150         if (err) {
2151                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2152                 goto error;
2153         }
2154         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2155                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2156                 err = EINVAL;
2157                 goto error;
2158         }
2159         if (port_attr.state != IBV_PORT_ACTIVE)
2160                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2161                         mlx5_glue->port_state_str(port_attr.state),
2162                         port_attr.state);
2163         /* Allocate private eth device data. */
2164         priv = rte_zmalloc("ethdev private structure",
2165                            sizeof(*priv),
2166                            RTE_CACHE_LINE_SIZE);
2167         if (priv == NULL) {
2168                 DRV_LOG(ERR, "priv allocation failure");
2169                 err = ENOMEM;
2170                 goto error;
2171         }
2172         priv->sh = sh;
2173         priv->ibv_port = spawn->ibv_port;
2174         priv->pci_dev = spawn->pci_dev;
2175         priv->mtu = RTE_ETHER_MTU;
2176 #ifndef RTE_ARCH_64
2177         /* Initialize UAR access locks for 32bit implementations. */
2178         rte_spinlock_init(&priv->uar_lock_cq);
2179         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2180                 rte_spinlock_init(&priv->uar_lock[i]);
2181 #endif
2182         /* Some internal functions rely on Netlink sockets, open them now. */
2183         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2184         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2185         priv->nl_sn = 0;
2186         priv->representor = !!switch_info->representor;
2187         priv->master = !!switch_info->master;
2188         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2189         priv->vport_meta_tag = 0;
2190         priv->vport_meta_mask = 0;
2191         priv->pf_bond = spawn->pf_bond;
2192 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2193         /*
2194          * The DevX port query API is implemented. E-Switch may use
2195          * either vport or reg_c[0] metadata register to match on
2196          * vport index. The engaged part of metadata register is
2197          * defined by mask.
2198          */
2199         if (switch_info->representor || switch_info->master) {
2200                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2201                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2202                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2203                                                  &devx_port);
2204                 if (err) {
2205                         DRV_LOG(WARNING,
2206                                 "can't query devx port %d on device %s",
2207                                 spawn->ibv_port, spawn->ibv_dev->name);
2208                         devx_port.comp_mask = 0;
2209                 }
2210         }
2211         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2212                 priv->vport_meta_tag = devx_port.reg_c_0.value;
2213                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2214                 if (!priv->vport_meta_mask) {
2215                         DRV_LOG(ERR, "vport zero mask for port %d"
2216                                      " on bonding device %s",
2217                                      spawn->ibv_port, spawn->ibv_dev->name);
2218                         err = ENOTSUP;
2219                         goto error;
2220                 }
2221                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2222                         DRV_LOG(ERR, "invalid vport tag for port %d"
2223                                      " on bonding device %s",
2224                                      spawn->ibv_port, spawn->ibv_dev->name);
2225                         err = ENOTSUP;
2226                         goto error;
2227                 }
2228         } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2229                 priv->vport_id = devx_port.vport_num;
2230         } else if (spawn->pf_bond >= 0) {
2231                 DRV_LOG(ERR, "can't deduce vport index for port %d"
2232                              " on bonding device %s",
2233                              spawn->ibv_port, spawn->ibv_dev->name);
2234                 err = ENOTSUP;
2235                 goto error;
2236         } else {
2237                 /* Suppose vport index in compatible way. */
2238                 priv->vport_id = switch_info->representor ?
2239                                  switch_info->port_name + 1 : -1;
2240         }
2241 #else
2242         /*
2243          * Kernel/rdma_core support single E-Switch per PF configurations
2244          * only and vport_id field contains the vport index for
2245          * associated VF, which is deduced from representor port name.
2246          * For example, let's have the IB device port 10, it has
2247          * attached network device eth0, which has port name attribute
2248          * pf0vf2, we can deduce the VF number as 2, and set vport index
2249          * as 3 (2+1). This assigning schema should be changed if the
2250          * multiple E-Switch instances per PF configurations or/and PCI
2251          * subfunctions are added.
2252          */
2253         priv->vport_id = switch_info->representor ?
2254                          switch_info->port_name + 1 : -1;
2255 #endif
2256         /* representor_id field keeps the unmodified VF index. */
2257         priv->representor_id = switch_info->representor ?
2258                                switch_info->port_name : -1;
2259         /*
2260          * Look for sibling devices in order to reuse their switch domain
2261          * if any, otherwise allocate one.
2262          */
2263         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2264                 const struct mlx5_priv *opriv =
2265                         rte_eth_devices[port_id].data->dev_private;
2266
2267                 if (!opriv ||
2268                     opriv->sh != priv->sh ||
2269                         opriv->domain_id ==
2270                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2271                         continue;
2272                 priv->domain_id = opriv->domain_id;
2273                 break;
2274         }
2275         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2276                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2277                 if (err) {
2278                         err = rte_errno;
2279                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
2280                                 strerror(rte_errno));
2281                         goto error;
2282                 }
2283                 own_domain_id = 1;
2284         }
2285         /* Override some values set by hardware configuration. */
2286         mlx5_args(&config, dpdk_dev->devargs);
2287         err = mlx5_dev_check_sibling_config(priv, &config);
2288         if (err)
2289                 goto error;
2290         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2291                             IBV_DEVICE_RAW_IP_CSUM);
2292         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2293                 (config.hw_csum ? "" : "not "));
2294 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2295         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2296         DRV_LOG(DEBUG, "counters are not supported");
2297 #endif
2298 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2299         if (config.dv_flow_en) {
2300                 DRV_LOG(WARNING, "DV flow is not supported");
2301                 config.dv_flow_en = 0;
2302         }
2303 #endif
2304         config.ind_table_max_size =
2305                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2306         /*
2307          * Remove this check once DPDK supports larger/variable
2308          * indirection tables.
2309          */
2310         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2311                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2312         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2313                 config.ind_table_max_size);
2314         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2315                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2316         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2317                 (config.hw_vlan_strip ? "" : "not "));
2318         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2319                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
2320         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2321                 (config.hw_fcs_strip ? "" : "not "));
2322 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2323         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2324 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2325         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2326                         IBV_DEVICE_PCI_WRITE_END_PADDING);
2327 #endif
2328         if (config.hw_padding && !hw_padding) {
2329                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2330                 config.hw_padding = 0;
2331         } else if (config.hw_padding) {
2332                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2333         }
2334         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2335                       (sh->device_attr.tso_caps.supported_qpts &
2336                        (1 << IBV_QPT_RAW_PACKET)));
2337         if (config.tso)
2338                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2339         /*
2340          * MPW is disabled by default, while the Enhanced MPW is enabled
2341          * by default.
2342          */
2343         if (config.mps == MLX5_ARG_UNSET)
2344                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2345                                                           MLX5_MPW_DISABLED;
2346         else
2347                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2348         DRV_LOG(INFO, "%sMPS is %s",
2349                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2350                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2351         if (config.cqe_comp && !cqe_comp) {
2352                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2353                 config.cqe_comp = 0;
2354         }
2355         if (config.cqe_pad && !cqe_pad) {
2356                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2357                 config.cqe_pad = 0;
2358         } else if (config.cqe_pad) {
2359                 DRV_LOG(INFO, "Rx CQE padding is enabled");
2360         }
2361         if (config.devx) {
2362                 priv->counter_fallback = 0;
2363                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2364                 if (err) {
2365                         err = -err;
2366                         goto error;
2367                 }
2368                 if (!config.hca_attr.flow_counters_dump)
2369                         priv->counter_fallback = 1;
2370 #ifndef HAVE_IBV_DEVX_ASYNC
2371                 priv->counter_fallback = 1;
2372 #endif
2373                 if (priv->counter_fallback)
2374                         DRV_LOG(INFO, "Use fall-back DV counter management");
2375                 /* Check for LRO support. */
2376                 if (config.dest_tir && config.hca_attr.lro_cap &&
2377                     config.dv_flow_en) {
2378                         /* TBD check tunnel lro caps. */
2379                         config.lro.supported = config.hca_attr.lro_cap;
2380                         DRV_LOG(DEBUG, "Device supports LRO");
2381                         /*
2382                          * If LRO timeout is not configured by application,
2383                          * use the minimal supported value.
2384                          */
2385                         if (!config.lro.timeout)
2386                                 config.lro.timeout =
2387                                 config.hca_attr.lro_timer_supported_periods[0];
2388                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2389                                 config.lro.timeout);
2390                 }
2391 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2392                 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2393                     config.dv_flow_en) {
2394                         uint8_t reg_c_mask =
2395                                 config.hca_attr.qos.flow_meter_reg_c_ids;
2396                         /*
2397                          * Meter needs two REG_C's for color match and pre-sfx
2398                          * flow match. Here get the REG_C for color match.
2399                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
2400                          */
2401                         reg_c_mask &= 0xfc;
2402                         if (__builtin_popcount(reg_c_mask) < 1) {
2403                                 priv->mtr_en = 0;
2404                                 DRV_LOG(WARNING, "No available register for"
2405                                         " meter.");
2406                         } else {
2407                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2408                                                       REG_C_0;
2409                                 priv->mtr_en = 1;
2410                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2411                                         priv->mtr_color_reg);
2412                         }
2413                 }
2414 #endif
2415         }
2416         if (config.mprq.enabled && mprq) {
2417                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2418                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
2419                         config.mprq.stride_num_n =
2420                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2421                                         mprq_min_stride_num_n);
2422                         DRV_LOG(WARNING,
2423                                 "the number of strides"
2424                                 " for Multi-Packet RQ is out of range,"
2425                                 " setting default value (%u)",
2426                                 1 << config.mprq.stride_num_n);
2427                 }
2428                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2429                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2430         } else if (config.mprq.enabled && !mprq) {
2431                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2432                 config.mprq.enabled = 0;
2433         }
2434         if (config.max_dump_files_num == 0)
2435                 config.max_dump_files_num = 128;
2436         eth_dev = rte_eth_dev_allocate(name);
2437         if (eth_dev == NULL) {
2438                 DRV_LOG(ERR, "can not allocate rte ethdev");
2439                 err = ENOMEM;
2440                 goto error;
2441         }
2442         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2443         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2444         if (priv->representor) {
2445                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2446                 eth_dev->data->representor_id = priv->representor_id;
2447         }
2448         /*
2449          * Store associated network device interface index. This index
2450          * is permanent throughout the lifetime of device. So, we may store
2451          * the ifindex here and use the cached value further.
2452          */
2453         assert(spawn->ifindex);
2454         priv->if_index = spawn->ifindex;
2455         eth_dev->data->dev_private = priv;
2456         priv->dev_data = eth_dev->data;
2457         eth_dev->data->mac_addrs = priv->mac;
2458         eth_dev->device = dpdk_dev;
2459         /* Configure the first MAC address by default. */
2460         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2461                 DRV_LOG(ERR,
2462                         "port %u cannot get MAC address, is mlx5_en"
2463                         " loaded? (errno: %s)",
2464                         eth_dev->data->port_id, strerror(rte_errno));
2465                 err = ENODEV;
2466                 goto error;
2467         }
2468         DRV_LOG(INFO,
2469                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2470                 eth_dev->data->port_id,
2471                 mac.addr_bytes[0], mac.addr_bytes[1],
2472                 mac.addr_bytes[2], mac.addr_bytes[3],
2473                 mac.addr_bytes[4], mac.addr_bytes[5]);
2474 #ifndef NDEBUG
2475         {
2476                 char ifname[IF_NAMESIZE];
2477
2478                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2479                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2480                                 eth_dev->data->port_id, ifname);
2481                 else
2482                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2483                                 eth_dev->data->port_id);
2484         }
2485 #endif
2486         /* Get actual MTU if possible. */
2487         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2488         if (err) {
2489                 err = rte_errno;
2490                 goto error;
2491         }
2492         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2493                 priv->mtu);
2494         /* Initialize burst functions to prevent crashes before link-up. */
2495         eth_dev->rx_pkt_burst = removed_rx_burst;
2496         eth_dev->tx_pkt_burst = removed_tx_burst;
2497         eth_dev->dev_ops = &mlx5_dev_ops;
2498         /* Register MAC address. */
2499         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2500         if (config.vf && config.vf_nl_en)
2501                 mlx5_nl_mac_addr_sync(eth_dev);
2502         TAILQ_INIT(&priv->flows);
2503         TAILQ_INIT(&priv->ctrl_flows);
2504         TAILQ_INIT(&priv->flow_meters);
2505         TAILQ_INIT(&priv->flow_meter_profiles);
2506         /* Hint libmlx5 to use PMD allocator for data plane resources */
2507         struct mlx5dv_ctx_allocators alctr = {
2508                 .alloc = &mlx5_alloc_verbs_buf,
2509                 .free = &mlx5_free_verbs_buf,
2510                 .data = priv,
2511         };
2512         mlx5_glue->dv_set_context_attr(sh->ctx,
2513                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2514                                        (void *)((uintptr_t)&alctr));
2515         /* Bring Ethernet device up. */
2516         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2517                 eth_dev->data->port_id);
2518         mlx5_set_link_up(eth_dev);
2519         /*
2520          * Even though the interrupt handler is not installed yet,
2521          * interrupts will still trigger on the async_fd from
2522          * Verbs context returned by ibv_open_device().
2523          */
2524         mlx5_link_update(eth_dev, 0);
2525 #ifdef HAVE_MLX5DV_DR_ESWITCH
2526         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2527               (switch_info->representor || switch_info->master)))
2528                 config.dv_esw_en = 0;
2529 #else
2530         config.dv_esw_en = 0;
2531 #endif
2532         /* Detect minimal data bytes to inline. */
2533         mlx5_set_min_inline(spawn, &config);
2534         /* Store device configuration on private structure. */
2535         priv->config = config;
2536         /* Create context for virtual machine VLAN workaround. */
2537         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2538         if (config.dv_flow_en) {
2539                 err = mlx5_alloc_shared_dr(priv);
2540                 if (err)
2541                         goto error;
2542                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc();
2543                 if (!priv->qrss_id_pool) {
2544                         DRV_LOG(ERR, "can't create flow id pool");
2545                         err = ENOMEM;
2546                         goto error;
2547                 }
2548         }
2549         /* Supported Verbs flow priority number detection. */
2550         err = mlx5_flow_discover_priorities(eth_dev);
2551         if (err < 0) {
2552                 err = -err;
2553                 goto error;
2554         }
2555         priv->config.flow_prio = err;
2556         if (!priv->config.dv_esw_en &&
2557             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2558                 DRV_LOG(WARNING, "metadata mode %u is not supported "
2559                                  "(no E-Switch)", priv->config.dv_xmeta_en);
2560                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2561         }
2562         mlx5_set_metadata_mask(eth_dev);
2563         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2564             !priv->sh->dv_regc0_mask) {
2565                 DRV_LOG(ERR, "metadata mode %u is not supported "
2566                              "(no metadata reg_c[0] is available)",
2567                              priv->config.dv_xmeta_en);
2568                         err = ENOTSUP;
2569                         goto error;
2570         }
2571         /* Query availibility of metadata reg_c's. */
2572         err = mlx5_flow_discover_mreg_c(eth_dev);
2573         if (err < 0) {
2574                 err = -err;
2575                 goto error;
2576         }
2577         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2578                 DRV_LOG(DEBUG,
2579                         "port %u extensive metadata register is not supported",
2580                         eth_dev->data->port_id);
2581                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2582                         DRV_LOG(ERR, "metadata mode %u is not supported "
2583                                      "(no metadata registers available)",
2584                                      priv->config.dv_xmeta_en);
2585                         err = ENOTSUP;
2586                         goto error;
2587                 }
2588         }
2589         if (priv->config.dv_flow_en &&
2590             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2591             mlx5_flow_ext_mreg_supported(eth_dev) &&
2592             priv->sh->dv_regc0_mask) {
2593                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2594                                                       MLX5_FLOW_MREG_HTABLE_SZ);
2595                 if (!priv->mreg_cp_tbl) {
2596                         err = ENOMEM;
2597                         goto error;
2598                 }
2599         }
2600         return eth_dev;
2601 error:
2602         if (priv) {
2603                 if (priv->mreg_cp_tbl)
2604                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2605                 if (priv->sh)
2606                         mlx5_free_shared_dr(priv);
2607                 if (priv->nl_socket_route >= 0)
2608                         close(priv->nl_socket_route);
2609                 if (priv->nl_socket_rdma >= 0)
2610                         close(priv->nl_socket_rdma);
2611                 if (priv->vmwa_context)
2612                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2613                 if (priv->qrss_id_pool)
2614                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
2615                 if (own_domain_id)
2616                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2617                 rte_free(priv);
2618                 if (eth_dev != NULL)
2619                         eth_dev->data->dev_private = NULL;
2620         }
2621         if (eth_dev != NULL) {
2622                 /* mac_addrs must not be freed alone because part of dev_private */
2623                 eth_dev->data->mac_addrs = NULL;
2624                 rte_eth_dev_release_port(eth_dev);
2625         }
2626         if (sh)
2627                 mlx5_free_shared_ibctx(sh);
2628         assert(err > 0);
2629         rte_errno = err;
2630         return NULL;
2631 }
2632
2633 /**
2634  * Comparison callback to sort device data.
2635  *
2636  * This is meant to be used with qsort().
2637  *
2638  * @param a[in]
2639  *   Pointer to pointer to first data object.
2640  * @param b[in]
2641  *   Pointer to pointer to second data object.
2642  *
2643  * @return
2644  *   0 if both objects are equal, less than 0 if the first argument is less
2645  *   than the second, greater than 0 otherwise.
2646  */
2647 static int
2648 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2649 {
2650         const struct mlx5_switch_info *si_a =
2651                 &((const struct mlx5_dev_spawn_data *)a)->info;
2652         const struct mlx5_switch_info *si_b =
2653                 &((const struct mlx5_dev_spawn_data *)b)->info;
2654         int ret;
2655
2656         /* Master device first. */
2657         ret = si_b->master - si_a->master;
2658         if (ret)
2659                 return ret;
2660         /* Then representor devices. */
2661         ret = si_b->representor - si_a->representor;
2662         if (ret)
2663                 return ret;
2664         /* Unidentified devices come last in no specific order. */
2665         if (!si_a->representor)
2666                 return 0;
2667         /* Order representors by name. */
2668         return si_a->port_name - si_b->port_name;
2669 }
2670
2671 /**
2672  * Match PCI information for possible slaves of bonding device.
2673  *
2674  * @param[in] ibv_dev
2675  *   Pointer to Infiniband device structure.
2676  * @param[in] pci_dev
2677  *   Pointer to PCI device structure to match PCI address.
2678  * @param[in] nl_rdma
2679  *   Netlink RDMA group socket handle.
2680  *
2681  * @return
2682  *   negative value if no bonding device found, otherwise
2683  *   positive index of slave PF in bonding.
2684  */
2685 static int
2686 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2687                            const struct rte_pci_device *pci_dev,
2688                            int nl_rdma)
2689 {
2690         char ifname[IF_NAMESIZE + 1];
2691         unsigned int ifindex;
2692         unsigned int np, i;
2693         FILE *file = NULL;
2694         int pf = -1;
2695
2696         /*
2697          * Try to get master device name. If something goes
2698          * wrong suppose the lack of kernel support and no
2699          * bonding devices.
2700          */
2701         if (nl_rdma < 0)
2702                 return -1;
2703         if (!strstr(ibv_dev->name, "bond"))
2704                 return -1;
2705         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2706         if (!np)
2707                 return -1;
2708         /*
2709          * The Master device might not be on the predefined
2710          * port (not on port index 1, it is not garanted),
2711          * we have to scan all Infiniband device port and
2712          * find master.
2713          */
2714         for (i = 1; i <= np; ++i) {
2715                 /* Check whether Infiniband port is populated. */
2716                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2717                 if (!ifindex)
2718                         continue;
2719                 if (!if_indextoname(ifindex, ifname))
2720                         continue;
2721                 /* Try to read bonding slave names from sysfs. */
2722                 MKSTR(slaves,
2723                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2724                 file = fopen(slaves, "r");
2725                 if (file)
2726                         break;
2727         }
2728         if (!file)
2729                 return -1;
2730         /* Use safe format to check maximal buffer length. */
2731         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2732         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2733                 char tmp_str[IF_NAMESIZE + 32];
2734                 struct rte_pci_addr pci_addr;
2735                 struct mlx5_switch_info info;
2736
2737                 /* Process slave interface names in the loop. */
2738                 snprintf(tmp_str, sizeof(tmp_str),
2739                          "/sys/class/net/%s", ifname);
2740                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2741                         DRV_LOG(WARNING, "can not get PCI address"
2742                                          " for netdev \"%s\"", ifname);
2743                         continue;
2744                 }
2745                 if (pci_dev->addr.domain != pci_addr.domain ||
2746                     pci_dev->addr.bus != pci_addr.bus ||
2747                     pci_dev->addr.devid != pci_addr.devid ||
2748                     pci_dev->addr.function != pci_addr.function)
2749                         continue;
2750                 /* Slave interface PCI address match found. */
2751                 fclose(file);
2752                 snprintf(tmp_str, sizeof(tmp_str),
2753                          "/sys/class/net/%s/phys_port_name", ifname);
2754                 file = fopen(tmp_str, "rb");
2755                 if (!file)
2756                         break;
2757                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2758                 if (fscanf(file, "%32s", tmp_str) == 1)
2759                         mlx5_translate_port_name(tmp_str, &info);
2760                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2761                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2762                         pf = info.port_name;
2763                 break;
2764         }
2765         if (file)
2766                 fclose(file);
2767         return pf;
2768 }
2769
2770 /**
2771  * DPDK callback to register a PCI device.
2772  *
2773  * This function spawns Ethernet devices out of a given PCI device.
2774  *
2775  * @param[in] pci_drv
2776  *   PCI driver structure (mlx5_driver).
2777  * @param[in] pci_dev
2778  *   PCI device information.
2779  *
2780  * @return
2781  *   0 on success, a negative errno value otherwise and rte_errno is set.
2782  */
2783 static int
2784 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2785                struct rte_pci_device *pci_dev)
2786 {
2787         struct ibv_device **ibv_list;
2788         /*
2789          * Number of found IB Devices matching with requested PCI BDF.
2790          * nd != 1 means there are multiple IB devices over the same
2791          * PCI device and we have representors and master.
2792          */
2793         unsigned int nd = 0;
2794         /*
2795          * Number of found IB device Ports. nd = 1 and np = 1..n means
2796          * we have the single multiport IB device, and there may be
2797          * representors attached to some of found ports.
2798          */
2799         unsigned int np = 0;
2800         /*
2801          * Number of DPDK ethernet devices to Spawn - either over
2802          * multiple IB devices or multiple ports of single IB device.
2803          * Actually this is the number of iterations to spawn.
2804          */
2805         unsigned int ns = 0;
2806         /*
2807          * Bonding device
2808          *   < 0 - no bonding device (single one)
2809          *  >= 0 - bonding device (value is slave PF index)
2810          */
2811         int bd = -1;
2812         struct mlx5_dev_spawn_data *list = NULL;
2813         struct mlx5_dev_config dev_config;
2814         int ret;
2815
2816         ret = mlx5_init_once();
2817         if (ret) {
2818                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2819                         strerror(rte_errno));
2820                 return -rte_errno;
2821         }
2822         assert(pci_drv == &mlx5_driver);
2823         errno = 0;
2824         ibv_list = mlx5_glue->get_device_list(&ret);
2825         if (!ibv_list) {
2826                 rte_errno = errno ? errno : ENOSYS;
2827                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2828                 return -rte_errno;
2829         }
2830         /*
2831          * First scan the list of all Infiniband devices to find
2832          * matching ones, gathering into the list.
2833          */
2834         struct ibv_device *ibv_match[ret + 1];
2835         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2836         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2837         unsigned int i;
2838
2839         while (ret-- > 0) {
2840                 struct rte_pci_addr pci_addr;
2841
2842                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2843                 bd = mlx5_device_bond_pci_match
2844                                 (ibv_list[ret], pci_dev, nl_rdma);
2845                 if (bd >= 0) {
2846                         /*
2847                          * Bonding device detected. Only one match is allowed,
2848                          * the bonding is supported over multi-port IB device,
2849                          * there should be no matches on representor PCI
2850                          * functions or non VF LAG bonding devices with
2851                          * specified address.
2852                          */
2853                         if (nd) {
2854                                 DRV_LOG(ERR,
2855                                         "multiple PCI match on bonding device"
2856                                         "\"%s\" found", ibv_list[ret]->name);
2857                                 rte_errno = ENOENT;
2858                                 ret = -rte_errno;
2859                                 goto exit;
2860                         }
2861                         DRV_LOG(INFO, "PCI information matches for"
2862                                       " slave %d bonding device \"%s\"",
2863                                       bd, ibv_list[ret]->name);
2864                         ibv_match[nd++] = ibv_list[ret];
2865                         break;
2866                 }
2867                 if (mlx5_dev_to_pci_addr
2868                         (ibv_list[ret]->ibdev_path, &pci_addr))
2869                         continue;
2870                 if (pci_dev->addr.domain != pci_addr.domain ||
2871                     pci_dev->addr.bus != pci_addr.bus ||
2872                     pci_dev->addr.devid != pci_addr.devid ||
2873                     pci_dev->addr.function != pci_addr.function)
2874                         continue;
2875                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2876                         ibv_list[ret]->name);
2877                 ibv_match[nd++] = ibv_list[ret];
2878         }
2879         ibv_match[nd] = NULL;
2880         if (!nd) {
2881                 /* No device matches, just complain and bail out. */
2882                 DRV_LOG(WARNING,
2883                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2884                         " are kernel drivers loaded?",
2885                         pci_dev->addr.domain, pci_dev->addr.bus,
2886                         pci_dev->addr.devid, pci_dev->addr.function);
2887                 rte_errno = ENOENT;
2888                 ret = -rte_errno;
2889                 goto exit;
2890         }
2891         if (nd == 1) {
2892                 /*
2893                  * Found single matching device may have multiple ports.
2894                  * Each port may be representor, we have to check the port
2895                  * number and check the representors existence.
2896                  */
2897                 if (nl_rdma >= 0)
2898                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2899                 if (!np)
2900                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2901                                          " ports number", ibv_match[0]->name);
2902                 if (bd >= 0 && !np) {
2903                         DRV_LOG(ERR, "can not get ports"
2904                                      " for bonding device");
2905                         rte_errno = ENOENT;
2906                         ret = -rte_errno;
2907                         goto exit;
2908                 }
2909         }
2910 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2911         if (bd >= 0) {
2912                 /*
2913                  * This may happen if there is VF LAG kernel support and
2914                  * application is compiled with older rdma_core library.
2915                  */
2916                 DRV_LOG(ERR,
2917                         "No kernel/verbs support for VF LAG bonding found.");
2918                 rte_errno = ENOTSUP;
2919                 ret = -rte_errno;
2920                 goto exit;
2921         }
2922 #endif
2923         /*
2924          * Now we can determine the maximal
2925          * amount of devices to be spawned.
2926          */
2927         list = rte_zmalloc("device spawn data",
2928                          sizeof(struct mlx5_dev_spawn_data) *
2929                          (np ? np : nd),
2930                          RTE_CACHE_LINE_SIZE);
2931         if (!list) {
2932                 DRV_LOG(ERR, "spawn data array allocation failure");
2933                 rte_errno = ENOMEM;
2934                 ret = -rte_errno;
2935                 goto exit;
2936         }
2937         if (bd >= 0 || np > 1) {
2938                 /*
2939                  * Single IB device with multiple ports found,
2940                  * it may be E-Switch master device and representors.
2941                  * We have to perform identification trough the ports.
2942                  */
2943                 assert(nl_rdma >= 0);
2944                 assert(ns == 0);
2945                 assert(nd == 1);
2946                 assert(np);
2947                 for (i = 1; i <= np; ++i) {
2948                         list[ns].max_port = np;
2949                         list[ns].ibv_port = i;
2950                         list[ns].ibv_dev = ibv_match[0];
2951                         list[ns].eth_dev = NULL;
2952                         list[ns].pci_dev = pci_dev;
2953                         list[ns].pf_bond = bd;
2954                         list[ns].ifindex = mlx5_nl_ifindex
2955                                         (nl_rdma, list[ns].ibv_dev->name, i);
2956                         if (!list[ns].ifindex) {
2957                                 /*
2958                                  * No network interface index found for the
2959                                  * specified port, it means there is no
2960                                  * representor on this port. It's OK,
2961                                  * there can be disabled ports, for example
2962                                  * if sriov_numvfs < sriov_totalvfs.
2963                                  */
2964                                 continue;
2965                         }
2966                         ret = -1;
2967                         if (nl_route >= 0)
2968                                 ret = mlx5_nl_switch_info
2969                                                (nl_route,
2970                                                 list[ns].ifindex,
2971                                                 &list[ns].info);
2972                         if (ret || (!list[ns].info.representor &&
2973                                     !list[ns].info.master)) {
2974                                 /*
2975                                  * We failed to recognize representors with
2976                                  * Netlink, let's try to perform the task
2977                                  * with sysfs.
2978                                  */
2979                                 ret =  mlx5_sysfs_switch_info
2980                                                 (list[ns].ifindex,
2981                                                  &list[ns].info);
2982                         }
2983                         if (!ret && bd >= 0) {
2984                                 switch (list[ns].info.name_type) {
2985                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2986                                         if (list[ns].info.port_name == bd)
2987                                                 ns++;
2988                                         break;
2989                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2990                                         if (list[ns].info.pf_num == bd)
2991                                                 ns++;
2992                                         break;
2993                                 default:
2994                                         break;
2995                                 }
2996                                 continue;
2997                         }
2998                         if (!ret && (list[ns].info.representor ^
2999                                      list[ns].info.master))
3000                                 ns++;
3001                 }
3002                 if (!ns) {
3003                         DRV_LOG(ERR,
3004                                 "unable to recognize master/representors"
3005                                 " on the IB device with multiple ports");
3006                         rte_errno = ENOENT;
3007                         ret = -rte_errno;
3008                         goto exit;
3009                 }
3010         } else {
3011                 /*
3012                  * The existence of several matching entries (nd > 1) means
3013                  * port representors have been instantiated. No existing Verbs
3014                  * call nor sysfs entries can tell them apart, this can only
3015                  * be done through Netlink calls assuming kernel drivers are
3016                  * recent enough to support them.
3017                  *
3018                  * In the event of identification failure through Netlink,
3019                  * try again through sysfs, then:
3020                  *
3021                  * 1. A single IB device matches (nd == 1) with single
3022                  *    port (np=0/1) and is not a representor, assume
3023                  *    no switch support.
3024                  *
3025                  * 2. Otherwise no safe assumptions can be made;
3026                  *    complain louder and bail out.
3027                  */
3028                 np = 1;
3029                 for (i = 0; i != nd; ++i) {
3030                         memset(&list[ns].info, 0, sizeof(list[ns].info));
3031                         list[ns].max_port = 1;
3032                         list[ns].ibv_port = 1;
3033                         list[ns].ibv_dev = ibv_match[i];
3034                         list[ns].eth_dev = NULL;
3035                         list[ns].pci_dev = pci_dev;
3036                         list[ns].pf_bond = -1;
3037                         list[ns].ifindex = 0;
3038                         if (nl_rdma >= 0)
3039                                 list[ns].ifindex = mlx5_nl_ifindex
3040                                         (nl_rdma, list[ns].ibv_dev->name, 1);
3041                         if (!list[ns].ifindex) {
3042                                 char ifname[IF_NAMESIZE];
3043
3044                                 /*
3045                                  * Netlink failed, it may happen with old
3046                                  * ib_core kernel driver (before 4.16).
3047                                  * We can assume there is old driver because
3048                                  * here we are processing single ports IB
3049                                  * devices. Let's try sysfs to retrieve
3050                                  * the ifindex. The method works for
3051                                  * master device only.
3052                                  */
3053                                 if (nd > 1) {
3054                                         /*
3055                                          * Multiple devices found, assume
3056                                          * representors, can not distinguish
3057                                          * master/representor and retrieve
3058                                          * ifindex via sysfs.
3059                                          */
3060                                         continue;
3061                                 }
3062                                 ret = mlx5_get_master_ifname
3063                                         (ibv_match[i]->ibdev_path, &ifname);
3064                                 if (!ret)
3065                                         list[ns].ifindex =
3066                                                 if_nametoindex(ifname);
3067                                 if (!list[ns].ifindex) {
3068                                         /*
3069                                          * No network interface index found
3070                                          * for the specified device, it means
3071                                          * there it is neither representor
3072                                          * nor master.
3073                                          */
3074                                         continue;
3075                                 }
3076                         }
3077                         ret = -1;
3078                         if (nl_route >= 0)
3079                                 ret = mlx5_nl_switch_info
3080                                                (nl_route,
3081                                                 list[ns].ifindex,
3082                                                 &list[ns].info);
3083                         if (ret || (!list[ns].info.representor &&
3084                                     !list[ns].info.master)) {
3085                                 /*
3086                                  * We failed to recognize representors with
3087                                  * Netlink, let's try to perform the task
3088                                  * with sysfs.
3089                                  */
3090                                 ret =  mlx5_sysfs_switch_info
3091                                                 (list[ns].ifindex,
3092                                                  &list[ns].info);
3093                         }
3094                         if (!ret && (list[ns].info.representor ^
3095                                      list[ns].info.master)) {
3096                                 ns++;
3097                         } else if ((nd == 1) &&
3098                                    !list[ns].info.representor &&
3099                                    !list[ns].info.master) {
3100                                 /*
3101                                  * Single IB device with
3102                                  * one physical port and
3103                                  * attached network device.
3104                                  * May be SRIOV is not enabled
3105                                  * or there is no representors.
3106                                  */
3107                                 DRV_LOG(INFO, "no E-Switch support detected");
3108                                 ns++;
3109                                 break;
3110                         }
3111                 }
3112                 if (!ns) {
3113                         DRV_LOG(ERR,
3114                                 "unable to recognize master/representors"
3115                                 " on the multiple IB devices");
3116                         rte_errno = ENOENT;
3117                         ret = -rte_errno;
3118                         goto exit;
3119                 }
3120         }
3121         assert(ns);
3122         /*
3123          * Sort list to probe devices in natural order for users convenience
3124          * (i.e. master first, then representors from lowest to highest ID).
3125          */
3126         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3127         /* Default configuration. */
3128         dev_config = (struct mlx5_dev_config){
3129                 .hw_padding = 0,
3130                 .mps = MLX5_ARG_UNSET,
3131                 .dbnc = MLX5_ARG_UNSET,
3132                 .rx_vec_en = 1,
3133                 .txq_inline_max = MLX5_ARG_UNSET,
3134                 .txq_inline_min = MLX5_ARG_UNSET,
3135                 .txq_inline_mpw = MLX5_ARG_UNSET,
3136                 .txqs_inline = MLX5_ARG_UNSET,
3137                 .vf_nl_en = 1,
3138                 .mr_ext_memseg_en = 1,
3139                 .mprq = {
3140                         .enabled = 0, /* Disabled by default. */
3141                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3142                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3143                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3144                 },
3145                 .dv_esw_en = 1,
3146         };
3147         /* Device specific configuration. */
3148         switch (pci_dev->id.device_id) {
3149         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3150         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3151         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3152         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3153         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3154         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3155         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3156                 dev_config.vf = 1;
3157                 break;
3158         default:
3159                 break;
3160         }
3161         for (i = 0; i != ns; ++i) {
3162                 uint32_t restore;
3163
3164                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3165                                                  &list[i],
3166                                                  dev_config);
3167                 if (!list[i].eth_dev) {
3168                         if (rte_errno != EBUSY && rte_errno != EEXIST)
3169                                 break;
3170                         /* Device is disabled or already spawned. Ignore it. */
3171                         continue;
3172                 }
3173                 restore = list[i].eth_dev->data->dev_flags;
3174                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3175                 /* Restore non-PCI flags cleared by the above call. */
3176                 list[i].eth_dev->data->dev_flags |= restore;
3177                 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3178                 rte_eth_dev_probing_finish(list[i].eth_dev);
3179         }
3180         if (i != ns) {
3181                 DRV_LOG(ERR,
3182                         "probe of PCI device " PCI_PRI_FMT " aborted after"
3183                         " encountering an error: %s",
3184                         pci_dev->addr.domain, pci_dev->addr.bus,
3185                         pci_dev->addr.devid, pci_dev->addr.function,
3186                         strerror(rte_errno));
3187                 ret = -rte_errno;
3188                 /* Roll back. */
3189                 while (i--) {
3190                         if (!list[i].eth_dev)
3191                                 continue;
3192                         mlx5_dev_close(list[i].eth_dev);
3193                         /* mac_addrs must not be freed because in dev_private */
3194                         list[i].eth_dev->data->mac_addrs = NULL;
3195                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3196                 }
3197                 /* Restore original error. */
3198                 rte_errno = -ret;
3199         } else {
3200                 ret = 0;
3201         }
3202 exit:
3203         /*
3204          * Do the routine cleanup:
3205          * - close opened Netlink sockets
3206          * - free allocated spawn data array
3207          * - free the Infiniband device list
3208          */
3209         if (nl_rdma >= 0)
3210                 close(nl_rdma);
3211         if (nl_route >= 0)
3212                 close(nl_route);
3213         if (list)
3214                 rte_free(list);
3215         assert(ibv_list);
3216         mlx5_glue->free_device_list(ibv_list);
3217         return ret;
3218 }
3219
3220 /**
3221  * Look for the ethernet device belonging to mlx5 driver.
3222  *
3223  * @param[in] port_id
3224  *   port_id to start looking for device.
3225  * @param[in] pci_dev
3226  *   Pointer to the hint PCI device. When device is being probed
3227  *   the its siblings (master and preceding representors might
3228  *   not have assigned driver yet (because the mlx5_pci_probe()
3229  *   is not completed yet, for this case match on hint PCI
3230  *   device may be used to detect sibling device.
3231  *
3232  * @return
3233  *   port_id of found device, RTE_MAX_ETHPORT if not found.
3234  */
3235 uint16_t
3236 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3237 {
3238         while (port_id < RTE_MAX_ETHPORTS) {
3239                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3240
3241                 if (dev->state != RTE_ETH_DEV_UNUSED &&
3242                     dev->device &&
3243                     (dev->device == &pci_dev->device ||
3244                      (dev->device->driver &&
3245                      dev->device->driver->name &&
3246                      !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3247                         break;
3248                 port_id++;
3249         }
3250         if (port_id >= RTE_MAX_ETHPORTS)
3251                 return RTE_MAX_ETHPORTS;
3252         return port_id;
3253 }
3254
3255 /**
3256  * DPDK callback to remove a PCI device.
3257  *
3258  * This function removes all Ethernet devices belong to a given PCI device.
3259  *
3260  * @param[in] pci_dev
3261  *   Pointer to the PCI device.
3262  *
3263  * @return
3264  *   0 on success, the function cannot fail.
3265  */
3266 static int
3267 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3268 {
3269         uint16_t port_id;
3270
3271         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3272                 rte_eth_dev_close(port_id);
3273         return 0;
3274 }
3275
3276 static const struct rte_pci_id mlx5_pci_id_map[] = {
3277         {
3278                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3279                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3280         },
3281         {
3282                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3283                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3284         },
3285         {
3286                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3287                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3288         },
3289         {
3290                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3291                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3292         },
3293         {
3294                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3295                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3296         },
3297         {
3298                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3299                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3300         },
3301         {
3302                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3303                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3304         },
3305         {
3306                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3307                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3308         },
3309         {
3310                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3311                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3312         },
3313         {
3314                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3315                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3316         },
3317         {
3318                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3319                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3320         },
3321         {
3322                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3323                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3324         },
3325         {
3326                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3327                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3328         },
3329         {
3330                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3331                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3332         },
3333         {
3334                 .vendor_id = 0
3335         }
3336 };
3337
3338 static struct rte_pci_driver mlx5_driver = {
3339         .driver = {
3340                 .name = MLX5_DRIVER_NAME
3341         },
3342         .id_table = mlx5_pci_id_map,
3343         .probe = mlx5_pci_probe,
3344         .remove = mlx5_pci_remove,
3345         .dma_map = mlx5_dma_map,
3346         .dma_unmap = mlx5_dma_unmap,
3347         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3348                      RTE_PCI_DRV_PROBE_AGAIN,
3349 };
3350
3351 #ifdef RTE_IBVERBS_LINK_DLOPEN
3352
3353 /**
3354  * Suffix RTE_EAL_PMD_PATH with "-glue".
3355  *
3356  * This function performs a sanity check on RTE_EAL_PMD_PATH before
3357  * suffixing its last component.
3358  *
3359  * @param buf[out]
3360  *   Output buffer, should be large enough otherwise NULL is returned.
3361  * @param size
3362  *   Size of @p out.
3363  *
3364  * @return
3365  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
3366  */
3367 static char *
3368 mlx5_glue_path(char *buf, size_t size)
3369 {
3370         static const char *const bad[] = { "/", ".", "..", NULL };
3371         const char *path = RTE_EAL_PMD_PATH;
3372         size_t len = strlen(path);
3373         size_t off;
3374         int i;
3375
3376         while (len && path[len - 1] == '/')
3377                 --len;
3378         for (off = len; off && path[off - 1] != '/'; --off)
3379                 ;
3380         for (i = 0; bad[i]; ++i)
3381                 if (!strncmp(path + off, bad[i], (int)(len - off)))
3382                         goto error;
3383         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3384         if (i == -1 || (size_t)i >= size)
3385                 goto error;
3386         return buf;
3387 error:
3388         DRV_LOG(ERR,
3389                 "unable to append \"-glue\" to last component of"
3390                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3391                 " please re-configure DPDK");
3392         return NULL;
3393 }
3394
3395 /**
3396  * Initialization routine for run-time dependency on rdma-core.
3397  */
3398 static int
3399 mlx5_glue_init(void)
3400 {
3401         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3402         const char *path[] = {
3403                 /*
3404                  * A basic security check is necessary before trusting
3405                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3406                  */
3407                 (geteuid() == getuid() && getegid() == getgid() ?
3408                  getenv("MLX5_GLUE_PATH") : NULL),
3409                 /*
3410                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3411                  * variant, otherwise let dlopen() look up libraries on its
3412                  * own.
3413                  */
3414                 (*RTE_EAL_PMD_PATH ?
3415                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3416         };
3417         unsigned int i = 0;
3418         void *handle = NULL;
3419         void **sym;
3420         const char *dlmsg;
3421
3422         while (!handle && i != RTE_DIM(path)) {
3423                 const char *end;
3424                 size_t len;
3425                 int ret;
3426
3427                 if (!path[i]) {
3428                         ++i;
3429                         continue;
3430                 }
3431                 end = strpbrk(path[i], ":;");
3432                 if (!end)
3433                         end = path[i] + strlen(path[i]);
3434                 len = end - path[i];
3435                 ret = 0;
3436                 do {
3437                         char name[ret + 1];
3438
3439                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3440                                        (int)len, path[i],
3441                                        (!len || *(end - 1) == '/') ? "" : "/");
3442                         if (ret == -1)
3443                                 break;
3444                         if (sizeof(name) != (size_t)ret + 1)
3445                                 continue;
3446                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3447                                 name);
3448                         handle = dlopen(name, RTLD_LAZY);
3449                         break;
3450                 } while (1);
3451                 path[i] = end + 1;
3452                 if (!*end)
3453                         ++i;
3454         }
3455         if (!handle) {
3456                 rte_errno = EINVAL;
3457                 dlmsg = dlerror();
3458                 if (dlmsg)
3459                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3460                 goto glue_error;
3461         }
3462         sym = dlsym(handle, "mlx5_glue");
3463         if (!sym || !*sym) {
3464                 rte_errno = EINVAL;
3465                 dlmsg = dlerror();
3466                 if (dlmsg)
3467                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3468                 goto glue_error;
3469         }
3470         mlx5_glue = *sym;
3471         return 0;
3472 glue_error:
3473         if (handle)
3474                 dlclose(handle);
3475         DRV_LOG(WARNING,
3476                 "cannot initialize PMD due to missing run-time dependency on"
3477                 " rdma-core libraries (libibverbs, libmlx5)");
3478         return -rte_errno;
3479 }
3480
3481 #endif
3482
3483 /**
3484  * Driver initialization routine.
3485  */
3486 RTE_INIT(rte_mlx5_pmd_init)
3487 {
3488         /* Initialize driver log type. */
3489         mlx5_logtype = rte_log_register("pmd.net.mlx5");
3490         if (mlx5_logtype >= 0)
3491                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3492
3493         /* Build the static tables for Verbs conversion. */
3494         mlx5_set_ptype_table();
3495         mlx5_set_cksum_table();
3496         mlx5_set_swp_types_table();
3497         /*
3498          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3499          * huge pages. Calling ibv_fork_init() during init allows
3500          * applications to use fork() safely for purposes other than
3501          * using this PMD, which is not supported in forked processes.
3502          */
3503         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3504         /* Match the size of Rx completion entry to the size of a cacheline. */
3505         if (RTE_CACHE_LINE_SIZE == 128)
3506                 setenv("MLX5_CQE_SIZE", "128", 0);
3507         /*
3508          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3509          * cleanup all the Verbs resources even when the device was removed.
3510          */
3511         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3512 #ifdef RTE_IBVERBS_LINK_DLOPEN
3513         if (mlx5_glue_init())
3514                 return;
3515         assert(mlx5_glue);
3516 #endif
3517 #ifndef NDEBUG
3518         /* Glue structure must not contain any NULL pointers. */
3519         {
3520                 unsigned int i;
3521
3522                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3523                         assert(((const void *const *)mlx5_glue)[i]);
3524         }
3525 #endif
3526         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3527                 DRV_LOG(ERR,
3528                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3529                         mlx5_glue->version, MLX5_GLUE_VERSION);
3530                 return;
3531         }
3532         mlx5_glue->fork_init();
3533         rte_pci_register(&mlx5_driver);
3534 }
3535
3536 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3537 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3538 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");