1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to force doorbell register mapping
100 * to non-cahed region eliminating the extra write memory barrier.
102 #define MLX5_TX_DB_NC "tx_db_nc"
105 * Device parameter to include 2 dsegs in the title WQEBB.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
111 * Device parameter to limit the size of inlining packet.
112 * Deprecated, ignored.
114 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
117 * Device parameter to enable hardware Tx vector.
118 * Deprecated, ignored (no vectorized Tx routines anymore).
120 #define MLX5_TX_VEC_EN "tx_vec_en"
122 /* Device parameter to enable hardware Rx vector. */
123 #define MLX5_RX_VEC_EN "rx_vec_en"
125 /* Allow L3 VXLAN flow creation. */
126 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
128 /* Activate DV E-Switch flow steering. */
129 #define MLX5_DV_ESW_EN "dv_esw_en"
131 /* Activate DV flow steering. */
132 #define MLX5_DV_FLOW_EN "dv_flow_en"
134 /* Enable extensive flow metadata support. */
135 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
137 /* Activate Netlink support in VF mode. */
138 #define MLX5_VF_NL_EN "vf_nl_en"
140 /* Enable extending memsegs when creating a MR. */
141 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
143 /* Select port representors to instantiate. */
144 #define MLX5_REPRESENTOR "representor"
146 /* Device parameter to configure the maximum number of dump files per queue. */
147 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
149 /* Configure timeout of LRO session (in microseconds). */
150 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
152 #ifndef HAVE_IBV_MLX5_MOD_MPW
153 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
154 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
157 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
158 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
161 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
163 /* Shared memory between primary and secondary processes. */
164 struct mlx5_shared_data *mlx5_shared_data;
166 /* Spinlock for mlx5_shared_data allocation. */
167 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
169 /* Process local data for secondary processes. */
170 static struct mlx5_local_data mlx5_local_data;
172 /** Driver-specific log messages type. */
175 /** Data associated with devices to spawn. */
176 struct mlx5_dev_spawn_data {
177 uint32_t ifindex; /**< Network interface index. */
178 uint32_t max_port; /**< IB device maximal port index. */
179 uint32_t ibv_port; /**< IB device physical port index. */
180 int pf_bond; /**< bonding device PF index. < 0 - no bonding */
181 struct mlx5_switch_info info; /**< Switch information. */
182 struct ibv_device *ibv_dev; /**< Associated IB device. */
183 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
184 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
187 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
188 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
190 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
191 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
194 * Allocate ID pool structure.
197 * Pointer to pool object, NULL value otherwise.
199 struct mlx5_flow_id_pool *
200 mlx5_flow_id_pool_alloc(void)
202 struct mlx5_flow_id_pool *pool;
205 pool = rte_zmalloc("id pool allocation", sizeof(*pool),
206 RTE_CACHE_LINE_SIZE);
208 DRV_LOG(ERR, "can't allocate id pool");
212 mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
213 RTE_CACHE_LINE_SIZE);
215 DRV_LOG(ERR, "can't allocate mem for id pool");
219 pool->free_arr = mem;
220 pool->curr = pool->free_arr;
221 pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
222 pool->base_index = 0;
230 * Release ID pool structure.
233 * Pointer to flow id pool object to free.
236 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
238 rte_free(pool->free_arr);
246 * Pointer to flow id pool.
251 * 0 on success, error value otherwise.
254 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
256 if (pool->curr == pool->free_arr) {
257 if (pool->base_index == UINT32_MAX) {
259 DRV_LOG(ERR, "no free id");
262 *id = ++pool->base_index;
265 *id = *(--pool->curr);
273 * Pointer to flow id pool.
278 * 0 on success, error value otherwise.
281 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
287 if (pool->curr == pool->last) {
288 size = pool->curr - pool->free_arr;
289 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
290 assert(size2 > size);
291 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
293 DRV_LOG(ERR, "can't allocate mem for id pool");
297 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
298 rte_free(pool->free_arr);
299 pool->free_arr = mem;
300 pool->curr = pool->free_arr + size;
301 pool->last = pool->free_arr + size2;
309 * Initialize the counters management structure.
312 * Pointer to mlx5_ibv_shared object to free
315 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
319 TAILQ_INIT(&sh->cmng.flow_counters);
320 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
321 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
325 * Destroy all the resources allocated for a counter memory management.
328 * Pointer to the memory management structure.
331 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
333 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
335 LIST_REMOVE(mng, next);
336 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
337 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
342 * Close and release all the resources of the counters management.
345 * Pointer to mlx5_ibv_shared object to free.
348 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
350 struct mlx5_counter_stats_mem_mng *mng;
357 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
358 if (rte_errno != EINPROGRESS)
362 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
363 struct mlx5_flow_counter_pool *pool;
364 uint32_t batch = !!(i % 2);
366 if (!sh->cmng.ccont[i].pools)
368 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
373 (mlx5_devx_cmd_destroy(pool->min_dcs));
375 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
376 if (pool->counters_raw[j].action)
378 (mlx5_glue->destroy_flow_action
379 (pool->counters_raw[j].action));
380 if (!batch && pool->counters_raw[j].dcs)
381 claim_zero(mlx5_devx_cmd_destroy
382 (pool->counters_raw[j].dcs));
384 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
387 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
389 rte_free(sh->cmng.ccont[i].pools);
391 mng = LIST_FIRST(&sh->cmng.mem_mngs);
393 mlx5_flow_destroy_counter_stat_mem_mng(mng);
394 mng = LIST_FIRST(&sh->cmng.mem_mngs);
396 memset(&sh->cmng, 0, sizeof(sh->cmng));
400 * Extract pdn of PD object using DV API.
403 * Pointer to the verbs PD object.
405 * Pointer to the PD object number variable.
408 * 0 on success, error value otherwise.
410 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
412 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
414 struct mlx5dv_obj obj;
415 struct mlx5dv_pd pd_info;
419 obj.pd.out = &pd_info;
420 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
422 DRV_LOG(DEBUG, "Fail to get PD object info");
428 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
431 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
436 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
437 /* Get environment variable to store. */
438 env = getenv(MLX5_SHUT_UP_BF);
439 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
440 if (config->dbnc == MLX5_ARG_UNSET)
441 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
443 setenv(MLX5_SHUT_UP_BF, config->dbnc ? "1" : "0", 1);
448 mlx5_restore_doorbell_mapping_env(const struct mlx5_dev_config *config,
451 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
452 if (config->dbnc == MLX5_ARG_UNSET)
454 /* Restore the original environment variable state. */
455 if (value == MLX5_ARG_UNSET)
456 unsetenv(MLX5_SHUT_UP_BF);
458 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
462 * Allocate shared IB device context. If there is multiport device the
463 * master and representors will share this context, if there is single
464 * port dedicated IB device, the context will be used by only given
465 * port due to unification.
467 * Routine first searches the context for the specified IB device name,
468 * if found the shared context assumed and reference counter is incremented.
469 * If no context found the new one is created and initialized with specified
470 * IB device context and parameters.
473 * Pointer to the IB device attributes (name, port, etc).
475 * Pointer to device configuration structure.
478 * Pointer to mlx5_ibv_shared object on success,
479 * otherwise NULL and rte_errno is set.
481 static struct mlx5_ibv_shared *
482 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
483 const struct mlx5_dev_config *config)
485 struct mlx5_ibv_shared *sh;
489 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
490 struct mlx5_devx_tis_attr tis_attr = { 0 };
494 /* Secondary process should not create the shared context. */
495 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
496 pthread_mutex_lock(&mlx5_ibv_list_mutex);
497 /* Search for IB context by device name. */
498 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
499 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
504 /* No device found, we have to create new shared context. */
505 assert(spawn->max_port);
506 sh = rte_zmalloc("ethdev shared ib context",
507 sizeof(struct mlx5_ibv_shared) +
509 sizeof(struct mlx5_ibv_shared_port),
510 RTE_CACHE_LINE_SIZE);
512 DRV_LOG(ERR, "shared context allocation failure");
517 * Configure environment variable "MLX5_BF_SHUT_UP"
518 * before the device creation. The rdma_core library
519 * checks the variable at device creation and
520 * stores the result internally.
522 dbmap_env = mlx5_config_doorbell_mapping_env(config);
523 /* Try to open IB device with DV first, then usual Verbs. */
525 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
528 DRV_LOG(DEBUG, "DevX is supported");
529 /* The device is created, no need for environment. */
530 mlx5_restore_doorbell_mapping_env(config, dbmap_env);
532 /* The environment variable is still configured. */
533 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
534 err = errno ? errno : ENODEV;
536 * The environment variable is not needed anymore,
537 * all device creation attempts are completed.
539 mlx5_restore_doorbell_mapping_env(config, dbmap_env);
543 DRV_LOG(DEBUG, "DevX is NOT supported");
545 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
547 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
551 sh->max_port = spawn->max_port;
552 strncpy(sh->ibdev_name, sh->ctx->device->name,
553 sizeof(sh->ibdev_name));
554 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
555 sizeof(sh->ibdev_path));
556 pthread_mutex_init(&sh->intr_mutex, NULL);
558 * Setting port_id to max unallowed value means
559 * there is no interrupt subhandler installed for
560 * the given port index i.
562 for (i = 0; i < sh->max_port; i++) {
563 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
564 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
566 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
567 if (sh->pd == NULL) {
568 DRV_LOG(ERR, "PD allocation failure");
572 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
574 err = mlx5_get_pdn(sh->pd, &sh->pdn);
576 DRV_LOG(ERR, "Fail to extract pdn from PD");
579 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
581 DRV_LOG(ERR, "TD allocation failure");
585 tis_attr.transport_domain = sh->td->id;
586 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
588 DRV_LOG(ERR, "TIS allocation failure");
593 sh->flow_id_pool = mlx5_flow_id_pool_alloc();
594 if (!sh->flow_id_pool) {
595 DRV_LOG(ERR, "can't create flow id pool");
599 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
601 * Once the device is added to the list of memory event
602 * callback, its global MR cache table cannot be expanded
603 * on the fly because of deadlock. If it overflows, lookup
604 * should be done by searching MR list linearly, which is slow.
606 * At this point the device is not added to the memory
607 * event list yet, context is just being created.
609 err = mlx5_mr_btree_init(&sh->mr.cache,
610 MLX5_MR_BTREE_CACHE_N * 2,
611 spawn->pci_dev->device.numa_node);
616 mlx5_flow_counters_mng_init(sh);
617 /* Add device to memory callback list. */
618 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
619 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
621 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
622 /* Add context to the global device list. */
623 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
625 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
628 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
631 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
633 claim_zero(mlx5_devx_cmd_destroy(sh->td));
635 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
637 claim_zero(mlx5_glue->close_device(sh->ctx));
638 if (sh->flow_id_pool)
639 mlx5_flow_id_pool_release(sh->flow_id_pool);
647 * Free shared IB device context. Decrement counter and if zero free
648 * all allocated resources and close handles.
651 * Pointer to mlx5_ibv_shared object to free
654 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
656 pthread_mutex_lock(&mlx5_ibv_list_mutex);
658 /* Check the object presence in the list. */
659 struct mlx5_ibv_shared *lctx;
661 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
666 DRV_LOG(ERR, "Freeing non-existing shared IB context");
672 /* Secondary process should not free the shared context. */
673 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
676 /* Release created Memory Regions. */
678 /* Remove from memory callback device list. */
679 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
680 LIST_REMOVE(sh, mem_event_cb);
681 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
682 /* Remove context from the global device list. */
683 LIST_REMOVE(sh, next);
685 * Ensure there is no async event handler installed.
686 * Only primary process handles async device events.
688 mlx5_flow_counters_mng_close(sh);
689 assert(!sh->intr_cnt);
691 mlx5_intr_callback_unregister
692 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
693 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
694 if (sh->devx_intr_cnt) {
695 if (sh->intr_handle_devx.fd)
696 rte_intr_callback_unregister(&sh->intr_handle_devx,
697 mlx5_dev_interrupt_handler_devx, sh);
699 mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
702 pthread_mutex_destroy(&sh->intr_mutex);
704 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
706 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
708 claim_zero(mlx5_devx_cmd_destroy(sh->td));
710 claim_zero(mlx5_glue->close_device(sh->ctx));
711 if (sh->flow_id_pool)
712 mlx5_flow_id_pool_release(sh->flow_id_pool);
715 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
719 * Initialize DR related data within private structure.
720 * Routine checks the reference counter and does actual
721 * resources creation/initialization only if counter is zero.
724 * Pointer to the private device data structure.
727 * Zero on success, positive error code otherwise.
730 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
732 #ifdef HAVE_MLX5DV_DR
733 struct mlx5_ibv_shared *sh = priv->sh;
739 /* Shared DV/DR structures is already initialized. */
744 /* Reference counter is zero, we should initialize structures. */
745 domain = mlx5_glue->dr_create_domain(sh->ctx,
746 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
748 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
752 sh->rx_domain = domain;
753 domain = mlx5_glue->dr_create_domain(sh->ctx,
754 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
756 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
760 pthread_mutex_init(&sh->dv_mutex, NULL);
761 sh->tx_domain = domain;
762 #ifdef HAVE_MLX5DV_DR_ESWITCH
763 if (priv->config.dv_esw_en) {
764 domain = mlx5_glue->dr_create_domain
765 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
767 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
771 sh->fdb_domain = domain;
772 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
775 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
781 /* Rollback the created objects. */
783 mlx5_glue->dr_destroy_domain(sh->rx_domain);
784 sh->rx_domain = NULL;
787 mlx5_glue->dr_destroy_domain(sh->tx_domain);
788 sh->tx_domain = NULL;
790 if (sh->fdb_domain) {
791 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
792 sh->fdb_domain = NULL;
794 if (sh->esw_drop_action) {
795 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
796 sh->esw_drop_action = NULL;
798 if (sh->pop_vlan_action) {
799 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
800 sh->pop_vlan_action = NULL;
810 * Destroy DR related data within private structure.
813 * Pointer to the private device data structure.
816 mlx5_free_shared_dr(struct mlx5_priv *priv)
818 #ifdef HAVE_MLX5DV_DR
819 struct mlx5_ibv_shared *sh;
821 if (!priv->dr_shared)
826 assert(sh->dv_refcnt);
827 if (sh->dv_refcnt && --sh->dv_refcnt)
830 mlx5_glue->dr_destroy_domain(sh->rx_domain);
831 sh->rx_domain = NULL;
834 mlx5_glue->dr_destroy_domain(sh->tx_domain);
835 sh->tx_domain = NULL;
837 #ifdef HAVE_MLX5DV_DR_ESWITCH
838 if (sh->fdb_domain) {
839 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
840 sh->fdb_domain = NULL;
842 if (sh->esw_drop_action) {
843 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
844 sh->esw_drop_action = NULL;
847 if (sh->pop_vlan_action) {
848 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
849 sh->pop_vlan_action = NULL;
851 pthread_mutex_destroy(&sh->dv_mutex);
858 * Initialize shared data between primary and secondary process.
860 * A memzone is reserved by primary process and secondary processes attach to
864 * 0 on success, a negative errno value otherwise and rte_errno is set.
867 mlx5_init_shared_data(void)
869 const struct rte_memzone *mz;
872 rte_spinlock_lock(&mlx5_shared_data_lock);
873 if (mlx5_shared_data == NULL) {
874 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
875 /* Allocate shared memory. */
876 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
877 sizeof(*mlx5_shared_data),
881 "Cannot allocate mlx5 shared data");
885 mlx5_shared_data = mz->addr;
886 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
887 rte_spinlock_init(&mlx5_shared_data->lock);
889 /* Lookup allocated shared memory. */
890 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
893 "Cannot attach mlx5 shared data");
897 mlx5_shared_data = mz->addr;
898 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
902 rte_spinlock_unlock(&mlx5_shared_data_lock);
907 * Retrieve integer value from environment variable.
910 * Environment variable name.
913 * Integer value, 0 if the variable is not set.
916 mlx5_getenv_int(const char *name)
918 const char *val = getenv(name);
926 * Verbs callback to allocate a memory. This function should allocate the space
927 * according to the size provided residing inside a huge page.
928 * Please note that all allocation must respect the alignment from libmlx5
929 * (i.e. currently sysconf(_SC_PAGESIZE)).
932 * The size in bytes of the memory to allocate.
934 * A pointer to the callback data.
937 * Allocated buffer, NULL otherwise and rte_errno is set.
940 mlx5_alloc_verbs_buf(size_t size, void *data)
942 struct mlx5_priv *priv = data;
944 size_t alignment = sysconf(_SC_PAGESIZE);
945 unsigned int socket = SOCKET_ID_ANY;
947 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
948 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
950 socket = ctrl->socket;
951 } else if (priv->verbs_alloc_ctx.type ==
952 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
953 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
955 socket = ctrl->socket;
957 assert(data != NULL);
958 ret = rte_malloc_socket(__func__, size, alignment, socket);
965 * Verbs callback to free a memory.
968 * A pointer to the memory to free.
970 * A pointer to the callback data.
973 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
975 assert(data != NULL);
980 * DPDK callback to add udp tunnel port
983 * A pointer to eth_dev
984 * @param[in] udp_tunnel
985 * A pointer to udp tunnel
988 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
991 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
992 struct rte_eth_udp_tunnel *udp_tunnel)
994 assert(udp_tunnel != NULL);
995 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
996 udp_tunnel->udp_port == 4789)
998 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
999 udp_tunnel->udp_port == 4790)
1005 * Initialize process private data structure.
1008 * Pointer to Ethernet device structure.
1011 * 0 on success, a negative errno value otherwise and rte_errno is set.
1014 mlx5_proc_priv_init(struct rte_eth_dev *dev)
1016 struct mlx5_priv *priv = dev->data->dev_private;
1017 struct mlx5_proc_priv *ppriv;
1021 * UAR register table follows the process private structure. BlueFlame
1022 * registers for Tx queues are stored in the table.
1025 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
1026 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
1027 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1032 ppriv->uar_table_sz = ppriv_size;
1033 dev->process_private = ppriv;
1038 * Un-initialize process private data structure.
1041 * Pointer to Ethernet device structure.
1044 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
1046 if (!dev->process_private)
1048 rte_free(dev->process_private);
1049 dev->process_private = NULL;
1053 * DPDK callback to close the device.
1055 * Destroy all queues and objects, free memory.
1058 * Pointer to Ethernet device structure.
1061 mlx5_dev_close(struct rte_eth_dev *dev)
1063 struct mlx5_priv *priv = dev->data->dev_private;
1067 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1069 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1070 /* In case mlx5_dev_stop() has not been called. */
1071 mlx5_dev_interrupt_handler_uninstall(dev);
1072 mlx5_dev_interrupt_handler_devx_uninstall(dev);
1073 mlx5_traffic_disable(dev);
1074 mlx5_flow_flush(dev, NULL);
1075 mlx5_flow_meter_flush(dev, NULL);
1076 /* Prevent crashes when queues are still in use. */
1077 dev->rx_pkt_burst = removed_rx_burst;
1078 dev->tx_pkt_burst = removed_tx_burst;
1080 /* Disable datapath on secondary process. */
1081 mlx5_mp_req_stop_rxtx(dev);
1082 if (priv->rxqs != NULL) {
1083 /* XXX race condition if mlx5_rx_burst() is still running. */
1085 for (i = 0; (i != priv->rxqs_n); ++i)
1086 mlx5_rxq_release(dev, i);
1090 if (priv->txqs != NULL) {
1091 /* XXX race condition if mlx5_tx_burst() is still running. */
1093 for (i = 0; (i != priv->txqs_n); ++i)
1094 mlx5_txq_release(dev, i);
1098 mlx5_proc_priv_uninit(dev);
1099 if (priv->mreg_cp_tbl)
1100 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1101 mlx5_mprq_free_mp(dev);
1102 mlx5_free_shared_dr(priv);
1103 if (priv->rss_conf.rss_key != NULL)
1104 rte_free(priv->rss_conf.rss_key);
1105 if (priv->reta_idx != NULL)
1106 rte_free(priv->reta_idx);
1107 if (priv->config.vf)
1108 mlx5_nl_mac_addr_flush(dev);
1109 if (priv->nl_socket_route >= 0)
1110 close(priv->nl_socket_route);
1111 if (priv->nl_socket_rdma >= 0)
1112 close(priv->nl_socket_rdma);
1113 if (priv->vmwa_context)
1114 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1117 * Free the shared context in last turn, because the cleanup
1118 * routines above may use some shared fields, like
1119 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1120 * ifindex if Netlink fails.
1122 mlx5_free_shared_ibctx(priv->sh);
1125 ret = mlx5_hrxq_verify(dev);
1127 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1128 dev->data->port_id);
1129 ret = mlx5_ind_table_obj_verify(dev);
1131 DRV_LOG(WARNING, "port %u some indirection table still remain",
1132 dev->data->port_id);
1133 ret = mlx5_rxq_obj_verify(dev);
1135 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1136 dev->data->port_id);
1137 ret = mlx5_rxq_verify(dev);
1139 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1140 dev->data->port_id);
1141 ret = mlx5_txq_obj_verify(dev);
1143 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1144 dev->data->port_id);
1145 ret = mlx5_txq_verify(dev);
1147 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1148 dev->data->port_id);
1149 ret = mlx5_flow_verify(dev);
1151 DRV_LOG(WARNING, "port %u some flows still remain",
1152 dev->data->port_id);
1153 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1157 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1158 struct mlx5_priv *opriv =
1159 rte_eth_devices[port_id].data->dev_private;
1162 opriv->domain_id != priv->domain_id ||
1163 &rte_eth_devices[port_id] == dev)
1169 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1171 memset(priv, 0, sizeof(*priv));
1172 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1174 * Reset mac_addrs to NULL such that it is not freed as part of
1175 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1176 * it is freed when dev_private is freed.
1178 dev->data->mac_addrs = NULL;
1181 const struct eth_dev_ops mlx5_dev_ops = {
1182 .dev_configure = mlx5_dev_configure,
1183 .dev_start = mlx5_dev_start,
1184 .dev_stop = mlx5_dev_stop,
1185 .dev_set_link_down = mlx5_set_link_down,
1186 .dev_set_link_up = mlx5_set_link_up,
1187 .dev_close = mlx5_dev_close,
1188 .promiscuous_enable = mlx5_promiscuous_enable,
1189 .promiscuous_disable = mlx5_promiscuous_disable,
1190 .allmulticast_enable = mlx5_allmulticast_enable,
1191 .allmulticast_disable = mlx5_allmulticast_disable,
1192 .link_update = mlx5_link_update,
1193 .stats_get = mlx5_stats_get,
1194 .stats_reset = mlx5_stats_reset,
1195 .xstats_get = mlx5_xstats_get,
1196 .xstats_reset = mlx5_xstats_reset,
1197 .xstats_get_names = mlx5_xstats_get_names,
1198 .fw_version_get = mlx5_fw_version_get,
1199 .dev_infos_get = mlx5_dev_infos_get,
1200 .read_clock = mlx5_read_clock,
1201 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1202 .vlan_filter_set = mlx5_vlan_filter_set,
1203 .rx_queue_setup = mlx5_rx_queue_setup,
1204 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1205 .tx_queue_setup = mlx5_tx_queue_setup,
1206 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1207 .rx_queue_release = mlx5_rx_queue_release,
1208 .tx_queue_release = mlx5_tx_queue_release,
1209 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1210 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1211 .mac_addr_remove = mlx5_mac_addr_remove,
1212 .mac_addr_add = mlx5_mac_addr_add,
1213 .mac_addr_set = mlx5_mac_addr_set,
1214 .set_mc_addr_list = mlx5_set_mc_addr_list,
1215 .mtu_set = mlx5_dev_set_mtu,
1216 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1217 .vlan_offload_set = mlx5_vlan_offload_set,
1218 .reta_update = mlx5_dev_rss_reta_update,
1219 .reta_query = mlx5_dev_rss_reta_query,
1220 .rss_hash_update = mlx5_rss_hash_update,
1221 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1222 .filter_ctrl = mlx5_dev_filter_ctrl,
1223 .rx_descriptor_status = mlx5_rx_descriptor_status,
1224 .tx_descriptor_status = mlx5_tx_descriptor_status,
1225 .rx_queue_count = mlx5_rx_queue_count,
1226 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1227 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1228 .is_removed = mlx5_is_removed,
1229 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
1230 .get_module_info = mlx5_get_module_info,
1231 .get_module_eeprom = mlx5_get_module_eeprom,
1232 .hairpin_cap_get = mlx5_hairpin_cap_get,
1233 .mtr_ops_get = mlx5_flow_meter_ops_get,
1236 /* Available operations from secondary process. */
1237 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1238 .stats_get = mlx5_stats_get,
1239 .stats_reset = mlx5_stats_reset,
1240 .xstats_get = mlx5_xstats_get,
1241 .xstats_reset = mlx5_xstats_reset,
1242 .xstats_get_names = mlx5_xstats_get_names,
1243 .fw_version_get = mlx5_fw_version_get,
1244 .dev_infos_get = mlx5_dev_infos_get,
1245 .rx_descriptor_status = mlx5_rx_descriptor_status,
1246 .tx_descriptor_status = mlx5_tx_descriptor_status,
1247 .get_module_info = mlx5_get_module_info,
1248 .get_module_eeprom = mlx5_get_module_eeprom,
1251 /* Available operations in flow isolated mode. */
1252 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1253 .dev_configure = mlx5_dev_configure,
1254 .dev_start = mlx5_dev_start,
1255 .dev_stop = mlx5_dev_stop,
1256 .dev_set_link_down = mlx5_set_link_down,
1257 .dev_set_link_up = mlx5_set_link_up,
1258 .dev_close = mlx5_dev_close,
1259 .promiscuous_enable = mlx5_promiscuous_enable,
1260 .promiscuous_disable = mlx5_promiscuous_disable,
1261 .allmulticast_enable = mlx5_allmulticast_enable,
1262 .allmulticast_disable = mlx5_allmulticast_disable,
1263 .link_update = mlx5_link_update,
1264 .stats_get = mlx5_stats_get,
1265 .stats_reset = mlx5_stats_reset,
1266 .xstats_get = mlx5_xstats_get,
1267 .xstats_reset = mlx5_xstats_reset,
1268 .xstats_get_names = mlx5_xstats_get_names,
1269 .fw_version_get = mlx5_fw_version_get,
1270 .dev_infos_get = mlx5_dev_infos_get,
1271 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1272 .vlan_filter_set = mlx5_vlan_filter_set,
1273 .rx_queue_setup = mlx5_rx_queue_setup,
1274 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1275 .tx_queue_setup = mlx5_tx_queue_setup,
1276 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1277 .rx_queue_release = mlx5_rx_queue_release,
1278 .tx_queue_release = mlx5_tx_queue_release,
1279 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1280 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1281 .mac_addr_remove = mlx5_mac_addr_remove,
1282 .mac_addr_add = mlx5_mac_addr_add,
1283 .mac_addr_set = mlx5_mac_addr_set,
1284 .set_mc_addr_list = mlx5_set_mc_addr_list,
1285 .mtu_set = mlx5_dev_set_mtu,
1286 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1287 .vlan_offload_set = mlx5_vlan_offload_set,
1288 .filter_ctrl = mlx5_dev_filter_ctrl,
1289 .rx_descriptor_status = mlx5_rx_descriptor_status,
1290 .tx_descriptor_status = mlx5_tx_descriptor_status,
1291 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1292 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1293 .is_removed = mlx5_is_removed,
1294 .get_module_info = mlx5_get_module_info,
1295 .get_module_eeprom = mlx5_get_module_eeprom,
1296 .hairpin_cap_get = mlx5_hairpin_cap_get,
1297 .mtr_ops_get = mlx5_flow_meter_ops_get,
1301 * Verify and store value for device argument.
1304 * Key argument to verify.
1306 * Value associated with key.
1311 * 0 on success, a negative errno value otherwise and rte_errno is set.
1314 mlx5_args_check(const char *key, const char *val, void *opaque)
1316 struct mlx5_dev_config *config = opaque;
1319 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1320 if (!strcmp(MLX5_REPRESENTOR, key))
1323 tmp = strtoul(val, NULL, 0);
1326 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1329 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1330 config->cqe_comp = !!tmp;
1331 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1332 config->cqe_pad = !!tmp;
1333 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1334 config->hw_padding = !!tmp;
1335 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1336 config->mprq.enabled = !!tmp;
1337 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1338 config->mprq.stride_num_n = tmp;
1339 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1340 config->mprq.max_memcpy_len = tmp;
1341 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1342 config->mprq.min_rxqs_num = tmp;
1343 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1344 DRV_LOG(WARNING, "%s: deprecated parameter,"
1345 " converted to txq_inline_max", key);
1346 config->txq_inline_max = tmp;
1347 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1348 config->txq_inline_max = tmp;
1349 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1350 config->txq_inline_min = tmp;
1351 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1352 config->txq_inline_mpw = tmp;
1353 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1354 config->txqs_inline = tmp;
1355 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1356 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1357 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1358 config->mps = !!tmp;
1359 } else if (strcmp(MLX5_TX_DB_NC, key) == 0) {
1360 config->dbnc = !!tmp;
1361 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1362 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1363 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1364 DRV_LOG(WARNING, "%s: deprecated parameter,"
1365 " converted to txq_inline_mpw", key);
1366 config->txq_inline_mpw = tmp;
1367 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1368 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1369 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1370 config->rx_vec_en = !!tmp;
1371 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1372 config->l3_vxlan_en = !!tmp;
1373 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1374 config->vf_nl_en = !!tmp;
1375 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1376 config->dv_esw_en = !!tmp;
1377 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1378 config->dv_flow_en = !!tmp;
1379 } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1380 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1381 tmp != MLX5_XMETA_MODE_META16 &&
1382 tmp != MLX5_XMETA_MODE_META32) {
1383 DRV_LOG(WARNING, "invalid extensive "
1384 "metadata parameter");
1388 config->dv_xmeta_en = tmp;
1389 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1390 config->mr_ext_memseg_en = !!tmp;
1391 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1392 config->max_dump_files_num = tmp;
1393 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1394 config->lro.timeout = tmp;
1396 DRV_LOG(WARNING, "%s: unknown parameter", key);
1404 * Parse device parameters.
1407 * Pointer to device configuration structure.
1409 * Device arguments structure.
1412 * 0 on success, a negative errno value otherwise and rte_errno is set.
1415 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1417 const char **params = (const char *[]){
1418 MLX5_RXQ_CQE_COMP_EN,
1419 MLX5_RXQ_CQE_PAD_EN,
1420 MLX5_RXQ_PKT_PAD_EN,
1422 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1423 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1426 MLX5_TXQ_INLINE_MIN,
1427 MLX5_TXQ_INLINE_MAX,
1428 MLX5_TXQ_INLINE_MPW,
1429 MLX5_TXQS_MIN_INLINE,
1432 MLX5_TXQ_MPW_HDR_DSEG_EN,
1433 MLX5_TXQ_MAX_INLINE_LEN,
1442 MLX5_MR_EXT_MEMSEG_EN,
1444 MLX5_MAX_DUMP_FILES_NUM,
1445 MLX5_LRO_TIMEOUT_USEC,
1448 struct rte_kvargs *kvlist;
1452 if (devargs == NULL)
1454 /* Following UGLY cast is done to pass checkpatch. */
1455 kvlist = rte_kvargs_parse(devargs->args, params);
1456 if (kvlist == NULL) {
1460 /* Process parameters. */
1461 for (i = 0; (params[i] != NULL); ++i) {
1462 if (rte_kvargs_count(kvlist, params[i])) {
1463 ret = rte_kvargs_process(kvlist, params[i],
1464 mlx5_args_check, config);
1467 rte_kvargs_free(kvlist);
1472 rte_kvargs_free(kvlist);
1476 static struct rte_pci_driver mlx5_driver;
1479 * PMD global initialization.
1481 * Independent from individual device, this function initializes global
1482 * per-PMD data structures distinguishing primary and secondary processes.
1483 * Hence, each initialization is called once per a process.
1486 * 0 on success, a negative errno value otherwise and rte_errno is set.
1489 mlx5_init_once(void)
1491 struct mlx5_shared_data *sd;
1492 struct mlx5_local_data *ld = &mlx5_local_data;
1495 if (mlx5_init_shared_data())
1497 sd = mlx5_shared_data;
1499 rte_spinlock_lock(&sd->lock);
1500 switch (rte_eal_process_type()) {
1501 case RTE_PROC_PRIMARY:
1504 LIST_INIT(&sd->mem_event_cb_list);
1505 rte_rwlock_init(&sd->mem_event_rwlock);
1506 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1507 mlx5_mr_mem_event_cb, NULL);
1508 ret = mlx5_mp_init_primary();
1511 sd->init_done = true;
1513 case RTE_PROC_SECONDARY:
1516 ret = mlx5_mp_init_secondary();
1519 ++sd->secondary_cnt;
1520 ld->init_done = true;
1526 rte_spinlock_unlock(&sd->lock);
1531 * Configures the minimal amount of data to inline into WQE
1532 * while sending packets.
1534 * - the txq_inline_min has the maximal priority, if this
1535 * key is specified in devargs
1536 * - if DevX is enabled the inline mode is queried from the
1537 * device (HCA attributes and NIC vport context if needed).
1538 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1539 * and none (0 bytes) for other NICs
1542 * Verbs device parameters (name, port, switch_info) to spawn.
1544 * Device configuration parameters.
1547 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1548 struct mlx5_dev_config *config)
1550 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1551 /* Application defines size of inlined data explicitly. */
1552 switch (spawn->pci_dev->id.device_id) {
1553 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1554 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1555 if (config->txq_inline_min <
1556 (int)MLX5_INLINE_HSIZE_L2) {
1558 "txq_inline_mix aligned to minimal"
1559 " ConnectX-4 required value %d",
1560 (int)MLX5_INLINE_HSIZE_L2);
1561 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1567 if (config->hca_attr.eth_net_offloads) {
1568 /* We have DevX enabled, inline mode queried successfully. */
1569 switch (config->hca_attr.wqe_inline_mode) {
1570 case MLX5_CAP_INLINE_MODE_L2:
1571 /* outer L2 header must be inlined. */
1572 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1574 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1575 /* No inline data are required by NIC. */
1576 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1577 config->hw_vlan_insert =
1578 config->hca_attr.wqe_vlan_insert;
1579 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1581 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1582 /* inline mode is defined by NIC vport context. */
1583 if (!config->hca_attr.eth_virt)
1585 switch (config->hca_attr.vport_inline_mode) {
1586 case MLX5_INLINE_MODE_NONE:
1587 config->txq_inline_min =
1588 MLX5_INLINE_HSIZE_NONE;
1590 case MLX5_INLINE_MODE_L2:
1591 config->txq_inline_min =
1592 MLX5_INLINE_HSIZE_L2;
1594 case MLX5_INLINE_MODE_IP:
1595 config->txq_inline_min =
1596 MLX5_INLINE_HSIZE_L3;
1598 case MLX5_INLINE_MODE_TCP_UDP:
1599 config->txq_inline_min =
1600 MLX5_INLINE_HSIZE_L4;
1602 case MLX5_INLINE_MODE_INNER_L2:
1603 config->txq_inline_min =
1604 MLX5_INLINE_HSIZE_INNER_L2;
1606 case MLX5_INLINE_MODE_INNER_IP:
1607 config->txq_inline_min =
1608 MLX5_INLINE_HSIZE_INNER_L3;
1610 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1611 config->txq_inline_min =
1612 MLX5_INLINE_HSIZE_INNER_L4;
1618 * We get here if we are unable to deduce
1619 * inline data size with DevX. Try PCI ID
1620 * to determine old NICs.
1622 switch (spawn->pci_dev->id.device_id) {
1623 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1624 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1625 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1626 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1627 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1628 config->hw_vlan_insert = 0;
1630 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1631 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1632 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1633 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1635 * These NICs support VLAN insertion from WQE and
1636 * report the wqe_vlan_insert flag. But there is the bug
1637 * and PFC control may be broken, so disable feature.
1639 config->hw_vlan_insert = 0;
1640 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1643 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1647 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1651 * Configures the metadata mask fields in the shared context.
1654 * Pointer to Ethernet device.
1657 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1659 struct mlx5_priv *priv = dev->data->dev_private;
1660 struct mlx5_ibv_shared *sh = priv->sh;
1661 uint32_t meta, mark, reg_c0;
1663 reg_c0 = ~priv->vport_meta_mask;
1664 switch (priv->config.dv_xmeta_en) {
1665 case MLX5_XMETA_MODE_LEGACY:
1667 mark = MLX5_FLOW_MARK_MASK;
1669 case MLX5_XMETA_MODE_META16:
1670 meta = reg_c0 >> rte_bsf32(reg_c0);
1671 mark = MLX5_FLOW_MARK_MASK;
1673 case MLX5_XMETA_MODE_META32:
1675 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1683 if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1684 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1685 sh->dv_mark_mask, mark);
1687 sh->dv_mark_mask = mark;
1688 if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1689 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1690 sh->dv_meta_mask, meta);
1692 sh->dv_meta_mask = meta;
1693 if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1694 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1695 sh->dv_meta_mask, reg_c0);
1697 sh->dv_regc0_mask = reg_c0;
1698 DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1699 DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1700 DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1701 DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1705 * Allocate page of door-bells and register it using DevX API.
1708 * Pointer to Ethernet device.
1711 * Pointer to new page on success, NULL otherwise.
1713 static struct mlx5_devx_dbr_page *
1714 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1716 struct mlx5_priv *priv = dev->data->dev_private;
1717 struct mlx5_devx_dbr_page *page;
1719 /* Allocate space for door-bell page and management data. */
1720 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1721 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1723 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1724 dev->data->port_id);
1727 /* Register allocated memory. */
1728 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1729 MLX5_DBR_PAGE_SIZE, 0);
1731 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1732 dev->data->port_id);
1740 * Find the next available door-bell, allocate new page if needed.
1743 * Pointer to Ethernet device.
1744 * @param [out] dbr_page
1745 * Door-bell page containing the page data.
1748 * Door-bell address offset on success, a negative error value otherwise.
1751 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1753 struct mlx5_priv *priv = dev->data->dev_private;
1754 struct mlx5_devx_dbr_page *page = NULL;
1757 LIST_FOREACH(page, &priv->dbrpgs, next)
1758 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1760 if (!page) { /* No page with free door-bell exists. */
1761 page = mlx5_alloc_dbr_page(dev);
1762 if (!page) /* Failed to allocate new page. */
1764 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1766 /* Loop to find bitmap part with clear bit. */
1768 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1771 /* Find the first clear bit. */
1772 j = rte_bsf64(~page->dbr_bitmap[i]);
1773 assert(i < (MLX5_DBR_PER_PAGE / 64));
1774 page->dbr_bitmap[i] |= (1 << j);
1777 return (((i * 64) + j) * sizeof(uint64_t));
1781 * Release a door-bell record.
1784 * Pointer to Ethernet device.
1785 * @param [in] umem_id
1786 * UMEM ID of page containing the door-bell record to release.
1787 * @param [in] offset
1788 * Offset of door-bell record in page.
1791 * 0 on success, a negative error value otherwise.
1794 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1796 struct mlx5_priv *priv = dev->data->dev_private;
1797 struct mlx5_devx_dbr_page *page = NULL;
1800 LIST_FOREACH(page, &priv->dbrpgs, next)
1801 /* Find the page this address belongs to. */
1802 if (page->umem->umem_id == umem_id)
1807 if (!page->dbr_count) {
1808 /* Page not used, free it and remove from list. */
1809 LIST_REMOVE(page, next);
1811 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1814 /* Mark in bitmap that this door-bell is not in use. */
1815 offset /= MLX5_DBR_SIZE;
1816 int i = offset / 64;
1817 int j = offset % 64;
1819 page->dbr_bitmap[i] &= ~(1 << j);
1825 * Check sibling device configurations.
1827 * Sibling devices sharing the Infiniband device context
1828 * should have compatible configurations. This regards
1829 * representors and bonding slaves.
1832 * Private device descriptor.
1834 * Configuration of the device is going to be created.
1837 * 0 on success, EINVAL otherwise
1840 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1841 struct mlx5_dev_config *config)
1843 struct mlx5_ibv_shared *sh = priv->sh;
1844 struct mlx5_dev_config *sh_conf = NULL;
1848 /* Nothing to compare for the single/first device. */
1849 if (sh->refcnt == 1)
1851 /* Find the device with shared context. */
1852 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1853 struct mlx5_priv *opriv =
1854 rte_eth_devices[port_id].data->dev_private;
1856 if (opriv && opriv != priv && opriv->sh == sh) {
1857 sh_conf = &opriv->config;
1863 if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1864 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1865 " for shared %s context", sh->ibdev_name);
1869 if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
1870 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
1871 " for shared %s context", sh->ibdev_name);
1878 * Spawn an Ethernet device from Verbs information.
1881 * Backing DPDK device.
1883 * Verbs device parameters (name, port, switch_info) to spawn.
1885 * Device configuration parameters.
1888 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1889 * is set. The following errors are defined:
1891 * EBUSY: device is not supposed to be spawned.
1892 * EEXIST: device is already spawned
1894 static struct rte_eth_dev *
1895 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1896 struct mlx5_dev_spawn_data *spawn,
1897 struct mlx5_dev_config config)
1899 const struct mlx5_switch_info *switch_info = &spawn->info;
1900 struct mlx5_ibv_shared *sh = NULL;
1901 struct ibv_port_attr port_attr;
1902 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1903 struct rte_eth_dev *eth_dev = NULL;
1904 struct mlx5_priv *priv = NULL;
1906 unsigned int hw_padding = 0;
1908 unsigned int cqe_comp;
1909 unsigned int cqe_pad = 0;
1910 unsigned int tunnel_en = 0;
1911 unsigned int mpls_en = 0;
1912 unsigned int swp = 0;
1913 unsigned int mprq = 0;
1914 unsigned int mprq_min_stride_size_n = 0;
1915 unsigned int mprq_max_stride_size_n = 0;
1916 unsigned int mprq_min_stride_num_n = 0;
1917 unsigned int mprq_max_stride_num_n = 0;
1918 struct rte_ether_addr mac;
1919 char name[RTE_ETH_NAME_MAX_LEN];
1920 int own_domain_id = 0;
1923 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1924 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
1927 /* Determine if this port representor is supposed to be spawned. */
1928 if (switch_info->representor && dpdk_dev->devargs) {
1929 struct rte_eth_devargs eth_da;
1931 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1934 DRV_LOG(ERR, "failed to process device arguments: %s",
1935 strerror(rte_errno));
1938 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1939 if (eth_da.representor_ports[i] ==
1940 (uint16_t)switch_info->port_name)
1942 if (i == eth_da.nb_representor_ports) {
1947 /* Build device name. */
1948 if (spawn->pf_bond < 0) {
1949 /* Single device. */
1950 if (!switch_info->representor)
1951 strlcpy(name, dpdk_dev->name, sizeof(name));
1953 snprintf(name, sizeof(name), "%s_representor_%u",
1954 dpdk_dev->name, switch_info->port_name);
1956 /* Bonding device. */
1957 if (!switch_info->representor)
1958 snprintf(name, sizeof(name), "%s_%s",
1959 dpdk_dev->name, spawn->ibv_dev->name);
1961 snprintf(name, sizeof(name), "%s_%s_representor_%u",
1962 dpdk_dev->name, spawn->ibv_dev->name,
1963 switch_info->port_name);
1965 /* check if the device is already spawned */
1966 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1970 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1971 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1972 eth_dev = rte_eth_dev_attach_secondary(name);
1973 if (eth_dev == NULL) {
1974 DRV_LOG(ERR, "can not attach rte ethdev");
1978 eth_dev->device = dpdk_dev;
1979 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1980 err = mlx5_proc_priv_init(eth_dev);
1983 /* Receive command fd from primary process */
1984 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1987 /* Remap UAR for Tx queues. */
1988 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1992 * Ethdev pointer is still required as input since
1993 * the primary device is not accessible from the
1994 * secondary process.
1996 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1997 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
2001 * Some parameters ("tx_db_nc" in particularly) are needed in
2002 * advance to create dv/verbs device context. We proceed the
2003 * devargs here to get ones, and later proceed devargs again
2004 * to override some hardware settings.
2006 err = mlx5_args(&config, dpdk_dev->devargs);
2009 DRV_LOG(ERR, "failed to process device arguments: %s",
2010 strerror(rte_errno));
2013 sh = mlx5_alloc_shared_ibctx(spawn, &config);
2016 config.devx = sh->devx;
2017 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
2018 config.dest_tir = 1;
2020 #ifdef HAVE_IBV_MLX5_MOD_SWP
2021 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
2024 * Multi-packet send is supported by ConnectX-4 Lx PF as well
2025 * as all ConnectX-5 devices.
2027 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2028 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
2030 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2031 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
2033 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
2034 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
2035 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
2036 DRV_LOG(DEBUG, "enhanced MPW is supported");
2037 mps = MLX5_MPW_ENHANCED;
2039 DRV_LOG(DEBUG, "MPW is supported");
2043 DRV_LOG(DEBUG, "MPW isn't supported");
2044 mps = MLX5_MPW_DISABLED;
2046 #ifdef HAVE_IBV_MLX5_MOD_SWP
2047 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
2048 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
2049 DRV_LOG(DEBUG, "SWP support: %u", swp);
2052 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2053 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
2054 struct mlx5dv_striding_rq_caps mprq_caps =
2055 dv_attr.striding_rq_caps;
2057 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
2058 mprq_caps.min_single_stride_log_num_of_bytes);
2059 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
2060 mprq_caps.max_single_stride_log_num_of_bytes);
2061 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
2062 mprq_caps.min_single_wqe_log_num_of_strides);
2063 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
2064 mprq_caps.max_single_wqe_log_num_of_strides);
2065 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
2066 mprq_caps.supported_qpts);
2067 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
2069 mprq_min_stride_size_n =
2070 mprq_caps.min_single_stride_log_num_of_bytes;
2071 mprq_max_stride_size_n =
2072 mprq_caps.max_single_stride_log_num_of_bytes;
2073 mprq_min_stride_num_n =
2074 mprq_caps.min_single_wqe_log_num_of_strides;
2075 mprq_max_stride_num_n =
2076 mprq_caps.max_single_wqe_log_num_of_strides;
2077 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2078 mprq_min_stride_num_n);
2081 if (RTE_CACHE_LINE_SIZE == 128 &&
2082 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2086 config.cqe_comp = cqe_comp;
2087 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2088 /* Whether device supports 128B Rx CQE padding. */
2089 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2090 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2092 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2093 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2094 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2095 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2096 (dv_attr.tunnel_offloads_caps &
2097 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
2099 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2100 tunnel_en ? "" : "not ");
2103 "tunnel offloading disabled due to old OFED/rdma-core version");
2105 config.tunnel_en = tunnel_en;
2106 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2107 mpls_en = ((dv_attr.tunnel_offloads_caps &
2108 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2109 (dv_attr.tunnel_offloads_caps &
2110 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2111 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2112 mpls_en ? "" : "not ");
2114 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2115 " old OFED/rdma-core version or firmware configuration");
2117 config.mpls_en = mpls_en;
2118 /* Check port status. */
2119 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2121 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2124 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2125 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2129 if (port_attr.state != IBV_PORT_ACTIVE)
2130 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2131 mlx5_glue->port_state_str(port_attr.state),
2133 /* Allocate private eth device data. */
2134 priv = rte_zmalloc("ethdev private structure",
2136 RTE_CACHE_LINE_SIZE);
2138 DRV_LOG(ERR, "priv allocation failure");
2143 priv->ibv_port = spawn->ibv_port;
2144 priv->pci_dev = spawn->pci_dev;
2145 priv->mtu = RTE_ETHER_MTU;
2147 /* Initialize UAR access locks for 32bit implementations. */
2148 rte_spinlock_init(&priv->uar_lock_cq);
2149 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2150 rte_spinlock_init(&priv->uar_lock[i]);
2152 /* Some internal functions rely on Netlink sockets, open them now. */
2153 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2154 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2156 priv->representor = !!switch_info->representor;
2157 priv->master = !!switch_info->master;
2158 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2159 priv->vport_meta_tag = 0;
2160 priv->vport_meta_mask = 0;
2161 priv->pf_bond = spawn->pf_bond;
2162 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2164 * The DevX port query API is implemented. E-Switch may use
2165 * either vport or reg_c[0] metadata register to match on
2166 * vport index. The engaged part of metadata register is
2169 if (switch_info->representor || switch_info->master) {
2170 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2171 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2172 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2176 "can't query devx port %d on device %s",
2177 spawn->ibv_port, spawn->ibv_dev->name);
2178 devx_port.comp_mask = 0;
2181 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2182 priv->vport_meta_tag = devx_port.reg_c_0.value;
2183 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2184 if (!priv->vport_meta_mask) {
2185 DRV_LOG(ERR, "vport zero mask for port %d"
2186 " on bonding device %s",
2187 spawn->ibv_port, spawn->ibv_dev->name);
2191 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2192 DRV_LOG(ERR, "invalid vport tag for port %d"
2193 " on bonding device %s",
2194 spawn->ibv_port, spawn->ibv_dev->name);
2198 } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2199 priv->vport_id = devx_port.vport_num;
2200 } else if (spawn->pf_bond >= 0) {
2201 DRV_LOG(ERR, "can't deduce vport index for port %d"
2202 " on bonding device %s",
2203 spawn->ibv_port, spawn->ibv_dev->name);
2207 /* Suppose vport index in compatible way. */
2208 priv->vport_id = switch_info->representor ?
2209 switch_info->port_name + 1 : -1;
2213 * Kernel/rdma_core support single E-Switch per PF configurations
2214 * only and vport_id field contains the vport index for
2215 * associated VF, which is deduced from representor port name.
2216 * For example, let's have the IB device port 10, it has
2217 * attached network device eth0, which has port name attribute
2218 * pf0vf2, we can deduce the VF number as 2, and set vport index
2219 * as 3 (2+1). This assigning schema should be changed if the
2220 * multiple E-Switch instances per PF configurations or/and PCI
2221 * subfunctions are added.
2223 priv->vport_id = switch_info->representor ?
2224 switch_info->port_name + 1 : -1;
2226 /* representor_id field keeps the unmodified VF index. */
2227 priv->representor_id = switch_info->representor ?
2228 switch_info->port_name : -1;
2230 * Look for sibling devices in order to reuse their switch domain
2231 * if any, otherwise allocate one.
2233 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2234 const struct mlx5_priv *opriv =
2235 rte_eth_devices[port_id].data->dev_private;
2238 opriv->sh != priv->sh ||
2240 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2242 priv->domain_id = opriv->domain_id;
2245 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2246 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2249 DRV_LOG(ERR, "unable to allocate switch domain: %s",
2250 strerror(rte_errno));
2255 /* Override some values set by hardware configuration. */
2256 mlx5_args(&config, dpdk_dev->devargs);
2257 err = mlx5_dev_check_sibling_config(priv, &config);
2260 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2261 IBV_DEVICE_RAW_IP_CSUM);
2262 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2263 (config.hw_csum ? "" : "not "));
2264 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2265 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2266 DRV_LOG(DEBUG, "counters are not supported");
2268 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2269 if (config.dv_flow_en) {
2270 DRV_LOG(WARNING, "DV flow is not supported");
2271 config.dv_flow_en = 0;
2274 config.ind_table_max_size =
2275 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2277 * Remove this check once DPDK supports larger/variable
2278 * indirection tables.
2280 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2281 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2282 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2283 config.ind_table_max_size);
2284 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2285 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2286 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2287 (config.hw_vlan_strip ? "" : "not "));
2288 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2289 IBV_RAW_PACKET_CAP_SCATTER_FCS);
2290 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2291 (config.hw_fcs_strip ? "" : "not "));
2292 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2293 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2294 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2295 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2296 IBV_DEVICE_PCI_WRITE_END_PADDING);
2298 if (config.hw_padding && !hw_padding) {
2299 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2300 config.hw_padding = 0;
2301 } else if (config.hw_padding) {
2302 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2304 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2305 (sh->device_attr.tso_caps.supported_qpts &
2306 (1 << IBV_QPT_RAW_PACKET)));
2308 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2310 * MPW is disabled by default, while the Enhanced MPW is enabled
2313 if (config.mps == MLX5_ARG_UNSET)
2314 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2317 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2318 DRV_LOG(INFO, "%sMPS is %s",
2319 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2320 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2321 if (config.cqe_comp && !cqe_comp) {
2322 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2323 config.cqe_comp = 0;
2325 if (config.cqe_pad && !cqe_pad) {
2326 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2328 } else if (config.cqe_pad) {
2329 DRV_LOG(INFO, "Rx CQE padding is enabled");
2332 priv->counter_fallback = 0;
2333 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2338 if (!config.hca_attr.flow_counters_dump)
2339 priv->counter_fallback = 1;
2340 #ifndef HAVE_IBV_DEVX_ASYNC
2341 priv->counter_fallback = 1;
2343 if (priv->counter_fallback)
2344 DRV_LOG(INFO, "Use fall-back DV counter management");
2345 /* Check for LRO support. */
2346 if (config.dest_tir && config.hca_attr.lro_cap &&
2347 config.dv_flow_en) {
2348 /* TBD check tunnel lro caps. */
2349 config.lro.supported = config.hca_attr.lro_cap;
2350 DRV_LOG(DEBUG, "Device supports LRO");
2352 * If LRO timeout is not configured by application,
2353 * use the minimal supported value.
2355 if (!config.lro.timeout)
2356 config.lro.timeout =
2357 config.hca_attr.lro_timer_supported_periods[0];
2358 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2359 config.lro.timeout);
2361 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2362 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2363 config.dv_flow_en) {
2364 uint8_t reg_c_mask =
2365 config.hca_attr.qos.flow_meter_reg_c_ids;
2367 * Meter needs two REG_C's for color match and pre-sfx
2368 * flow match. Here get the REG_C for color match.
2369 * REG_C_0 and REG_C_1 is reserved for metadata feature.
2372 if (__builtin_popcount(reg_c_mask) < 1) {
2374 DRV_LOG(WARNING, "No available register for"
2377 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2380 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2381 priv->mtr_color_reg);
2386 if (config.mprq.enabled && mprq) {
2387 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2388 config.mprq.stride_num_n < mprq_min_stride_num_n) {
2389 config.mprq.stride_num_n =
2390 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2391 mprq_min_stride_num_n);
2393 "the number of strides"
2394 " for Multi-Packet RQ is out of range,"
2395 " setting default value (%u)",
2396 1 << config.mprq.stride_num_n);
2398 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2399 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2400 } else if (config.mprq.enabled && !mprq) {
2401 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2402 config.mprq.enabled = 0;
2404 if (config.max_dump_files_num == 0)
2405 config.max_dump_files_num = 128;
2406 eth_dev = rte_eth_dev_allocate(name);
2407 if (eth_dev == NULL) {
2408 DRV_LOG(ERR, "can not allocate rte ethdev");
2412 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2413 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2414 if (priv->representor) {
2415 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2416 eth_dev->data->representor_id = priv->representor_id;
2419 * Store associated network device interface index. This index
2420 * is permanent throughout the lifetime of device. So, we may store
2421 * the ifindex here and use the cached value further.
2423 assert(spawn->ifindex);
2424 priv->if_index = spawn->ifindex;
2425 eth_dev->data->dev_private = priv;
2426 priv->dev_data = eth_dev->data;
2427 eth_dev->data->mac_addrs = priv->mac;
2428 eth_dev->device = dpdk_dev;
2429 /* Configure the first MAC address by default. */
2430 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2432 "port %u cannot get MAC address, is mlx5_en"
2433 " loaded? (errno: %s)",
2434 eth_dev->data->port_id, strerror(rte_errno));
2439 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2440 eth_dev->data->port_id,
2441 mac.addr_bytes[0], mac.addr_bytes[1],
2442 mac.addr_bytes[2], mac.addr_bytes[3],
2443 mac.addr_bytes[4], mac.addr_bytes[5]);
2446 char ifname[IF_NAMESIZE];
2448 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2449 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2450 eth_dev->data->port_id, ifname);
2452 DRV_LOG(DEBUG, "port %u ifname is unknown",
2453 eth_dev->data->port_id);
2456 /* Get actual MTU if possible. */
2457 err = mlx5_get_mtu(eth_dev, &priv->mtu);
2462 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2464 /* Initialize burst functions to prevent crashes before link-up. */
2465 eth_dev->rx_pkt_burst = removed_rx_burst;
2466 eth_dev->tx_pkt_burst = removed_tx_burst;
2467 eth_dev->dev_ops = &mlx5_dev_ops;
2468 /* Register MAC address. */
2469 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2470 if (config.vf && config.vf_nl_en)
2471 mlx5_nl_mac_addr_sync(eth_dev);
2472 TAILQ_INIT(&priv->flows);
2473 TAILQ_INIT(&priv->ctrl_flows);
2474 TAILQ_INIT(&priv->flow_meters);
2475 TAILQ_INIT(&priv->flow_meter_profiles);
2476 /* Hint libmlx5 to use PMD allocator for data plane resources */
2477 struct mlx5dv_ctx_allocators alctr = {
2478 .alloc = &mlx5_alloc_verbs_buf,
2479 .free = &mlx5_free_verbs_buf,
2482 mlx5_glue->dv_set_context_attr(sh->ctx,
2483 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2484 (void *)((uintptr_t)&alctr));
2485 /* Bring Ethernet device up. */
2486 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2487 eth_dev->data->port_id);
2488 mlx5_set_link_up(eth_dev);
2490 * Even though the interrupt handler is not installed yet,
2491 * interrupts will still trigger on the async_fd from
2492 * Verbs context returned by ibv_open_device().
2494 mlx5_link_update(eth_dev, 0);
2495 #ifdef HAVE_MLX5DV_DR_ESWITCH
2496 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2497 (switch_info->representor || switch_info->master)))
2498 config.dv_esw_en = 0;
2500 config.dv_esw_en = 0;
2502 /* Detect minimal data bytes to inline. */
2503 mlx5_set_min_inline(spawn, &config);
2504 /* Store device configuration on private structure. */
2505 priv->config = config;
2506 /* Create context for virtual machine VLAN workaround. */
2507 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2508 if (config.dv_flow_en) {
2509 err = mlx5_alloc_shared_dr(priv);
2512 priv->qrss_id_pool = mlx5_flow_id_pool_alloc();
2513 if (!priv->qrss_id_pool) {
2514 DRV_LOG(ERR, "can't create flow id pool");
2519 /* Supported Verbs flow priority number detection. */
2520 err = mlx5_flow_discover_priorities(eth_dev);
2525 priv->config.flow_prio = err;
2526 if (!priv->config.dv_esw_en &&
2527 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2528 DRV_LOG(WARNING, "metadata mode %u is not supported "
2529 "(no E-Switch)", priv->config.dv_xmeta_en);
2530 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2532 mlx5_set_metadata_mask(eth_dev);
2533 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2534 !priv->sh->dv_regc0_mask) {
2535 DRV_LOG(ERR, "metadata mode %u is not supported "
2536 "(no metadata reg_c[0] is available)",
2537 priv->config.dv_xmeta_en);
2541 /* Query availibility of metadata reg_c's. */
2542 err = mlx5_flow_discover_mreg_c(eth_dev);
2547 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2549 "port %u extensive metadata register is not supported",
2550 eth_dev->data->port_id);
2551 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2552 DRV_LOG(ERR, "metadata mode %u is not supported "
2553 "(no metadata registers available)",
2554 priv->config.dv_xmeta_en);
2559 if (priv->config.dv_flow_en &&
2560 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2561 mlx5_flow_ext_mreg_supported(eth_dev) &&
2562 priv->sh->dv_regc0_mask) {
2563 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2564 MLX5_FLOW_MREG_HTABLE_SZ);
2565 if (!priv->mreg_cp_tbl) {
2573 if (priv->mreg_cp_tbl)
2574 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2576 mlx5_free_shared_dr(priv);
2577 if (priv->nl_socket_route >= 0)
2578 close(priv->nl_socket_route);
2579 if (priv->nl_socket_rdma >= 0)
2580 close(priv->nl_socket_rdma);
2581 if (priv->vmwa_context)
2582 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2583 if (priv->qrss_id_pool)
2584 mlx5_flow_id_pool_release(priv->qrss_id_pool);
2586 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2588 if (eth_dev != NULL)
2589 eth_dev->data->dev_private = NULL;
2591 if (eth_dev != NULL) {
2592 /* mac_addrs must not be freed alone because part of dev_private */
2593 eth_dev->data->mac_addrs = NULL;
2594 rte_eth_dev_release_port(eth_dev);
2597 mlx5_free_shared_ibctx(sh);
2604 * Comparison callback to sort device data.
2606 * This is meant to be used with qsort().
2609 * Pointer to pointer to first data object.
2611 * Pointer to pointer to second data object.
2614 * 0 if both objects are equal, less than 0 if the first argument is less
2615 * than the second, greater than 0 otherwise.
2618 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2620 const struct mlx5_switch_info *si_a =
2621 &((const struct mlx5_dev_spawn_data *)a)->info;
2622 const struct mlx5_switch_info *si_b =
2623 &((const struct mlx5_dev_spawn_data *)b)->info;
2626 /* Master device first. */
2627 ret = si_b->master - si_a->master;
2630 /* Then representor devices. */
2631 ret = si_b->representor - si_a->representor;
2634 /* Unidentified devices come last in no specific order. */
2635 if (!si_a->representor)
2637 /* Order representors by name. */
2638 return si_a->port_name - si_b->port_name;
2642 * Match PCI information for possible slaves of bonding device.
2644 * @param[in] ibv_dev
2645 * Pointer to Infiniband device structure.
2646 * @param[in] pci_dev
2647 * Pointer to PCI device structure to match PCI address.
2648 * @param[in] nl_rdma
2649 * Netlink RDMA group socket handle.
2652 * negative value if no bonding device found, otherwise
2653 * positive index of slave PF in bonding.
2656 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2657 const struct rte_pci_device *pci_dev,
2660 char ifname[IF_NAMESIZE + 1];
2661 unsigned int ifindex;
2667 * Try to get master device name. If something goes
2668 * wrong suppose the lack of kernel support and no
2673 if (!strstr(ibv_dev->name, "bond"))
2675 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2679 * The Master device might not be on the predefined
2680 * port (not on port index 1, it is not garanted),
2681 * we have to scan all Infiniband device port and
2684 for (i = 1; i <= np; ++i) {
2685 /* Check whether Infiniband port is populated. */
2686 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2689 if (!if_indextoname(ifindex, ifname))
2691 /* Try to read bonding slave names from sysfs. */
2693 "/sys/class/net/%s/master/bonding/slaves", ifname);
2694 file = fopen(slaves, "r");
2700 /* Use safe format to check maximal buffer length. */
2701 assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2702 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2703 char tmp_str[IF_NAMESIZE + 32];
2704 struct rte_pci_addr pci_addr;
2705 struct mlx5_switch_info info;
2707 /* Process slave interface names in the loop. */
2708 snprintf(tmp_str, sizeof(tmp_str),
2709 "/sys/class/net/%s", ifname);
2710 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2711 DRV_LOG(WARNING, "can not get PCI address"
2712 " for netdev \"%s\"", ifname);
2715 if (pci_dev->addr.domain != pci_addr.domain ||
2716 pci_dev->addr.bus != pci_addr.bus ||
2717 pci_dev->addr.devid != pci_addr.devid ||
2718 pci_dev->addr.function != pci_addr.function)
2720 /* Slave interface PCI address match found. */
2722 snprintf(tmp_str, sizeof(tmp_str),
2723 "/sys/class/net/%s/phys_port_name", ifname);
2724 file = fopen(tmp_str, "rb");
2727 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2728 if (fscanf(file, "%32s", tmp_str) == 1)
2729 mlx5_translate_port_name(tmp_str, &info);
2730 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2731 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2732 pf = info.port_name;
2741 * DPDK callback to register a PCI device.
2743 * This function spawns Ethernet devices out of a given PCI device.
2745 * @param[in] pci_drv
2746 * PCI driver structure (mlx5_driver).
2747 * @param[in] pci_dev
2748 * PCI device information.
2751 * 0 on success, a negative errno value otherwise and rte_errno is set.
2754 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2755 struct rte_pci_device *pci_dev)
2757 struct ibv_device **ibv_list;
2759 * Number of found IB Devices matching with requested PCI BDF.
2760 * nd != 1 means there are multiple IB devices over the same
2761 * PCI device and we have representors and master.
2763 unsigned int nd = 0;
2765 * Number of found IB device Ports. nd = 1 and np = 1..n means
2766 * we have the single multiport IB device, and there may be
2767 * representors attached to some of found ports.
2769 unsigned int np = 0;
2771 * Number of DPDK ethernet devices to Spawn - either over
2772 * multiple IB devices or multiple ports of single IB device.
2773 * Actually this is the number of iterations to spawn.
2775 unsigned int ns = 0;
2778 * < 0 - no bonding device (single one)
2779 * >= 0 - bonding device (value is slave PF index)
2782 struct mlx5_dev_spawn_data *list = NULL;
2783 struct mlx5_dev_config dev_config;
2786 ret = mlx5_init_once();
2788 DRV_LOG(ERR, "unable to init PMD global data: %s",
2789 strerror(rte_errno));
2792 assert(pci_drv == &mlx5_driver);
2794 ibv_list = mlx5_glue->get_device_list(&ret);
2796 rte_errno = errno ? errno : ENOSYS;
2797 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2801 * First scan the list of all Infiniband devices to find
2802 * matching ones, gathering into the list.
2804 struct ibv_device *ibv_match[ret + 1];
2805 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2806 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2810 struct rte_pci_addr pci_addr;
2812 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2813 bd = mlx5_device_bond_pci_match
2814 (ibv_list[ret], pci_dev, nl_rdma);
2817 * Bonding device detected. Only one match is allowed,
2818 * the bonding is supported over multi-port IB device,
2819 * there should be no matches on representor PCI
2820 * functions or non VF LAG bonding devices with
2821 * specified address.
2825 "multiple PCI match on bonding device"
2826 "\"%s\" found", ibv_list[ret]->name);
2831 DRV_LOG(INFO, "PCI information matches for"
2832 " slave %d bonding device \"%s\"",
2833 bd, ibv_list[ret]->name);
2834 ibv_match[nd++] = ibv_list[ret];
2837 if (mlx5_dev_to_pci_addr
2838 (ibv_list[ret]->ibdev_path, &pci_addr))
2840 if (pci_dev->addr.domain != pci_addr.domain ||
2841 pci_dev->addr.bus != pci_addr.bus ||
2842 pci_dev->addr.devid != pci_addr.devid ||
2843 pci_dev->addr.function != pci_addr.function)
2845 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2846 ibv_list[ret]->name);
2847 ibv_match[nd++] = ibv_list[ret];
2849 ibv_match[nd] = NULL;
2851 /* No device matches, just complain and bail out. */
2853 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2854 " are kernel drivers loaded?",
2855 pci_dev->addr.domain, pci_dev->addr.bus,
2856 pci_dev->addr.devid, pci_dev->addr.function);
2863 * Found single matching device may have multiple ports.
2864 * Each port may be representor, we have to check the port
2865 * number and check the representors existence.
2868 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2870 DRV_LOG(WARNING, "can not get IB device \"%s\""
2871 " ports number", ibv_match[0]->name);
2872 if (bd >= 0 && !np) {
2873 DRV_LOG(ERR, "can not get ports"
2874 " for bonding device");
2880 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2883 * This may happen if there is VF LAG kernel support and
2884 * application is compiled with older rdma_core library.
2887 "No kernel/verbs support for VF LAG bonding found.");
2888 rte_errno = ENOTSUP;
2894 * Now we can determine the maximal
2895 * amount of devices to be spawned.
2897 list = rte_zmalloc("device spawn data",
2898 sizeof(struct mlx5_dev_spawn_data) *
2900 RTE_CACHE_LINE_SIZE);
2902 DRV_LOG(ERR, "spawn data array allocation failure");
2907 if (bd >= 0 || np > 1) {
2909 * Single IB device with multiple ports found,
2910 * it may be E-Switch master device and representors.
2911 * We have to perform identification trough the ports.
2913 assert(nl_rdma >= 0);
2917 for (i = 1; i <= np; ++i) {
2918 list[ns].max_port = np;
2919 list[ns].ibv_port = i;
2920 list[ns].ibv_dev = ibv_match[0];
2921 list[ns].eth_dev = NULL;
2922 list[ns].pci_dev = pci_dev;
2923 list[ns].pf_bond = bd;
2924 list[ns].ifindex = mlx5_nl_ifindex
2925 (nl_rdma, list[ns].ibv_dev->name, i);
2926 if (!list[ns].ifindex) {
2928 * No network interface index found for the
2929 * specified port, it means there is no
2930 * representor on this port. It's OK,
2931 * there can be disabled ports, for example
2932 * if sriov_numvfs < sriov_totalvfs.
2938 ret = mlx5_nl_switch_info
2942 if (ret || (!list[ns].info.representor &&
2943 !list[ns].info.master)) {
2945 * We failed to recognize representors with
2946 * Netlink, let's try to perform the task
2949 ret = mlx5_sysfs_switch_info
2953 if (!ret && bd >= 0) {
2954 switch (list[ns].info.name_type) {
2955 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2956 if (list[ns].info.port_name == bd)
2959 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2960 if (list[ns].info.pf_num == bd)
2968 if (!ret && (list[ns].info.representor ^
2969 list[ns].info.master))
2974 "unable to recognize master/representors"
2975 " on the IB device with multiple ports");
2982 * The existence of several matching entries (nd > 1) means
2983 * port representors have been instantiated. No existing Verbs
2984 * call nor sysfs entries can tell them apart, this can only
2985 * be done through Netlink calls assuming kernel drivers are
2986 * recent enough to support them.
2988 * In the event of identification failure through Netlink,
2989 * try again through sysfs, then:
2991 * 1. A single IB device matches (nd == 1) with single
2992 * port (np=0/1) and is not a representor, assume
2993 * no switch support.
2995 * 2. Otherwise no safe assumptions can be made;
2996 * complain louder and bail out.
2999 for (i = 0; i != nd; ++i) {
3000 memset(&list[ns].info, 0, sizeof(list[ns].info));
3001 list[ns].max_port = 1;
3002 list[ns].ibv_port = 1;
3003 list[ns].ibv_dev = ibv_match[i];
3004 list[ns].eth_dev = NULL;
3005 list[ns].pci_dev = pci_dev;
3006 list[ns].pf_bond = -1;
3007 list[ns].ifindex = 0;
3009 list[ns].ifindex = mlx5_nl_ifindex
3010 (nl_rdma, list[ns].ibv_dev->name, 1);
3011 if (!list[ns].ifindex) {
3012 char ifname[IF_NAMESIZE];
3015 * Netlink failed, it may happen with old
3016 * ib_core kernel driver (before 4.16).
3017 * We can assume there is old driver because
3018 * here we are processing single ports IB
3019 * devices. Let's try sysfs to retrieve
3020 * the ifindex. The method works for
3021 * master device only.
3025 * Multiple devices found, assume
3026 * representors, can not distinguish
3027 * master/representor and retrieve
3028 * ifindex via sysfs.
3032 ret = mlx5_get_master_ifname
3033 (ibv_match[i]->ibdev_path, &ifname);
3036 if_nametoindex(ifname);
3037 if (!list[ns].ifindex) {
3039 * No network interface index found
3040 * for the specified device, it means
3041 * there it is neither representor
3049 ret = mlx5_nl_switch_info
3053 if (ret || (!list[ns].info.representor &&
3054 !list[ns].info.master)) {
3056 * We failed to recognize representors with
3057 * Netlink, let's try to perform the task
3060 ret = mlx5_sysfs_switch_info
3064 if (!ret && (list[ns].info.representor ^
3065 list[ns].info.master)) {
3067 } else if ((nd == 1) &&
3068 !list[ns].info.representor &&
3069 !list[ns].info.master) {
3071 * Single IB device with
3072 * one physical port and
3073 * attached network device.
3074 * May be SRIOV is not enabled
3075 * or there is no representors.
3077 DRV_LOG(INFO, "no E-Switch support detected");
3084 "unable to recognize master/representors"
3085 " on the multiple IB devices");
3093 * Sort list to probe devices in natural order for users convenience
3094 * (i.e. master first, then representors from lowest to highest ID).
3096 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3097 /* Default configuration. */
3098 dev_config = (struct mlx5_dev_config){
3100 .mps = MLX5_ARG_UNSET,
3101 .dbnc = MLX5_ARG_UNSET,
3103 .txq_inline_max = MLX5_ARG_UNSET,
3104 .txq_inline_min = MLX5_ARG_UNSET,
3105 .txq_inline_mpw = MLX5_ARG_UNSET,
3106 .txqs_inline = MLX5_ARG_UNSET,
3108 .mr_ext_memseg_en = 1,
3110 .enabled = 0, /* Disabled by default. */
3111 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3112 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3113 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3117 /* Device specific configuration. */
3118 switch (pci_dev->id.device_id) {
3119 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3120 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3121 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3122 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3123 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3124 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3125 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3131 for (i = 0; i != ns; ++i) {
3134 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3137 if (!list[i].eth_dev) {
3138 if (rte_errno != EBUSY && rte_errno != EEXIST)
3140 /* Device is disabled or already spawned. Ignore it. */
3143 restore = list[i].eth_dev->data->dev_flags;
3144 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3145 /* Restore non-PCI flags cleared by the above call. */
3146 list[i].eth_dev->data->dev_flags |= restore;
3147 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3148 rte_eth_dev_probing_finish(list[i].eth_dev);
3152 "probe of PCI device " PCI_PRI_FMT " aborted after"
3153 " encountering an error: %s",
3154 pci_dev->addr.domain, pci_dev->addr.bus,
3155 pci_dev->addr.devid, pci_dev->addr.function,
3156 strerror(rte_errno));
3160 if (!list[i].eth_dev)
3162 mlx5_dev_close(list[i].eth_dev);
3163 /* mac_addrs must not be freed because in dev_private */
3164 list[i].eth_dev->data->mac_addrs = NULL;
3165 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3167 /* Restore original error. */
3174 * Do the routine cleanup:
3175 * - close opened Netlink sockets
3176 * - free allocated spawn data array
3177 * - free the Infiniband device list
3186 mlx5_glue->free_device_list(ibv_list);
3191 * Look for the ethernet device belonging to mlx5 driver.
3193 * @param[in] port_id
3194 * port_id to start looking for device.
3195 * @param[in] pci_dev
3196 * Pointer to the hint PCI device. When device is being probed
3197 * the its siblings (master and preceding representors might
3198 * not have assigned driver yet (because the mlx5_pci_probe()
3199 * is not completed yet, for this case match on hint PCI
3200 * device may be used to detect sibling device.
3203 * port_id of found device, RTE_MAX_ETHPORT if not found.
3206 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3208 while (port_id < RTE_MAX_ETHPORTS) {
3209 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3211 if (dev->state != RTE_ETH_DEV_UNUSED &&
3213 (dev->device == &pci_dev->device ||
3214 (dev->device->driver &&
3215 dev->device->driver->name &&
3216 !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3220 if (port_id >= RTE_MAX_ETHPORTS)
3221 return RTE_MAX_ETHPORTS;
3226 * DPDK callback to remove a PCI device.
3228 * This function removes all Ethernet devices belong to a given PCI device.
3230 * @param[in] pci_dev
3231 * Pointer to the PCI device.
3234 * 0 on success, the function cannot fail.
3237 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3241 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3242 rte_eth_dev_close(port_id);
3246 static const struct rte_pci_id mlx5_pci_id_map[] = {
3248 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3249 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3252 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3253 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3256 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3257 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3260 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3261 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3264 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3265 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3268 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3269 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3272 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3273 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3276 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3277 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3280 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3281 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3284 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3285 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3288 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3289 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3292 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3293 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3296 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3297 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3300 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3301 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3308 static struct rte_pci_driver mlx5_driver = {
3310 .name = MLX5_DRIVER_NAME
3312 .id_table = mlx5_pci_id_map,
3313 .probe = mlx5_pci_probe,
3314 .remove = mlx5_pci_remove,
3315 .dma_map = mlx5_dma_map,
3316 .dma_unmap = mlx5_dma_unmap,
3317 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3318 RTE_PCI_DRV_PROBE_AGAIN,
3321 #ifdef RTE_IBVERBS_LINK_DLOPEN
3324 * Suffix RTE_EAL_PMD_PATH with "-glue".
3326 * This function performs a sanity check on RTE_EAL_PMD_PATH before
3327 * suffixing its last component.
3330 * Output buffer, should be large enough otherwise NULL is returned.
3335 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
3338 mlx5_glue_path(char *buf, size_t size)
3340 static const char *const bad[] = { "/", ".", "..", NULL };
3341 const char *path = RTE_EAL_PMD_PATH;
3342 size_t len = strlen(path);
3346 while (len && path[len - 1] == '/')
3348 for (off = len; off && path[off - 1] != '/'; --off)
3350 for (i = 0; bad[i]; ++i)
3351 if (!strncmp(path + off, bad[i], (int)(len - off)))
3353 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3354 if (i == -1 || (size_t)i >= size)
3359 "unable to append \"-glue\" to last component of"
3360 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3361 " please re-configure DPDK");
3366 * Initialization routine for run-time dependency on rdma-core.
3369 mlx5_glue_init(void)
3371 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3372 const char *path[] = {
3374 * A basic security check is necessary before trusting
3375 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3377 (geteuid() == getuid() && getegid() == getgid() ?
3378 getenv("MLX5_GLUE_PATH") : NULL),
3380 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3381 * variant, otherwise let dlopen() look up libraries on its
3384 (*RTE_EAL_PMD_PATH ?
3385 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3388 void *handle = NULL;
3392 while (!handle && i != RTE_DIM(path)) {
3401 end = strpbrk(path[i], ":;");
3403 end = path[i] + strlen(path[i]);
3404 len = end - path[i];
3409 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3411 (!len || *(end - 1) == '/') ? "" : "/");
3414 if (sizeof(name) != (size_t)ret + 1)
3416 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3418 handle = dlopen(name, RTLD_LAZY);
3429 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3432 sym = dlsym(handle, "mlx5_glue");
3433 if (!sym || !*sym) {
3437 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3446 "cannot initialize PMD due to missing run-time dependency on"
3447 " rdma-core libraries (libibverbs, libmlx5)");
3454 * Driver initialization routine.
3456 RTE_INIT(rte_mlx5_pmd_init)
3458 /* Initialize driver log type. */
3459 mlx5_logtype = rte_log_register("pmd.net.mlx5");
3460 if (mlx5_logtype >= 0)
3461 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3463 /* Build the static tables for Verbs conversion. */
3464 mlx5_set_ptype_table();
3465 mlx5_set_cksum_table();
3466 mlx5_set_swp_types_table();
3468 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3469 * huge pages. Calling ibv_fork_init() during init allows
3470 * applications to use fork() safely for purposes other than
3471 * using this PMD, which is not supported in forked processes.
3473 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3474 /* Match the size of Rx completion entry to the size of a cacheline. */
3475 if (RTE_CACHE_LINE_SIZE == 128)
3476 setenv("MLX5_CQE_SIZE", "128", 0);
3478 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3479 * cleanup all the Verbs resources even when the device was removed.
3481 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3482 #ifdef RTE_IBVERBS_LINK_DLOPEN
3483 if (mlx5_glue_init())
3488 /* Glue structure must not contain any NULL pointers. */
3492 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3493 assert(((const void *const *)mlx5_glue)[i]);
3496 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3498 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3499 mlx5_glue->version, MLX5_GLUE_VERSION);
3502 mlx5_glue->fork_init();
3503 rte_pci_register(&mlx5_driver);
3506 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3507 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3508 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");