1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to force doorbell register mapping
100 * to non-cahed region eliminating the extra write memory barrier.
102 #define MLX5_TX_DB_NC "tx_db_nc"
105 * Device parameter to include 2 dsegs in the title WQEBB.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
111 * Device parameter to limit the size of inlining packet.
112 * Deprecated, ignored.
114 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
117 * Device parameter to enable hardware Tx vector.
118 * Deprecated, ignored (no vectorized Tx routines anymore).
120 #define MLX5_TX_VEC_EN "tx_vec_en"
122 /* Device parameter to enable hardware Rx vector. */
123 #define MLX5_RX_VEC_EN "rx_vec_en"
125 /* Allow L3 VXLAN flow creation. */
126 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
128 /* Activate DV E-Switch flow steering. */
129 #define MLX5_DV_ESW_EN "dv_esw_en"
131 /* Activate DV flow steering. */
132 #define MLX5_DV_FLOW_EN "dv_flow_en"
134 /* Enable extensive flow metadata support. */
135 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
137 /* Activate Netlink support in VF mode. */
138 #define MLX5_VF_NL_EN "vf_nl_en"
140 /* Enable extending memsegs when creating a MR. */
141 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
143 /* Select port representors to instantiate. */
144 #define MLX5_REPRESENTOR "representor"
146 /* Device parameter to configure the maximum number of dump files per queue. */
147 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
149 /* Configure timeout of LRO session (in microseconds). */
150 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
152 #ifndef HAVE_IBV_MLX5_MOD_MPW
153 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
154 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
157 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
158 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
161 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
163 /* Shared memory between primary and secondary processes. */
164 struct mlx5_shared_data *mlx5_shared_data;
166 /* Spinlock for mlx5_shared_data allocation. */
167 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
169 /* Process local data for secondary processes. */
170 static struct mlx5_local_data mlx5_local_data;
172 /** Driver-specific log messages type. */
175 /** Data associated with devices to spawn. */
176 struct mlx5_dev_spawn_data {
177 uint32_t ifindex; /**< Network interface index. */
178 uint32_t max_port; /**< IB device maximal port index. */
179 uint32_t ibv_port; /**< IB device physical port index. */
180 int pf_bond; /**< bonding device PF index. < 0 - no bonding */
181 struct mlx5_switch_info info; /**< Switch information. */
182 struct ibv_device *ibv_dev; /**< Associated IB device. */
183 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
184 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
187 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
188 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
190 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
191 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
193 #define MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE 4096
194 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
197 * Allocate ID pool structure.
200 * Pointer to pool object, NULL value otherwise.
202 struct mlx5_flow_id_pool *
203 mlx5_flow_id_pool_alloc(void)
205 struct mlx5_flow_id_pool *pool;
208 pool = rte_zmalloc("id pool allocation", sizeof(*pool),
209 RTE_CACHE_LINE_SIZE);
211 DRV_LOG(ERR, "can't allocate id pool");
215 mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
216 RTE_CACHE_LINE_SIZE);
218 DRV_LOG(ERR, "can't allocate mem for id pool");
222 pool->free_arr = mem;
223 pool->curr = pool->free_arr;
224 pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
225 pool->base_index = 0;
233 * Release ID pool structure.
236 * Pointer to flow id pool object to free.
239 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
241 rte_free(pool->free_arr);
249 * Pointer to flow id pool.
254 * 0 on success, error value otherwise.
257 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
259 if (pool->curr == pool->free_arr) {
260 if (pool->base_index == UINT32_MAX) {
262 DRV_LOG(ERR, "no free id");
265 *id = ++pool->base_index;
268 *id = *(--pool->curr);
276 * Pointer to flow id pool.
281 * 0 on success, error value otherwise.
284 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
290 if (pool->curr == pool->last) {
291 size = pool->curr - pool->free_arr;
292 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
293 assert(size2 > size);
294 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
296 DRV_LOG(ERR, "can't allocate mem for id pool");
300 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
301 rte_free(pool->free_arr);
302 pool->free_arr = mem;
303 pool->curr = pool->free_arr + size;
304 pool->last = pool->free_arr + size2;
312 * Initialize the counters management structure.
315 * Pointer to mlx5_ibv_shared object to free
318 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
322 TAILQ_INIT(&sh->cmng.flow_counters);
323 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
324 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
328 * Destroy all the resources allocated for a counter memory management.
331 * Pointer to the memory management structure.
334 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
336 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
338 LIST_REMOVE(mng, next);
339 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
340 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
345 * Close and release all the resources of the counters management.
348 * Pointer to mlx5_ibv_shared object to free.
351 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
353 struct mlx5_counter_stats_mem_mng *mng;
360 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
361 if (rte_errno != EINPROGRESS)
365 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
366 struct mlx5_flow_counter_pool *pool;
367 uint32_t batch = !!(i % 2);
369 if (!sh->cmng.ccont[i].pools)
371 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
376 (mlx5_devx_cmd_destroy(pool->min_dcs));
378 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
379 if (pool->counters_raw[j].action)
381 (mlx5_glue->destroy_flow_action
382 (pool->counters_raw[j].action));
383 if (!batch && pool->counters_raw[j].dcs)
384 claim_zero(mlx5_devx_cmd_destroy
385 (pool->counters_raw[j].dcs));
387 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
390 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
392 rte_free(sh->cmng.ccont[i].pools);
394 mng = LIST_FIRST(&sh->cmng.mem_mngs);
396 mlx5_flow_destroy_counter_stat_mem_mng(mng);
397 mng = LIST_FIRST(&sh->cmng.mem_mngs);
399 memset(&sh->cmng, 0, sizeof(sh->cmng));
403 * Extract pdn of PD object using DV API.
406 * Pointer to the verbs PD object.
408 * Pointer to the PD object number variable.
411 * 0 on success, error value otherwise.
413 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
415 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
417 struct mlx5dv_obj obj;
418 struct mlx5dv_pd pd_info;
422 obj.pd.out = &pd_info;
423 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
425 DRV_LOG(DEBUG, "Fail to get PD object info");
431 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
434 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
439 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
440 /* Get environment variable to store. */
441 env = getenv(MLX5_SHUT_UP_BF);
442 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
443 if (config->dbnc == MLX5_ARG_UNSET)
444 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
446 setenv(MLX5_SHUT_UP_BF, config->dbnc ? "1" : "0", 1);
451 mlx5_restore_doorbell_mapping_env(const struct mlx5_dev_config *config,
454 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
455 if (config->dbnc == MLX5_ARG_UNSET)
457 /* Restore the original environment variable state. */
458 if (value == MLX5_ARG_UNSET)
459 unsetenv(MLX5_SHUT_UP_BF);
461 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
465 * Allocate shared IB device context. If there is multiport device the
466 * master and representors will share this context, if there is single
467 * port dedicated IB device, the context will be used by only given
468 * port due to unification.
470 * Routine first searches the context for the specified IB device name,
471 * if found the shared context assumed and reference counter is incremented.
472 * If no context found the new one is created and initialized with specified
473 * IB device context and parameters.
476 * Pointer to the IB device attributes (name, port, etc).
478 * Pointer to device configuration structure.
481 * Pointer to mlx5_ibv_shared object on success,
482 * otherwise NULL and rte_errno is set.
484 static struct mlx5_ibv_shared *
485 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
486 const struct mlx5_dev_config *config)
488 struct mlx5_ibv_shared *sh;
492 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
493 struct mlx5_devx_tis_attr tis_attr = { 0 };
497 /* Secondary process should not create the shared context. */
498 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
499 pthread_mutex_lock(&mlx5_ibv_list_mutex);
500 /* Search for IB context by device name. */
501 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
502 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
507 /* No device found, we have to create new shared context. */
508 assert(spawn->max_port);
509 sh = rte_zmalloc("ethdev shared ib context",
510 sizeof(struct mlx5_ibv_shared) +
512 sizeof(struct mlx5_ibv_shared_port),
513 RTE_CACHE_LINE_SIZE);
515 DRV_LOG(ERR, "shared context allocation failure");
520 * Configure environment variable "MLX5_BF_SHUT_UP"
521 * before the device creation. The rdma_core library
522 * checks the variable at device creation and
523 * stores the result internally.
525 dbmap_env = mlx5_config_doorbell_mapping_env(config);
526 /* Try to open IB device with DV first, then usual Verbs. */
528 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
531 DRV_LOG(DEBUG, "DevX is supported");
532 /* The device is created, no need for environment. */
533 mlx5_restore_doorbell_mapping_env(config, dbmap_env);
535 /* The environment variable is still configured. */
536 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
537 err = errno ? errno : ENODEV;
539 * The environment variable is not needed anymore,
540 * all device creation attempts are completed.
542 mlx5_restore_doorbell_mapping_env(config, dbmap_env);
546 DRV_LOG(DEBUG, "DevX is NOT supported");
548 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
550 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
554 sh->max_port = spawn->max_port;
555 strncpy(sh->ibdev_name, sh->ctx->device->name,
556 sizeof(sh->ibdev_name));
557 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
558 sizeof(sh->ibdev_path));
559 pthread_mutex_init(&sh->intr_mutex, NULL);
561 * Setting port_id to max unallowed value means
562 * there is no interrupt subhandler installed for
563 * the given port index i.
565 for (i = 0; i < sh->max_port; i++) {
566 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
567 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
569 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
570 if (sh->pd == NULL) {
571 DRV_LOG(ERR, "PD allocation failure");
575 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
577 err = mlx5_get_pdn(sh->pd, &sh->pdn);
579 DRV_LOG(ERR, "Fail to extract pdn from PD");
582 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
584 DRV_LOG(ERR, "TD allocation failure");
588 tis_attr.transport_domain = sh->td->id;
589 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
591 DRV_LOG(ERR, "TIS allocation failure");
596 sh->flow_id_pool = mlx5_flow_id_pool_alloc();
597 if (!sh->flow_id_pool) {
598 DRV_LOG(ERR, "can't create flow id pool");
602 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
604 * Once the device is added to the list of memory event
605 * callback, its global MR cache table cannot be expanded
606 * on the fly because of deadlock. If it overflows, lookup
607 * should be done by searching MR list linearly, which is slow.
609 * At this point the device is not added to the memory
610 * event list yet, context is just being created.
612 err = mlx5_mr_btree_init(&sh->mr.cache,
613 MLX5_MR_BTREE_CACHE_N * 2,
614 spawn->pci_dev->device.numa_node);
619 mlx5_flow_counters_mng_init(sh);
620 /* Add device to memory callback list. */
621 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
622 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
624 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
625 /* Add context to the global device list. */
626 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
628 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
631 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
634 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
636 claim_zero(mlx5_devx_cmd_destroy(sh->td));
638 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
640 claim_zero(mlx5_glue->close_device(sh->ctx));
641 if (sh->flow_id_pool)
642 mlx5_flow_id_pool_release(sh->flow_id_pool);
650 * Free shared IB device context. Decrement counter and if zero free
651 * all allocated resources and close handles.
654 * Pointer to mlx5_ibv_shared object to free
657 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
659 pthread_mutex_lock(&mlx5_ibv_list_mutex);
661 /* Check the object presence in the list. */
662 struct mlx5_ibv_shared *lctx;
664 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
669 DRV_LOG(ERR, "Freeing non-existing shared IB context");
675 /* Secondary process should not free the shared context. */
676 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
679 /* Release created Memory Regions. */
681 /* Remove from memory callback device list. */
682 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
683 LIST_REMOVE(sh, mem_event_cb);
684 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
685 /* Remove context from the global device list. */
686 LIST_REMOVE(sh, next);
688 * Ensure there is no async event handler installed.
689 * Only primary process handles async device events.
691 mlx5_flow_counters_mng_close(sh);
692 assert(!sh->intr_cnt);
694 mlx5_intr_callback_unregister
695 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
696 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
697 if (sh->devx_intr_cnt) {
698 if (sh->intr_handle_devx.fd)
699 rte_intr_callback_unregister(&sh->intr_handle_devx,
700 mlx5_dev_interrupt_handler_devx, sh);
702 mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
705 pthread_mutex_destroy(&sh->intr_mutex);
707 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
709 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
711 claim_zero(mlx5_devx_cmd_destroy(sh->td));
713 claim_zero(mlx5_glue->close_device(sh->ctx));
714 if (sh->flow_id_pool)
715 mlx5_flow_id_pool_release(sh->flow_id_pool);
718 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
722 * Initialize DR related data within private structure.
723 * Routine checks the reference counter and does actual
724 * resources creation/initialization only if counter is zero.
727 * Pointer to the private device data structure.
730 * Zero on success, positive error code otherwise.
733 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
735 #ifdef HAVE_MLX5DV_DR
736 struct mlx5_ibv_shared *sh = priv->sh;
739 char s[MLX5_HLIST_NAMESIZE];
743 /* Shared DV/DR structures is already initialized. */
748 /* Reference counter is zero, we should initialize structures. */
749 domain = mlx5_glue->dr_create_domain(sh->ctx,
750 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
752 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
756 sh->rx_domain = domain;
757 domain = mlx5_glue->dr_create_domain(sh->ctx,
758 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
760 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
764 pthread_mutex_init(&sh->dv_mutex, NULL);
765 sh->tx_domain = domain;
766 #ifdef HAVE_MLX5DV_DR_ESWITCH
767 if (priv->config.dv_esw_en) {
768 domain = mlx5_glue->dr_create_domain
769 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
771 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
775 sh->fdb_domain = domain;
776 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
779 snprintf(s, sizeof(s), "%s_flow_table", priv->sh->ibdev_name);
780 sh->flow_tbls = mlx5_hlist_create(s,
781 MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE);
782 if (!sh->flow_tbls) {
783 DRV_LOG(ERR, "flow tables with hash creation failed.\n");
787 /* create tags hash list table. */
788 snprintf(s, sizeof(s), "%s_tags", priv->sh->ibdev_name);
789 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
790 if (!sh->flow_tbls) {
791 DRV_LOG(ERR, "tags with hash creation failed.\n");
795 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
801 /* Rollback the created objects. */
803 mlx5_glue->dr_destroy_domain(sh->rx_domain);
804 sh->rx_domain = NULL;
807 mlx5_glue->dr_destroy_domain(sh->tx_domain);
808 sh->tx_domain = NULL;
810 if (sh->fdb_domain) {
811 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
812 sh->fdb_domain = NULL;
815 mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
816 sh->flow_tbls = NULL;
818 if (sh->esw_drop_action) {
819 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
820 sh->esw_drop_action = NULL;
822 if (sh->pop_vlan_action) {
823 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
824 sh->pop_vlan_action = NULL;
834 * Destroy DR related data within private structure.
837 * Pointer to the private device data structure.
840 mlx5_free_shared_dr(struct mlx5_priv *priv)
842 #ifdef HAVE_MLX5DV_DR
843 struct mlx5_ibv_shared *sh;
845 if (!priv->dr_shared)
850 assert(sh->dv_refcnt);
851 if (sh->dv_refcnt && --sh->dv_refcnt)
854 /* flow table entries should be handled properly before. */
855 mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
856 sh->flow_tbls = NULL;
859 /* tags should be destroyed with flow before. */
860 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
861 sh->tag_table = NULL;
864 mlx5_glue->dr_destroy_domain(sh->rx_domain);
865 sh->rx_domain = NULL;
868 mlx5_glue->dr_destroy_domain(sh->tx_domain);
869 sh->tx_domain = NULL;
871 #ifdef HAVE_MLX5DV_DR_ESWITCH
872 if (sh->fdb_domain) {
873 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
874 sh->fdb_domain = NULL;
876 if (sh->esw_drop_action) {
877 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
878 sh->esw_drop_action = NULL;
881 if (sh->pop_vlan_action) {
882 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
883 sh->pop_vlan_action = NULL;
885 pthread_mutex_destroy(&sh->dv_mutex);
892 * Initialize shared data between primary and secondary process.
894 * A memzone is reserved by primary process and secondary processes attach to
898 * 0 on success, a negative errno value otherwise and rte_errno is set.
901 mlx5_init_shared_data(void)
903 const struct rte_memzone *mz;
906 rte_spinlock_lock(&mlx5_shared_data_lock);
907 if (mlx5_shared_data == NULL) {
908 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
909 /* Allocate shared memory. */
910 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
911 sizeof(*mlx5_shared_data),
915 "Cannot allocate mlx5 shared data");
919 mlx5_shared_data = mz->addr;
920 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
921 rte_spinlock_init(&mlx5_shared_data->lock);
923 /* Lookup allocated shared memory. */
924 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
927 "Cannot attach mlx5 shared data");
931 mlx5_shared_data = mz->addr;
932 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
936 rte_spinlock_unlock(&mlx5_shared_data_lock);
941 * Retrieve integer value from environment variable.
944 * Environment variable name.
947 * Integer value, 0 if the variable is not set.
950 mlx5_getenv_int(const char *name)
952 const char *val = getenv(name);
960 * Verbs callback to allocate a memory. This function should allocate the space
961 * according to the size provided residing inside a huge page.
962 * Please note that all allocation must respect the alignment from libmlx5
963 * (i.e. currently sysconf(_SC_PAGESIZE)).
966 * The size in bytes of the memory to allocate.
968 * A pointer to the callback data.
971 * Allocated buffer, NULL otherwise and rte_errno is set.
974 mlx5_alloc_verbs_buf(size_t size, void *data)
976 struct mlx5_priv *priv = data;
978 size_t alignment = sysconf(_SC_PAGESIZE);
979 unsigned int socket = SOCKET_ID_ANY;
981 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
982 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
984 socket = ctrl->socket;
985 } else if (priv->verbs_alloc_ctx.type ==
986 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
987 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
989 socket = ctrl->socket;
991 assert(data != NULL);
992 ret = rte_malloc_socket(__func__, size, alignment, socket);
999 * Verbs callback to free a memory.
1002 * A pointer to the memory to free.
1004 * A pointer to the callback data.
1007 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
1009 assert(data != NULL);
1014 * DPDK callback to add udp tunnel port
1017 * A pointer to eth_dev
1018 * @param[in] udp_tunnel
1019 * A pointer to udp tunnel
1022 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
1025 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
1026 struct rte_eth_udp_tunnel *udp_tunnel)
1028 assert(udp_tunnel != NULL);
1029 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
1030 udp_tunnel->udp_port == 4789)
1032 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
1033 udp_tunnel->udp_port == 4790)
1039 * Initialize process private data structure.
1042 * Pointer to Ethernet device structure.
1045 * 0 on success, a negative errno value otherwise and rte_errno is set.
1048 mlx5_proc_priv_init(struct rte_eth_dev *dev)
1050 struct mlx5_priv *priv = dev->data->dev_private;
1051 struct mlx5_proc_priv *ppriv;
1055 * UAR register table follows the process private structure. BlueFlame
1056 * registers for Tx queues are stored in the table.
1059 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
1060 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
1061 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1066 ppriv->uar_table_sz = ppriv_size;
1067 dev->process_private = ppriv;
1072 * Un-initialize process private data structure.
1075 * Pointer to Ethernet device structure.
1078 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
1080 if (!dev->process_private)
1082 rte_free(dev->process_private);
1083 dev->process_private = NULL;
1087 * DPDK callback to close the device.
1089 * Destroy all queues and objects, free memory.
1092 * Pointer to Ethernet device structure.
1095 mlx5_dev_close(struct rte_eth_dev *dev)
1097 struct mlx5_priv *priv = dev->data->dev_private;
1101 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1103 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1104 /* In case mlx5_dev_stop() has not been called. */
1105 mlx5_dev_interrupt_handler_uninstall(dev);
1106 mlx5_dev_interrupt_handler_devx_uninstall(dev);
1107 mlx5_traffic_disable(dev);
1108 mlx5_flow_flush(dev, NULL);
1109 mlx5_flow_meter_flush(dev, NULL);
1110 /* Prevent crashes when queues are still in use. */
1111 dev->rx_pkt_burst = removed_rx_burst;
1112 dev->tx_pkt_burst = removed_tx_burst;
1114 /* Disable datapath on secondary process. */
1115 mlx5_mp_req_stop_rxtx(dev);
1116 if (priv->rxqs != NULL) {
1117 /* XXX race condition if mlx5_rx_burst() is still running. */
1119 for (i = 0; (i != priv->rxqs_n); ++i)
1120 mlx5_rxq_release(dev, i);
1124 if (priv->txqs != NULL) {
1125 /* XXX race condition if mlx5_tx_burst() is still running. */
1127 for (i = 0; (i != priv->txqs_n); ++i)
1128 mlx5_txq_release(dev, i);
1132 mlx5_proc_priv_uninit(dev);
1133 if (priv->mreg_cp_tbl)
1134 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1135 mlx5_mprq_free_mp(dev);
1136 mlx5_free_shared_dr(priv);
1137 if (priv->rss_conf.rss_key != NULL)
1138 rte_free(priv->rss_conf.rss_key);
1139 if (priv->reta_idx != NULL)
1140 rte_free(priv->reta_idx);
1141 if (priv->config.vf)
1142 mlx5_nl_mac_addr_flush(dev);
1143 if (priv->nl_socket_route >= 0)
1144 close(priv->nl_socket_route);
1145 if (priv->nl_socket_rdma >= 0)
1146 close(priv->nl_socket_rdma);
1147 if (priv->vmwa_context)
1148 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1151 * Free the shared context in last turn, because the cleanup
1152 * routines above may use some shared fields, like
1153 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1154 * ifindex if Netlink fails.
1156 mlx5_free_shared_ibctx(priv->sh);
1159 ret = mlx5_hrxq_verify(dev);
1161 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1162 dev->data->port_id);
1163 ret = mlx5_ind_table_obj_verify(dev);
1165 DRV_LOG(WARNING, "port %u some indirection table still remain",
1166 dev->data->port_id);
1167 ret = mlx5_rxq_obj_verify(dev);
1169 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1170 dev->data->port_id);
1171 ret = mlx5_rxq_verify(dev);
1173 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1174 dev->data->port_id);
1175 ret = mlx5_txq_obj_verify(dev);
1177 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1178 dev->data->port_id);
1179 ret = mlx5_txq_verify(dev);
1181 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1182 dev->data->port_id);
1183 ret = mlx5_flow_verify(dev);
1185 DRV_LOG(WARNING, "port %u some flows still remain",
1186 dev->data->port_id);
1187 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1191 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1192 struct mlx5_priv *opriv =
1193 rte_eth_devices[port_id].data->dev_private;
1196 opriv->domain_id != priv->domain_id ||
1197 &rte_eth_devices[port_id] == dev)
1203 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1205 memset(priv, 0, sizeof(*priv));
1206 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1208 * Reset mac_addrs to NULL such that it is not freed as part of
1209 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1210 * it is freed when dev_private is freed.
1212 dev->data->mac_addrs = NULL;
1215 const struct eth_dev_ops mlx5_dev_ops = {
1216 .dev_configure = mlx5_dev_configure,
1217 .dev_start = mlx5_dev_start,
1218 .dev_stop = mlx5_dev_stop,
1219 .dev_set_link_down = mlx5_set_link_down,
1220 .dev_set_link_up = mlx5_set_link_up,
1221 .dev_close = mlx5_dev_close,
1222 .promiscuous_enable = mlx5_promiscuous_enable,
1223 .promiscuous_disable = mlx5_promiscuous_disable,
1224 .allmulticast_enable = mlx5_allmulticast_enable,
1225 .allmulticast_disable = mlx5_allmulticast_disable,
1226 .link_update = mlx5_link_update,
1227 .stats_get = mlx5_stats_get,
1228 .stats_reset = mlx5_stats_reset,
1229 .xstats_get = mlx5_xstats_get,
1230 .xstats_reset = mlx5_xstats_reset,
1231 .xstats_get_names = mlx5_xstats_get_names,
1232 .fw_version_get = mlx5_fw_version_get,
1233 .dev_infos_get = mlx5_dev_infos_get,
1234 .read_clock = mlx5_read_clock,
1235 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1236 .vlan_filter_set = mlx5_vlan_filter_set,
1237 .rx_queue_setup = mlx5_rx_queue_setup,
1238 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1239 .tx_queue_setup = mlx5_tx_queue_setup,
1240 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1241 .rx_queue_release = mlx5_rx_queue_release,
1242 .tx_queue_release = mlx5_tx_queue_release,
1243 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1244 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1245 .mac_addr_remove = mlx5_mac_addr_remove,
1246 .mac_addr_add = mlx5_mac_addr_add,
1247 .mac_addr_set = mlx5_mac_addr_set,
1248 .set_mc_addr_list = mlx5_set_mc_addr_list,
1249 .mtu_set = mlx5_dev_set_mtu,
1250 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1251 .vlan_offload_set = mlx5_vlan_offload_set,
1252 .reta_update = mlx5_dev_rss_reta_update,
1253 .reta_query = mlx5_dev_rss_reta_query,
1254 .rss_hash_update = mlx5_rss_hash_update,
1255 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1256 .filter_ctrl = mlx5_dev_filter_ctrl,
1257 .rx_descriptor_status = mlx5_rx_descriptor_status,
1258 .tx_descriptor_status = mlx5_tx_descriptor_status,
1259 .rx_queue_count = mlx5_rx_queue_count,
1260 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1261 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1262 .is_removed = mlx5_is_removed,
1263 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
1264 .get_module_info = mlx5_get_module_info,
1265 .get_module_eeprom = mlx5_get_module_eeprom,
1266 .hairpin_cap_get = mlx5_hairpin_cap_get,
1267 .mtr_ops_get = mlx5_flow_meter_ops_get,
1270 /* Available operations from secondary process. */
1271 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1272 .stats_get = mlx5_stats_get,
1273 .stats_reset = mlx5_stats_reset,
1274 .xstats_get = mlx5_xstats_get,
1275 .xstats_reset = mlx5_xstats_reset,
1276 .xstats_get_names = mlx5_xstats_get_names,
1277 .fw_version_get = mlx5_fw_version_get,
1278 .dev_infos_get = mlx5_dev_infos_get,
1279 .rx_descriptor_status = mlx5_rx_descriptor_status,
1280 .tx_descriptor_status = mlx5_tx_descriptor_status,
1281 .get_module_info = mlx5_get_module_info,
1282 .get_module_eeprom = mlx5_get_module_eeprom,
1285 /* Available operations in flow isolated mode. */
1286 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1287 .dev_configure = mlx5_dev_configure,
1288 .dev_start = mlx5_dev_start,
1289 .dev_stop = mlx5_dev_stop,
1290 .dev_set_link_down = mlx5_set_link_down,
1291 .dev_set_link_up = mlx5_set_link_up,
1292 .dev_close = mlx5_dev_close,
1293 .promiscuous_enable = mlx5_promiscuous_enable,
1294 .promiscuous_disable = mlx5_promiscuous_disable,
1295 .allmulticast_enable = mlx5_allmulticast_enable,
1296 .allmulticast_disable = mlx5_allmulticast_disable,
1297 .link_update = mlx5_link_update,
1298 .stats_get = mlx5_stats_get,
1299 .stats_reset = mlx5_stats_reset,
1300 .xstats_get = mlx5_xstats_get,
1301 .xstats_reset = mlx5_xstats_reset,
1302 .xstats_get_names = mlx5_xstats_get_names,
1303 .fw_version_get = mlx5_fw_version_get,
1304 .dev_infos_get = mlx5_dev_infos_get,
1305 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1306 .vlan_filter_set = mlx5_vlan_filter_set,
1307 .rx_queue_setup = mlx5_rx_queue_setup,
1308 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1309 .tx_queue_setup = mlx5_tx_queue_setup,
1310 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1311 .rx_queue_release = mlx5_rx_queue_release,
1312 .tx_queue_release = mlx5_tx_queue_release,
1313 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1314 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1315 .mac_addr_remove = mlx5_mac_addr_remove,
1316 .mac_addr_add = mlx5_mac_addr_add,
1317 .mac_addr_set = mlx5_mac_addr_set,
1318 .set_mc_addr_list = mlx5_set_mc_addr_list,
1319 .mtu_set = mlx5_dev_set_mtu,
1320 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1321 .vlan_offload_set = mlx5_vlan_offload_set,
1322 .filter_ctrl = mlx5_dev_filter_ctrl,
1323 .rx_descriptor_status = mlx5_rx_descriptor_status,
1324 .tx_descriptor_status = mlx5_tx_descriptor_status,
1325 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1326 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1327 .is_removed = mlx5_is_removed,
1328 .get_module_info = mlx5_get_module_info,
1329 .get_module_eeprom = mlx5_get_module_eeprom,
1330 .hairpin_cap_get = mlx5_hairpin_cap_get,
1331 .mtr_ops_get = mlx5_flow_meter_ops_get,
1335 * Verify and store value for device argument.
1338 * Key argument to verify.
1340 * Value associated with key.
1345 * 0 on success, a negative errno value otherwise and rte_errno is set.
1348 mlx5_args_check(const char *key, const char *val, void *opaque)
1350 struct mlx5_dev_config *config = opaque;
1353 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1354 if (!strcmp(MLX5_REPRESENTOR, key))
1357 tmp = strtoul(val, NULL, 0);
1360 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1363 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1364 config->cqe_comp = !!tmp;
1365 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1366 config->cqe_pad = !!tmp;
1367 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1368 config->hw_padding = !!tmp;
1369 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1370 config->mprq.enabled = !!tmp;
1371 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1372 config->mprq.stride_num_n = tmp;
1373 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1374 config->mprq.max_memcpy_len = tmp;
1375 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1376 config->mprq.min_rxqs_num = tmp;
1377 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1378 DRV_LOG(WARNING, "%s: deprecated parameter,"
1379 " converted to txq_inline_max", key);
1380 config->txq_inline_max = tmp;
1381 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1382 config->txq_inline_max = tmp;
1383 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1384 config->txq_inline_min = tmp;
1385 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1386 config->txq_inline_mpw = tmp;
1387 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1388 config->txqs_inline = tmp;
1389 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1390 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1391 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1392 config->mps = !!tmp;
1393 } else if (strcmp(MLX5_TX_DB_NC, key) == 0) {
1394 config->dbnc = !!tmp;
1395 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1396 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1397 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1398 DRV_LOG(WARNING, "%s: deprecated parameter,"
1399 " converted to txq_inline_mpw", key);
1400 config->txq_inline_mpw = tmp;
1401 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1402 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1403 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1404 config->rx_vec_en = !!tmp;
1405 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1406 config->l3_vxlan_en = !!tmp;
1407 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1408 config->vf_nl_en = !!tmp;
1409 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1410 config->dv_esw_en = !!tmp;
1411 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1412 config->dv_flow_en = !!tmp;
1413 } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1414 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1415 tmp != MLX5_XMETA_MODE_META16 &&
1416 tmp != MLX5_XMETA_MODE_META32) {
1417 DRV_LOG(WARNING, "invalid extensive "
1418 "metadata parameter");
1422 config->dv_xmeta_en = tmp;
1423 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1424 config->mr_ext_memseg_en = !!tmp;
1425 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1426 config->max_dump_files_num = tmp;
1427 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1428 config->lro.timeout = tmp;
1430 DRV_LOG(WARNING, "%s: unknown parameter", key);
1438 * Parse device parameters.
1441 * Pointer to device configuration structure.
1443 * Device arguments structure.
1446 * 0 on success, a negative errno value otherwise and rte_errno is set.
1449 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1451 const char **params = (const char *[]){
1452 MLX5_RXQ_CQE_COMP_EN,
1453 MLX5_RXQ_CQE_PAD_EN,
1454 MLX5_RXQ_PKT_PAD_EN,
1456 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1457 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1460 MLX5_TXQ_INLINE_MIN,
1461 MLX5_TXQ_INLINE_MAX,
1462 MLX5_TXQ_INLINE_MPW,
1463 MLX5_TXQS_MIN_INLINE,
1466 MLX5_TXQ_MPW_HDR_DSEG_EN,
1467 MLX5_TXQ_MAX_INLINE_LEN,
1476 MLX5_MR_EXT_MEMSEG_EN,
1478 MLX5_MAX_DUMP_FILES_NUM,
1479 MLX5_LRO_TIMEOUT_USEC,
1482 struct rte_kvargs *kvlist;
1486 if (devargs == NULL)
1488 /* Following UGLY cast is done to pass checkpatch. */
1489 kvlist = rte_kvargs_parse(devargs->args, params);
1490 if (kvlist == NULL) {
1494 /* Process parameters. */
1495 for (i = 0; (params[i] != NULL); ++i) {
1496 if (rte_kvargs_count(kvlist, params[i])) {
1497 ret = rte_kvargs_process(kvlist, params[i],
1498 mlx5_args_check, config);
1501 rte_kvargs_free(kvlist);
1506 rte_kvargs_free(kvlist);
1510 static struct rte_pci_driver mlx5_driver;
1513 * PMD global initialization.
1515 * Independent from individual device, this function initializes global
1516 * per-PMD data structures distinguishing primary and secondary processes.
1517 * Hence, each initialization is called once per a process.
1520 * 0 on success, a negative errno value otherwise and rte_errno is set.
1523 mlx5_init_once(void)
1525 struct mlx5_shared_data *sd;
1526 struct mlx5_local_data *ld = &mlx5_local_data;
1529 if (mlx5_init_shared_data())
1531 sd = mlx5_shared_data;
1533 rte_spinlock_lock(&sd->lock);
1534 switch (rte_eal_process_type()) {
1535 case RTE_PROC_PRIMARY:
1538 LIST_INIT(&sd->mem_event_cb_list);
1539 rte_rwlock_init(&sd->mem_event_rwlock);
1540 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1541 mlx5_mr_mem_event_cb, NULL);
1542 ret = mlx5_mp_init_primary();
1545 sd->init_done = true;
1547 case RTE_PROC_SECONDARY:
1550 ret = mlx5_mp_init_secondary();
1553 ++sd->secondary_cnt;
1554 ld->init_done = true;
1560 rte_spinlock_unlock(&sd->lock);
1565 * Configures the minimal amount of data to inline into WQE
1566 * while sending packets.
1568 * - the txq_inline_min has the maximal priority, if this
1569 * key is specified in devargs
1570 * - if DevX is enabled the inline mode is queried from the
1571 * device (HCA attributes and NIC vport context if needed).
1572 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1573 * and none (0 bytes) for other NICs
1576 * Verbs device parameters (name, port, switch_info) to spawn.
1578 * Device configuration parameters.
1581 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1582 struct mlx5_dev_config *config)
1584 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1585 /* Application defines size of inlined data explicitly. */
1586 switch (spawn->pci_dev->id.device_id) {
1587 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1588 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1589 if (config->txq_inline_min <
1590 (int)MLX5_INLINE_HSIZE_L2) {
1592 "txq_inline_mix aligned to minimal"
1593 " ConnectX-4 required value %d",
1594 (int)MLX5_INLINE_HSIZE_L2);
1595 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1601 if (config->hca_attr.eth_net_offloads) {
1602 /* We have DevX enabled, inline mode queried successfully. */
1603 switch (config->hca_attr.wqe_inline_mode) {
1604 case MLX5_CAP_INLINE_MODE_L2:
1605 /* outer L2 header must be inlined. */
1606 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1608 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1609 /* No inline data are required by NIC. */
1610 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1611 config->hw_vlan_insert =
1612 config->hca_attr.wqe_vlan_insert;
1613 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1615 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1616 /* inline mode is defined by NIC vport context. */
1617 if (!config->hca_attr.eth_virt)
1619 switch (config->hca_attr.vport_inline_mode) {
1620 case MLX5_INLINE_MODE_NONE:
1621 config->txq_inline_min =
1622 MLX5_INLINE_HSIZE_NONE;
1624 case MLX5_INLINE_MODE_L2:
1625 config->txq_inline_min =
1626 MLX5_INLINE_HSIZE_L2;
1628 case MLX5_INLINE_MODE_IP:
1629 config->txq_inline_min =
1630 MLX5_INLINE_HSIZE_L3;
1632 case MLX5_INLINE_MODE_TCP_UDP:
1633 config->txq_inline_min =
1634 MLX5_INLINE_HSIZE_L4;
1636 case MLX5_INLINE_MODE_INNER_L2:
1637 config->txq_inline_min =
1638 MLX5_INLINE_HSIZE_INNER_L2;
1640 case MLX5_INLINE_MODE_INNER_IP:
1641 config->txq_inline_min =
1642 MLX5_INLINE_HSIZE_INNER_L3;
1644 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1645 config->txq_inline_min =
1646 MLX5_INLINE_HSIZE_INNER_L4;
1652 * We get here if we are unable to deduce
1653 * inline data size with DevX. Try PCI ID
1654 * to determine old NICs.
1656 switch (spawn->pci_dev->id.device_id) {
1657 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1658 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1659 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1660 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1661 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1662 config->hw_vlan_insert = 0;
1664 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1665 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1666 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1667 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1669 * These NICs support VLAN insertion from WQE and
1670 * report the wqe_vlan_insert flag. But there is the bug
1671 * and PFC control may be broken, so disable feature.
1673 config->hw_vlan_insert = 0;
1674 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1677 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1681 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1685 * Configures the metadata mask fields in the shared context.
1688 * Pointer to Ethernet device.
1691 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1693 struct mlx5_priv *priv = dev->data->dev_private;
1694 struct mlx5_ibv_shared *sh = priv->sh;
1695 uint32_t meta, mark, reg_c0;
1697 reg_c0 = ~priv->vport_meta_mask;
1698 switch (priv->config.dv_xmeta_en) {
1699 case MLX5_XMETA_MODE_LEGACY:
1701 mark = MLX5_FLOW_MARK_MASK;
1703 case MLX5_XMETA_MODE_META16:
1704 meta = reg_c0 >> rte_bsf32(reg_c0);
1705 mark = MLX5_FLOW_MARK_MASK;
1707 case MLX5_XMETA_MODE_META32:
1709 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1717 if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1718 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1719 sh->dv_mark_mask, mark);
1721 sh->dv_mark_mask = mark;
1722 if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1723 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1724 sh->dv_meta_mask, meta);
1726 sh->dv_meta_mask = meta;
1727 if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1728 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1729 sh->dv_meta_mask, reg_c0);
1731 sh->dv_regc0_mask = reg_c0;
1732 DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1733 DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1734 DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1735 DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1739 * Allocate page of door-bells and register it using DevX API.
1742 * Pointer to Ethernet device.
1745 * Pointer to new page on success, NULL otherwise.
1747 static struct mlx5_devx_dbr_page *
1748 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1750 struct mlx5_priv *priv = dev->data->dev_private;
1751 struct mlx5_devx_dbr_page *page;
1753 /* Allocate space for door-bell page and management data. */
1754 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1755 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1757 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1758 dev->data->port_id);
1761 /* Register allocated memory. */
1762 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1763 MLX5_DBR_PAGE_SIZE, 0);
1765 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1766 dev->data->port_id);
1774 * Find the next available door-bell, allocate new page if needed.
1777 * Pointer to Ethernet device.
1778 * @param [out] dbr_page
1779 * Door-bell page containing the page data.
1782 * Door-bell address offset on success, a negative error value otherwise.
1785 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1787 struct mlx5_priv *priv = dev->data->dev_private;
1788 struct mlx5_devx_dbr_page *page = NULL;
1791 LIST_FOREACH(page, &priv->dbrpgs, next)
1792 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1794 if (!page) { /* No page with free door-bell exists. */
1795 page = mlx5_alloc_dbr_page(dev);
1796 if (!page) /* Failed to allocate new page. */
1798 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1800 /* Loop to find bitmap part with clear bit. */
1802 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1805 /* Find the first clear bit. */
1806 j = rte_bsf64(~page->dbr_bitmap[i]);
1807 assert(i < (MLX5_DBR_PER_PAGE / 64));
1808 page->dbr_bitmap[i] |= (1 << j);
1811 return (((i * 64) + j) * sizeof(uint64_t));
1815 * Release a door-bell record.
1818 * Pointer to Ethernet device.
1819 * @param [in] umem_id
1820 * UMEM ID of page containing the door-bell record to release.
1821 * @param [in] offset
1822 * Offset of door-bell record in page.
1825 * 0 on success, a negative error value otherwise.
1828 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1830 struct mlx5_priv *priv = dev->data->dev_private;
1831 struct mlx5_devx_dbr_page *page = NULL;
1834 LIST_FOREACH(page, &priv->dbrpgs, next)
1835 /* Find the page this address belongs to. */
1836 if (page->umem->umem_id == umem_id)
1841 if (!page->dbr_count) {
1842 /* Page not used, free it and remove from list. */
1843 LIST_REMOVE(page, next);
1845 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1848 /* Mark in bitmap that this door-bell is not in use. */
1849 offset /= MLX5_DBR_SIZE;
1850 int i = offset / 64;
1851 int j = offset % 64;
1853 page->dbr_bitmap[i] &= ~(1 << j);
1859 * Check sibling device configurations.
1861 * Sibling devices sharing the Infiniband device context
1862 * should have compatible configurations. This regards
1863 * representors and bonding slaves.
1866 * Private device descriptor.
1868 * Configuration of the device is going to be created.
1871 * 0 on success, EINVAL otherwise
1874 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1875 struct mlx5_dev_config *config)
1877 struct mlx5_ibv_shared *sh = priv->sh;
1878 struct mlx5_dev_config *sh_conf = NULL;
1882 /* Nothing to compare for the single/first device. */
1883 if (sh->refcnt == 1)
1885 /* Find the device with shared context. */
1886 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1887 struct mlx5_priv *opriv =
1888 rte_eth_devices[port_id].data->dev_private;
1890 if (opriv && opriv != priv && opriv->sh == sh) {
1891 sh_conf = &opriv->config;
1897 if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1898 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1899 " for shared %s context", sh->ibdev_name);
1903 if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
1904 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
1905 " for shared %s context", sh->ibdev_name);
1912 * Spawn an Ethernet device from Verbs information.
1915 * Backing DPDK device.
1917 * Verbs device parameters (name, port, switch_info) to spawn.
1919 * Device configuration parameters.
1922 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1923 * is set. The following errors are defined:
1925 * EBUSY: device is not supposed to be spawned.
1926 * EEXIST: device is already spawned
1928 static struct rte_eth_dev *
1929 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1930 struct mlx5_dev_spawn_data *spawn,
1931 struct mlx5_dev_config config)
1933 const struct mlx5_switch_info *switch_info = &spawn->info;
1934 struct mlx5_ibv_shared *sh = NULL;
1935 struct ibv_port_attr port_attr;
1936 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1937 struct rte_eth_dev *eth_dev = NULL;
1938 struct mlx5_priv *priv = NULL;
1940 unsigned int hw_padding = 0;
1942 unsigned int cqe_comp;
1943 unsigned int cqe_pad = 0;
1944 unsigned int tunnel_en = 0;
1945 unsigned int mpls_en = 0;
1946 unsigned int swp = 0;
1947 unsigned int mprq = 0;
1948 unsigned int mprq_min_stride_size_n = 0;
1949 unsigned int mprq_max_stride_size_n = 0;
1950 unsigned int mprq_min_stride_num_n = 0;
1951 unsigned int mprq_max_stride_num_n = 0;
1952 struct rte_ether_addr mac;
1953 char name[RTE_ETH_NAME_MAX_LEN];
1954 int own_domain_id = 0;
1957 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1958 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
1961 /* Determine if this port representor is supposed to be spawned. */
1962 if (switch_info->representor && dpdk_dev->devargs) {
1963 struct rte_eth_devargs eth_da;
1965 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1968 DRV_LOG(ERR, "failed to process device arguments: %s",
1969 strerror(rte_errno));
1972 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1973 if (eth_da.representor_ports[i] ==
1974 (uint16_t)switch_info->port_name)
1976 if (i == eth_da.nb_representor_ports) {
1981 /* Build device name. */
1982 if (spawn->pf_bond < 0) {
1983 /* Single device. */
1984 if (!switch_info->representor)
1985 strlcpy(name, dpdk_dev->name, sizeof(name));
1987 snprintf(name, sizeof(name), "%s_representor_%u",
1988 dpdk_dev->name, switch_info->port_name);
1990 /* Bonding device. */
1991 if (!switch_info->representor)
1992 snprintf(name, sizeof(name), "%s_%s",
1993 dpdk_dev->name, spawn->ibv_dev->name);
1995 snprintf(name, sizeof(name), "%s_%s_representor_%u",
1996 dpdk_dev->name, spawn->ibv_dev->name,
1997 switch_info->port_name);
1999 /* check if the device is already spawned */
2000 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
2004 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
2005 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
2006 eth_dev = rte_eth_dev_attach_secondary(name);
2007 if (eth_dev == NULL) {
2008 DRV_LOG(ERR, "can not attach rte ethdev");
2012 eth_dev->device = dpdk_dev;
2013 eth_dev->dev_ops = &mlx5_dev_sec_ops;
2014 err = mlx5_proc_priv_init(eth_dev);
2017 /* Receive command fd from primary process */
2018 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
2021 /* Remap UAR for Tx queues. */
2022 err = mlx5_tx_uar_init_secondary(eth_dev, err);
2026 * Ethdev pointer is still required as input since
2027 * the primary device is not accessible from the
2028 * secondary process.
2030 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
2031 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
2035 * Some parameters ("tx_db_nc" in particularly) are needed in
2036 * advance to create dv/verbs device context. We proceed the
2037 * devargs here to get ones, and later proceed devargs again
2038 * to override some hardware settings.
2040 err = mlx5_args(&config, dpdk_dev->devargs);
2043 DRV_LOG(ERR, "failed to process device arguments: %s",
2044 strerror(rte_errno));
2047 sh = mlx5_alloc_shared_ibctx(spawn, &config);
2050 config.devx = sh->devx;
2051 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
2052 config.dest_tir = 1;
2054 #ifdef HAVE_IBV_MLX5_MOD_SWP
2055 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
2058 * Multi-packet send is supported by ConnectX-4 Lx PF as well
2059 * as all ConnectX-5 devices.
2061 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2062 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
2064 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2065 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
2067 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
2068 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
2069 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
2070 DRV_LOG(DEBUG, "enhanced MPW is supported");
2071 mps = MLX5_MPW_ENHANCED;
2073 DRV_LOG(DEBUG, "MPW is supported");
2077 DRV_LOG(DEBUG, "MPW isn't supported");
2078 mps = MLX5_MPW_DISABLED;
2080 #ifdef HAVE_IBV_MLX5_MOD_SWP
2081 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
2082 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
2083 DRV_LOG(DEBUG, "SWP support: %u", swp);
2086 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2087 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
2088 struct mlx5dv_striding_rq_caps mprq_caps =
2089 dv_attr.striding_rq_caps;
2091 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
2092 mprq_caps.min_single_stride_log_num_of_bytes);
2093 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
2094 mprq_caps.max_single_stride_log_num_of_bytes);
2095 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
2096 mprq_caps.min_single_wqe_log_num_of_strides);
2097 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
2098 mprq_caps.max_single_wqe_log_num_of_strides);
2099 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
2100 mprq_caps.supported_qpts);
2101 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
2103 mprq_min_stride_size_n =
2104 mprq_caps.min_single_stride_log_num_of_bytes;
2105 mprq_max_stride_size_n =
2106 mprq_caps.max_single_stride_log_num_of_bytes;
2107 mprq_min_stride_num_n =
2108 mprq_caps.min_single_wqe_log_num_of_strides;
2109 mprq_max_stride_num_n =
2110 mprq_caps.max_single_wqe_log_num_of_strides;
2111 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2112 mprq_min_stride_num_n);
2115 if (RTE_CACHE_LINE_SIZE == 128 &&
2116 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2120 config.cqe_comp = cqe_comp;
2121 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2122 /* Whether device supports 128B Rx CQE padding. */
2123 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2124 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2126 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2127 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2128 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2129 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2130 (dv_attr.tunnel_offloads_caps &
2131 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
2133 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2134 tunnel_en ? "" : "not ");
2137 "tunnel offloading disabled due to old OFED/rdma-core version");
2139 config.tunnel_en = tunnel_en;
2140 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2141 mpls_en = ((dv_attr.tunnel_offloads_caps &
2142 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2143 (dv_attr.tunnel_offloads_caps &
2144 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2145 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2146 mpls_en ? "" : "not ");
2148 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2149 " old OFED/rdma-core version or firmware configuration");
2151 config.mpls_en = mpls_en;
2152 /* Check port status. */
2153 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2155 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2158 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2159 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2163 if (port_attr.state != IBV_PORT_ACTIVE)
2164 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2165 mlx5_glue->port_state_str(port_attr.state),
2167 /* Allocate private eth device data. */
2168 priv = rte_zmalloc("ethdev private structure",
2170 RTE_CACHE_LINE_SIZE);
2172 DRV_LOG(ERR, "priv allocation failure");
2177 priv->ibv_port = spawn->ibv_port;
2178 priv->pci_dev = spawn->pci_dev;
2179 priv->mtu = RTE_ETHER_MTU;
2181 /* Initialize UAR access locks for 32bit implementations. */
2182 rte_spinlock_init(&priv->uar_lock_cq);
2183 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2184 rte_spinlock_init(&priv->uar_lock[i]);
2186 /* Some internal functions rely on Netlink sockets, open them now. */
2187 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2188 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2190 priv->representor = !!switch_info->representor;
2191 priv->master = !!switch_info->master;
2192 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2193 priv->vport_meta_tag = 0;
2194 priv->vport_meta_mask = 0;
2195 priv->pf_bond = spawn->pf_bond;
2196 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2198 * The DevX port query API is implemented. E-Switch may use
2199 * either vport or reg_c[0] metadata register to match on
2200 * vport index. The engaged part of metadata register is
2203 if (switch_info->representor || switch_info->master) {
2204 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2205 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2206 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2210 "can't query devx port %d on device %s",
2211 spawn->ibv_port, spawn->ibv_dev->name);
2212 devx_port.comp_mask = 0;
2215 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2216 priv->vport_meta_tag = devx_port.reg_c_0.value;
2217 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2218 if (!priv->vport_meta_mask) {
2219 DRV_LOG(ERR, "vport zero mask for port %d"
2220 " on bonding device %s",
2221 spawn->ibv_port, spawn->ibv_dev->name);
2225 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2226 DRV_LOG(ERR, "invalid vport tag for port %d"
2227 " on bonding device %s",
2228 spawn->ibv_port, spawn->ibv_dev->name);
2232 } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2233 priv->vport_id = devx_port.vport_num;
2234 } else if (spawn->pf_bond >= 0) {
2235 DRV_LOG(ERR, "can't deduce vport index for port %d"
2236 " on bonding device %s",
2237 spawn->ibv_port, spawn->ibv_dev->name);
2241 /* Suppose vport index in compatible way. */
2242 priv->vport_id = switch_info->representor ?
2243 switch_info->port_name + 1 : -1;
2247 * Kernel/rdma_core support single E-Switch per PF configurations
2248 * only and vport_id field contains the vport index for
2249 * associated VF, which is deduced from representor port name.
2250 * For example, let's have the IB device port 10, it has
2251 * attached network device eth0, which has port name attribute
2252 * pf0vf2, we can deduce the VF number as 2, and set vport index
2253 * as 3 (2+1). This assigning schema should be changed if the
2254 * multiple E-Switch instances per PF configurations or/and PCI
2255 * subfunctions are added.
2257 priv->vport_id = switch_info->representor ?
2258 switch_info->port_name + 1 : -1;
2260 /* representor_id field keeps the unmodified VF index. */
2261 priv->representor_id = switch_info->representor ?
2262 switch_info->port_name : -1;
2264 * Look for sibling devices in order to reuse their switch domain
2265 * if any, otherwise allocate one.
2267 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2268 const struct mlx5_priv *opriv =
2269 rte_eth_devices[port_id].data->dev_private;
2272 opriv->sh != priv->sh ||
2274 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2276 priv->domain_id = opriv->domain_id;
2279 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2280 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2283 DRV_LOG(ERR, "unable to allocate switch domain: %s",
2284 strerror(rte_errno));
2289 /* Override some values set by hardware configuration. */
2290 mlx5_args(&config, dpdk_dev->devargs);
2291 err = mlx5_dev_check_sibling_config(priv, &config);
2294 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2295 IBV_DEVICE_RAW_IP_CSUM);
2296 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2297 (config.hw_csum ? "" : "not "));
2298 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2299 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2300 DRV_LOG(DEBUG, "counters are not supported");
2302 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2303 if (config.dv_flow_en) {
2304 DRV_LOG(WARNING, "DV flow is not supported");
2305 config.dv_flow_en = 0;
2308 config.ind_table_max_size =
2309 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2311 * Remove this check once DPDK supports larger/variable
2312 * indirection tables.
2314 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2315 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2316 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2317 config.ind_table_max_size);
2318 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2319 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2320 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2321 (config.hw_vlan_strip ? "" : "not "));
2322 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2323 IBV_RAW_PACKET_CAP_SCATTER_FCS);
2324 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2325 (config.hw_fcs_strip ? "" : "not "));
2326 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2327 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2328 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2329 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2330 IBV_DEVICE_PCI_WRITE_END_PADDING);
2332 if (config.hw_padding && !hw_padding) {
2333 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2334 config.hw_padding = 0;
2335 } else if (config.hw_padding) {
2336 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2338 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2339 (sh->device_attr.tso_caps.supported_qpts &
2340 (1 << IBV_QPT_RAW_PACKET)));
2342 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2344 * MPW is disabled by default, while the Enhanced MPW is enabled
2347 if (config.mps == MLX5_ARG_UNSET)
2348 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2351 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2352 DRV_LOG(INFO, "%sMPS is %s",
2353 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2354 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2355 if (config.cqe_comp && !cqe_comp) {
2356 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2357 config.cqe_comp = 0;
2359 if (config.cqe_pad && !cqe_pad) {
2360 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2362 } else if (config.cqe_pad) {
2363 DRV_LOG(INFO, "Rx CQE padding is enabled");
2366 priv->counter_fallback = 0;
2367 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2372 if (!config.hca_attr.flow_counters_dump)
2373 priv->counter_fallback = 1;
2374 #ifndef HAVE_IBV_DEVX_ASYNC
2375 priv->counter_fallback = 1;
2377 if (priv->counter_fallback)
2378 DRV_LOG(INFO, "Use fall-back DV counter management");
2379 /* Check for LRO support. */
2380 if (config.dest_tir && config.hca_attr.lro_cap &&
2381 config.dv_flow_en) {
2382 /* TBD check tunnel lro caps. */
2383 config.lro.supported = config.hca_attr.lro_cap;
2384 DRV_LOG(DEBUG, "Device supports LRO");
2386 * If LRO timeout is not configured by application,
2387 * use the minimal supported value.
2389 if (!config.lro.timeout)
2390 config.lro.timeout =
2391 config.hca_attr.lro_timer_supported_periods[0];
2392 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2393 config.lro.timeout);
2395 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2396 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2397 config.dv_flow_en) {
2398 uint8_t reg_c_mask =
2399 config.hca_attr.qos.flow_meter_reg_c_ids;
2401 * Meter needs two REG_C's for color match and pre-sfx
2402 * flow match. Here get the REG_C for color match.
2403 * REG_C_0 and REG_C_1 is reserved for metadata feature.
2406 if (__builtin_popcount(reg_c_mask) < 1) {
2408 DRV_LOG(WARNING, "No available register for"
2411 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2414 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2415 priv->mtr_color_reg);
2420 if (config.mprq.enabled && mprq) {
2421 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2422 config.mprq.stride_num_n < mprq_min_stride_num_n) {
2423 config.mprq.stride_num_n =
2424 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2425 mprq_min_stride_num_n);
2427 "the number of strides"
2428 " for Multi-Packet RQ is out of range,"
2429 " setting default value (%u)",
2430 1 << config.mprq.stride_num_n);
2432 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2433 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2434 } else if (config.mprq.enabled && !mprq) {
2435 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2436 config.mprq.enabled = 0;
2438 if (config.max_dump_files_num == 0)
2439 config.max_dump_files_num = 128;
2440 eth_dev = rte_eth_dev_allocate(name);
2441 if (eth_dev == NULL) {
2442 DRV_LOG(ERR, "can not allocate rte ethdev");
2446 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2447 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2448 if (priv->representor) {
2449 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2450 eth_dev->data->representor_id = priv->representor_id;
2453 * Store associated network device interface index. This index
2454 * is permanent throughout the lifetime of device. So, we may store
2455 * the ifindex here and use the cached value further.
2457 assert(spawn->ifindex);
2458 priv->if_index = spawn->ifindex;
2459 eth_dev->data->dev_private = priv;
2460 priv->dev_data = eth_dev->data;
2461 eth_dev->data->mac_addrs = priv->mac;
2462 eth_dev->device = dpdk_dev;
2463 /* Configure the first MAC address by default. */
2464 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2466 "port %u cannot get MAC address, is mlx5_en"
2467 " loaded? (errno: %s)",
2468 eth_dev->data->port_id, strerror(rte_errno));
2473 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2474 eth_dev->data->port_id,
2475 mac.addr_bytes[0], mac.addr_bytes[1],
2476 mac.addr_bytes[2], mac.addr_bytes[3],
2477 mac.addr_bytes[4], mac.addr_bytes[5]);
2480 char ifname[IF_NAMESIZE];
2482 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2483 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2484 eth_dev->data->port_id, ifname);
2486 DRV_LOG(DEBUG, "port %u ifname is unknown",
2487 eth_dev->data->port_id);
2490 /* Get actual MTU if possible. */
2491 err = mlx5_get_mtu(eth_dev, &priv->mtu);
2496 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2498 /* Initialize burst functions to prevent crashes before link-up. */
2499 eth_dev->rx_pkt_burst = removed_rx_burst;
2500 eth_dev->tx_pkt_burst = removed_tx_burst;
2501 eth_dev->dev_ops = &mlx5_dev_ops;
2502 /* Register MAC address. */
2503 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2504 if (config.vf && config.vf_nl_en)
2505 mlx5_nl_mac_addr_sync(eth_dev);
2506 TAILQ_INIT(&priv->flows);
2507 TAILQ_INIT(&priv->ctrl_flows);
2508 TAILQ_INIT(&priv->flow_meters);
2509 TAILQ_INIT(&priv->flow_meter_profiles);
2510 /* Hint libmlx5 to use PMD allocator for data plane resources */
2511 struct mlx5dv_ctx_allocators alctr = {
2512 .alloc = &mlx5_alloc_verbs_buf,
2513 .free = &mlx5_free_verbs_buf,
2516 mlx5_glue->dv_set_context_attr(sh->ctx,
2517 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2518 (void *)((uintptr_t)&alctr));
2519 /* Bring Ethernet device up. */
2520 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2521 eth_dev->data->port_id);
2522 mlx5_set_link_up(eth_dev);
2524 * Even though the interrupt handler is not installed yet,
2525 * interrupts will still trigger on the async_fd from
2526 * Verbs context returned by ibv_open_device().
2528 mlx5_link_update(eth_dev, 0);
2529 #ifdef HAVE_MLX5DV_DR_ESWITCH
2530 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2531 (switch_info->representor || switch_info->master)))
2532 config.dv_esw_en = 0;
2534 config.dv_esw_en = 0;
2536 /* Detect minimal data bytes to inline. */
2537 mlx5_set_min_inline(spawn, &config);
2538 /* Store device configuration on private structure. */
2539 priv->config = config;
2540 /* Create context for virtual machine VLAN workaround. */
2541 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2542 if (config.dv_flow_en) {
2543 err = mlx5_alloc_shared_dr(priv);
2546 priv->qrss_id_pool = mlx5_flow_id_pool_alloc();
2547 if (!priv->qrss_id_pool) {
2548 DRV_LOG(ERR, "can't create flow id pool");
2553 /* Supported Verbs flow priority number detection. */
2554 err = mlx5_flow_discover_priorities(eth_dev);
2559 priv->config.flow_prio = err;
2560 if (!priv->config.dv_esw_en &&
2561 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2562 DRV_LOG(WARNING, "metadata mode %u is not supported "
2563 "(no E-Switch)", priv->config.dv_xmeta_en);
2564 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2566 mlx5_set_metadata_mask(eth_dev);
2567 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2568 !priv->sh->dv_regc0_mask) {
2569 DRV_LOG(ERR, "metadata mode %u is not supported "
2570 "(no metadata reg_c[0] is available)",
2571 priv->config.dv_xmeta_en);
2575 /* Query availibility of metadata reg_c's. */
2576 err = mlx5_flow_discover_mreg_c(eth_dev);
2581 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2583 "port %u extensive metadata register is not supported",
2584 eth_dev->data->port_id);
2585 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2586 DRV_LOG(ERR, "metadata mode %u is not supported "
2587 "(no metadata registers available)",
2588 priv->config.dv_xmeta_en);
2593 if (priv->config.dv_flow_en &&
2594 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2595 mlx5_flow_ext_mreg_supported(eth_dev) &&
2596 priv->sh->dv_regc0_mask) {
2597 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2598 MLX5_FLOW_MREG_HTABLE_SZ);
2599 if (!priv->mreg_cp_tbl) {
2607 if (priv->mreg_cp_tbl)
2608 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2610 mlx5_free_shared_dr(priv);
2611 if (priv->nl_socket_route >= 0)
2612 close(priv->nl_socket_route);
2613 if (priv->nl_socket_rdma >= 0)
2614 close(priv->nl_socket_rdma);
2615 if (priv->vmwa_context)
2616 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2617 if (priv->qrss_id_pool)
2618 mlx5_flow_id_pool_release(priv->qrss_id_pool);
2620 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2622 if (eth_dev != NULL)
2623 eth_dev->data->dev_private = NULL;
2625 if (eth_dev != NULL) {
2626 /* mac_addrs must not be freed alone because part of dev_private */
2627 eth_dev->data->mac_addrs = NULL;
2628 rte_eth_dev_release_port(eth_dev);
2631 mlx5_free_shared_ibctx(sh);
2638 * Comparison callback to sort device data.
2640 * This is meant to be used with qsort().
2643 * Pointer to pointer to first data object.
2645 * Pointer to pointer to second data object.
2648 * 0 if both objects are equal, less than 0 if the first argument is less
2649 * than the second, greater than 0 otherwise.
2652 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2654 const struct mlx5_switch_info *si_a =
2655 &((const struct mlx5_dev_spawn_data *)a)->info;
2656 const struct mlx5_switch_info *si_b =
2657 &((const struct mlx5_dev_spawn_data *)b)->info;
2660 /* Master device first. */
2661 ret = si_b->master - si_a->master;
2664 /* Then representor devices. */
2665 ret = si_b->representor - si_a->representor;
2668 /* Unidentified devices come last in no specific order. */
2669 if (!si_a->representor)
2671 /* Order representors by name. */
2672 return si_a->port_name - si_b->port_name;
2676 * Match PCI information for possible slaves of bonding device.
2678 * @param[in] ibv_dev
2679 * Pointer to Infiniband device structure.
2680 * @param[in] pci_dev
2681 * Pointer to PCI device structure to match PCI address.
2682 * @param[in] nl_rdma
2683 * Netlink RDMA group socket handle.
2686 * negative value if no bonding device found, otherwise
2687 * positive index of slave PF in bonding.
2690 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2691 const struct rte_pci_device *pci_dev,
2694 char ifname[IF_NAMESIZE + 1];
2695 unsigned int ifindex;
2701 * Try to get master device name. If something goes
2702 * wrong suppose the lack of kernel support and no
2707 if (!strstr(ibv_dev->name, "bond"))
2709 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2713 * The Master device might not be on the predefined
2714 * port (not on port index 1, it is not garanted),
2715 * we have to scan all Infiniband device port and
2718 for (i = 1; i <= np; ++i) {
2719 /* Check whether Infiniband port is populated. */
2720 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2723 if (!if_indextoname(ifindex, ifname))
2725 /* Try to read bonding slave names from sysfs. */
2727 "/sys/class/net/%s/master/bonding/slaves", ifname);
2728 file = fopen(slaves, "r");
2734 /* Use safe format to check maximal buffer length. */
2735 assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2736 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2737 char tmp_str[IF_NAMESIZE + 32];
2738 struct rte_pci_addr pci_addr;
2739 struct mlx5_switch_info info;
2741 /* Process slave interface names in the loop. */
2742 snprintf(tmp_str, sizeof(tmp_str),
2743 "/sys/class/net/%s", ifname);
2744 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2745 DRV_LOG(WARNING, "can not get PCI address"
2746 " for netdev \"%s\"", ifname);
2749 if (pci_dev->addr.domain != pci_addr.domain ||
2750 pci_dev->addr.bus != pci_addr.bus ||
2751 pci_dev->addr.devid != pci_addr.devid ||
2752 pci_dev->addr.function != pci_addr.function)
2754 /* Slave interface PCI address match found. */
2756 snprintf(tmp_str, sizeof(tmp_str),
2757 "/sys/class/net/%s/phys_port_name", ifname);
2758 file = fopen(tmp_str, "rb");
2761 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2762 if (fscanf(file, "%32s", tmp_str) == 1)
2763 mlx5_translate_port_name(tmp_str, &info);
2764 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2765 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2766 pf = info.port_name;
2775 * DPDK callback to register a PCI device.
2777 * This function spawns Ethernet devices out of a given PCI device.
2779 * @param[in] pci_drv
2780 * PCI driver structure (mlx5_driver).
2781 * @param[in] pci_dev
2782 * PCI device information.
2785 * 0 on success, a negative errno value otherwise and rte_errno is set.
2788 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2789 struct rte_pci_device *pci_dev)
2791 struct ibv_device **ibv_list;
2793 * Number of found IB Devices matching with requested PCI BDF.
2794 * nd != 1 means there are multiple IB devices over the same
2795 * PCI device and we have representors and master.
2797 unsigned int nd = 0;
2799 * Number of found IB device Ports. nd = 1 and np = 1..n means
2800 * we have the single multiport IB device, and there may be
2801 * representors attached to some of found ports.
2803 unsigned int np = 0;
2805 * Number of DPDK ethernet devices to Spawn - either over
2806 * multiple IB devices or multiple ports of single IB device.
2807 * Actually this is the number of iterations to spawn.
2809 unsigned int ns = 0;
2812 * < 0 - no bonding device (single one)
2813 * >= 0 - bonding device (value is slave PF index)
2816 struct mlx5_dev_spawn_data *list = NULL;
2817 struct mlx5_dev_config dev_config;
2820 ret = mlx5_init_once();
2822 DRV_LOG(ERR, "unable to init PMD global data: %s",
2823 strerror(rte_errno));
2826 assert(pci_drv == &mlx5_driver);
2828 ibv_list = mlx5_glue->get_device_list(&ret);
2830 rte_errno = errno ? errno : ENOSYS;
2831 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2835 * First scan the list of all Infiniband devices to find
2836 * matching ones, gathering into the list.
2838 struct ibv_device *ibv_match[ret + 1];
2839 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2840 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2844 struct rte_pci_addr pci_addr;
2846 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2847 bd = mlx5_device_bond_pci_match
2848 (ibv_list[ret], pci_dev, nl_rdma);
2851 * Bonding device detected. Only one match is allowed,
2852 * the bonding is supported over multi-port IB device,
2853 * there should be no matches on representor PCI
2854 * functions or non VF LAG bonding devices with
2855 * specified address.
2859 "multiple PCI match on bonding device"
2860 "\"%s\" found", ibv_list[ret]->name);
2865 DRV_LOG(INFO, "PCI information matches for"
2866 " slave %d bonding device \"%s\"",
2867 bd, ibv_list[ret]->name);
2868 ibv_match[nd++] = ibv_list[ret];
2871 if (mlx5_dev_to_pci_addr
2872 (ibv_list[ret]->ibdev_path, &pci_addr))
2874 if (pci_dev->addr.domain != pci_addr.domain ||
2875 pci_dev->addr.bus != pci_addr.bus ||
2876 pci_dev->addr.devid != pci_addr.devid ||
2877 pci_dev->addr.function != pci_addr.function)
2879 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2880 ibv_list[ret]->name);
2881 ibv_match[nd++] = ibv_list[ret];
2883 ibv_match[nd] = NULL;
2885 /* No device matches, just complain and bail out. */
2887 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2888 " are kernel drivers loaded?",
2889 pci_dev->addr.domain, pci_dev->addr.bus,
2890 pci_dev->addr.devid, pci_dev->addr.function);
2897 * Found single matching device may have multiple ports.
2898 * Each port may be representor, we have to check the port
2899 * number and check the representors existence.
2902 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2904 DRV_LOG(WARNING, "can not get IB device \"%s\""
2905 " ports number", ibv_match[0]->name);
2906 if (bd >= 0 && !np) {
2907 DRV_LOG(ERR, "can not get ports"
2908 " for bonding device");
2914 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2917 * This may happen if there is VF LAG kernel support and
2918 * application is compiled with older rdma_core library.
2921 "No kernel/verbs support for VF LAG bonding found.");
2922 rte_errno = ENOTSUP;
2928 * Now we can determine the maximal
2929 * amount of devices to be spawned.
2931 list = rte_zmalloc("device spawn data",
2932 sizeof(struct mlx5_dev_spawn_data) *
2934 RTE_CACHE_LINE_SIZE);
2936 DRV_LOG(ERR, "spawn data array allocation failure");
2941 if (bd >= 0 || np > 1) {
2943 * Single IB device with multiple ports found,
2944 * it may be E-Switch master device and representors.
2945 * We have to perform identification trough the ports.
2947 assert(nl_rdma >= 0);
2951 for (i = 1; i <= np; ++i) {
2952 list[ns].max_port = np;
2953 list[ns].ibv_port = i;
2954 list[ns].ibv_dev = ibv_match[0];
2955 list[ns].eth_dev = NULL;
2956 list[ns].pci_dev = pci_dev;
2957 list[ns].pf_bond = bd;
2958 list[ns].ifindex = mlx5_nl_ifindex
2959 (nl_rdma, list[ns].ibv_dev->name, i);
2960 if (!list[ns].ifindex) {
2962 * No network interface index found for the
2963 * specified port, it means there is no
2964 * representor on this port. It's OK,
2965 * there can be disabled ports, for example
2966 * if sriov_numvfs < sriov_totalvfs.
2972 ret = mlx5_nl_switch_info
2976 if (ret || (!list[ns].info.representor &&
2977 !list[ns].info.master)) {
2979 * We failed to recognize representors with
2980 * Netlink, let's try to perform the task
2983 ret = mlx5_sysfs_switch_info
2987 if (!ret && bd >= 0) {
2988 switch (list[ns].info.name_type) {
2989 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2990 if (list[ns].info.port_name == bd)
2993 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2994 if (list[ns].info.pf_num == bd)
3002 if (!ret && (list[ns].info.representor ^
3003 list[ns].info.master))
3008 "unable to recognize master/representors"
3009 " on the IB device with multiple ports");
3016 * The existence of several matching entries (nd > 1) means
3017 * port representors have been instantiated. No existing Verbs
3018 * call nor sysfs entries can tell them apart, this can only
3019 * be done through Netlink calls assuming kernel drivers are
3020 * recent enough to support them.
3022 * In the event of identification failure through Netlink,
3023 * try again through sysfs, then:
3025 * 1. A single IB device matches (nd == 1) with single
3026 * port (np=0/1) and is not a representor, assume
3027 * no switch support.
3029 * 2. Otherwise no safe assumptions can be made;
3030 * complain louder and bail out.
3033 for (i = 0; i != nd; ++i) {
3034 memset(&list[ns].info, 0, sizeof(list[ns].info));
3035 list[ns].max_port = 1;
3036 list[ns].ibv_port = 1;
3037 list[ns].ibv_dev = ibv_match[i];
3038 list[ns].eth_dev = NULL;
3039 list[ns].pci_dev = pci_dev;
3040 list[ns].pf_bond = -1;
3041 list[ns].ifindex = 0;
3043 list[ns].ifindex = mlx5_nl_ifindex
3044 (nl_rdma, list[ns].ibv_dev->name, 1);
3045 if (!list[ns].ifindex) {
3046 char ifname[IF_NAMESIZE];
3049 * Netlink failed, it may happen with old
3050 * ib_core kernel driver (before 4.16).
3051 * We can assume there is old driver because
3052 * here we are processing single ports IB
3053 * devices. Let's try sysfs to retrieve
3054 * the ifindex. The method works for
3055 * master device only.
3059 * Multiple devices found, assume
3060 * representors, can not distinguish
3061 * master/representor and retrieve
3062 * ifindex via sysfs.
3066 ret = mlx5_get_master_ifname
3067 (ibv_match[i]->ibdev_path, &ifname);
3070 if_nametoindex(ifname);
3071 if (!list[ns].ifindex) {
3073 * No network interface index found
3074 * for the specified device, it means
3075 * there it is neither representor
3083 ret = mlx5_nl_switch_info
3087 if (ret || (!list[ns].info.representor &&
3088 !list[ns].info.master)) {
3090 * We failed to recognize representors with
3091 * Netlink, let's try to perform the task
3094 ret = mlx5_sysfs_switch_info
3098 if (!ret && (list[ns].info.representor ^
3099 list[ns].info.master)) {
3101 } else if ((nd == 1) &&
3102 !list[ns].info.representor &&
3103 !list[ns].info.master) {
3105 * Single IB device with
3106 * one physical port and
3107 * attached network device.
3108 * May be SRIOV is not enabled
3109 * or there is no representors.
3111 DRV_LOG(INFO, "no E-Switch support detected");
3118 "unable to recognize master/representors"
3119 " on the multiple IB devices");
3127 * Sort list to probe devices in natural order for users convenience
3128 * (i.e. master first, then representors from lowest to highest ID).
3130 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3131 /* Default configuration. */
3132 dev_config = (struct mlx5_dev_config){
3134 .mps = MLX5_ARG_UNSET,
3135 .dbnc = MLX5_ARG_UNSET,
3137 .txq_inline_max = MLX5_ARG_UNSET,
3138 .txq_inline_min = MLX5_ARG_UNSET,
3139 .txq_inline_mpw = MLX5_ARG_UNSET,
3140 .txqs_inline = MLX5_ARG_UNSET,
3142 .mr_ext_memseg_en = 1,
3144 .enabled = 0, /* Disabled by default. */
3145 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3146 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3147 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3151 /* Device specific configuration. */
3152 switch (pci_dev->id.device_id) {
3153 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3154 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3155 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3156 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3157 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3158 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3159 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3165 for (i = 0; i != ns; ++i) {
3168 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3171 if (!list[i].eth_dev) {
3172 if (rte_errno != EBUSY && rte_errno != EEXIST)
3174 /* Device is disabled or already spawned. Ignore it. */
3177 restore = list[i].eth_dev->data->dev_flags;
3178 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3179 /* Restore non-PCI flags cleared by the above call. */
3180 list[i].eth_dev->data->dev_flags |= restore;
3181 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3182 rte_eth_dev_probing_finish(list[i].eth_dev);
3186 "probe of PCI device " PCI_PRI_FMT " aborted after"
3187 " encountering an error: %s",
3188 pci_dev->addr.domain, pci_dev->addr.bus,
3189 pci_dev->addr.devid, pci_dev->addr.function,
3190 strerror(rte_errno));
3194 if (!list[i].eth_dev)
3196 mlx5_dev_close(list[i].eth_dev);
3197 /* mac_addrs must not be freed because in dev_private */
3198 list[i].eth_dev->data->mac_addrs = NULL;
3199 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3201 /* Restore original error. */
3208 * Do the routine cleanup:
3209 * - close opened Netlink sockets
3210 * - free allocated spawn data array
3211 * - free the Infiniband device list
3220 mlx5_glue->free_device_list(ibv_list);
3225 * Look for the ethernet device belonging to mlx5 driver.
3227 * @param[in] port_id
3228 * port_id to start looking for device.
3229 * @param[in] pci_dev
3230 * Pointer to the hint PCI device. When device is being probed
3231 * the its siblings (master and preceding representors might
3232 * not have assigned driver yet (because the mlx5_pci_probe()
3233 * is not completed yet, for this case match on hint PCI
3234 * device may be used to detect sibling device.
3237 * port_id of found device, RTE_MAX_ETHPORT if not found.
3240 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3242 while (port_id < RTE_MAX_ETHPORTS) {
3243 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3245 if (dev->state != RTE_ETH_DEV_UNUSED &&
3247 (dev->device == &pci_dev->device ||
3248 (dev->device->driver &&
3249 dev->device->driver->name &&
3250 !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3254 if (port_id >= RTE_MAX_ETHPORTS)
3255 return RTE_MAX_ETHPORTS;
3260 * DPDK callback to remove a PCI device.
3262 * This function removes all Ethernet devices belong to a given PCI device.
3264 * @param[in] pci_dev
3265 * Pointer to the PCI device.
3268 * 0 on success, the function cannot fail.
3271 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3275 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3276 rte_eth_dev_close(port_id);
3280 static const struct rte_pci_id mlx5_pci_id_map[] = {
3282 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3283 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3286 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3287 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3290 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3291 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3294 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3295 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3298 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3299 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3302 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3303 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3306 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3307 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3310 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3311 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3314 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3315 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3318 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3319 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3322 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3323 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3326 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3327 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3330 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3331 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3334 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3335 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3342 static struct rte_pci_driver mlx5_driver = {
3344 .name = MLX5_DRIVER_NAME
3346 .id_table = mlx5_pci_id_map,
3347 .probe = mlx5_pci_probe,
3348 .remove = mlx5_pci_remove,
3349 .dma_map = mlx5_dma_map,
3350 .dma_unmap = mlx5_dma_unmap,
3351 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3352 RTE_PCI_DRV_PROBE_AGAIN,
3355 #ifdef RTE_IBVERBS_LINK_DLOPEN
3358 * Suffix RTE_EAL_PMD_PATH with "-glue".
3360 * This function performs a sanity check on RTE_EAL_PMD_PATH before
3361 * suffixing its last component.
3364 * Output buffer, should be large enough otherwise NULL is returned.
3369 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
3372 mlx5_glue_path(char *buf, size_t size)
3374 static const char *const bad[] = { "/", ".", "..", NULL };
3375 const char *path = RTE_EAL_PMD_PATH;
3376 size_t len = strlen(path);
3380 while (len && path[len - 1] == '/')
3382 for (off = len; off && path[off - 1] != '/'; --off)
3384 for (i = 0; bad[i]; ++i)
3385 if (!strncmp(path + off, bad[i], (int)(len - off)))
3387 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3388 if (i == -1 || (size_t)i >= size)
3393 "unable to append \"-glue\" to last component of"
3394 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3395 " please re-configure DPDK");
3400 * Initialization routine for run-time dependency on rdma-core.
3403 mlx5_glue_init(void)
3405 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3406 const char *path[] = {
3408 * A basic security check is necessary before trusting
3409 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3411 (geteuid() == getuid() && getegid() == getgid() ?
3412 getenv("MLX5_GLUE_PATH") : NULL),
3414 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3415 * variant, otherwise let dlopen() look up libraries on its
3418 (*RTE_EAL_PMD_PATH ?
3419 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3422 void *handle = NULL;
3426 while (!handle && i != RTE_DIM(path)) {
3435 end = strpbrk(path[i], ":;");
3437 end = path[i] + strlen(path[i]);
3438 len = end - path[i];
3443 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3445 (!len || *(end - 1) == '/') ? "" : "/");
3448 if (sizeof(name) != (size_t)ret + 1)
3450 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3452 handle = dlopen(name, RTLD_LAZY);
3463 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3466 sym = dlsym(handle, "mlx5_glue");
3467 if (!sym || !*sym) {
3471 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3480 "cannot initialize PMD due to missing run-time dependency on"
3481 " rdma-core libraries (libibverbs, libmlx5)");
3488 * Driver initialization routine.
3490 RTE_INIT(rte_mlx5_pmd_init)
3492 /* Initialize driver log type. */
3493 mlx5_logtype = rte_log_register("pmd.net.mlx5");
3494 if (mlx5_logtype >= 0)
3495 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3497 /* Build the static tables for Verbs conversion. */
3498 mlx5_set_ptype_table();
3499 mlx5_set_cksum_table();
3500 mlx5_set_swp_types_table();
3502 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3503 * huge pages. Calling ibv_fork_init() during init allows
3504 * applications to use fork() safely for purposes other than
3505 * using this PMD, which is not supported in forked processes.
3507 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3508 /* Match the size of Rx completion entry to the size of a cacheline. */
3509 if (RTE_CACHE_LINE_SIZE == 128)
3510 setenv("MLX5_CQE_SIZE", "128", 0);
3512 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3513 * cleanup all the Verbs resources even when the device was removed.
3515 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3516 #ifdef RTE_IBVERBS_LINK_DLOPEN
3517 if (mlx5_glue_init())
3522 /* Glue structure must not contain any NULL pointers. */
3526 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3527 assert(((const void *const *)mlx5_glue)[i]);
3530 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3532 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3533 mlx5_glue->version, MLX5_GLUE_VERSION);
3536 mlx5_glue->fork_init();
3537 rte_pci_register(&mlx5_driver);
3540 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3541 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3542 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");