1 // SPDX-License-Identifier: BSD-3-Clause
2 /* Copyright 2018 Mellanox Technologies, Ltd */
4 #include <rte_flow_driver.h>
5 #include <rte_malloc.h>
13 * Allocate flow counters via devx interface.
16 * ibv contexts returned from mlx5dv_open_device.
18 * Pointer to counters properties structure to be filled by the routine.
20 * Bulk counter numbers in 128 counters units.
23 * Pointer to counter object on success, a negative value otherwise and
26 struct mlx5_devx_obj *
27 mlx5_devx_cmd_flow_counter_alloc(struct ibv_context *ctx, uint32_t bulk_n_128)
29 struct mlx5_devx_obj *dcs = rte_zmalloc("dcs", sizeof(*dcs), 0);
30 uint32_t in[MLX5_ST_SZ_DW(alloc_flow_counter_in)] = {0};
31 uint32_t out[MLX5_ST_SZ_DW(alloc_flow_counter_out)] = {0};
37 MLX5_SET(alloc_flow_counter_in, in, opcode,
38 MLX5_CMD_OP_ALLOC_FLOW_COUNTER);
39 MLX5_SET(alloc_flow_counter_in, in, flow_counter_bulk, bulk_n_128);
40 dcs->obj = mlx5_glue->devx_obj_create(ctx, in,
41 sizeof(in), out, sizeof(out));
43 DRV_LOG(ERR, "Can't allocate counters - error %d\n", errno);
48 dcs->id = MLX5_GET(alloc_flow_counter_out, out, flow_counter_id);
53 * Query flow counters values.
56 * devx object that was obtained from mlx5_devx_cmd_fc_alloc.
58 * Whether hardware should clear the counters after the query or not.
59 * @param[in] n_counters
60 * 0 in case of 1 counter to read, otherwise the counter number to read.
62 * The number of packets that matched the flow.
64 * The number of bytes that matched the flow.
66 * The mkey key for batch query.
68 * The address in the mkey range for batch query.
70 * The completion object for asynchronous batch query.
72 * The ID to be returned in the asynchronous batch query response.
75 * 0 on success, a negative value otherwise.
78 mlx5_devx_cmd_flow_counter_query(struct mlx5_devx_obj *dcs,
79 int clear, uint32_t n_counters,
80 uint64_t *pkts, uint64_t *bytes,
81 uint32_t mkey, void *addr,
82 struct mlx5dv_devx_cmd_comp *cmd_comp,
85 int out_len = MLX5_ST_SZ_BYTES(query_flow_counter_out) +
86 MLX5_ST_SZ_BYTES(traffic_counter);
87 uint32_t out[out_len];
88 uint32_t in[MLX5_ST_SZ_DW(query_flow_counter_in)] = {0};
92 MLX5_SET(query_flow_counter_in, in, opcode,
93 MLX5_CMD_OP_QUERY_FLOW_COUNTER);
94 MLX5_SET(query_flow_counter_in, in, op_mod, 0);
95 MLX5_SET(query_flow_counter_in, in, flow_counter_id, dcs->id);
96 MLX5_SET(query_flow_counter_in, in, clear, !!clear);
99 MLX5_SET(query_flow_counter_in, in, num_of_counters,
101 MLX5_SET(query_flow_counter_in, in, dump_to_memory, 1);
102 MLX5_SET(query_flow_counter_in, in, mkey, mkey);
103 MLX5_SET64(query_flow_counter_in, in, address,
104 (uint64_t)(uintptr_t)addr);
107 rc = mlx5_glue->devx_obj_query(dcs->obj, in, sizeof(in), out,
110 rc = mlx5_glue->devx_obj_query_async(dcs->obj, in, sizeof(in),
114 DRV_LOG(ERR, "Failed to query devx counters with rc %d\n ", rc);
119 stats = MLX5_ADDR_OF(query_flow_counter_out,
120 out, flow_statistics);
121 *pkts = MLX5_GET64(traffic_counter, stats, packets);
122 *bytes = MLX5_GET64(traffic_counter, stats, octets);
131 * ibv contexts returned from mlx5dv_open_device.
133 * Attributes of the requested mkey.
136 * Pointer to Devx mkey on success, a negative value otherwise and rte_errno
139 struct mlx5_devx_obj *
140 mlx5_devx_cmd_mkey_create(struct ibv_context *ctx,
141 struct mlx5_devx_mkey_attr *attr)
143 uint32_t in[MLX5_ST_SZ_DW(create_mkey_in)] = {0};
144 uint32_t out[MLX5_ST_SZ_DW(create_mkey_out)] = {0};
146 struct mlx5_devx_obj *mkey = rte_zmalloc("mkey", sizeof(*mkey), 0);
148 uint32_t translation_size;
154 pgsize = sysconf(_SC_PAGESIZE);
155 translation_size = (RTE_ALIGN(attr->size, pgsize) * 8) / 16;
156 MLX5_SET(create_mkey_in, in, opcode, MLX5_CMD_OP_CREATE_MKEY);
157 MLX5_SET(create_mkey_in, in, translations_octword_actual_size,
159 MLX5_SET(create_mkey_in, in, mkey_umem_id, attr->umem_id);
160 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
161 MLX5_SET(mkc, mkc, lw, 0x1);
162 MLX5_SET(mkc, mkc, lr, 0x1);
163 MLX5_SET(mkc, mkc, access_mode_1_0, MLX5_MKC_ACCESS_MODE_MTT);
164 MLX5_SET(mkc, mkc, qpn, 0xffffff);
165 MLX5_SET(mkc, mkc, pd, attr->pd);
166 MLX5_SET(mkc, mkc, mkey_7_0, attr->umem_id & 0xFF);
167 MLX5_SET(mkc, mkc, translations_octword_size, translation_size);
168 MLX5_SET64(mkc, mkc, start_addr, attr->addr);
169 MLX5_SET64(mkc, mkc, len, attr->size);
170 MLX5_SET(mkc, mkc, log_page_size, rte_log2_u32(pgsize));
171 mkey->obj = mlx5_glue->devx_obj_create(ctx, in, sizeof(in), out,
174 DRV_LOG(ERR, "Can't create mkey - error %d\n", errno);
179 mkey->id = MLX5_GET(create_mkey_out, out, mkey_index);
180 mkey->id = (mkey->id << 8) | (attr->umem_id & 0xFF);
185 * Get status of devx command response.
186 * Mainly used for asynchronous commands.
189 * The out response buffer.
192 * 0 on success, non-zero value otherwise.
195 mlx5_devx_get_out_command_status(void *out)
201 status = MLX5_GET(query_flow_counter_out, out, status);
203 int syndrome = MLX5_GET(query_flow_counter_out, out, syndrome);
205 DRV_LOG(ERR, "Bad devX status %x, syndrome = %x\n", status,
212 * Destroy any object allocated by a Devx API.
215 * Pointer to a general object.
218 * 0 on success, a negative value otherwise.
221 mlx5_devx_cmd_destroy(struct mlx5_devx_obj *obj)
227 ret = mlx5_glue->devx_obj_destroy(obj->obj);
233 * Query NIC vport context.
234 * Fills minimal inline attribute.
237 * ibv contexts returned from mlx5dv_open_device.
241 * Attributes device values.
244 * 0 on success, a negative value otherwise.
247 mlx5_devx_cmd_query_nic_vport_context(struct ibv_context *ctx,
249 struct mlx5_hca_attr *attr)
251 uint32_t in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
252 uint32_t out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {0};
254 int status, syndrome, rc;
256 /* Query NIC vport context to determine inline mode. */
257 MLX5_SET(query_nic_vport_context_in, in, opcode,
258 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
259 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
261 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
262 rc = mlx5_glue->devx_general_cmd(ctx,
267 status = MLX5_GET(query_nic_vport_context_out, out, status);
268 syndrome = MLX5_GET(query_nic_vport_context_out, out, syndrome);
270 DRV_LOG(DEBUG, "Failed to query NIC vport context, "
271 "status %x, syndrome = %x",
275 vctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
277 attr->vport_inline_mode = MLX5_GET(nic_vport_context, vctx,
278 min_wqe_inline_mode);
281 rc = (rc > 0) ? -rc : rc;
286 * Query HCA attributes.
287 * Using those attributes we can check on run time if the device
288 * is having the required capabilities.
291 * ibv contexts returned from mlx5dv_open_device.
293 * Attributes device values.
296 * 0 on success, a negative value otherwise.
299 mlx5_devx_cmd_query_hca_attr(struct ibv_context *ctx,
300 struct mlx5_hca_attr *attr)
302 uint32_t in[MLX5_ST_SZ_DW(query_hca_cap_in)] = {0};
303 uint32_t out[MLX5_ST_SZ_DW(query_hca_cap_out)] = {0};
305 int status, syndrome, rc;
307 MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
308 MLX5_SET(query_hca_cap_in, in, op_mod,
309 MLX5_GET_HCA_CAP_OP_MOD_GENERAL_DEVICE |
310 MLX5_HCA_CAP_OPMOD_GET_CUR);
312 rc = mlx5_glue->devx_general_cmd(ctx,
313 in, sizeof(in), out, sizeof(out));
316 status = MLX5_GET(query_hca_cap_out, out, status);
317 syndrome = MLX5_GET(query_hca_cap_out, out, syndrome);
319 DRV_LOG(DEBUG, "Failed to query devx HCA capabilities, "
320 "status %x, syndrome = %x",
324 hcattr = MLX5_ADDR_OF(query_hca_cap_out, out, capability);
325 attr->flow_counter_bulk_alloc_bitmap =
326 MLX5_GET(cmd_hca_cap, hcattr, flow_counter_bulk_alloc);
327 attr->flow_counters_dump = MLX5_GET(cmd_hca_cap, hcattr,
329 attr->eswitch_manager = MLX5_GET(cmd_hca_cap, hcattr, eswitch_manager);
330 attr->eth_net_offloads = MLX5_GET(cmd_hca_cap, hcattr,
332 attr->eth_virt = MLX5_GET(cmd_hca_cap, hcattr, eth_virt);
333 if (!attr->eth_net_offloads)
336 /* Query HCA offloads for Ethernet protocol. */
337 memset(in, 0, sizeof(in));
338 memset(out, 0, sizeof(out));
339 MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
340 MLX5_SET(query_hca_cap_in, in, op_mod,
341 MLX5_GET_HCA_CAP_OP_MOD_ETHERNET_OFFLOAD_CAPS |
342 MLX5_HCA_CAP_OPMOD_GET_CUR);
344 rc = mlx5_glue->devx_general_cmd(ctx,
348 attr->eth_net_offloads = 0;
351 status = MLX5_GET(query_hca_cap_out, out, status);
352 syndrome = MLX5_GET(query_hca_cap_out, out, syndrome);
354 DRV_LOG(DEBUG, "Failed to query devx HCA capabilities, "
355 "status %x, syndrome = %x",
357 attr->eth_net_offloads = 0;
360 hcattr = MLX5_ADDR_OF(query_hca_cap_out, out, capability);
361 attr->wqe_vlan_insert = MLX5_GET(per_protocol_networking_offload_caps,
362 hcattr, wqe_vlan_insert);
363 attr->lro_cap = MLX5_GET(per_protocol_networking_offload_caps, hcattr,
365 attr->tunnel_lro_gre = MLX5_GET(per_protocol_networking_offload_caps,
366 hcattr, tunnel_lro_gre);
367 attr->tunnel_lro_vxlan = MLX5_GET(per_protocol_networking_offload_caps,
368 hcattr, tunnel_lro_vxlan);
369 attr->lro_max_msg_sz_mode = MLX5_GET
370 (per_protocol_networking_offload_caps,
371 hcattr, lro_max_msg_sz_mode);
372 for (int i = 0 ; i < MLX5_LRO_NUM_SUPP_PERIODS ; i++) {
373 attr->lro_timer_supported_periods[i] =
374 MLX5_GET(per_protocol_networking_offload_caps, hcattr,
375 lro_timer_supported_periods[i]);
377 attr->wqe_inline_mode = MLX5_GET(per_protocol_networking_offload_caps,
378 hcattr, wqe_inline_mode);
379 if (attr->wqe_inline_mode != MLX5_CAP_INLINE_MODE_VPORT_CONTEXT)
381 if (attr->eth_virt) {
382 rc = mlx5_devx_cmd_query_nic_vport_context(ctx, 0, attr);
390 rc = (rc > 0) ? -rc : rc;