1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
19 #include <sys/ioctl.h>
20 #include <sys/socket.h>
21 #include <netinet/in.h>
22 #include <linux/ethtool.h>
23 #include <linux/sockios.h>
29 #include <rte_atomic.h>
30 #include <rte_ethdev_driver.h>
31 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_interrupts.h>
35 #include <rte_malloc.h>
36 #include <rte_string_fns.h>
39 #include "mlx5_glue.h"
40 #include "mlx5_rxtx.h"
41 #include "mlx5_utils.h"
43 /* Add defines in case the running kernel is not the same as user headers. */
44 #ifndef ETHTOOL_GLINKSETTINGS
45 struct ethtool_link_settings {
54 uint8_t eth_tp_mdix_ctrl;
55 int8_t link_mode_masks_nwords;
57 uint32_t link_mode_masks[];
60 #define ETHTOOL_GLINKSETTINGS 0x0000004c
61 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5
62 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6
63 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17
64 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18
65 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19
66 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20
67 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21
68 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22
69 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23
70 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24
71 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25
72 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26
73 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27
74 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28
75 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29
76 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30
78 #ifndef HAVE_ETHTOOL_LINK_MODE_25G
79 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31
80 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32
81 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33
83 #ifndef HAVE_ETHTOOL_LINK_MODE_50G
84 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34
85 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35
87 #ifndef HAVE_ETHTOOL_LINK_MODE_100G
88 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36
89 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37
90 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38
91 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39
95 * Get interface name from private structure.
98 * Pointer to Ethernet device.
100 * Interface name output buffer.
103 * 0 on success, a negative errno value otherwise and rte_errno is set.
106 mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE])
108 struct priv *priv = dev->data->dev_private;
111 unsigned int dev_type = 0;
112 unsigned int dev_port_prev = ~0u;
113 char match[IF_NAMESIZE] = "";
116 MKSTR(path, "%s/device/net", priv->ibdev_path);
124 while ((dent = readdir(dir)) != NULL) {
125 char *name = dent->d_name;
127 unsigned int dev_port;
130 if ((name[0] == '.') &&
131 ((name[1] == '\0') ||
132 ((name[1] == '.') && (name[2] == '\0'))))
135 MKSTR(path, "%s/device/net/%s/%s",
136 priv->ibdev_path, name,
137 (dev_type ? "dev_id" : "dev_port"));
139 file = fopen(path, "rb");
144 * Switch to dev_id when dev_port does not exist as
145 * is the case with Linux kernel versions < 3.15.
156 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
161 * Switch to dev_id when dev_port returns the same value for
162 * all ports. May happen when using a MOFED release older than
163 * 3.0 with a Linux kernel >= 3.15.
165 if (dev_port == dev_port_prev)
167 dev_port_prev = dev_port;
168 if (dev_port == (priv->port - 1u))
169 strlcpy(match, name, sizeof(match));
172 if (match[0] == '\0') {
176 strncpy(*ifname, match, sizeof(*ifname));
181 * Get the interface index from device name.
184 * Pointer to Ethernet device.
187 * Interface index on success, a negative errno value otherwise and
191 mlx5_ifindex(const struct rte_eth_dev *dev)
193 char ifname[IF_NAMESIZE];
196 ret = mlx5_get_ifname(dev, &ifname);
199 ret = if_nametoindex(ifname);
208 * Perform ifreq ioctl() on associated Ethernet device.
211 * Pointer to Ethernet device.
213 * Request number to pass to ioctl().
215 * Interface request structure output buffer.
218 * 0 on success, a negative errno value otherwise and rte_errno is set.
221 mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr)
223 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
230 ret = mlx5_get_ifname(dev, &ifr->ifr_name);
233 ret = ioctl(sock, req, ifr);
249 * Pointer to Ethernet device.
251 * MTU value output buffer.
254 * 0 on success, a negative errno value otherwise and rte_errno is set.
257 mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu)
259 struct ifreq request;
260 int ret = mlx5_ifreq(dev, SIOCGIFMTU, &request);
264 *mtu = request.ifr_mtu;
272 * Pointer to Ethernet device.
277 * 0 on success, a negative errno value otherwise and rte_errno is set.
280 mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
282 struct ifreq request = { .ifr_mtu = mtu, };
284 return mlx5_ifreq(dev, SIOCSIFMTU, &request);
291 * Pointer to Ethernet device.
293 * Bitmask for flags that must remain untouched.
295 * Bitmask for flags to modify.
298 * 0 on success, a negative errno value otherwise and rte_errno is set.
301 mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags)
303 struct ifreq request;
304 int ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &request);
308 request.ifr_flags &= keep;
309 request.ifr_flags |= flags & ~keep;
310 return mlx5_ifreq(dev, SIOCSIFFLAGS, &request);
314 * DPDK callback for Ethernet device configuration.
317 * Pointer to Ethernet device structure.
320 * 0 on success, a negative errno value otherwise and rte_errno is set.
323 mlx5_dev_configure(struct rte_eth_dev *dev)
325 struct priv *priv = dev->data->dev_private;
326 unsigned int rxqs_n = dev->data->nb_rx_queues;
327 unsigned int txqs_n = dev->data->nb_tx_queues;
330 unsigned int reta_idx_n;
331 const uint8_t use_app_rss_key =
332 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
335 if (use_app_rss_key &&
336 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
337 rss_hash_default_key_len)) {
338 DRV_LOG(ERR, "port %u RSS key len must be %zu Bytes long",
339 dev->data->port_id, rss_hash_default_key_len);
343 priv->rss_conf.rss_key =
344 rte_realloc(priv->rss_conf.rss_key,
345 rss_hash_default_key_len, 0);
346 if (!priv->rss_conf.rss_key) {
347 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)",
348 dev->data->port_id, rxqs_n);
352 memcpy(priv->rss_conf.rss_key,
354 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
355 rss_hash_default_key,
356 rss_hash_default_key_len);
357 priv->rss_conf.rss_key_len = rss_hash_default_key_len;
358 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
359 priv->rxqs = (void *)dev->data->rx_queues;
360 priv->txqs = (void *)dev->data->tx_queues;
361 if (txqs_n != priv->txqs_n) {
362 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u",
363 dev->data->port_id, priv->txqs_n, txqs_n);
364 priv->txqs_n = txqs_n;
366 if (rxqs_n > priv->config.ind_table_max_size) {
367 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
368 dev->data->port_id, rxqs_n);
372 if (rxqs_n == priv->rxqs_n)
374 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
375 dev->data->port_id, priv->rxqs_n, rxqs_n);
376 priv->rxqs_n = rxqs_n;
377 /* If the requested number of RX queues is not a power of two, use the
378 * maximum indirection table size for better balancing.
379 * The result is always rounded to the next power of two. */
380 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
381 priv->config.ind_table_max_size :
383 ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
386 /* When the number of RX queues is not a power of two, the remaining
387 * table entries are padded with reused WQs and hashes are not spread
389 for (i = 0, j = 0; (i != reta_idx_n); ++i) {
390 (*priv->reta_idx)[i] = j;
398 * Sets default tuning parameters.
401 * Pointer to Ethernet device.
403 * Info structure output buffer.
406 mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
408 struct priv *priv = dev->data->dev_private;
410 /* Minimum CPU utilization. */
411 info->default_rxportconf.ring_size = 256;
412 info->default_txportconf.ring_size = 256;
413 info->default_rxportconf.burst_size = 64;
414 info->default_txportconf.burst_size = 64;
415 if (priv->link_speed_capa & ETH_LINK_SPEED_100G) {
416 info->default_rxportconf.nb_queues = 16;
417 info->default_txportconf.nb_queues = 16;
418 if (dev->data->nb_rx_queues > 2 ||
419 dev->data->nb_tx_queues > 2) {
420 /* Max Throughput. */
421 info->default_rxportconf.ring_size = 2048;
422 info->default_txportconf.ring_size = 2048;
425 info->default_rxportconf.nb_queues = 8;
426 info->default_txportconf.nb_queues = 8;
427 if (dev->data->nb_rx_queues > 2 ||
428 dev->data->nb_tx_queues > 2) {
429 /* Max Throughput. */
430 info->default_rxportconf.ring_size = 4096;
431 info->default_txportconf.ring_size = 4096;
437 * DPDK callback to get information about the device.
440 * Pointer to Ethernet device structure.
442 * Info structure output buffer.
445 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
447 struct priv *priv = dev->data->dev_private;
448 struct mlx5_dev_config *config = &priv->config;
450 char ifname[IF_NAMESIZE];
452 /* FIXME: we should ask the device for these values. */
453 info->min_rx_bufsize = 32;
454 info->max_rx_pktlen = 65536;
456 * Since we need one CQ per QP, the limit is the minimum number
457 * between the two values.
459 max = RTE_MIN(priv->device_attr.orig_attr.max_cq,
460 priv->device_attr.orig_attr.max_qp);
461 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
464 info->max_rx_queues = max;
465 info->max_tx_queues = max;
466 info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
467 info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
468 info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
469 info->rx_queue_offload_capa);
470 info->tx_offload_capa = mlx5_get_tx_port_offloads(dev);
471 if (mlx5_get_ifname(dev, &ifname) == 0)
472 info->if_index = if_nametoindex(ifname);
473 info->reta_size = priv->reta_idx_n ?
474 priv->reta_idx_n : config->ind_table_max_size;
475 info->hash_key_size = rss_hash_default_key_len;
476 info->speed_capa = priv->link_speed_capa;
477 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
478 mlx5_set_default_params(dev, info);
482 * Get supported packet types.
485 * Pointer to Ethernet device structure.
488 * A pointer to the supported Packet types array.
491 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
493 static const uint32_t ptypes[] = {
494 /* refers to rxq_cq_to_pkt_type() */
496 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
497 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
498 RTE_PTYPE_L4_NONFRAG,
502 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
503 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
504 RTE_PTYPE_INNER_L4_NONFRAG,
505 RTE_PTYPE_INNER_L4_FRAG,
506 RTE_PTYPE_INNER_L4_TCP,
507 RTE_PTYPE_INNER_L4_UDP,
511 if (dev->rx_pkt_burst == mlx5_rx_burst ||
512 dev->rx_pkt_burst == mlx5_rx_burst_vec)
518 * DPDK callback to retrieve physical link information.
521 * Pointer to Ethernet device structure.
523 * Storage for current link status.
526 * 0 on success, a negative errno value otherwise and rte_errno is set.
529 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev,
530 struct rte_eth_link *link)
532 struct priv *priv = dev->data->dev_private;
533 struct ethtool_cmd edata = {
534 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */
537 struct rte_eth_link dev_link;
541 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
543 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
544 dev->data->port_id, strerror(rte_errno));
547 memset(&dev_link, 0, sizeof(dev_link));
548 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
549 (ifr.ifr_flags & IFF_RUNNING));
550 ifr.ifr_data = (void *)&edata;
551 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
554 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
555 dev->data->port_id, strerror(rte_errno));
558 link_speed = ethtool_cmd_speed(&edata);
559 if (link_speed == -1)
560 dev_link.link_speed = ETH_SPEED_NUM_NONE;
562 dev_link.link_speed = link_speed;
563 priv->link_speed_capa = 0;
564 if (edata.supported & SUPPORTED_Autoneg)
565 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
566 if (edata.supported & (SUPPORTED_1000baseT_Full |
567 SUPPORTED_1000baseKX_Full))
568 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
569 if (edata.supported & SUPPORTED_10000baseKR_Full)
570 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
571 if (edata.supported & (SUPPORTED_40000baseKR4_Full |
572 SUPPORTED_40000baseCR4_Full |
573 SUPPORTED_40000baseSR4_Full |
574 SUPPORTED_40000baseLR4_Full))
575 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
576 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
577 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
578 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
579 ETH_LINK_SPEED_FIXED);
580 if ((dev_link.link_speed && !dev_link.link_status) ||
581 (!dev_link.link_speed && dev_link.link_status)) {
590 * Retrieve physical link information (unlocked version using new ioctl).
593 * Pointer to Ethernet device structure.
595 * Storage for current link status.
598 * 0 on success, a negative errno value otherwise and rte_errno is set.
601 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev,
602 struct rte_eth_link *link)
605 struct priv *priv = dev->data->dev_private;
606 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS };
608 struct rte_eth_link dev_link;
612 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
614 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
615 dev->data->port_id, strerror(rte_errno));
618 memset(&dev_link, 0, sizeof(dev_link));
619 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
620 (ifr.ifr_flags & IFF_RUNNING));
621 ifr.ifr_data = (void *)&gcmd;
622 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
625 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
627 dev->data->port_id, strerror(rte_errno));
630 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords;
632 alignas(struct ethtool_link_settings)
633 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) +
634 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3];
635 struct ethtool_link_settings *ecmd = (void *)data;
638 ifr.ifr_data = (void *)ecmd;
639 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
642 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
644 dev->data->port_id, strerror(rte_errno));
647 dev_link.link_speed = ecmd->speed;
648 sc = ecmd->link_mode_masks[0] |
649 ((uint64_t)ecmd->link_mode_masks[1] << 32);
650 priv->link_speed_capa = 0;
651 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT))
652 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
653 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) |
654 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT)))
655 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
656 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) |
657 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) |
658 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT)))
659 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
660 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) |
661 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT)))
662 priv->link_speed_capa |= ETH_LINK_SPEED_20G;
663 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) |
664 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) |
665 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) |
666 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT)))
667 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
668 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) |
669 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) |
670 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) |
671 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT)))
672 priv->link_speed_capa |= ETH_LINK_SPEED_56G;
673 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) |
674 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) |
675 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT)))
676 priv->link_speed_capa |= ETH_LINK_SPEED_25G;
677 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) |
678 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT)))
679 priv->link_speed_capa |= ETH_LINK_SPEED_50G;
680 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) |
681 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) |
682 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) |
683 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT)))
684 priv->link_speed_capa |= ETH_LINK_SPEED_100G;
685 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ?
686 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
687 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
688 ETH_LINK_SPEED_FIXED);
689 if ((dev_link.link_speed && !dev_link.link_status) ||
690 (!dev_link.link_speed && dev_link.link_status)) {
699 * DPDK callback to retrieve physical link information.
702 * Pointer to Ethernet device structure.
703 * @param wait_to_complete
704 * Wait for request completion.
707 * 0 if link status was not updated, positive if it was, a negative errno
708 * value otherwise and rte_errno is set.
711 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete)
714 struct rte_eth_link dev_link;
715 time_t start_time = time(NULL);
718 ret = mlx5_link_update_unlocked_gs(dev, &dev_link);
720 ret = mlx5_link_update_unlocked_gset(dev, &dev_link);
723 /* Handle wait to complete situation. */
724 if (wait_to_complete && ret == -EAGAIN) {
725 if (abs((int)difftime(time(NULL), start_time)) <
726 MLX5_LINK_STATUS_TIMEOUT) {
733 } else if (ret < 0) {
736 } while (wait_to_complete);
737 ret = !!memcmp(&dev->data->dev_link, &dev_link,
738 sizeof(struct rte_eth_link));
739 dev->data->dev_link = dev_link;
744 * DPDK callback to change the MTU.
747 * Pointer to Ethernet device structure.
752 * 0 on success, a negative errno value otherwise and rte_errno is set.
755 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
757 struct priv *priv = dev->data->dev_private;
758 uint16_t kern_mtu = 0;
761 ret = mlx5_get_mtu(dev, &kern_mtu);
764 /* Set kernel interface MTU first. */
765 ret = mlx5_set_mtu(dev, mtu);
768 ret = mlx5_get_mtu(dev, &kern_mtu);
771 if (kern_mtu == mtu) {
773 DRV_LOG(DEBUG, "port %u adapter MTU set to %u",
774 dev->data->port_id, mtu);
782 * DPDK callback to get flow control status.
785 * Pointer to Ethernet device structure.
786 * @param[out] fc_conf
787 * Flow control output buffer.
790 * 0 on success, a negative errno value otherwise and rte_errno is set.
793 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
796 struct ethtool_pauseparam ethpause = {
797 .cmd = ETHTOOL_GPAUSEPARAM
801 ifr.ifr_data = (void *)ðpause;
802 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
805 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM) failed:"
807 dev->data->port_id, strerror(rte_errno));
810 fc_conf->autoneg = ethpause.autoneg;
811 if (ethpause.rx_pause && ethpause.tx_pause)
812 fc_conf->mode = RTE_FC_FULL;
813 else if (ethpause.rx_pause)
814 fc_conf->mode = RTE_FC_RX_PAUSE;
815 else if (ethpause.tx_pause)
816 fc_conf->mode = RTE_FC_TX_PAUSE;
818 fc_conf->mode = RTE_FC_NONE;
823 * DPDK callback to modify flow control parameters.
826 * Pointer to Ethernet device structure.
828 * Flow control parameters.
831 * 0 on success, a negative errno value otherwise and rte_errno is set.
834 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
837 struct ethtool_pauseparam ethpause = {
838 .cmd = ETHTOOL_SPAUSEPARAM
842 ifr.ifr_data = (void *)ðpause;
843 ethpause.autoneg = fc_conf->autoneg;
844 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
845 (fc_conf->mode & RTE_FC_RX_PAUSE))
846 ethpause.rx_pause = 1;
848 ethpause.rx_pause = 0;
850 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
851 (fc_conf->mode & RTE_FC_TX_PAUSE))
852 ethpause.tx_pause = 1;
854 ethpause.tx_pause = 0;
855 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
858 "port %u ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
860 dev->data->port_id, strerror(rte_errno));
867 * Get PCI information from struct ibv_device.
870 * Pointer to Ethernet device structure.
871 * @param[out] pci_addr
872 * PCI bus address output buffer.
875 * 0 on success, a negative errno value otherwise and rte_errno is set.
878 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device,
879 struct rte_pci_addr *pci_addr)
883 MKSTR(path, "%s/device/uevent", device->ibdev_path);
885 file = fopen(path, "rb");
890 while (fgets(line, sizeof(line), file) == line) {
891 size_t len = strlen(line);
894 /* Truncate long lines. */
895 if (len == (sizeof(line) - 1))
896 while (line[(len - 1)] != '\n') {
900 line[(len - 1)] = ret;
902 /* Extract information. */
905 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
909 &pci_addr->function) == 4) {
919 * Device status handler.
922 * Pointer to Ethernet device.
924 * Pointer to event flags holder.
927 * Events bitmap of callback process which can be called immediately.
930 mlx5_dev_status_handler(struct rte_eth_dev *dev)
932 struct priv *priv = dev->data->dev_private;
933 struct ibv_async_event event;
936 if (mlx5_link_update(dev, 0) == -EAGAIN) {
940 /* Read all message and acknowledge them. */
942 if (mlx5_glue->get_async_event(priv->ctx, &event))
944 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
945 event.event_type == IBV_EVENT_PORT_ERR) &&
946 (dev->data->dev_conf.intr_conf.lsc == 1))
947 ret |= (1 << RTE_ETH_EVENT_INTR_LSC);
948 else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
949 dev->data->dev_conf.intr_conf.rmv == 1)
950 ret |= (1 << RTE_ETH_EVENT_INTR_RMV);
953 "port %u event type %d on not handled",
954 dev->data->port_id, event.event_type);
955 mlx5_glue->ack_async_event(&event);
961 * Handle interrupts from the NIC.
963 * @param[in] intr_handle
969 mlx5_dev_interrupt_handler(void *cb_arg)
971 struct rte_eth_dev *dev = cb_arg;
974 events = mlx5_dev_status_handler(dev);
975 if (events & (1 << RTE_ETH_EVENT_INTR_LSC))
976 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
977 if (events & (1 << RTE_ETH_EVENT_INTR_RMV))
978 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL);
982 * Handle interrupts from the socket.
988 mlx5_dev_handler_socket(void *cb_arg)
990 struct rte_eth_dev *dev = cb_arg;
992 mlx5_socket_handle(dev);
996 * Uninstall interrupt handler.
999 * Pointer to Ethernet device.
1002 mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev)
1004 struct priv *priv = dev->data->dev_private;
1006 if (dev->data->dev_conf.intr_conf.lsc ||
1007 dev->data->dev_conf.intr_conf.rmv)
1008 rte_intr_callback_unregister(&priv->intr_handle,
1009 mlx5_dev_interrupt_handler, dev);
1010 if (priv->primary_socket)
1011 rte_intr_callback_unregister(&priv->intr_handle_socket,
1012 mlx5_dev_handler_socket, dev);
1013 priv->intr_handle.fd = 0;
1014 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
1015 priv->intr_handle_socket.fd = 0;
1016 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN;
1020 * Install interrupt handler.
1023 * Pointer to Ethernet device.
1026 mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev)
1028 struct priv *priv = dev->data->dev_private;
1032 assert(priv->ctx->async_fd > 0);
1033 flags = fcntl(priv->ctx->async_fd, F_GETFL);
1034 ret = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
1037 "port %u failed to change file descriptor async event"
1039 dev->data->port_id);
1040 dev->data->dev_conf.intr_conf.lsc = 0;
1041 dev->data->dev_conf.intr_conf.rmv = 0;
1043 if (dev->data->dev_conf.intr_conf.lsc ||
1044 dev->data->dev_conf.intr_conf.rmv) {
1045 priv->intr_handle.fd = priv->ctx->async_fd;
1046 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
1047 rte_intr_callback_register(&priv->intr_handle,
1048 mlx5_dev_interrupt_handler, dev);
1050 ret = mlx5_socket_init(dev);
1052 DRV_LOG(ERR, "port %u cannot initialise socket: %s",
1053 dev->data->port_id, strerror(rte_errno));
1054 else if (priv->primary_socket) {
1055 priv->intr_handle_socket.fd = priv->primary_socket;
1056 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT;
1057 rte_intr_callback_register(&priv->intr_handle_socket,
1058 mlx5_dev_handler_socket, dev);
1063 * DPDK callback to bring the link DOWN.
1066 * Pointer to Ethernet device structure.
1069 * 0 on success, a negative errno value otherwise and rte_errno is set.
1072 mlx5_set_link_down(struct rte_eth_dev *dev)
1074 return mlx5_set_flags(dev, ~IFF_UP, ~IFF_UP);
1078 * DPDK callback to bring the link UP.
1081 * Pointer to Ethernet device structure.
1084 * 0 on success, a negative errno value otherwise and rte_errno is set.
1087 mlx5_set_link_up(struct rte_eth_dev *dev)
1089 return mlx5_set_flags(dev, ~IFF_UP, IFF_UP);
1093 * Configure the TX function to use.
1096 * Pointer to private data structure.
1099 * Pointer to selected Tx burst function.
1102 mlx5_select_tx_function(struct rte_eth_dev *dev)
1104 struct priv *priv = dev->data->dev_private;
1105 eth_tx_burst_t tx_pkt_burst = mlx5_tx_burst;
1106 struct mlx5_dev_config *config = &priv->config;
1107 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads;
1108 int tso = !!(tx_offloads & (DEV_TX_OFFLOAD_TCP_TSO |
1109 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
1110 DEV_TX_OFFLOAD_GRE_TNL_TSO |
1111 DEV_TX_OFFLOAD_IP_TNL_TSO |
1112 DEV_TX_OFFLOAD_UDP_TNL_TSO));
1113 int swp = !!(tx_offloads & (DEV_TX_OFFLOAD_IP_TNL_TSO |
1114 DEV_TX_OFFLOAD_UDP_TNL_TSO |
1115 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM));
1116 int vlan_insert = !!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT);
1118 assert(priv != NULL);
1119 /* Select appropriate TX function. */
1120 if (vlan_insert || tso || swp)
1121 return tx_pkt_burst;
1122 if (config->mps == MLX5_MPW_ENHANCED) {
1123 if (mlx5_check_vec_tx_support(dev) > 0) {
1124 if (mlx5_check_raw_vec_tx_support(dev) > 0)
1125 tx_pkt_burst = mlx5_tx_burst_raw_vec;
1127 tx_pkt_burst = mlx5_tx_burst_vec;
1129 "port %u selected enhanced MPW Tx vectorized"
1131 dev->data->port_id);
1133 tx_pkt_burst = mlx5_tx_burst_empw;
1135 "port %u selected enhanced MPW Tx function",
1136 dev->data->port_id);
1138 } else if (config->mps && (config->txq_inline > 0)) {
1139 tx_pkt_burst = mlx5_tx_burst_mpw_inline;
1140 DRV_LOG(DEBUG, "port %u selected MPW inline Tx function",
1141 dev->data->port_id);
1142 } else if (config->mps) {
1143 tx_pkt_burst = mlx5_tx_burst_mpw;
1144 DRV_LOG(DEBUG, "port %u selected MPW Tx function",
1145 dev->data->port_id);
1147 return tx_pkt_burst;
1151 * Configure the RX function to use.
1154 * Pointer to private data structure.
1157 * Pointer to selected Rx burst function.
1160 mlx5_select_rx_function(struct rte_eth_dev *dev)
1162 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
1164 assert(dev != NULL);
1165 if (mlx5_check_vec_rx_support(dev) > 0) {
1166 rx_pkt_burst = mlx5_rx_burst_vec;
1167 DRV_LOG(DEBUG, "port %u selected Rx vectorized function",
1168 dev->data->port_id);
1170 return rx_pkt_burst;
1174 * Check if mlx5 device was removed.
1177 * Pointer to Ethernet device structure.
1180 * 1 when device is removed, otherwise 0.
1183 mlx5_is_removed(struct rte_eth_dev *dev)
1185 struct ibv_device_attr device_attr;
1186 struct priv *priv = dev->data->dev_private;
1188 if (mlx5_glue->query_device(priv->ctx, &device_attr) == EIO)