1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
19 #include <sys/ioctl.h>
20 #include <sys/socket.h>
21 #include <netinet/in.h>
22 #include <linux/ethtool.h>
23 #include <linux/sockios.h>
29 #include <rte_atomic.h>
30 #include <rte_ethdev_driver.h>
31 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_interrupts.h>
35 #include <rte_malloc.h>
36 #include <rte_string_fns.h>
39 #include "mlx5_glue.h"
40 #include "mlx5_rxtx.h"
41 #include "mlx5_utils.h"
43 /* Add defines in case the running kernel is not the same as user headers. */
44 #ifndef ETHTOOL_GLINKSETTINGS
45 struct ethtool_link_settings {
54 uint8_t eth_tp_mdix_ctrl;
55 int8_t link_mode_masks_nwords;
57 uint32_t link_mode_masks[];
60 #define ETHTOOL_GLINKSETTINGS 0x0000004c
61 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5
62 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6
63 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17
64 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18
65 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19
66 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20
67 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21
68 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22
69 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23
70 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24
71 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25
72 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26
73 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27
74 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28
75 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29
76 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30
78 #ifndef HAVE_ETHTOOL_LINK_MODE_25G
79 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31
80 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32
81 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33
83 #ifndef HAVE_ETHTOOL_LINK_MODE_50G
84 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34
85 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35
87 #ifndef HAVE_ETHTOOL_LINK_MODE_100G
88 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36
89 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37
90 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38
91 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39
95 * Get interface name from private structure.
98 * Pointer to Ethernet device.
100 * Interface name output buffer.
103 * 0 on success, a negative errno value otherwise and rte_errno is set.
106 mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE])
108 struct priv *priv = dev->data->dev_private;
111 unsigned int dev_type = 0;
112 unsigned int dev_port_prev = ~0u;
113 char match[IF_NAMESIZE] = "";
116 MKSTR(path, "%s/device/net", priv->ibdev_path);
124 while ((dent = readdir(dir)) != NULL) {
125 char *name = dent->d_name;
127 unsigned int dev_port;
130 if ((name[0] == '.') &&
131 ((name[1] == '\0') ||
132 ((name[1] == '.') && (name[2] == '\0'))))
135 MKSTR(path, "%s/device/net/%s/%s",
136 priv->ibdev_path, name,
137 (dev_type ? "dev_id" : "dev_port"));
139 file = fopen(path, "rb");
144 * Switch to dev_id when dev_port does not exist as
145 * is the case with Linux kernel versions < 3.15.
156 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
161 * Switch to dev_id when dev_port returns the same value for
162 * all ports. May happen when using a MOFED release older than
163 * 3.0 with a Linux kernel >= 3.15.
165 if (dev_port == dev_port_prev)
167 dev_port_prev = dev_port;
168 if (dev_port == (priv->port - 1u))
169 strlcpy(match, name, sizeof(match));
172 if (match[0] == '\0') {
176 strncpy(*ifname, match, sizeof(*ifname));
181 * Get the interface index from device name.
184 * Pointer to Ethernet device.
187 * Interface index on success, a negative errno value otherwise and
191 mlx5_ifindex(const struct rte_eth_dev *dev)
193 char ifname[IF_NAMESIZE];
196 ret = mlx5_get_ifname(dev, &ifname);
199 ret = if_nametoindex(ifname);
208 * Perform ifreq ioctl() on associated Ethernet device.
211 * Pointer to Ethernet device.
213 * Request number to pass to ioctl().
215 * Interface request structure output buffer.
218 * 0 on success, a negative errno value otherwise and rte_errno is set.
221 mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr)
223 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
230 ret = mlx5_get_ifname(dev, &ifr->ifr_name);
233 ret = ioctl(sock, req, ifr);
249 * Pointer to Ethernet device.
251 * MTU value output buffer.
254 * 0 on success, a negative errno value otherwise and rte_errno is set.
257 mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu)
259 struct ifreq request;
260 int ret = mlx5_ifreq(dev, SIOCGIFMTU, &request);
264 *mtu = request.ifr_mtu;
272 * Pointer to Ethernet device.
277 * 0 on success, a negative errno value otherwise and rte_errno is set.
280 mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
282 struct ifreq request = { .ifr_mtu = mtu, };
284 return mlx5_ifreq(dev, SIOCSIFMTU, &request);
291 * Pointer to Ethernet device.
293 * Bitmask for flags that must remain untouched.
295 * Bitmask for flags to modify.
298 * 0 on success, a negative errno value otherwise and rte_errno is set.
301 mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags)
303 struct ifreq request;
304 int ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &request);
308 request.ifr_flags &= keep;
309 request.ifr_flags |= flags & ~keep;
310 return mlx5_ifreq(dev, SIOCSIFFLAGS, &request);
314 * DPDK callback for Ethernet device configuration.
317 * Pointer to Ethernet device structure.
320 * 0 on success, a negative errno value otherwise and rte_errno is set.
323 mlx5_dev_configure(struct rte_eth_dev *dev)
325 struct priv *priv = dev->data->dev_private;
326 unsigned int rxqs_n = dev->data->nb_rx_queues;
327 unsigned int txqs_n = dev->data->nb_tx_queues;
330 unsigned int reta_idx_n;
331 const uint8_t use_app_rss_key =
332 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
333 uint64_t supp_tx_offloads = mlx5_get_tx_port_offloads(dev);
334 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads;
335 uint64_t supp_rx_offloads =
336 (mlx5_get_rx_port_offloads() |
337 mlx5_get_rx_queue_offloads(dev));
338 uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
341 if ((tx_offloads & supp_tx_offloads) != tx_offloads) {
343 "port %u some Tx offloads are not supported requested"
344 " 0x%" PRIx64 " supported 0x%" PRIx64,
345 dev->data->port_id, tx_offloads, supp_tx_offloads);
349 if ((rx_offloads & supp_rx_offloads) != rx_offloads) {
351 "port %u some Rx offloads are not supported requested"
352 " 0x%" PRIx64 " supported 0x%" PRIx64,
353 dev->data->port_id, rx_offloads, supp_rx_offloads);
357 if (use_app_rss_key &&
358 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
359 rss_hash_default_key_len)) {
360 DRV_LOG(ERR, "port %u RSS key len must be %zu Bytes long",
361 dev->data->port_id, rss_hash_default_key_len);
365 priv->rss_conf.rss_key =
366 rte_realloc(priv->rss_conf.rss_key,
367 rss_hash_default_key_len, 0);
368 if (!priv->rss_conf.rss_key) {
369 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)",
370 dev->data->port_id, rxqs_n);
374 memcpy(priv->rss_conf.rss_key,
376 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
377 rss_hash_default_key,
378 rss_hash_default_key_len);
379 priv->rss_conf.rss_key_len = rss_hash_default_key_len;
380 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
381 priv->rxqs = (void *)dev->data->rx_queues;
382 priv->txqs = (void *)dev->data->tx_queues;
383 if (txqs_n != priv->txqs_n) {
384 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u",
385 dev->data->port_id, priv->txqs_n, txqs_n);
386 priv->txqs_n = txqs_n;
388 if (rxqs_n > priv->config.ind_table_max_size) {
389 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
390 dev->data->port_id, rxqs_n);
394 if (rxqs_n == priv->rxqs_n)
396 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
397 dev->data->port_id, priv->rxqs_n, rxqs_n);
398 priv->rxqs_n = rxqs_n;
399 /* If the requested number of RX queues is not a power of two, use the
400 * maximum indirection table size for better balancing.
401 * The result is always rounded to the next power of two. */
402 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
403 priv->config.ind_table_max_size :
405 ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
408 /* When the number of RX queues is not a power of two, the remaining
409 * table entries are padded with reused WQs and hashes are not spread
411 for (i = 0, j = 0; (i != reta_idx_n); ++i) {
412 (*priv->reta_idx)[i] = j;
420 * DPDK callback to get information about the device.
423 * Pointer to Ethernet device structure.
425 * Info structure output buffer.
428 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
430 struct priv *priv = dev->data->dev_private;
431 struct mlx5_dev_config *config = &priv->config;
433 char ifname[IF_NAMESIZE];
435 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
436 /* FIXME: we should ask the device for these values. */
437 info->min_rx_bufsize = 32;
438 info->max_rx_pktlen = 65536;
440 * Since we need one CQ per QP, the limit is the minimum number
441 * between the two values.
443 max = RTE_MIN(priv->device_attr.orig_attr.max_cq,
444 priv->device_attr.orig_attr.max_qp);
445 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
448 info->max_rx_queues = max;
449 info->max_tx_queues = max;
450 info->max_mac_addrs = RTE_DIM(priv->mac);
451 info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
452 info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
453 info->rx_queue_offload_capa);
454 info->tx_offload_capa = mlx5_get_tx_port_offloads(dev);
455 if (mlx5_get_ifname(dev, &ifname) == 0)
456 info->if_index = if_nametoindex(ifname);
457 info->reta_size = priv->reta_idx_n ?
458 priv->reta_idx_n : config->ind_table_max_size;
459 info->hash_key_size = rss_hash_default_key_len;
460 info->speed_capa = priv->link_speed_capa;
461 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
465 * Get supported packet types.
468 * Pointer to Ethernet device structure.
471 * A pointer to the supported Packet types array.
474 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
476 static const uint32_t ptypes[] = {
477 /* refers to rxq_cq_to_pkt_type() */
479 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
480 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
481 RTE_PTYPE_L4_NONFRAG,
485 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
486 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
487 RTE_PTYPE_INNER_L4_NONFRAG,
488 RTE_PTYPE_INNER_L4_FRAG,
489 RTE_PTYPE_INNER_L4_TCP,
490 RTE_PTYPE_INNER_L4_UDP,
494 if (dev->rx_pkt_burst == mlx5_rx_burst ||
495 dev->rx_pkt_burst == mlx5_rx_burst_vec)
501 * DPDK callback to retrieve physical link information.
504 * Pointer to Ethernet device structure.
506 * Storage for current link status.
509 * 0 on success, a negative errno value otherwise and rte_errno is set.
512 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev,
513 struct rte_eth_link *link)
515 struct priv *priv = dev->data->dev_private;
516 struct ethtool_cmd edata = {
517 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */
520 struct rte_eth_link dev_link;
524 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
526 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
527 dev->data->port_id, strerror(rte_errno));
530 memset(&dev_link, 0, sizeof(dev_link));
531 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
532 (ifr.ifr_flags & IFF_RUNNING));
533 ifr.ifr_data = (void *)&edata;
534 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
537 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
538 dev->data->port_id, strerror(rte_errno));
541 link_speed = ethtool_cmd_speed(&edata);
542 if (link_speed == -1)
543 dev_link.link_speed = 0;
545 dev_link.link_speed = link_speed;
546 priv->link_speed_capa = 0;
547 if (edata.supported & SUPPORTED_Autoneg)
548 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
549 if (edata.supported & (SUPPORTED_1000baseT_Full |
550 SUPPORTED_1000baseKX_Full))
551 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
552 if (edata.supported & SUPPORTED_10000baseKR_Full)
553 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
554 if (edata.supported & (SUPPORTED_40000baseKR4_Full |
555 SUPPORTED_40000baseCR4_Full |
556 SUPPORTED_40000baseSR4_Full |
557 SUPPORTED_40000baseLR4_Full))
558 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
559 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
560 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
561 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
562 ETH_LINK_SPEED_FIXED);
563 if ((dev_link.link_speed && !dev_link.link_status) ||
564 (!dev_link.link_speed && dev_link.link_status)) {
573 * Retrieve physical link information (unlocked version using new ioctl).
576 * Pointer to Ethernet device structure.
578 * Storage for current link status.
581 * 0 on success, a negative errno value otherwise and rte_errno is set.
584 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev,
585 struct rte_eth_link *link)
588 struct priv *priv = dev->data->dev_private;
589 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS };
591 struct rte_eth_link dev_link;
595 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
597 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
598 dev->data->port_id, strerror(rte_errno));
601 memset(&dev_link, 0, sizeof(dev_link));
602 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
603 (ifr.ifr_flags & IFF_RUNNING));
604 ifr.ifr_data = (void *)&gcmd;
605 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
608 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
610 dev->data->port_id, strerror(rte_errno));
613 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords;
615 alignas(struct ethtool_link_settings)
616 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) +
617 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3];
618 struct ethtool_link_settings *ecmd = (void *)data;
621 ifr.ifr_data = (void *)ecmd;
622 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
625 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
627 dev->data->port_id, strerror(rte_errno));
630 dev_link.link_speed = ecmd->speed;
631 sc = ecmd->link_mode_masks[0] |
632 ((uint64_t)ecmd->link_mode_masks[1] << 32);
633 priv->link_speed_capa = 0;
634 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT))
635 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
636 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) |
637 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT)))
638 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
639 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) |
640 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) |
641 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT)))
642 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
643 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) |
644 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT)))
645 priv->link_speed_capa |= ETH_LINK_SPEED_20G;
646 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) |
647 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) |
648 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) |
649 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT)))
650 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
651 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) |
652 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) |
653 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) |
654 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT)))
655 priv->link_speed_capa |= ETH_LINK_SPEED_56G;
656 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) |
657 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) |
658 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT)))
659 priv->link_speed_capa |= ETH_LINK_SPEED_25G;
660 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) |
661 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT)))
662 priv->link_speed_capa |= ETH_LINK_SPEED_50G;
663 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) |
664 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) |
665 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) |
666 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT)))
667 priv->link_speed_capa |= ETH_LINK_SPEED_100G;
668 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ?
669 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
670 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
671 ETH_LINK_SPEED_FIXED);
672 if ((dev_link.link_speed && !dev_link.link_status) ||
673 (!dev_link.link_speed && dev_link.link_status)) {
682 * DPDK callback to retrieve physical link information.
685 * Pointer to Ethernet device structure.
686 * @param wait_to_complete
687 * Wait for request completion.
690 * 0 if link status was not updated, positive if it was, a negative errno
691 * value otherwise and rte_errno is set.
694 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete)
697 struct rte_eth_link dev_link;
698 time_t start_time = time(NULL);
701 ret = mlx5_link_update_unlocked_gset(dev, &dev_link);
703 ret = mlx5_link_update_unlocked_gs(dev, &dev_link);
706 /* Handle wait to complete situation. */
707 if (wait_to_complete && ret == -EAGAIN) {
708 if (abs((int)difftime(time(NULL), start_time)) <
709 MLX5_LINK_STATUS_TIMEOUT) {
716 } else if (ret < 0) {
719 } while (wait_to_complete);
720 ret = !!memcmp(&dev->data->dev_link, &dev_link,
721 sizeof(struct rte_eth_link));
722 dev->data->dev_link = dev_link;
727 * DPDK callback to change the MTU.
730 * Pointer to Ethernet device structure.
735 * 0 on success, a negative errno value otherwise and rte_errno is set.
738 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
740 struct priv *priv = dev->data->dev_private;
741 uint16_t kern_mtu = 0;
744 ret = mlx5_get_mtu(dev, &kern_mtu);
747 /* Set kernel interface MTU first. */
748 ret = mlx5_set_mtu(dev, mtu);
751 ret = mlx5_get_mtu(dev, &kern_mtu);
754 if (kern_mtu == mtu) {
756 DRV_LOG(DEBUG, "port %u adapter MTU set to %u",
757 dev->data->port_id, mtu);
765 * DPDK callback to get flow control status.
768 * Pointer to Ethernet device structure.
769 * @param[out] fc_conf
770 * Flow control output buffer.
773 * 0 on success, a negative errno value otherwise and rte_errno is set.
776 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
779 struct ethtool_pauseparam ethpause = {
780 .cmd = ETHTOOL_GPAUSEPARAM
784 ifr.ifr_data = (void *)ðpause;
785 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
788 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM) failed:"
790 dev->data->port_id, strerror(rte_errno));
793 fc_conf->autoneg = ethpause.autoneg;
794 if (ethpause.rx_pause && ethpause.tx_pause)
795 fc_conf->mode = RTE_FC_FULL;
796 else if (ethpause.rx_pause)
797 fc_conf->mode = RTE_FC_RX_PAUSE;
798 else if (ethpause.tx_pause)
799 fc_conf->mode = RTE_FC_TX_PAUSE;
801 fc_conf->mode = RTE_FC_NONE;
806 * DPDK callback to modify flow control parameters.
809 * Pointer to Ethernet device structure.
811 * Flow control parameters.
814 * 0 on success, a negative errno value otherwise and rte_errno is set.
817 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
820 struct ethtool_pauseparam ethpause = {
821 .cmd = ETHTOOL_SPAUSEPARAM
825 ifr.ifr_data = (void *)ðpause;
826 ethpause.autoneg = fc_conf->autoneg;
827 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
828 (fc_conf->mode & RTE_FC_RX_PAUSE))
829 ethpause.rx_pause = 1;
831 ethpause.rx_pause = 0;
833 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
834 (fc_conf->mode & RTE_FC_TX_PAUSE))
835 ethpause.tx_pause = 1;
837 ethpause.tx_pause = 0;
838 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
841 "port %u ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
843 dev->data->port_id, strerror(rte_errno));
850 * Get PCI information from struct ibv_device.
853 * Pointer to Ethernet device structure.
854 * @param[out] pci_addr
855 * PCI bus address output buffer.
858 * 0 on success, a negative errno value otherwise and rte_errno is set.
861 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device,
862 struct rte_pci_addr *pci_addr)
866 MKSTR(path, "%s/device/uevent", device->ibdev_path);
868 file = fopen(path, "rb");
873 while (fgets(line, sizeof(line), file) == line) {
874 size_t len = strlen(line);
877 /* Truncate long lines. */
878 if (len == (sizeof(line) - 1))
879 while (line[(len - 1)] != '\n') {
883 line[(len - 1)] = ret;
885 /* Extract information. */
888 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
892 &pci_addr->function) == 4) {
902 * Device status handler.
905 * Pointer to Ethernet device.
907 * Pointer to event flags holder.
910 * Events bitmap of callback process which can be called immediately.
913 mlx5_dev_status_handler(struct rte_eth_dev *dev)
915 struct priv *priv = dev->data->dev_private;
916 struct ibv_async_event event;
919 if (mlx5_link_update(dev, 0) == -EAGAIN) {
923 /* Read all message and acknowledge them. */
925 if (mlx5_glue->get_async_event(priv->ctx, &event))
927 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
928 event.event_type == IBV_EVENT_PORT_ERR) &&
929 (dev->data->dev_conf.intr_conf.lsc == 1))
930 ret |= (1 << RTE_ETH_EVENT_INTR_LSC);
931 else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
932 dev->data->dev_conf.intr_conf.rmv == 1)
933 ret |= (1 << RTE_ETH_EVENT_INTR_RMV);
936 "port %u event type %d on not handled",
937 dev->data->port_id, event.event_type);
938 mlx5_glue->ack_async_event(&event);
944 * Handle interrupts from the NIC.
946 * @param[in] intr_handle
952 mlx5_dev_interrupt_handler(void *cb_arg)
954 struct rte_eth_dev *dev = cb_arg;
957 events = mlx5_dev_status_handler(dev);
958 if (events & (1 << RTE_ETH_EVENT_INTR_LSC))
959 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
960 if (events & (1 << RTE_ETH_EVENT_INTR_RMV))
961 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL);
965 * Handle interrupts from the socket.
971 mlx5_dev_handler_socket(void *cb_arg)
973 struct rte_eth_dev *dev = cb_arg;
975 mlx5_socket_handle(dev);
979 * Uninstall interrupt handler.
982 * Pointer to Ethernet device.
985 mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev)
987 struct priv *priv = dev->data->dev_private;
989 if (dev->data->dev_conf.intr_conf.lsc ||
990 dev->data->dev_conf.intr_conf.rmv)
991 rte_intr_callback_unregister(&priv->intr_handle,
992 mlx5_dev_interrupt_handler, dev);
993 if (priv->primary_socket)
994 rte_intr_callback_unregister(&priv->intr_handle_socket,
995 mlx5_dev_handler_socket, dev);
996 priv->intr_handle.fd = 0;
997 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
998 priv->intr_handle_socket.fd = 0;
999 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN;
1003 * Install interrupt handler.
1006 * Pointer to Ethernet device.
1009 mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev)
1011 struct priv *priv = dev->data->dev_private;
1015 assert(priv->ctx->async_fd > 0);
1016 flags = fcntl(priv->ctx->async_fd, F_GETFL);
1017 ret = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
1020 "port %u failed to change file descriptor async event"
1022 dev->data->port_id);
1023 dev->data->dev_conf.intr_conf.lsc = 0;
1024 dev->data->dev_conf.intr_conf.rmv = 0;
1026 if (dev->data->dev_conf.intr_conf.lsc ||
1027 dev->data->dev_conf.intr_conf.rmv) {
1028 priv->intr_handle.fd = priv->ctx->async_fd;
1029 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
1030 rte_intr_callback_register(&priv->intr_handle,
1031 mlx5_dev_interrupt_handler, dev);
1033 ret = mlx5_socket_init(dev);
1035 DRV_LOG(ERR, "port %u cannot initialise socket: %s",
1036 dev->data->port_id, strerror(rte_errno));
1037 else if (priv->primary_socket) {
1038 priv->intr_handle_socket.fd = priv->primary_socket;
1039 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT;
1040 rte_intr_callback_register(&priv->intr_handle_socket,
1041 mlx5_dev_handler_socket, dev);
1046 * DPDK callback to bring the link DOWN.
1049 * Pointer to Ethernet device structure.
1052 * 0 on success, a negative errno value otherwise and rte_errno is set.
1055 mlx5_set_link_down(struct rte_eth_dev *dev)
1057 return mlx5_set_flags(dev, ~IFF_UP, ~IFF_UP);
1061 * DPDK callback to bring the link UP.
1064 * Pointer to Ethernet device structure.
1067 * 0 on success, a negative errno value otherwise and rte_errno is set.
1070 mlx5_set_link_up(struct rte_eth_dev *dev)
1072 return mlx5_set_flags(dev, ~IFF_UP, IFF_UP);
1076 * Configure the TX function to use.
1079 * Pointer to private data structure.
1082 * Pointer to selected Tx burst function.
1085 mlx5_select_tx_function(struct rte_eth_dev *dev)
1087 struct priv *priv = dev->data->dev_private;
1088 eth_tx_burst_t tx_pkt_burst = mlx5_tx_burst;
1089 struct mlx5_dev_config *config = &priv->config;
1090 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads;
1091 int tso = !!(tx_offloads & (DEV_TX_OFFLOAD_TCP_TSO |
1092 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
1093 DEV_TX_OFFLOAD_GRE_TNL_TSO));
1094 int vlan_insert = !!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT);
1096 assert(priv != NULL);
1097 /* Select appropriate TX function. */
1098 if (vlan_insert || tso)
1099 return tx_pkt_burst;
1100 if (config->mps == MLX5_MPW_ENHANCED) {
1101 if (mlx5_check_vec_tx_support(dev) > 0) {
1102 if (mlx5_check_raw_vec_tx_support(dev) > 0)
1103 tx_pkt_burst = mlx5_tx_burst_raw_vec;
1105 tx_pkt_burst = mlx5_tx_burst_vec;
1107 "port %u selected enhanced MPW Tx vectorized"
1109 dev->data->port_id);
1111 tx_pkt_burst = mlx5_tx_burst_empw;
1113 "port %u selected enhanced MPW Tx function",
1114 dev->data->port_id);
1116 } else if (config->mps && (config->txq_inline > 0)) {
1117 tx_pkt_burst = mlx5_tx_burst_mpw_inline;
1118 DRV_LOG(DEBUG, "port %u selected MPW inline Tx function",
1119 dev->data->port_id);
1120 } else if (config->mps) {
1121 tx_pkt_burst = mlx5_tx_burst_mpw;
1122 DRV_LOG(DEBUG, "port %u selected MPW Tx function",
1123 dev->data->port_id);
1125 return tx_pkt_burst;
1129 * Configure the RX function to use.
1132 * Pointer to private data structure.
1135 * Pointer to selected Rx burst function.
1138 mlx5_select_rx_function(struct rte_eth_dev *dev)
1140 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
1142 assert(dev != NULL);
1143 if (mlx5_check_vec_rx_support(dev) > 0) {
1144 rx_pkt_burst = mlx5_rx_burst_vec;
1145 DRV_LOG(DEBUG, "port %u selected Rx vectorized function",
1146 dev->data->port_id);
1148 return rx_pkt_burst;
1152 * Check if mlx5 device was removed.
1155 * Pointer to Ethernet device structure.
1158 * 1 when device is removed, otherwise 0.
1161 mlx5_is_removed(struct rte_eth_dev *dev)
1163 struct ibv_device_attr device_attr;
1164 struct priv *priv = dev->data->dev_private;
1166 if (mlx5_glue->query_device(priv->ctx, &device_attr) == EIO)