1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
19 #include <sys/ioctl.h>
20 #include <sys/socket.h>
21 #include <netinet/in.h>
22 #include <linux/ethtool.h>
23 #include <linux/sockios.h>
29 #include <rte_atomic.h>
30 #include <rte_ethdev_driver.h>
31 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_interrupts.h>
35 #include <rte_malloc.h>
36 #include <rte_string_fns.h>
39 #include "mlx5_glue.h"
40 #include "mlx5_rxtx.h"
41 #include "mlx5_utils.h"
43 /* Add defines in case the running kernel is not the same as user headers. */
44 #ifndef ETHTOOL_GLINKSETTINGS
45 struct ethtool_link_settings {
54 uint8_t eth_tp_mdix_ctrl;
55 int8_t link_mode_masks_nwords;
57 uint32_t link_mode_masks[];
60 #define ETHTOOL_GLINKSETTINGS 0x0000004c
61 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5
62 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6
63 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17
64 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18
65 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19
66 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20
67 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21
68 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22
69 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23
70 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24
71 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25
72 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26
73 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27
74 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28
75 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29
76 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30
78 #ifndef HAVE_ETHTOOL_LINK_MODE_25G
79 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31
80 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32
81 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33
83 #ifndef HAVE_ETHTOOL_LINK_MODE_50G
84 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34
85 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35
87 #ifndef HAVE_ETHTOOL_LINK_MODE_100G
88 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36
89 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37
90 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38
91 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39
95 * Get interface name from private structure.
98 * Pointer to Ethernet device.
100 * Interface name output buffer.
103 * 0 on success, a negative errno value otherwise and rte_errno is set.
106 mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE])
108 struct priv *priv = dev->data->dev_private;
111 unsigned int dev_type = 0;
112 unsigned int dev_port_prev = ~0u;
113 char match[IF_NAMESIZE] = "";
116 MKSTR(path, "%s/device/net", priv->ibdev_path);
124 while ((dent = readdir(dir)) != NULL) {
125 char *name = dent->d_name;
127 unsigned int dev_port;
130 if ((name[0] == '.') &&
131 ((name[1] == '\0') ||
132 ((name[1] == '.') && (name[2] == '\0'))))
135 MKSTR(path, "%s/device/net/%s/%s",
136 priv->ibdev_path, name,
137 (dev_type ? "dev_id" : "dev_port"));
139 file = fopen(path, "rb");
144 * Switch to dev_id when dev_port does not exist as
145 * is the case with Linux kernel versions < 3.15.
156 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
161 * Switch to dev_id when dev_port returns the same value for
162 * all ports. May happen when using a MOFED release older than
163 * 3.0 with a Linux kernel >= 3.15.
165 if (dev_port == dev_port_prev)
167 dev_port_prev = dev_port;
168 if (dev_port == (priv->port - 1u))
169 strlcpy(match, name, sizeof(match));
172 if (match[0] == '\0') {
176 strncpy(*ifname, match, sizeof(*ifname));
181 * Get the interface index from device name.
184 * Pointer to Ethernet device.
187 * Interface index on success, a negative errno value otherwise and
191 mlx5_ifindex(const struct rte_eth_dev *dev)
193 char ifname[IF_NAMESIZE];
196 ret = mlx5_get_ifname(dev, &ifname);
199 ret = if_nametoindex(ifname);
208 * Perform ifreq ioctl() on associated Ethernet device.
211 * Pointer to Ethernet device.
213 * Request number to pass to ioctl().
215 * Interface request structure output buffer.
218 * 0 on success, a negative errno value otherwise and rte_errno is set.
221 mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr)
223 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
230 ret = mlx5_get_ifname(dev, &ifr->ifr_name);
233 ret = ioctl(sock, req, ifr);
249 * Pointer to Ethernet device.
251 * MTU value output buffer.
254 * 0 on success, a negative errno value otherwise and rte_errno is set.
257 mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu)
259 struct ifreq request;
260 int ret = mlx5_ifreq(dev, SIOCGIFMTU, &request);
264 *mtu = request.ifr_mtu;
272 * Pointer to Ethernet device.
277 * 0 on success, a negative errno value otherwise and rte_errno is set.
280 mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
282 struct ifreq request = { .ifr_mtu = mtu, };
284 return mlx5_ifreq(dev, SIOCSIFMTU, &request);
291 * Pointer to Ethernet device.
293 * Bitmask for flags that must remain untouched.
295 * Bitmask for flags to modify.
298 * 0 on success, a negative errno value otherwise and rte_errno is set.
301 mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags)
303 struct ifreq request;
304 int ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &request);
308 request.ifr_flags &= keep;
309 request.ifr_flags |= flags & ~keep;
310 return mlx5_ifreq(dev, SIOCSIFFLAGS, &request);
314 * DPDK callback for Ethernet device configuration.
317 * Pointer to Ethernet device structure.
320 * 0 on success, a negative errno value otherwise and rte_errno is set.
323 mlx5_dev_configure(struct rte_eth_dev *dev)
325 struct priv *priv = dev->data->dev_private;
326 unsigned int rxqs_n = dev->data->nb_rx_queues;
327 unsigned int txqs_n = dev->data->nb_tx_queues;
330 unsigned int reta_idx_n;
331 const uint8_t use_app_rss_key =
332 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
333 uint64_t supp_tx_offloads = mlx5_get_tx_port_offloads(dev);
334 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads;
335 uint64_t supp_rx_offloads =
336 (mlx5_get_rx_port_offloads() |
337 mlx5_get_rx_queue_offloads(dev));
338 uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
341 if ((tx_offloads & supp_tx_offloads) != tx_offloads) {
343 "port %u some Tx offloads are not supported requested"
344 " 0x%" PRIx64 " supported 0x%" PRIx64,
345 dev->data->port_id, tx_offloads, supp_tx_offloads);
349 if ((rx_offloads & supp_rx_offloads) != rx_offloads) {
351 "port %u some Rx offloads are not supported requested"
352 " 0x%" PRIx64 " supported 0x%" PRIx64,
353 dev->data->port_id, rx_offloads, supp_rx_offloads);
357 if (use_app_rss_key &&
358 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
359 rss_hash_default_key_len)) {
360 DRV_LOG(ERR, "port %u RSS key len must be %zu Bytes long",
361 dev->data->port_id, rss_hash_default_key_len);
365 priv->rss_conf.rss_key =
366 rte_realloc(priv->rss_conf.rss_key,
367 rss_hash_default_key_len, 0);
368 if (!priv->rss_conf.rss_key) {
369 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)",
370 dev->data->port_id, rxqs_n);
374 memcpy(priv->rss_conf.rss_key,
376 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
377 rss_hash_default_key,
378 rss_hash_default_key_len);
379 priv->rss_conf.rss_key_len = rss_hash_default_key_len;
380 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
381 priv->rxqs = (void *)dev->data->rx_queues;
382 priv->txqs = (void *)dev->data->tx_queues;
383 if (txqs_n != priv->txqs_n) {
384 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u",
385 dev->data->port_id, priv->txqs_n, txqs_n);
386 priv->txqs_n = txqs_n;
388 if (rxqs_n > priv->config.ind_table_max_size) {
389 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
390 dev->data->port_id, rxqs_n);
394 if (rxqs_n == priv->rxqs_n)
396 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
397 dev->data->port_id, priv->rxqs_n, rxqs_n);
398 priv->rxqs_n = rxqs_n;
399 /* If the requested number of RX queues is not a power of two, use the
400 * maximum indirection table size for better balancing.
401 * The result is always rounded to the next power of two. */
402 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
403 priv->config.ind_table_max_size :
405 ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
408 /* When the number of RX queues is not a power of two, the remaining
409 * table entries are padded with reused WQs and hashes are not spread
411 for (i = 0, j = 0; (i != reta_idx_n); ++i) {
412 (*priv->reta_idx)[i] = j;
420 * Sets default tuning parameters.
423 * Pointer to Ethernet device.
425 * Info structure output buffer.
428 mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
430 struct priv *priv = dev->data->dev_private;
432 /* Minimum CPU utilization. */
433 info->default_rxportconf.ring_size = 256;
434 info->default_txportconf.ring_size = 256;
435 info->default_rxportconf.burst_size = 64;
436 info->default_txportconf.burst_size = 64;
437 if (priv->link_speed_capa & ETH_LINK_SPEED_100G) {
438 info->default_rxportconf.nb_queues = 16;
439 info->default_txportconf.nb_queues = 16;
440 if (dev->data->nb_rx_queues > 2 ||
441 dev->data->nb_tx_queues > 2) {
442 /* Max Throughput. */
443 info->default_rxportconf.ring_size = 2048;
444 info->default_txportconf.ring_size = 2048;
447 info->default_rxportconf.nb_queues = 8;
448 info->default_txportconf.nb_queues = 8;
449 if (dev->data->nb_rx_queues > 2 ||
450 dev->data->nb_tx_queues > 2) {
451 /* Max Throughput. */
452 info->default_rxportconf.ring_size = 4096;
453 info->default_txportconf.ring_size = 4096;
459 * DPDK callback to get information about the device.
462 * Pointer to Ethernet device structure.
464 * Info structure output buffer.
467 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
469 struct priv *priv = dev->data->dev_private;
470 struct mlx5_dev_config *config = &priv->config;
472 char ifname[IF_NAMESIZE];
474 /* FIXME: we should ask the device for these values. */
475 info->min_rx_bufsize = 32;
476 info->max_rx_pktlen = 65536;
478 * Since we need one CQ per QP, the limit is the minimum number
479 * between the two values.
481 max = RTE_MIN(priv->device_attr.orig_attr.max_cq,
482 priv->device_attr.orig_attr.max_qp);
483 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
486 info->max_rx_queues = max;
487 info->max_tx_queues = max;
488 info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
489 info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
490 info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
491 info->rx_queue_offload_capa);
492 info->tx_offload_capa = mlx5_get_tx_port_offloads(dev);
493 if (mlx5_get_ifname(dev, &ifname) == 0)
494 info->if_index = if_nametoindex(ifname);
495 info->reta_size = priv->reta_idx_n ?
496 priv->reta_idx_n : config->ind_table_max_size;
497 info->hash_key_size = rss_hash_default_key_len;
498 info->speed_capa = priv->link_speed_capa;
499 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
500 mlx5_set_default_params(dev, info);
504 * Get supported packet types.
507 * Pointer to Ethernet device structure.
510 * A pointer to the supported Packet types array.
513 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
515 static const uint32_t ptypes[] = {
516 /* refers to rxq_cq_to_pkt_type() */
518 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
519 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
520 RTE_PTYPE_L4_NONFRAG,
524 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
525 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
526 RTE_PTYPE_INNER_L4_NONFRAG,
527 RTE_PTYPE_INNER_L4_FRAG,
528 RTE_PTYPE_INNER_L4_TCP,
529 RTE_PTYPE_INNER_L4_UDP,
533 if (dev->rx_pkt_burst == mlx5_rx_burst ||
534 dev->rx_pkt_burst == mlx5_rx_burst_vec)
540 * DPDK callback to retrieve physical link information.
543 * Pointer to Ethernet device structure.
545 * Storage for current link status.
548 * 0 on success, a negative errno value otherwise and rte_errno is set.
551 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev,
552 struct rte_eth_link *link)
554 struct priv *priv = dev->data->dev_private;
555 struct ethtool_cmd edata = {
556 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */
559 struct rte_eth_link dev_link;
563 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
565 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
566 dev->data->port_id, strerror(rte_errno));
569 memset(&dev_link, 0, sizeof(dev_link));
570 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
571 (ifr.ifr_flags & IFF_RUNNING));
572 ifr.ifr_data = (void *)&edata;
573 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
576 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
577 dev->data->port_id, strerror(rte_errno));
580 link_speed = ethtool_cmd_speed(&edata);
581 if (link_speed == -1)
582 dev_link.link_speed = ETH_SPEED_NUM_NONE;
584 dev_link.link_speed = link_speed;
585 priv->link_speed_capa = 0;
586 if (edata.supported & SUPPORTED_Autoneg)
587 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
588 if (edata.supported & (SUPPORTED_1000baseT_Full |
589 SUPPORTED_1000baseKX_Full))
590 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
591 if (edata.supported & SUPPORTED_10000baseKR_Full)
592 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
593 if (edata.supported & (SUPPORTED_40000baseKR4_Full |
594 SUPPORTED_40000baseCR4_Full |
595 SUPPORTED_40000baseSR4_Full |
596 SUPPORTED_40000baseLR4_Full))
597 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
598 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
599 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
600 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
601 ETH_LINK_SPEED_FIXED);
602 if ((dev_link.link_speed && !dev_link.link_status) ||
603 (!dev_link.link_speed && dev_link.link_status)) {
612 * Retrieve physical link information (unlocked version using new ioctl).
615 * Pointer to Ethernet device structure.
617 * Storage for current link status.
620 * 0 on success, a negative errno value otherwise and rte_errno is set.
623 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev,
624 struct rte_eth_link *link)
627 struct priv *priv = dev->data->dev_private;
628 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS };
630 struct rte_eth_link dev_link;
634 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
636 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
637 dev->data->port_id, strerror(rte_errno));
640 memset(&dev_link, 0, sizeof(dev_link));
641 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
642 (ifr.ifr_flags & IFF_RUNNING));
643 ifr.ifr_data = (void *)&gcmd;
644 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
647 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
649 dev->data->port_id, strerror(rte_errno));
652 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords;
654 alignas(struct ethtool_link_settings)
655 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) +
656 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3];
657 struct ethtool_link_settings *ecmd = (void *)data;
660 ifr.ifr_data = (void *)ecmd;
661 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
664 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
666 dev->data->port_id, strerror(rte_errno));
669 dev_link.link_speed = ecmd->speed;
670 sc = ecmd->link_mode_masks[0] |
671 ((uint64_t)ecmd->link_mode_masks[1] << 32);
672 priv->link_speed_capa = 0;
673 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT))
674 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
675 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) |
676 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT)))
677 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
678 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) |
679 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) |
680 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT)))
681 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
682 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) |
683 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT)))
684 priv->link_speed_capa |= ETH_LINK_SPEED_20G;
685 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) |
686 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) |
687 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) |
688 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT)))
689 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
690 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) |
691 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) |
692 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) |
693 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT)))
694 priv->link_speed_capa |= ETH_LINK_SPEED_56G;
695 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) |
696 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) |
697 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT)))
698 priv->link_speed_capa |= ETH_LINK_SPEED_25G;
699 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) |
700 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT)))
701 priv->link_speed_capa |= ETH_LINK_SPEED_50G;
702 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) |
703 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) |
704 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) |
705 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT)))
706 priv->link_speed_capa |= ETH_LINK_SPEED_100G;
707 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ?
708 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
709 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
710 ETH_LINK_SPEED_FIXED);
711 if ((dev_link.link_speed && !dev_link.link_status) ||
712 (!dev_link.link_speed && dev_link.link_status)) {
721 * DPDK callback to retrieve physical link information.
724 * Pointer to Ethernet device structure.
725 * @param wait_to_complete
726 * Wait for request completion.
729 * 0 if link status was not updated, positive if it was, a negative errno
730 * value otherwise and rte_errno is set.
733 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete)
736 struct rte_eth_link dev_link;
737 time_t start_time = time(NULL);
740 ret = mlx5_link_update_unlocked_gs(dev, &dev_link);
742 ret = mlx5_link_update_unlocked_gset(dev, &dev_link);
745 /* Handle wait to complete situation. */
746 if (wait_to_complete && ret == -EAGAIN) {
747 if (abs((int)difftime(time(NULL), start_time)) <
748 MLX5_LINK_STATUS_TIMEOUT) {
755 } else if (ret < 0) {
758 } while (wait_to_complete);
759 ret = !!memcmp(&dev->data->dev_link, &dev_link,
760 sizeof(struct rte_eth_link));
761 dev->data->dev_link = dev_link;
766 * DPDK callback to change the MTU.
769 * Pointer to Ethernet device structure.
774 * 0 on success, a negative errno value otherwise and rte_errno is set.
777 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
779 struct priv *priv = dev->data->dev_private;
780 uint16_t kern_mtu = 0;
783 ret = mlx5_get_mtu(dev, &kern_mtu);
786 /* Set kernel interface MTU first. */
787 ret = mlx5_set_mtu(dev, mtu);
790 ret = mlx5_get_mtu(dev, &kern_mtu);
793 if (kern_mtu == mtu) {
795 DRV_LOG(DEBUG, "port %u adapter MTU set to %u",
796 dev->data->port_id, mtu);
804 * DPDK callback to get flow control status.
807 * Pointer to Ethernet device structure.
808 * @param[out] fc_conf
809 * Flow control output buffer.
812 * 0 on success, a negative errno value otherwise and rte_errno is set.
815 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
818 struct ethtool_pauseparam ethpause = {
819 .cmd = ETHTOOL_GPAUSEPARAM
823 ifr.ifr_data = (void *)ðpause;
824 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
827 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM) failed:"
829 dev->data->port_id, strerror(rte_errno));
832 fc_conf->autoneg = ethpause.autoneg;
833 if (ethpause.rx_pause && ethpause.tx_pause)
834 fc_conf->mode = RTE_FC_FULL;
835 else if (ethpause.rx_pause)
836 fc_conf->mode = RTE_FC_RX_PAUSE;
837 else if (ethpause.tx_pause)
838 fc_conf->mode = RTE_FC_TX_PAUSE;
840 fc_conf->mode = RTE_FC_NONE;
845 * DPDK callback to modify flow control parameters.
848 * Pointer to Ethernet device structure.
850 * Flow control parameters.
853 * 0 on success, a negative errno value otherwise and rte_errno is set.
856 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
859 struct ethtool_pauseparam ethpause = {
860 .cmd = ETHTOOL_SPAUSEPARAM
864 ifr.ifr_data = (void *)ðpause;
865 ethpause.autoneg = fc_conf->autoneg;
866 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
867 (fc_conf->mode & RTE_FC_RX_PAUSE))
868 ethpause.rx_pause = 1;
870 ethpause.rx_pause = 0;
872 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
873 (fc_conf->mode & RTE_FC_TX_PAUSE))
874 ethpause.tx_pause = 1;
876 ethpause.tx_pause = 0;
877 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
880 "port %u ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
882 dev->data->port_id, strerror(rte_errno));
889 * Get PCI information from struct ibv_device.
892 * Pointer to Ethernet device structure.
893 * @param[out] pci_addr
894 * PCI bus address output buffer.
897 * 0 on success, a negative errno value otherwise and rte_errno is set.
900 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device,
901 struct rte_pci_addr *pci_addr)
905 MKSTR(path, "%s/device/uevent", device->ibdev_path);
907 file = fopen(path, "rb");
912 while (fgets(line, sizeof(line), file) == line) {
913 size_t len = strlen(line);
916 /* Truncate long lines. */
917 if (len == (sizeof(line) - 1))
918 while (line[(len - 1)] != '\n') {
922 line[(len - 1)] = ret;
924 /* Extract information. */
927 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
931 &pci_addr->function) == 4) {
941 * Device status handler.
944 * Pointer to Ethernet device.
946 * Pointer to event flags holder.
949 * Events bitmap of callback process which can be called immediately.
952 mlx5_dev_status_handler(struct rte_eth_dev *dev)
954 struct priv *priv = dev->data->dev_private;
955 struct ibv_async_event event;
958 if (mlx5_link_update(dev, 0) == -EAGAIN) {
962 /* Read all message and acknowledge them. */
964 if (mlx5_glue->get_async_event(priv->ctx, &event))
966 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
967 event.event_type == IBV_EVENT_PORT_ERR) &&
968 (dev->data->dev_conf.intr_conf.lsc == 1))
969 ret |= (1 << RTE_ETH_EVENT_INTR_LSC);
970 else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
971 dev->data->dev_conf.intr_conf.rmv == 1)
972 ret |= (1 << RTE_ETH_EVENT_INTR_RMV);
975 "port %u event type %d on not handled",
976 dev->data->port_id, event.event_type);
977 mlx5_glue->ack_async_event(&event);
983 * Handle interrupts from the NIC.
985 * @param[in] intr_handle
991 mlx5_dev_interrupt_handler(void *cb_arg)
993 struct rte_eth_dev *dev = cb_arg;
996 events = mlx5_dev_status_handler(dev);
997 if (events & (1 << RTE_ETH_EVENT_INTR_LSC))
998 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
999 if (events & (1 << RTE_ETH_EVENT_INTR_RMV))
1000 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL);
1004 * Handle interrupts from the socket.
1007 * Callback argument.
1010 mlx5_dev_handler_socket(void *cb_arg)
1012 struct rte_eth_dev *dev = cb_arg;
1014 mlx5_socket_handle(dev);
1018 * Uninstall interrupt handler.
1021 * Pointer to Ethernet device.
1024 mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev)
1026 struct priv *priv = dev->data->dev_private;
1028 if (dev->data->dev_conf.intr_conf.lsc ||
1029 dev->data->dev_conf.intr_conf.rmv)
1030 rte_intr_callback_unregister(&priv->intr_handle,
1031 mlx5_dev_interrupt_handler, dev);
1032 if (priv->primary_socket)
1033 rte_intr_callback_unregister(&priv->intr_handle_socket,
1034 mlx5_dev_handler_socket, dev);
1035 priv->intr_handle.fd = 0;
1036 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
1037 priv->intr_handle_socket.fd = 0;
1038 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN;
1042 * Install interrupt handler.
1045 * Pointer to Ethernet device.
1048 mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev)
1050 struct priv *priv = dev->data->dev_private;
1054 assert(priv->ctx->async_fd > 0);
1055 flags = fcntl(priv->ctx->async_fd, F_GETFL);
1056 ret = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
1059 "port %u failed to change file descriptor async event"
1061 dev->data->port_id);
1062 dev->data->dev_conf.intr_conf.lsc = 0;
1063 dev->data->dev_conf.intr_conf.rmv = 0;
1065 if (dev->data->dev_conf.intr_conf.lsc ||
1066 dev->data->dev_conf.intr_conf.rmv) {
1067 priv->intr_handle.fd = priv->ctx->async_fd;
1068 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
1069 rte_intr_callback_register(&priv->intr_handle,
1070 mlx5_dev_interrupt_handler, dev);
1072 ret = mlx5_socket_init(dev);
1074 DRV_LOG(ERR, "port %u cannot initialise socket: %s",
1075 dev->data->port_id, strerror(rte_errno));
1076 else if (priv->primary_socket) {
1077 priv->intr_handle_socket.fd = priv->primary_socket;
1078 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT;
1079 rte_intr_callback_register(&priv->intr_handle_socket,
1080 mlx5_dev_handler_socket, dev);
1085 * DPDK callback to bring the link DOWN.
1088 * Pointer to Ethernet device structure.
1091 * 0 on success, a negative errno value otherwise and rte_errno is set.
1094 mlx5_set_link_down(struct rte_eth_dev *dev)
1096 return mlx5_set_flags(dev, ~IFF_UP, ~IFF_UP);
1100 * DPDK callback to bring the link UP.
1103 * Pointer to Ethernet device structure.
1106 * 0 on success, a negative errno value otherwise and rte_errno is set.
1109 mlx5_set_link_up(struct rte_eth_dev *dev)
1111 return mlx5_set_flags(dev, ~IFF_UP, IFF_UP);
1115 * Configure the TX function to use.
1118 * Pointer to private data structure.
1121 * Pointer to selected Tx burst function.
1124 mlx5_select_tx_function(struct rte_eth_dev *dev)
1126 struct priv *priv = dev->data->dev_private;
1127 eth_tx_burst_t tx_pkt_burst = mlx5_tx_burst;
1128 struct mlx5_dev_config *config = &priv->config;
1129 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads;
1130 int tso = !!(tx_offloads & (DEV_TX_OFFLOAD_TCP_TSO |
1131 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
1132 DEV_TX_OFFLOAD_GRE_TNL_TSO |
1133 DEV_TX_OFFLOAD_IP_TNL_TSO |
1134 DEV_TX_OFFLOAD_UDP_TNL_TSO));
1135 int swp = !!(tx_offloads & (DEV_TX_OFFLOAD_IP_TNL_TSO |
1136 DEV_TX_OFFLOAD_UDP_TNL_TSO |
1137 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM));
1138 int vlan_insert = !!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT);
1140 assert(priv != NULL);
1141 /* Select appropriate TX function. */
1142 if (vlan_insert || tso || swp)
1143 return tx_pkt_burst;
1144 if (config->mps == MLX5_MPW_ENHANCED) {
1145 if (mlx5_check_vec_tx_support(dev) > 0) {
1146 if (mlx5_check_raw_vec_tx_support(dev) > 0)
1147 tx_pkt_burst = mlx5_tx_burst_raw_vec;
1149 tx_pkt_burst = mlx5_tx_burst_vec;
1151 "port %u selected enhanced MPW Tx vectorized"
1153 dev->data->port_id);
1155 tx_pkt_burst = mlx5_tx_burst_empw;
1157 "port %u selected enhanced MPW Tx function",
1158 dev->data->port_id);
1160 } else if (config->mps && (config->txq_inline > 0)) {
1161 tx_pkt_burst = mlx5_tx_burst_mpw_inline;
1162 DRV_LOG(DEBUG, "port %u selected MPW inline Tx function",
1163 dev->data->port_id);
1164 } else if (config->mps) {
1165 tx_pkt_burst = mlx5_tx_burst_mpw;
1166 DRV_LOG(DEBUG, "port %u selected MPW Tx function",
1167 dev->data->port_id);
1169 return tx_pkt_burst;
1173 * Configure the RX function to use.
1176 * Pointer to private data structure.
1179 * Pointer to selected Rx burst function.
1182 mlx5_select_rx_function(struct rte_eth_dev *dev)
1184 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
1186 assert(dev != NULL);
1187 if (mlx5_check_vec_rx_support(dev) > 0) {
1188 rx_pkt_burst = mlx5_rx_burst_vec;
1189 DRV_LOG(DEBUG, "port %u selected Rx vectorized function",
1190 dev->data->port_id);
1192 return rx_pkt_burst;
1196 * Check if mlx5 device was removed.
1199 * Pointer to Ethernet device structure.
1202 * 1 when device is removed, otherwise 0.
1205 mlx5_is_removed(struct rte_eth_dev *dev)
1207 struct ibv_device_attr device_attr;
1208 struct priv *priv = dev->data->dev_private;
1210 if (mlx5_glue->query_device(priv->ctx, &device_attr) == EIO)