drivers/net/mlx5/mlx5_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12
  13 #include <ethdev_driver.h>
  14 #include <rte_bus_pci.h>
  15 #include <rte_mbuf.h>
  16 #include <rte_common.h>
  17 #include <rte_interrupts.h>
  18 #include <rte_malloc.h>
  19 #include <rte_string_fns.h>
  20 #include <rte_rwlock.h>
  21 #include <rte_cycles.h>
  22
  23 #include <mlx5_malloc.h>
  24
  25 #include "mlx5_rxtx.h"
  26 #include "mlx5_rx.h"
  27 #include "mlx5_tx.h"
  28 #include "mlx5_autoconf.h"
  29 #include "mlx5_devx.h"
  30
  31 /**
  32  * Get the interface index from device name.
  33  *
  34  * @param[in] dev
  35  *   Pointer to Ethernet device.
  36  *
  37  * @return
  38  *   Nonzero interface index on success, zero otherwise and rte_errno is set.
  39  */
  40 unsigned int
  41 mlx5_ifindex(const struct rte_eth_dev *dev)
  42 {
  43         struct mlx5_priv *priv = dev->data->dev_private;
  44         unsigned int ifindex;
  45
  46         MLX5_ASSERT(priv);
  47         MLX5_ASSERT(priv->if_index);
  48         if (priv->master && priv->sh->bond.ifindex > 0)
  49                 ifindex = priv->sh->bond.ifindex;
  50         else
  51                 ifindex = priv->if_index;
  52         if (!ifindex)
  53                 rte_errno = ENXIO;
  54         return ifindex;
  55 }
  56
  57 /**
  58  * DPDK callback for Ethernet device configuration.
  59  *
  60  * @param dev
  61  *   Pointer to Ethernet device structure.
  62  *
  63  * @return
  64  *   0 on success, a negative errno value otherwise and rte_errno is set.
  65  */
  66 int
  67 mlx5_dev_configure(struct rte_eth_dev *dev)
  68 {
  69         struct mlx5_priv *priv = dev->data->dev_private;
  70         unsigned int rxqs_n = dev->data->nb_rx_queues;
  71         unsigned int txqs_n = dev->data->nb_tx_queues;
  72         const uint8_t use_app_rss_key =
  73                 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
  74         int ret = 0;
  75
  76         if (use_app_rss_key &&
  77             (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
  78              MLX5_RSS_HASH_KEY_LEN)) {
  79                 DRV_LOG(ERR, "port %u RSS key len must be %s Bytes long",
  80                         dev->data->port_id, RTE_STR(MLX5_RSS_HASH_KEY_LEN));
  81                 rte_errno = EINVAL;
  82                 return -rte_errno;
  83         }
  84         priv->rss_conf.rss_key =
  85                 mlx5_realloc(priv->rss_conf.rss_key, MLX5_MEM_RTE,
  86                             MLX5_RSS_HASH_KEY_LEN, 0, SOCKET_ID_ANY);
  87         if (!priv->rss_conf.rss_key) {
  88                 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)",
  89                         dev->data->port_id, rxqs_n);
  90                 rte_errno = ENOMEM;
  91                 return -rte_errno;
  92         }
  93
  94         if ((dev->data->dev_conf.txmode.offloads &
  95                         RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP) &&
  96                         rte_mbuf_dyn_tx_timestamp_register(NULL, NULL) != 0) {
  97                 DRV_LOG(ERR, "port %u cannot register Tx timestamp field/flag",
  98                         dev->data->port_id);
  99                 return -rte_errno;
 100         }
 101         memcpy(priv->rss_conf.rss_key,
 102                use_app_rss_key ?
 103                dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
 104                rss_hash_default_key,
 105                MLX5_RSS_HASH_KEY_LEN);
 106         priv->rss_conf.rss_key_len = MLX5_RSS_HASH_KEY_LEN;
 107         priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
 108         priv->rxq_privs = mlx5_realloc(priv->rxq_privs,
 109                                        MLX5_MEM_RTE | MLX5_MEM_ZERO,
 110                                        sizeof(void *) * rxqs_n, 0,
 111                                        SOCKET_ID_ANY);
 112         if (priv->rxq_privs == NULL) {
 113                 DRV_LOG(ERR, "port %u cannot allocate rxq private data",
 114                         dev->data->port_id);
 115                 rte_errno = ENOMEM;
 116                 return -rte_errno;
 117         }
 118         priv->txqs = (void *)dev->data->tx_queues;
 119         if (txqs_n != priv->txqs_n) {
 120                 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u",
 121                         dev->data->port_id, priv->txqs_n, txqs_n);
 122                 priv->txqs_n = txqs_n;
 123         }
 124         if (rxqs_n > priv->sh->dev_cap.ind_table_max_size) {
 125                 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
 126                         dev->data->port_id, rxqs_n);
 127                 rte_errno = EINVAL;
 128                 return -rte_errno;
 129         }
 130         if (rxqs_n != priv->rxqs_n) {
 131                 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
 132                         dev->data->port_id, priv->rxqs_n, rxqs_n);
 133                 priv->rxqs_n = rxqs_n;
 134         }
 135         priv->skip_default_rss_reta = 0;
 136         ret = mlx5_proc_priv_init(dev);
 137         if (ret)
 138                 return ret;
 139         return 0;
 140 }
 141
 142 /**
 143  * Configure default RSS reta.
 144  *
 145  * @param dev
 146  *   Pointer to Ethernet device structure.
 147  *
 148  * @return
 149  *   0 on success, a negative errno value otherwise and rte_errno is set.
 150  */
 151 int
 152 mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev)
 153 {
 154         struct mlx5_priv *priv = dev->data->dev_private;
 155         unsigned int rxqs_n = dev->data->nb_rx_queues;
 156         unsigned int i;
 157         unsigned int j;
 158         unsigned int reta_idx_n;
 159         int ret = 0;
 160         unsigned int *rss_queue_arr = NULL;
 161         unsigned int rss_queue_n = 0;
 162
 163         if (priv->skip_default_rss_reta)
 164                 return ret;
 165         rss_queue_arr = mlx5_malloc(0, rxqs_n * sizeof(unsigned int), 0,
 166                                     SOCKET_ID_ANY);
 167         if (!rss_queue_arr) {
 168                 DRV_LOG(ERR, "port %u cannot allocate RSS queue list (%u)",
 169                         dev->data->port_id, rxqs_n);
 170                 rte_errno = ENOMEM;
 171                 return -rte_errno;
 172         }
 173         for (i = 0, j = 0; i < rxqs_n; i++) {
 174                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
 175
 176                 if (rxq_ctrl && !rxq_ctrl->is_hairpin)
 177                         rss_queue_arr[j++] = i;
 178         }
 179         rss_queue_n = j;
 180         if (rss_queue_n > priv->sh->dev_cap.ind_table_max_size) {
 181                 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
 182                         dev->data->port_id, rss_queue_n);
 183                 rte_errno = EINVAL;
 184                 mlx5_free(rss_queue_arr);
 185                 return -rte_errno;
 186         }
 187         DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
 188                 dev->data->port_id, priv->rxqs_n, rxqs_n);
 189         priv->rxqs_n = rxqs_n;
 190         /*
 191          * If the requested number of RX queues is not a power of two,
 192          * use the maximum indirection table size for better balancing.
 193          * The result is always rounded to the next power of two.
 194          */
 195         reta_idx_n = (1 << log2above((rss_queue_n & (rss_queue_n - 1)) ?
 196                                      priv->sh->dev_cap.ind_table_max_size :
 197                                      rss_queue_n));
 198         ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
 199         if (ret) {
 200                 mlx5_free(rss_queue_arr);
 201                 return ret;
 202         }
 203         /*
 204          * When the number of RX queues is not a power of two,
 205          * the remaining table entries are padded with reused WQs
 206          * and hashes are not spread uniformly.
 207          */
 208         for (i = 0, j = 0; (i != reta_idx_n); ++i) {
 209                 (*priv->reta_idx)[i] = rss_queue_arr[j];
 210                 if (++j == rss_queue_n)
 211                         j = 0;
 212         }
 213         mlx5_free(rss_queue_arr);
 214         return ret;
 215 }
 216
 217 /**
 218  * Sets default tuning parameters.
 219  *
 220  * @param dev
 221  *   Pointer to Ethernet device.
 222  * @param[out] info
 223  *   Info structure output buffer.
 224  */
 225 static void
 226 mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 227 {
 228         struct mlx5_priv *priv = dev->data->dev_private;
 229
 230         /* Minimum CPU utilization. */
 231         info->default_rxportconf.ring_size = 256;
 232         info->default_txportconf.ring_size = 256;
 233         info->default_rxportconf.burst_size = MLX5_RX_DEFAULT_BURST;
 234         info->default_txportconf.burst_size = MLX5_TX_DEFAULT_BURST;
 235         if ((priv->link_speed_capa & RTE_ETH_LINK_SPEED_200G) |
 236                 (priv->link_speed_capa & RTE_ETH_LINK_SPEED_100G)) {
 237                 info->default_rxportconf.nb_queues = 16;
 238                 info->default_txportconf.nb_queues = 16;
 239                 if (dev->data->nb_rx_queues > 2 ||
 240                     dev->data->nb_tx_queues > 2) {
 241                         /* Max Throughput. */
 242                         info->default_rxportconf.ring_size = 2048;
 243                         info->default_txportconf.ring_size = 2048;
 244                 }
 245         } else {
 246                 info->default_rxportconf.nb_queues = 8;
 247                 info->default_txportconf.nb_queues = 8;
 248                 if (dev->data->nb_rx_queues > 2 ||
 249                     dev->data->nb_tx_queues > 2) {
 250                         /* Max Throughput. */
 251                         info->default_rxportconf.ring_size = 4096;
 252                         info->default_txportconf.ring_size = 4096;
 253                 }
 254         }
 255 }
 256
 257 /**
 258  * Sets tx mbuf limiting parameters.
 259  *
 260  * @param dev
 261  *   Pointer to Ethernet device.
 262  * @param[out] info
 263  *   Info structure output buffer.
 264  */
 265 static void
 266 mlx5_set_txlimit_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 267 {
 268         struct mlx5_priv *priv = dev->data->dev_private;
 269         struct mlx5_port_config *config = &priv->config;
 270         unsigned int inlen;
 271         uint16_t nb_max;
 272
 273         inlen = (config->txq_inline_max == MLX5_ARG_UNSET) ?
 274                 MLX5_SEND_DEF_INLINE_LEN :
 275                 (unsigned int)config->txq_inline_max;
 276         MLX5_ASSERT(config->txq_inline_min >= 0);
 277         inlen = RTE_MAX(inlen, (unsigned int)config->txq_inline_min);
 278         inlen = RTE_MIN(inlen, MLX5_WQE_SIZE_MAX +
 279                                MLX5_ESEG_MIN_INLINE_SIZE -
 280                                MLX5_WQE_CSEG_SIZE -
 281                                MLX5_WQE_ESEG_SIZE -
 282                                MLX5_WQE_DSEG_SIZE * 2);
 283         nb_max = (MLX5_WQE_SIZE_MAX +
 284                   MLX5_ESEG_MIN_INLINE_SIZE -
 285                   MLX5_WQE_CSEG_SIZE -
 286                   MLX5_WQE_ESEG_SIZE -
 287                   MLX5_WQE_DSEG_SIZE -
 288                   inlen) / MLX5_WSEG_SIZE;
 289         info->tx_desc_lim.nb_seg_max = nb_max;
 290         info->tx_desc_lim.nb_mtu_seg_max = nb_max;
 291 }
 292
 293 /**
 294  * DPDK callback to get information about the device.
 295  *
 296  * @param dev
 297  *   Pointer to Ethernet device structure.
 298  * @param[out] info
 299  *   Info structure output buffer.
 300  */
 301 int
 302 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 303 {
 304         struct mlx5_priv *priv = dev->data->dev_private;
 305         unsigned int max;
 306
 307         /* FIXME: we should ask the device for these values. */
 308         info->min_rx_bufsize = 32;
 309         info->max_rx_pktlen = 65536;
 310         info->max_lro_pkt_size = MLX5_MAX_LRO_SIZE;
 311         /*
 312          * Since we need one CQ per QP, the limit is the minimum number
 313          * between the two values.
 314          */
 315         max = RTE_MIN(priv->sh->dev_cap.max_cq, priv->sh->dev_cap.max_qp);
 316         /* max_rx_queues is uint16_t. */
 317         max = RTE_MIN(max, (unsigned int)UINT16_MAX);
 318         info->max_rx_queues = max;
 319         info->max_tx_queues = max;
 320         info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
 321         info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
 322         info->rx_seg_capa.max_nseg = MLX5_MAX_RXQ_NSEG;
 323         info->rx_seg_capa.multi_pools = !priv->config.mprq.enabled;
 324         info->rx_seg_capa.offset_allowed = !priv->config.mprq.enabled;
 325         info->rx_seg_capa.offset_align_log2 = 0;
 326         info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
 327                                  info->rx_queue_offload_capa);
 328         info->tx_offload_capa = mlx5_get_tx_port_offloads(dev);
 329         info->dev_capa = RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP;
 330         info->if_index = mlx5_ifindex(dev);
 331         info->reta_size = priv->reta_idx_n ?
 332                 priv->reta_idx_n : priv->sh->dev_cap.ind_table_max_size;
 333         info->hash_key_size = MLX5_RSS_HASH_KEY_LEN;
 334         info->speed_capa = priv->link_speed_capa;
 335         info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
 336         mlx5_set_default_params(dev, info);
 337         mlx5_set_txlimit_params(dev, info);
 338         if (priv->sh->cdev->config.hca_attr.mem_rq_rmp &&
 339             priv->obj_ops.rxq_obj_new == devx_obj_ops.rxq_obj_new)
 340                 info->dev_capa |= RTE_ETH_DEV_CAPA_RXQ_SHARE;
 341         info->switch_info.name = dev->data->name;
 342         info->switch_info.domain_id = priv->domain_id;
 343         info->switch_info.port_id = priv->representor_id;
 344         info->switch_info.rx_domain = 0; /* No sub Rx domains. */
 345         if (priv->representor) {
 346                 uint16_t port_id;
 347
 348                 MLX5_ETH_FOREACH_DEV(port_id, dev->device) {
 349                         struct mlx5_priv *opriv =
 350                                 rte_eth_devices[port_id].data->dev_private;
 351
 352                         if (!opriv ||
 353                             opriv->representor ||
 354                             opriv->sh != priv->sh ||
 355                             opriv->domain_id != priv->domain_id)
 356                                 continue;
 357                         /*
 358                          * Override switch name with that of the master
 359                          * device.
 360                          */
 361                         info->switch_info.name = opriv->dev_data->name;
 362                         break;
 363                 }
 364         }
 365         return 0;
 366 }
 367
 368 /**
 369  * Calculate representor ID from port switch info.
 370  *
 371  * Uint16 representor ID bits definition:
 372  *   pf: 2
 373  *   type: 2
 374  *   vf/sf: 12
 375  *
 376  * @param info
 377  *   Port switch info.
 378  * @param hpf_type
 379  *   Use this type if port is HPF.
 380  *
 381  * @return
 382  *   Encoded representor ID.
 383  */
 384 uint16_t
 385 mlx5_representor_id_encode(const struct mlx5_switch_info *info,
 386                            enum rte_eth_representor_type hpf_type)
 387 {
 388         enum rte_eth_representor_type type = RTE_ETH_REPRESENTOR_VF;
 389         uint16_t repr = info->port_name;
 390
 391         if (info->representor == 0)
 392                 return UINT16_MAX;
 393         if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFSF)
 394                 type = RTE_ETH_REPRESENTOR_SF;
 395         if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFHPF) {
 396                 type = hpf_type;
 397                 repr = UINT16_MAX;
 398         }
 399         return MLX5_REPRESENTOR_ID(info->pf_num, type, repr);
 400 }
 401
 402 /**
 403  * DPDK callback to get information about representor.
 404  *
 405  * Representor ID bits definition:
 406  *   vf/sf: 12
 407  *   type: 2
 408  *   pf: 2
 409  *
 410  * @param dev
 411  *   Pointer to Ethernet device structure.
 412  * @param[out] info
 413  *   Nullable info structure output buffer.
 414  *
 415  * @return
 416  *   negative on error, or the number of representor ranges.
 417  */
 418 int
 419 mlx5_representor_info_get(struct rte_eth_dev *dev,
 420                           struct rte_eth_representor_info *info)
 421 {
 422         struct mlx5_priv *priv = dev->data->dev_private;
 423         int n_type = 4; /* Representor types, VF, HPF@VF, SF and HPF@SF. */
 424         int n_pf = 2; /* Number of PFs. */
 425         int i = 0, pf;
 426         int n_entries;
 427
 428         if (info == NULL)
 429                 goto out;
 430
 431         n_entries = n_type * n_pf;
 432         if ((uint32_t)n_entries > info->nb_ranges_alloc)
 433                 n_entries = info->nb_ranges_alloc;
 434
 435         info->controller = 0;
 436         info->pf = priv->pf_bond >= 0 ? priv->pf_bond : 0;
 437         for (pf = 0; pf < n_pf; ++pf) {
 438                 /* VF range. */
 439                 info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
 440                 info->ranges[i].controller = 0;
 441                 info->ranges[i].pf = pf;
 442                 info->ranges[i].vf = 0;
 443                 info->ranges[i].id_base =
 444                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
 445                 info->ranges[i].id_end =
 446                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 447                 snprintf(info->ranges[i].name,
 448                          sizeof(info->ranges[i].name), "pf%dvf", pf);
 449                 i++;
 450                 if (i == n_entries)
 451                         break;
 452                 /* HPF range of VF type. */
 453                 info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
 454                 info->ranges[i].controller = 0;
 455                 info->ranges[i].pf = pf;
 456                 info->ranges[i].vf = UINT16_MAX;
 457                 info->ranges[i].id_base =
 458                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 459                 info->ranges[i].id_end =
 460                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 461                 snprintf(info->ranges[i].name,
 462                          sizeof(info->ranges[i].name), "pf%dvf", pf);
 463                 i++;
 464                 if (i == n_entries)
 465                         break;
 466                 /* SF range. */
 467                 info->ranges[i].type = RTE_ETH_REPRESENTOR_SF;
 468                 info->ranges[i].controller = 0;
 469                 info->ranges[i].pf = pf;
 470                 info->ranges[i].vf = 0;
 471                 info->ranges[i].id_base =
 472                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
 473                 info->ranges[i].id_end =
 474                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 475                 snprintf(info->ranges[i].name,
 476                          sizeof(info->ranges[i].name), "pf%dsf", pf);
 477                 i++;
 478                 if (i == n_entries)
 479                         break;
 480                 /* HPF range of SF type. */
 481                 info->ranges[i].type = RTE_ETH_REPRESENTOR_SF;
 482                 info->ranges[i].controller = 0;
 483                 info->ranges[i].pf = pf;
 484                 info->ranges[i].vf = UINT16_MAX;
 485                 info->ranges[i].id_base =
 486                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 487                 info->ranges[i].id_end =
 488                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 489                 snprintf(info->ranges[i].name,
 490                          sizeof(info->ranges[i].name), "pf%dsf", pf);
 491                 i++;
 492                 if (i == n_entries)
 493                         break;
 494         }
 495         info->nb_ranges = i;
 496 out:
 497         return n_type * n_pf;
 498 }
 499
 500 /**
 501  * Get firmware version of a device.
 502  *
 503  * @param dev
 504  *   Ethernet device port.
 505  * @param fw_ver
 506  *   String output allocated by caller.
 507  * @param fw_size
 508  *   Size of the output string, including terminating null byte.
 509  *
 510  * @return
 511  *   0 on success, or the size of the non truncated string if too big.
 512  */
 513 int
 514 mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size)
 515 {
 516         struct mlx5_priv *priv = dev->data->dev_private;
 517         struct mlx5_dev_cap *attr = &priv->sh->dev_cap;
 518         size_t size = strnlen(attr->fw_ver, sizeof(attr->fw_ver)) + 1;
 519
 520         if (fw_size < size)
 521                 return size;
 522         if (fw_ver != NULL)
 523                 strlcpy(fw_ver, attr->fw_ver, fw_size);
 524         return 0;
 525 }
 526
 527 /**
 528  * Get supported packet types.
 529  *
 530  * @param dev
 531  *   Pointer to Ethernet device structure.
 532  *
 533  * @return
 534  *   A pointer to the supported Packet types array.
 535  */
 536 const uint32_t *
 537 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 538 {
 539         static const uint32_t ptypes[] = {
 540                 /* refers to rxq_cq_to_pkt_type() */
 541                 RTE_PTYPE_L2_ETHER,
 542                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 543                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 544                 RTE_PTYPE_L4_NONFRAG,
 545                 RTE_PTYPE_L4_FRAG,
 546                 RTE_PTYPE_L4_TCP,
 547                 RTE_PTYPE_L4_UDP,
 548                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
 549                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
 550                 RTE_PTYPE_INNER_L4_NONFRAG,
 551                 RTE_PTYPE_INNER_L4_FRAG,
 552                 RTE_PTYPE_INNER_L4_TCP,
 553                 RTE_PTYPE_INNER_L4_UDP,
 554                 RTE_PTYPE_UNKNOWN
 555         };
 556
 557         if (dev->rx_pkt_burst == mlx5_rx_burst ||
 558             dev->rx_pkt_burst == mlx5_rx_burst_mprq ||
 559             dev->rx_pkt_burst == mlx5_rx_burst_vec ||
 560             dev->rx_pkt_burst == mlx5_rx_burst_mprq_vec)
 561                 return ptypes;
 562         return NULL;
 563 }
 564
 565 /**
 566  * DPDK callback to change the MTU.
 567  *
 568  * @param dev
 569  *   Pointer to Ethernet device structure.
 570  * @param in_mtu
 571  *   New MTU.
 572  *
 573  * @return
 574  *   0 on success, a negative errno value otherwise and rte_errno is set.
 575  */
 576 int
 577 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
 578 {
 579         struct mlx5_priv *priv = dev->data->dev_private;
 580         uint16_t kern_mtu = 0;
 581         int ret;
 582
 583         ret = mlx5_get_mtu(dev, &kern_mtu);
 584         if (ret)
 585                 return ret;
 586         /* Set kernel interface MTU first. */
 587         ret = mlx5_set_mtu(dev, mtu);
 588         if (ret)
 589                 return ret;
 590         ret = mlx5_get_mtu(dev, &kern_mtu);
 591         if (ret)
 592                 return ret;
 593         if (kern_mtu == mtu) {
 594                 priv->mtu = mtu;
 595                 DRV_LOG(DEBUG, "port %u adapter MTU set to %u",
 596                         dev->data->port_id, mtu);
 597                 return 0;
 598         }
 599         rte_errno = EAGAIN;
 600         return -rte_errno;
 601 }
 602
 603 /**
 604  * Configure the RX function to use.
 605  *
 606  * @param dev
 607  *   Pointer to private data structure.
 608  *
 609  * @return
 610  *   Pointer to selected Rx burst function.
 611  */
 612 eth_rx_burst_t
 613 mlx5_select_rx_function(struct rte_eth_dev *dev)
 614 {
 615         eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
 616
 617         MLX5_ASSERT(dev != NULL);
 618         if (mlx5_check_vec_rx_support(dev) > 0) {
 619                 if (mlx5_mprq_enabled(dev)) {
 620                         rx_pkt_burst = mlx5_rx_burst_mprq_vec;
 621                         DRV_LOG(DEBUG, "port %u selected vectorized"
 622                                 " MPRQ Rx function", dev->data->port_id);
 623                 } else {
 624                         rx_pkt_burst = mlx5_rx_burst_vec;
 625                         DRV_LOG(DEBUG, "port %u selected vectorized"
 626                                 " SPRQ Rx function", dev->data->port_id);
 627                 }
 628         } else if (mlx5_mprq_enabled(dev)) {
 629                 rx_pkt_burst = mlx5_rx_burst_mprq;
 630                 DRV_LOG(DEBUG, "port %u selected MPRQ Rx function",
 631                         dev->data->port_id);
 632         } else {
 633                 DRV_LOG(DEBUG, "port %u selected SPRQ Rx function",
 634                         dev->data->port_id);
 635         }
 636         return rx_pkt_burst;
 637 }
 638
 639 /**
 640  * Get the E-Switch parameters by port id.
 641  *
 642  * @param[in] port
 643  *   Device port id.
 644  * @param[in] valid
 645  *   Device port id is valid, skip check. This flag is useful
 646  *   when trials are performed from probing and device is not
 647  *   flagged as valid yet (in attaching process).
 648  * @param[out] es_domain_id
 649  *   E-Switch domain id.
 650  * @param[out] es_port_id
 651  *   The port id of the port in the E-Switch.
 652  *
 653  * @return
 654  *   pointer to device private data structure containing data needed
 655  *   on success, NULL otherwise and rte_errno is set.
 656  */
 657 struct mlx5_priv *
 658 mlx5_port_to_eswitch_info(uint16_t port, bool valid)
 659 {
 660         struct rte_eth_dev *dev;
 661         struct mlx5_priv *priv;
 662
 663         if (port >= RTE_MAX_ETHPORTS) {
 664                 rte_errno = EINVAL;
 665                 return NULL;
 666         }
 667         if (!valid && !rte_eth_dev_is_valid_port(port)) {
 668                 rte_errno = ENODEV;
 669                 return NULL;
 670         }
 671         dev = &rte_eth_devices[port];
 672         priv = dev->data->dev_private;
 673         if (!priv->sh->esw_mode) {
 674                 rte_errno = EINVAL;
 675                 return NULL;
 676         }
 677         return priv;
 678 }
 679
 680 /**
 681  * Get the E-Switch parameters by device instance.
 682  *
 683  * @param[in] port
 684  *   Device port id.
 685  * @param[out] es_domain_id
 686  *   E-Switch domain id.
 687  * @param[out] es_port_id
 688  *   The port id of the port in the E-Switch.
 689  *
 690  * @return
 691  *   pointer to device private data structure containing data needed
 692  *   on success, NULL otherwise and rte_errno is set.
 693  */
 694 struct mlx5_priv *
 695 mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev)
 696 {
 697         struct mlx5_priv *priv;
 698
 699         priv = dev->data->dev_private;
 700         if (!priv->sh->esw_mode) {
 701                 rte_errno = EINVAL;
 702                 return NULL;
 703         }
 704         return priv;
 705 }
 706
 707 /**
 708  * DPDK callback to retrieve hairpin capabilities.
 709  *
 710  * @param dev
 711  *   Pointer to Ethernet device structure.
 712  * @param[out] cap
 713  *   Storage for hairpin capability data.
 714  *
 715  * @return
 716  *   0 on success, a negative errno value otherwise and rte_errno is set.
 717  */
 718 int
 719 mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap)
 720 {
 721         struct mlx5_priv *priv = dev->data->dev_private;
 722
 723         if (!mlx5_devx_obj_ops_en(priv->sh)) {
 724                 rte_errno = ENOTSUP;
 725                 return -rte_errno;
 726         }
 727         cap->max_nb_queues = UINT16_MAX;
 728         cap->max_rx_2_tx = 1;
 729         cap->max_tx_2_rx = 1;
 730         cap->max_nb_desc = 8192;
 731         return 0;
 732 }