drivers/net/mlx5/mlx5_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12
  13 #include <ethdev_driver.h>
  14 #include <rte_bus_pci.h>
  15 #include <rte_mbuf.h>
  16 #include <rte_common.h>
  17 #include <rte_interrupts.h>
  18 #include <rte_malloc.h>
  19 #include <rte_string_fns.h>
  20 #include <rte_rwlock.h>
  21 #include <rte_cycles.h>
  22
  23 #include <mlx5_malloc.h>
  24
  25 #include "mlx5_rxtx.h"
  26 #include "mlx5_rx.h"
  27 #include "mlx5_tx.h"
  28 #include "mlx5_autoconf.h"
  29
  30 /**
  31  * Get the interface index from device name.
  32  *
  33  * @param[in] dev
  34  *   Pointer to Ethernet device.
  35  *
  36  * @return
  37  *   Nonzero interface index on success, zero otherwise and rte_errno is set.
  38  */
  39 unsigned int
  40 mlx5_ifindex(const struct rte_eth_dev *dev)
  41 {
  42         struct mlx5_priv *priv = dev->data->dev_private;
  43         unsigned int ifindex;
  44
  45         MLX5_ASSERT(priv);
  46         MLX5_ASSERT(priv->if_index);
  47         if (priv->master && priv->sh->bond.ifindex > 0)
  48                 ifindex = priv->sh->bond.ifindex;
  49         else
  50                 ifindex = priv->if_index;
  51         if (!ifindex)
  52                 rte_errno = ENXIO;
  53         return ifindex;
  54 }
  55
  56 /**
  57  * DPDK callback for Ethernet device configuration.
  58  *
  59  * @param dev
  60  *   Pointer to Ethernet device structure.
  61  *
  62  * @return
  63  *   0 on success, a negative errno value otherwise and rte_errno is set.
  64  */
  65 int
  66 mlx5_dev_configure(struct rte_eth_dev *dev)
  67 {
  68         struct mlx5_priv *priv = dev->data->dev_private;
  69         unsigned int rxqs_n = dev->data->nb_rx_queues;
  70         unsigned int txqs_n = dev->data->nb_tx_queues;
  71         const uint8_t use_app_rss_key =
  72                 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
  73         int ret = 0;
  74
  75         if (use_app_rss_key &&
  76             (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
  77              MLX5_RSS_HASH_KEY_LEN)) {
  78                 DRV_LOG(ERR, "port %u RSS key len must be %s Bytes long",
  79                         dev->data->port_id, RTE_STR(MLX5_RSS_HASH_KEY_LEN));
  80                 rte_errno = EINVAL;
  81                 return -rte_errno;
  82         }
  83         priv->rss_conf.rss_key =
  84                 mlx5_realloc(priv->rss_conf.rss_key, MLX5_MEM_RTE,
  85                             MLX5_RSS_HASH_KEY_LEN, 0, SOCKET_ID_ANY);
  86         if (!priv->rss_conf.rss_key) {
  87                 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)",
  88                         dev->data->port_id, rxqs_n);
  89                 rte_errno = ENOMEM;
  90                 return -rte_errno;
  91         }
  92
  93         if ((dev->data->dev_conf.txmode.offloads &
  94                         RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP) &&
  95                         rte_mbuf_dyn_tx_timestamp_register(NULL, NULL) != 0) {
  96                 DRV_LOG(ERR, "port %u cannot register Tx timestamp field/flag",
  97                         dev->data->port_id);
  98                 return -rte_errno;
  99         }
 100         memcpy(priv->rss_conf.rss_key,
 101                use_app_rss_key ?
 102                dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
 103                rss_hash_default_key,
 104                MLX5_RSS_HASH_KEY_LEN);
 105         priv->rss_conf.rss_key_len = MLX5_RSS_HASH_KEY_LEN;
 106         priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
 107         priv->rxq_privs = mlx5_realloc(priv->rxq_privs,
 108                                        MLX5_MEM_RTE | MLX5_MEM_ZERO,
 109                                        sizeof(void *) * rxqs_n, 0,
 110                                        SOCKET_ID_ANY);
 111         if (priv->rxq_privs == NULL) {
 112                 DRV_LOG(ERR, "port %u cannot allocate rxq private data",
 113                         dev->data->port_id);
 114                 rte_errno = ENOMEM;
 115                 return -rte_errno;
 116         }
 117         priv->txqs = (void *)dev->data->tx_queues;
 118         if (txqs_n != priv->txqs_n) {
 119                 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u",
 120                         dev->data->port_id, priv->txqs_n, txqs_n);
 121                 priv->txqs_n = txqs_n;
 122         }
 123         if (rxqs_n > priv->config.ind_table_max_size) {
 124                 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
 125                         dev->data->port_id, rxqs_n);
 126                 rte_errno = EINVAL;
 127                 return -rte_errno;
 128         }
 129         if (rxqs_n != priv->rxqs_n) {
 130                 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
 131                         dev->data->port_id, priv->rxqs_n, rxqs_n);
 132                 priv->rxqs_n = rxqs_n;
 133         }
 134         priv->skip_default_rss_reta = 0;
 135         ret = mlx5_proc_priv_init(dev);
 136         if (ret)
 137                 return ret;
 138         return 0;
 139 }
 140
 141 /**
 142  * Configure default RSS reta.
 143  *
 144  * @param dev
 145  *   Pointer to Ethernet device structure.
 146  *
 147  * @return
 148  *   0 on success, a negative errno value otherwise and rte_errno is set.
 149  */
 150 int
 151 mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev)
 152 {
 153         struct mlx5_priv *priv = dev->data->dev_private;
 154         unsigned int rxqs_n = dev->data->nb_rx_queues;
 155         unsigned int i;
 156         unsigned int j;
 157         unsigned int reta_idx_n;
 158         int ret = 0;
 159         unsigned int *rss_queue_arr = NULL;
 160         unsigned int rss_queue_n = 0;
 161
 162         if (priv->skip_default_rss_reta)
 163                 return ret;
 164         rss_queue_arr = mlx5_malloc(0, rxqs_n * sizeof(unsigned int), 0,
 165                                     SOCKET_ID_ANY);
 166         if (!rss_queue_arr) {
 167                 DRV_LOG(ERR, "port %u cannot allocate RSS queue list (%u)",
 168                         dev->data->port_id, rxqs_n);
 169                 rte_errno = ENOMEM;
 170                 return -rte_errno;
 171         }
 172         for (i = 0, j = 0; i < rxqs_n; i++) {
 173                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
 174
 175                 if (rxq_ctrl && rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
 176                         rss_queue_arr[j++] = i;
 177         }
 178         rss_queue_n = j;
 179         if (rss_queue_n > priv->config.ind_table_max_size) {
 180                 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
 181                         dev->data->port_id, rss_queue_n);
 182                 rte_errno = EINVAL;
 183                 mlx5_free(rss_queue_arr);
 184                 return -rte_errno;
 185         }
 186         DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
 187                 dev->data->port_id, priv->rxqs_n, rxqs_n);
 188         priv->rxqs_n = rxqs_n;
 189         /*
 190          * If the requested number of RX queues is not a power of two,
 191          * use the maximum indirection table size for better balancing.
 192          * The result is always rounded to the next power of two.
 193          */
 194         reta_idx_n = (1 << log2above((rss_queue_n & (rss_queue_n - 1)) ?
 195                                 priv->config.ind_table_max_size :
 196                                 rss_queue_n));
 197         ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
 198         if (ret) {
 199                 mlx5_free(rss_queue_arr);
 200                 return ret;
 201         }
 202         /*
 203          * When the number of RX queues is not a power of two,
 204          * the remaining table entries are padded with reused WQs
 205          * and hashes are not spread uniformly.
 206          */
 207         for (i = 0, j = 0; (i != reta_idx_n); ++i) {
 208                 (*priv->reta_idx)[i] = rss_queue_arr[j];
 209                 if (++j == rss_queue_n)
 210                         j = 0;
 211         }
 212         mlx5_free(rss_queue_arr);
 213         return ret;
 214 }
 215
 216 /**
 217  * Sets default tuning parameters.
 218  *
 219  * @param dev
 220  *   Pointer to Ethernet device.
 221  * @param[out] info
 222  *   Info structure output buffer.
 223  */
 224 static void
 225 mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 226 {
 227         struct mlx5_priv *priv = dev->data->dev_private;
 228
 229         /* Minimum CPU utilization. */
 230         info->default_rxportconf.ring_size = 256;
 231         info->default_txportconf.ring_size = 256;
 232         info->default_rxportconf.burst_size = MLX5_RX_DEFAULT_BURST;
 233         info->default_txportconf.burst_size = MLX5_TX_DEFAULT_BURST;
 234         if ((priv->link_speed_capa & RTE_ETH_LINK_SPEED_200G) |
 235                 (priv->link_speed_capa & RTE_ETH_LINK_SPEED_100G)) {
 236                 info->default_rxportconf.nb_queues = 16;
 237                 info->default_txportconf.nb_queues = 16;
 238                 if (dev->data->nb_rx_queues > 2 ||
 239                     dev->data->nb_tx_queues > 2) {
 240                         /* Max Throughput. */
 241                         info->default_rxportconf.ring_size = 2048;
 242                         info->default_txportconf.ring_size = 2048;
 243                 }
 244         } else {
 245                 info->default_rxportconf.nb_queues = 8;
 246                 info->default_txportconf.nb_queues = 8;
 247                 if (dev->data->nb_rx_queues > 2 ||
 248                     dev->data->nb_tx_queues > 2) {
 249                         /* Max Throughput. */
 250                         info->default_rxportconf.ring_size = 4096;
 251                         info->default_txportconf.ring_size = 4096;
 252                 }
 253         }
 254 }
 255
 256 /**
 257  * Sets tx mbuf limiting parameters.
 258  *
 259  * @param dev
 260  *   Pointer to Ethernet device.
 261  * @param[out] info
 262  *   Info structure output buffer.
 263  */
 264 static void
 265 mlx5_set_txlimit_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 266 {
 267         struct mlx5_priv *priv = dev->data->dev_private;
 268         struct mlx5_dev_config *config = &priv->config;
 269         unsigned int inlen;
 270         uint16_t nb_max;
 271
 272         inlen = (config->txq_inline_max == MLX5_ARG_UNSET) ?
 273                 MLX5_SEND_DEF_INLINE_LEN :
 274                 (unsigned int)config->txq_inline_max;
 275         MLX5_ASSERT(config->txq_inline_min >= 0);
 276         inlen = RTE_MAX(inlen, (unsigned int)config->txq_inline_min);
 277         inlen = RTE_MIN(inlen, MLX5_WQE_SIZE_MAX +
 278                                MLX5_ESEG_MIN_INLINE_SIZE -
 279                                MLX5_WQE_CSEG_SIZE -
 280                                MLX5_WQE_ESEG_SIZE -
 281                                MLX5_WQE_DSEG_SIZE * 2);
 282         nb_max = (MLX5_WQE_SIZE_MAX +
 283                   MLX5_ESEG_MIN_INLINE_SIZE -
 284                   MLX5_WQE_CSEG_SIZE -
 285                   MLX5_WQE_ESEG_SIZE -
 286                   MLX5_WQE_DSEG_SIZE -
 287                   inlen) / MLX5_WSEG_SIZE;
 288         info->tx_desc_lim.nb_seg_max = nb_max;
 289         info->tx_desc_lim.nb_mtu_seg_max = nb_max;
 290 }
 291
 292 /**
 293  * DPDK callback to get information about the device.
 294  *
 295  * @param dev
 296  *   Pointer to Ethernet device structure.
 297  * @param[out] info
 298  *   Info structure output buffer.
 299  */
 300 int
 301 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 302 {
 303         struct mlx5_priv *priv = dev->data->dev_private;
 304         struct mlx5_dev_config *config = &priv->config;
 305         unsigned int max;
 306
 307         /* FIXME: we should ask the device for these values. */
 308         info->min_rx_bufsize = 32;
 309         info->max_rx_pktlen = 65536;
 310         info->max_lro_pkt_size = MLX5_MAX_LRO_SIZE;
 311         /*
 312          * Since we need one CQ per QP, the limit is the minimum number
 313          * between the two values.
 314          */
 315         max = RTE_MIN(priv->sh->device_attr.max_cq,
 316                       priv->sh->device_attr.max_qp);
 317         /* max_rx_queues is uint16_t. */
 318         max = RTE_MIN(max, (unsigned int)UINT16_MAX);
 319         info->max_rx_queues = max;
 320         info->max_tx_queues = max;
 321         info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
 322         info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
 323         info->rx_seg_capa.max_nseg = MLX5_MAX_RXQ_NSEG;
 324         info->rx_seg_capa.multi_pools = !config->mprq.enabled;
 325         info->rx_seg_capa.offset_allowed = !config->mprq.enabled;
 326         info->rx_seg_capa.offset_align_log2 = 0;
 327         info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
 328                                  info->rx_queue_offload_capa);
 329         info->tx_offload_capa = mlx5_get_tx_port_offloads(dev);
 330         info->dev_capa = RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP;
 331         info->if_index = mlx5_ifindex(dev);
 332         info->reta_size = priv->reta_idx_n ?
 333                 priv->reta_idx_n : config->ind_table_max_size;
 334         info->hash_key_size = MLX5_RSS_HASH_KEY_LEN;
 335         info->speed_capa = priv->link_speed_capa;
 336         info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
 337         mlx5_set_default_params(dev, info);
 338         mlx5_set_txlimit_params(dev, info);
 339         info->switch_info.name = dev->data->name;
 340         info->switch_info.domain_id = priv->domain_id;
 341         info->switch_info.port_id = priv->representor_id;
 342         if (priv->representor) {
 343                 uint16_t port_id;
 344
 345                 MLX5_ETH_FOREACH_DEV(port_id, dev->device) {
 346                         struct mlx5_priv *opriv =
 347                                 rte_eth_devices[port_id].data->dev_private;
 348
 349                         if (!opriv ||
 350                             opriv->representor ||
 351                             opriv->sh != priv->sh ||
 352                             opriv->domain_id != priv->domain_id)
 353                                 continue;
 354                         /*
 355                          * Override switch name with that of the master
 356                          * device.
 357                          */
 358                         info->switch_info.name = opriv->dev_data->name;
 359                         break;
 360                 }
 361         }
 362         return 0;
 363 }
 364
 365 /**
 366  * Calculate representor ID from port switch info.
 367  *
 368  * Uint16 representor ID bits definition:
 369  *   pf: 2
 370  *   type: 2
 371  *   vf/sf: 12
 372  *
 373  * @param info
 374  *   Port switch info.
 375  * @param hpf_type
 376  *   Use this type if port is HPF.
 377  *
 378  * @return
 379  *   Encoded representor ID.
 380  */
 381 uint16_t
 382 mlx5_representor_id_encode(const struct mlx5_switch_info *info,
 383                            enum rte_eth_representor_type hpf_type)
 384 {
 385         enum rte_eth_representor_type type = RTE_ETH_REPRESENTOR_VF;
 386         uint16_t repr = info->port_name;
 387
 388         if (info->representor == 0)
 389                 return UINT16_MAX;
 390         if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFSF)
 391                 type = RTE_ETH_REPRESENTOR_SF;
 392         if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFHPF) {
 393                 type = hpf_type;
 394                 repr = UINT16_MAX;
 395         }
 396         return MLX5_REPRESENTOR_ID(info->pf_num, type, repr);
 397 }
 398
 399 /**
 400  * DPDK callback to get information about representor.
 401  *
 402  * Representor ID bits definition:
 403  *   vf/sf: 12
 404  *   type: 2
 405  *   pf: 2
 406  *
 407  * @param dev
 408  *   Pointer to Ethernet device structure.
 409  * @param[out] info
 410  *   Nullable info structure output buffer.
 411  *
 412  * @return
 413  *   negative on error, or the number of representor ranges.
 414  */
 415 int
 416 mlx5_representor_info_get(struct rte_eth_dev *dev,
 417                           struct rte_eth_representor_info *info)
 418 {
 419         struct mlx5_priv *priv = dev->data->dev_private;
 420         int n_type = 4; /* Representor types, VF, HPF@VF, SF and HPF@SF. */
 421         int n_pf = 2; /* Number of PFs. */
 422         int i = 0, pf;
 423         int n_entries;
 424
 425         if (info == NULL)
 426                 goto out;
 427
 428         n_entries = n_type * n_pf;
 429         if ((uint32_t)n_entries > info->nb_ranges_alloc)
 430                 n_entries = info->nb_ranges_alloc;
 431
 432         info->controller = 0;
 433         info->pf = priv->pf_bond >= 0 ? priv->pf_bond : 0;
 434         for (pf = 0; pf < n_pf; ++pf) {
 435                 /* VF range. */
 436                 info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
 437                 info->ranges[i].controller = 0;
 438                 info->ranges[i].pf = pf;
 439                 info->ranges[i].vf = 0;
 440                 info->ranges[i].id_base =
 441                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
 442                 info->ranges[i].id_end =
 443                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 444                 snprintf(info->ranges[i].name,
 445                          sizeof(info->ranges[i].name), "pf%dvf", pf);
 446                 i++;
 447                 if (i == n_entries)
 448                         break;
 449                 /* HPF range of VF type. */
 450                 info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
 451                 info->ranges[i].controller = 0;
 452                 info->ranges[i].pf = pf;
 453                 info->ranges[i].vf = UINT16_MAX;
 454                 info->ranges[i].id_base =
 455                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 456                 info->ranges[i].id_end =
 457                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 458                 snprintf(info->ranges[i].name,
 459                          sizeof(info->ranges[i].name), "pf%dvf", pf);
 460                 i++;
 461                 if (i == n_entries)
 462                         break;
 463                 /* SF range. */
 464                 info->ranges[i].type = RTE_ETH_REPRESENTOR_SF;
 465                 info->ranges[i].controller = 0;
 466                 info->ranges[i].pf = pf;
 467                 info->ranges[i].vf = 0;
 468                 info->ranges[i].id_base =
 469                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
 470                 info->ranges[i].id_end =
 471                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 472                 snprintf(info->ranges[i].name,
 473                          sizeof(info->ranges[i].name), "pf%dsf", pf);
 474                 i++;
 475                 if (i == n_entries)
 476                         break;
 477                 /* HPF range of SF type. */
 478                 info->ranges[i].type = RTE_ETH_REPRESENTOR_SF;
 479                 info->ranges[i].controller = 0;
 480                 info->ranges[i].pf = pf;
 481                 info->ranges[i].vf = UINT16_MAX;
 482                 info->ranges[i].id_base =
 483                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 484                 info->ranges[i].id_end =
 485                         MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
 486                 snprintf(info->ranges[i].name,
 487                          sizeof(info->ranges[i].name), "pf%dsf", pf);
 488                 i++;
 489                 if (i == n_entries)
 490                         break;
 491         }
 492         info->nb_ranges = i;
 493 out:
 494         return n_type * n_pf;
 495 }
 496
 497 /**
 498  * Get firmware version of a device.
 499  *
 500  * @param dev
 501  *   Ethernet device port.
 502  * @param fw_ver
 503  *   String output allocated by caller.
 504  * @param fw_size
 505  *   Size of the output string, including terminating null byte.
 506  *
 507  * @return
 508  *   0 on success, or the size of the non truncated string if too big.
 509  */
 510 int
 511 mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size)
 512 {
 513         struct mlx5_priv *priv = dev->data->dev_private;
 514         struct mlx5_dev_attr *attr = &priv->sh->device_attr;
 515         size_t size = strnlen(attr->fw_ver, sizeof(attr->fw_ver)) + 1;
 516
 517         if (fw_size < size)
 518                 return size;
 519         if (fw_ver != NULL)
 520                 strlcpy(fw_ver, attr->fw_ver, fw_size);
 521         return 0;
 522 }
 523
 524 /**
 525  * Get supported packet types.
 526  *
 527  * @param dev
 528  *   Pointer to Ethernet device structure.
 529  *
 530  * @return
 531  *   A pointer to the supported Packet types array.
 532  */
 533 const uint32_t *
 534 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 535 {
 536         static const uint32_t ptypes[] = {
 537                 /* refers to rxq_cq_to_pkt_type() */
 538                 RTE_PTYPE_L2_ETHER,
 539                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 540                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 541                 RTE_PTYPE_L4_NONFRAG,
 542                 RTE_PTYPE_L4_FRAG,
 543                 RTE_PTYPE_L4_TCP,
 544                 RTE_PTYPE_L4_UDP,
 545                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
 546                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
 547                 RTE_PTYPE_INNER_L4_NONFRAG,
 548                 RTE_PTYPE_INNER_L4_FRAG,
 549                 RTE_PTYPE_INNER_L4_TCP,
 550                 RTE_PTYPE_INNER_L4_UDP,
 551                 RTE_PTYPE_UNKNOWN
 552         };
 553
 554         if (dev->rx_pkt_burst == mlx5_rx_burst ||
 555             dev->rx_pkt_burst == mlx5_rx_burst_mprq ||
 556             dev->rx_pkt_burst == mlx5_rx_burst_vec ||
 557             dev->rx_pkt_burst == mlx5_rx_burst_mprq_vec)
 558                 return ptypes;
 559         return NULL;
 560 }
 561
 562 /**
 563  * DPDK callback to change the MTU.
 564  *
 565  * @param dev
 566  *   Pointer to Ethernet device structure.
 567  * @param in_mtu
 568  *   New MTU.
 569  *
 570  * @return
 571  *   0 on success, a negative errno value otherwise and rte_errno is set.
 572  */
 573 int
 574 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
 575 {
 576         struct mlx5_priv *priv = dev->data->dev_private;
 577         uint16_t kern_mtu = 0;
 578         int ret;
 579
 580         ret = mlx5_get_mtu(dev, &kern_mtu);
 581         if (ret)
 582                 return ret;
 583         /* Set kernel interface MTU first. */
 584         ret = mlx5_set_mtu(dev, mtu);
 585         if (ret)
 586                 return ret;
 587         ret = mlx5_get_mtu(dev, &kern_mtu);
 588         if (ret)
 589                 return ret;
 590         if (kern_mtu == mtu) {
 591                 priv->mtu = mtu;
 592                 DRV_LOG(DEBUG, "port %u adapter MTU set to %u",
 593                         dev->data->port_id, mtu);
 594                 return 0;
 595         }
 596         rte_errno = EAGAIN;
 597         return -rte_errno;
 598 }
 599
 600 /**
 601  * Configure the RX function to use.
 602  *
 603  * @param dev
 604  *   Pointer to private data structure.
 605  *
 606  * @return
 607  *   Pointer to selected Rx burst function.
 608  */
 609 eth_rx_burst_t
 610 mlx5_select_rx_function(struct rte_eth_dev *dev)
 611 {
 612         eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
 613
 614         MLX5_ASSERT(dev != NULL);
 615         if (mlx5_check_vec_rx_support(dev) > 0) {
 616                 if (mlx5_mprq_enabled(dev)) {
 617                         rx_pkt_burst = mlx5_rx_burst_mprq_vec;
 618                         DRV_LOG(DEBUG, "port %u selected vectorized"
 619                                 " MPRQ Rx function", dev->data->port_id);
 620                 } else {
 621                         rx_pkt_burst = mlx5_rx_burst_vec;
 622                         DRV_LOG(DEBUG, "port %u selected vectorized"
 623                                 " SPRQ Rx function", dev->data->port_id);
 624                 }
 625         } else if (mlx5_mprq_enabled(dev)) {
 626                 rx_pkt_burst = mlx5_rx_burst_mprq;
 627                 DRV_LOG(DEBUG, "port %u selected MPRQ Rx function",
 628                         dev->data->port_id);
 629         } else {
 630                 DRV_LOG(DEBUG, "port %u selected SPRQ Rx function",
 631                         dev->data->port_id);
 632         }
 633         return rx_pkt_burst;
 634 }
 635
 636 /**
 637  * Get the E-Switch parameters by port id.
 638  *
 639  * @param[in] port
 640  *   Device port id.
 641  * @param[in] valid
 642  *   Device port id is valid, skip check. This flag is useful
 643  *   when trials are performed from probing and device is not
 644  *   flagged as valid yet (in attaching process).
 645  * @param[out] es_domain_id
 646  *   E-Switch domain id.
 647  * @param[out] es_port_id
 648  *   The port id of the port in the E-Switch.
 649  *
 650  * @return
 651  *   pointer to device private data structure containing data needed
 652  *   on success, NULL otherwise and rte_errno is set.
 653  */
 654 struct mlx5_priv *
 655 mlx5_port_to_eswitch_info(uint16_t port, bool valid)
 656 {
 657         struct rte_eth_dev *dev;
 658         struct mlx5_priv *priv;
 659
 660         if (port >= RTE_MAX_ETHPORTS) {
 661                 rte_errno = EINVAL;
 662                 return NULL;
 663         }
 664         if (!valid && !rte_eth_dev_is_valid_port(port)) {
 665                 rte_errno = ENODEV;
 666                 return NULL;
 667         }
 668         dev = &rte_eth_devices[port];
 669         priv = dev->data->dev_private;
 670         if (!(priv->representor || priv->master)) {
 671                 rte_errno = EINVAL;
 672                 return NULL;
 673         }
 674         return priv;
 675 }
 676
 677 /**
 678  * Get the E-Switch parameters by device instance.
 679  *
 680  * @param[in] port
 681  *   Device port id.
 682  * @param[out] es_domain_id
 683  *   E-Switch domain id.
 684  * @param[out] es_port_id
 685  *   The port id of the port in the E-Switch.
 686  *
 687  * @return
 688  *   pointer to device private data structure containing data needed
 689  *   on success, NULL otherwise and rte_errno is set.
 690  */
 691 struct mlx5_priv *
 692 mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev)
 693 {
 694         struct mlx5_priv *priv;
 695
 696         priv = dev->data->dev_private;
 697         if (!(priv->representor || priv->master)) {
 698                 rte_errno = EINVAL;
 699                 return NULL;
 700         }
 701         return priv;
 702 }
 703
 704 /**
 705  * DPDK callback to retrieve hairpin capabilities.
 706  *
 707  * @param dev
 708  *   Pointer to Ethernet device structure.
 709  * @param[out] cap
 710  *   Storage for hairpin capability data.
 711  *
 712  * @return
 713  *   0 on success, a negative errno value otherwise and rte_errno is set.
 714  */
 715 int
 716 mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap)
 717 {
 718         struct mlx5_priv *priv = dev->data->dev_private;
 719         struct mlx5_dev_config *config = &priv->config;
 720
 721         if (!priv->sh->devx || !config->dest_tir || !config->dv_flow_en) {
 722                 rte_errno = ENOTSUP;
 723                 return -rte_errno;
 724         }
 725         cap->max_nb_queues = UINT16_MAX;
 726         cap->max_rx_2_tx = 1;
 727         cap->max_tx_2_rx = 1;
 728         cap->max_nb_desc = 8192;
 729         return 0;
 730 }