1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
19 #include <sys/ioctl.h>
20 #include <sys/socket.h>
21 #include <netinet/in.h>
22 #include <linux/ethtool.h>
23 #include <linux/sockios.h>
29 #include <rte_atomic.h>
30 #include <rte_ethdev_driver.h>
31 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_interrupts.h>
35 #include <rte_malloc.h>
36 #include <rte_string_fns.h>
37 #include <rte_rwlock.h>
40 #include "mlx5_glue.h"
41 #include "mlx5_rxtx.h"
42 #include "mlx5_utils.h"
44 /* Add defines in case the running kernel is not the same as user headers. */
45 #ifndef ETHTOOL_GLINKSETTINGS
46 struct ethtool_link_settings {
55 uint8_t eth_tp_mdix_ctrl;
56 int8_t link_mode_masks_nwords;
58 uint32_t link_mode_masks[];
61 #define ETHTOOL_GLINKSETTINGS 0x0000004c
62 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5
63 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6
64 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17
65 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18
66 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19
67 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20
68 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21
69 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22
70 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23
71 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24
72 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25
73 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26
74 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27
75 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28
76 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29
77 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30
79 #ifndef HAVE_ETHTOOL_LINK_MODE_25G
80 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31
81 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32
82 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33
84 #ifndef HAVE_ETHTOOL_LINK_MODE_50G
85 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34
86 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35
88 #ifndef HAVE_ETHTOOL_LINK_MODE_100G
89 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36
90 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37
91 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38
92 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39
96 * Get interface name from private structure.
99 * Pointer to Ethernet device.
101 * Interface name output buffer.
104 * 0 on success, a negative errno value otherwise and rte_errno is set.
107 mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE])
109 struct priv *priv = dev->data->dev_private;
112 unsigned int dev_type = 0;
113 unsigned int dev_port_prev = ~0u;
114 char match[IF_NAMESIZE] = "";
117 MKSTR(path, "%s/device/net", priv->ibdev_path);
125 while ((dent = readdir(dir)) != NULL) {
126 char *name = dent->d_name;
128 unsigned int dev_port;
131 if ((name[0] == '.') &&
132 ((name[1] == '\0') ||
133 ((name[1] == '.') && (name[2] == '\0'))))
136 MKSTR(path, "%s/device/net/%s/%s",
137 priv->ibdev_path, name,
138 (dev_type ? "dev_id" : "dev_port"));
140 file = fopen(path, "rb");
145 * Switch to dev_id when dev_port does not exist as
146 * is the case with Linux kernel versions < 3.15.
157 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
162 * Switch to dev_id when dev_port returns the same value for
163 * all ports. May happen when using a MOFED release older than
164 * 3.0 with a Linux kernel >= 3.15.
166 if (dev_port == dev_port_prev)
168 dev_port_prev = dev_port;
169 if (dev_port == (priv->port - 1u))
170 strlcpy(match, name, sizeof(match));
173 if (match[0] == '\0') {
177 strncpy(*ifname, match, sizeof(*ifname));
182 * Get the interface index from device name.
185 * Pointer to Ethernet device.
188 * Interface index on success, a negative errno value otherwise and
192 mlx5_ifindex(const struct rte_eth_dev *dev)
194 char ifname[IF_NAMESIZE];
197 ret = mlx5_get_ifname(dev, &ifname);
200 ret = if_nametoindex(ifname);
209 * Perform ifreq ioctl() on associated Ethernet device.
212 * Pointer to Ethernet device.
214 * Request number to pass to ioctl().
216 * Interface request structure output buffer.
219 * 0 on success, a negative errno value otherwise and rte_errno is set.
222 mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr)
224 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
231 ret = mlx5_get_ifname(dev, &ifr->ifr_name);
234 ret = ioctl(sock, req, ifr);
250 * Pointer to Ethernet device.
252 * MTU value output buffer.
255 * 0 on success, a negative errno value otherwise and rte_errno is set.
258 mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu)
260 struct ifreq request;
261 int ret = mlx5_ifreq(dev, SIOCGIFMTU, &request);
265 *mtu = request.ifr_mtu;
273 * Pointer to Ethernet device.
278 * 0 on success, a negative errno value otherwise and rte_errno is set.
281 mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
283 struct ifreq request = { .ifr_mtu = mtu, };
285 return mlx5_ifreq(dev, SIOCSIFMTU, &request);
292 * Pointer to Ethernet device.
294 * Bitmask for flags that must remain untouched.
296 * Bitmask for flags to modify.
299 * 0 on success, a negative errno value otherwise and rte_errno is set.
302 mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags)
304 struct ifreq request;
305 int ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &request);
309 request.ifr_flags &= keep;
310 request.ifr_flags |= flags & ~keep;
311 return mlx5_ifreq(dev, SIOCSIFFLAGS, &request);
315 * DPDK callback for Ethernet device configuration.
318 * Pointer to Ethernet device structure.
321 * 0 on success, a negative errno value otherwise and rte_errno is set.
324 mlx5_dev_configure(struct rte_eth_dev *dev)
326 struct priv *priv = dev->data->dev_private;
327 unsigned int rxqs_n = dev->data->nb_rx_queues;
328 unsigned int txqs_n = dev->data->nb_tx_queues;
331 unsigned int reta_idx_n;
332 const uint8_t use_app_rss_key =
333 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
336 if (use_app_rss_key &&
337 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
338 rss_hash_default_key_len)) {
339 DRV_LOG(ERR, "port %u RSS key len must be %zu Bytes long",
340 dev->data->port_id, rss_hash_default_key_len);
344 priv->rss_conf.rss_key =
345 rte_realloc(priv->rss_conf.rss_key,
346 rss_hash_default_key_len, 0);
347 if (!priv->rss_conf.rss_key) {
348 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)",
349 dev->data->port_id, rxqs_n);
353 memcpy(priv->rss_conf.rss_key,
355 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
356 rss_hash_default_key,
357 rss_hash_default_key_len);
358 priv->rss_conf.rss_key_len = rss_hash_default_key_len;
359 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
360 priv->rxqs = (void *)dev->data->rx_queues;
361 priv->txqs = (void *)dev->data->tx_queues;
362 if (txqs_n != priv->txqs_n) {
363 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u",
364 dev->data->port_id, priv->txqs_n, txqs_n);
365 priv->txqs_n = txqs_n;
367 if (rxqs_n > priv->config.ind_table_max_size) {
368 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
369 dev->data->port_id, rxqs_n);
373 if (rxqs_n == priv->rxqs_n)
375 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
376 dev->data->port_id, priv->rxqs_n, rxqs_n);
377 priv->rxqs_n = rxqs_n;
378 /* If the requested number of RX queues is not a power of two, use the
379 * maximum indirection table size for better balancing.
380 * The result is always rounded to the next power of two. */
381 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
382 priv->config.ind_table_max_size :
384 ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
387 /* When the number of RX queues is not a power of two, the remaining
388 * table entries are padded with reused WQs and hashes are not spread
390 for (i = 0, j = 0; (i != reta_idx_n); ++i) {
391 (*priv->reta_idx)[i] = j;
396 * Once the device is added to the list of memory event callback, its
397 * global MR cache table cannot be expanded on the fly because of
398 * deadlock. If it overflows, lookup should be done by searching MR list
399 * linearly, which is slow.
401 if (mlx5_mr_btree_init(&priv->mr.cache, MLX5_MR_BTREE_CACHE_N * 2,
402 dev->device->numa_node)) {
403 /* rte_errno is already set. */
410 * Sets default tuning parameters.
413 * Pointer to Ethernet device.
415 * Info structure output buffer.
418 mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
420 struct priv *priv = dev->data->dev_private;
422 /* Minimum CPU utilization. */
423 info->default_rxportconf.ring_size = 256;
424 info->default_txportconf.ring_size = 256;
425 info->default_rxportconf.burst_size = 64;
426 info->default_txportconf.burst_size = 64;
427 if (priv->link_speed_capa & ETH_LINK_SPEED_100G) {
428 info->default_rxportconf.nb_queues = 16;
429 info->default_txportconf.nb_queues = 16;
430 if (dev->data->nb_rx_queues > 2 ||
431 dev->data->nb_tx_queues > 2) {
432 /* Max Throughput. */
433 info->default_rxportconf.ring_size = 2048;
434 info->default_txportconf.ring_size = 2048;
437 info->default_rxportconf.nb_queues = 8;
438 info->default_txportconf.nb_queues = 8;
439 if (dev->data->nb_rx_queues > 2 ||
440 dev->data->nb_tx_queues > 2) {
441 /* Max Throughput. */
442 info->default_rxportconf.ring_size = 4096;
443 info->default_txportconf.ring_size = 4096;
449 * DPDK callback to get information about the device.
452 * Pointer to Ethernet device structure.
454 * Info structure output buffer.
457 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
459 struct priv *priv = dev->data->dev_private;
460 struct mlx5_dev_config *config = &priv->config;
462 char ifname[IF_NAMESIZE];
464 /* FIXME: we should ask the device for these values. */
465 info->min_rx_bufsize = 32;
466 info->max_rx_pktlen = 65536;
468 * Since we need one CQ per QP, the limit is the minimum number
469 * between the two values.
471 max = RTE_MIN(priv->device_attr.orig_attr.max_cq,
472 priv->device_attr.orig_attr.max_qp);
473 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
476 info->max_rx_queues = max;
477 info->max_tx_queues = max;
478 info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
479 info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
480 info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
481 info->rx_queue_offload_capa);
482 info->tx_offload_capa = mlx5_get_tx_port_offloads(dev);
483 if (mlx5_get_ifname(dev, &ifname) == 0)
484 info->if_index = if_nametoindex(ifname);
485 info->reta_size = priv->reta_idx_n ?
486 priv->reta_idx_n : config->ind_table_max_size;
487 info->hash_key_size = rss_hash_default_key_len;
488 info->speed_capa = priv->link_speed_capa;
489 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
490 mlx5_set_default_params(dev, info);
494 * Get supported packet types.
497 * Pointer to Ethernet device structure.
500 * A pointer to the supported Packet types array.
503 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
505 static const uint32_t ptypes[] = {
506 /* refers to rxq_cq_to_pkt_type() */
508 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
509 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
510 RTE_PTYPE_L4_NONFRAG,
514 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
515 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
516 RTE_PTYPE_INNER_L4_NONFRAG,
517 RTE_PTYPE_INNER_L4_FRAG,
518 RTE_PTYPE_INNER_L4_TCP,
519 RTE_PTYPE_INNER_L4_UDP,
523 if (dev->rx_pkt_burst == mlx5_rx_burst ||
524 dev->rx_pkt_burst == mlx5_rx_burst_mprq ||
525 dev->rx_pkt_burst == mlx5_rx_burst_vec)
531 * DPDK callback to retrieve physical link information.
534 * Pointer to Ethernet device structure.
536 * Storage for current link status.
539 * 0 on success, a negative errno value otherwise and rte_errno is set.
542 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev,
543 struct rte_eth_link *link)
545 struct priv *priv = dev->data->dev_private;
546 struct ethtool_cmd edata = {
547 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */
550 struct rte_eth_link dev_link;
554 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
556 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
557 dev->data->port_id, strerror(rte_errno));
560 memset(&dev_link, 0, sizeof(dev_link));
561 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
562 (ifr.ifr_flags & IFF_RUNNING));
563 ifr.ifr_data = (void *)&edata;
564 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
567 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
568 dev->data->port_id, strerror(rte_errno));
571 link_speed = ethtool_cmd_speed(&edata);
572 if (link_speed == -1)
573 dev_link.link_speed = ETH_SPEED_NUM_NONE;
575 dev_link.link_speed = link_speed;
576 priv->link_speed_capa = 0;
577 if (edata.supported & SUPPORTED_Autoneg)
578 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
579 if (edata.supported & (SUPPORTED_1000baseT_Full |
580 SUPPORTED_1000baseKX_Full))
581 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
582 if (edata.supported & SUPPORTED_10000baseKR_Full)
583 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
584 if (edata.supported & (SUPPORTED_40000baseKR4_Full |
585 SUPPORTED_40000baseCR4_Full |
586 SUPPORTED_40000baseSR4_Full |
587 SUPPORTED_40000baseLR4_Full))
588 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
589 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
590 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
591 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
592 ETH_LINK_SPEED_FIXED);
593 if ((dev_link.link_speed && !dev_link.link_status) ||
594 (!dev_link.link_speed && dev_link.link_status)) {
603 * Retrieve physical link information (unlocked version using new ioctl).
606 * Pointer to Ethernet device structure.
608 * Storage for current link status.
611 * 0 on success, a negative errno value otherwise and rte_errno is set.
614 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev,
615 struct rte_eth_link *link)
618 struct priv *priv = dev->data->dev_private;
619 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS };
621 struct rte_eth_link dev_link;
625 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
627 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
628 dev->data->port_id, strerror(rte_errno));
631 memset(&dev_link, 0, sizeof(dev_link));
632 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
633 (ifr.ifr_flags & IFF_RUNNING));
634 ifr.ifr_data = (void *)&gcmd;
635 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
638 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
640 dev->data->port_id, strerror(rte_errno));
643 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords;
645 alignas(struct ethtool_link_settings)
646 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) +
647 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3];
648 struct ethtool_link_settings *ecmd = (void *)data;
651 ifr.ifr_data = (void *)ecmd;
652 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
655 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
657 dev->data->port_id, strerror(rte_errno));
660 dev_link.link_speed = ecmd->speed;
661 sc = ecmd->link_mode_masks[0] |
662 ((uint64_t)ecmd->link_mode_masks[1] << 32);
663 priv->link_speed_capa = 0;
664 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT))
665 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
666 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) |
667 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT)))
668 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
669 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) |
670 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) |
671 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT)))
672 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
673 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) |
674 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT)))
675 priv->link_speed_capa |= ETH_LINK_SPEED_20G;
676 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) |
677 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) |
678 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) |
679 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT)))
680 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
681 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) |
682 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) |
683 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) |
684 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT)))
685 priv->link_speed_capa |= ETH_LINK_SPEED_56G;
686 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) |
687 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) |
688 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT)))
689 priv->link_speed_capa |= ETH_LINK_SPEED_25G;
690 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) |
691 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT)))
692 priv->link_speed_capa |= ETH_LINK_SPEED_50G;
693 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) |
694 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) |
695 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) |
696 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT)))
697 priv->link_speed_capa |= ETH_LINK_SPEED_100G;
698 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ?
699 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
700 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
701 ETH_LINK_SPEED_FIXED);
702 if ((dev_link.link_speed && !dev_link.link_status) ||
703 (!dev_link.link_speed && dev_link.link_status)) {
712 * DPDK callback to retrieve physical link information.
715 * Pointer to Ethernet device structure.
716 * @param wait_to_complete
717 * Wait for request completion.
720 * 0 if link status was not updated, positive if it was, a negative errno
721 * value otherwise and rte_errno is set.
724 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete)
727 struct rte_eth_link dev_link;
728 time_t start_time = time(NULL);
731 ret = mlx5_link_update_unlocked_gs(dev, &dev_link);
733 ret = mlx5_link_update_unlocked_gset(dev, &dev_link);
736 /* Handle wait to complete situation. */
737 if (wait_to_complete && ret == -EAGAIN) {
738 if (abs((int)difftime(time(NULL), start_time)) <
739 MLX5_LINK_STATUS_TIMEOUT) {
746 } else if (ret < 0) {
749 } while (wait_to_complete);
750 ret = !!memcmp(&dev->data->dev_link, &dev_link,
751 sizeof(struct rte_eth_link));
752 dev->data->dev_link = dev_link;
757 * DPDK callback to change the MTU.
760 * Pointer to Ethernet device structure.
765 * 0 on success, a negative errno value otherwise and rte_errno is set.
768 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
770 struct priv *priv = dev->data->dev_private;
771 uint16_t kern_mtu = 0;
774 ret = mlx5_get_mtu(dev, &kern_mtu);
777 /* Set kernel interface MTU first. */
778 ret = mlx5_set_mtu(dev, mtu);
781 ret = mlx5_get_mtu(dev, &kern_mtu);
784 if (kern_mtu == mtu) {
786 DRV_LOG(DEBUG, "port %u adapter MTU set to %u",
787 dev->data->port_id, mtu);
795 * DPDK callback to get flow control status.
798 * Pointer to Ethernet device structure.
799 * @param[out] fc_conf
800 * Flow control output buffer.
803 * 0 on success, a negative errno value otherwise and rte_errno is set.
806 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
809 struct ethtool_pauseparam ethpause = {
810 .cmd = ETHTOOL_GPAUSEPARAM
814 ifr.ifr_data = (void *)ðpause;
815 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
818 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM) failed:"
820 dev->data->port_id, strerror(rte_errno));
823 fc_conf->autoneg = ethpause.autoneg;
824 if (ethpause.rx_pause && ethpause.tx_pause)
825 fc_conf->mode = RTE_FC_FULL;
826 else if (ethpause.rx_pause)
827 fc_conf->mode = RTE_FC_RX_PAUSE;
828 else if (ethpause.tx_pause)
829 fc_conf->mode = RTE_FC_TX_PAUSE;
831 fc_conf->mode = RTE_FC_NONE;
836 * DPDK callback to modify flow control parameters.
839 * Pointer to Ethernet device structure.
841 * Flow control parameters.
844 * 0 on success, a negative errno value otherwise and rte_errno is set.
847 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
850 struct ethtool_pauseparam ethpause = {
851 .cmd = ETHTOOL_SPAUSEPARAM
855 ifr.ifr_data = (void *)ðpause;
856 ethpause.autoneg = fc_conf->autoneg;
857 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
858 (fc_conf->mode & RTE_FC_RX_PAUSE))
859 ethpause.rx_pause = 1;
861 ethpause.rx_pause = 0;
863 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
864 (fc_conf->mode & RTE_FC_TX_PAUSE))
865 ethpause.tx_pause = 1;
867 ethpause.tx_pause = 0;
868 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
871 "port %u ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
873 dev->data->port_id, strerror(rte_errno));
880 * Get PCI information from struct ibv_device.
883 * Pointer to Ethernet device structure.
884 * @param[out] pci_addr
885 * PCI bus address output buffer.
888 * 0 on success, a negative errno value otherwise and rte_errno is set.
891 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device,
892 struct rte_pci_addr *pci_addr)
896 MKSTR(path, "%s/device/uevent", device->ibdev_path);
898 file = fopen(path, "rb");
903 while (fgets(line, sizeof(line), file) == line) {
904 size_t len = strlen(line);
907 /* Truncate long lines. */
908 if (len == (sizeof(line) - 1))
909 while (line[(len - 1)] != '\n') {
913 line[(len - 1)] = ret;
915 /* Extract information. */
918 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
922 &pci_addr->function) == 4) {
932 * Device status handler.
935 * Pointer to Ethernet device.
937 * Pointer to event flags holder.
940 * Events bitmap of callback process which can be called immediately.
943 mlx5_dev_status_handler(struct rte_eth_dev *dev)
945 struct priv *priv = dev->data->dev_private;
946 struct ibv_async_event event;
949 if (mlx5_link_update(dev, 0) == -EAGAIN) {
953 /* Read all message and acknowledge them. */
955 if (mlx5_glue->get_async_event(priv->ctx, &event))
957 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
958 event.event_type == IBV_EVENT_PORT_ERR) &&
959 (dev->data->dev_conf.intr_conf.lsc == 1))
960 ret |= (1 << RTE_ETH_EVENT_INTR_LSC);
961 else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
962 dev->data->dev_conf.intr_conf.rmv == 1)
963 ret |= (1 << RTE_ETH_EVENT_INTR_RMV);
966 "port %u event type %d on not handled",
967 dev->data->port_id, event.event_type);
968 mlx5_glue->ack_async_event(&event);
974 * Handle interrupts from the NIC.
976 * @param[in] intr_handle
982 mlx5_dev_interrupt_handler(void *cb_arg)
984 struct rte_eth_dev *dev = cb_arg;
987 events = mlx5_dev_status_handler(dev);
988 if (events & (1 << RTE_ETH_EVENT_INTR_LSC))
989 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
990 if (events & (1 << RTE_ETH_EVENT_INTR_RMV))
991 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL);
995 * Handle interrupts from the socket.
1001 mlx5_dev_handler_socket(void *cb_arg)
1003 struct rte_eth_dev *dev = cb_arg;
1005 mlx5_socket_handle(dev);
1009 * Uninstall interrupt handler.
1012 * Pointer to Ethernet device.
1015 mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev)
1017 struct priv *priv = dev->data->dev_private;
1019 if (dev->data->dev_conf.intr_conf.lsc ||
1020 dev->data->dev_conf.intr_conf.rmv)
1021 rte_intr_callback_unregister(&priv->intr_handle,
1022 mlx5_dev_interrupt_handler, dev);
1023 if (priv->primary_socket)
1024 rte_intr_callback_unregister(&priv->intr_handle_socket,
1025 mlx5_dev_handler_socket, dev);
1026 priv->intr_handle.fd = 0;
1027 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
1028 priv->intr_handle_socket.fd = 0;
1029 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN;
1033 * Install interrupt handler.
1036 * Pointer to Ethernet device.
1039 mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev)
1041 struct priv *priv = dev->data->dev_private;
1045 assert(priv->ctx->async_fd > 0);
1046 flags = fcntl(priv->ctx->async_fd, F_GETFL);
1047 ret = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
1050 "port %u failed to change file descriptor async event"
1052 dev->data->port_id);
1053 dev->data->dev_conf.intr_conf.lsc = 0;
1054 dev->data->dev_conf.intr_conf.rmv = 0;
1056 if (dev->data->dev_conf.intr_conf.lsc ||
1057 dev->data->dev_conf.intr_conf.rmv) {
1058 priv->intr_handle.fd = priv->ctx->async_fd;
1059 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
1060 rte_intr_callback_register(&priv->intr_handle,
1061 mlx5_dev_interrupt_handler, dev);
1063 ret = mlx5_socket_init(dev);
1065 DRV_LOG(ERR, "port %u cannot initialise socket: %s",
1066 dev->data->port_id, strerror(rte_errno));
1067 else if (priv->primary_socket) {
1068 priv->intr_handle_socket.fd = priv->primary_socket;
1069 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT;
1070 rte_intr_callback_register(&priv->intr_handle_socket,
1071 mlx5_dev_handler_socket, dev);
1076 * DPDK callback to bring the link DOWN.
1079 * Pointer to Ethernet device structure.
1082 * 0 on success, a negative errno value otherwise and rte_errno is set.
1085 mlx5_set_link_down(struct rte_eth_dev *dev)
1087 return mlx5_set_flags(dev, ~IFF_UP, ~IFF_UP);
1091 * DPDK callback to bring the link UP.
1094 * Pointer to Ethernet device structure.
1097 * 0 on success, a negative errno value otherwise and rte_errno is set.
1100 mlx5_set_link_up(struct rte_eth_dev *dev)
1102 return mlx5_set_flags(dev, ~IFF_UP, IFF_UP);
1106 * Configure the TX function to use.
1109 * Pointer to private data structure.
1112 * Pointer to selected Tx burst function.
1115 mlx5_select_tx_function(struct rte_eth_dev *dev)
1117 struct priv *priv = dev->data->dev_private;
1118 eth_tx_burst_t tx_pkt_burst = mlx5_tx_burst;
1119 struct mlx5_dev_config *config = &priv->config;
1120 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads;
1121 int tso = !!(tx_offloads & (DEV_TX_OFFLOAD_TCP_TSO |
1122 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
1123 DEV_TX_OFFLOAD_GRE_TNL_TSO |
1124 DEV_TX_OFFLOAD_IP_TNL_TSO |
1125 DEV_TX_OFFLOAD_UDP_TNL_TSO));
1126 int swp = !!(tx_offloads & (DEV_TX_OFFLOAD_IP_TNL_TSO |
1127 DEV_TX_OFFLOAD_UDP_TNL_TSO |
1128 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM));
1129 int vlan_insert = !!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT);
1131 assert(priv != NULL);
1132 /* Select appropriate TX function. */
1133 if (vlan_insert || tso || swp)
1134 return tx_pkt_burst;
1135 if (config->mps == MLX5_MPW_ENHANCED) {
1136 if (mlx5_check_vec_tx_support(dev) > 0) {
1137 if (mlx5_check_raw_vec_tx_support(dev) > 0)
1138 tx_pkt_burst = mlx5_tx_burst_raw_vec;
1140 tx_pkt_burst = mlx5_tx_burst_vec;
1142 "port %u selected enhanced MPW Tx vectorized"
1144 dev->data->port_id);
1146 tx_pkt_burst = mlx5_tx_burst_empw;
1148 "port %u selected enhanced MPW Tx function",
1149 dev->data->port_id);
1151 } else if (config->mps && (config->txq_inline > 0)) {
1152 tx_pkt_burst = mlx5_tx_burst_mpw_inline;
1153 DRV_LOG(DEBUG, "port %u selected MPW inline Tx function",
1154 dev->data->port_id);
1155 } else if (config->mps) {
1156 tx_pkt_burst = mlx5_tx_burst_mpw;
1157 DRV_LOG(DEBUG, "port %u selected MPW Tx function",
1158 dev->data->port_id);
1160 return tx_pkt_burst;
1164 * Configure the RX function to use.
1167 * Pointer to private data structure.
1170 * Pointer to selected Rx burst function.
1173 mlx5_select_rx_function(struct rte_eth_dev *dev)
1175 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
1177 assert(dev != NULL);
1178 if (mlx5_check_vec_rx_support(dev) > 0) {
1179 rx_pkt_burst = mlx5_rx_burst_vec;
1180 DRV_LOG(DEBUG, "port %u selected Rx vectorized function",
1181 dev->data->port_id);
1182 } else if (mlx5_mprq_enabled(dev)) {
1183 rx_pkt_burst = mlx5_rx_burst_mprq;
1185 return rx_pkt_burst;
1189 * Check if mlx5 device was removed.
1192 * Pointer to Ethernet device structure.
1195 * 1 when device is removed, otherwise 0.
1198 mlx5_is_removed(struct rte_eth_dev *dev)
1200 struct ibv_device_attr device_attr;
1201 struct priv *priv = dev->data->dev_private;
1203 if (mlx5_glue->query_device(priv->ctx, &device_attr) == EIO)