1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
6 #include <netinet/in.h>
14 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
16 #pragma GCC diagnostic ignored "-Wpedantic"
18 #include <infiniband/verbs.h>
20 #pragma GCC diagnostic error "-Wpedantic"
23 #include <rte_common.h>
24 #include <rte_ether.h>
25 #include <rte_ethdev_driver.h>
27 #include <rte_cycles.h>
28 #include <rte_flow_driver.h>
29 #include <rte_malloc.h>
32 #include <mlx5_glue.h>
33 #include <mlx5_devx_cmds.h>
36 #include "mlx5_defs.h"
38 #include "mlx5_flow.h"
39 #include "mlx5_rxtx.h"
41 /* Dev ops structure defined in mlx5.c */
42 extern const struct eth_dev_ops mlx5_dev_ops;
43 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
45 /** Device flow drivers. */
46 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
47 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
49 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
51 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
53 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
54 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
55 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
56 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
58 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
59 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
64 MLX5_EXPANSION_ROOT_OUTER,
65 MLX5_EXPANSION_ROOT_ETH_VLAN,
66 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
67 MLX5_EXPANSION_OUTER_ETH,
68 MLX5_EXPANSION_OUTER_ETH_VLAN,
69 MLX5_EXPANSION_OUTER_VLAN,
70 MLX5_EXPANSION_OUTER_IPV4,
71 MLX5_EXPANSION_OUTER_IPV4_UDP,
72 MLX5_EXPANSION_OUTER_IPV4_TCP,
73 MLX5_EXPANSION_OUTER_IPV6,
74 MLX5_EXPANSION_OUTER_IPV6_UDP,
75 MLX5_EXPANSION_OUTER_IPV6_TCP,
77 MLX5_EXPANSION_VXLAN_GPE,
81 MLX5_EXPANSION_ETH_VLAN,
84 MLX5_EXPANSION_IPV4_UDP,
85 MLX5_EXPANSION_IPV4_TCP,
87 MLX5_EXPANSION_IPV6_UDP,
88 MLX5_EXPANSION_IPV6_TCP,
91 /** Supported expansion of items. */
92 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
93 [MLX5_EXPANSION_ROOT] = {
94 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
97 .type = RTE_FLOW_ITEM_TYPE_END,
99 [MLX5_EXPANSION_ROOT_OUTER] = {
100 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
101 MLX5_EXPANSION_OUTER_IPV4,
102 MLX5_EXPANSION_OUTER_IPV6),
103 .type = RTE_FLOW_ITEM_TYPE_END,
105 [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
106 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
107 .type = RTE_FLOW_ITEM_TYPE_END,
109 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
110 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
111 .type = RTE_FLOW_ITEM_TYPE_END,
113 [MLX5_EXPANSION_OUTER_ETH] = {
114 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
115 MLX5_EXPANSION_OUTER_IPV6,
116 MLX5_EXPANSION_MPLS),
117 .type = RTE_FLOW_ITEM_TYPE_ETH,
120 [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
121 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
122 .type = RTE_FLOW_ITEM_TYPE_ETH,
125 [MLX5_EXPANSION_OUTER_VLAN] = {
126 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
127 MLX5_EXPANSION_OUTER_IPV6),
128 .type = RTE_FLOW_ITEM_TYPE_VLAN,
130 [MLX5_EXPANSION_OUTER_IPV4] = {
131 .next = RTE_FLOW_EXPAND_RSS_NEXT
132 (MLX5_EXPANSION_OUTER_IPV4_UDP,
133 MLX5_EXPANSION_OUTER_IPV4_TCP,
136 MLX5_EXPANSION_IPV6),
137 .type = RTE_FLOW_ITEM_TYPE_IPV4,
138 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
139 ETH_RSS_NONFRAG_IPV4_OTHER,
141 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
142 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
143 MLX5_EXPANSION_VXLAN_GPE),
144 .type = RTE_FLOW_ITEM_TYPE_UDP,
145 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
147 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
148 .type = RTE_FLOW_ITEM_TYPE_TCP,
149 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
151 [MLX5_EXPANSION_OUTER_IPV6] = {
152 .next = RTE_FLOW_EXPAND_RSS_NEXT
153 (MLX5_EXPANSION_OUTER_IPV6_UDP,
154 MLX5_EXPANSION_OUTER_IPV6_TCP,
156 MLX5_EXPANSION_IPV6),
157 .type = RTE_FLOW_ITEM_TYPE_IPV6,
158 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
159 ETH_RSS_NONFRAG_IPV6_OTHER,
161 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
162 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
163 MLX5_EXPANSION_VXLAN_GPE),
164 .type = RTE_FLOW_ITEM_TYPE_UDP,
165 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
167 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
168 .type = RTE_FLOW_ITEM_TYPE_TCP,
169 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
171 [MLX5_EXPANSION_VXLAN] = {
172 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
174 MLX5_EXPANSION_IPV6),
175 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
177 [MLX5_EXPANSION_VXLAN_GPE] = {
178 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
180 MLX5_EXPANSION_IPV6),
181 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
183 [MLX5_EXPANSION_GRE] = {
184 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
185 .type = RTE_FLOW_ITEM_TYPE_GRE,
187 [MLX5_EXPANSION_MPLS] = {
188 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
189 MLX5_EXPANSION_IPV6),
190 .type = RTE_FLOW_ITEM_TYPE_MPLS,
192 [MLX5_EXPANSION_ETH] = {
193 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
194 MLX5_EXPANSION_IPV6),
195 .type = RTE_FLOW_ITEM_TYPE_ETH,
197 [MLX5_EXPANSION_ETH_VLAN] = {
198 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
199 .type = RTE_FLOW_ITEM_TYPE_ETH,
201 [MLX5_EXPANSION_VLAN] = {
202 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
203 MLX5_EXPANSION_IPV6),
204 .type = RTE_FLOW_ITEM_TYPE_VLAN,
206 [MLX5_EXPANSION_IPV4] = {
207 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
208 MLX5_EXPANSION_IPV4_TCP),
209 .type = RTE_FLOW_ITEM_TYPE_IPV4,
210 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
211 ETH_RSS_NONFRAG_IPV4_OTHER,
213 [MLX5_EXPANSION_IPV4_UDP] = {
214 .type = RTE_FLOW_ITEM_TYPE_UDP,
215 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
217 [MLX5_EXPANSION_IPV4_TCP] = {
218 .type = RTE_FLOW_ITEM_TYPE_TCP,
219 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
221 [MLX5_EXPANSION_IPV6] = {
222 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
223 MLX5_EXPANSION_IPV6_TCP),
224 .type = RTE_FLOW_ITEM_TYPE_IPV6,
225 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
226 ETH_RSS_NONFRAG_IPV6_OTHER,
228 [MLX5_EXPANSION_IPV6_UDP] = {
229 .type = RTE_FLOW_ITEM_TYPE_UDP,
230 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
232 [MLX5_EXPANSION_IPV6_TCP] = {
233 .type = RTE_FLOW_ITEM_TYPE_TCP,
234 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
238 static const struct rte_flow_ops mlx5_flow_ops = {
239 .validate = mlx5_flow_validate,
240 .create = mlx5_flow_create,
241 .destroy = mlx5_flow_destroy,
242 .flush = mlx5_flow_flush,
243 .isolate = mlx5_flow_isolate,
244 .query = mlx5_flow_query,
245 .dev_dump = mlx5_flow_dev_dump,
246 .get_aged_flows = mlx5_flow_get_aged_flows,
249 /* Convert FDIR request to Generic flow. */
251 struct rte_flow_attr attr;
252 struct rte_flow_item items[4];
253 struct rte_flow_item_eth l2;
254 struct rte_flow_item_eth l2_mask;
256 struct rte_flow_item_ipv4 ipv4;
257 struct rte_flow_item_ipv6 ipv6;
260 struct rte_flow_item_ipv4 ipv4;
261 struct rte_flow_item_ipv6 ipv6;
264 struct rte_flow_item_udp udp;
265 struct rte_flow_item_tcp tcp;
268 struct rte_flow_item_udp udp;
269 struct rte_flow_item_tcp tcp;
271 struct rte_flow_action actions[2];
272 struct rte_flow_action_queue queue;
275 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
276 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
277 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
280 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
281 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
282 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
283 { 9, 10, 11 }, { 12, 13, 14 },
286 /* Tunnel information. */
287 struct mlx5_flow_tunnel_info {
288 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
289 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
292 static struct mlx5_flow_tunnel_info tunnels_info[] = {
294 .tunnel = MLX5_FLOW_LAYER_VXLAN,
295 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
298 .tunnel = MLX5_FLOW_LAYER_GENEVE,
299 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
302 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
303 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
306 .tunnel = MLX5_FLOW_LAYER_GRE,
307 .ptype = RTE_PTYPE_TUNNEL_GRE,
310 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
311 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
314 .tunnel = MLX5_FLOW_LAYER_MPLS,
315 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
318 .tunnel = MLX5_FLOW_LAYER_NVGRE,
319 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
322 .tunnel = MLX5_FLOW_LAYER_IPIP,
323 .ptype = RTE_PTYPE_TUNNEL_IP,
326 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
327 .ptype = RTE_PTYPE_TUNNEL_IP,
330 .tunnel = MLX5_FLOW_LAYER_GTP,
331 .ptype = RTE_PTYPE_TUNNEL_GTPU,
336 * Translate tag ID to register.
339 * Pointer to the Ethernet device structure.
341 * The feature that request the register.
343 * The request register ID.
345 * Error description in case of any.
348 * The request register on success, a negative errno
349 * value otherwise and rte_errno is set.
352 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
353 enum mlx5_feature_name feature,
355 struct rte_flow_error *error)
357 struct mlx5_priv *priv = dev->data->dev_private;
358 struct mlx5_dev_config *config = &priv->config;
359 enum modify_reg start_reg;
360 bool skip_mtr_reg = false;
363 case MLX5_HAIRPIN_RX:
365 case MLX5_HAIRPIN_TX:
367 case MLX5_METADATA_RX:
368 switch (config->dv_xmeta_en) {
369 case MLX5_XMETA_MODE_LEGACY:
371 case MLX5_XMETA_MODE_META16:
373 case MLX5_XMETA_MODE_META32:
377 case MLX5_METADATA_TX:
379 case MLX5_METADATA_FDB:
380 switch (config->dv_xmeta_en) {
381 case MLX5_XMETA_MODE_LEGACY:
383 case MLX5_XMETA_MODE_META16:
385 case MLX5_XMETA_MODE_META32:
390 switch (config->dv_xmeta_en) {
391 case MLX5_XMETA_MODE_LEGACY:
393 case MLX5_XMETA_MODE_META16:
395 case MLX5_XMETA_MODE_META32:
401 * If meter color and flow match share one register, flow match
402 * should use the meter color register for match.
404 if (priv->mtr_reg_share)
405 return priv->mtr_color_reg;
407 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
410 MLX5_ASSERT(priv->mtr_color_reg != REG_NONE);
411 return priv->mtr_color_reg;
414 * Metadata COPY_MARK register using is in meter suffix sub
415 * flow while with meter. It's safe to share the same register.
417 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
420 * If meter is enable, it will engage the register for color
421 * match and flow match. If meter color match is not using the
422 * REG_C_2, need to skip the REG_C_x be used by meter color
424 * If meter is disable, free to use all available registers.
426 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
427 (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
428 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
429 if (id > (REG_C_7 - start_reg))
430 return rte_flow_error_set(error, EINVAL,
431 RTE_FLOW_ERROR_TYPE_ITEM,
432 NULL, "invalid tag id");
433 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
434 return rte_flow_error_set(error, ENOTSUP,
435 RTE_FLOW_ERROR_TYPE_ITEM,
436 NULL, "unsupported tag id");
438 * This case means meter is using the REG_C_x great than 2.
439 * Take care not to conflict with meter color REG_C_x.
440 * If the available index REG_C_y >= REG_C_x, skip the
443 if (skip_mtr_reg && config->flow_mreg_c
444 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
445 if (id >= (REG_C_7 - start_reg))
446 return rte_flow_error_set(error, EINVAL,
447 RTE_FLOW_ERROR_TYPE_ITEM,
448 NULL, "invalid tag id");
449 if (config->flow_mreg_c
450 [id + 1 + start_reg - REG_C_0] != REG_NONE)
451 return config->flow_mreg_c
452 [id + 1 + start_reg - REG_C_0];
453 return rte_flow_error_set(error, ENOTSUP,
454 RTE_FLOW_ERROR_TYPE_ITEM,
455 NULL, "unsupported tag id");
457 return config->flow_mreg_c[id + start_reg - REG_C_0];
460 return rte_flow_error_set(error, EINVAL,
461 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
462 NULL, "invalid feature name");
466 * Check extensive flow metadata register support.
469 * Pointer to rte_eth_dev structure.
472 * True if device supports extensive flow metadata register, otherwise false.
475 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
477 struct mlx5_priv *priv = dev->data->dev_private;
478 struct mlx5_dev_config *config = &priv->config;
481 * Having available reg_c can be regarded inclusively as supporting
482 * extensive flow metadata register, which could mean,
483 * - metadata register copy action by modify header.
484 * - 16 modify header actions is supported.
485 * - reg_c's are preserved across different domain (FDB and NIC) on
486 * packet loopback by flow lookup miss.
488 return config->flow_mreg_c[2] != REG_NONE;
492 * Discover the maximum number of priority available.
495 * Pointer to the Ethernet device structure.
498 * number of supported flow priority on success, a negative errno
499 * value otherwise and rte_errno is set.
502 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
504 struct mlx5_priv *priv = dev->data->dev_private;
506 struct ibv_flow_attr attr;
507 struct ibv_flow_spec_eth eth;
508 struct ibv_flow_spec_action_drop drop;
512 .port = (uint8_t)priv->dev_port,
515 .type = IBV_FLOW_SPEC_ETH,
516 .size = sizeof(struct ibv_flow_spec_eth),
519 .size = sizeof(struct ibv_flow_spec_action_drop),
520 .type = IBV_FLOW_SPEC_ACTION_DROP,
523 struct ibv_flow *flow;
524 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
525 uint16_t vprio[] = { 8, 16 };
533 for (i = 0; i != RTE_DIM(vprio); i++) {
534 flow_attr.attr.priority = vprio[i] - 1;
535 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
538 claim_zero(mlx5_glue->destroy_flow(flow));
541 mlx5_hrxq_drop_release(dev);
544 priority = RTE_DIM(priority_map_3);
547 priority = RTE_DIM(priority_map_5);
552 "port %u verbs maximum priority: %d expected 8/16",
553 dev->data->port_id, priority);
556 DRV_LOG(INFO, "port %u flow maximum priority: %d",
557 dev->data->port_id, priority);
562 * Adjust flow priority based on the highest layer and the request priority.
565 * Pointer to the Ethernet device structure.
566 * @param[in] priority
567 * The rule base priority.
568 * @param[in] subpriority
569 * The priority based on the items.
574 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
575 uint32_t subpriority)
578 struct mlx5_priv *priv = dev->data->dev_private;
580 switch (priv->config.flow_prio) {
581 case RTE_DIM(priority_map_3):
582 res = priority_map_3[priority][subpriority];
584 case RTE_DIM(priority_map_5):
585 res = priority_map_5[priority][subpriority];
592 * Verify the @p item specifications (spec, last, mask) are compatible with the
596 * Item specification.
598 * @p item->mask or flow default bit-masks.
599 * @param[in] nic_mask
600 * Bit-masks covering supported fields by the NIC to compare with user mask.
602 * Bit-masks size in bytes.
604 * Pointer to error structure.
607 * 0 on success, a negative errno value otherwise and rte_errno is set.
610 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
612 const uint8_t *nic_mask,
614 struct rte_flow_error *error)
618 MLX5_ASSERT(nic_mask);
619 for (i = 0; i < size; ++i)
620 if ((nic_mask[i] | mask[i]) != nic_mask[i])
621 return rte_flow_error_set(error, ENOTSUP,
622 RTE_FLOW_ERROR_TYPE_ITEM,
624 "mask enables non supported"
626 if (!item->spec && (item->mask || item->last))
627 return rte_flow_error_set(error, EINVAL,
628 RTE_FLOW_ERROR_TYPE_ITEM, item,
629 "mask/last without a spec is not"
631 if (item->spec && item->last) {
637 for (i = 0; i < size; ++i) {
638 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
639 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
641 ret = memcmp(spec, last, size);
643 return rte_flow_error_set(error, EINVAL,
644 RTE_FLOW_ERROR_TYPE_ITEM,
646 "range is not valid");
652 * Adjust the hash fields according to the @p flow information.
654 * @param[in] dev_flow.
655 * Pointer to the mlx5_flow.
657 * 1 when the hash field is for a tunnel item.
658 * @param[in] layer_types
660 * @param[in] hash_fields
664 * The hash fields that should be used.
667 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
668 int tunnel __rte_unused, uint64_t layer_types,
669 uint64_t hash_fields)
671 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
672 int rss_request_inner = rss_desc->level >= 2;
674 /* Check RSS hash level for tunnel. */
675 if (tunnel && rss_request_inner)
676 hash_fields |= IBV_RX_HASH_INNER;
677 else if (tunnel || rss_request_inner)
680 /* Check if requested layer matches RSS hash fields. */
681 if (!(rss_desc->types & layer_types))
687 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
688 * if several tunnel rules are used on this queue, the tunnel ptype will be
692 * Rx queue to update.
695 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
698 uint32_t tunnel_ptype = 0;
700 /* Look up for the ptype to use. */
701 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
702 if (!rxq_ctrl->flow_tunnels_n[i])
705 tunnel_ptype = tunnels_info[i].ptype;
711 rxq_ctrl->rxq.tunnel = tunnel_ptype;
715 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
719 * Pointer to the Ethernet device structure.
720 * @param[in] dev_handle
721 * Pointer to device flow handle structure.
724 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
725 struct mlx5_flow_handle *dev_handle)
727 struct mlx5_priv *priv = dev->data->dev_private;
728 const int mark = dev_handle->mark;
729 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
730 struct mlx5_hrxq *hrxq;
733 if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
735 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
736 dev_handle->rix_hrxq);
739 for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
740 int idx = hrxq->ind_table->queues[i];
741 struct mlx5_rxq_ctrl *rxq_ctrl =
742 container_of((*priv->rxqs)[idx],
743 struct mlx5_rxq_ctrl, rxq);
746 * To support metadata register copy on Tx loopback,
747 * this must be always enabled (metadata may arive
748 * from other port - not from local flows only.
750 if (priv->config.dv_flow_en &&
751 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
752 mlx5_flow_ext_mreg_supported(dev)) {
753 rxq_ctrl->rxq.mark = 1;
754 rxq_ctrl->flow_mark_n = 1;
756 rxq_ctrl->rxq.mark = 1;
757 rxq_ctrl->flow_mark_n++;
762 /* Increase the counter matching the flow. */
763 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
764 if ((tunnels_info[j].tunnel &
765 dev_handle->layers) ==
766 tunnels_info[j].tunnel) {
767 rxq_ctrl->flow_tunnels_n[j]++;
771 flow_rxq_tunnel_ptype_update(rxq_ctrl);
777 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
780 * Pointer to the Ethernet device structure.
782 * Pointer to flow structure.
785 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
787 struct mlx5_priv *priv = dev->data->dev_private;
789 struct mlx5_flow_handle *dev_handle;
791 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
792 handle_idx, dev_handle, next)
793 flow_drv_rxq_flags_set(dev, dev_handle);
797 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
798 * device flow if no other flow uses it with the same kind of request.
801 * Pointer to Ethernet device.
802 * @param[in] dev_handle
803 * Pointer to the device flow handle structure.
806 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
807 struct mlx5_flow_handle *dev_handle)
809 struct mlx5_priv *priv = dev->data->dev_private;
810 const int mark = dev_handle->mark;
811 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
812 struct mlx5_hrxq *hrxq;
815 if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
817 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
818 dev_handle->rix_hrxq);
821 MLX5_ASSERT(dev->data->dev_started);
822 for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
823 int idx = hrxq->ind_table->queues[i];
824 struct mlx5_rxq_ctrl *rxq_ctrl =
825 container_of((*priv->rxqs)[idx],
826 struct mlx5_rxq_ctrl, rxq);
828 if (priv->config.dv_flow_en &&
829 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
830 mlx5_flow_ext_mreg_supported(dev)) {
831 rxq_ctrl->rxq.mark = 1;
832 rxq_ctrl->flow_mark_n = 1;
834 rxq_ctrl->flow_mark_n--;
835 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
840 /* Decrease the counter matching the flow. */
841 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
842 if ((tunnels_info[j].tunnel &
843 dev_handle->layers) ==
844 tunnels_info[j].tunnel) {
845 rxq_ctrl->flow_tunnels_n[j]--;
849 flow_rxq_tunnel_ptype_update(rxq_ctrl);
855 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
856 * @p flow if no other flow uses it with the same kind of request.
859 * Pointer to Ethernet device.
861 * Pointer to the flow.
864 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
866 struct mlx5_priv *priv = dev->data->dev_private;
868 struct mlx5_flow_handle *dev_handle;
870 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
871 handle_idx, dev_handle, next)
872 flow_drv_rxq_flags_trim(dev, dev_handle);
876 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
879 * Pointer to Ethernet device.
882 flow_rxq_flags_clear(struct rte_eth_dev *dev)
884 struct mlx5_priv *priv = dev->data->dev_private;
887 for (i = 0; i != priv->rxqs_n; ++i) {
888 struct mlx5_rxq_ctrl *rxq_ctrl;
891 if (!(*priv->rxqs)[i])
893 rxq_ctrl = container_of((*priv->rxqs)[i],
894 struct mlx5_rxq_ctrl, rxq);
895 rxq_ctrl->flow_mark_n = 0;
896 rxq_ctrl->rxq.mark = 0;
897 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
898 rxq_ctrl->flow_tunnels_n[j] = 0;
899 rxq_ctrl->rxq.tunnel = 0;
904 * Set the Rx queue dynamic metadata (mask and offset) for a flow
907 * Pointer to the Ethernet device structure.
910 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
912 struct mlx5_priv *priv = dev->data->dev_private;
913 struct mlx5_rxq_data *data;
916 for (i = 0; i != priv->rxqs_n; ++i) {
917 if (!(*priv->rxqs)[i])
919 data = (*priv->rxqs)[i];
920 if (!rte_flow_dynf_metadata_avail()) {
922 data->flow_meta_mask = 0;
923 data->flow_meta_offset = -1;
926 data->flow_meta_mask = rte_flow_dynf_metadata_mask;
927 data->flow_meta_offset = rte_flow_dynf_metadata_offs;
933 * return a pointer to the desired action in the list of actions.
936 * The list of actions to search the action in.
938 * The action to find.
941 * Pointer to the action in the list, if found. NULL otherwise.
943 const struct rte_flow_action *
944 mlx5_flow_find_action(const struct rte_flow_action *actions,
945 enum rte_flow_action_type action)
949 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
950 if (actions->type == action)
956 * Validate the flag action.
958 * @param[in] action_flags
959 * Bit-fields that holds the actions detected until now.
961 * Attributes of flow that includes this action.
963 * Pointer to error structure.
966 * 0 on success, a negative errno value otherwise and rte_errno is set.
969 mlx5_flow_validate_action_flag(uint64_t action_flags,
970 const struct rte_flow_attr *attr,
971 struct rte_flow_error *error)
973 if (action_flags & MLX5_FLOW_ACTION_MARK)
974 return rte_flow_error_set(error, EINVAL,
975 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
976 "can't mark and flag in same flow");
977 if (action_flags & MLX5_FLOW_ACTION_FLAG)
978 return rte_flow_error_set(error, EINVAL,
979 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
981 " actions in same flow");
983 return rte_flow_error_set(error, ENOTSUP,
984 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
985 "flag action not supported for "
991 * Validate the mark action.
994 * Pointer to the queue action.
995 * @param[in] action_flags
996 * Bit-fields that holds the actions detected until now.
998 * Attributes of flow that includes this action.
1000 * Pointer to error structure.
1003 * 0 on success, a negative errno value otherwise and rte_errno is set.
1006 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1007 uint64_t action_flags,
1008 const struct rte_flow_attr *attr,
1009 struct rte_flow_error *error)
1011 const struct rte_flow_action_mark *mark = action->conf;
1014 return rte_flow_error_set(error, EINVAL,
1015 RTE_FLOW_ERROR_TYPE_ACTION,
1017 "configuration cannot be null");
1018 if (mark->id >= MLX5_FLOW_MARK_MAX)
1019 return rte_flow_error_set(error, EINVAL,
1020 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1022 "mark id must in 0 <= id < "
1023 RTE_STR(MLX5_FLOW_MARK_MAX));
1024 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1025 return rte_flow_error_set(error, EINVAL,
1026 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1027 "can't flag and mark in same flow");
1028 if (action_flags & MLX5_FLOW_ACTION_MARK)
1029 return rte_flow_error_set(error, EINVAL,
1030 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1031 "can't have 2 mark actions in same"
1034 return rte_flow_error_set(error, ENOTSUP,
1035 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1036 "mark action not supported for "
1042 * Validate the drop action.
1044 * @param[in] action_flags
1045 * Bit-fields that holds the actions detected until now.
1047 * Attributes of flow that includes this action.
1049 * Pointer to error structure.
1052 * 0 on success, a negative errno value otherwise and rte_errno is set.
1055 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1056 const struct rte_flow_attr *attr,
1057 struct rte_flow_error *error)
1060 return rte_flow_error_set(error, ENOTSUP,
1061 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1062 "drop action not supported for "
1068 * Validate the queue action.
1071 * Pointer to the queue action.
1072 * @param[in] action_flags
1073 * Bit-fields that holds the actions detected until now.
1075 * Pointer to the Ethernet device structure.
1077 * Attributes of flow that includes this action.
1079 * Pointer to error structure.
1082 * 0 on success, a negative errno value otherwise and rte_errno is set.
1085 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1086 uint64_t action_flags,
1087 struct rte_eth_dev *dev,
1088 const struct rte_flow_attr *attr,
1089 struct rte_flow_error *error)
1091 struct mlx5_priv *priv = dev->data->dev_private;
1092 const struct rte_flow_action_queue *queue = action->conf;
1094 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1095 return rte_flow_error_set(error, EINVAL,
1096 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1097 "can't have 2 fate actions in"
1100 return rte_flow_error_set(error, EINVAL,
1101 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1102 NULL, "No Rx queues configured");
1103 if (queue->index >= priv->rxqs_n)
1104 return rte_flow_error_set(error, EINVAL,
1105 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1107 "queue index out of range");
1108 if (!(*priv->rxqs)[queue->index])
1109 return rte_flow_error_set(error, EINVAL,
1110 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1112 "queue is not configured");
1114 return rte_flow_error_set(error, ENOTSUP,
1115 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1116 "queue action not supported for "
1122 * Validate the rss action.
1125 * Pointer to the queue action.
1126 * @param[in] action_flags
1127 * Bit-fields that holds the actions detected until now.
1129 * Pointer to the Ethernet device structure.
1131 * Attributes of flow that includes this action.
1132 * @param[in] item_flags
1133 * Items that were detected.
1135 * Pointer to error structure.
1138 * 0 on success, a negative errno value otherwise and rte_errno is set.
1141 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1142 uint64_t action_flags,
1143 struct rte_eth_dev *dev,
1144 const struct rte_flow_attr *attr,
1145 uint64_t item_flags,
1146 struct rte_flow_error *error)
1148 struct mlx5_priv *priv = dev->data->dev_private;
1149 const struct rte_flow_action_rss *rss = action->conf;
1150 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1153 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1154 return rte_flow_error_set(error, EINVAL,
1155 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1156 "can't have 2 fate actions"
1158 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1159 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1160 return rte_flow_error_set(error, ENOTSUP,
1161 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1163 "RSS hash function not supported");
1164 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1169 return rte_flow_error_set(error, ENOTSUP,
1170 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1172 "tunnel RSS is not supported");
1173 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1174 if (rss->key_len == 0 && rss->key != NULL)
1175 return rte_flow_error_set(error, ENOTSUP,
1176 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1178 "RSS hash key length 0");
1179 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1180 return rte_flow_error_set(error, ENOTSUP,
1181 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1183 "RSS hash key too small");
1184 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1185 return rte_flow_error_set(error, ENOTSUP,
1186 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1188 "RSS hash key too large");
1189 if (rss->queue_num > priv->config.ind_table_max_size)
1190 return rte_flow_error_set(error, ENOTSUP,
1191 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1193 "number of queues too large");
1194 if (rss->types & MLX5_RSS_HF_MASK)
1195 return rte_flow_error_set(error, ENOTSUP,
1196 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1198 "some RSS protocols are not"
1200 if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1201 !(rss->types & ETH_RSS_IP))
1202 return rte_flow_error_set(error, EINVAL,
1203 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1204 "L3 partial RSS requested but L3 RSS"
1205 " type not specified");
1206 if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1207 !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1208 return rte_flow_error_set(error, EINVAL,
1209 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1210 "L4 partial RSS requested but L4 RSS"
1211 " type not specified");
1213 return rte_flow_error_set(error, EINVAL,
1214 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1215 NULL, "No Rx queues configured");
1216 if (!rss->queue_num)
1217 return rte_flow_error_set(error, EINVAL,
1218 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1219 NULL, "No queues configured");
1220 for (i = 0; i != rss->queue_num; ++i) {
1221 if (rss->queue[i] >= priv->rxqs_n)
1222 return rte_flow_error_set
1224 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1225 &rss->queue[i], "queue index out of range");
1226 if (!(*priv->rxqs)[rss->queue[i]])
1227 return rte_flow_error_set
1228 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1229 &rss->queue[i], "queue is not configured");
1232 return rte_flow_error_set(error, ENOTSUP,
1233 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1234 "rss action not supported for "
1236 if (rss->level > 1 && !tunnel)
1237 return rte_flow_error_set(error, EINVAL,
1238 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1239 "inner RSS is not supported for "
1240 "non-tunnel flows");
1245 * Validate the count action.
1248 * Pointer to the Ethernet device structure.
1250 * Attributes of flow that includes this action.
1252 * Pointer to error structure.
1255 * 0 on success, a negative errno value otherwise and rte_errno is set.
1258 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1259 const struct rte_flow_attr *attr,
1260 struct rte_flow_error *error)
1263 return rte_flow_error_set(error, ENOTSUP,
1264 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1265 "count action not supported for "
1271 * Verify the @p attributes will be correctly understood by the NIC and store
1272 * them in the @p flow if everything is correct.
1275 * Pointer to the Ethernet device structure.
1276 * @param[in] attributes
1277 * Pointer to flow attributes
1279 * Pointer to error structure.
1282 * 0 on success, a negative errno value otherwise and rte_errno is set.
1285 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1286 const struct rte_flow_attr *attributes,
1287 struct rte_flow_error *error)
1289 struct mlx5_priv *priv = dev->data->dev_private;
1290 uint32_t priority_max = priv->config.flow_prio - 1;
1292 if (attributes->group)
1293 return rte_flow_error_set(error, ENOTSUP,
1294 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1295 NULL, "groups is not supported");
1296 if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1297 attributes->priority >= priority_max)
1298 return rte_flow_error_set(error, ENOTSUP,
1299 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1300 NULL, "priority out of range");
1301 if (attributes->egress)
1302 return rte_flow_error_set(error, ENOTSUP,
1303 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1304 "egress is not supported");
1305 if (attributes->transfer && !priv->config.dv_esw_en)
1306 return rte_flow_error_set(error, ENOTSUP,
1307 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1308 NULL, "transfer is not supported");
1309 if (!attributes->ingress)
1310 return rte_flow_error_set(error, EINVAL,
1311 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1313 "ingress attribute is mandatory");
1318 * Validate ICMP6 item.
1321 * Item specification.
1322 * @param[in] item_flags
1323 * Bit-fields that holds the items detected until now.
1325 * Pointer to error structure.
1328 * 0 on success, a negative errno value otherwise and rte_errno is set.
1331 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1332 uint64_t item_flags,
1333 uint8_t target_protocol,
1334 struct rte_flow_error *error)
1336 const struct rte_flow_item_icmp6 *mask = item->mask;
1337 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1338 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1339 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1340 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1341 MLX5_FLOW_LAYER_OUTER_L4;
1344 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1345 return rte_flow_error_set(error, EINVAL,
1346 RTE_FLOW_ERROR_TYPE_ITEM, item,
1347 "protocol filtering not compatible"
1348 " with ICMP6 layer");
1349 if (!(item_flags & l3m))
1350 return rte_flow_error_set(error, EINVAL,
1351 RTE_FLOW_ERROR_TYPE_ITEM, item,
1352 "IPv6 is mandatory to filter on"
1354 if (item_flags & l4m)
1355 return rte_flow_error_set(error, EINVAL,
1356 RTE_FLOW_ERROR_TYPE_ITEM, item,
1357 "multiple L4 layers not supported");
1359 mask = &rte_flow_item_icmp6_mask;
1360 ret = mlx5_flow_item_acceptable
1361 (item, (const uint8_t *)mask,
1362 (const uint8_t *)&rte_flow_item_icmp6_mask,
1363 sizeof(struct rte_flow_item_icmp6), error);
1370 * Validate ICMP item.
1373 * Item specification.
1374 * @param[in] item_flags
1375 * Bit-fields that holds the items detected until now.
1377 * Pointer to error structure.
1380 * 0 on success, a negative errno value otherwise and rte_errno is set.
1383 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1384 uint64_t item_flags,
1385 uint8_t target_protocol,
1386 struct rte_flow_error *error)
1388 const struct rte_flow_item_icmp *mask = item->mask;
1389 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1390 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1391 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1392 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1393 MLX5_FLOW_LAYER_OUTER_L4;
1396 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1397 return rte_flow_error_set(error, EINVAL,
1398 RTE_FLOW_ERROR_TYPE_ITEM, item,
1399 "protocol filtering not compatible"
1400 " with ICMP layer");
1401 if (!(item_flags & l3m))
1402 return rte_flow_error_set(error, EINVAL,
1403 RTE_FLOW_ERROR_TYPE_ITEM, item,
1404 "IPv4 is mandatory to filter"
1406 if (item_flags & l4m)
1407 return rte_flow_error_set(error, EINVAL,
1408 RTE_FLOW_ERROR_TYPE_ITEM, item,
1409 "multiple L4 layers not supported");
1411 mask = &rte_flow_item_icmp_mask;
1412 ret = mlx5_flow_item_acceptable
1413 (item, (const uint8_t *)mask,
1414 (const uint8_t *)&rte_flow_item_icmp_mask,
1415 sizeof(struct rte_flow_item_icmp), error);
1422 * Validate Ethernet item.
1425 * Item specification.
1426 * @param[in] item_flags
1427 * Bit-fields that holds the items detected until now.
1429 * Pointer to error structure.
1432 * 0 on success, a negative errno value otherwise and rte_errno is set.
1435 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1436 uint64_t item_flags,
1437 struct rte_flow_error *error)
1439 const struct rte_flow_item_eth *mask = item->mask;
1440 const struct rte_flow_item_eth nic_mask = {
1441 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1442 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1443 .type = RTE_BE16(0xffff),
1446 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1447 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1448 MLX5_FLOW_LAYER_OUTER_L2;
1450 if (item_flags & ethm)
1451 return rte_flow_error_set(error, ENOTSUP,
1452 RTE_FLOW_ERROR_TYPE_ITEM, item,
1453 "multiple L2 layers not supported");
1454 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1455 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1456 return rte_flow_error_set(error, EINVAL,
1457 RTE_FLOW_ERROR_TYPE_ITEM, item,
1458 "L2 layer should not follow "
1460 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1461 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1462 return rte_flow_error_set(error, EINVAL,
1463 RTE_FLOW_ERROR_TYPE_ITEM, item,
1464 "L2 layer should not follow VLAN");
1466 mask = &rte_flow_item_eth_mask;
1467 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1468 (const uint8_t *)&nic_mask,
1469 sizeof(struct rte_flow_item_eth),
1475 * Validate VLAN item.
1478 * Item specification.
1479 * @param[in] item_flags
1480 * Bit-fields that holds the items detected until now.
1482 * Ethernet device flow is being created on.
1484 * Pointer to error structure.
1487 * 0 on success, a negative errno value otherwise and rte_errno is set.
1490 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1491 uint64_t item_flags,
1492 struct rte_eth_dev *dev,
1493 struct rte_flow_error *error)
1495 const struct rte_flow_item_vlan *spec = item->spec;
1496 const struct rte_flow_item_vlan *mask = item->mask;
1497 const struct rte_flow_item_vlan nic_mask = {
1498 .tci = RTE_BE16(UINT16_MAX),
1499 .inner_type = RTE_BE16(UINT16_MAX),
1501 uint16_t vlan_tag = 0;
1502 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1504 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1505 MLX5_FLOW_LAYER_INNER_L4) :
1506 (MLX5_FLOW_LAYER_OUTER_L3 |
1507 MLX5_FLOW_LAYER_OUTER_L4);
1508 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1509 MLX5_FLOW_LAYER_OUTER_VLAN;
1511 if (item_flags & vlanm)
1512 return rte_flow_error_set(error, EINVAL,
1513 RTE_FLOW_ERROR_TYPE_ITEM, item,
1514 "multiple VLAN layers not supported");
1515 else if ((item_flags & l34m) != 0)
1516 return rte_flow_error_set(error, EINVAL,
1517 RTE_FLOW_ERROR_TYPE_ITEM, item,
1518 "VLAN cannot follow L3/L4 layer");
1520 mask = &rte_flow_item_vlan_mask;
1521 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1522 (const uint8_t *)&nic_mask,
1523 sizeof(struct rte_flow_item_vlan),
1527 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1528 struct mlx5_priv *priv = dev->data->dev_private;
1530 if (priv->vmwa_context) {
1532 * Non-NULL context means we have a virtual machine
1533 * and SR-IOV enabled, we have to create VLAN interface
1534 * to make hypervisor to setup E-Switch vport
1535 * context correctly. We avoid creating the multiple
1536 * VLAN interfaces, so we cannot support VLAN tag mask.
1538 return rte_flow_error_set(error, EINVAL,
1539 RTE_FLOW_ERROR_TYPE_ITEM,
1541 "VLAN tag mask is not"
1542 " supported in virtual"
1547 vlan_tag = spec->tci;
1548 vlan_tag &= mask->tci;
1551 * From verbs perspective an empty VLAN is equivalent
1552 * to a packet without VLAN layer.
1555 return rte_flow_error_set(error, EINVAL,
1556 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1558 "VLAN cannot be empty");
1563 * Validate IPV4 item.
1566 * Item specification.
1567 * @param[in] item_flags
1568 * Bit-fields that holds the items detected until now.
1569 * @param[in] acc_mask
1570 * Acceptable mask, if NULL default internal default mask
1571 * will be used to check whether item fields are supported.
1573 * Pointer to error structure.
1576 * 0 on success, a negative errno value otherwise and rte_errno is set.
1579 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1580 uint64_t item_flags,
1582 uint16_t ether_type,
1583 const struct rte_flow_item_ipv4 *acc_mask,
1584 struct rte_flow_error *error)
1586 const struct rte_flow_item_ipv4 *mask = item->mask;
1587 const struct rte_flow_item_ipv4 *spec = item->spec;
1588 const struct rte_flow_item_ipv4 nic_mask = {
1590 .src_addr = RTE_BE32(0xffffffff),
1591 .dst_addr = RTE_BE32(0xffffffff),
1592 .type_of_service = 0xff,
1593 .next_proto_id = 0xff,
1596 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1597 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1598 MLX5_FLOW_LAYER_OUTER_L3;
1599 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1600 MLX5_FLOW_LAYER_OUTER_L4;
1602 uint8_t next_proto = 0xFF;
1603 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1604 MLX5_FLOW_LAYER_OUTER_VLAN |
1605 MLX5_FLOW_LAYER_INNER_VLAN);
1607 if ((last_item & l2_vlan) && ether_type &&
1608 ether_type != RTE_ETHER_TYPE_IPV4)
1609 return rte_flow_error_set(error, EINVAL,
1610 RTE_FLOW_ERROR_TYPE_ITEM, item,
1611 "IPv4 cannot follow L2/VLAN layer "
1612 "which ether type is not IPv4");
1613 if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1615 next_proto = mask->hdr.next_proto_id &
1616 spec->hdr.next_proto_id;
1617 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1618 return rte_flow_error_set(error, EINVAL,
1619 RTE_FLOW_ERROR_TYPE_ITEM,
1624 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1625 return rte_flow_error_set(error, EINVAL,
1626 RTE_FLOW_ERROR_TYPE_ITEM, item,
1627 "wrong tunnel type - IPv6 specified "
1628 "but IPv4 item provided");
1629 if (item_flags & l3m)
1630 return rte_flow_error_set(error, ENOTSUP,
1631 RTE_FLOW_ERROR_TYPE_ITEM, item,
1632 "multiple L3 layers not supported");
1633 else if (item_flags & l4m)
1634 return rte_flow_error_set(error, EINVAL,
1635 RTE_FLOW_ERROR_TYPE_ITEM, item,
1636 "L3 cannot follow an L4 layer.");
1637 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1638 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1639 return rte_flow_error_set(error, EINVAL,
1640 RTE_FLOW_ERROR_TYPE_ITEM, item,
1641 "L3 cannot follow an NVGRE layer.");
1643 mask = &rte_flow_item_ipv4_mask;
1644 else if (mask->hdr.next_proto_id != 0 &&
1645 mask->hdr.next_proto_id != 0xff)
1646 return rte_flow_error_set(error, EINVAL,
1647 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1648 "partial mask is not supported"
1650 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1651 acc_mask ? (const uint8_t *)acc_mask
1652 : (const uint8_t *)&nic_mask,
1653 sizeof(struct rte_flow_item_ipv4),
1661 * Validate IPV6 item.
1664 * Item specification.
1665 * @param[in] item_flags
1666 * Bit-fields that holds the items detected until now.
1667 * @param[in] acc_mask
1668 * Acceptable mask, if NULL default internal default mask
1669 * will be used to check whether item fields are supported.
1671 * Pointer to error structure.
1674 * 0 on success, a negative errno value otherwise and rte_errno is set.
1677 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1678 uint64_t item_flags,
1680 uint16_t ether_type,
1681 const struct rte_flow_item_ipv6 *acc_mask,
1682 struct rte_flow_error *error)
1684 const struct rte_flow_item_ipv6 *mask = item->mask;
1685 const struct rte_flow_item_ipv6 *spec = item->spec;
1686 const struct rte_flow_item_ipv6 nic_mask = {
1689 "\xff\xff\xff\xff\xff\xff\xff\xff"
1690 "\xff\xff\xff\xff\xff\xff\xff\xff",
1692 "\xff\xff\xff\xff\xff\xff\xff\xff"
1693 "\xff\xff\xff\xff\xff\xff\xff\xff",
1694 .vtc_flow = RTE_BE32(0xffffffff),
1698 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1699 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1700 MLX5_FLOW_LAYER_OUTER_L3;
1701 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1702 MLX5_FLOW_LAYER_OUTER_L4;
1704 uint8_t next_proto = 0xFF;
1705 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1706 MLX5_FLOW_LAYER_OUTER_VLAN |
1707 MLX5_FLOW_LAYER_INNER_VLAN);
1709 if ((last_item & l2_vlan) && ether_type &&
1710 ether_type != RTE_ETHER_TYPE_IPV6)
1711 return rte_flow_error_set(error, EINVAL,
1712 RTE_FLOW_ERROR_TYPE_ITEM, item,
1713 "IPv6 cannot follow L2/VLAN layer "
1714 "which ether type is not IPv6");
1715 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1717 next_proto = mask->hdr.proto & spec->hdr.proto;
1718 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1719 return rte_flow_error_set(error, EINVAL,
1720 RTE_FLOW_ERROR_TYPE_ITEM,
1725 if (item_flags & MLX5_FLOW_LAYER_IPIP)
1726 return rte_flow_error_set(error, EINVAL,
1727 RTE_FLOW_ERROR_TYPE_ITEM, item,
1728 "wrong tunnel type - IPv4 specified "
1729 "but IPv6 item provided");
1730 if (item_flags & l3m)
1731 return rte_flow_error_set(error, ENOTSUP,
1732 RTE_FLOW_ERROR_TYPE_ITEM, item,
1733 "multiple L3 layers not supported");
1734 else if (item_flags & l4m)
1735 return rte_flow_error_set(error, EINVAL,
1736 RTE_FLOW_ERROR_TYPE_ITEM, item,
1737 "L3 cannot follow an L4 layer.");
1738 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1739 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1740 return rte_flow_error_set(error, EINVAL,
1741 RTE_FLOW_ERROR_TYPE_ITEM, item,
1742 "L3 cannot follow an NVGRE layer.");
1744 mask = &rte_flow_item_ipv6_mask;
1745 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1746 acc_mask ? (const uint8_t *)acc_mask
1747 : (const uint8_t *)&nic_mask,
1748 sizeof(struct rte_flow_item_ipv6),
1756 * Validate UDP item.
1759 * Item specification.
1760 * @param[in] item_flags
1761 * Bit-fields that holds the items detected until now.
1762 * @param[in] target_protocol
1763 * The next protocol in the previous item.
1764 * @param[in] flow_mask
1765 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1767 * Pointer to error structure.
1770 * 0 on success, a negative errno value otherwise and rte_errno is set.
1773 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1774 uint64_t item_flags,
1775 uint8_t target_protocol,
1776 struct rte_flow_error *error)
1778 const struct rte_flow_item_udp *mask = item->mask;
1779 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1780 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1781 MLX5_FLOW_LAYER_OUTER_L3;
1782 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1783 MLX5_FLOW_LAYER_OUTER_L4;
1786 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1787 return rte_flow_error_set(error, EINVAL,
1788 RTE_FLOW_ERROR_TYPE_ITEM, item,
1789 "protocol filtering not compatible"
1791 if (!(item_flags & l3m))
1792 return rte_flow_error_set(error, EINVAL,
1793 RTE_FLOW_ERROR_TYPE_ITEM, item,
1794 "L3 is mandatory to filter on L4");
1795 if (item_flags & l4m)
1796 return rte_flow_error_set(error, EINVAL,
1797 RTE_FLOW_ERROR_TYPE_ITEM, item,
1798 "multiple L4 layers not supported");
1800 mask = &rte_flow_item_udp_mask;
1801 ret = mlx5_flow_item_acceptable
1802 (item, (const uint8_t *)mask,
1803 (const uint8_t *)&rte_flow_item_udp_mask,
1804 sizeof(struct rte_flow_item_udp), error);
1811 * Validate TCP item.
1814 * Item specification.
1815 * @param[in] item_flags
1816 * Bit-fields that holds the items detected until now.
1817 * @param[in] target_protocol
1818 * The next protocol in the previous item.
1820 * Pointer to error structure.
1823 * 0 on success, a negative errno value otherwise and rte_errno is set.
1826 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1827 uint64_t item_flags,
1828 uint8_t target_protocol,
1829 const struct rte_flow_item_tcp *flow_mask,
1830 struct rte_flow_error *error)
1832 const struct rte_flow_item_tcp *mask = item->mask;
1833 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1834 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1835 MLX5_FLOW_LAYER_OUTER_L3;
1836 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1837 MLX5_FLOW_LAYER_OUTER_L4;
1840 MLX5_ASSERT(flow_mask);
1841 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1842 return rte_flow_error_set(error, EINVAL,
1843 RTE_FLOW_ERROR_TYPE_ITEM, item,
1844 "protocol filtering not compatible"
1846 if (!(item_flags & l3m))
1847 return rte_flow_error_set(error, EINVAL,
1848 RTE_FLOW_ERROR_TYPE_ITEM, item,
1849 "L3 is mandatory to filter on L4");
1850 if (item_flags & l4m)
1851 return rte_flow_error_set(error, EINVAL,
1852 RTE_FLOW_ERROR_TYPE_ITEM, item,
1853 "multiple L4 layers not supported");
1855 mask = &rte_flow_item_tcp_mask;
1856 ret = mlx5_flow_item_acceptable
1857 (item, (const uint8_t *)mask,
1858 (const uint8_t *)flow_mask,
1859 sizeof(struct rte_flow_item_tcp), error);
1866 * Validate VXLAN item.
1869 * Item specification.
1870 * @param[in] item_flags
1871 * Bit-fields that holds the items detected until now.
1872 * @param[in] target_protocol
1873 * The next protocol in the previous item.
1875 * Pointer to error structure.
1878 * 0 on success, a negative errno value otherwise and rte_errno is set.
1881 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1882 uint64_t item_flags,
1883 struct rte_flow_error *error)
1885 const struct rte_flow_item_vxlan *spec = item->spec;
1886 const struct rte_flow_item_vxlan *mask = item->mask;
1891 } id = { .vlan_id = 0, };
1894 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1895 return rte_flow_error_set(error, ENOTSUP,
1896 RTE_FLOW_ERROR_TYPE_ITEM, item,
1897 "multiple tunnel layers not"
1900 * Verify only UDPv4 is present as defined in
1901 * https://tools.ietf.org/html/rfc7348
1903 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1904 return rte_flow_error_set(error, EINVAL,
1905 RTE_FLOW_ERROR_TYPE_ITEM, item,
1906 "no outer UDP layer found");
1908 mask = &rte_flow_item_vxlan_mask;
1909 ret = mlx5_flow_item_acceptable
1910 (item, (const uint8_t *)mask,
1911 (const uint8_t *)&rte_flow_item_vxlan_mask,
1912 sizeof(struct rte_flow_item_vxlan),
1917 memcpy(&id.vni[1], spec->vni, 3);
1918 memcpy(&id.vni[1], mask->vni, 3);
1920 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1921 return rte_flow_error_set(error, ENOTSUP,
1922 RTE_FLOW_ERROR_TYPE_ITEM, item,
1923 "VXLAN tunnel must be fully defined");
1928 * Validate VXLAN_GPE item.
1931 * Item specification.
1932 * @param[in] item_flags
1933 * Bit-fields that holds the items detected until now.
1935 * Pointer to the private data structure.
1936 * @param[in] target_protocol
1937 * The next protocol in the previous item.
1939 * Pointer to error structure.
1942 * 0 on success, a negative errno value otherwise and rte_errno is set.
1945 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1946 uint64_t item_flags,
1947 struct rte_eth_dev *dev,
1948 struct rte_flow_error *error)
1950 struct mlx5_priv *priv = dev->data->dev_private;
1951 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1952 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1957 } id = { .vlan_id = 0, };
1959 if (!priv->config.l3_vxlan_en)
1960 return rte_flow_error_set(error, ENOTSUP,
1961 RTE_FLOW_ERROR_TYPE_ITEM, item,
1962 "L3 VXLAN is not enabled by device"
1963 " parameter and/or not configured in"
1965 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1966 return rte_flow_error_set(error, ENOTSUP,
1967 RTE_FLOW_ERROR_TYPE_ITEM, item,
1968 "multiple tunnel layers not"
1971 * Verify only UDPv4 is present as defined in
1972 * https://tools.ietf.org/html/rfc7348
1974 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1975 return rte_flow_error_set(error, EINVAL,
1976 RTE_FLOW_ERROR_TYPE_ITEM, item,
1977 "no outer UDP layer found");
1979 mask = &rte_flow_item_vxlan_gpe_mask;
1980 ret = mlx5_flow_item_acceptable
1981 (item, (const uint8_t *)mask,
1982 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1983 sizeof(struct rte_flow_item_vxlan_gpe),
1989 return rte_flow_error_set(error, ENOTSUP,
1990 RTE_FLOW_ERROR_TYPE_ITEM,
1992 "VxLAN-GPE protocol"
1994 memcpy(&id.vni[1], spec->vni, 3);
1995 memcpy(&id.vni[1], mask->vni, 3);
1997 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1998 return rte_flow_error_set(error, ENOTSUP,
1999 RTE_FLOW_ERROR_TYPE_ITEM, item,
2000 "VXLAN-GPE tunnel must be fully"
2005 * Validate GRE Key item.
2008 * Item specification.
2009 * @param[in] item_flags
2010 * Bit flags to mark detected items.
2011 * @param[in] gre_item
2012 * Pointer to gre_item
2014 * Pointer to error structure.
2017 * 0 on success, a negative errno value otherwise and rte_errno is set.
2020 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2021 uint64_t item_flags,
2022 const struct rte_flow_item *gre_item,
2023 struct rte_flow_error *error)
2025 const rte_be32_t *mask = item->mask;
2027 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2028 const struct rte_flow_item_gre *gre_spec;
2029 const struct rte_flow_item_gre *gre_mask;
2031 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2032 return rte_flow_error_set(error, ENOTSUP,
2033 RTE_FLOW_ERROR_TYPE_ITEM, item,
2034 "Multiple GRE key not support");
2035 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2036 return rte_flow_error_set(error, ENOTSUP,
2037 RTE_FLOW_ERROR_TYPE_ITEM, item,
2038 "No preceding GRE header");
2039 if (item_flags & MLX5_FLOW_LAYER_INNER)
2040 return rte_flow_error_set(error, ENOTSUP,
2041 RTE_FLOW_ERROR_TYPE_ITEM, item,
2042 "GRE key following a wrong item");
2043 gre_mask = gre_item->mask;
2045 gre_mask = &rte_flow_item_gre_mask;
2046 gre_spec = gre_item->spec;
2047 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2048 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2049 return rte_flow_error_set(error, EINVAL,
2050 RTE_FLOW_ERROR_TYPE_ITEM, item,
2051 "Key bit must be on");
2054 mask = &gre_key_default_mask;
2055 ret = mlx5_flow_item_acceptable
2056 (item, (const uint8_t *)mask,
2057 (const uint8_t *)&gre_key_default_mask,
2058 sizeof(rte_be32_t), error);
2063 * Validate GRE item.
2066 * Item specification.
2067 * @param[in] item_flags
2068 * Bit flags to mark detected items.
2069 * @param[in] target_protocol
2070 * The next protocol in the previous item.
2072 * Pointer to error structure.
2075 * 0 on success, a negative errno value otherwise and rte_errno is set.
2078 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2079 uint64_t item_flags,
2080 uint8_t target_protocol,
2081 struct rte_flow_error *error)
2083 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2084 const struct rte_flow_item_gre *mask = item->mask;
2086 const struct rte_flow_item_gre nic_mask = {
2087 .c_rsvd0_ver = RTE_BE16(0xB000),
2088 .protocol = RTE_BE16(UINT16_MAX),
2091 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2092 return rte_flow_error_set(error, EINVAL,
2093 RTE_FLOW_ERROR_TYPE_ITEM, item,
2094 "protocol filtering not compatible"
2095 " with this GRE layer");
2096 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2097 return rte_flow_error_set(error, ENOTSUP,
2098 RTE_FLOW_ERROR_TYPE_ITEM, item,
2099 "multiple tunnel layers not"
2101 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2102 return rte_flow_error_set(error, ENOTSUP,
2103 RTE_FLOW_ERROR_TYPE_ITEM, item,
2104 "L3 Layer is missing");
2106 mask = &rte_flow_item_gre_mask;
2107 ret = mlx5_flow_item_acceptable
2108 (item, (const uint8_t *)mask,
2109 (const uint8_t *)&nic_mask,
2110 sizeof(struct rte_flow_item_gre), error);
2113 #ifndef HAVE_MLX5DV_DR
2114 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2115 if (spec && (spec->protocol & mask->protocol))
2116 return rte_flow_error_set(error, ENOTSUP,
2117 RTE_FLOW_ERROR_TYPE_ITEM, item,
2118 "without MPLS support the"
2119 " specification cannot be used for"
2127 * Validate Geneve item.
2130 * Item specification.
2131 * @param[in] itemFlags
2132 * Bit-fields that holds the items detected until now.
2134 * Pointer to the private data structure.
2136 * Pointer to error structure.
2139 * 0 on success, a negative errno value otherwise and rte_errno is set.
2143 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2144 uint64_t item_flags,
2145 struct rte_eth_dev *dev,
2146 struct rte_flow_error *error)
2148 struct mlx5_priv *priv = dev->data->dev_private;
2149 const struct rte_flow_item_geneve *spec = item->spec;
2150 const struct rte_flow_item_geneve *mask = item->mask;
2153 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2154 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2155 const struct rte_flow_item_geneve nic_mask = {
2156 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2157 .vni = "\xff\xff\xff",
2158 .protocol = RTE_BE16(UINT16_MAX),
2161 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2162 return rte_flow_error_set(error, ENOTSUP,
2163 RTE_FLOW_ERROR_TYPE_ITEM, item,
2164 "L3 Geneve is not enabled by device"
2165 " parameter and/or not configured in"
2167 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2168 return rte_flow_error_set(error, ENOTSUP,
2169 RTE_FLOW_ERROR_TYPE_ITEM, item,
2170 "multiple tunnel layers not"
2173 * Verify only UDPv4 is present as defined in
2174 * https://tools.ietf.org/html/rfc7348
2176 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2177 return rte_flow_error_set(error, EINVAL,
2178 RTE_FLOW_ERROR_TYPE_ITEM, item,
2179 "no outer UDP layer found");
2181 mask = &rte_flow_item_geneve_mask;
2182 ret = mlx5_flow_item_acceptable
2183 (item, (const uint8_t *)mask,
2184 (const uint8_t *)&nic_mask,
2185 sizeof(struct rte_flow_item_geneve), error);
2189 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2190 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2191 MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2192 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2193 return rte_flow_error_set(error, ENOTSUP,
2194 RTE_FLOW_ERROR_TYPE_ITEM,
2196 "Geneve protocol unsupported"
2197 " fields are being used");
2198 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2199 return rte_flow_error_set
2201 RTE_FLOW_ERROR_TYPE_ITEM,
2203 "Unsupported Geneve options length");
2205 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2206 return rte_flow_error_set
2208 RTE_FLOW_ERROR_TYPE_ITEM, item,
2209 "Geneve tunnel must be fully defined");
2214 * Validate MPLS item.
2217 * Pointer to the rte_eth_dev structure.
2219 * Item specification.
2220 * @param[in] item_flags
2221 * Bit-fields that holds the items detected until now.
2222 * @param[in] prev_layer
2223 * The protocol layer indicated in previous item.
2225 * Pointer to error structure.
2228 * 0 on success, a negative errno value otherwise and rte_errno is set.
2231 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2232 const struct rte_flow_item *item __rte_unused,
2233 uint64_t item_flags __rte_unused,
2234 uint64_t prev_layer __rte_unused,
2235 struct rte_flow_error *error)
2237 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2238 const struct rte_flow_item_mpls *mask = item->mask;
2239 struct mlx5_priv *priv = dev->data->dev_private;
2242 if (!priv->config.mpls_en)
2243 return rte_flow_error_set(error, ENOTSUP,
2244 RTE_FLOW_ERROR_TYPE_ITEM, item,
2245 "MPLS not supported or"
2246 " disabled in firmware"
2248 /* MPLS over IP, UDP, GRE is allowed */
2249 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2250 MLX5_FLOW_LAYER_OUTER_L4_UDP |
2251 MLX5_FLOW_LAYER_GRE)))
2252 return rte_flow_error_set(error, EINVAL,
2253 RTE_FLOW_ERROR_TYPE_ITEM, item,
2254 "protocol filtering not compatible"
2255 " with MPLS layer");
2256 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2257 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2258 !(item_flags & MLX5_FLOW_LAYER_GRE))
2259 return rte_flow_error_set(error, ENOTSUP,
2260 RTE_FLOW_ERROR_TYPE_ITEM, item,
2261 "multiple tunnel layers not"
2264 mask = &rte_flow_item_mpls_mask;
2265 ret = mlx5_flow_item_acceptable
2266 (item, (const uint8_t *)mask,
2267 (const uint8_t *)&rte_flow_item_mpls_mask,
2268 sizeof(struct rte_flow_item_mpls), error);
2273 return rte_flow_error_set(error, ENOTSUP,
2274 RTE_FLOW_ERROR_TYPE_ITEM, item,
2275 "MPLS is not supported by Verbs, please"
2281 * Validate NVGRE item.
2284 * Item specification.
2285 * @param[in] item_flags
2286 * Bit flags to mark detected items.
2287 * @param[in] target_protocol
2288 * The next protocol in the previous item.
2290 * Pointer to error structure.
2293 * 0 on success, a negative errno value otherwise and rte_errno is set.
2296 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2297 uint64_t item_flags,
2298 uint8_t target_protocol,
2299 struct rte_flow_error *error)
2301 const struct rte_flow_item_nvgre *mask = item->mask;
2304 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2305 return rte_flow_error_set(error, EINVAL,
2306 RTE_FLOW_ERROR_TYPE_ITEM, item,
2307 "protocol filtering not compatible"
2308 " with this GRE layer");
2309 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2310 return rte_flow_error_set(error, ENOTSUP,
2311 RTE_FLOW_ERROR_TYPE_ITEM, item,
2312 "multiple tunnel layers not"
2314 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2315 return rte_flow_error_set(error, ENOTSUP,
2316 RTE_FLOW_ERROR_TYPE_ITEM, item,
2317 "L3 Layer is missing");
2319 mask = &rte_flow_item_nvgre_mask;
2320 ret = mlx5_flow_item_acceptable
2321 (item, (const uint8_t *)mask,
2322 (const uint8_t *)&rte_flow_item_nvgre_mask,
2323 sizeof(struct rte_flow_item_nvgre), error);
2329 /* Allocate unique ID for the split Q/RSS subflows. */
2331 flow_qrss_get_id(struct rte_eth_dev *dev)
2333 struct mlx5_priv *priv = dev->data->dev_private;
2334 uint32_t qrss_id, ret;
2336 ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2339 MLX5_ASSERT(qrss_id);
2343 /* Free unique ID for the split Q/RSS subflows. */
2345 flow_qrss_free_id(struct rte_eth_dev *dev, uint32_t qrss_id)
2347 struct mlx5_priv *priv = dev->data->dev_private;
2350 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2354 * Release resource related QUEUE/RSS action split.
2357 * Pointer to Ethernet device.
2359 * Flow to release id's from.
2362 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2363 struct rte_flow *flow)
2365 struct mlx5_priv *priv = dev->data->dev_private;
2366 uint32_t handle_idx;
2367 struct mlx5_flow_handle *dev_handle;
2369 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2370 handle_idx, dev_handle, next)
2371 if (dev_handle->split_flow_id)
2372 flow_qrss_free_id(dev, dev_handle->split_flow_id);
2376 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2377 const struct rte_flow_attr *attr __rte_unused,
2378 const struct rte_flow_item items[] __rte_unused,
2379 const struct rte_flow_action actions[] __rte_unused,
2380 bool external __rte_unused,
2381 int hairpin __rte_unused,
2382 struct rte_flow_error *error)
2384 return rte_flow_error_set(error, ENOTSUP,
2385 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2388 static struct mlx5_flow *
2389 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2390 const struct rte_flow_attr *attr __rte_unused,
2391 const struct rte_flow_item items[] __rte_unused,
2392 const struct rte_flow_action actions[] __rte_unused,
2393 struct rte_flow_error *error)
2395 rte_flow_error_set(error, ENOTSUP,
2396 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2401 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2402 struct mlx5_flow *dev_flow __rte_unused,
2403 const struct rte_flow_attr *attr __rte_unused,
2404 const struct rte_flow_item items[] __rte_unused,
2405 const struct rte_flow_action actions[] __rte_unused,
2406 struct rte_flow_error *error)
2408 return rte_flow_error_set(error, ENOTSUP,
2409 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2413 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2414 struct rte_flow *flow __rte_unused,
2415 struct rte_flow_error *error)
2417 return rte_flow_error_set(error, ENOTSUP,
2418 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2422 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2423 struct rte_flow *flow __rte_unused)
2428 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2429 struct rte_flow *flow __rte_unused)
2434 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2435 struct rte_flow *flow __rte_unused,
2436 const struct rte_flow_action *actions __rte_unused,
2437 void *data __rte_unused,
2438 struct rte_flow_error *error)
2440 return rte_flow_error_set(error, ENOTSUP,
2441 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2444 /* Void driver to protect from null pointer reference. */
2445 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2446 .validate = flow_null_validate,
2447 .prepare = flow_null_prepare,
2448 .translate = flow_null_translate,
2449 .apply = flow_null_apply,
2450 .remove = flow_null_remove,
2451 .destroy = flow_null_destroy,
2452 .query = flow_null_query,
2456 * Select flow driver type according to flow attributes and device
2460 * Pointer to the dev structure.
2462 * Pointer to the flow attributes.
2465 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2467 static enum mlx5_flow_drv_type
2468 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2470 struct mlx5_priv *priv = dev->data->dev_private;
2471 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2473 if (attr->transfer && priv->config.dv_esw_en)
2474 type = MLX5_FLOW_TYPE_DV;
2475 if (!attr->transfer)
2476 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2477 MLX5_FLOW_TYPE_VERBS;
2481 #define flow_get_drv_ops(type) flow_drv_ops[type]
2484 * Flow driver validation API. This abstracts calling driver specific functions.
2485 * The type of flow driver is determined according to flow attributes.
2488 * Pointer to the dev structure.
2490 * Pointer to the flow attributes.
2492 * Pointer to the list of items.
2493 * @param[in] actions
2494 * Pointer to the list of actions.
2495 * @param[in] external
2496 * This flow rule is created by request external to PMD.
2497 * @param[in] hairpin
2498 * Number of hairpin TX actions, 0 means classic flow.
2500 * Pointer to the error structure.
2503 * 0 on success, a negative errno value otherwise and rte_errno is set.
2506 flow_drv_validate(struct rte_eth_dev *dev,
2507 const struct rte_flow_attr *attr,
2508 const struct rte_flow_item items[],
2509 const struct rte_flow_action actions[],
2510 bool external, int hairpin, struct rte_flow_error *error)
2512 const struct mlx5_flow_driver_ops *fops;
2513 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2515 fops = flow_get_drv_ops(type);
2516 return fops->validate(dev, attr, items, actions, external,
2521 * Flow driver preparation API. This abstracts calling driver specific
2522 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2523 * calculates the size of memory required for device flow, allocates the memory,
2524 * initializes the device flow and returns the pointer.
2527 * This function initializes device flow structure such as dv or verbs in
2528 * struct mlx5_flow. However, it is caller's responsibility to initialize the
2529 * rest. For example, adding returning device flow to flow->dev_flow list and
2530 * setting backward reference to the flow should be done out of this function.
2531 * layers field is not filled either.
2534 * Pointer to the dev structure.
2536 * Pointer to the flow attributes.
2538 * Pointer to the list of items.
2539 * @param[in] actions
2540 * Pointer to the list of actions.
2541 * @param[in] flow_idx
2542 * This memory pool index to the flow.
2544 * Pointer to the error structure.
2547 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
2549 static inline struct mlx5_flow *
2550 flow_drv_prepare(struct rte_eth_dev *dev,
2551 const struct rte_flow *flow,
2552 const struct rte_flow_attr *attr,
2553 const struct rte_flow_item items[],
2554 const struct rte_flow_action actions[],
2556 struct rte_flow_error *error)
2558 const struct mlx5_flow_driver_ops *fops;
2559 enum mlx5_flow_drv_type type = flow->drv_type;
2560 struct mlx5_flow *mlx5_flow = NULL;
2562 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2563 fops = flow_get_drv_ops(type);
2564 mlx5_flow = fops->prepare(dev, attr, items, actions, error);
2566 mlx5_flow->flow_idx = flow_idx;
2571 * Flow driver translation API. This abstracts calling driver specific
2572 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2573 * translates a generic flow into a driver flow. flow_drv_prepare() must
2577 * dev_flow->layers could be filled as a result of parsing during translation
2578 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2579 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2580 * flow->actions could be overwritten even though all the expanded dev_flows
2581 * have the same actions.
2584 * Pointer to the rte dev structure.
2585 * @param[in, out] dev_flow
2586 * Pointer to the mlx5 flow.
2588 * Pointer to the flow attributes.
2590 * Pointer to the list of items.
2591 * @param[in] actions
2592 * Pointer to the list of actions.
2594 * Pointer to the error structure.
2597 * 0 on success, a negative errno value otherwise and rte_errno is set.
2600 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2601 const struct rte_flow_attr *attr,
2602 const struct rte_flow_item items[],
2603 const struct rte_flow_action actions[],
2604 struct rte_flow_error *error)
2606 const struct mlx5_flow_driver_ops *fops;
2607 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2609 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2610 fops = flow_get_drv_ops(type);
2611 return fops->translate(dev, dev_flow, attr, items, actions, error);
2615 * Flow driver apply API. This abstracts calling driver specific functions.
2616 * Parent flow (rte_flow) should have driver type (drv_type). It applies
2617 * translated driver flows on to device. flow_drv_translate() must precede.
2620 * Pointer to Ethernet device structure.
2621 * @param[in, out] flow
2622 * Pointer to flow structure.
2624 * Pointer to error structure.
2627 * 0 on success, a negative errno value otherwise and rte_errno is set.
2630 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2631 struct rte_flow_error *error)
2633 const struct mlx5_flow_driver_ops *fops;
2634 enum mlx5_flow_drv_type type = flow->drv_type;
2636 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2637 fops = flow_get_drv_ops(type);
2638 return fops->apply(dev, flow, error);
2642 * Flow driver remove API. This abstracts calling driver specific functions.
2643 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2644 * on device. All the resources of the flow should be freed by calling
2645 * flow_drv_destroy().
2648 * Pointer to Ethernet device.
2649 * @param[in, out] flow
2650 * Pointer to flow structure.
2653 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2655 const struct mlx5_flow_driver_ops *fops;
2656 enum mlx5_flow_drv_type type = flow->drv_type;
2658 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2659 fops = flow_get_drv_ops(type);
2660 fops->remove(dev, flow);
2664 * Flow driver destroy API. This abstracts calling driver specific functions.
2665 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2666 * on device and releases resources of the flow.
2669 * Pointer to Ethernet device.
2670 * @param[in, out] flow
2671 * Pointer to flow structure.
2674 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2676 const struct mlx5_flow_driver_ops *fops;
2677 enum mlx5_flow_drv_type type = flow->drv_type;
2679 flow_mreg_split_qrss_release(dev, flow);
2680 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2681 fops = flow_get_drv_ops(type);
2682 fops->destroy(dev, flow);
2686 * Get RSS action from the action list.
2688 * @param[in] actions
2689 * Pointer to the list of actions.
2692 * Pointer to the RSS action if exist, else return NULL.
2694 static const struct rte_flow_action_rss*
2695 flow_get_rss_action(const struct rte_flow_action actions[])
2697 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2698 switch (actions->type) {
2699 case RTE_FLOW_ACTION_TYPE_RSS:
2700 return (const struct rte_flow_action_rss *)
2710 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2712 const struct rte_flow_item *item;
2713 unsigned int has_vlan = 0;
2715 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2716 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2722 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2723 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2724 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2725 MLX5_EXPANSION_ROOT_OUTER;
2729 * Get layer flags from the prefix flow.
2731 * Some flows may be split to several subflows, the prefix subflow gets the
2732 * match items and the suffix sub flow gets the actions.
2733 * Some actions need the user defined match item flags to get the detail for
2735 * This function helps the suffix flow to get the item layer flags from prefix
2738 * @param[in] dev_flow
2739 * Pointer the created preifx subflow.
2742 * The layers get from prefix subflow.
2744 static inline uint64_t
2745 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
2747 uint64_t layers = 0;
2750 * Layers bits could be localization, but usually the compiler will
2751 * help to do the optimization work for source code.
2752 * If no decap actions, use the layers directly.
2754 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
2755 return dev_flow->handle->layers;
2756 /* Convert L3 layers with decap action. */
2757 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
2758 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2759 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
2760 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2761 /* Convert L4 layers with decap action. */
2762 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
2763 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
2764 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
2765 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
2770 * Get metadata split action information.
2772 * @param[in] actions
2773 * Pointer to the list of actions.
2775 * Pointer to the return pointer.
2776 * @param[out] qrss_type
2777 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2778 * if no QUEUE/RSS is found.
2779 * @param[out] encap_idx
2780 * Pointer to the index of the encap action if exists, otherwise the last
2784 * Total number of actions.
2787 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
2788 const struct rte_flow_action **qrss,
2791 const struct rte_flow_action_raw_encap *raw_encap;
2793 int raw_decap_idx = -1;
2796 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2797 switch (actions->type) {
2798 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2799 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2800 *encap_idx = actions_n;
2802 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2803 raw_decap_idx = actions_n;
2805 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2806 raw_encap = actions->conf;
2807 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2808 *encap_idx = raw_decap_idx != -1 ?
2809 raw_decap_idx : actions_n;
2811 case RTE_FLOW_ACTION_TYPE_QUEUE:
2812 case RTE_FLOW_ACTION_TYPE_RSS:
2820 if (*encap_idx == -1)
2821 *encap_idx = actions_n;
2822 /* Count RTE_FLOW_ACTION_TYPE_END. */
2823 return actions_n + 1;
2827 * Check meter action from the action list.
2829 * @param[in] actions
2830 * Pointer to the list of actions.
2832 * Pointer to the meter exist flag.
2835 * Total number of actions.
2838 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
2844 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2845 switch (actions->type) {
2846 case RTE_FLOW_ACTION_TYPE_METER:
2854 /* Count RTE_FLOW_ACTION_TYPE_END. */
2855 return actions_n + 1;
2859 * Check if the flow should be splited due to hairpin.
2860 * The reason for the split is that in current HW we can't
2861 * support encap on Rx, so if a flow have encap we move it
2865 * Pointer to Ethernet device.
2867 * Flow rule attributes.
2868 * @param[in] actions
2869 * Associated actions (list terminated by the END action).
2872 * > 0 the number of actions and the flow should be split,
2873 * 0 when no split required.
2876 flow_check_hairpin_split(struct rte_eth_dev *dev,
2877 const struct rte_flow_attr *attr,
2878 const struct rte_flow_action actions[])
2880 int queue_action = 0;
2883 const struct rte_flow_action_queue *queue;
2884 const struct rte_flow_action_rss *rss;
2885 const struct rte_flow_action_raw_encap *raw_encap;
2889 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2890 switch (actions->type) {
2891 case RTE_FLOW_ACTION_TYPE_QUEUE:
2892 queue = actions->conf;
2895 if (mlx5_rxq_get_type(dev, queue->index) !=
2896 MLX5_RXQ_TYPE_HAIRPIN)
2901 case RTE_FLOW_ACTION_TYPE_RSS:
2902 rss = actions->conf;
2903 if (rss == NULL || rss->queue_num == 0)
2905 if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2906 MLX5_RXQ_TYPE_HAIRPIN)
2911 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2912 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2916 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2917 raw_encap = actions->conf;
2918 if (raw_encap->size >
2919 (sizeof(struct rte_flow_item_eth) +
2920 sizeof(struct rte_flow_item_ipv4)))
2929 if (encap == 1 && queue_action)
2934 /* Declare flow create/destroy prototype in advance. */
2936 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
2937 const struct rte_flow_attr *attr,
2938 const struct rte_flow_item items[],
2939 const struct rte_flow_action actions[],
2940 bool external, struct rte_flow_error *error);
2943 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
2947 * Add a flow of copying flow metadata registers in RX_CP_TBL.
2949 * As mark_id is unique, if there's already a registered flow for the mark_id,
2950 * return by increasing the reference counter of the resource. Otherwise, create
2951 * the resource (mcp_res) and flow.
2954 * - If ingress port is ANY and reg_c[1] is mark_id,
2955 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2957 * For default flow (zero mark_id), flow is like,
2958 * - If ingress port is ANY,
2959 * reg_b := reg_c[0] and jump to RX_ACT_TBL.
2962 * Pointer to Ethernet device.
2964 * ID of MARK action, zero means default flow for META.
2966 * Perform verbose error reporting if not NULL.
2969 * Associated resource on success, NULL otherwise and rte_errno is set.
2971 static struct mlx5_flow_mreg_copy_resource *
2972 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2973 struct rte_flow_error *error)
2975 struct mlx5_priv *priv = dev->data->dev_private;
2976 struct rte_flow_attr attr = {
2977 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2980 struct mlx5_rte_flow_item_tag tag_spec = {
2983 struct rte_flow_item items[] = {
2984 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2986 struct rte_flow_action_mark ftag = {
2989 struct mlx5_flow_action_copy_mreg cp_mreg = {
2993 struct rte_flow_action_jump jump = {
2994 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2996 struct rte_flow_action actions[] = {
2997 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2999 struct mlx5_flow_mreg_copy_resource *mcp_res;
3003 /* Fill the register fileds in the flow. */
3004 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3008 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3012 /* Check if already registered. */
3013 MLX5_ASSERT(priv->mreg_cp_tbl);
3014 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
3016 /* For non-default rule. */
3017 if (mark_id != MLX5_DEFAULT_COPY_ID)
3019 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID ||
3020 mcp_res->refcnt == 1);
3023 /* Provide the full width of FLAG specific value. */
3024 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3025 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3026 /* Build a new flow. */
3027 if (mark_id != MLX5_DEFAULT_COPY_ID) {
3028 items[0] = (struct rte_flow_item){
3029 .type = (enum rte_flow_item_type)
3030 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3033 items[1] = (struct rte_flow_item){
3034 .type = RTE_FLOW_ITEM_TYPE_END,
3036 actions[0] = (struct rte_flow_action){
3037 .type = (enum rte_flow_action_type)
3038 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3041 actions[1] = (struct rte_flow_action){
3042 .type = (enum rte_flow_action_type)
3043 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3046 actions[2] = (struct rte_flow_action){
3047 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3050 actions[3] = (struct rte_flow_action){
3051 .type = RTE_FLOW_ACTION_TYPE_END,
3054 /* Default rule, wildcard match. */
3055 attr.priority = MLX5_FLOW_PRIO_RSVD;
3056 items[0] = (struct rte_flow_item){
3057 .type = RTE_FLOW_ITEM_TYPE_END,
3059 actions[0] = (struct rte_flow_action){
3060 .type = (enum rte_flow_action_type)
3061 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3064 actions[1] = (struct rte_flow_action){
3065 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3068 actions[2] = (struct rte_flow_action){
3069 .type = RTE_FLOW_ACTION_TYPE_END,
3072 /* Build a new entry. */
3073 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3080 * The copy Flows are not included in any list. There
3081 * ones are referenced from other Flows and can not
3082 * be applied, removed, deleted in ardbitrary order
3083 * by list traversing.
3085 mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3086 actions, false, error);
3087 if (!mcp_res->rix_flow)
3090 mcp_res->hlist_ent.key = mark_id;
3091 ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3092 &mcp_res->hlist_ent);
3098 if (mcp_res->rix_flow)
3099 flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3100 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3105 * Release flow in RX_CP_TBL.
3108 * Pointer to Ethernet device.
3110 * Parent flow for wich copying is provided.
3113 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3114 struct rte_flow *flow)
3116 struct mlx5_flow_mreg_copy_resource *mcp_res;
3117 struct mlx5_priv *priv = dev->data->dev_private;
3119 if (!flow->rix_mreg_copy)
3121 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3122 flow->rix_mreg_copy);
3123 if (!mcp_res || !priv->mreg_cp_tbl)
3125 if (flow->copy_applied) {
3126 MLX5_ASSERT(mcp_res->appcnt);
3127 flow->copy_applied = 0;
3129 if (!mcp_res->appcnt) {
3130 struct rte_flow *mcp_flow = mlx5_ipool_get
3131 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3135 flow_drv_remove(dev, mcp_flow);
3139 * We do not check availability of metadata registers here,
3140 * because copy resources are not allocated in this case.
3142 if (--mcp_res->refcnt)
3144 MLX5_ASSERT(mcp_res->rix_flow);
3145 flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3146 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3147 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3148 flow->rix_mreg_copy = 0;
3152 * Start flow in RX_CP_TBL.
3155 * Pointer to Ethernet device.
3157 * Parent flow for wich copying is provided.
3160 * 0 on success, a negative errno value otherwise and rte_errno is set.
3163 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3164 struct rte_flow *flow)
3166 struct mlx5_flow_mreg_copy_resource *mcp_res;
3167 struct mlx5_priv *priv = dev->data->dev_private;
3170 if (!flow->rix_mreg_copy || flow->copy_applied)
3172 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3173 flow->rix_mreg_copy);
3176 if (!mcp_res->appcnt) {
3177 struct rte_flow *mcp_flow = mlx5_ipool_get
3178 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3182 ret = flow_drv_apply(dev, mcp_flow, NULL);
3188 flow->copy_applied = 1;
3193 * Stop flow in RX_CP_TBL.
3196 * Pointer to Ethernet device.
3198 * Parent flow for wich copying is provided.
3201 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3202 struct rte_flow *flow)
3204 struct mlx5_flow_mreg_copy_resource *mcp_res;
3205 struct mlx5_priv *priv = dev->data->dev_private;
3207 if (!flow->rix_mreg_copy || !flow->copy_applied)
3209 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3210 flow->rix_mreg_copy);
3213 MLX5_ASSERT(mcp_res->appcnt);
3215 flow->copy_applied = 0;
3216 if (!mcp_res->appcnt) {
3217 struct rte_flow *mcp_flow = mlx5_ipool_get
3218 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3222 flow_drv_remove(dev, mcp_flow);
3227 * Remove the default copy action from RX_CP_TBL.
3230 * Pointer to Ethernet device.
3233 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3235 struct mlx5_flow_mreg_copy_resource *mcp_res;
3236 struct mlx5_priv *priv = dev->data->dev_private;
3238 /* Check if default flow is registered. */
3239 if (!priv->mreg_cp_tbl)
3241 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl,
3242 MLX5_DEFAULT_COPY_ID);
3245 MLX5_ASSERT(mcp_res->rix_flow);
3246 flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3247 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3248 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3252 * Add the default copy action in in RX_CP_TBL.
3255 * Pointer to Ethernet device.
3257 * Perform verbose error reporting if not NULL.
3260 * 0 for success, negative value otherwise and rte_errno is set.
3263 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3264 struct rte_flow_error *error)
3266 struct mlx5_priv *priv = dev->data->dev_private;
3267 struct mlx5_flow_mreg_copy_resource *mcp_res;
3269 /* Check whether extensive metadata feature is engaged. */
3270 if (!priv->config.dv_flow_en ||
3271 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3272 !mlx5_flow_ext_mreg_supported(dev) ||
3273 !priv->sh->dv_regc0_mask)
3275 mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3282 * Add a flow of copying flow metadata registers in RX_CP_TBL.
3284 * All the flow having Q/RSS action should be split by
3285 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3286 * performs the following,
3287 * - CQE->flow_tag := reg_c[1] (MARK)
3288 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3289 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3290 * but there should be a flow per each MARK ID set by MARK action.
3292 * For the aforementioned reason, if there's a MARK action in flow's action
3293 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3294 * the MARK ID to CQE's flow_tag like,
3295 * - If reg_c[1] is mark_id,
3296 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3298 * For SET_META action which stores value in reg_c[0], as the destination is
3299 * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3300 * MARK ID means the default flow. The default flow looks like,
3301 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3304 * Pointer to Ethernet device.
3306 * Pointer to flow structure.
3307 * @param[in] actions
3308 * Pointer to the list of actions.
3310 * Perform verbose error reporting if not NULL.
3313 * 0 on success, negative value otherwise and rte_errno is set.
3316 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3317 struct rte_flow *flow,
3318 const struct rte_flow_action *actions,
3319 struct rte_flow_error *error)
3321 struct mlx5_priv *priv = dev->data->dev_private;
3322 struct mlx5_dev_config *config = &priv->config;
3323 struct mlx5_flow_mreg_copy_resource *mcp_res;
3324 const struct rte_flow_action_mark *mark;
3326 /* Check whether extensive metadata feature is engaged. */
3327 if (!config->dv_flow_en ||
3328 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3329 !mlx5_flow_ext_mreg_supported(dev) ||
3330 !priv->sh->dv_regc0_mask)
3332 /* Find MARK action. */
3333 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3334 switch (actions->type) {
3335 case RTE_FLOW_ACTION_TYPE_FLAG:
3336 mcp_res = flow_mreg_add_copy_action
3337 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3340 flow->rix_mreg_copy = mcp_res->idx;
3341 if (dev->data->dev_started) {
3343 flow->copy_applied = 1;
3346 case RTE_FLOW_ACTION_TYPE_MARK:
3347 mark = (const struct rte_flow_action_mark *)
3350 flow_mreg_add_copy_action(dev, mark->id, error);
3353 flow->rix_mreg_copy = mcp_res->idx;
3354 if (dev->data->dev_started) {
3356 flow->copy_applied = 1;
3366 #define MLX5_MAX_SPLIT_ACTIONS 24
3367 #define MLX5_MAX_SPLIT_ITEMS 24
3370 * Split the hairpin flow.
3371 * Since HW can't support encap on Rx we move the encap to Tx.
3372 * If the count action is after the encap then we also
3373 * move the count action. in this case the count will also measure
3377 * Pointer to Ethernet device.
3378 * @param[in] actions
3379 * Associated actions (list terminated by the END action).
3380 * @param[out] actions_rx
3382 * @param[out] actions_tx
3384 * @param[out] pattern_tx
3385 * The pattern items for the Tx flow.
3386 * @param[out] flow_id
3387 * The flow ID connected to this flow.
3393 flow_hairpin_split(struct rte_eth_dev *dev,
3394 const struct rte_flow_action actions[],
3395 struct rte_flow_action actions_rx[],
3396 struct rte_flow_action actions_tx[],
3397 struct rte_flow_item pattern_tx[],
3400 struct mlx5_priv *priv = dev->data->dev_private;
3401 const struct rte_flow_action_raw_encap *raw_encap;
3402 const struct rte_flow_action_raw_decap *raw_decap;
3403 struct mlx5_rte_flow_action_set_tag *set_tag;
3404 struct rte_flow_action *tag_action;
3405 struct mlx5_rte_flow_item_tag *tag_item;
3406 struct rte_flow_item *item;
3410 mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3411 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3412 switch (actions->type) {
3413 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3414 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3415 rte_memcpy(actions_tx, actions,
3416 sizeof(struct rte_flow_action));
3419 case RTE_FLOW_ACTION_TYPE_COUNT:
3421 rte_memcpy(actions_tx, actions,
3422 sizeof(struct rte_flow_action));
3425 rte_memcpy(actions_rx, actions,
3426 sizeof(struct rte_flow_action));
3430 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3431 raw_encap = actions->conf;
3432 if (raw_encap->size >
3433 (sizeof(struct rte_flow_item_eth) +
3434 sizeof(struct rte_flow_item_ipv4))) {
3435 memcpy(actions_tx, actions,
3436 sizeof(struct rte_flow_action));
3440 rte_memcpy(actions_rx, actions,
3441 sizeof(struct rte_flow_action));
3445 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3446 raw_decap = actions->conf;
3447 if (raw_decap->size <
3448 (sizeof(struct rte_flow_item_eth) +
3449 sizeof(struct rte_flow_item_ipv4))) {
3450 memcpy(actions_tx, actions,
3451 sizeof(struct rte_flow_action));
3454 rte_memcpy(actions_rx, actions,
3455 sizeof(struct rte_flow_action));
3460 rte_memcpy(actions_rx, actions,
3461 sizeof(struct rte_flow_action));
3466 /* Add set meta action and end action for the Rx flow. */
3467 tag_action = actions_rx;
3468 tag_action->type = (enum rte_flow_action_type)
3469 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3471 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3473 set_tag = (void *)actions_rx;
3474 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3475 MLX5_ASSERT(set_tag->id > REG_NONE);
3476 set_tag->data = *flow_id;
3477 tag_action->conf = set_tag;
3478 /* Create Tx item list. */
3479 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3480 addr = (void *)&pattern_tx[2];
3482 item->type = (enum rte_flow_item_type)
3483 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3484 tag_item = (void *)addr;
3485 tag_item->data = *flow_id;
3486 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3487 MLX5_ASSERT(set_tag->id > REG_NONE);
3488 item->spec = tag_item;
3489 addr += sizeof(struct mlx5_rte_flow_item_tag);
3490 tag_item = (void *)addr;
3491 tag_item->data = UINT32_MAX;
3492 tag_item->id = UINT16_MAX;
3493 item->mask = tag_item;
3494 addr += sizeof(struct mlx5_rte_flow_item_tag);
3497 item->type = RTE_FLOW_ITEM_TYPE_END;
3502 * The last stage of splitting chain, just creates the subflow
3503 * without any modification.
3506 * Pointer to Ethernet device.
3508 * Parent flow structure pointer.
3509 * @param[in, out] sub_flow
3510 * Pointer to return the created subflow, may be NULL.
3511 * @param[in] prefix_layers
3512 * Prefix subflow layers, may be 0.
3514 * Flow rule attributes.
3516 * Pattern specification (list terminated by the END pattern item).
3517 * @param[in] actions
3518 * Associated actions (list terminated by the END action).
3519 * @param[in] external
3520 * This flow rule is created by request external to PMD.
3521 * @param[in] flow_idx
3522 * This memory pool index to the flow.
3524 * Perform verbose error reporting if not NULL.
3526 * 0 on success, negative value otherwise
3529 flow_create_split_inner(struct rte_eth_dev *dev,
3530 struct rte_flow *flow,
3531 struct mlx5_flow **sub_flow,
3532 uint64_t prefix_layers,
3533 const struct rte_flow_attr *attr,
3534 const struct rte_flow_item items[],
3535 const struct rte_flow_action actions[],
3536 bool external, uint32_t flow_idx,
3537 struct rte_flow_error *error)
3539 struct mlx5_flow *dev_flow;
3541 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
3545 dev_flow->flow = flow;
3546 dev_flow->external = external;
3547 /* Subflow object was created, we must include one in the list. */
3548 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
3549 dev_flow->handle, next);
3551 * If dev_flow is as one of the suffix flow, some actions in suffix
3552 * flow may need some user defined item layer flags.
3555 dev_flow->handle->layers = prefix_layers;
3557 *sub_flow = dev_flow;
3558 return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3562 * Split the meter flow.
3564 * As meter flow will split to three sub flow, other than meter
3565 * action, the other actions make sense to only meter accepts
3566 * the packet. If it need to be dropped, no other additional
3567 * actions should be take.
3569 * One kind of special action which decapsulates the L3 tunnel
3570 * header will be in the prefix sub flow, as not to take the
3571 * L3 tunnel header into account.
3574 * Pointer to Ethernet device.
3576 * Pattern specification (list terminated by the END pattern item).
3577 * @param[out] sfx_items
3578 * Suffix flow match items (list terminated by the END pattern item).
3579 * @param[in] actions
3580 * Associated actions (list terminated by the END action).
3581 * @param[out] actions_sfx
3582 * Suffix flow actions.
3583 * @param[out] actions_pre
3584 * Prefix flow actions.
3585 * @param[out] pattern_sfx
3586 * The pattern items for the suffix flow.
3587 * @param[out] tag_sfx
3588 * Pointer to suffix flow tag.
3594 flow_meter_split_prep(struct rte_eth_dev *dev,
3595 const struct rte_flow_item items[],
3596 struct rte_flow_item sfx_items[],
3597 const struct rte_flow_action actions[],
3598 struct rte_flow_action actions_sfx[],
3599 struct rte_flow_action actions_pre[])
3601 struct rte_flow_action *tag_action = NULL;
3602 struct rte_flow_item *tag_item;
3603 struct mlx5_rte_flow_action_set_tag *set_tag;
3604 struct rte_flow_error error;
3605 const struct rte_flow_action_raw_encap *raw_encap;
3606 const struct rte_flow_action_raw_decap *raw_decap;
3607 struct mlx5_rte_flow_item_tag *tag_spec;
3608 struct mlx5_rte_flow_item_tag *tag_mask;
3610 bool copy_vlan = false;
3612 /* Prepare the actions for prefix and suffix flow. */
3613 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3614 struct rte_flow_action **action_cur = NULL;
3616 switch (actions->type) {
3617 case RTE_FLOW_ACTION_TYPE_METER:
3618 /* Add the extra tag action first. */
3619 tag_action = actions_pre;
3620 tag_action->type = (enum rte_flow_action_type)
3621 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3623 action_cur = &actions_pre;
3625 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3626 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3627 action_cur = &actions_pre;
3629 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3630 raw_encap = actions->conf;
3631 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
3632 action_cur = &actions_pre;
3634 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3635 raw_decap = actions->conf;
3636 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3637 action_cur = &actions_pre;
3639 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3640 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3647 action_cur = &actions_sfx;
3648 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
3651 /* Add end action to the actions. */
3652 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
3653 actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
3656 set_tag = (void *)actions_pre;
3657 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3659 * Get the id from the qrss_pool to make qrss share the id with meter.
3661 tag_id = flow_qrss_get_id(dev);
3662 set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
3664 tag_action->conf = set_tag;
3665 /* Prepare the suffix subflow items. */
3666 tag_item = sfx_items++;
3667 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3668 int item_type = items->type;
3670 switch (item_type) {
3671 case RTE_FLOW_ITEM_TYPE_PORT_ID:
3672 memcpy(sfx_items, items, sizeof(*sfx_items));
3675 case RTE_FLOW_ITEM_TYPE_VLAN:
3677 memcpy(sfx_items, items, sizeof(*sfx_items));
3679 * Convert to internal match item, it is used
3680 * for vlan push and set vid.
3682 sfx_items->type = (enum rte_flow_item_type)
3683 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
3691 sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
3693 tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
3694 tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
3695 tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3696 tag_mask = tag_spec + 1;
3697 tag_mask->data = 0xffffff00;
3698 tag_item->type = (enum rte_flow_item_type)
3699 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3700 tag_item->spec = tag_spec;
3701 tag_item->last = NULL;
3702 tag_item->mask = tag_mask;
3707 * Split action list having QUEUE/RSS for metadata register copy.
3709 * Once Q/RSS action is detected in user's action list, the flow action
3710 * should be split in order to copy metadata registers, which will happen in
3712 * - CQE->flow_tag := reg_c[1] (MARK)
3713 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3714 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3715 * This is because the last action of each flow must be a terminal action
3716 * (QUEUE, RSS or DROP).
3718 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3719 * stored and kept in the mlx5_flow structure per each sub_flow.
3721 * The Q/RSS action is replaced with,
3722 * - SET_TAG, setting the allocated flow ID to reg_c[2].
3723 * And the following JUMP action is added at the end,
3724 * - JUMP, to RX_CP_TBL.
3726 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3727 * flow_create_split_metadata() routine. The flow will look like,
3728 * - If flow ID matches (reg_c[2]), perform Q/RSS.
3731 * Pointer to Ethernet device.
3732 * @param[out] split_actions
3733 * Pointer to store split actions to jump to CP_TBL.
3734 * @param[in] actions
3735 * Pointer to the list of original flow actions.
3737 * Pointer to the Q/RSS action.
3738 * @param[in] actions_n
3739 * Number of original actions.
3741 * Perform verbose error reporting if not NULL.
3744 * non-zero unique flow_id on success, otherwise 0 and
3745 * error/rte_error are set.
3748 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3749 struct rte_flow_action *split_actions,
3750 const struct rte_flow_action *actions,
3751 const struct rte_flow_action *qrss,
3752 int actions_n, struct rte_flow_error *error)
3754 struct mlx5_rte_flow_action_set_tag *set_tag;
3755 struct rte_flow_action_jump *jump;
3756 const int qrss_idx = qrss - actions;
3757 uint32_t flow_id = 0;
3761 * Given actions will be split
3762 * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3763 * - Add jump to mreg CP_TBL.
3764 * As a result, there will be one more action.
3767 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3768 set_tag = (void *)(split_actions + actions_n);
3770 * If tag action is not set to void(it means we are not the meter
3771 * suffix flow), add the tag action. Since meter suffix flow already
3772 * has the tag added.
3774 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
3776 * Allocate the new subflow ID. This one is unique within
3777 * device and not shared with representors. Otherwise,
3778 * we would have to resolve multi-thread access synch
3779 * issue. Each flow on the shared device is appended
3780 * with source vport identifier, so the resulting
3781 * flows will be unique in the shared (by master and
3782 * representors) domain even if they have coinciding
3785 flow_id = flow_qrss_get_id(dev);
3787 return rte_flow_error_set(error, ENOMEM,
3788 RTE_FLOW_ERROR_TYPE_ACTION,
3789 NULL, "can't allocate id "
3790 "for split Q/RSS subflow");
3791 /* Internal SET_TAG action to set flow ID. */
3792 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3795 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3799 /* Construct new actions array. */
3800 /* Replace QUEUE/RSS action. */
3801 split_actions[qrss_idx] = (struct rte_flow_action){
3802 .type = (enum rte_flow_action_type)
3803 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3807 /* JUMP action to jump to mreg copy table (CP_TBL). */
3808 jump = (void *)(set_tag + 1);
3809 *jump = (struct rte_flow_action_jump){
3810 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3812 split_actions[actions_n - 2] = (struct rte_flow_action){
3813 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3816 split_actions[actions_n - 1] = (struct rte_flow_action){
3817 .type = RTE_FLOW_ACTION_TYPE_END,
3823 * Extend the given action list for Tx metadata copy.
3825 * Copy the given action list to the ext_actions and add flow metadata register
3826 * copy action in order to copy reg_a set by WQE to reg_c[0].
3828 * @param[out] ext_actions
3829 * Pointer to the extended action list.
3830 * @param[in] actions
3831 * Pointer to the list of actions.
3832 * @param[in] actions_n
3833 * Number of actions in the list.
3835 * Perform verbose error reporting if not NULL.
3836 * @param[in] encap_idx
3837 * The encap action inndex.
3840 * 0 on success, negative value otherwise
3843 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3844 struct rte_flow_action *ext_actions,
3845 const struct rte_flow_action *actions,
3846 int actions_n, struct rte_flow_error *error,
3849 struct mlx5_flow_action_copy_mreg *cp_mreg =
3850 (struct mlx5_flow_action_copy_mreg *)
3851 (ext_actions + actions_n + 1);
3854 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3858 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3863 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
3864 if (encap_idx == actions_n - 1) {
3865 ext_actions[actions_n - 1] = (struct rte_flow_action){
3866 .type = (enum rte_flow_action_type)
3867 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3870 ext_actions[actions_n] = (struct rte_flow_action){
3871 .type = RTE_FLOW_ACTION_TYPE_END,
3874 ext_actions[encap_idx] = (struct rte_flow_action){
3875 .type = (enum rte_flow_action_type)
3876 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3879 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
3880 sizeof(*ext_actions) * (actions_n - encap_idx));
3886 * The splitting for metadata feature.
3888 * - Q/RSS action on NIC Rx should be split in order to pass by
3889 * the mreg copy table (RX_CP_TBL) and then it jumps to the
3890 * action table (RX_ACT_TBL) which has the split Q/RSS action.
3892 * - All the actions on NIC Tx should have a mreg copy action to
3893 * copy reg_a from WQE to reg_c[0].
3896 * Pointer to Ethernet device.
3898 * Parent flow structure pointer.
3899 * @param[in] prefix_layers
3900 * Prefix flow layer flags.
3902 * Flow rule attributes.
3904 * Pattern specification (list terminated by the END pattern item).
3905 * @param[in] actions
3906 * Associated actions (list terminated by the END action).
3907 * @param[in] external
3908 * This flow rule is created by request external to PMD.
3909 * @param[in] flow_idx
3910 * This memory pool index to the flow.
3912 * Perform verbose error reporting if not NULL.
3914 * 0 on success, negative value otherwise
3917 flow_create_split_metadata(struct rte_eth_dev *dev,
3918 struct rte_flow *flow,
3919 uint64_t prefix_layers,
3920 const struct rte_flow_attr *attr,
3921 const struct rte_flow_item items[],
3922 const struct rte_flow_action actions[],
3923 bool external, uint32_t flow_idx,
3924 struct rte_flow_error *error)
3926 struct mlx5_priv *priv = dev->data->dev_private;
3927 struct mlx5_dev_config *config = &priv->config;
3928 const struct rte_flow_action *qrss = NULL;
3929 struct rte_flow_action *ext_actions = NULL;
3930 struct mlx5_flow *dev_flow = NULL;
3931 uint32_t qrss_id = 0;
3938 /* Check whether extensive metadata feature is engaged. */
3939 if (!config->dv_flow_en ||
3940 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3941 !mlx5_flow_ext_mreg_supported(dev))
3942 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
3943 attr, items, actions, external,
3945 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
3948 /* Exclude hairpin flows from splitting. */
3949 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3950 const struct rte_flow_action_queue *queue;
3953 if (mlx5_rxq_get_type(dev, queue->index) ==
3954 MLX5_RXQ_TYPE_HAIRPIN)
3956 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3957 const struct rte_flow_action_rss *rss;
3960 if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3961 MLX5_RXQ_TYPE_HAIRPIN)
3966 /* Check if it is in meter suffix table. */
3967 mtr_sfx = attr->group == (attr->transfer ?
3968 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
3969 MLX5_FLOW_TABLE_LEVEL_SUFFIX);
3971 * Q/RSS action on NIC Rx should be split in order to pass by
3972 * the mreg copy table (RX_CP_TBL) and then it jumps to the
3973 * action table (RX_ACT_TBL) which has the split Q/RSS action.
3975 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3976 sizeof(struct rte_flow_action_set_tag) +
3977 sizeof(struct rte_flow_action_jump);
3978 ext_actions = rte_zmalloc(__func__, act_size, 0);
3980 return rte_flow_error_set(error, ENOMEM,
3981 RTE_FLOW_ERROR_TYPE_ACTION,
3982 NULL, "no memory to split "
3985 * If we are the suffix flow of meter, tag already exist.
3986 * Set the tag action to void.
3989 ext_actions[qrss - actions].type =
3990 RTE_FLOW_ACTION_TYPE_VOID;
3992 ext_actions[qrss - actions].type =
3993 (enum rte_flow_action_type)
3994 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3996 * Create the new actions list with removed Q/RSS action
3997 * and appended set tag and jump to register copy table
3998 * (RX_CP_TBL). We should preallocate unique tag ID here
3999 * in advance, because it is needed for set tag action.
4001 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
4002 qrss, actions_n, error);
4003 if (!mtr_sfx && !qrss_id) {
4007 } else if (attr->egress && !attr->transfer) {
4009 * All the actions on NIC Tx should have a metadata register
4010 * copy action to copy reg_a from WQE to reg_c[meta]
4012 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4013 sizeof(struct mlx5_flow_action_copy_mreg);
4014 ext_actions = rte_zmalloc(__func__, act_size, 0);
4016 return rte_flow_error_set(error, ENOMEM,
4017 RTE_FLOW_ERROR_TYPE_ACTION,
4018 NULL, "no memory to split "
4020 /* Create the action list appended with copy register. */
4021 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
4022 actions_n, error, encap_idx);
4026 /* Add the unmodified original or prefix subflow. */
4027 ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers, attr,
4028 items, ext_actions ? ext_actions :
4029 actions, external, flow_idx, error);
4032 MLX5_ASSERT(dev_flow);
4034 const struct rte_flow_attr q_attr = {
4035 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4038 /* Internal PMD action to set register. */
4039 struct mlx5_rte_flow_item_tag q_tag_spec = {
4043 struct rte_flow_item q_items[] = {
4045 .type = (enum rte_flow_item_type)
4046 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4047 .spec = &q_tag_spec,
4052 .type = RTE_FLOW_ITEM_TYPE_END,
4055 struct rte_flow_action q_actions[] = {
4061 .type = RTE_FLOW_ACTION_TYPE_END,
4064 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
4067 * Configure the tag item only if there is no meter subflow.
4068 * Since tag is already marked in the meter suffix subflow
4069 * we can just use the meter suffix items as is.
4072 /* Not meter subflow. */
4073 MLX5_ASSERT(!mtr_sfx);
4075 * Put unique id in prefix flow due to it is destroyed
4076 * after suffix flow and id will be freed after there
4077 * is no actual flows with this id and identifier
4078 * reallocation becomes possible (for example, for
4079 * other flows in other threads).
4081 dev_flow->handle->split_flow_id = qrss_id;
4082 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
4086 q_tag_spec.id = ret;
4089 /* Add suffix subflow to execute Q/RSS. */
4090 ret = flow_create_split_inner(dev, flow, &dev_flow, layers,
4091 &q_attr, mtr_sfx ? items :
4093 external, flow_idx, error);
4096 /* qrss ID should be freed if failed. */
4098 MLX5_ASSERT(dev_flow);
4103 * We do not destroy the partially created sub_flows in case of error.
4104 * These ones are included into parent flow list and will be destroyed
4105 * by flow_drv_destroy.
4107 flow_qrss_free_id(dev, qrss_id);
4108 rte_free(ext_actions);
4113 * The splitting for meter feature.
4115 * - The meter flow will be split to two flows as prefix and
4116 * suffix flow. The packets make sense only it pass the prefix
4119 * - Reg_C_5 is used for the packet to match betweend prefix and
4123 * Pointer to Ethernet device.
4125 * Parent flow structure pointer.
4127 * Flow rule attributes.
4129 * Pattern specification (list terminated by the END pattern item).
4130 * @param[in] actions
4131 * Associated actions (list terminated by the END action).
4132 * @param[in] external
4133 * This flow rule is created by request external to PMD.
4134 * @param[in] flow_idx
4135 * This memory pool index to the flow.
4137 * Perform verbose error reporting if not NULL.
4139 * 0 on success, negative value otherwise
4142 flow_create_split_meter(struct rte_eth_dev *dev,
4143 struct rte_flow *flow,
4144 const struct rte_flow_attr *attr,
4145 const struct rte_flow_item items[],
4146 const struct rte_flow_action actions[],
4147 bool external, uint32_t flow_idx,
4148 struct rte_flow_error *error)
4150 struct mlx5_priv *priv = dev->data->dev_private;
4151 struct rte_flow_action *sfx_actions = NULL;
4152 struct rte_flow_action *pre_actions = NULL;
4153 struct rte_flow_item *sfx_items = NULL;
4154 struct mlx5_flow *dev_flow = NULL;
4155 struct rte_flow_attr sfx_attr = *attr;
4157 uint32_t mtr_tag_id = 0;
4164 actions_n = flow_check_meter_action(actions, &mtr);
4166 /* The five prefix actions: meter, decap, encap, tag, end. */
4167 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
4168 sizeof(struct mlx5_rte_flow_action_set_tag);
4169 /* tag, vlan, port id, end. */
4170 #define METER_SUFFIX_ITEM 4
4171 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
4172 sizeof(struct mlx5_rte_flow_item_tag) * 2;
4173 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);
4175 return rte_flow_error_set(error, ENOMEM,
4176 RTE_FLOW_ERROR_TYPE_ACTION,
4177 NULL, "no memory to split "
4179 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
4181 pre_actions = sfx_actions + actions_n;
4182 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
4183 actions, sfx_actions,
4189 /* Add the prefix subflow. */
4190 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, attr,
4191 items, pre_actions, external,
4197 dev_flow->handle->split_flow_id = mtr_tag_id;
4198 /* Setting the sfx group atrr. */
4199 sfx_attr.group = sfx_attr.transfer ?
4200 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4201 MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4203 /* Add the prefix subflow. */
4204 ret = flow_create_split_metadata(dev, flow, dev_flow ?
4205 flow_get_prefix_layer_flags(dev_flow) :
4207 sfx_items ? sfx_items : items,
4208 sfx_actions ? sfx_actions : actions,
4209 external, flow_idx, error);
4212 rte_free(sfx_actions);
4217 * Split the flow to subflow set. The splitters might be linked
4218 * in the chain, like this:
4219 * flow_create_split_outer() calls:
4220 * flow_create_split_meter() calls:
4221 * flow_create_split_metadata(meter_subflow_0) calls:
4222 * flow_create_split_inner(metadata_subflow_0)
4223 * flow_create_split_inner(metadata_subflow_1)
4224 * flow_create_split_inner(metadata_subflow_2)
4225 * flow_create_split_metadata(meter_subflow_1) calls:
4226 * flow_create_split_inner(metadata_subflow_0)
4227 * flow_create_split_inner(metadata_subflow_1)
4228 * flow_create_split_inner(metadata_subflow_2)
4230 * This provide flexible way to add new levels of flow splitting.
4231 * The all of successfully created subflows are included to the
4232 * parent flow dev_flow list.
4235 * Pointer to Ethernet device.
4237 * Parent flow structure pointer.
4239 * Flow rule attributes.
4241 * Pattern specification (list terminated by the END pattern item).
4242 * @param[in] actions
4243 * Associated actions (list terminated by the END action).
4244 * @param[in] external
4245 * This flow rule is created by request external to PMD.
4246 * @param[in] flow_idx
4247 * This memory pool index to the flow.
4249 * Perform verbose error reporting if not NULL.
4251 * 0 on success, negative value otherwise
4254 flow_create_split_outer(struct rte_eth_dev *dev,
4255 struct rte_flow *flow,
4256 const struct rte_flow_attr *attr,
4257 const struct rte_flow_item items[],
4258 const struct rte_flow_action actions[],
4259 bool external, uint32_t flow_idx,
4260 struct rte_flow_error *error)
4264 ret = flow_create_split_meter(dev, flow, attr, items,
4265 actions, external, flow_idx, error);
4266 MLX5_ASSERT(ret <= 0);
4271 * Create a flow and add it to @p list.
4274 * Pointer to Ethernet device.
4276 * Pointer to a TAILQ flow list. If this parameter NULL,
4277 * no list insertion occurred, flow is just created,
4278 * this is caller's responsibility to track the
4281 * Flow rule attributes.
4283 * Pattern specification (list terminated by the END pattern item).
4284 * @param[in] actions
4285 * Associated actions (list terminated by the END action).
4286 * @param[in] external
4287 * This flow rule is created by request external to PMD.
4289 * Perform verbose error reporting if not NULL.
4292 * A flow index on success, 0 otherwise and rte_errno is set.
4295 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
4296 const struct rte_flow_attr *attr,
4297 const struct rte_flow_item items[],
4298 const struct rte_flow_action actions[],
4299 bool external, struct rte_flow_error *error)
4301 struct mlx5_priv *priv = dev->data->dev_private;
4302 struct rte_flow *flow = NULL;
4303 struct mlx5_flow *dev_flow;
4304 const struct rte_flow_action_rss *rss;
4306 struct rte_flow_expand_rss buf;
4307 uint8_t buffer[2048];
4310 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4311 uint8_t buffer[2048];
4314 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4315 uint8_t buffer[2048];
4316 } actions_hairpin_tx;
4318 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
4319 uint8_t buffer[2048];
4321 struct rte_flow_expand_rss *buf = &expand_buffer.buf;
4322 struct mlx5_flow_rss_desc *rss_desc = &((struct mlx5_flow_rss_desc *)
4323 priv->rss_desc)[!!priv->flow_idx];
4324 const struct rte_flow_action *p_actions_rx = actions;
4328 uint32_t hairpin_id = 0;
4329 struct rte_flow_attr attr_tx = { .priority = 0 };
4332 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4333 ret = flow_drv_validate(dev, attr, items, p_actions_rx,
4334 external, hairpin_flow, error);
4337 if (hairpin_flow > 0) {
4338 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
4342 flow_hairpin_split(dev, actions, actions_rx.actions,
4343 actions_hairpin_tx.actions, items_tx.items,
4345 p_actions_rx = actions_rx.actions;
4347 flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
4350 goto error_before_flow;
4352 flow->drv_type = flow_get_drv_type(dev, attr);
4353 if (hairpin_id != 0)
4354 flow->hairpin_flow_id = hairpin_id;
4355 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
4356 flow->drv_type < MLX5_FLOW_TYPE_MAX);
4357 memset(rss_desc, 0, sizeof(*rss_desc));
4358 rss = flow_get_rss_action(p_actions_rx);
4361 * The following information is required by
4362 * mlx5_flow_hashfields_adjust() in advance.
4364 rss_desc->level = rss->level;
4365 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
4366 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
4368 flow->dev_handles = 0;
4369 if (rss && rss->types) {
4370 unsigned int graph_root;
4372 graph_root = find_graph_root(items, rss->level);
4373 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
4375 mlx5_support_expansion,
4377 MLX5_ASSERT(ret > 0 &&
4378 (unsigned int)ret < sizeof(expand_buffer.buffer));
4381 buf->entry[0].pattern = (void *)(uintptr_t)items;
4384 * Record the start index when there is a nested call. All sub-flows
4385 * need to be translated before another calling.
4386 * No need to use ping-pong buffer to save memory here.
4388 if (priv->flow_idx) {
4389 MLX5_ASSERT(!priv->flow_nested_idx);
4390 priv->flow_nested_idx = priv->flow_idx;
4392 for (i = 0; i < buf->entries; ++i) {
4394 * The splitter may create multiple dev_flows,
4395 * depending on configuration. In the simplest
4396 * case it just creates unmodified original flow.
4398 ret = flow_create_split_outer(dev, flow, attr,
4399 buf->entry[i].pattern,
4400 p_actions_rx, external, idx,
4405 /* Create the tx flow. */
4407 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
4408 attr_tx.ingress = 0;
4410 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
4411 actions_hairpin_tx.actions,
4415 dev_flow->flow = flow;
4416 dev_flow->external = 0;
4417 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4418 dev_flow->handle, next);
4419 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
4421 actions_hairpin_tx.actions, error);
4426 * Update the metadata register copy table. If extensive
4427 * metadata feature is enabled and registers are supported
4428 * we might create the extra rte_flow for each unique
4429 * MARK/FLAG action ID.
4431 * The table is updated for ingress Flows only, because
4432 * the egress Flows belong to the different device and
4433 * copy table should be updated in peer NIC Rx domain.
4435 if (attr->ingress &&
4436 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
4437 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
4442 * If the flow is external (from application) OR device is started, then
4443 * the flow will be applied immediately.
4445 if (external || dev->data->dev_started) {
4446 ret = flow_drv_apply(dev, flow, error);
4451 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
4453 flow_rxq_flags_set(dev, flow);
4454 /* Nested flow creation index recovery. */
4455 priv->flow_idx = priv->flow_nested_idx;
4456 if (priv->flow_nested_idx)
4457 priv->flow_nested_idx = 0;
4461 ret = rte_errno; /* Save rte_errno before cleanup. */
4462 flow_mreg_del_copy_action(dev, flow);
4463 flow_drv_destroy(dev, flow);
4464 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
4465 rte_errno = ret; /* Restore rte_errno. */
4469 mlx5_flow_id_release(priv->sh->flow_id_pool,
4472 priv->flow_idx = priv->flow_nested_idx;
4473 if (priv->flow_nested_idx)
4474 priv->flow_nested_idx = 0;
4479 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
4480 * incoming packets to table 1.
4482 * Other flow rules, requested for group n, will be created in
4483 * e-switch table n+1.
4484 * Jump action to e-switch group n will be created to group n+1.
4486 * Used when working in switchdev mode, to utilise advantages of table 1
4490 * Pointer to Ethernet device.
4493 * Pointer to flow on success, NULL otherwise and rte_errno is set.
4496 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
4498 const struct rte_flow_attr attr = {
4505 const struct rte_flow_item pattern = {
4506 .type = RTE_FLOW_ITEM_TYPE_END,
4508 struct rte_flow_action_jump jump = {
4511 const struct rte_flow_action actions[] = {
4513 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4517 .type = RTE_FLOW_ACTION_TYPE_END,
4520 struct mlx5_priv *priv = dev->data->dev_private;
4521 struct rte_flow_error error;
4523 return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
4525 actions, false, &error);
4529 * Validate a flow supported by the NIC.
4531 * @see rte_flow_validate()
4535 mlx5_flow_validate(struct rte_eth_dev *dev,
4536 const struct rte_flow_attr *attr,
4537 const struct rte_flow_item items[],
4538 const struct rte_flow_action actions[],
4539 struct rte_flow_error *error)
4543 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4544 return flow_drv_validate(dev, attr, items, actions,
4545 true, hairpin_flow, error);
4551 * @see rte_flow_create()
4555 mlx5_flow_create(struct rte_eth_dev *dev,
4556 const struct rte_flow_attr *attr,
4557 const struct rte_flow_item items[],
4558 const struct rte_flow_action actions[],
4559 struct rte_flow_error *error)
4561 struct mlx5_priv *priv = dev->data->dev_private;
4564 * If the device is not started yet, it is not allowed to created a
4565 * flow from application. PMD default flows and traffic control flows
4568 if (unlikely(!dev->data->dev_started)) {
4569 DRV_LOG(DEBUG, "port %u is not started when "
4570 "inserting a flow", dev->data->port_id);
4571 rte_flow_error_set(error, ENODEV,
4572 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4574 "port not started");
4577 return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
4578 attr, items, actions, true, error);
4582 * Destroy a flow in a list.
4585 * Pointer to Ethernet device.
4587 * Pointer to the Indexed flow list. If this parameter NULL,
4588 * there is no flow removal from the list. Be noted that as
4589 * flow is add to the indexed list, memory of the indexed
4590 * list points to maybe changed as flow destroyed.
4591 * @param[in] flow_idx
4592 * Index of flow to destroy.
4595 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
4598 struct mlx5_priv *priv = dev->data->dev_private;
4599 struct mlx5_fdir_flow *priv_fdir_flow = NULL;
4600 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
4601 [MLX5_IPOOL_RTE_FLOW], flow_idx);
4606 * Update RX queue flags only if port is started, otherwise it is
4609 if (dev->data->dev_started)
4610 flow_rxq_flags_trim(dev, flow);
4611 if (flow->hairpin_flow_id)
4612 mlx5_flow_id_release(priv->sh->flow_id_pool,
4613 flow->hairpin_flow_id);
4614 flow_drv_destroy(dev, flow);
4616 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
4617 flow_idx, flow, next);
4618 flow_mreg_del_copy_action(dev, flow);
4620 LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
4621 if (priv_fdir_flow->rix_flow == flow_idx)
4624 if (priv_fdir_flow) {
4625 LIST_REMOVE(priv_fdir_flow, next);
4626 rte_free(priv_fdir_flow->fdir);
4627 rte_free(priv_fdir_flow);
4630 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
4634 * Destroy all flows.
4637 * Pointer to Ethernet device.
4639 * Pointer to the Indexed flow list.
4641 * If flushing is called avtively.
4644 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
4646 uint32_t num_flushed = 0;
4649 flow_list_destroy(dev, list, *list);
4653 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
4654 dev->data->port_id, num_flushed);
4662 * Pointer to Ethernet device.
4664 * Pointer to the Indexed flow list.
4667 mlx5_flow_stop(struct rte_eth_dev *dev, uint32_t *list)
4669 struct mlx5_priv *priv = dev->data->dev_private;
4670 struct rte_flow *flow = NULL;
4673 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx,
4675 flow_drv_remove(dev, flow);
4676 flow_mreg_stop_copy_action(dev, flow);
4678 flow_mreg_del_default_copy_action(dev);
4679 flow_rxq_flags_clear(dev);
4686 * Pointer to Ethernet device.
4688 * Pointer to the Indexed flow list.
4691 * 0 on success, a negative errno value otherwise and rte_errno is set.
4694 mlx5_flow_start(struct rte_eth_dev *dev, uint32_t *list)
4696 struct mlx5_priv *priv = dev->data->dev_private;
4697 struct rte_flow *flow = NULL;
4698 struct rte_flow_error error;
4702 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4703 ret = flow_mreg_add_default_copy_action(dev, &error);
4706 /* Apply Flows created by application. */
4707 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx,
4709 ret = flow_mreg_start_copy_action(dev, flow);
4712 ret = flow_drv_apply(dev, flow, &error);
4715 flow_rxq_flags_set(dev, flow);
4719 ret = rte_errno; /* Save rte_errno before cleanup. */
4720 mlx5_flow_stop(dev, list);
4721 rte_errno = ret; /* Restore rte_errno. */
4726 * Stop all default actions for flows.
4729 * Pointer to Ethernet device.
4732 mlx5_flow_stop_default(struct rte_eth_dev *dev)
4734 flow_mreg_del_default_copy_action(dev);
4735 flow_rxq_flags_clear(dev);
4739 * Start all default actions for flows.
4742 * Pointer to Ethernet device.
4744 * 0 on success, a negative errno value otherwise and rte_errno is set.
4747 mlx5_flow_start_default(struct rte_eth_dev *dev)
4749 struct rte_flow_error error;
4751 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4752 return flow_mreg_add_default_copy_action(dev, &error);
4756 * Allocate intermediate resources for flow creation.
4759 * Pointer to Ethernet device.
4762 mlx5_flow_alloc_intermediate(struct rte_eth_dev *dev)
4764 struct mlx5_priv *priv = dev->data->dev_private;
4766 if (!priv->inter_flows) {
4767 priv->inter_flows = rte_calloc(__func__, 1,
4768 MLX5_NUM_MAX_DEV_FLOWS *
4769 sizeof(struct mlx5_flow) +
4770 (sizeof(struct mlx5_flow_rss_desc) +
4771 sizeof(uint16_t) * UINT16_MAX) * 2, 0);
4772 if (!priv->inter_flows) {
4773 DRV_LOG(ERR, "can't allocate intermediate memory.");
4777 priv->rss_desc = &((struct mlx5_flow *)priv->inter_flows)
4778 [MLX5_NUM_MAX_DEV_FLOWS];
4779 /* Reset the index. */
4781 priv->flow_nested_idx = 0;
4785 * Free intermediate resources for flows.
4788 * Pointer to Ethernet device.
4791 mlx5_flow_free_intermediate(struct rte_eth_dev *dev)
4793 struct mlx5_priv *priv = dev->data->dev_private;
4795 rte_free(priv->inter_flows);
4796 priv->inter_flows = NULL;
4800 * Verify the flow list is empty
4803 * Pointer to Ethernet device.
4805 * @return the number of flows not released.
4808 mlx5_flow_verify(struct rte_eth_dev *dev)
4810 struct mlx5_priv *priv = dev->data->dev_private;
4811 struct rte_flow *flow;
4815 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
4817 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4818 dev->data->port_id, (void *)flow);
4825 * Enable default hairpin egress flow.
4828 * Pointer to Ethernet device.
4833 * 0 on success, a negative errno value otherwise and rte_errno is set.
4836 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4839 struct mlx5_priv *priv = dev->data->dev_private;
4840 const struct rte_flow_attr attr = {
4844 struct mlx5_rte_flow_item_tx_queue queue_spec = {
4847 struct mlx5_rte_flow_item_tx_queue queue_mask = {
4848 .queue = UINT32_MAX,
4850 struct rte_flow_item items[] = {
4852 .type = (enum rte_flow_item_type)
4853 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4854 .spec = &queue_spec,
4856 .mask = &queue_mask,
4859 .type = RTE_FLOW_ITEM_TYPE_END,
4862 struct rte_flow_action_jump jump = {
4863 .group = MLX5_HAIRPIN_TX_TABLE,
4865 struct rte_flow_action actions[2];
4867 struct rte_flow_error error;
4869 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4870 actions[0].conf = &jump;
4871 actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4872 flow_idx = flow_list_create(dev, &priv->ctrl_flows,
4873 &attr, items, actions, false, &error);
4876 "Failed to create ctrl flow: rte_errno(%d),"
4877 " type(%d), message(%s)",
4878 rte_errno, error.type,
4879 error.message ? error.message : " (no stated reason)");
4886 * Enable a control flow configured from the control plane.
4889 * Pointer to Ethernet device.
4891 * An Ethernet flow spec to apply.
4893 * An Ethernet flow mask to apply.
4895 * A VLAN flow spec to apply.
4897 * A VLAN flow mask to apply.
4900 * 0 on success, a negative errno value otherwise and rte_errno is set.
4903 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4904 struct rte_flow_item_eth *eth_spec,
4905 struct rte_flow_item_eth *eth_mask,
4906 struct rte_flow_item_vlan *vlan_spec,
4907 struct rte_flow_item_vlan *vlan_mask)
4909 struct mlx5_priv *priv = dev->data->dev_private;
4910 const struct rte_flow_attr attr = {
4912 .priority = MLX5_FLOW_PRIO_RSVD,
4914 struct rte_flow_item items[] = {
4916 .type = RTE_FLOW_ITEM_TYPE_ETH,
4922 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4923 RTE_FLOW_ITEM_TYPE_END,
4929 .type = RTE_FLOW_ITEM_TYPE_END,
4932 uint16_t queue[priv->reta_idx_n];
4933 struct rte_flow_action_rss action_rss = {
4934 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4936 .types = priv->rss_conf.rss_hf,
4937 .key_len = priv->rss_conf.rss_key_len,
4938 .queue_num = priv->reta_idx_n,
4939 .key = priv->rss_conf.rss_key,
4942 struct rte_flow_action actions[] = {
4944 .type = RTE_FLOW_ACTION_TYPE_RSS,
4945 .conf = &action_rss,
4948 .type = RTE_FLOW_ACTION_TYPE_END,
4952 struct rte_flow_error error;
4955 if (!priv->reta_idx_n || !priv->rxqs_n) {
4958 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
4959 action_rss.types = 0;
4960 for (i = 0; i != priv->reta_idx_n; ++i)
4961 queue[i] = (*priv->reta_idx)[i];
4962 flow_idx = flow_list_create(dev, &priv->ctrl_flows,
4963 &attr, items, actions, false, &error);
4970 * Enable a flow control configured from the control plane.
4973 * Pointer to Ethernet device.
4975 * An Ethernet flow spec to apply.
4977 * An Ethernet flow mask to apply.
4980 * 0 on success, a negative errno value otherwise and rte_errno is set.
4983 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4984 struct rte_flow_item_eth *eth_spec,
4985 struct rte_flow_item_eth *eth_mask)
4987 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4993 * @see rte_flow_destroy()
4997 mlx5_flow_destroy(struct rte_eth_dev *dev,
4998 struct rte_flow *flow,
4999 struct rte_flow_error *error __rte_unused)
5001 struct mlx5_priv *priv = dev->data->dev_private;
5003 flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
5008 * Destroy all flows.
5010 * @see rte_flow_flush()
5014 mlx5_flow_flush(struct rte_eth_dev *dev,
5015 struct rte_flow_error *error __rte_unused)
5017 struct mlx5_priv *priv = dev->data->dev_private;
5019 mlx5_flow_list_flush(dev, &priv->flows, false);
5026 * @see rte_flow_isolate()
5030 mlx5_flow_isolate(struct rte_eth_dev *dev,
5032 struct rte_flow_error *error)
5034 struct mlx5_priv *priv = dev->data->dev_private;
5036 if (dev->data->dev_started) {
5037 rte_flow_error_set(error, EBUSY,
5038 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5040 "port must be stopped first");
5043 priv->isolated = !!enable;
5045 dev->dev_ops = &mlx5_dev_ops_isolate;
5047 dev->dev_ops = &mlx5_dev_ops;
5054 * @see rte_flow_query()
5058 flow_drv_query(struct rte_eth_dev *dev,
5060 const struct rte_flow_action *actions,
5062 struct rte_flow_error *error)
5064 struct mlx5_priv *priv = dev->data->dev_private;
5065 const struct mlx5_flow_driver_ops *fops;
5066 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5067 [MLX5_IPOOL_RTE_FLOW],
5069 enum mlx5_flow_drv_type ftype;
5072 return rte_flow_error_set(error, ENOENT,
5073 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5075 "invalid flow handle");
5077 ftype = flow->drv_type;
5078 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
5079 fops = flow_get_drv_ops(ftype);
5081 return fops->query(dev, flow, actions, data, error);
5087 * @see rte_flow_query()
5091 mlx5_flow_query(struct rte_eth_dev *dev,
5092 struct rte_flow *flow,
5093 const struct rte_flow_action *actions,
5095 struct rte_flow_error *error)
5099 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
5107 * Convert a flow director filter to a generic flow.
5110 * Pointer to Ethernet device.
5111 * @param fdir_filter
5112 * Flow director filter to add.
5114 * Generic flow parameters structure.
5117 * 0 on success, a negative errno value otherwise and rte_errno is set.
5120 flow_fdir_filter_convert(struct rte_eth_dev *dev,
5121 const struct rte_eth_fdir_filter *fdir_filter,
5122 struct mlx5_fdir *attributes)
5124 struct mlx5_priv *priv = dev->data->dev_private;
5125 const struct rte_eth_fdir_input *input = &fdir_filter->input;
5126 const struct rte_eth_fdir_masks *mask =
5127 &dev->data->dev_conf.fdir_conf.mask;
5129 /* Validate queue number. */
5130 if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
5131 DRV_LOG(ERR, "port %u invalid queue number %d",
5132 dev->data->port_id, fdir_filter->action.rx_queue);
5136 attributes->attr.ingress = 1;
5137 attributes->items[0] = (struct rte_flow_item) {
5138 .type = RTE_FLOW_ITEM_TYPE_ETH,
5139 .spec = &attributes->l2,
5140 .mask = &attributes->l2_mask,
5142 switch (fdir_filter->action.behavior) {
5143 case RTE_ETH_FDIR_ACCEPT:
5144 attributes->actions[0] = (struct rte_flow_action){
5145 .type = RTE_FLOW_ACTION_TYPE_QUEUE,
5146 .conf = &attributes->queue,
5149 case RTE_ETH_FDIR_REJECT:
5150 attributes->actions[0] = (struct rte_flow_action){
5151 .type = RTE_FLOW_ACTION_TYPE_DROP,
5155 DRV_LOG(ERR, "port %u invalid behavior %d",
5157 fdir_filter->action.behavior);
5158 rte_errno = ENOTSUP;
5161 attributes->queue.index = fdir_filter->action.rx_queue;
5163 switch (fdir_filter->input.flow_type) {
5164 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
5165 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
5166 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
5167 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
5168 .src_addr = input->flow.ip4_flow.src_ip,
5169 .dst_addr = input->flow.ip4_flow.dst_ip,
5170 .time_to_live = input->flow.ip4_flow.ttl,
5171 .type_of_service = input->flow.ip4_flow.tos,
5173 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
5174 .src_addr = mask->ipv4_mask.src_ip,
5175 .dst_addr = mask->ipv4_mask.dst_ip,
5176 .time_to_live = mask->ipv4_mask.ttl,
5177 .type_of_service = mask->ipv4_mask.tos,
5178 .next_proto_id = mask->ipv4_mask.proto,
5180 attributes->items[1] = (struct rte_flow_item){
5181 .type = RTE_FLOW_ITEM_TYPE_IPV4,
5182 .spec = &attributes->l3,
5183 .mask = &attributes->l3_mask,
5186 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
5187 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
5188 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
5189 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
5190 .hop_limits = input->flow.ipv6_flow.hop_limits,
5191 .proto = input->flow.ipv6_flow.proto,
5194 memcpy(attributes->l3.ipv6.hdr.src_addr,
5195 input->flow.ipv6_flow.src_ip,
5196 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
5197 memcpy(attributes->l3.ipv6.hdr.dst_addr,
5198 input->flow.ipv6_flow.dst_ip,
5199 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
5200 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
5201 mask->ipv6_mask.src_ip,
5202 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
5203 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
5204 mask->ipv6_mask.dst_ip,
5205 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
5206 attributes->items[1] = (struct rte_flow_item){
5207 .type = RTE_FLOW_ITEM_TYPE_IPV6,
5208 .spec = &attributes->l3,
5209 .mask = &attributes->l3_mask,
5213 DRV_LOG(ERR, "port %u invalid flow type%d",
5214 dev->data->port_id, fdir_filter->input.flow_type);
5215 rte_errno = ENOTSUP;
5219 switch (fdir_filter->input.flow_type) {
5220 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
5221 attributes->l4.udp.hdr = (struct rte_udp_hdr){
5222 .src_port = input->flow.udp4_flow.src_port,
5223 .dst_port = input->flow.udp4_flow.dst_port,
5225 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
5226 .src_port = mask->src_port_mask,
5227 .dst_port = mask->dst_port_mask,
5229 attributes->items[2] = (struct rte_flow_item){
5230 .type = RTE_FLOW_ITEM_TYPE_UDP,
5231 .spec = &attributes->l4,
5232 .mask = &attributes->l4_mask,
5235 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
5236 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
5237 .src_port = input->flow.tcp4_flow.src_port,
5238 .dst_port = input->flow.tcp4_flow.dst_port,
5240 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
5241 .src_port = mask->src_port_mask,
5242 .dst_port = mask->dst_port_mask,
5244 attributes->items[2] = (struct rte_flow_item){
5245 .type = RTE_FLOW_ITEM_TYPE_TCP,
5246 .spec = &attributes->l4,
5247 .mask = &attributes->l4_mask,
5250 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
5251 attributes->l4.udp.hdr = (struct rte_udp_hdr){
5252 .src_port = input->flow.udp6_flow.src_port,
5253 .dst_port = input->flow.udp6_flow.dst_port,
5255 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
5256 .src_port = mask->src_port_mask,
5257 .dst_port = mask->dst_port_mask,
5259 attributes->items[2] = (struct rte_flow_item){
5260 .type = RTE_FLOW_ITEM_TYPE_UDP,
5261 .spec = &attributes->l4,
5262 .mask = &attributes->l4_mask,
5265 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
5266 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
5267 .src_port = input->flow.tcp6_flow.src_port,
5268 .dst_port = input->flow.tcp6_flow.dst_port,
5270 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
5271 .src_port = mask->src_port_mask,
5272 .dst_port = mask->dst_port_mask,
5274 attributes->items[2] = (struct rte_flow_item){
5275 .type = RTE_FLOW_ITEM_TYPE_TCP,
5276 .spec = &attributes->l4,
5277 .mask = &attributes->l4_mask,
5280 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
5281 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
5284 DRV_LOG(ERR, "port %u invalid flow type%d",
5285 dev->data->port_id, fdir_filter->input.flow_type);
5286 rte_errno = ENOTSUP;
5292 #define FLOW_FDIR_CMP(f1, f2, fld) \
5293 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
5296 * Compare two FDIR flows. If items and actions are identical, the two flows are
5300 * Pointer to Ethernet device.
5302 * FDIR flow to compare.
5304 * FDIR flow to compare.
5307 * Zero on match, 1 otherwise.
5310 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
5312 if (FLOW_FDIR_CMP(f1, f2, attr) ||
5313 FLOW_FDIR_CMP(f1, f2, l2) ||
5314 FLOW_FDIR_CMP(f1, f2, l2_mask) ||
5315 FLOW_FDIR_CMP(f1, f2, l3) ||
5316 FLOW_FDIR_CMP(f1, f2, l3_mask) ||
5317 FLOW_FDIR_CMP(f1, f2, l4) ||
5318 FLOW_FDIR_CMP(f1, f2, l4_mask) ||
5319 FLOW_FDIR_CMP(f1, f2, actions[0].type))
5321 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
5322 FLOW_FDIR_CMP(f1, f2, queue))
5328 * Search device flow list to find out a matched FDIR flow.
5331 * Pointer to Ethernet device.
5333 * FDIR flow to lookup.
5336 * Index of flow if found, 0 otherwise.
5339 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
5341 struct mlx5_priv *priv = dev->data->dev_private;
5342 uint32_t flow_idx = 0;
5343 struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5345 MLX5_ASSERT(fdir_flow);
5346 LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
5347 if (!flow_fdir_cmp(priv_fdir_flow->fdir, fdir_flow)) {
5348 DRV_LOG(DEBUG, "port %u found FDIR flow %u",
5349 dev->data->port_id, flow_idx);
5350 flow_idx = priv_fdir_flow->rix_flow;
5358 * Add new flow director filter and store it in list.
5361 * Pointer to Ethernet device.
5362 * @param fdir_filter
5363 * Flow director filter to add.
5366 * 0 on success, a negative errno value otherwise and rte_errno is set.
5369 flow_fdir_filter_add(struct rte_eth_dev *dev,
5370 const struct rte_eth_fdir_filter *fdir_filter)
5372 struct mlx5_priv *priv = dev->data->dev_private;
5373 struct mlx5_fdir *fdir_flow;
5374 struct rte_flow *flow;
5375 struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5379 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
5384 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
5387 flow_idx = flow_fdir_filter_lookup(dev, fdir_flow);
5392 priv_fdir_flow = rte_zmalloc(__func__, sizeof(struct mlx5_fdir_flow),
5394 if (!priv_fdir_flow) {
5398 flow_idx = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
5399 fdir_flow->items, fdir_flow->actions, true,
5401 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5405 priv_fdir_flow->fdir = fdir_flow;
5406 priv_fdir_flow->rix_flow = flow_idx;
5407 LIST_INSERT_HEAD(&priv->fdir_flows, priv_fdir_flow, next);
5408 DRV_LOG(DEBUG, "port %u created FDIR flow %p",
5409 dev->data->port_id, (void *)flow);
5412 rte_free(priv_fdir_flow);
5413 rte_free(fdir_flow);
5418 * Delete specific filter.
5421 * Pointer to Ethernet device.
5422 * @param fdir_filter
5423 * Filter to be deleted.
5426 * 0 on success, a negative errno value otherwise and rte_errno is set.
5429 flow_fdir_filter_delete(struct rte_eth_dev *dev,
5430 const struct rte_eth_fdir_filter *fdir_filter)
5432 struct mlx5_priv *priv = dev->data->dev_private;
5434 struct mlx5_fdir fdir_flow = {
5437 struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5440 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
5443 LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
5444 /* Find the fdir in priv list */
5445 if (!flow_fdir_cmp(priv_fdir_flow->fdir, &fdir_flow))
5448 if (!priv_fdir_flow)
5450 LIST_REMOVE(priv_fdir_flow, next);
5451 flow_idx = priv_fdir_flow->rix_flow;
5452 flow_list_destroy(dev, &priv->flows, flow_idx);
5453 rte_free(priv_fdir_flow->fdir);
5454 rte_free(priv_fdir_flow);
5455 DRV_LOG(DEBUG, "port %u deleted FDIR flow %u",
5456 dev->data->port_id, flow_idx);
5461 * Update queue for specific filter.
5464 * Pointer to Ethernet device.
5465 * @param fdir_filter
5466 * Filter to be updated.
5469 * 0 on success, a negative errno value otherwise and rte_errno is set.
5472 flow_fdir_filter_update(struct rte_eth_dev *dev,
5473 const struct rte_eth_fdir_filter *fdir_filter)
5477 ret = flow_fdir_filter_delete(dev, fdir_filter);
5480 return flow_fdir_filter_add(dev, fdir_filter);
5484 * Flush all filters.
5487 * Pointer to Ethernet device.
5490 flow_fdir_filter_flush(struct rte_eth_dev *dev)
5492 struct mlx5_priv *priv = dev->data->dev_private;
5493 struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5495 while (!LIST_EMPTY(&priv->fdir_flows)) {
5496 priv_fdir_flow = LIST_FIRST(&priv->fdir_flows);
5497 LIST_REMOVE(priv_fdir_flow, next);
5498 flow_list_destroy(dev, &priv->flows, priv_fdir_flow->rix_flow);
5499 rte_free(priv_fdir_flow->fdir);
5500 rte_free(priv_fdir_flow);
5505 * Get flow director information.
5508 * Pointer to Ethernet device.
5509 * @param[out] fdir_info
5510 * Resulting flow director information.
5513 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
5515 struct rte_eth_fdir_masks *mask =
5516 &dev->data->dev_conf.fdir_conf.mask;
5518 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
5519 fdir_info->guarant_spc = 0;
5520 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
5521 fdir_info->max_flexpayload = 0;
5522 fdir_info->flow_types_mask[0] = 0;
5523 fdir_info->flex_payload_unit = 0;
5524 fdir_info->max_flex_payload_segment_num = 0;
5525 fdir_info->flex_payload_limit = 0;
5526 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
5530 * Deal with flow director operations.
5533 * Pointer to Ethernet device.
5535 * Operation to perform.
5537 * Pointer to operation-specific structure.
5540 * 0 on success, a negative errno value otherwise and rte_errno is set.
5543 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
5546 enum rte_fdir_mode fdir_mode =
5547 dev->data->dev_conf.fdir_conf.mode;
5549 if (filter_op == RTE_ETH_FILTER_NOP)
5551 if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
5552 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
5553 DRV_LOG(ERR, "port %u flow director mode %d not supported",
5554 dev->data->port_id, fdir_mode);
5558 switch (filter_op) {
5559 case RTE_ETH_FILTER_ADD:
5560 return flow_fdir_filter_add(dev, arg);
5561 case RTE_ETH_FILTER_UPDATE:
5562 return flow_fdir_filter_update(dev, arg);
5563 case RTE_ETH_FILTER_DELETE:
5564 return flow_fdir_filter_delete(dev, arg);
5565 case RTE_ETH_FILTER_FLUSH:
5566 flow_fdir_filter_flush(dev);
5568 case RTE_ETH_FILTER_INFO:
5569 flow_fdir_info_get(dev, arg);
5572 DRV_LOG(DEBUG, "port %u unknown operation %u",
5573 dev->data->port_id, filter_op);
5581 * Manage filter operations.
5584 * Pointer to Ethernet device structure.
5585 * @param filter_type
5588 * Operation to perform.
5590 * Pointer to operation-specific structure.
5593 * 0 on success, a negative errno value otherwise and rte_errno is set.
5596 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
5597 enum rte_filter_type filter_type,
5598 enum rte_filter_op filter_op,
5601 switch (filter_type) {
5602 case RTE_ETH_FILTER_GENERIC:
5603 if (filter_op != RTE_ETH_FILTER_GET) {
5607 *(const void **)arg = &mlx5_flow_ops;
5609 case RTE_ETH_FILTER_FDIR:
5610 return flow_fdir_ctrl_func(dev, filter_op, arg);
5612 DRV_LOG(ERR, "port %u filter type (%d) not supported",
5613 dev->data->port_id, filter_type);
5614 rte_errno = ENOTSUP;
5621 * Create the needed meter and suffix tables.
5624 * Pointer to Ethernet device.
5626 * Pointer to the flow meter.
5629 * Pointer to table set on success, NULL otherwise.
5631 struct mlx5_meter_domains_infos *
5632 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
5633 const struct mlx5_flow_meter *fm)
5635 const struct mlx5_flow_driver_ops *fops;
5637 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5638 return fops->create_mtr_tbls(dev, fm);
5642 * Destroy the meter table set.
5645 * Pointer to Ethernet device.
5647 * Pointer to the meter table set.
5653 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
5654 struct mlx5_meter_domains_infos *tbls)
5656 const struct mlx5_flow_driver_ops *fops;
5658 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5659 return fops->destroy_mtr_tbls(dev, tbls);
5663 * Create policer rules.
5666 * Pointer to Ethernet device.
5668 * Pointer to flow meter structure.
5670 * Pointer to flow attributes.
5673 * 0 on success, -1 otherwise.
5676 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
5677 struct mlx5_flow_meter *fm,
5678 const struct rte_flow_attr *attr)
5680 const struct mlx5_flow_driver_ops *fops;
5682 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5683 return fops->create_policer_rules(dev, fm, attr);
5687 * Destroy policer rules.
5690 * Pointer to flow meter structure.
5692 * Pointer to flow attributes.
5695 * 0 on success, -1 otherwise.
5698 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
5699 struct mlx5_flow_meter *fm,
5700 const struct rte_flow_attr *attr)
5702 const struct mlx5_flow_driver_ops *fops;
5704 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5705 return fops->destroy_policer_rules(dev, fm, attr);
5709 * Allocate a counter.
5712 * Pointer to Ethernet device structure.
5715 * Index to allocated counter on success, 0 otherwise.
5718 mlx5_counter_alloc(struct rte_eth_dev *dev)
5720 const struct mlx5_flow_driver_ops *fops;
5721 struct rte_flow_attr attr = { .transfer = 0 };
5723 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5724 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5725 return fops->counter_alloc(dev);
5728 "port %u counter allocate is not supported.",
5729 dev->data->port_id);
5737 * Pointer to Ethernet device structure.
5739 * Index to counter to be free.
5742 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
5744 const struct mlx5_flow_driver_ops *fops;
5745 struct rte_flow_attr attr = { .transfer = 0 };
5747 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5748 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5749 fops->counter_free(dev, cnt);
5753 "port %u counter free is not supported.",
5754 dev->data->port_id);
5758 * Query counter statistics.
5761 * Pointer to Ethernet device structure.
5763 * Index to counter to query.
5765 * Set to clear counter statistics.
5767 * The counter hits packets number to save.
5769 * The counter hits bytes number to save.
5772 * 0 on success, a negative errno value otherwise.
5775 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
5776 bool clear, uint64_t *pkts, uint64_t *bytes)
5778 const struct mlx5_flow_driver_ops *fops;
5779 struct rte_flow_attr attr = { .transfer = 0 };
5781 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5782 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5783 return fops->counter_query(dev, cnt, clear, pkts, bytes);
5786 "port %u counter query is not supported.",
5787 dev->data->port_id);
5791 #define MLX5_POOL_QUERY_FREQ_US 1000000
5794 * Get number of all validate pools.
5797 * Pointer to mlx5_dev_ctx_shared object.
5800 * The number of all validate pools.
5803 mlx5_get_all_valid_pool_count(struct mlx5_dev_ctx_shared *sh)
5806 uint32_t pools_n = 0;
5808 for (i = 0; i < MLX5_CCONT_TYPE_MAX; ++i)
5809 pools_n += rte_atomic16_read(&sh->cmng.ccont[i].n_valid);
5814 * Set the periodic procedure for triggering asynchronous batch queries for all
5815 * the counter pools.
5818 * Pointer to mlx5_dev_ctx_shared object.
5821 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
5823 uint32_t pools_n, us;
5825 pools_n = mlx5_get_all_valid_pool_count(sh);
5826 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5827 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5828 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5829 sh->cmng.query_thread_on = 0;
5830 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5832 sh->cmng.query_thread_on = 1;
5837 * The periodic procedure for triggering asynchronous batch queries for all the
5838 * counter pools. This function is probably called by the host thread.
5841 * The parameter for the alarm process.
5844 mlx5_flow_query_alarm(void *arg)
5846 struct mlx5_dev_ctx_shared *sh = arg;
5847 struct mlx5_devx_obj *dcs;
5850 uint8_t batch = sh->cmng.batch;
5851 uint8_t age = sh->cmng.age;
5852 uint16_t pool_index = sh->cmng.pool_index;
5853 struct mlx5_pools_container *cont;
5854 struct mlx5_flow_counter_pool *pool;
5855 int cont_loop = MLX5_CCONT_TYPE_MAX;
5857 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5860 cont = MLX5_CNT_CONTAINER(sh, batch, age);
5861 rte_spinlock_lock(&cont->resize_sl);
5863 rte_spinlock_unlock(&cont->resize_sl);
5864 /* Check if all the containers are empty. */
5865 if (unlikely(--cont_loop == 0))
5869 if (batch == 0 && pool_index == 0) {
5871 sh->cmng.batch = batch;
5874 goto next_container;
5876 pool = cont->pools[pool_index];
5877 rte_spinlock_unlock(&cont->resize_sl);
5879 /* There is a pool query in progress. */
5882 LIST_FIRST(&sh->cmng.free_stat_raws);
5884 /* No free counter statistics raw memory. */
5886 dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5888 offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5890 * Identify the counters released between query trigger and query
5891 * handle more effiecntly. The counter released in this gap period
5892 * should wait for a new round of query as the new arrived packets
5893 * will not be taken into account.
5895 rte_atomic64_add(&pool->start_query_gen, 1);
5896 ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5898 pool->raw_hw->mem_mng->dm->id,
5900 (pool->raw_hw->data + offset),
5902 (uint64_t)(uintptr_t)pool);
5904 rte_atomic64_sub(&pool->start_query_gen, 1);
5905 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5906 " %d", pool->min_dcs->id);
5907 pool->raw_hw = NULL;
5910 pool->raw_hw->min_dcs_id = dcs->id;
5911 LIST_REMOVE(pool->raw_hw, next);
5912 sh->cmng.pending_queries++;
5914 if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5917 if (batch == 0 && pool_index == 0)
5921 sh->cmng.batch = batch;
5922 sh->cmng.pool_index = pool_index;
5924 mlx5_set_query_alarm(sh);
5928 * Check and callback event for new aged flow in the counter pool
5931 * Pointer to mlx5_dev_ctx_shared object.
5933 * Pointer to Current counter pool.
5936 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
5937 struct mlx5_flow_counter_pool *pool)
5939 struct mlx5_priv *priv;
5940 struct mlx5_flow_counter *cnt;
5941 struct mlx5_age_info *age_info;
5942 struct mlx5_age_param *age_param;
5943 struct mlx5_counter_stats_raw *cur = pool->raw_hw;
5944 struct mlx5_counter_stats_raw *prev = pool->raw;
5945 uint16_t curr = rte_rdtsc() / (rte_get_tsc_hz() / 10);
5948 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
5949 cnt = MLX5_POOL_GET_CNT(pool, i);
5950 age_param = MLX5_CNT_TO_AGE(cnt);
5951 if (rte_atomic16_read(&age_param->state) != AGE_CANDIDATE)
5953 if (cur->data[i].hits != prev->data[i].hits) {
5954 age_param->expire = curr + age_param->timeout;
5957 if ((uint16_t)(curr - age_param->expire) >= (UINT16_MAX / 2))
5960 * Hold the lock first, or if between the
5961 * state AGE_TMOUT and tailq operation the
5962 * release happened, the release procedure
5963 * may delete a non-existent tailq node.
5965 priv = rte_eth_devices[age_param->port_id].data->dev_private;
5966 age_info = GET_PORT_AGE_INFO(priv);
5967 rte_spinlock_lock(&age_info->aged_sl);
5968 /* If the cpmset fails, release happens. */
5969 if (rte_atomic16_cmpset((volatile uint16_t *)
5974 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
5975 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
5977 rte_spinlock_unlock(&age_info->aged_sl);
5979 for (i = 0; i < sh->max_port; i++) {
5980 age_info = &sh->port[i].age_info;
5981 if (!MLX5_AGE_GET(age_info, MLX5_AGE_EVENT_NEW))
5983 if (MLX5_AGE_GET(age_info, MLX5_AGE_TRIGGER))
5984 _rte_eth_dev_callback_process
5985 (&rte_eth_devices[sh->port[i].devx_ih_port_id],
5986 RTE_ETH_EVENT_FLOW_AGED, NULL);
5987 age_info->flags = 0;
5992 * Handler for the HW respond about ready values from an asynchronous batch
5993 * query. This function is probably called by the host thread.
5996 * The pointer to the shared device context.
5997 * @param[in] async_id
5998 * The Devx async ID.
6000 * The status of the completion.
6003 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6004 uint64_t async_id, int status)
6006 struct mlx5_flow_counter_pool *pool =
6007 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6008 struct mlx5_counter_stats_raw *raw_to_free;
6010 if (unlikely(status)) {
6011 rte_atomic64_sub(&pool->start_query_gen, 1);
6012 raw_to_free = pool->raw_hw;
6014 raw_to_free = pool->raw;
6015 if (IS_AGE_POOL(pool))
6016 mlx5_flow_aging_check(sh, pool);
6017 rte_spinlock_lock(&pool->sl);
6018 pool->raw = pool->raw_hw;
6019 rte_spinlock_unlock(&pool->sl);
6020 MLX5_ASSERT(rte_atomic64_read(&pool->end_query_gen) + 1 ==
6021 rte_atomic64_read(&pool->start_query_gen));
6022 rte_atomic64_set(&pool->end_query_gen,
6023 rte_atomic64_read(&pool->start_query_gen));
6024 /* Be sure the new raw counters data is updated in memory. */
6027 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6028 pool->raw_hw = NULL;
6029 sh->cmng.pending_queries--;
6033 * Translate the rte_flow group index to HW table value.
6035 * @param[in] attributes
6036 * Pointer to flow attributes
6037 * @param[in] external
6038 * Value is part of flow rule created by request external to PMD.
6040 * rte_flow group index value.
6041 * @param[out] fdb_def_rule
6042 * Whether fdb jump to table 1 is configured.
6046 * Pointer to error structure.
6049 * 0 on success, a negative errno value otherwise and rte_errno is set.
6052 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
6053 uint32_t group, bool fdb_def_rule, uint32_t *table,
6054 struct rte_flow_error *error)
6056 if (attributes->transfer && external && fdb_def_rule) {
6057 if (group == UINT32_MAX)
6058 return rte_flow_error_set
6060 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6062 "group index not supported");
6071 * Discover availability of metadata reg_c's.
6073 * Iteratively use test flows to check availability.
6076 * Pointer to the Ethernet device structure.
6079 * 0 on success, a negative errno value otherwise and rte_errno is set.
6082 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
6084 struct mlx5_priv *priv = dev->data->dev_private;
6085 struct mlx5_dev_config *config = &priv->config;
6086 enum modify_reg idx;
6089 /* reg_c[0] and reg_c[1] are reserved. */
6090 config->flow_mreg_c[n++] = REG_C_0;
6091 config->flow_mreg_c[n++] = REG_C_1;
6092 /* Discover availability of other reg_c's. */
6093 for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
6094 struct rte_flow_attr attr = {
6095 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
6096 .priority = MLX5_FLOW_PRIO_RSVD,
6099 struct rte_flow_item items[] = {
6101 .type = RTE_FLOW_ITEM_TYPE_END,
6104 struct rte_flow_action actions[] = {
6106 .type = (enum rte_flow_action_type)
6107 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
6108 .conf = &(struct mlx5_flow_action_copy_mreg){
6114 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6115 .conf = &(struct rte_flow_action_jump){
6116 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
6120 .type = RTE_FLOW_ACTION_TYPE_END,
6124 struct rte_flow *flow;
6125 struct rte_flow_error error;
6127 if (!config->dv_flow_en)
6129 /* Create internal flow, validation skips copy action. */
6130 flow_idx = flow_list_create(dev, NULL, &attr, items,
6131 actions, false, &error);
6132 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
6136 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
6137 config->flow_mreg_c[n++] = idx;
6138 flow_list_destroy(dev, NULL, flow_idx);
6140 for (; n < MLX5_MREG_C_NUM; ++n)
6141 config->flow_mreg_c[n] = REG_NONE;
6146 * Dump flow raw hw data to file
6149 * The pointer to Ethernet device.
6151 * A pointer to a file for output.
6153 * Perform verbose error reporting if not NULL. PMDs initialize this
6154 * structure in case of error only.
6156 * 0 on success, a nagative value otherwise.
6159 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
6161 struct rte_flow_error *error __rte_unused)
6163 struct mlx5_priv *priv = dev->data->dev_private;
6164 struct mlx5_dev_ctx_shared *sh = priv->sh;
6166 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
6167 sh->tx_domain, file);
6171 * Get aged-out flows.
6174 * Pointer to the Ethernet device structure.
6175 * @param[in] context
6176 * The address of an array of pointers to the aged-out flows contexts.
6177 * @param[in] nb_countexts
6178 * The length of context array pointers.
6180 * Perform verbose error reporting if not NULL. Initialized in case of
6184 * how many contexts get in success, otherwise negative errno value.
6185 * if nb_contexts is 0, return the amount of all aged contexts.
6186 * if nb_contexts is not 0 , return the amount of aged flows reported
6187 * in the context array.
6190 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
6191 uint32_t nb_contexts, struct rte_flow_error *error)
6193 const struct mlx5_flow_driver_ops *fops;
6194 struct rte_flow_attr attr = { .transfer = 0 };
6196 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6197 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6198 return fops->get_aged_flows(dev, contexts, nb_contexts,
6202 "port %u get aged flows is not supported.",
6203 dev->data->port_id);