drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 #include <rte_common.h>
  14 #include <rte_ether.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_eal_paging.h>
  17 #include <rte_flow.h>
  18 #include <rte_cycles.h>
  19 #include <rte_flow_driver.h>
  20 #include <rte_malloc.h>
  21 #include <rte_ip.h>
  22
  23 #include <mlx5_glue.h>
  24 #include <mlx5_devx_cmds.h>
  25 #include <mlx5_prm.h>
  26 #include <mlx5_malloc.h>
  27
  28 #include "mlx5_defs.h"
  29 #include "mlx5.h"
  30 #include "mlx5_flow.h"
  31 #include "mlx5_flow_os.h"
  32 #include "mlx5_rxtx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              struct tunnel_default_miss_ctx *ctx,
  54                              struct rte_flow_error *error);
  55 static struct mlx5_flow_tunnel *
  56 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  57 static void
  58 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  59 static uint32_t
  60 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  61                                 const struct mlx5_flow_tunnel *tunnel,
  62                                 uint32_t group, uint32_t *table,
  63                                 struct rte_flow_error *error);
  64
  65 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  66 static void mlx5_flow_pop_thread_workspace(void);
  67
  68
  69 /** Device flow drivers. */
  70 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  71
  72 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  73
  74 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  75         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  76 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  77         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  78 #endif
  79         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  80         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  81 };
  82
  83 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  84 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  85         (const int []){ \
  86                 __VA_ARGS__, 0, \
  87         }
  88
  89 /** Node object of input graph for mlx5_flow_expand_rss(). */
  90 struct mlx5_flow_expand_node {
  91         const int *const next;
  92         /**<
  93          * List of next node indexes. Index 0 is interpreted as a terminator.
  94          */
  95         const enum rte_flow_item_type type;
  96         /**< Pattern item type of current node. */
  97         uint64_t rss_types;
  98         /**<
  99          * RSS types bit-field associated with this node
 100          * (see ETH_RSS_* definitions).
 101          */
 102 };
 103
 104 /** Object returned by mlx5_flow_expand_rss(). */
 105 struct mlx5_flow_expand_rss {
 106         uint32_t entries;
 107         /**< Number of entries @p patterns and @p priorities. */
 108         struct {
 109                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 110                 uint32_t priority; /**< Priority offset for each expansion. */
 111         } entry[];
 112 };
 113
 114 static enum rte_flow_item_type
 115 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 116 {
 117         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 118         uint16_t ether_type = 0;
 119         uint16_t ether_type_m;
 120         uint8_t ip_next_proto = 0;
 121         uint8_t ip_next_proto_m;
 122
 123         if (item == NULL || item->spec == NULL)
 124                 return ret;
 125         switch (item->type) {
 126         case RTE_FLOW_ITEM_TYPE_ETH:
 127                 if (item->mask)
 128                         ether_type_m = ((const struct rte_flow_item_eth *)
 129                                                 (item->mask))->type;
 130                 else
 131                         ether_type_m = rte_flow_item_eth_mask.type;
 132                 if (ether_type_m != RTE_BE16(0xFFFF))
 133                         break;
 134                 ether_type = ((const struct rte_flow_item_eth *)
 135                                 (item->spec))->type;
 136                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 137                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 139                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 140                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 141                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 142                 else
 143                         ret = RTE_FLOW_ITEM_TYPE_END;
 144                 break;
 145         case RTE_FLOW_ITEM_TYPE_VLAN:
 146                 if (item->mask)
 147                         ether_type_m = ((const struct rte_flow_item_vlan *)
 148                                                 (item->mask))->inner_type;
 149                 else
 150                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 151                 if (ether_type_m != RTE_BE16(0xFFFF))
 152                         break;
 153                 ether_type = ((const struct rte_flow_item_vlan *)
 154                                 (item->spec))->inner_type;
 155                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 156                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 157                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 158                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 159                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 160                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 161                 else
 162                         ret = RTE_FLOW_ITEM_TYPE_END;
 163                 break;
 164         case RTE_FLOW_ITEM_TYPE_IPV4:
 165                 if (item->mask)
 166                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 167                                         (item->mask))->hdr.next_proto_id;
 168                 else
 169                         ip_next_proto_m =
 170                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 171                 if (ip_next_proto_m != 0xFF)
 172                         break;
 173                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 174                                 (item->spec))->hdr.next_proto_id;
 175                 if (ip_next_proto == IPPROTO_UDP)
 176                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 177                 else if (ip_next_proto == IPPROTO_TCP)
 178                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 179                 else if (ip_next_proto == IPPROTO_IP)
 180                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 181                 else if (ip_next_proto == IPPROTO_IPV6)
 182                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 183                 else
 184                         ret = RTE_FLOW_ITEM_TYPE_END;
 185                 break;
 186         case RTE_FLOW_ITEM_TYPE_IPV6:
 187                 if (item->mask)
 188                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 189                                                 (item->mask))->hdr.proto;
 190                 else
 191                         ip_next_proto_m =
 192                                 rte_flow_item_ipv6_mask.hdr.proto;
 193                 if (ip_next_proto_m != 0xFF)
 194                         break;
 195                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 196                                 (item->spec))->hdr.proto;
 197                 if (ip_next_proto == IPPROTO_UDP)
 198                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 199                 else if (ip_next_proto == IPPROTO_TCP)
 200                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 201                 else if (ip_next_proto == IPPROTO_IP)
 202                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 203                 else if (ip_next_proto == IPPROTO_IPV6)
 204                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 205                 else
 206                         ret = RTE_FLOW_ITEM_TYPE_END;
 207                 break;
 208         default:
 209                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 210                 break;
 211         }
 212         return ret;
 213 }
 214
 215 #define MLX5_RSS_EXP_ELT_N 8
 216
 217 /**
 218  * Expand RSS flows into several possible flows according to the RSS hash
 219  * fields requested and the driver capabilities.
 220  *
 221  * @param[out] buf
 222  *   Buffer to store the result expansion.
 223  * @param[in] size
 224  *   Buffer size in bytes. If 0, @p buf can be NULL.
 225  * @param[in] pattern
 226  *   User flow pattern.
 227  * @param[in] types
 228  *   RSS types to expand (see ETH_RSS_* definitions).
 229  * @param[in] graph
 230  *   Input graph to expand @p pattern according to @p types.
 231  * @param[in] graph_root_index
 232  *   Index of root node in @p graph, typically 0.
 233  *
 234  * @return
 235  *   A positive value representing the size of @p buf in bytes regardless of
 236  *   @p size on success, a negative errno value otherwise and rte_errno is
 237  *   set, the following errors are defined:
 238  *
 239  *   -E2BIG: graph-depth @p graph is too deep.
 240  */
 241 static int
 242 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 243                      const struct rte_flow_item *pattern, uint64_t types,
 244                      const struct mlx5_flow_expand_node graph[],
 245                      int graph_root_index)
 246 {
 247         const struct rte_flow_item *item;
 248         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 249         const int *next_node;
 250         const int *stack[MLX5_RSS_EXP_ELT_N];
 251         int stack_pos = 0;
 252         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 253         unsigned int i;
 254         size_t lsize;
 255         size_t user_pattern_size = 0;
 256         void *addr = NULL;
 257         const struct mlx5_flow_expand_node *next = NULL;
 258         struct rte_flow_item missed_item;
 259         int missed = 0;
 260         int elt = 0;
 261         const struct rte_flow_item *last_item = NULL;
 262
 263         memset(&missed_item, 0, sizeof(missed_item));
 264         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 265                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 266         if (lsize <= size) {
 267                 buf->entry[0].priority = 0;
 268                 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 269                 buf->entries = 0;
 270                 addr = buf->entry[0].pattern;
 271         }
 272         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 273                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 274                         last_item = item;
 275                 for (i = 0; node->next && node->next[i]; ++i) {
 276                         next = &graph[node->next[i]];
 277                         if (next->type == item->type)
 278                                 break;
 279                 }
 280                 if (next)
 281                         node = next;
 282                 user_pattern_size += sizeof(*item);
 283         }
 284         user_pattern_size += sizeof(*item); /* Handle END item. */
 285         lsize += user_pattern_size;
 286         /* Copy the user pattern in the first entry of the buffer. */
 287         if (lsize <= size) {
 288                 rte_memcpy(addr, pattern, user_pattern_size);
 289                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 290                 buf->entries = 1;
 291         }
 292         /* Start expanding. */
 293         memset(flow_items, 0, sizeof(flow_items));
 294         user_pattern_size -= sizeof(*item);
 295         /*
 296          * Check if the last valid item has spec set, need complete pattern,
 297          * and the pattern can be used for expansion.
 298          */
 299         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 300         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 301                 /* Item type END indicates expansion is not required. */
 302                 return lsize;
 303         }
 304         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 305                 next = NULL;
 306                 missed = 1;
 307                 for (i = 0; node->next && node->next[i]; ++i) {
 308                         next = &graph[node->next[i]];
 309                         if (next->type == missed_item.type) {
 310                                 flow_items[0].type = missed_item.type;
 311                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 312                                 break;
 313                         }
 314                         next = NULL;
 315                 }
 316         }
 317         if (next && missed) {
 318                 elt = 2; /* missed item + item end. */
 319                 node = next;
 320                 lsize += elt * sizeof(*item) + user_pattern_size;
 321                 if ((node->rss_types & types) && lsize <= size) {
 322                         buf->entry[buf->entries].priority = 1;
 323                         buf->entry[buf->entries].pattern = addr;
 324                         buf->entries++;
 325                         rte_memcpy(addr, buf->entry[0].pattern,
 326                                    user_pattern_size);
 327                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 328                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 329                         addr = (void *)(((uintptr_t)addr) +
 330                                         elt * sizeof(*item));
 331                 }
 332         }
 333         memset(flow_items, 0, sizeof(flow_items));
 334         next_node = node->next;
 335         stack[stack_pos] = next_node;
 336         node = next_node ? &graph[*next_node] : NULL;
 337         while (node) {
 338                 flow_items[stack_pos].type = node->type;
 339                 if (node->rss_types & types) {
 340                         /*
 341                          * compute the number of items to copy from the
 342                          * expansion and copy it.
 343                          * When the stack_pos is 0, there are 1 element in it,
 344                          * plus the addition END item.
 345                          */
 346                         elt = stack_pos + 2;
 347                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 348                         lsize += elt * sizeof(*item) + user_pattern_size;
 349                         if (lsize <= size) {
 350                                 size_t n = elt * sizeof(*item);
 351
 352                                 buf->entry[buf->entries].priority =
 353                                         stack_pos + 1 + missed;
 354                                 buf->entry[buf->entries].pattern = addr;
 355                                 buf->entries++;
 356                                 rte_memcpy(addr, buf->entry[0].pattern,
 357                                            user_pattern_size);
 358                                 addr = (void *)(((uintptr_t)addr) +
 359                                                 user_pattern_size);
 360                                 rte_memcpy(addr, &missed_item,
 361                                            missed * sizeof(*item));
 362                                 addr = (void *)(((uintptr_t)addr) +
 363                                         missed * sizeof(*item));
 364                                 rte_memcpy(addr, flow_items, n);
 365                                 addr = (void *)(((uintptr_t)addr) + n);
 366                         }
 367                 }
 368                 /* Go deeper. */
 369                 if (node->next) {
 370                         next_node = node->next;
 371                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 372                                 rte_errno = E2BIG;
 373                                 return -rte_errno;
 374                         }
 375                         stack[stack_pos] = next_node;
 376                 } else if (*(next_node + 1)) {
 377                         /* Follow up with the next possibility. */
 378                         ++next_node;
 379                 } else {
 380                         /* Move to the next path. */
 381                         if (stack_pos)
 382                                 next_node = stack[--stack_pos];
 383                         next_node++;
 384                         stack[stack_pos] = next_node;
 385                 }
 386                 node = *next_node ? &graph[*next_node] : NULL;
 387         };
 388         /* no expanded flows but we have missed item, create one rule for it */
 389         if (buf->entries == 1 && missed != 0) {
 390                 elt = 2;
 391                 lsize += elt * sizeof(*item) + user_pattern_size;
 392                 if (lsize <= size) {
 393                         buf->entry[buf->entries].priority = 1;
 394                         buf->entry[buf->entries].pattern = addr;
 395                         buf->entries++;
 396                         flow_items[0].type = missed_item.type;
 397                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 398                         rte_memcpy(addr, buf->entry[0].pattern,
 399                                    user_pattern_size);
 400                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 401                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 402                 }
 403         }
 404         return lsize;
 405 }
 406
 407 enum mlx5_expansion {
 408         MLX5_EXPANSION_ROOT,
 409         MLX5_EXPANSION_ROOT_OUTER,
 410         MLX5_EXPANSION_ROOT_ETH_VLAN,
 411         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 412         MLX5_EXPANSION_OUTER_ETH,
 413         MLX5_EXPANSION_OUTER_ETH_VLAN,
 414         MLX5_EXPANSION_OUTER_VLAN,
 415         MLX5_EXPANSION_OUTER_IPV4,
 416         MLX5_EXPANSION_OUTER_IPV4_UDP,
 417         MLX5_EXPANSION_OUTER_IPV4_TCP,
 418         MLX5_EXPANSION_OUTER_IPV6,
 419         MLX5_EXPANSION_OUTER_IPV6_UDP,
 420         MLX5_EXPANSION_OUTER_IPV6_TCP,
 421         MLX5_EXPANSION_VXLAN,
 422         MLX5_EXPANSION_VXLAN_GPE,
 423         MLX5_EXPANSION_GRE,
 424         MLX5_EXPANSION_MPLS,
 425         MLX5_EXPANSION_ETH,
 426         MLX5_EXPANSION_ETH_VLAN,
 427         MLX5_EXPANSION_VLAN,
 428         MLX5_EXPANSION_IPV4,
 429         MLX5_EXPANSION_IPV4_UDP,
 430         MLX5_EXPANSION_IPV4_TCP,
 431         MLX5_EXPANSION_IPV6,
 432         MLX5_EXPANSION_IPV6_UDP,
 433         MLX5_EXPANSION_IPV6_TCP,
 434 };
 435
 436 /** Supported expansion of items. */
 437 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 438         [MLX5_EXPANSION_ROOT] = {
 439                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 440                                                   MLX5_EXPANSION_IPV4,
 441                                                   MLX5_EXPANSION_IPV6),
 442                 .type = RTE_FLOW_ITEM_TYPE_END,
 443         },
 444         [MLX5_EXPANSION_ROOT_OUTER] = {
 445                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 446                                                   MLX5_EXPANSION_OUTER_IPV4,
 447                                                   MLX5_EXPANSION_OUTER_IPV6),
 448                 .type = RTE_FLOW_ITEM_TYPE_END,
 449         },
 450         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 451                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 452                 .type = RTE_FLOW_ITEM_TYPE_END,
 453         },
 454         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 455                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 456                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 457                 .type = RTE_FLOW_ITEM_TYPE_END,
 458         },
 459         [MLX5_EXPANSION_OUTER_ETH] = {
 460                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 461                                                   MLX5_EXPANSION_OUTER_IPV6,
 462                                                   MLX5_EXPANSION_MPLS),
 463                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 464                 .rss_types = 0,
 465         },
 466         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 467                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 468                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 469                 .rss_types = 0,
 470         },
 471         [MLX5_EXPANSION_OUTER_VLAN] = {
 472                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 473                                                   MLX5_EXPANSION_OUTER_IPV6),
 474                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 475         },
 476         [MLX5_EXPANSION_OUTER_IPV4] = {
 477                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 478                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 479                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 480                          MLX5_EXPANSION_GRE,
 481                          MLX5_EXPANSION_IPV4,
 482                          MLX5_EXPANSION_IPV6),
 483                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 484                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 485                         ETH_RSS_NONFRAG_IPV4_OTHER,
 486         },
 487         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 488                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 489                                                   MLX5_EXPANSION_VXLAN_GPE),
 490                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 491                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 492         },
 493         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 494                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 495                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 496         },
 497         [MLX5_EXPANSION_OUTER_IPV6] = {
 498                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 499                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 500                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 501                          MLX5_EXPANSION_IPV4,
 502                          MLX5_EXPANSION_IPV6),
 503                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 504                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 505                         ETH_RSS_NONFRAG_IPV6_OTHER,
 506         },
 507         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 508                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 509                                                   MLX5_EXPANSION_VXLAN_GPE),
 510                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 511                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 512         },
 513         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 514                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 515                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 516         },
 517         [MLX5_EXPANSION_VXLAN] = {
 518                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 519                                                   MLX5_EXPANSION_IPV4,
 520                                                   MLX5_EXPANSION_IPV6),
 521                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 522         },
 523         [MLX5_EXPANSION_VXLAN_GPE] = {
 524                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 525                                                   MLX5_EXPANSION_IPV4,
 526                                                   MLX5_EXPANSION_IPV6),
 527                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 528         },
 529         [MLX5_EXPANSION_GRE] = {
 530                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 531                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 532         },
 533         [MLX5_EXPANSION_MPLS] = {
 534                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 535                                                   MLX5_EXPANSION_IPV6),
 536                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 537         },
 538         [MLX5_EXPANSION_ETH] = {
 539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 540                                                   MLX5_EXPANSION_IPV6),
 541                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 542         },
 543         [MLX5_EXPANSION_ETH_VLAN] = {
 544                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 545                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 546         },
 547         [MLX5_EXPANSION_VLAN] = {
 548                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 549                                                   MLX5_EXPANSION_IPV6),
 550                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 551         },
 552         [MLX5_EXPANSION_IPV4] = {
 553                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 554                                                   MLX5_EXPANSION_IPV4_TCP),
 555                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 556                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 557                         ETH_RSS_NONFRAG_IPV4_OTHER,
 558         },
 559         [MLX5_EXPANSION_IPV4_UDP] = {
 560                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 561                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 562         },
 563         [MLX5_EXPANSION_IPV4_TCP] = {
 564                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 565                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 566         },
 567         [MLX5_EXPANSION_IPV6] = {
 568                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 569                                                   MLX5_EXPANSION_IPV6_TCP),
 570                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 571                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 572                         ETH_RSS_NONFRAG_IPV6_OTHER,
 573         },
 574         [MLX5_EXPANSION_IPV6_UDP] = {
 575                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 576                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 577         },
 578         [MLX5_EXPANSION_IPV6_TCP] = {
 579                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 580                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 581         },
 582 };
 583
 584 static struct rte_flow_shared_action *
 585 mlx5_shared_action_create(struct rte_eth_dev *dev,
 586                           const struct rte_flow_shared_action_conf *conf,
 587                           const struct rte_flow_action *action,
 588                           struct rte_flow_error *error);
 589 static int mlx5_shared_action_destroy
 590                                 (struct rte_eth_dev *dev,
 591                                  struct rte_flow_shared_action *shared_action,
 592                                  struct rte_flow_error *error);
 593 static int mlx5_shared_action_update
 594                                 (struct rte_eth_dev *dev,
 595                                  struct rte_flow_shared_action *shared_action,
 596                                  const struct rte_flow_action *action,
 597                                  struct rte_flow_error *error);
 598 static int mlx5_shared_action_query
 599                                 (struct rte_eth_dev *dev,
 600                                  const struct rte_flow_shared_action *action,
 601                                  void *data,
 602                                  struct rte_flow_error *error);
 603 static int
 604 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 605                     struct rte_flow_tunnel *app_tunnel,
 606                     struct rte_flow_action **actions,
 607                     uint32_t *num_of_actions,
 608                     struct rte_flow_error *error);
 609 static int
 610 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 611                        struct rte_flow_tunnel *app_tunnel,
 612                        struct rte_flow_item **items,
 613                        uint32_t *num_of_items,
 614                        struct rte_flow_error *error);
 615 static int
 616 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 617                               struct rte_flow_item *pmd_items,
 618                               uint32_t num_items, struct rte_flow_error *err);
 619 static int
 620 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 621                                 struct rte_flow_action *pmd_actions,
 622                                 uint32_t num_actions,
 623                                 struct rte_flow_error *err);
 624 static int
 625 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 626                                   struct rte_mbuf *m,
 627                                   struct rte_flow_restore_info *info,
 628                                   struct rte_flow_error *err);
 629
 630 static const struct rte_flow_ops mlx5_flow_ops = {
 631         .validate = mlx5_flow_validate,
 632         .create = mlx5_flow_create,
 633         .destroy = mlx5_flow_destroy,
 634         .flush = mlx5_flow_flush,
 635         .isolate = mlx5_flow_isolate,
 636         .query = mlx5_flow_query,
 637         .dev_dump = mlx5_flow_dev_dump,
 638         .get_aged_flows = mlx5_flow_get_aged_flows,
 639         .shared_action_create = mlx5_shared_action_create,
 640         .shared_action_destroy = mlx5_shared_action_destroy,
 641         .shared_action_update = mlx5_shared_action_update,
 642         .shared_action_query = mlx5_shared_action_query,
 643         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 644         .tunnel_match = mlx5_flow_tunnel_match,
 645         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 646         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 647         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 648 };
 649
 650 /* Tunnel information. */
 651 struct mlx5_flow_tunnel_info {
 652         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 653         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 654 };
 655
 656 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 657         {
 658                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 659                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 660         },
 661         {
 662                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 663                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 664         },
 665         {
 666                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 667                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 668         },
 669         {
 670                 .tunnel = MLX5_FLOW_LAYER_GRE,
 671                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 672         },
 673         {
 674                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 675                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 676         },
 677         {
 678                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 679                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 680         },
 681         {
 682                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 683                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 684         },
 685         {
 686                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 687                 .ptype = RTE_PTYPE_TUNNEL_IP,
 688         },
 689         {
 690                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 691                 .ptype = RTE_PTYPE_TUNNEL_IP,
 692         },
 693         {
 694                 .tunnel = MLX5_FLOW_LAYER_GTP,
 695                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 696         },
 697 };
 698
 699
 700
 701 /**
 702  * Translate tag ID to register.
 703  *
 704  * @param[in] dev
 705  *   Pointer to the Ethernet device structure.
 706  * @param[in] feature
 707  *   The feature that request the register.
 708  * @param[in] id
 709  *   The request register ID.
 710  * @param[out] error
 711  *   Error description in case of any.
 712  *
 713  * @return
 714  *   The request register on success, a negative errno
 715  *   value otherwise and rte_errno is set.
 716  */
 717 int
 718 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 719                      enum mlx5_feature_name feature,
 720                      uint32_t id,
 721                      struct rte_flow_error *error)
 722 {
 723         struct mlx5_priv *priv = dev->data->dev_private;
 724         struct mlx5_dev_config *config = &priv->config;
 725         enum modify_reg start_reg;
 726         bool skip_mtr_reg = false;
 727
 728         switch (feature) {
 729         case MLX5_HAIRPIN_RX:
 730                 return REG_B;
 731         case MLX5_HAIRPIN_TX:
 732                 return REG_A;
 733         case MLX5_METADATA_RX:
 734                 switch (config->dv_xmeta_en) {
 735                 case MLX5_XMETA_MODE_LEGACY:
 736                         return REG_B;
 737                 case MLX5_XMETA_MODE_META16:
 738                         return REG_C_0;
 739                 case MLX5_XMETA_MODE_META32:
 740                         return REG_C_1;
 741                 }
 742                 break;
 743         case MLX5_METADATA_TX:
 744                 return REG_A;
 745         case MLX5_METADATA_FDB:
 746                 switch (config->dv_xmeta_en) {
 747                 case MLX5_XMETA_MODE_LEGACY:
 748                         return REG_NON;
 749                 case MLX5_XMETA_MODE_META16:
 750                         return REG_C_0;
 751                 case MLX5_XMETA_MODE_META32:
 752                         return REG_C_1;
 753                 }
 754                 break;
 755         case MLX5_FLOW_MARK:
 756                 switch (config->dv_xmeta_en) {
 757                 case MLX5_XMETA_MODE_LEGACY:
 758                         return REG_NON;
 759                 case MLX5_XMETA_MODE_META16:
 760                         return REG_C_1;
 761                 case MLX5_XMETA_MODE_META32:
 762                         return REG_C_0;
 763                 }
 764                 break;
 765         case MLX5_MTR_SFX:
 766                 /*
 767                  * If meter color and flow match share one register, flow match
 768                  * should use the meter color register for match.
 769                  */
 770                 if (priv->mtr_reg_share)
 771                         return priv->mtr_color_reg;
 772                 else
 773                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 774                                REG_C_3;
 775         case MLX5_MTR_COLOR:
 776         case MLX5_ASO_FLOW_HIT: /* Both features use the same REG_C. */
 777                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 778                 return priv->mtr_color_reg;
 779         case MLX5_COPY_MARK:
 780                 /*
 781                  * Metadata COPY_MARK register using is in meter suffix sub
 782                  * flow while with meter. It's safe to share the same register.
 783                  */
 784                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 785         case MLX5_APP_TAG:
 786                 /*
 787                  * If meter is enable, it will engage the register for color
 788                  * match and flow match. If meter color match is not using the
 789                  * REG_C_2, need to skip the REG_C_x be used by meter color
 790                  * match.
 791                  * If meter is disable, free to use all available registers.
 792                  */
 793                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 794                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 795                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 796                 if (id > (uint32_t)(REG_C_7 - start_reg))
 797                         return rte_flow_error_set(error, EINVAL,
 798                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 799                                                   NULL, "invalid tag id");
 800                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 801                         return rte_flow_error_set(error, ENOTSUP,
 802                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 803                                                   NULL, "unsupported tag id");
 804                 /*
 805                  * This case means meter is using the REG_C_x great than 2.
 806                  * Take care not to conflict with meter color REG_C_x.
 807                  * If the available index REG_C_y >= REG_C_x, skip the
 808                  * color register.
 809                  */
 810                 if (skip_mtr_reg && config->flow_mreg_c
 811                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 812                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 813                                 return rte_flow_error_set(error, EINVAL,
 814                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 815                                                         NULL, "invalid tag id");
 816                         if (config->flow_mreg_c
 817                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 818                                 return config->flow_mreg_c
 819                                                [id + 1 + start_reg - REG_C_0];
 820                         return rte_flow_error_set(error, ENOTSUP,
 821                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 822                                                   NULL, "unsupported tag id");
 823                 }
 824                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 825         }
 826         MLX5_ASSERT(false);
 827         return rte_flow_error_set(error, EINVAL,
 828                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 829                                   NULL, "invalid feature name");
 830 }
 831
 832 /**
 833  * Check extensive flow metadata register support.
 834  *
 835  * @param dev
 836  *   Pointer to rte_eth_dev structure.
 837  *
 838  * @return
 839  *   True if device supports extensive flow metadata register, otherwise false.
 840  */
 841 bool
 842 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 843 {
 844         struct mlx5_priv *priv = dev->data->dev_private;
 845         struct mlx5_dev_config *config = &priv->config;
 846
 847         /*
 848          * Having available reg_c can be regarded inclusively as supporting
 849          * extensive flow metadata register, which could mean,
 850          * - metadata register copy action by modify header.
 851          * - 16 modify header actions is supported.
 852          * - reg_c's are preserved across different domain (FDB and NIC) on
 853          *   packet loopback by flow lookup miss.
 854          */
 855         return config->flow_mreg_c[2] != REG_NON;
 856 }
 857
 858 /**
 859  * Verify the @p item specifications (spec, last, mask) are compatible with the
 860  * NIC capabilities.
 861  *
 862  * @param[in] item
 863  *   Item specification.
 864  * @param[in] mask
 865  *   @p item->mask or flow default bit-masks.
 866  * @param[in] nic_mask
 867  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 868  * @param[in] size
 869  *   Bit-masks size in bytes.
 870  * @param[in] range_accepted
 871  *   True if range of values is accepted for specific fields, false otherwise.
 872  * @param[out] error
 873  *   Pointer to error structure.
 874  *
 875  * @return
 876  *   0 on success, a negative errno value otherwise and rte_errno is set.
 877  */
 878 int
 879 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 880                           const uint8_t *mask,
 881                           const uint8_t *nic_mask,
 882                           unsigned int size,
 883                           bool range_accepted,
 884                           struct rte_flow_error *error)
 885 {
 886         unsigned int i;
 887
 888         MLX5_ASSERT(nic_mask);
 889         for (i = 0; i < size; ++i)
 890                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 891                         return rte_flow_error_set(error, ENOTSUP,
 892                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 893                                                   item,
 894                                                   "mask enables non supported"
 895                                                   " bits");
 896         if (!item->spec && (item->mask || item->last))
 897                 return rte_flow_error_set(error, EINVAL,
 898                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 899                                           "mask/last without a spec is not"
 900                                           " supported");
 901         if (item->spec && item->last && !range_accepted) {
 902                 uint8_t spec[size];
 903                 uint8_t last[size];
 904                 unsigned int i;
 905                 int ret;
 906
 907                 for (i = 0; i < size; ++i) {
 908                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 909                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 910                 }
 911                 ret = memcmp(spec, last, size);
 912                 if (ret != 0)
 913                         return rte_flow_error_set(error, EINVAL,
 914                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 915                                                   item,
 916                                                   "range is not valid");
 917         }
 918         return 0;
 919 }
 920
 921 /**
 922  * Adjust the hash fields according to the @p flow information.
 923  *
 924  * @param[in] dev_flow.
 925  *   Pointer to the mlx5_flow.
 926  * @param[in] tunnel
 927  *   1 when the hash field is for a tunnel item.
 928  * @param[in] layer_types
 929  *   ETH_RSS_* types.
 930  * @param[in] hash_fields
 931  *   Item hash fields.
 932  *
 933  * @return
 934  *   The hash fields that should be used.
 935  */
 936 uint64_t
 937 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
 938                             int tunnel __rte_unused, uint64_t layer_types,
 939                             uint64_t hash_fields)
 940 {
 941 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 942         int rss_request_inner = rss_desc->level >= 2;
 943
 944         /* Check RSS hash level for tunnel. */
 945         if (tunnel && rss_request_inner)
 946                 hash_fields |= IBV_RX_HASH_INNER;
 947         else if (tunnel || rss_request_inner)
 948                 return 0;
 949 #endif
 950         /* Check if requested layer matches RSS hash fields. */
 951         if (!(rss_desc->types & layer_types))
 952                 return 0;
 953         return hash_fields;
 954 }
 955
 956 /**
 957  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 958  * if several tunnel rules are used on this queue, the tunnel ptype will be
 959  * cleared.
 960  *
 961  * @param rxq_ctrl
 962  *   Rx queue to update.
 963  */
 964 static void
 965 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 966 {
 967         unsigned int i;
 968         uint32_t tunnel_ptype = 0;
 969
 970         /* Look up for the ptype to use. */
 971         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 972                 if (!rxq_ctrl->flow_tunnels_n[i])
 973                         continue;
 974                 if (!tunnel_ptype) {
 975                         tunnel_ptype = tunnels_info[i].ptype;
 976                 } else {
 977                         tunnel_ptype = 0;
 978                         break;
 979                 }
 980         }
 981         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 982 }
 983
 984 /**
 985  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 986  * flow.
 987  *
 988  * @param[in] dev
 989  *   Pointer to the Ethernet device structure.
 990  * @param[in] dev_handle
 991  *   Pointer to device flow handle structure.
 992  */
 993 static void
 994 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
 995                        struct mlx5_flow_handle *dev_handle)
 996 {
 997         struct mlx5_priv *priv = dev->data->dev_private;
 998         const int mark = dev_handle->mark;
 999         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1000         struct mlx5_ind_table_obj *ind_tbl = NULL;
1001         unsigned int i;
1002
1003         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1004                 struct mlx5_hrxq *hrxq;
1005
1006                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1007                               dev_handle->rix_hrxq);
1008                 if (hrxq)
1009                         ind_tbl = hrxq->ind_table;
1010         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1011                 struct mlx5_shared_action_rss *shared_rss;
1012
1013                 shared_rss = mlx5_ipool_get
1014                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1015                          dev_handle->rix_srss);
1016                 if (shared_rss)
1017                         ind_tbl = shared_rss->ind_tbl;
1018         }
1019         if (!ind_tbl)
1020                 return;
1021         for (i = 0; i != ind_tbl->queues_n; ++i) {
1022                 int idx = ind_tbl->queues[i];
1023                 struct mlx5_rxq_ctrl *rxq_ctrl =
1024                         container_of((*priv->rxqs)[idx],
1025                                      struct mlx5_rxq_ctrl, rxq);
1026
1027                 /*
1028                  * To support metadata register copy on Tx loopback,
1029                  * this must be always enabled (metadata may arive
1030                  * from other port - not from local flows only.
1031                  */
1032                 if (priv->config.dv_flow_en &&
1033                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1034                     mlx5_flow_ext_mreg_supported(dev)) {
1035                         rxq_ctrl->rxq.mark = 1;
1036                         rxq_ctrl->flow_mark_n = 1;
1037                 } else if (mark) {
1038                         rxq_ctrl->rxq.mark = 1;
1039                         rxq_ctrl->flow_mark_n++;
1040                 }
1041                 if (tunnel) {
1042                         unsigned int j;
1043
1044                         /* Increase the counter matching the flow. */
1045                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1046                                 if ((tunnels_info[j].tunnel &
1047                                      dev_handle->layers) ==
1048                                     tunnels_info[j].tunnel) {
1049                                         rxq_ctrl->flow_tunnels_n[j]++;
1050                                         break;
1051                                 }
1052                         }
1053                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1054                 }
1055         }
1056 }
1057
1058 /**
1059  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1060  *
1061  * @param[in] dev
1062  *   Pointer to the Ethernet device structure.
1063  * @param[in] flow
1064  *   Pointer to flow structure.
1065  */
1066 static void
1067 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1068 {
1069         struct mlx5_priv *priv = dev->data->dev_private;
1070         uint32_t handle_idx;
1071         struct mlx5_flow_handle *dev_handle;
1072
1073         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1074                        handle_idx, dev_handle, next)
1075                 flow_drv_rxq_flags_set(dev, dev_handle);
1076 }
1077
1078 /**
1079  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1080  * device flow if no other flow uses it with the same kind of request.
1081  *
1082  * @param dev
1083  *   Pointer to Ethernet device.
1084  * @param[in] dev_handle
1085  *   Pointer to the device flow handle structure.
1086  */
1087 static void
1088 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1089                         struct mlx5_flow_handle *dev_handle)
1090 {
1091         struct mlx5_priv *priv = dev->data->dev_private;
1092         const int mark = dev_handle->mark;
1093         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1094         struct mlx5_ind_table_obj *ind_tbl = NULL;
1095         unsigned int i;
1096
1097         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1098                 struct mlx5_hrxq *hrxq;
1099
1100                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1101                               dev_handle->rix_hrxq);
1102                 if (hrxq)
1103                         ind_tbl = hrxq->ind_table;
1104         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1105                 struct mlx5_shared_action_rss *shared_rss;
1106
1107                 shared_rss = mlx5_ipool_get
1108                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1109                          dev_handle->rix_srss);
1110                 if (shared_rss)
1111                         ind_tbl = shared_rss->ind_tbl;
1112         }
1113         if (!ind_tbl)
1114                 return;
1115         MLX5_ASSERT(dev->data->dev_started);
1116         for (i = 0; i != ind_tbl->queues_n; ++i) {
1117                 int idx = ind_tbl->queues[i];
1118                 struct mlx5_rxq_ctrl *rxq_ctrl =
1119                         container_of((*priv->rxqs)[idx],
1120                                      struct mlx5_rxq_ctrl, rxq);
1121
1122                 if (priv->config.dv_flow_en &&
1123                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1124                     mlx5_flow_ext_mreg_supported(dev)) {
1125                         rxq_ctrl->rxq.mark = 1;
1126                         rxq_ctrl->flow_mark_n = 1;
1127                 } else if (mark) {
1128                         rxq_ctrl->flow_mark_n--;
1129                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1130                 }
1131                 if (tunnel) {
1132                         unsigned int j;
1133
1134                         /* Decrease the counter matching the flow. */
1135                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1136                                 if ((tunnels_info[j].tunnel &
1137                                      dev_handle->layers) ==
1138                                     tunnels_info[j].tunnel) {
1139                                         rxq_ctrl->flow_tunnels_n[j]--;
1140                                         break;
1141                                 }
1142                         }
1143                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1144                 }
1145         }
1146 }
1147
1148 /**
1149  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1150  * @p flow if no other flow uses it with the same kind of request.
1151  *
1152  * @param dev
1153  *   Pointer to Ethernet device.
1154  * @param[in] flow
1155  *   Pointer to the flow.
1156  */
1157 static void
1158 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1159 {
1160         struct mlx5_priv *priv = dev->data->dev_private;
1161         uint32_t handle_idx;
1162         struct mlx5_flow_handle *dev_handle;
1163
1164         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1165                        handle_idx, dev_handle, next)
1166                 flow_drv_rxq_flags_trim(dev, dev_handle);
1167 }
1168
1169 /**
1170  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1171  *
1172  * @param dev
1173  *   Pointer to Ethernet device.
1174  */
1175 static void
1176 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1177 {
1178         struct mlx5_priv *priv = dev->data->dev_private;
1179         unsigned int i;
1180
1181         for (i = 0; i != priv->rxqs_n; ++i) {
1182                 struct mlx5_rxq_ctrl *rxq_ctrl;
1183                 unsigned int j;
1184
1185                 if (!(*priv->rxqs)[i])
1186                         continue;
1187                 rxq_ctrl = container_of((*priv->rxqs)[i],
1188                                         struct mlx5_rxq_ctrl, rxq);
1189                 rxq_ctrl->flow_mark_n = 0;
1190                 rxq_ctrl->rxq.mark = 0;
1191                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1192                         rxq_ctrl->flow_tunnels_n[j] = 0;
1193                 rxq_ctrl->rxq.tunnel = 0;
1194         }
1195 }
1196
1197 /**
1198  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1199  *
1200  * @param[in] dev
1201  *   Pointer to the Ethernet device structure.
1202  */
1203 void
1204 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1205 {
1206         struct mlx5_priv *priv = dev->data->dev_private;
1207         struct mlx5_rxq_data *data;
1208         unsigned int i;
1209
1210         for (i = 0; i != priv->rxqs_n; ++i) {
1211                 if (!(*priv->rxqs)[i])
1212                         continue;
1213                 data = (*priv->rxqs)[i];
1214                 if (!rte_flow_dynf_metadata_avail()) {
1215                         data->dynf_meta = 0;
1216                         data->flow_meta_mask = 0;
1217                         data->flow_meta_offset = -1;
1218                 } else {
1219                         data->dynf_meta = 1;
1220                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1221                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1222                 }
1223         }
1224 }
1225
1226 /*
1227  * return a pointer to the desired action in the list of actions.
1228  *
1229  * @param[in] actions
1230  *   The list of actions to search the action in.
1231  * @param[in] action
1232  *   The action to find.
1233  *
1234  * @return
1235  *   Pointer to the action in the list, if found. NULL otherwise.
1236  */
1237 const struct rte_flow_action *
1238 mlx5_flow_find_action(const struct rte_flow_action *actions,
1239                       enum rte_flow_action_type action)
1240 {
1241         if (actions == NULL)
1242                 return NULL;
1243         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1244                 if (actions->type == action)
1245                         return actions;
1246         return NULL;
1247 }
1248
1249 /*
1250  * Validate the flag action.
1251  *
1252  * @param[in] action_flags
1253  *   Bit-fields that holds the actions detected until now.
1254  * @param[in] attr
1255  *   Attributes of flow that includes this action.
1256  * @param[out] error
1257  *   Pointer to error structure.
1258  *
1259  * @return
1260  *   0 on success, a negative errno value otherwise and rte_errno is set.
1261  */
1262 int
1263 mlx5_flow_validate_action_flag(uint64_t action_flags,
1264                                const struct rte_flow_attr *attr,
1265                                struct rte_flow_error *error)
1266 {
1267         if (action_flags & MLX5_FLOW_ACTION_MARK)
1268                 return rte_flow_error_set(error, EINVAL,
1269                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1270                                           "can't mark and flag in same flow");
1271         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1272                 return rte_flow_error_set(error, EINVAL,
1273                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1274                                           "can't have 2 flag"
1275                                           " actions in same flow");
1276         if (attr->egress)
1277                 return rte_flow_error_set(error, ENOTSUP,
1278                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1279                                           "flag action not supported for "
1280                                           "egress");
1281         return 0;
1282 }
1283
1284 /*
1285  * Validate the mark action.
1286  *
1287  * @param[in] action
1288  *   Pointer to the queue action.
1289  * @param[in] action_flags
1290  *   Bit-fields that holds the actions detected until now.
1291  * @param[in] attr
1292  *   Attributes of flow that includes this action.
1293  * @param[out] error
1294  *   Pointer to error structure.
1295  *
1296  * @return
1297  *   0 on success, a negative errno value otherwise and rte_errno is set.
1298  */
1299 int
1300 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1301                                uint64_t action_flags,
1302                                const struct rte_flow_attr *attr,
1303                                struct rte_flow_error *error)
1304 {
1305         const struct rte_flow_action_mark *mark = action->conf;
1306
1307         if (!mark)
1308                 return rte_flow_error_set(error, EINVAL,
1309                                           RTE_FLOW_ERROR_TYPE_ACTION,
1310                                           action,
1311                                           "configuration cannot be null");
1312         if (mark->id >= MLX5_FLOW_MARK_MAX)
1313                 return rte_flow_error_set(error, EINVAL,
1314                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1315                                           &mark->id,
1316                                           "mark id must in 0 <= id < "
1317                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1318         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1319                 return rte_flow_error_set(error, EINVAL,
1320                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1321                                           "can't flag and mark in same flow");
1322         if (action_flags & MLX5_FLOW_ACTION_MARK)
1323                 return rte_flow_error_set(error, EINVAL,
1324                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1325                                           "can't have 2 mark actions in same"
1326                                           " flow");
1327         if (attr->egress)
1328                 return rte_flow_error_set(error, ENOTSUP,
1329                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1330                                           "mark action not supported for "
1331                                           "egress");
1332         return 0;
1333 }
1334
1335 /*
1336  * Validate the drop action.
1337  *
1338  * @param[in] action_flags
1339  *   Bit-fields that holds the actions detected until now.
1340  * @param[in] attr
1341  *   Attributes of flow that includes this action.
1342  * @param[out] error
1343  *   Pointer to error structure.
1344  *
1345  * @return
1346  *   0 on success, a negative errno value otherwise and rte_errno is set.
1347  */
1348 int
1349 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1350                                const struct rte_flow_attr *attr,
1351                                struct rte_flow_error *error)
1352 {
1353         if (attr->egress)
1354                 return rte_flow_error_set(error, ENOTSUP,
1355                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1356                                           "drop action not supported for "
1357                                           "egress");
1358         return 0;
1359 }
1360
1361 /*
1362  * Validate the queue action.
1363  *
1364  * @param[in] action
1365  *   Pointer to the queue action.
1366  * @param[in] action_flags
1367  *   Bit-fields that holds the actions detected until now.
1368  * @param[in] dev
1369  *   Pointer to the Ethernet device structure.
1370  * @param[in] attr
1371  *   Attributes of flow that includes this action.
1372  * @param[out] error
1373  *   Pointer to error structure.
1374  *
1375  * @return
1376  *   0 on success, a negative errno value otherwise and rte_errno is set.
1377  */
1378 int
1379 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1380                                 uint64_t action_flags,
1381                                 struct rte_eth_dev *dev,
1382                                 const struct rte_flow_attr *attr,
1383                                 struct rte_flow_error *error)
1384 {
1385         struct mlx5_priv *priv = dev->data->dev_private;
1386         const struct rte_flow_action_queue *queue = action->conf;
1387
1388         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1389                 return rte_flow_error_set(error, EINVAL,
1390                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1391                                           "can't have 2 fate actions in"
1392                                           " same flow");
1393         if (!priv->rxqs_n)
1394                 return rte_flow_error_set(error, EINVAL,
1395                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1396                                           NULL, "No Rx queues configured");
1397         if (queue->index >= priv->rxqs_n)
1398                 return rte_flow_error_set(error, EINVAL,
1399                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1400                                           &queue->index,
1401                                           "queue index out of range");
1402         if (!(*priv->rxqs)[queue->index])
1403                 return rte_flow_error_set(error, EINVAL,
1404                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1405                                           &queue->index,
1406                                           "queue is not configured");
1407         if (attr->egress)
1408                 return rte_flow_error_set(error, ENOTSUP,
1409                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1410                                           "queue action not supported for "
1411                                           "egress");
1412         return 0;
1413 }
1414
1415 /*
1416  * Validate the rss action.
1417  *
1418  * @param[in] dev
1419  *   Pointer to the Ethernet device structure.
1420  * @param[in] action
1421  *   Pointer to the queue action.
1422  * @param[out] error
1423  *   Pointer to error structure.
1424  *
1425  * @return
1426  *   0 on success, a negative errno value otherwise and rte_errno is set.
1427  */
1428 int
1429 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1430                          const struct rte_flow_action *action,
1431                          struct rte_flow_error *error)
1432 {
1433         struct mlx5_priv *priv = dev->data->dev_private;
1434         const struct rte_flow_action_rss *rss = action->conf;
1435         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1436         unsigned int i;
1437
1438         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1439             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1440                 return rte_flow_error_set(error, ENOTSUP,
1441                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1442                                           &rss->func,
1443                                           "RSS hash function not supported");
1444 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1445         if (rss->level > 2)
1446 #else
1447         if (rss->level > 1)
1448 #endif
1449                 return rte_flow_error_set(error, ENOTSUP,
1450                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1451                                           &rss->level,
1452                                           "tunnel RSS is not supported");
1453         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1454         if (rss->key_len == 0 && rss->key != NULL)
1455                 return rte_flow_error_set(error, ENOTSUP,
1456                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1457                                           &rss->key_len,
1458                                           "RSS hash key length 0");
1459         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1460                 return rte_flow_error_set(error, ENOTSUP,
1461                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1462                                           &rss->key_len,
1463                                           "RSS hash key too small");
1464         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1465                 return rte_flow_error_set(error, ENOTSUP,
1466                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1467                                           &rss->key_len,
1468                                           "RSS hash key too large");
1469         if (rss->queue_num > priv->config.ind_table_max_size)
1470                 return rte_flow_error_set(error, ENOTSUP,
1471                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1472                                           &rss->queue_num,
1473                                           "number of queues too large");
1474         if (rss->types & MLX5_RSS_HF_MASK)
1475                 return rte_flow_error_set(error, ENOTSUP,
1476                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1477                                           &rss->types,
1478                                           "some RSS protocols are not"
1479                                           " supported");
1480         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1481             !(rss->types & ETH_RSS_IP))
1482                 return rte_flow_error_set(error, EINVAL,
1483                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1484                                           "L3 partial RSS requested but L3 RSS"
1485                                           " type not specified");
1486         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1487             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1488                 return rte_flow_error_set(error, EINVAL,
1489                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1490                                           "L4 partial RSS requested but L4 RSS"
1491                                           " type not specified");
1492         if (!priv->rxqs_n)
1493                 return rte_flow_error_set(error, EINVAL,
1494                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1495                                           NULL, "No Rx queues configured");
1496         if (!rss->queue_num)
1497                 return rte_flow_error_set(error, EINVAL,
1498                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1499                                           NULL, "No queues configured");
1500         for (i = 0; i != rss->queue_num; ++i) {
1501                 struct mlx5_rxq_ctrl *rxq_ctrl;
1502
1503                 if (rss->queue[i] >= priv->rxqs_n)
1504                         return rte_flow_error_set
1505                                 (error, EINVAL,
1506                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1507                                  &rss->queue[i], "queue index out of range");
1508                 if (!(*priv->rxqs)[rss->queue[i]])
1509                         return rte_flow_error_set
1510                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1511                                  &rss->queue[i], "queue is not configured");
1512                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1513                                         struct mlx5_rxq_ctrl, rxq);
1514                 if (i == 0)
1515                         rxq_type = rxq_ctrl->type;
1516                 if (rxq_type != rxq_ctrl->type)
1517                         return rte_flow_error_set
1518                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1519                                  &rss->queue[i],
1520                                  "combining hairpin and regular RSS queues is not supported");
1521         }
1522         return 0;
1523 }
1524
1525 /*
1526  * Validate the rss action.
1527  *
1528  * @param[in] action
1529  *   Pointer to the queue action.
1530  * @param[in] action_flags
1531  *   Bit-fields that holds the actions detected until now.
1532  * @param[in] dev
1533  *   Pointer to the Ethernet device structure.
1534  * @param[in] attr
1535  *   Attributes of flow that includes this action.
1536  * @param[in] item_flags
1537  *   Items that were detected.
1538  * @param[out] error
1539  *   Pointer to error structure.
1540  *
1541  * @return
1542  *   0 on success, a negative errno value otherwise and rte_errno is set.
1543  */
1544 int
1545 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1546                               uint64_t action_flags,
1547                               struct rte_eth_dev *dev,
1548                               const struct rte_flow_attr *attr,
1549                               uint64_t item_flags,
1550                               struct rte_flow_error *error)
1551 {
1552         const struct rte_flow_action_rss *rss = action->conf;
1553         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1554         int ret;
1555
1556         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1557                 return rte_flow_error_set(error, EINVAL,
1558                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1559                                           "can't have 2 fate actions"
1560                                           " in same flow");
1561         ret = mlx5_validate_action_rss(dev, action, error);
1562         if (ret)
1563                 return ret;
1564         if (attr->egress)
1565                 return rte_flow_error_set(error, ENOTSUP,
1566                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1567                                           "rss action not supported for "
1568                                           "egress");
1569         if (rss->level > 1 && !tunnel)
1570                 return rte_flow_error_set(error, EINVAL,
1571                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1572                                           "inner RSS is not supported for "
1573                                           "non-tunnel flows");
1574         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1575             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1576                 return rte_flow_error_set(error, EINVAL,
1577                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1578                                           "RSS on eCPRI is not supported now");
1579         }
1580         return 0;
1581 }
1582
1583 /*
1584  * Validate the default miss action.
1585  *
1586  * @param[in] action_flags
1587  *   Bit-fields that holds the actions detected until now.
1588  * @param[out] error
1589  *   Pointer to error structure.
1590  *
1591  * @return
1592  *   0 on success, a negative errno value otherwise and rte_errno is set.
1593  */
1594 int
1595 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1596                                 const struct rte_flow_attr *attr,
1597                                 struct rte_flow_error *error)
1598 {
1599         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1600                 return rte_flow_error_set(error, EINVAL,
1601                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1602                                           "can't have 2 fate actions in"
1603                                           " same flow");
1604         if (attr->egress)
1605                 return rte_flow_error_set(error, ENOTSUP,
1606                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1607                                           "default miss action not supported "
1608                                           "for egress");
1609         if (attr->group)
1610                 return rte_flow_error_set(error, ENOTSUP,
1611                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1612                                           "only group 0 is supported");
1613         if (attr->transfer)
1614                 return rte_flow_error_set(error, ENOTSUP,
1615                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1616                                           NULL, "transfer is not supported");
1617         return 0;
1618 }
1619
1620 /*
1621  * Validate the count action.
1622  *
1623  * @param[in] dev
1624  *   Pointer to the Ethernet device structure.
1625  * @param[in] attr
1626  *   Attributes of flow that includes this action.
1627  * @param[out] error
1628  *   Pointer to error structure.
1629  *
1630  * @return
1631  *   0 on success, a negative errno value otherwise and rte_errno is set.
1632  */
1633 int
1634 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1635                                 const struct rte_flow_attr *attr,
1636                                 struct rte_flow_error *error)
1637 {
1638         if (attr->egress)
1639                 return rte_flow_error_set(error, ENOTSUP,
1640                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1641                                           "count action not supported for "
1642                                           "egress");
1643         return 0;
1644 }
1645
1646 /**
1647  * Verify the @p attributes will be correctly understood by the NIC and store
1648  * them in the @p flow if everything is correct.
1649  *
1650  * @param[in] dev
1651  *   Pointer to the Ethernet device structure.
1652  * @param[in] attributes
1653  *   Pointer to flow attributes
1654  * @param[out] error
1655  *   Pointer to error structure.
1656  *
1657  * @return
1658  *   0 on success, a negative errno value otherwise and rte_errno is set.
1659  */
1660 int
1661 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1662                               const struct rte_flow_attr *attributes,
1663                               struct rte_flow_error *error)
1664 {
1665         struct mlx5_priv *priv = dev->data->dev_private;
1666         uint32_t priority_max = priv->config.flow_prio - 1;
1667
1668         if (attributes->group)
1669                 return rte_flow_error_set(error, ENOTSUP,
1670                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1671                                           NULL, "groups is not supported");
1672         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1673             attributes->priority >= priority_max)
1674                 return rte_flow_error_set(error, ENOTSUP,
1675                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1676                                           NULL, "priority out of range");
1677         if (attributes->egress)
1678                 return rte_flow_error_set(error, ENOTSUP,
1679                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1680                                           "egress is not supported");
1681         if (attributes->transfer && !priv->config.dv_esw_en)
1682                 return rte_flow_error_set(error, ENOTSUP,
1683                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1684                                           NULL, "transfer is not supported");
1685         if (!attributes->ingress)
1686                 return rte_flow_error_set(error, EINVAL,
1687                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1688                                           NULL,
1689                                           "ingress attribute is mandatory");
1690         return 0;
1691 }
1692
1693 /**
1694  * Validate ICMP6 item.
1695  *
1696  * @param[in] item
1697  *   Item specification.
1698  * @param[in] item_flags
1699  *   Bit-fields that holds the items detected until now.
1700  * @param[in] ext_vlan_sup
1701  *   Whether extended VLAN features are supported or not.
1702  * @param[out] error
1703  *   Pointer to error structure.
1704  *
1705  * @return
1706  *   0 on success, a negative errno value otherwise and rte_errno is set.
1707  */
1708 int
1709 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1710                                uint64_t item_flags,
1711                                uint8_t target_protocol,
1712                                struct rte_flow_error *error)
1713 {
1714         const struct rte_flow_item_icmp6 *mask = item->mask;
1715         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1716         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1717                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1718         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1719                                       MLX5_FLOW_LAYER_OUTER_L4;
1720         int ret;
1721
1722         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1723                 return rte_flow_error_set(error, EINVAL,
1724                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1725                                           "protocol filtering not compatible"
1726                                           " with ICMP6 layer");
1727         if (!(item_flags & l3m))
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1730                                           "IPv6 is mandatory to filter on"
1731                                           " ICMP6");
1732         if (item_flags & l4m)
1733                 return rte_flow_error_set(error, EINVAL,
1734                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1735                                           "multiple L4 layers not supported");
1736         if (!mask)
1737                 mask = &rte_flow_item_icmp6_mask;
1738         ret = mlx5_flow_item_acceptable
1739                 (item, (const uint8_t *)mask,
1740                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1741                  sizeof(struct rte_flow_item_icmp6),
1742                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1743         if (ret < 0)
1744                 return ret;
1745         return 0;
1746 }
1747
1748 /**
1749  * Validate ICMP item.
1750  *
1751  * @param[in] item
1752  *   Item specification.
1753  * @param[in] item_flags
1754  *   Bit-fields that holds the items detected until now.
1755  * @param[out] error
1756  *   Pointer to error structure.
1757  *
1758  * @return
1759  *   0 on success, a negative errno value otherwise and rte_errno is set.
1760  */
1761 int
1762 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1763                              uint64_t item_flags,
1764                              uint8_t target_protocol,
1765                              struct rte_flow_error *error)
1766 {
1767         const struct rte_flow_item_icmp *mask = item->mask;
1768         const struct rte_flow_item_icmp nic_mask = {
1769                 .hdr.icmp_type = 0xff,
1770                 .hdr.icmp_code = 0xff,
1771                 .hdr.icmp_ident = RTE_BE16(0xffff),
1772                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1773         };
1774         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1775         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1776                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1777         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1778                                       MLX5_FLOW_LAYER_OUTER_L4;
1779         int ret;
1780
1781         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1782                 return rte_flow_error_set(error, EINVAL,
1783                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1784                                           "protocol filtering not compatible"
1785                                           " with ICMP layer");
1786         if (!(item_flags & l3m))
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1789                                           "IPv4 is mandatory to filter"
1790                                           " on ICMP");
1791         if (item_flags & l4m)
1792                 return rte_flow_error_set(error, EINVAL,
1793                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1794                                           "multiple L4 layers not supported");
1795         if (!mask)
1796                 mask = &nic_mask;
1797         ret = mlx5_flow_item_acceptable
1798                 (item, (const uint8_t *)mask,
1799                  (const uint8_t *)&nic_mask,
1800                  sizeof(struct rte_flow_item_icmp),
1801                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1802         if (ret < 0)
1803                 return ret;
1804         return 0;
1805 }
1806
1807 /**
1808  * Validate Ethernet item.
1809  *
1810  * @param[in] item
1811  *   Item specification.
1812  * @param[in] item_flags
1813  *   Bit-fields that holds the items detected until now.
1814  * @param[out] error
1815  *   Pointer to error structure.
1816  *
1817  * @return
1818  *   0 on success, a negative errno value otherwise and rte_errno is set.
1819  */
1820 int
1821 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1822                             uint64_t item_flags, bool ext_vlan_sup,
1823                             struct rte_flow_error *error)
1824 {
1825         const struct rte_flow_item_eth *mask = item->mask;
1826         const struct rte_flow_item_eth nic_mask = {
1827                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1828                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1829                 .type = RTE_BE16(0xffff),
1830                 .has_vlan = ext_vlan_sup ? 1 : 0,
1831         };
1832         int ret;
1833         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1834         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1835                                        MLX5_FLOW_LAYER_OUTER_L2;
1836
1837         if (item_flags & ethm)
1838                 return rte_flow_error_set(error, ENOTSUP,
1839                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1840                                           "multiple L2 layers not supported");
1841         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1842             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1843                 return rte_flow_error_set(error, EINVAL,
1844                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1845                                           "L2 layer should not follow "
1846                                           "L3 layers");
1847         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1848             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1849                 return rte_flow_error_set(error, EINVAL,
1850                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1851                                           "L2 layer should not follow VLAN");
1852         if (!mask)
1853                 mask = &rte_flow_item_eth_mask;
1854         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1855                                         (const uint8_t *)&nic_mask,
1856                                         sizeof(struct rte_flow_item_eth),
1857                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1858         return ret;
1859 }
1860
1861 /**
1862  * Validate VLAN item.
1863  *
1864  * @param[in] item
1865  *   Item specification.
1866  * @param[in] item_flags
1867  *   Bit-fields that holds the items detected until now.
1868  * @param[in] dev
1869  *   Ethernet device flow is being created on.
1870  * @param[out] error
1871  *   Pointer to error structure.
1872  *
1873  * @return
1874  *   0 on success, a negative errno value otherwise and rte_errno is set.
1875  */
1876 int
1877 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1878                              uint64_t item_flags,
1879                              struct rte_eth_dev *dev,
1880                              struct rte_flow_error *error)
1881 {
1882         const struct rte_flow_item_vlan *spec = item->spec;
1883         const struct rte_flow_item_vlan *mask = item->mask;
1884         const struct rte_flow_item_vlan nic_mask = {
1885                 .tci = RTE_BE16(UINT16_MAX),
1886                 .inner_type = RTE_BE16(UINT16_MAX),
1887         };
1888         uint16_t vlan_tag = 0;
1889         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1890         int ret;
1891         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1892                                         MLX5_FLOW_LAYER_INNER_L4) :
1893                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1894                                         MLX5_FLOW_LAYER_OUTER_L4);
1895         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1896                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1897
1898         if (item_flags & vlanm)
1899                 return rte_flow_error_set(error, EINVAL,
1900                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1901                                           "multiple VLAN layers not supported");
1902         else if ((item_flags & l34m) != 0)
1903                 return rte_flow_error_set(error, EINVAL,
1904                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1905                                           "VLAN cannot follow L3/L4 layer");
1906         if (!mask)
1907                 mask = &rte_flow_item_vlan_mask;
1908         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1909                                         (const uint8_t *)&nic_mask,
1910                                         sizeof(struct rte_flow_item_vlan),
1911                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1912         if (ret)
1913                 return ret;
1914         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1915                 struct mlx5_priv *priv = dev->data->dev_private;
1916
1917                 if (priv->vmwa_context) {
1918                         /*
1919                          * Non-NULL context means we have a virtual machine
1920                          * and SR-IOV enabled, we have to create VLAN interface
1921                          * to make hypervisor to setup E-Switch vport
1922                          * context correctly. We avoid creating the multiple
1923                          * VLAN interfaces, so we cannot support VLAN tag mask.
1924                          */
1925                         return rte_flow_error_set(error, EINVAL,
1926                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1927                                                   item,
1928                                                   "VLAN tag mask is not"
1929                                                   " supported in virtual"
1930                                                   " environment");
1931                 }
1932         }
1933         if (spec) {
1934                 vlan_tag = spec->tci;
1935                 vlan_tag &= mask->tci;
1936         }
1937         /*
1938          * From verbs perspective an empty VLAN is equivalent
1939          * to a packet without VLAN layer.
1940          */
1941         if (!vlan_tag)
1942                 return rte_flow_error_set(error, EINVAL,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1944                                           item->spec,
1945                                           "VLAN cannot be empty");
1946         return 0;
1947 }
1948
1949 /**
1950  * Validate IPV4 item.
1951  *
1952  * @param[in] item
1953  *   Item specification.
1954  * @param[in] item_flags
1955  *   Bit-fields that holds the items detected until now.
1956  * @param[in] last_item
1957  *   Previous validated item in the pattern items.
1958  * @param[in] ether_type
1959  *   Type in the ethernet layer header (including dot1q).
1960  * @param[in] acc_mask
1961  *   Acceptable mask, if NULL default internal default mask
1962  *   will be used to check whether item fields are supported.
1963  * @param[in] range_accepted
1964  *   True if range of values is accepted for specific fields, false otherwise.
1965  * @param[out] error
1966  *   Pointer to error structure.
1967  *
1968  * @return
1969  *   0 on success, a negative errno value otherwise and rte_errno is set.
1970  */
1971 int
1972 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1973                              uint64_t item_flags,
1974                              uint64_t last_item,
1975                              uint16_t ether_type,
1976                              const struct rte_flow_item_ipv4 *acc_mask,
1977                              bool range_accepted,
1978                              struct rte_flow_error *error)
1979 {
1980         const struct rte_flow_item_ipv4 *mask = item->mask;
1981         const struct rte_flow_item_ipv4 *spec = item->spec;
1982         const struct rte_flow_item_ipv4 nic_mask = {
1983                 .hdr = {
1984                         .src_addr = RTE_BE32(0xffffffff),
1985                         .dst_addr = RTE_BE32(0xffffffff),
1986                         .type_of_service = 0xff,
1987                         .next_proto_id = 0xff,
1988                 },
1989         };
1990         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1991         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1992                                       MLX5_FLOW_LAYER_OUTER_L3;
1993         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1994                                       MLX5_FLOW_LAYER_OUTER_L4;
1995         int ret;
1996         uint8_t next_proto = 0xFF;
1997         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1998                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1999                                   MLX5_FLOW_LAYER_INNER_VLAN);
2000
2001         if ((last_item & l2_vlan) && ether_type &&
2002             ether_type != RTE_ETHER_TYPE_IPV4)
2003                 return rte_flow_error_set(error, EINVAL,
2004                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2005                                           "IPv4 cannot follow L2/VLAN layer "
2006                                           "which ether type is not IPv4");
2007         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2008                 if (mask && spec)
2009                         next_proto = mask->hdr.next_proto_id &
2010                                      spec->hdr.next_proto_id;
2011                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2012                         return rte_flow_error_set(error, EINVAL,
2013                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2014                                                   item,
2015                                                   "multiple tunnel "
2016                                                   "not supported");
2017         }
2018         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2019                 return rte_flow_error_set(error, EINVAL,
2020                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2021                                           "wrong tunnel type - IPv6 specified "
2022                                           "but IPv4 item provided");
2023         if (item_flags & l3m)
2024                 return rte_flow_error_set(error, ENOTSUP,
2025                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2026                                           "multiple L3 layers not supported");
2027         else if (item_flags & l4m)
2028                 return rte_flow_error_set(error, EINVAL,
2029                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2030                                           "L3 cannot follow an L4 layer.");
2031         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2032                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2033                 return rte_flow_error_set(error, EINVAL,
2034                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2035                                           "L3 cannot follow an NVGRE layer.");
2036         if (!mask)
2037                 mask = &rte_flow_item_ipv4_mask;
2038         else if (mask->hdr.next_proto_id != 0 &&
2039                  mask->hdr.next_proto_id != 0xff)
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2042                                           "partial mask is not supported"
2043                                           " for protocol");
2044         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2045                                         acc_mask ? (const uint8_t *)acc_mask
2046                                                  : (const uint8_t *)&nic_mask,
2047                                         sizeof(struct rte_flow_item_ipv4),
2048                                         range_accepted, error);
2049         if (ret < 0)
2050                 return ret;
2051         return 0;
2052 }
2053
2054 /**
2055  * Validate IPV6 item.
2056  *
2057  * @param[in] item
2058  *   Item specification.
2059  * @param[in] item_flags
2060  *   Bit-fields that holds the items detected until now.
2061  * @param[in] last_item
2062  *   Previous validated item in the pattern items.
2063  * @param[in] ether_type
2064  *   Type in the ethernet layer header (including dot1q).
2065  * @param[in] acc_mask
2066  *   Acceptable mask, if NULL default internal default mask
2067  *   will be used to check whether item fields are supported.
2068  * @param[out] error
2069  *   Pointer to error structure.
2070  *
2071  * @return
2072  *   0 on success, a negative errno value otherwise and rte_errno is set.
2073  */
2074 int
2075 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2076                              uint64_t item_flags,
2077                              uint64_t last_item,
2078                              uint16_t ether_type,
2079                              const struct rte_flow_item_ipv6 *acc_mask,
2080                              struct rte_flow_error *error)
2081 {
2082         const struct rte_flow_item_ipv6 *mask = item->mask;
2083         const struct rte_flow_item_ipv6 *spec = item->spec;
2084         const struct rte_flow_item_ipv6 nic_mask = {
2085                 .hdr = {
2086                         .src_addr =
2087                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2088                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2089                         .dst_addr =
2090                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2091                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2092                         .vtc_flow = RTE_BE32(0xffffffff),
2093                         .proto = 0xff,
2094                 },
2095         };
2096         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2097         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2098                                       MLX5_FLOW_LAYER_OUTER_L3;
2099         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2100                                       MLX5_FLOW_LAYER_OUTER_L4;
2101         int ret;
2102         uint8_t next_proto = 0xFF;
2103         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2104                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2105                                   MLX5_FLOW_LAYER_INNER_VLAN);
2106
2107         if ((last_item & l2_vlan) && ether_type &&
2108             ether_type != RTE_ETHER_TYPE_IPV6)
2109                 return rte_flow_error_set(error, EINVAL,
2110                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2111                                           "IPv6 cannot follow L2/VLAN layer "
2112                                           "which ether type is not IPv6");
2113         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2114                 next_proto = spec->hdr.proto;
2115         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2116                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2117                         return rte_flow_error_set(error, EINVAL,
2118                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2119                                                   item,
2120                                                   "multiple tunnel "
2121                                                   "not supported");
2122         }
2123         if (next_proto == IPPROTO_HOPOPTS  ||
2124             next_proto == IPPROTO_ROUTING  ||
2125             next_proto == IPPROTO_FRAGMENT ||
2126             next_proto == IPPROTO_ESP      ||
2127             next_proto == IPPROTO_AH       ||
2128             next_proto == IPPROTO_DSTOPTS)
2129                 return rte_flow_error_set(error, EINVAL,
2130                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2131                                           "IPv6 proto (next header) should "
2132                                           "not be set as extension header");
2133         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2134                 return rte_flow_error_set(error, EINVAL,
2135                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2136                                           "wrong tunnel type - IPv4 specified "
2137                                           "but IPv6 item provided");
2138         if (item_flags & l3m)
2139                 return rte_flow_error_set(error, ENOTSUP,
2140                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2141                                           "multiple L3 layers not supported");
2142         else if (item_flags & l4m)
2143                 return rte_flow_error_set(error, EINVAL,
2144                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2145                                           "L3 cannot follow an L4 layer.");
2146         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2147                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2148                 return rte_flow_error_set(error, EINVAL,
2149                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2150                                           "L3 cannot follow an NVGRE layer.");
2151         if (!mask)
2152                 mask = &rte_flow_item_ipv6_mask;
2153         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2154                                         acc_mask ? (const uint8_t *)acc_mask
2155                                                  : (const uint8_t *)&nic_mask,
2156                                         sizeof(struct rte_flow_item_ipv6),
2157                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2158         if (ret < 0)
2159                 return ret;
2160         return 0;
2161 }
2162
2163 /**
2164  * Validate UDP item.
2165  *
2166  * @param[in] item
2167  *   Item specification.
2168  * @param[in] item_flags
2169  *   Bit-fields that holds the items detected until now.
2170  * @param[in] target_protocol
2171  *   The next protocol in the previous item.
2172  * @param[in] flow_mask
2173  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2174  * @param[out] error
2175  *   Pointer to error structure.
2176  *
2177  * @return
2178  *   0 on success, a negative errno value otherwise and rte_errno is set.
2179  */
2180 int
2181 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2182                             uint64_t item_flags,
2183                             uint8_t target_protocol,
2184                             struct rte_flow_error *error)
2185 {
2186         const struct rte_flow_item_udp *mask = item->mask;
2187         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2188         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2189                                       MLX5_FLOW_LAYER_OUTER_L3;
2190         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2191                                       MLX5_FLOW_LAYER_OUTER_L4;
2192         int ret;
2193
2194         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2195                 return rte_flow_error_set(error, EINVAL,
2196                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2197                                           "protocol filtering not compatible"
2198                                           " with UDP layer");
2199         if (!(item_flags & l3m))
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2202                                           "L3 is mandatory to filter on L4");
2203         if (item_flags & l4m)
2204                 return rte_flow_error_set(error, EINVAL,
2205                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2206                                           "multiple L4 layers not supported");
2207         if (!mask)
2208                 mask = &rte_flow_item_udp_mask;
2209         ret = mlx5_flow_item_acceptable
2210                 (item, (const uint8_t *)mask,
2211                  (const uint8_t *)&rte_flow_item_udp_mask,
2212                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2213                  error);
2214         if (ret < 0)
2215                 return ret;
2216         return 0;
2217 }
2218
2219 /**
2220  * Validate TCP item.
2221  *
2222  * @param[in] item
2223  *   Item specification.
2224  * @param[in] item_flags
2225  *   Bit-fields that holds the items detected until now.
2226  * @param[in] target_protocol
2227  *   The next protocol in the previous item.
2228  * @param[out] error
2229  *   Pointer to error structure.
2230  *
2231  * @return
2232  *   0 on success, a negative errno value otherwise and rte_errno is set.
2233  */
2234 int
2235 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2236                             uint64_t item_flags,
2237                             uint8_t target_protocol,
2238                             const struct rte_flow_item_tcp *flow_mask,
2239                             struct rte_flow_error *error)
2240 {
2241         const struct rte_flow_item_tcp *mask = item->mask;
2242         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2243         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2244                                       MLX5_FLOW_LAYER_OUTER_L3;
2245         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2246                                       MLX5_FLOW_LAYER_OUTER_L4;
2247         int ret;
2248
2249         MLX5_ASSERT(flow_mask);
2250         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2251                 return rte_flow_error_set(error, EINVAL,
2252                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2253                                           "protocol filtering not compatible"
2254                                           " with TCP layer");
2255         if (!(item_flags & l3m))
2256                 return rte_flow_error_set(error, EINVAL,
2257                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2258                                           "L3 is mandatory to filter on L4");
2259         if (item_flags & l4m)
2260                 return rte_flow_error_set(error, EINVAL,
2261                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2262                                           "multiple L4 layers not supported");
2263         if (!mask)
2264                 mask = &rte_flow_item_tcp_mask;
2265         ret = mlx5_flow_item_acceptable
2266                 (item, (const uint8_t *)mask,
2267                  (const uint8_t *)flow_mask,
2268                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2269                  error);
2270         if (ret < 0)
2271                 return ret;
2272         return 0;
2273 }
2274
2275 /**
2276  * Validate VXLAN item.
2277  *
2278  * @param[in] item
2279  *   Item specification.
2280  * @param[in] item_flags
2281  *   Bit-fields that holds the items detected until now.
2282  * @param[in] target_protocol
2283  *   The next protocol in the previous item.
2284  * @param[out] error
2285  *   Pointer to error structure.
2286  *
2287  * @return
2288  *   0 on success, a negative errno value otherwise and rte_errno is set.
2289  */
2290 int
2291 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2292                               uint64_t item_flags,
2293                               struct rte_flow_error *error)
2294 {
2295         const struct rte_flow_item_vxlan *spec = item->spec;
2296         const struct rte_flow_item_vxlan *mask = item->mask;
2297         int ret;
2298         union vni {
2299                 uint32_t vlan_id;
2300                 uint8_t vni[4];
2301         } id = { .vlan_id = 0, };
2302
2303
2304         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2305                 return rte_flow_error_set(error, ENOTSUP,
2306                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2307                                           "multiple tunnel layers not"
2308                                           " supported");
2309         /*
2310          * Verify only UDPv4 is present as defined in
2311          * https://tools.ietf.org/html/rfc7348
2312          */
2313         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2314                 return rte_flow_error_set(error, EINVAL,
2315                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2316                                           "no outer UDP layer found");
2317         if (!mask)
2318                 mask = &rte_flow_item_vxlan_mask;
2319         ret = mlx5_flow_item_acceptable
2320                 (item, (const uint8_t *)mask,
2321                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2322                  sizeof(struct rte_flow_item_vxlan),
2323                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2324         if (ret < 0)
2325                 return ret;
2326         if (spec) {
2327                 memcpy(&id.vni[1], spec->vni, 3);
2328                 memcpy(&id.vni[1], mask->vni, 3);
2329         }
2330         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2331                 return rte_flow_error_set(error, ENOTSUP,
2332                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2333                                           "VXLAN tunnel must be fully defined");
2334         return 0;
2335 }
2336
2337 /**
2338  * Validate VXLAN_GPE item.
2339  *
2340  * @param[in] item
2341  *   Item specification.
2342  * @param[in] item_flags
2343  *   Bit-fields that holds the items detected until now.
2344  * @param[in] priv
2345  *   Pointer to the private data structure.
2346  * @param[in] target_protocol
2347  *   The next protocol in the previous item.
2348  * @param[out] error
2349  *   Pointer to error structure.
2350  *
2351  * @return
2352  *   0 on success, a negative errno value otherwise and rte_errno is set.
2353  */
2354 int
2355 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2356                                   uint64_t item_flags,
2357                                   struct rte_eth_dev *dev,
2358                                   struct rte_flow_error *error)
2359 {
2360         struct mlx5_priv *priv = dev->data->dev_private;
2361         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2362         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2363         int ret;
2364         union vni {
2365                 uint32_t vlan_id;
2366                 uint8_t vni[4];
2367         } id = { .vlan_id = 0, };
2368
2369         if (!priv->config.l3_vxlan_en)
2370                 return rte_flow_error_set(error, ENOTSUP,
2371                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2372                                           "L3 VXLAN is not enabled by device"
2373                                           " parameter and/or not configured in"
2374                                           " firmware");
2375         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2376                 return rte_flow_error_set(error, ENOTSUP,
2377                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2378                                           "multiple tunnel layers not"
2379                                           " supported");
2380         /*
2381          * Verify only UDPv4 is present as defined in
2382          * https://tools.ietf.org/html/rfc7348
2383          */
2384         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2385                 return rte_flow_error_set(error, EINVAL,
2386                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2387                                           "no outer UDP layer found");
2388         if (!mask)
2389                 mask = &rte_flow_item_vxlan_gpe_mask;
2390         ret = mlx5_flow_item_acceptable
2391                 (item, (const uint8_t *)mask,
2392                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2393                  sizeof(struct rte_flow_item_vxlan_gpe),
2394                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2395         if (ret < 0)
2396                 return ret;
2397         if (spec) {
2398                 if (spec->protocol)
2399                         return rte_flow_error_set(error, ENOTSUP,
2400                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2401                                                   item,
2402                                                   "VxLAN-GPE protocol"
2403                                                   " not supported");
2404                 memcpy(&id.vni[1], spec->vni, 3);
2405                 memcpy(&id.vni[1], mask->vni, 3);
2406         }
2407         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2408                 return rte_flow_error_set(error, ENOTSUP,
2409                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2410                                           "VXLAN-GPE tunnel must be fully"
2411                                           " defined");
2412         return 0;
2413 }
2414 /**
2415  * Validate GRE Key item.
2416  *
2417  * @param[in] item
2418  *   Item specification.
2419  * @param[in] item_flags
2420  *   Bit flags to mark detected items.
2421  * @param[in] gre_item
2422  *   Pointer to gre_item
2423  * @param[out] error
2424  *   Pointer to error structure.
2425  *
2426  * @return
2427  *   0 on success, a negative errno value otherwise and rte_errno is set.
2428  */
2429 int
2430 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2431                                 uint64_t item_flags,
2432                                 const struct rte_flow_item *gre_item,
2433                                 struct rte_flow_error *error)
2434 {
2435         const rte_be32_t *mask = item->mask;
2436         int ret = 0;
2437         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2438         const struct rte_flow_item_gre *gre_spec;
2439         const struct rte_flow_item_gre *gre_mask;
2440
2441         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2442                 return rte_flow_error_set(error, ENOTSUP,
2443                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2444                                           "Multiple GRE key not support");
2445         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2446                 return rte_flow_error_set(error, ENOTSUP,
2447                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2448                                           "No preceding GRE header");
2449         if (item_flags & MLX5_FLOW_LAYER_INNER)
2450                 return rte_flow_error_set(error, ENOTSUP,
2451                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2452                                           "GRE key following a wrong item");
2453         gre_mask = gre_item->mask;
2454         if (!gre_mask)
2455                 gre_mask = &rte_flow_item_gre_mask;
2456         gre_spec = gre_item->spec;
2457         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2458                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2459                 return rte_flow_error_set(error, EINVAL,
2460                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2461                                           "Key bit must be on");
2462
2463         if (!mask)
2464                 mask = &gre_key_default_mask;
2465         ret = mlx5_flow_item_acceptable
2466                 (item, (const uint8_t *)mask,
2467                  (const uint8_t *)&gre_key_default_mask,
2468                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2469         return ret;
2470 }
2471
2472 /**
2473  * Validate GRE item.
2474  *
2475  * @param[in] item
2476  *   Item specification.
2477  * @param[in] item_flags
2478  *   Bit flags to mark detected items.
2479  * @param[in] target_protocol
2480  *   The next protocol in the previous item.
2481  * @param[out] error
2482  *   Pointer to error structure.
2483  *
2484  * @return
2485  *   0 on success, a negative errno value otherwise and rte_errno is set.
2486  */
2487 int
2488 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2489                             uint64_t item_flags,
2490                             uint8_t target_protocol,
2491                             struct rte_flow_error *error)
2492 {
2493         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2494         const struct rte_flow_item_gre *mask = item->mask;
2495         int ret;
2496         const struct rte_flow_item_gre nic_mask = {
2497                 .c_rsvd0_ver = RTE_BE16(0xB000),
2498                 .protocol = RTE_BE16(UINT16_MAX),
2499         };
2500
2501         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2502                 return rte_flow_error_set(error, EINVAL,
2503                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2504                                           "protocol filtering not compatible"
2505                                           " with this GRE layer");
2506         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2507                 return rte_flow_error_set(error, ENOTSUP,
2508                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2509                                           "multiple tunnel layers not"
2510                                           " supported");
2511         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2512                 return rte_flow_error_set(error, ENOTSUP,
2513                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2514                                           "L3 Layer is missing");
2515         if (!mask)
2516                 mask = &rte_flow_item_gre_mask;
2517         ret = mlx5_flow_item_acceptable
2518                 (item, (const uint8_t *)mask,
2519                  (const uint8_t *)&nic_mask,
2520                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2521                  error);
2522         if (ret < 0)
2523                 return ret;
2524 #ifndef HAVE_MLX5DV_DR
2525 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2526         if (spec && (spec->protocol & mask->protocol))
2527                 return rte_flow_error_set(error, ENOTSUP,
2528                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2529                                           "without MPLS support the"
2530                                           " specification cannot be used for"
2531                                           " filtering");
2532 #endif
2533 #endif
2534         return 0;
2535 }
2536
2537 /**
2538  * Validate Geneve item.
2539  *
2540  * @param[in] item
2541  *   Item specification.
2542  * @param[in] itemFlags
2543  *   Bit-fields that holds the items detected until now.
2544  * @param[in] enPriv
2545  *   Pointer to the private data structure.
2546  * @param[out] error
2547  *   Pointer to error structure.
2548  *
2549  * @return
2550  *   0 on success, a negative errno value otherwise and rte_errno is set.
2551  */
2552
2553 int
2554 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2555                                uint64_t item_flags,
2556                                struct rte_eth_dev *dev,
2557                                struct rte_flow_error *error)
2558 {
2559         struct mlx5_priv *priv = dev->data->dev_private;
2560         const struct rte_flow_item_geneve *spec = item->spec;
2561         const struct rte_flow_item_geneve *mask = item->mask;
2562         int ret;
2563         uint16_t gbhdr;
2564         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2565                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2566         const struct rte_flow_item_geneve nic_mask = {
2567                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2568                 .vni = "\xff\xff\xff",
2569                 .protocol = RTE_BE16(UINT16_MAX),
2570         };
2571
2572         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2573                 return rte_flow_error_set(error, ENOTSUP,
2574                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2575                                           "L3 Geneve is not enabled by device"
2576                                           " parameter and/or not configured in"
2577                                           " firmware");
2578         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2579                 return rte_flow_error_set(error, ENOTSUP,
2580                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2581                                           "multiple tunnel layers not"
2582                                           " supported");
2583         /*
2584          * Verify only UDPv4 is present as defined in
2585          * https://tools.ietf.org/html/rfc7348
2586          */
2587         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2588                 return rte_flow_error_set(error, EINVAL,
2589                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2590                                           "no outer UDP layer found");
2591         if (!mask)
2592                 mask = &rte_flow_item_geneve_mask;
2593         ret = mlx5_flow_item_acceptable
2594                                   (item, (const uint8_t *)mask,
2595                                    (const uint8_t *)&nic_mask,
2596                                    sizeof(struct rte_flow_item_geneve),
2597                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2598         if (ret)
2599                 return ret;
2600         if (spec) {
2601                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2602                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2603                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2604                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2605                         return rte_flow_error_set(error, ENOTSUP,
2606                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2607                                                   item,
2608                                                   "Geneve protocol unsupported"
2609                                                   " fields are being used");
2610                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2611                         return rte_flow_error_set
2612                                         (error, ENOTSUP,
2613                                          RTE_FLOW_ERROR_TYPE_ITEM,
2614                                          item,
2615                                          "Unsupported Geneve options length");
2616         }
2617         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2618                 return rte_flow_error_set
2619                                     (error, ENOTSUP,
2620                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2621                                      "Geneve tunnel must be fully defined");
2622         return 0;
2623 }
2624
2625 /**
2626  * Validate MPLS item.
2627  *
2628  * @param[in] dev
2629  *   Pointer to the rte_eth_dev structure.
2630  * @param[in] item
2631  *   Item specification.
2632  * @param[in] item_flags
2633  *   Bit-fields that holds the items detected until now.
2634  * @param[in] prev_layer
2635  *   The protocol layer indicated in previous item.
2636  * @param[out] error
2637  *   Pointer to error structure.
2638  *
2639  * @return
2640  *   0 on success, a negative errno value otherwise and rte_errno is set.
2641  */
2642 int
2643 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2644                              const struct rte_flow_item *item __rte_unused,
2645                              uint64_t item_flags __rte_unused,
2646                              uint64_t prev_layer __rte_unused,
2647                              struct rte_flow_error *error)
2648 {
2649 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2650         const struct rte_flow_item_mpls *mask = item->mask;
2651         struct mlx5_priv *priv = dev->data->dev_private;
2652         int ret;
2653
2654         if (!priv->config.mpls_en)
2655                 return rte_flow_error_set(error, ENOTSUP,
2656                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2657                                           "MPLS not supported or"
2658                                           " disabled in firmware"
2659                                           " configuration.");
2660         /* MPLS over IP, UDP, GRE is allowed */
2661         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2662                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2663                             MLX5_FLOW_LAYER_GRE |
2664                             MLX5_FLOW_LAYER_GRE_KEY)))
2665                 return rte_flow_error_set(error, EINVAL,
2666                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2667                                           "protocol filtering not compatible"
2668                                           " with MPLS layer");
2669         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2670         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2671             !(item_flags & MLX5_FLOW_LAYER_GRE))
2672                 return rte_flow_error_set(error, ENOTSUP,
2673                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2674                                           "multiple tunnel layers not"
2675                                           " supported");
2676         if (!mask)
2677                 mask = &rte_flow_item_mpls_mask;
2678         ret = mlx5_flow_item_acceptable
2679                 (item, (const uint8_t *)mask,
2680                  (const uint8_t *)&rte_flow_item_mpls_mask,
2681                  sizeof(struct rte_flow_item_mpls),
2682                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2683         if (ret < 0)
2684                 return ret;
2685         return 0;
2686 #else
2687         return rte_flow_error_set(error, ENOTSUP,
2688                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2689                                   "MPLS is not supported by Verbs, please"
2690                                   " update.");
2691 #endif
2692 }
2693
2694 /**
2695  * Validate NVGRE item.
2696  *
2697  * @param[in] item
2698  *   Item specification.
2699  * @param[in] item_flags
2700  *   Bit flags to mark detected items.
2701  * @param[in] target_protocol
2702  *   The next protocol in the previous item.
2703  * @param[out] error
2704  *   Pointer to error structure.
2705  *
2706  * @return
2707  *   0 on success, a negative errno value otherwise and rte_errno is set.
2708  */
2709 int
2710 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2711                               uint64_t item_flags,
2712                               uint8_t target_protocol,
2713                               struct rte_flow_error *error)
2714 {
2715         const struct rte_flow_item_nvgre *mask = item->mask;
2716         int ret;
2717
2718         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2719                 return rte_flow_error_set(error, EINVAL,
2720                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2721                                           "protocol filtering not compatible"
2722                                           " with this GRE layer");
2723         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2724                 return rte_flow_error_set(error, ENOTSUP,
2725                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2726                                           "multiple tunnel layers not"
2727                                           " supported");
2728         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2729                 return rte_flow_error_set(error, ENOTSUP,
2730                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2731                                           "L3 Layer is missing");
2732         if (!mask)
2733                 mask = &rte_flow_item_nvgre_mask;
2734         ret = mlx5_flow_item_acceptable
2735                 (item, (const uint8_t *)mask,
2736                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2737                  sizeof(struct rte_flow_item_nvgre),
2738                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2739         if (ret < 0)
2740                 return ret;
2741         return 0;
2742 }
2743
2744 /**
2745  * Validate eCPRI item.
2746  *
2747  * @param[in] item
2748  *   Item specification.
2749  * @param[in] item_flags
2750  *   Bit-fields that holds the items detected until now.
2751  * @param[in] last_item
2752  *   Previous validated item in the pattern items.
2753  * @param[in] ether_type
2754  *   Type in the ethernet layer header (including dot1q).
2755  * @param[in] acc_mask
2756  *   Acceptable mask, if NULL default internal default mask
2757  *   will be used to check whether item fields are supported.
2758  * @param[out] error
2759  *   Pointer to error structure.
2760  *
2761  * @return
2762  *   0 on success, a negative errno value otherwise and rte_errno is set.
2763  */
2764 int
2765 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2766                               uint64_t item_flags,
2767                               uint64_t last_item,
2768                               uint16_t ether_type,
2769                               const struct rte_flow_item_ecpri *acc_mask,
2770                               struct rte_flow_error *error)
2771 {
2772         const struct rte_flow_item_ecpri *mask = item->mask;
2773         const struct rte_flow_item_ecpri nic_mask = {
2774                 .hdr = {
2775                         .common = {
2776                                 .u32 =
2777                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2778                                         .type = 0xFF,
2779                                         }).u32),
2780                         },
2781                         .dummy[0] = 0xFFFFFFFF,
2782                 },
2783         };
2784         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2785                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2786         struct rte_flow_item_ecpri mask_lo;
2787
2788         if (!(last_item & outer_l2_vlan) &&
2789             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
2790                 return rte_flow_error_set(error, EINVAL,
2791                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2792                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
2793         if ((last_item & outer_l2_vlan) && ether_type &&
2794             ether_type != RTE_ETHER_TYPE_ECPRI)
2795                 return rte_flow_error_set(error, EINVAL,
2796                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2797                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
2798         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2799                 return rte_flow_error_set(error, EINVAL,
2800                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2801                                           "eCPRI with tunnel is not supported right now");
2802         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2803                 return rte_flow_error_set(error, ENOTSUP,
2804                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2805                                           "multiple L3 layers not supported");
2806         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2807                 return rte_flow_error_set(error, EINVAL,
2808                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2809                                           "eCPRI cannot coexist with a TCP layer");
2810         /* In specification, eCPRI could be over UDP layer. */
2811         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2812                 return rte_flow_error_set(error, EINVAL,
2813                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2814                                           "eCPRI over UDP layer is not yet supported right now");
2815         /* Mask for type field in common header could be zero. */
2816         if (!mask)
2817                 mask = &rte_flow_item_ecpri_mask;
2818         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
2819         /* Input mask is in big-endian format. */
2820         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
2821                 return rte_flow_error_set(error, EINVAL,
2822                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2823                                           "partial mask is not supported for protocol");
2824         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
2825                 return rte_flow_error_set(error, EINVAL,
2826                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2827                                           "message header mask must be after a type mask");
2828         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2829                                          acc_mask ? (const uint8_t *)acc_mask
2830                                                   : (const uint8_t *)&nic_mask,
2831                                          sizeof(struct rte_flow_item_ecpri),
2832                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2833 }
2834
2835 /**
2836  * Release resource related QUEUE/RSS action split.
2837  *
2838  * @param dev
2839  *   Pointer to Ethernet device.
2840  * @param flow
2841  *   Flow to release id's from.
2842  */
2843 static void
2844 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2845                              struct rte_flow *flow)
2846 {
2847         struct mlx5_priv *priv = dev->data->dev_private;
2848         uint32_t handle_idx;
2849         struct mlx5_flow_handle *dev_handle;
2850
2851         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2852                        handle_idx, dev_handle, next)
2853                 if (dev_handle->split_flow_id)
2854                         mlx5_ipool_free(priv->sh->ipool
2855                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
2856                                         dev_handle->split_flow_id);
2857 }
2858
2859 static int
2860 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2861                    const struct rte_flow_attr *attr __rte_unused,
2862                    const struct rte_flow_item items[] __rte_unused,
2863                    const struct rte_flow_action actions[] __rte_unused,
2864                    bool external __rte_unused,
2865                    int hairpin __rte_unused,
2866                    struct rte_flow_error *error)
2867 {
2868         return rte_flow_error_set(error, ENOTSUP,
2869                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2870 }
2871
2872 static struct mlx5_flow *
2873 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2874                   const struct rte_flow_attr *attr __rte_unused,
2875                   const struct rte_flow_item items[] __rte_unused,
2876                   const struct rte_flow_action actions[] __rte_unused,
2877                   struct rte_flow_error *error)
2878 {
2879         rte_flow_error_set(error, ENOTSUP,
2880                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2881         return NULL;
2882 }
2883
2884 static int
2885 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2886                     struct mlx5_flow *dev_flow __rte_unused,
2887                     const struct rte_flow_attr *attr __rte_unused,
2888                     const struct rte_flow_item items[] __rte_unused,
2889                     const struct rte_flow_action actions[] __rte_unused,
2890                     struct rte_flow_error *error)
2891 {
2892         return rte_flow_error_set(error, ENOTSUP,
2893                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2894 }
2895
2896 static int
2897 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2898                 struct rte_flow *flow __rte_unused,
2899                 struct rte_flow_error *error)
2900 {
2901         return rte_flow_error_set(error, ENOTSUP,
2902                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2903 }
2904
2905 static void
2906 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2907                  struct rte_flow *flow __rte_unused)
2908 {
2909 }
2910
2911 static void
2912 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2913                   struct rte_flow *flow __rte_unused)
2914 {
2915 }
2916
2917 static int
2918 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2919                 struct rte_flow *flow __rte_unused,
2920                 const struct rte_flow_action *actions __rte_unused,
2921                 void *data __rte_unused,
2922                 struct rte_flow_error *error)
2923 {
2924         return rte_flow_error_set(error, ENOTSUP,
2925                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2926 }
2927
2928 static int
2929 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
2930                       uint32_t domains __rte_unused,
2931                       uint32_t flags __rte_unused)
2932 {
2933         return 0;
2934 }
2935
2936 /* Void driver to protect from null pointer reference. */
2937 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2938         .validate = flow_null_validate,
2939         .prepare = flow_null_prepare,
2940         .translate = flow_null_translate,
2941         .apply = flow_null_apply,
2942         .remove = flow_null_remove,
2943         .destroy = flow_null_destroy,
2944         .query = flow_null_query,
2945         .sync_domain = flow_null_sync_domain,
2946 };
2947
2948 /**
2949  * Select flow driver type according to flow attributes and device
2950  * configuration.
2951  *
2952  * @param[in] dev
2953  *   Pointer to the dev structure.
2954  * @param[in] attr
2955  *   Pointer to the flow attributes.
2956  *
2957  * @return
2958  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2959  */
2960 static enum mlx5_flow_drv_type
2961 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2962 {
2963         struct mlx5_priv *priv = dev->data->dev_private;
2964         /* The OS can determine first a specific flow type (DV, VERBS) */
2965         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
2966
2967         if (type != MLX5_FLOW_TYPE_MAX)
2968                 return type;
2969         /* If no OS specific type - continue with DV/VERBS selection */
2970         if (attr->transfer && priv->config.dv_esw_en)
2971                 type = MLX5_FLOW_TYPE_DV;
2972         if (!attr->transfer)
2973                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2974                                                  MLX5_FLOW_TYPE_VERBS;
2975         return type;
2976 }
2977
2978 #define flow_get_drv_ops(type) flow_drv_ops[type]
2979
2980 /**
2981  * Flow driver validation API. This abstracts calling driver specific functions.
2982  * The type of flow driver is determined according to flow attributes.
2983  *
2984  * @param[in] dev
2985  *   Pointer to the dev structure.
2986  * @param[in] attr
2987  *   Pointer to the flow attributes.
2988  * @param[in] items
2989  *   Pointer to the list of items.
2990  * @param[in] actions
2991  *   Pointer to the list of actions.
2992  * @param[in] external
2993  *   This flow rule is created by request external to PMD.
2994  * @param[in] hairpin
2995  *   Number of hairpin TX actions, 0 means classic flow.
2996  * @param[out] error
2997  *   Pointer to the error structure.
2998  *
2999  * @return
3000  *   0 on success, a negative errno value otherwise and rte_errno is set.
3001  */
3002 static inline int
3003 flow_drv_validate(struct rte_eth_dev *dev,
3004                   const struct rte_flow_attr *attr,
3005                   const struct rte_flow_item items[],
3006                   const struct rte_flow_action actions[],
3007                   bool external, int hairpin, struct rte_flow_error *error)
3008 {
3009         const struct mlx5_flow_driver_ops *fops;
3010         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3011
3012         fops = flow_get_drv_ops(type);
3013         return fops->validate(dev, attr, items, actions, external,
3014                               hairpin, error);
3015 }
3016
3017 /**
3018  * Flow driver preparation API. This abstracts calling driver specific
3019  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3020  * calculates the size of memory required for device flow, allocates the memory,
3021  * initializes the device flow and returns the pointer.
3022  *
3023  * @note
3024  *   This function initializes device flow structure such as dv or verbs in
3025  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3026  *   rest. For example, adding returning device flow to flow->dev_flow list and
3027  *   setting backward reference to the flow should be done out of this function.
3028  *   layers field is not filled either.
3029  *
3030  * @param[in] dev
3031  *   Pointer to the dev structure.
3032  * @param[in] attr
3033  *   Pointer to the flow attributes.
3034  * @param[in] items
3035  *   Pointer to the list of items.
3036  * @param[in] actions
3037  *   Pointer to the list of actions.
3038  * @param[in] flow_idx
3039  *   This memory pool index to the flow.
3040  * @param[out] error
3041  *   Pointer to the error structure.
3042  *
3043  * @return
3044  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3045  */
3046 static inline struct mlx5_flow *
3047 flow_drv_prepare(struct rte_eth_dev *dev,
3048                  const struct rte_flow *flow,
3049                  const struct rte_flow_attr *attr,
3050                  const struct rte_flow_item items[],
3051                  const struct rte_flow_action actions[],
3052                  uint32_t flow_idx,
3053                  struct rte_flow_error *error)
3054 {
3055         const struct mlx5_flow_driver_ops *fops;
3056         enum mlx5_flow_drv_type type = flow->drv_type;
3057         struct mlx5_flow *mlx5_flow = NULL;
3058
3059         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3060         fops = flow_get_drv_ops(type);
3061         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3062         if (mlx5_flow)
3063                 mlx5_flow->flow_idx = flow_idx;
3064         return mlx5_flow;
3065 }
3066
3067 /**
3068  * Flow driver translation API. This abstracts calling driver specific
3069  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3070  * translates a generic flow into a driver flow. flow_drv_prepare() must
3071  * precede.
3072  *
3073  * @note
3074  *   dev_flow->layers could be filled as a result of parsing during translation
3075  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3076  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3077  *   flow->actions could be overwritten even though all the expanded dev_flows
3078  *   have the same actions.
3079  *
3080  * @param[in] dev
3081  *   Pointer to the rte dev structure.
3082  * @param[in, out] dev_flow
3083  *   Pointer to the mlx5 flow.
3084  * @param[in] attr
3085  *   Pointer to the flow attributes.
3086  * @param[in] items
3087  *   Pointer to the list of items.
3088  * @param[in] actions
3089  *   Pointer to the list of actions.
3090  * @param[out] error
3091  *   Pointer to the error structure.
3092  *
3093  * @return
3094  *   0 on success, a negative errno value otherwise and rte_errno is set.
3095  */
3096 static inline int
3097 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3098                    const struct rte_flow_attr *attr,
3099                    const struct rte_flow_item items[],
3100                    const struct rte_flow_action actions[],
3101                    struct rte_flow_error *error)
3102 {
3103         const struct mlx5_flow_driver_ops *fops;
3104         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3105
3106         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3107         fops = flow_get_drv_ops(type);
3108         return fops->translate(dev, dev_flow, attr, items, actions, error);
3109 }
3110
3111 /**
3112  * Flow driver apply API. This abstracts calling driver specific functions.
3113  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3114  * translated driver flows on to device. flow_drv_translate() must precede.
3115  *
3116  * @param[in] dev
3117  *   Pointer to Ethernet device structure.
3118  * @param[in, out] flow
3119  *   Pointer to flow structure.
3120  * @param[out] error
3121  *   Pointer to error structure.
3122  *
3123  * @return
3124  *   0 on success, a negative errno value otherwise and rte_errno is set.
3125  */
3126 static inline int
3127 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3128                struct rte_flow_error *error)
3129 {
3130         const struct mlx5_flow_driver_ops *fops;
3131         enum mlx5_flow_drv_type type = flow->drv_type;
3132
3133         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3134         fops = flow_get_drv_ops(type);
3135         return fops->apply(dev, flow, error);
3136 }
3137
3138 /**
3139  * Flow driver destroy API. This abstracts calling driver specific functions.
3140  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3141  * on device and releases resources of the flow.
3142  *
3143  * @param[in] dev
3144  *   Pointer to Ethernet device.
3145  * @param[in, out] flow
3146  *   Pointer to flow structure.
3147  */
3148 static inline void
3149 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3150 {
3151         const struct mlx5_flow_driver_ops *fops;
3152         enum mlx5_flow_drv_type type = flow->drv_type;
3153
3154         flow_mreg_split_qrss_release(dev, flow);
3155         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3156         fops = flow_get_drv_ops(type);
3157         fops->destroy(dev, flow);
3158 }
3159
3160 /**
3161  * Get RSS action from the action list.
3162  *
3163  * @param[in] actions
3164  *   Pointer to the list of actions.
3165  *
3166  * @return
3167  *   Pointer to the RSS action if exist, else return NULL.
3168  */
3169 static const struct rte_flow_action_rss*
3170 flow_get_rss_action(const struct rte_flow_action actions[])
3171 {
3172         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3173                 switch (actions->type) {
3174                 case RTE_FLOW_ACTION_TYPE_RSS:
3175                         return (const struct rte_flow_action_rss *)
3176                                actions->conf;
3177                 default:
3178                         break;
3179                 }
3180         }
3181         return NULL;
3182 }
3183
3184 /**
3185  * Get ASO age action by index.
3186  *
3187  * @param[in] dev
3188  *   Pointer to the Ethernet device structure.
3189  * @param[in] age_idx
3190  *   Index to the ASO age action.
3191  *
3192  * @return
3193  *   The specified ASO age action.
3194  */
3195 struct mlx5_aso_age_action*
3196 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3197 {
3198         uint16_t pool_idx = age_idx & UINT16_MAX;
3199         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3200         struct mlx5_priv *priv = dev->data->dev_private;
3201         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3202         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3203
3204         return &pool->actions[offset - 1];
3205 }
3206
3207 /* maps shared action to translated non shared in some actions array */
3208 struct mlx5_translated_shared_action {
3209         struct rte_flow_shared_action *action; /**< Shared action */
3210         int index; /**< Index in related array of rte_flow_action */
3211 };
3212
3213 /**
3214  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3215  * non shared action if translation possible.
3216  * This functionality used to run same execution path for both shared & non
3217  * shared actions on flow create. All necessary preparations for shared
3218  * action handling should be preformed on *shared* actions list returned
3219  * from this call.
3220  *
3221  * @param[in] dev
3222  *   Pointer to Ethernet device.
3223  * @param[in] actions
3224  *   List of actions to translate.
3225  * @param[out] shared
3226  *   List to store translated shared actions.
3227  * @param[in, out] shared_n
3228  *   Size of *shared* array. On return should be updated with number of shared
3229  *   actions retrieved from the *actions* list.
3230  * @param[out] translated_actions
3231  *   List of actions where all shared actions were translated to non shared
3232  *   if possible. NULL if no translation took place.
3233  * @param[out] error
3234  *   Pointer to the error structure.
3235  *
3236  * @return
3237  *   0 on success, a negative errno value otherwise and rte_errno is set.
3238  */
3239 static int
3240 flow_shared_actions_translate(struct rte_eth_dev *dev,
3241                               const struct rte_flow_action actions[],
3242                               struct mlx5_translated_shared_action *shared,
3243                               int *shared_n,
3244                               struct rte_flow_action **translated_actions,
3245                               struct rte_flow_error *error)
3246 {
3247         struct mlx5_priv *priv = dev->data->dev_private;
3248         struct rte_flow_action *translated = NULL;
3249         size_t actions_size;
3250         int n;
3251         int copied_n = 0;
3252         struct mlx5_translated_shared_action *shared_end = NULL;
3253
3254         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3255                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3256                         continue;
3257                 if (copied_n == *shared_n) {
3258                         return rte_flow_error_set
3259                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3260                                  NULL, "too many shared actions");
3261                 }
3262                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3263                            sizeof(actions[n].conf));
3264                 shared[copied_n].index = n;
3265                 copied_n++;
3266         }
3267         n++;
3268         *shared_n = copied_n;
3269         if (!copied_n)
3270                 return 0;
3271         actions_size = sizeof(struct rte_flow_action) * n;
3272         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3273         if (!translated) {
3274                 rte_errno = ENOMEM;
3275                 return -ENOMEM;
3276         }
3277         memcpy(translated, actions, actions_size);
3278         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3279                 struct mlx5_shared_action_rss *shared_rss;
3280                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3281                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3282                 uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
3283                                                                            - 1);
3284
3285                 switch (type) {
3286                 case MLX5_SHARED_ACTION_TYPE_RSS:
3287                         shared_rss = mlx5_ipool_get
3288                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3289                         translated[shared->index].type =
3290                                 RTE_FLOW_ACTION_TYPE_RSS;
3291                         translated[shared->index].conf =
3292                                 &shared_rss->origin;
3293                         break;
3294                 case MLX5_SHARED_ACTION_TYPE_AGE:
3295                         if (priv->sh->flow_hit_aso_en) {
3296                                 translated[shared->index].type =
3297                                         (enum rte_flow_action_type)
3298                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3299                                 translated[shared->index].conf =
3300                                                          (void *)(uintptr_t)idx;
3301                                 break;
3302                         }
3303                         /* Fall-through */
3304                 default:
3305                         mlx5_free(translated);
3306                         return rte_flow_error_set
3307                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3308                                  NULL, "invalid shared action type");
3309                 }
3310         }
3311         *translated_actions = translated;
3312         return 0;
3313 }
3314
3315 /**
3316  * Get Shared RSS action from the action list.
3317  *
3318  * @param[in] dev
3319  *   Pointer to Ethernet device.
3320  * @param[in] shared
3321  *   Pointer to the list of actions.
3322  * @param[in] shared_n
3323  *   Actions list length.
3324  *
3325  * @return
3326  *   The MLX5 RSS action ID if exists, otherwise return 0.
3327  */
3328 static uint32_t
3329 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3330                            struct mlx5_translated_shared_action *shared,
3331                            int shared_n)
3332 {
3333         struct mlx5_translated_shared_action *shared_end;
3334         struct mlx5_priv *priv = dev->data->dev_private;
3335         struct mlx5_shared_action_rss *shared_rss;
3336
3337
3338         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3339                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3340                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3341                 uint32_t idx = act_idx &
3342                                    ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
3343                 switch (type) {
3344                 case MLX5_SHARED_ACTION_TYPE_RSS:
3345                         shared_rss = mlx5_ipool_get
3346                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3347                                                                            idx);
3348                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3349                                            __ATOMIC_RELAXED);
3350                         return idx;
3351                 default:
3352                         break;
3353                 }
3354         }
3355         return 0;
3356 }
3357
3358 static unsigned int
3359 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3360 {
3361         const struct rte_flow_item *item;
3362         unsigned int has_vlan = 0;
3363
3364         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3365                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3366                         has_vlan = 1;
3367                         break;
3368                 }
3369         }
3370         if (has_vlan)
3371                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3372                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3373         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3374                                MLX5_EXPANSION_ROOT_OUTER;
3375 }
3376
3377 /**
3378  *  Get layer flags from the prefix flow.
3379  *
3380  *  Some flows may be split to several subflows, the prefix subflow gets the
3381  *  match items and the suffix sub flow gets the actions.
3382  *  Some actions need the user defined match item flags to get the detail for
3383  *  the action.
3384  *  This function helps the suffix flow to get the item layer flags from prefix
3385  *  subflow.
3386  *
3387  * @param[in] dev_flow
3388  *   Pointer the created preifx subflow.
3389  *
3390  * @return
3391  *   The layers get from prefix subflow.
3392  */
3393 static inline uint64_t
3394 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3395 {
3396         uint64_t layers = 0;
3397
3398         /*
3399          * Layers bits could be localization, but usually the compiler will
3400          * help to do the optimization work for source code.
3401          * If no decap actions, use the layers directly.
3402          */
3403         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3404                 return dev_flow->handle->layers;
3405         /* Convert L3 layers with decap action. */
3406         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3407                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3408         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3409                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3410         /* Convert L4 layers with decap action.  */
3411         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3412                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3413         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3414                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3415         return layers;
3416 }
3417
3418 /**
3419  * Get metadata split action information.
3420  *
3421  * @param[in] actions
3422  *   Pointer to the list of actions.
3423  * @param[out] qrss
3424  *   Pointer to the return pointer.
3425  * @param[out] qrss_type
3426  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3427  *   if no QUEUE/RSS is found.
3428  * @param[out] encap_idx
3429  *   Pointer to the index of the encap action if exists, otherwise the last
3430  *   action index.
3431  *
3432  * @return
3433  *   Total number of actions.
3434  */
3435 static int
3436 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3437                                        const struct rte_flow_action **qrss,
3438                                        int *encap_idx)
3439 {
3440         const struct rte_flow_action_raw_encap *raw_encap;
3441         int actions_n = 0;
3442         int raw_decap_idx = -1;
3443
3444         *encap_idx = -1;
3445         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3446                 switch (actions->type) {
3447                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3448                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3449                         *encap_idx = actions_n;
3450                         break;
3451                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3452                         raw_decap_idx = actions_n;
3453                         break;
3454                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3455                         raw_encap = actions->conf;
3456                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3457                                 *encap_idx = raw_decap_idx != -1 ?
3458                                                       raw_decap_idx : actions_n;
3459                         break;
3460                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3461                 case RTE_FLOW_ACTION_TYPE_RSS:
3462                         *qrss = actions;
3463                         break;
3464                 default:
3465                         break;
3466                 }
3467                 actions_n++;
3468         }
3469         if (*encap_idx == -1)
3470                 *encap_idx = actions_n;
3471         /* Count RTE_FLOW_ACTION_TYPE_END. */
3472         return actions_n + 1;
3473 }
3474
3475 /**
3476  * Check meter action from the action list.
3477  *
3478  * @param[in] actions
3479  *   Pointer to the list of actions.
3480  * @param[out] mtr
3481  *   Pointer to the meter exist flag.
3482  *
3483  * @return
3484  *   Total number of actions.
3485  */
3486 static int
3487 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3488 {
3489         int actions_n = 0;
3490
3491         MLX5_ASSERT(mtr);
3492         *mtr = 0;
3493         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3494                 switch (actions->type) {
3495                 case RTE_FLOW_ACTION_TYPE_METER:
3496                         *mtr = 1;
3497                         break;
3498                 default:
3499                         break;
3500                 }
3501                 actions_n++;
3502         }
3503         /* Count RTE_FLOW_ACTION_TYPE_END. */
3504         return actions_n + 1;
3505 }
3506
3507 /**
3508  * Check if the flow should be split due to hairpin.
3509  * The reason for the split is that in current HW we can't
3510  * support encap and push-vlan on Rx, so if a flow contains
3511  * these actions we move it to Tx.
3512  *
3513  * @param dev
3514  *   Pointer to Ethernet device.
3515  * @param[in] attr
3516  *   Flow rule attributes.
3517  * @param[in] actions
3518  *   Associated actions (list terminated by the END action).
3519  *
3520  * @return
3521  *   > 0 the number of actions and the flow should be split,
3522  *   0 when no split required.
3523  */
3524 static int
3525 flow_check_hairpin_split(struct rte_eth_dev *dev,
3526                          const struct rte_flow_attr *attr,
3527                          const struct rte_flow_action actions[])
3528 {
3529         int queue_action = 0;
3530         int action_n = 0;
3531         int split = 0;
3532         const struct rte_flow_action_queue *queue;
3533         const struct rte_flow_action_rss *rss;
3534         const struct rte_flow_action_raw_encap *raw_encap;
3535         const struct rte_eth_hairpin_conf *conf;
3536
3537         if (!attr->ingress)
3538                 return 0;
3539         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3540                 switch (actions->type) {
3541                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3542                         queue = actions->conf;
3543                         if (queue == NULL)
3544                                 return 0;
3545                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3546                         if (conf == NULL || conf->tx_explicit != 0)
3547                                 return 0;
3548                         queue_action = 1;
3549                         action_n++;
3550                         break;
3551                 case RTE_FLOW_ACTION_TYPE_RSS:
3552                         rss = actions->conf;
3553                         if (rss == NULL || rss->queue_num == 0)
3554                                 return 0;
3555                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3556                         if (conf == NULL || conf->tx_explicit != 0)
3557                                 return 0;
3558                         queue_action = 1;
3559                         action_n++;
3560                         break;
3561                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3562                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3563                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3564                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3565                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3566                         split++;
3567                         action_n++;
3568                         break;
3569                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3570                         raw_encap = actions->conf;
3571                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3572                                 split++;
3573                         action_n++;
3574                         break;
3575                 default:
3576                         action_n++;
3577                         break;
3578                 }
3579         }
3580         if (split && queue_action)
3581                 return action_n;
3582         return 0;
3583 }
3584
3585 /* Declare flow create/destroy prototype in advance. */
3586 static uint32_t
3587 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3588                  const struct rte_flow_attr *attr,
3589                  const struct rte_flow_item items[],
3590                  const struct rte_flow_action actions[],
3591                  bool external, struct rte_flow_error *error);
3592
3593 static void
3594 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3595                   uint32_t flow_idx);
3596
3597 int
3598 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused,
3599                       struct mlx5_hlist_entry *entry,
3600                       uint64_t key, void *cb_ctx __rte_unused)
3601 {
3602         struct mlx5_flow_mreg_copy_resource *mcp_res =
3603                 container_of(entry, typeof(*mcp_res), hlist_ent);
3604
3605         return mcp_res->mark_id != key;
3606 }
3607
3608 struct mlx5_hlist_entry *
3609 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3610                        void *cb_ctx)
3611 {
3612         struct rte_eth_dev *dev = list->ctx;
3613         struct mlx5_priv *priv = dev->data->dev_private;
3614         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3615         struct mlx5_flow_mreg_copy_resource *mcp_res;
3616         struct rte_flow_error *error = ctx->error;
3617         uint32_t idx = 0;
3618         int ret;
3619         uint32_t mark_id = key;
3620         struct rte_flow_attr attr = {
3621                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3622                 .ingress = 1,
3623         };
3624         struct mlx5_rte_flow_item_tag tag_spec = {
3625                 .data = mark_id,
3626         };
3627         struct rte_flow_item items[] = {
3628                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3629         };
3630         struct rte_flow_action_mark ftag = {
3631                 .id = mark_id,
3632         };
3633         struct mlx5_flow_action_copy_mreg cp_mreg = {
3634                 .dst = REG_B,
3635                 .src = REG_NON,
3636         };
3637         struct rte_flow_action_jump jump = {
3638                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3639         };
3640         struct rte_flow_action actions[] = {
3641                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3642         };
3643
3644         /* Fill the register fileds in the flow. */
3645         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3646         if (ret < 0)
3647                 return NULL;
3648         tag_spec.id = ret;
3649         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3650         if (ret < 0)
3651                 return NULL;
3652         cp_mreg.src = ret;
3653         /* Provide the full width of FLAG specific value. */
3654         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3655                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3656         /* Build a new flow. */
3657         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3658                 items[0] = (struct rte_flow_item){
3659                         .type = (enum rte_flow_item_type)
3660                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3661                         .spec = &tag_spec,
3662                 };
3663                 items[1] = (struct rte_flow_item){
3664                         .type = RTE_FLOW_ITEM_TYPE_END,
3665                 };
3666                 actions[0] = (struct rte_flow_action){
3667                         .type = (enum rte_flow_action_type)
3668                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3669                         .conf = &ftag,
3670                 };
3671                 actions[1] = (struct rte_flow_action){
3672                         .type = (enum rte_flow_action_type)
3673                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3674                         .conf = &cp_mreg,
3675                 };
3676                 actions[2] = (struct rte_flow_action){
3677                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3678                         .conf = &jump,
3679                 };
3680                 actions[3] = (struct rte_flow_action){
3681                         .type = RTE_FLOW_ACTION_TYPE_END,
3682                 };
3683         } else {
3684                 /* Default rule, wildcard match. */
3685                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3686                 items[0] = (struct rte_flow_item){
3687                         .type = RTE_FLOW_ITEM_TYPE_END,
3688                 };
3689                 actions[0] = (struct rte_flow_action){
3690                         .type = (enum rte_flow_action_type)
3691                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3692                         .conf = &cp_mreg,
3693                 };
3694                 actions[1] = (struct rte_flow_action){
3695                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3696                         .conf = &jump,
3697                 };
3698                 actions[2] = (struct rte_flow_action){
3699                         .type = RTE_FLOW_ACTION_TYPE_END,
3700                 };
3701         }
3702         /* Build a new entry. */
3703         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3704         if (!mcp_res) {
3705                 rte_errno = ENOMEM;
3706                 return NULL;
3707         }
3708         mcp_res->idx = idx;
3709         mcp_res->mark_id = mark_id;
3710         /*
3711          * The copy Flows are not included in any list. There
3712          * ones are referenced from other Flows and can not
3713          * be applied, removed, deleted in ardbitrary order
3714          * by list traversing.
3715          */
3716         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3717                                          actions, false, error);
3718         if (!mcp_res->rix_flow) {
3719                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
3720                 return NULL;
3721         }
3722         return &mcp_res->hlist_ent;
3723 }
3724
3725 /**
3726  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3727  *
3728  * As mark_id is unique, if there's already a registered flow for the mark_id,
3729  * return by increasing the reference counter of the resource. Otherwise, create
3730  * the resource (mcp_res) and flow.
3731  *
3732  * Flow looks like,
3733  *   - If ingress port is ANY and reg_c[1] is mark_id,
3734  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3735  *
3736  * For default flow (zero mark_id), flow is like,
3737  *   - If ingress port is ANY,
3738  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3739  *
3740  * @param dev
3741  *   Pointer to Ethernet device.
3742  * @param mark_id
3743  *   ID of MARK action, zero means default flow for META.
3744  * @param[out] error
3745  *   Perform verbose error reporting if not NULL.
3746  *
3747  * @return
3748  *   Associated resource on success, NULL otherwise and rte_errno is set.
3749  */
3750 static struct mlx5_flow_mreg_copy_resource *
3751 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3752                           struct rte_flow_error *error)
3753 {
3754         struct mlx5_priv *priv = dev->data->dev_private;
3755         struct mlx5_hlist_entry *entry;
3756         struct mlx5_flow_cb_ctx ctx = {
3757                 .dev = dev,
3758                 .error = error,
3759         };
3760
3761         /* Check if already registered. */
3762         MLX5_ASSERT(priv->mreg_cp_tbl);
3763         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
3764         if (!entry)
3765                 return NULL;
3766         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
3767                             hlist_ent);
3768 }
3769
3770 void
3771 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
3772 {
3773         struct mlx5_flow_mreg_copy_resource *mcp_res =
3774                 container_of(entry, typeof(*mcp_res), hlist_ent);
3775         struct rte_eth_dev *dev = list->ctx;
3776         struct mlx5_priv *priv = dev->data->dev_private;
3777
3778         MLX5_ASSERT(mcp_res->rix_flow);
3779         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3780         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3781 }
3782
3783 /**
3784  * Release flow in RX_CP_TBL.
3785  *
3786  * @param dev
3787  *   Pointer to Ethernet device.
3788  * @flow
3789  *   Parent flow for wich copying is provided.
3790  */
3791 static void
3792 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3793                           struct rte_flow *flow)
3794 {
3795         struct mlx5_flow_mreg_copy_resource *mcp_res;
3796         struct mlx5_priv *priv = dev->data->dev_private;
3797
3798         if (!flow->rix_mreg_copy)
3799                 return;
3800         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3801                                  flow->rix_mreg_copy);
3802         if (!mcp_res || !priv->mreg_cp_tbl)
3803                 return;
3804         MLX5_ASSERT(mcp_res->rix_flow);
3805         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3806         flow->rix_mreg_copy = 0;
3807 }
3808
3809 /**
3810  * Remove the default copy action from RX_CP_TBL.
3811  *
3812  * This functions is called in the mlx5_dev_start(). No thread safe
3813  * is guaranteed.
3814  *
3815  * @param dev
3816  *   Pointer to Ethernet device.
3817  */
3818 static void
3819 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3820 {
3821         struct mlx5_hlist_entry *entry;
3822         struct mlx5_priv *priv = dev->data->dev_private;
3823
3824         /* Check if default flow is registered. */
3825         if (!priv->mreg_cp_tbl)
3826                 return;
3827         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
3828                                   MLX5_DEFAULT_COPY_ID, NULL);
3829         if (!entry)
3830                 return;
3831         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
3832 }
3833
3834 /**
3835  * Add the default copy action in in RX_CP_TBL.
3836  *
3837  * This functions is called in the mlx5_dev_start(). No thread safe
3838  * is guaranteed.
3839  *
3840  * @param dev
3841  *   Pointer to Ethernet device.
3842  * @param[out] error
3843  *   Perform verbose error reporting if not NULL.
3844  *
3845  * @return
3846  *   0 for success, negative value otherwise and rte_errno is set.
3847  */
3848 static int
3849 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3850                                   struct rte_flow_error *error)
3851 {
3852         struct mlx5_priv *priv = dev->data->dev_private;
3853         struct mlx5_flow_mreg_copy_resource *mcp_res;
3854
3855         /* Check whether extensive metadata feature is engaged. */
3856         if (!priv->config.dv_flow_en ||
3857             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3858             !mlx5_flow_ext_mreg_supported(dev) ||
3859             !priv->sh->dv_regc0_mask)
3860                 return 0;
3861         /*
3862          * Add default mreg copy flow may be called multiple time, but
3863          * only be called once in stop. Avoid register it twice.
3864          */
3865         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
3866                 return 0;
3867         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3868         if (!mcp_res)
3869                 return -rte_errno;
3870         return 0;
3871 }
3872
3873 /**
3874  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3875  *
3876  * All the flow having Q/RSS action should be split by
3877  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3878  * performs the following,
3879  *   - CQE->flow_tag := reg_c[1] (MARK)
3880  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3881  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3882  * but there should be a flow per each MARK ID set by MARK action.
3883  *
3884  * For the aforementioned reason, if there's a MARK action in flow's action
3885  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3886  * the MARK ID to CQE's flow_tag like,
3887  *   - If reg_c[1] is mark_id,
3888  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3889  *
3890  * For SET_META action which stores value in reg_c[0], as the destination is
3891  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3892  * MARK ID means the default flow. The default flow looks like,
3893  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3894  *
3895  * @param dev
3896  *   Pointer to Ethernet device.
3897  * @param flow
3898  *   Pointer to flow structure.
3899  * @param[in] actions
3900  *   Pointer to the list of actions.
3901  * @param[out] error
3902  *   Perform verbose error reporting if not NULL.
3903  *
3904  * @return
3905  *   0 on success, negative value otherwise and rte_errno is set.
3906  */
3907 static int
3908 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3909                             struct rte_flow *flow,
3910                             const struct rte_flow_action *actions,
3911                             struct rte_flow_error *error)
3912 {
3913         struct mlx5_priv *priv = dev->data->dev_private;
3914         struct mlx5_dev_config *config = &priv->config;
3915         struct mlx5_flow_mreg_copy_resource *mcp_res;
3916         const struct rte_flow_action_mark *mark;
3917
3918         /* Check whether extensive metadata feature is engaged. */
3919         if (!config->dv_flow_en ||
3920             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3921             !mlx5_flow_ext_mreg_supported(dev) ||
3922             !priv->sh->dv_regc0_mask)
3923                 return 0;
3924         /* Find MARK action. */
3925         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3926                 switch (actions->type) {
3927                 case RTE_FLOW_ACTION_TYPE_FLAG:
3928                         mcp_res = flow_mreg_add_copy_action
3929                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3930                         if (!mcp_res)
3931                                 return -rte_errno;
3932                         flow->rix_mreg_copy = mcp_res->idx;
3933                         return 0;
3934                 case RTE_FLOW_ACTION_TYPE_MARK:
3935                         mark = (const struct rte_flow_action_mark *)
3936                                 actions->conf;
3937                         mcp_res =
3938                                 flow_mreg_add_copy_action(dev, mark->id, error);
3939                         if (!mcp_res)
3940                                 return -rte_errno;
3941                         flow->rix_mreg_copy = mcp_res->idx;
3942                         return 0;
3943                 default:
3944                         break;
3945                 }
3946         }
3947         return 0;
3948 }
3949
3950 #define MLX5_MAX_SPLIT_ACTIONS 24
3951 #define MLX5_MAX_SPLIT_ITEMS 24
3952
3953 /**
3954  * Split the hairpin flow.
3955  * Since HW can't support encap and push-vlan on Rx, we move these
3956  * actions to Tx.
3957  * If the count action is after the encap then we also
3958  * move the count action. in this case the count will also measure
3959  * the outer bytes.
3960  *
3961  * @param dev
3962  *   Pointer to Ethernet device.
3963  * @param[in] actions
3964  *   Associated actions (list terminated by the END action).
3965  * @param[out] actions_rx
3966  *   Rx flow actions.
3967  * @param[out] actions_tx
3968  *   Tx flow actions..
3969  * @param[out] pattern_tx
3970  *   The pattern items for the Tx flow.
3971  * @param[out] flow_id
3972  *   The flow ID connected to this flow.
3973  *
3974  * @return
3975  *   0 on success.
3976  */
3977 static int
3978 flow_hairpin_split(struct rte_eth_dev *dev,
3979                    const struct rte_flow_action actions[],
3980                    struct rte_flow_action actions_rx[],
3981                    struct rte_flow_action actions_tx[],
3982                    struct rte_flow_item pattern_tx[],
3983                    uint32_t flow_id)
3984 {
3985         const struct rte_flow_action_raw_encap *raw_encap;
3986         const struct rte_flow_action_raw_decap *raw_decap;
3987         struct mlx5_rte_flow_action_set_tag *set_tag;
3988         struct rte_flow_action *tag_action;
3989         struct mlx5_rte_flow_item_tag *tag_item;
3990         struct rte_flow_item *item;
3991         char *addr;
3992         int encap = 0;
3993
3994         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3995                 switch (actions->type) {
3996                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3997                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3998                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3999                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4000                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4001                         rte_memcpy(actions_tx, actions,
4002                                sizeof(struct rte_flow_action));
4003                         actions_tx++;
4004                         break;
4005                 case RTE_FLOW_ACTION_TYPE_COUNT:
4006                         if (encap) {
4007                                 rte_memcpy(actions_tx, actions,
4008                                            sizeof(struct rte_flow_action));
4009                                 actions_tx++;
4010                         } else {
4011                                 rte_memcpy(actions_rx, actions,
4012                                            sizeof(struct rte_flow_action));
4013                                 actions_rx++;
4014                         }
4015                         break;
4016                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4017                         raw_encap = actions->conf;
4018                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4019                                 memcpy(actions_tx, actions,
4020                                        sizeof(struct rte_flow_action));
4021                                 actions_tx++;
4022                                 encap = 1;
4023                         } else {
4024                                 rte_memcpy(actions_rx, actions,
4025                                            sizeof(struct rte_flow_action));
4026                                 actions_rx++;
4027                         }
4028                         break;
4029                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4030                         raw_decap = actions->conf;
4031                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4032                                 memcpy(actions_tx, actions,
4033                                        sizeof(struct rte_flow_action));
4034                                 actions_tx++;
4035                         } else {
4036                                 rte_memcpy(actions_rx, actions,
4037                                            sizeof(struct rte_flow_action));
4038                                 actions_rx++;
4039                         }
4040                         break;
4041                 default:
4042                         rte_memcpy(actions_rx, actions,
4043                                    sizeof(struct rte_flow_action));
4044                         actions_rx++;
4045                         break;
4046                 }
4047         }
4048         /* Add set meta action and end action for the Rx flow. */
4049         tag_action = actions_rx;
4050         tag_action->type = (enum rte_flow_action_type)
4051                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4052         actions_rx++;
4053         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4054         actions_rx++;
4055         set_tag = (void *)actions_rx;
4056         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4057         MLX5_ASSERT(set_tag->id > REG_NON);
4058         set_tag->data = flow_id;
4059         tag_action->conf = set_tag;
4060         /* Create Tx item list. */
4061         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4062         addr = (void *)&pattern_tx[2];
4063         item = pattern_tx;
4064         item->type = (enum rte_flow_item_type)
4065                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4066         tag_item = (void *)addr;
4067         tag_item->data = flow_id;
4068         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4069         MLX5_ASSERT(set_tag->id > REG_NON);
4070         item->spec = tag_item;
4071         addr += sizeof(struct mlx5_rte_flow_item_tag);
4072         tag_item = (void *)addr;
4073         tag_item->data = UINT32_MAX;
4074         tag_item->id = UINT16_MAX;
4075         item->mask = tag_item;
4076         item->last = NULL;
4077         item++;
4078         item->type = RTE_FLOW_ITEM_TYPE_END;
4079         return 0;
4080 }
4081
4082 /**
4083  * The last stage of splitting chain, just creates the subflow
4084  * without any modification.
4085  *
4086  * @param[in] dev
4087  *   Pointer to Ethernet device.
4088  * @param[in] flow
4089  *   Parent flow structure pointer.
4090  * @param[in, out] sub_flow
4091  *   Pointer to return the created subflow, may be NULL.
4092  * @param[in] attr
4093  *   Flow rule attributes.
4094  * @param[in] items
4095  *   Pattern specification (list terminated by the END pattern item).
4096  * @param[in] actions
4097  *   Associated actions (list terminated by the END action).
4098  * @param[in] flow_split_info
4099  *   Pointer to flow split info structure.
4100  * @param[out] error
4101  *   Perform verbose error reporting if not NULL.
4102  * @return
4103  *   0 on success, negative value otherwise
4104  */
4105 static int
4106 flow_create_split_inner(struct rte_eth_dev *dev,
4107                         struct rte_flow *flow,
4108                         struct mlx5_flow **sub_flow,
4109                         const struct rte_flow_attr *attr,
4110                         const struct rte_flow_item items[],
4111                         const struct rte_flow_action actions[],
4112                         struct mlx5_flow_split_info *flow_split_info,
4113                         struct rte_flow_error *error)
4114 {
4115         struct mlx5_flow *dev_flow;
4116
4117         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4118                                     flow_split_info->flow_idx, error);
4119         if (!dev_flow)
4120                 return -rte_errno;
4121         dev_flow->flow = flow;
4122         dev_flow->external = flow_split_info->external;
4123         dev_flow->skip_scale = flow_split_info->skip_scale;
4124         /* Subflow object was created, we must include one in the list. */
4125         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4126                       dev_flow->handle, next);
4127         /*
4128          * If dev_flow is as one of the suffix flow, some actions in suffix
4129          * flow may need some user defined item layer flags, and pass the
4130          * Metadate rxq mark flag to suffix flow as well.
4131          */
4132         if (flow_split_info->prefix_layers)
4133                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4134         if (flow_split_info->prefix_mark)
4135                 dev_flow->handle->mark = 1;
4136         if (sub_flow)
4137                 *sub_flow = dev_flow;
4138         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4139 }
4140
4141 /**
4142  * Split the meter flow.
4143  *
4144  * As meter flow will split to three sub flow, other than meter
4145  * action, the other actions make sense to only meter accepts
4146  * the packet. If it need to be dropped, no other additional
4147  * actions should be take.
4148  *
4149  * One kind of special action which decapsulates the L3 tunnel
4150  * header will be in the prefix sub flow, as not to take the
4151  * L3 tunnel header into account.
4152  *
4153  * @param dev
4154  *   Pointer to Ethernet device.
4155  * @param[in] items
4156  *   Pattern specification (list terminated by the END pattern item).
4157  * @param[out] sfx_items
4158  *   Suffix flow match items (list terminated by the END pattern item).
4159  * @param[in] actions
4160  *   Associated actions (list terminated by the END action).
4161  * @param[out] actions_sfx
4162  *   Suffix flow actions.
4163  * @param[out] actions_pre
4164  *   Prefix flow actions.
4165  * @param[out] pattern_sfx
4166  *   The pattern items for the suffix flow.
4167  * @param[out] tag_sfx
4168  *   Pointer to suffix flow tag.
4169  *
4170  * @return
4171  *   0 on success.
4172  */
4173 static int
4174 flow_meter_split_prep(struct rte_eth_dev *dev,
4175                  const struct rte_flow_item items[],
4176                  struct rte_flow_item sfx_items[],
4177                  const struct rte_flow_action actions[],
4178                  struct rte_flow_action actions_sfx[],
4179                  struct rte_flow_action actions_pre[])
4180 {
4181         struct mlx5_priv *priv = dev->data->dev_private;
4182         struct rte_flow_action *tag_action = NULL;
4183         struct rte_flow_item *tag_item;
4184         struct mlx5_rte_flow_action_set_tag *set_tag;
4185         struct rte_flow_error error;
4186         const struct rte_flow_action_raw_encap *raw_encap;
4187         const struct rte_flow_action_raw_decap *raw_decap;
4188         struct mlx5_rte_flow_item_tag *tag_spec;
4189         struct mlx5_rte_flow_item_tag *tag_mask;
4190         uint32_t tag_id = 0;
4191         bool copy_vlan = false;
4192
4193         /* Prepare the actions for prefix and suffix flow. */
4194         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4195                 struct rte_flow_action **action_cur = NULL;
4196
4197                 switch (actions->type) {
4198                 case RTE_FLOW_ACTION_TYPE_METER:
4199                         /* Add the extra tag action first. */
4200                         tag_action = actions_pre;
4201                         tag_action->type = (enum rte_flow_action_type)
4202                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4203                         actions_pre++;
4204                         action_cur = &actions_pre;
4205                         break;
4206                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4207                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4208                         action_cur = &actions_pre;
4209                         break;
4210                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4211                         raw_encap = actions->conf;
4212                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4213                                 action_cur = &actions_pre;
4214                         break;
4215                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4216                         raw_decap = actions->conf;
4217                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4218                                 action_cur = &actions_pre;
4219                         break;
4220                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4221                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4222                         copy_vlan = true;
4223                         break;
4224                 default:
4225                         break;
4226                 }
4227                 if (!action_cur)
4228                         action_cur = &actions_sfx;
4229                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4230                 (*action_cur)++;
4231         }
4232         /* Add end action to the actions. */
4233         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4234         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4235         actions_pre++;
4236         /* Set the tag. */
4237         set_tag = (void *)actions_pre;
4238         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4239         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4240                           &tag_id);
4241         if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) {
4242                 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.",
4243                         dev->data->port_id);
4244                 mlx5_ipool_free(priv->sh->ipool
4245                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id);
4246                 return 0;
4247         } else if (!tag_id) {
4248                 return 0;
4249         }
4250         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4251         assert(tag_action);
4252         tag_action->conf = set_tag;
4253         /* Prepare the suffix subflow items. */
4254         tag_item = sfx_items++;
4255         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4256                 int item_type = items->type;
4257
4258                 switch (item_type) {
4259                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4260                         memcpy(sfx_items, items, sizeof(*sfx_items));
4261                         sfx_items++;
4262                         break;
4263                 case RTE_FLOW_ITEM_TYPE_VLAN:
4264                         if (copy_vlan) {
4265                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4266                                 /*
4267                                  * Convert to internal match item, it is used
4268                                  * for vlan push and set vid.
4269                                  */
4270                                 sfx_items->type = (enum rte_flow_item_type)
4271                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4272                                 sfx_items++;
4273                         }
4274                         break;
4275                 default:
4276                         break;
4277                 }
4278         }
4279         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4280         sfx_items++;
4281         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4282         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4283         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4284         tag_mask = tag_spec + 1;
4285         tag_mask->data = 0xffffff00;
4286         tag_item->type = (enum rte_flow_item_type)
4287                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4288         tag_item->spec = tag_spec;
4289         tag_item->last = NULL;
4290         tag_item->mask = tag_mask;
4291         return tag_id;
4292 }
4293
4294 /**
4295  * Split action list having QUEUE/RSS for metadata register copy.
4296  *
4297  * Once Q/RSS action is detected in user's action list, the flow action
4298  * should be split in order to copy metadata registers, which will happen in
4299  * RX_CP_TBL like,
4300  *   - CQE->flow_tag := reg_c[1] (MARK)
4301  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4302  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4303  * This is because the last action of each flow must be a terminal action
4304  * (QUEUE, RSS or DROP).
4305  *
4306  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4307  * stored and kept in the mlx5_flow structure per each sub_flow.
4308  *
4309  * The Q/RSS action is replaced with,
4310  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4311  * And the following JUMP action is added at the end,
4312  *   - JUMP, to RX_CP_TBL.
4313  *
4314  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4315  * flow_create_split_metadata() routine. The flow will look like,
4316  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4317  *
4318  * @param dev
4319  *   Pointer to Ethernet device.
4320  * @param[out] split_actions
4321  *   Pointer to store split actions to jump to CP_TBL.
4322  * @param[in] actions
4323  *   Pointer to the list of original flow actions.
4324  * @param[in] qrss
4325  *   Pointer to the Q/RSS action.
4326  * @param[in] actions_n
4327  *   Number of original actions.
4328  * @param[out] error
4329  *   Perform verbose error reporting if not NULL.
4330  *
4331  * @return
4332  *   non-zero unique flow_id on success, otherwise 0 and
4333  *   error/rte_error are set.
4334  */
4335 static uint32_t
4336 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4337                           struct rte_flow_action *split_actions,
4338                           const struct rte_flow_action *actions,
4339                           const struct rte_flow_action *qrss,
4340                           int actions_n, struct rte_flow_error *error)
4341 {
4342         struct mlx5_priv *priv = dev->data->dev_private;
4343         struct mlx5_rte_flow_action_set_tag *set_tag;
4344         struct rte_flow_action_jump *jump;
4345         const int qrss_idx = qrss - actions;
4346         uint32_t flow_id = 0;
4347         int ret = 0;
4348
4349         /*
4350          * Given actions will be split
4351          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4352          * - Add jump to mreg CP_TBL.
4353          * As a result, there will be one more action.
4354          */
4355         ++actions_n;
4356         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4357         set_tag = (void *)(split_actions + actions_n);
4358         /*
4359          * If tag action is not set to void(it means we are not the meter
4360          * suffix flow), add the tag action. Since meter suffix flow already
4361          * has the tag added.
4362          */
4363         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4364                 /*
4365                  * Allocate the new subflow ID. This one is unique within
4366                  * device and not shared with representors. Otherwise,
4367                  * we would have to resolve multi-thread access synch
4368                  * issue. Each flow on the shared device is appended
4369                  * with source vport identifier, so the resulting
4370                  * flows will be unique in the shared (by master and
4371                  * representors) domain even if they have coinciding
4372                  * IDs.
4373                  */
4374                 mlx5_ipool_malloc(priv->sh->ipool
4375                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4376                 if (!flow_id)
4377                         return rte_flow_error_set(error, ENOMEM,
4378                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4379                                                   NULL, "can't allocate id "
4380                                                   "for split Q/RSS subflow");
4381                 /* Internal SET_TAG action to set flow ID. */
4382                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4383                         .data = flow_id,
4384                 };
4385                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4386                 if (ret < 0)
4387                         return ret;
4388                 set_tag->id = ret;
4389                 /* Construct new actions array. */
4390                 /* Replace QUEUE/RSS action. */
4391                 split_actions[qrss_idx] = (struct rte_flow_action){
4392                         .type = (enum rte_flow_action_type)
4393                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4394                         .conf = set_tag,
4395                 };
4396         }
4397         /* JUMP action to jump to mreg copy table (CP_TBL). */
4398         jump = (void *)(set_tag + 1);
4399         *jump = (struct rte_flow_action_jump){
4400                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4401         };
4402         split_actions[actions_n - 2] = (struct rte_flow_action){
4403                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4404                 .conf = jump,
4405         };
4406         split_actions[actions_n - 1] = (struct rte_flow_action){
4407                 .type = RTE_FLOW_ACTION_TYPE_END,
4408         };
4409         return flow_id;
4410 }
4411
4412 /**
4413  * Extend the given action list for Tx metadata copy.
4414  *
4415  * Copy the given action list to the ext_actions and add flow metadata register
4416  * copy action in order to copy reg_a set by WQE to reg_c[0].
4417  *
4418  * @param[out] ext_actions
4419  *   Pointer to the extended action list.
4420  * @param[in] actions
4421  *   Pointer to the list of actions.
4422  * @param[in] actions_n
4423  *   Number of actions in the list.
4424  * @param[out] error
4425  *   Perform verbose error reporting if not NULL.
4426  * @param[in] encap_idx
4427  *   The encap action inndex.
4428  *
4429  * @return
4430  *   0 on success, negative value otherwise
4431  */
4432 static int
4433 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4434                        struct rte_flow_action *ext_actions,
4435                        const struct rte_flow_action *actions,
4436                        int actions_n, struct rte_flow_error *error,
4437                        int encap_idx)
4438 {
4439         struct mlx5_flow_action_copy_mreg *cp_mreg =
4440                 (struct mlx5_flow_action_copy_mreg *)
4441                         (ext_actions + actions_n + 1);
4442         int ret;
4443
4444         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4445         if (ret < 0)
4446                 return ret;
4447         cp_mreg->dst = ret;
4448         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4449         if (ret < 0)
4450                 return ret;
4451         cp_mreg->src = ret;
4452         if (encap_idx != 0)
4453                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4454         if (encap_idx == actions_n - 1) {
4455                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4456                         .type = (enum rte_flow_action_type)
4457                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4458                         .conf = cp_mreg,
4459                 };
4460                 ext_actions[actions_n] = (struct rte_flow_action){
4461                         .type = RTE_FLOW_ACTION_TYPE_END,
4462                 };
4463         } else {
4464                 ext_actions[encap_idx] = (struct rte_flow_action){
4465                         .type = (enum rte_flow_action_type)
4466                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4467                         .conf = cp_mreg,
4468                 };
4469                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4470                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4471         }
4472         return 0;
4473 }
4474
4475 /**
4476  * Check the match action from the action list.
4477  *
4478  * @param[in] actions
4479  *   Pointer to the list of actions.
4480  * @param[in] attr
4481  *   Flow rule attributes.
4482  * @param[in] action
4483  *   The action to be check if exist.
4484  * @param[out] match_action_pos
4485  *   Pointer to the position of the matched action if exists, otherwise is -1.
4486  * @param[out] qrss_action_pos
4487  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4488  *
4489  * @return
4490  *   > 0 the total number of actions.
4491  *   0 if not found match action in action list.
4492  */
4493 static int
4494 flow_check_match_action(const struct rte_flow_action actions[],
4495                         const struct rte_flow_attr *attr,
4496                         enum rte_flow_action_type action,
4497                         int *match_action_pos, int *qrss_action_pos)
4498 {
4499         const struct rte_flow_action_sample *sample;
4500         int actions_n = 0;
4501         int jump_flag = 0;
4502         uint32_t ratio = 0;
4503         int sub_type = 0;
4504         int flag = 0;
4505
4506         *match_action_pos = -1;
4507         *qrss_action_pos = -1;
4508         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4509                 if (actions->type == action) {
4510                         flag = 1;
4511                         *match_action_pos = actions_n;
4512                 }
4513                 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE ||
4514                     actions->type == RTE_FLOW_ACTION_TYPE_RSS)
4515                         *qrss_action_pos = actions_n;
4516                 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP)
4517                         jump_flag = 1;
4518                 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) {
4519                         sample = actions->conf;
4520                         ratio = sample->ratio;
4521                         sub_type = ((const struct rte_flow_action *)
4522                                         (sample->actions))->type;
4523                 }
4524                 actions_n++;
4525         }
4526         if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) {
4527                 if (ratio == 1) {
4528                         /* JUMP Action not support for Mirroring;
4529                          * Mirroring support multi-destination;
4530                          */
4531                         if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END)
4532                                 flag = 0;
4533                 }
4534         }
4535         /* Count RTE_FLOW_ACTION_TYPE_END. */
4536         return flag ? actions_n + 1 : 0;
4537 }
4538
4539 #define SAMPLE_SUFFIX_ITEM 2
4540
4541 /**
4542  * Split the sample flow.
4543  *
4544  * As sample flow will split to two sub flow, sample flow with
4545  * sample action, the other actions will move to new suffix flow.
4546  *
4547  * Also add unique tag id with tag action in the sample flow,
4548  * the same tag id will be as match in the suffix flow.
4549  *
4550  * @param dev
4551  *   Pointer to Ethernet device.
4552  * @param[in] fdb_tx
4553  *   FDB egress flow flag.
4554  * @param[out] sfx_items
4555  *   Suffix flow match items (list terminated by the END pattern item).
4556  * @param[in] actions
4557  *   Associated actions (list terminated by the END action).
4558  * @param[out] actions_sfx
4559  *   Suffix flow actions.
4560  * @param[out] actions_pre
4561  *   Prefix flow actions.
4562  * @param[in] actions_n
4563  *  The total number of actions.
4564  * @param[in] sample_action_pos
4565  *   The sample action position.
4566  * @param[in] qrss_action_pos
4567  *   The Queue/RSS action position.
4568  * @param[out] error
4569  *   Perform verbose error reporting if not NULL.
4570  *
4571  * @return
4572  *   0 on success, or unique flow_id, a negative errno value
4573  *   otherwise and rte_errno is set.
4574  */
4575 static int
4576 flow_sample_split_prep(struct rte_eth_dev *dev,
4577                        uint32_t fdb_tx,
4578                        struct rte_flow_item sfx_items[],
4579                        const struct rte_flow_action actions[],
4580                        struct rte_flow_action actions_sfx[],
4581                        struct rte_flow_action actions_pre[],
4582                        int actions_n,
4583                        int sample_action_pos,
4584                        int qrss_action_pos,
4585                        struct rte_flow_error *error)
4586 {
4587         struct mlx5_priv *priv = dev->data->dev_private;
4588         struct mlx5_rte_flow_action_set_tag *set_tag;
4589         struct mlx5_rte_flow_item_tag *tag_spec;
4590         struct mlx5_rte_flow_item_tag *tag_mask;
4591         uint32_t tag_id = 0;
4592         int index;
4593         int ret;
4594
4595         if (sample_action_pos < 0)
4596                 return rte_flow_error_set(error, EINVAL,
4597                                           RTE_FLOW_ERROR_TYPE_ACTION,
4598                                           NULL, "invalid position of sample "
4599                                           "action in list");
4600         if (!fdb_tx) {
4601                 /* Prepare the prefix tag action. */
4602                 set_tag = (void *)(actions_pre + actions_n + 1);
4603                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4604                 if (ret < 0)
4605                         return ret;
4606                 set_tag->id = ret;
4607                 mlx5_ipool_malloc(priv->sh->ipool
4608                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
4609                 set_tag->data = tag_id;
4610                 /* Prepare the suffix subflow items. */
4611                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4612                 tag_spec->data = tag_id;
4613                 tag_spec->id = set_tag->id;
4614                 tag_mask = tag_spec + 1;
4615                 tag_mask->data = UINT32_MAX;
4616                 sfx_items[0] = (struct rte_flow_item){
4617                         .type = (enum rte_flow_item_type)
4618                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4619                         .spec = tag_spec,
4620                         .last = NULL,
4621                         .mask = tag_mask,
4622                 };
4623                 sfx_items[1] = (struct rte_flow_item){
4624                         .type = (enum rte_flow_item_type)
4625                                 RTE_FLOW_ITEM_TYPE_END,
4626                 };
4627         }
4628         /* Prepare the actions for prefix and suffix flow. */
4629         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4630                 index = qrss_action_pos;
4631                 /* Put the preceding the Queue/RSS action into prefix flow. */
4632                 if (index != 0)
4633                         memcpy(actions_pre, actions,
4634                                sizeof(struct rte_flow_action) * index);
4635                 /* Put others preceding the sample action into prefix flow. */
4636                 if (sample_action_pos > index + 1)
4637                         memcpy(actions_pre + index, actions + index + 1,
4638                                sizeof(struct rte_flow_action) *
4639                                (sample_action_pos - index - 1));
4640                 index = sample_action_pos - 1;
4641                 /* Put Queue/RSS action into Suffix flow. */
4642                 memcpy(actions_sfx, actions + qrss_action_pos,
4643                        sizeof(struct rte_flow_action));
4644                 actions_sfx++;
4645         } else {
4646                 index = sample_action_pos;
4647                 if (index != 0)
4648                         memcpy(actions_pre, actions,
4649                                sizeof(struct rte_flow_action) * index);
4650         }
4651         /* Add the extra tag action for NIC-RX and E-Switch ingress. */
4652         if (!fdb_tx) {
4653                 actions_pre[index++] =
4654                         (struct rte_flow_action){
4655                         .type = (enum rte_flow_action_type)
4656                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4657                         .conf = set_tag,
4658                 };
4659         }
4660         memcpy(actions_pre + index, actions + sample_action_pos,
4661                sizeof(struct rte_flow_action));
4662         index += 1;
4663         actions_pre[index] = (struct rte_flow_action){
4664                 .type = (enum rte_flow_action_type)
4665                         RTE_FLOW_ACTION_TYPE_END,
4666         };
4667         /* Put the actions after sample into Suffix flow. */
4668         memcpy(actions_sfx, actions + sample_action_pos + 1,
4669                sizeof(struct rte_flow_action) *
4670                (actions_n - sample_action_pos - 1));
4671         return tag_id;
4672 }
4673
4674 /**
4675  * The splitting for metadata feature.
4676  *
4677  * - Q/RSS action on NIC Rx should be split in order to pass by
4678  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4679  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4680  *
4681  * - All the actions on NIC Tx should have a mreg copy action to
4682  *   copy reg_a from WQE to reg_c[0].
4683  *
4684  * @param dev
4685  *   Pointer to Ethernet device.
4686  * @param[in] flow
4687  *   Parent flow structure pointer.
4688  * @param[in] attr
4689  *   Flow rule attributes.
4690  * @param[in] items
4691  *   Pattern specification (list terminated by the END pattern item).
4692  * @param[in] actions
4693  *   Associated actions (list terminated by the END action).
4694  * @param[in] flow_split_info
4695  *   Pointer to flow split info structure.
4696  * @param[out] error
4697  *   Perform verbose error reporting if not NULL.
4698  * @return
4699  *   0 on success, negative value otherwise
4700  */
4701 static int
4702 flow_create_split_metadata(struct rte_eth_dev *dev,
4703                            struct rte_flow *flow,
4704                            const struct rte_flow_attr *attr,
4705                            const struct rte_flow_item items[],
4706                            const struct rte_flow_action actions[],
4707                            struct mlx5_flow_split_info *flow_split_info,
4708                            struct rte_flow_error *error)
4709 {
4710         struct mlx5_priv *priv = dev->data->dev_private;
4711         struct mlx5_dev_config *config = &priv->config;
4712         const struct rte_flow_action *qrss = NULL;
4713         struct rte_flow_action *ext_actions = NULL;
4714         struct mlx5_flow *dev_flow = NULL;
4715         uint32_t qrss_id = 0;
4716         int mtr_sfx = 0;
4717         size_t act_size;
4718         int actions_n;
4719         int encap_idx;
4720         int ret;
4721
4722         /* Check whether extensive metadata feature is engaged. */
4723         if (!config->dv_flow_en ||
4724             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4725             !mlx5_flow_ext_mreg_supported(dev))
4726                 return flow_create_split_inner(dev, flow, NULL, attr, items,
4727                                                actions, flow_split_info, error);
4728         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
4729                                                            &encap_idx);
4730         if (qrss) {
4731                 /* Exclude hairpin flows from splitting. */
4732                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
4733                         const struct rte_flow_action_queue *queue;
4734
4735                         queue = qrss->conf;
4736                         if (mlx5_rxq_get_type(dev, queue->index) ==
4737                             MLX5_RXQ_TYPE_HAIRPIN)
4738                                 qrss = NULL;
4739                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
4740                         const struct rte_flow_action_rss *rss;
4741
4742                         rss = qrss->conf;
4743                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
4744                             MLX5_RXQ_TYPE_HAIRPIN)
4745                                 qrss = NULL;
4746                 }
4747         }
4748         if (qrss) {
4749                 /* Check if it is in meter suffix table. */
4750                 mtr_sfx = attr->group == (attr->transfer ?
4751                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4752                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
4753                 /*
4754                  * Q/RSS action on NIC Rx should be split in order to pass by
4755                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
4756                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
4757                  */
4758                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4759                            sizeof(struct rte_flow_action_set_tag) +
4760                            sizeof(struct rte_flow_action_jump);
4761                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4762                                           SOCKET_ID_ANY);
4763                 if (!ext_actions)
4764                         return rte_flow_error_set(error, ENOMEM,
4765                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4766                                                   NULL, "no memory to split "
4767                                                   "metadata flow");
4768                 /*
4769                  * If we are the suffix flow of meter, tag already exist.
4770                  * Set the tag action to void.
4771                  */
4772                 if (mtr_sfx)
4773                         ext_actions[qrss - actions].type =
4774                                                 RTE_FLOW_ACTION_TYPE_VOID;
4775                 else
4776                         ext_actions[qrss - actions].type =
4777                                                 (enum rte_flow_action_type)
4778                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4779                 /*
4780                  * Create the new actions list with removed Q/RSS action
4781                  * and appended set tag and jump to register copy table
4782                  * (RX_CP_TBL). We should preallocate unique tag ID here
4783                  * in advance, because it is needed for set tag action.
4784                  */
4785                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
4786                                                     qrss, actions_n, error);
4787                 if (!mtr_sfx && !qrss_id) {
4788                         ret = -rte_errno;
4789                         goto exit;
4790                 }
4791         } else if (attr->egress && !attr->transfer) {
4792                 /*
4793                  * All the actions on NIC Tx should have a metadata register
4794                  * copy action to copy reg_a from WQE to reg_c[meta]
4795                  */
4796                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4797                            sizeof(struct mlx5_flow_action_copy_mreg);
4798                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4799                                           SOCKET_ID_ANY);
4800                 if (!ext_actions)
4801                         return rte_flow_error_set(error, ENOMEM,
4802                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4803                                                   NULL, "no memory to split "
4804                                                   "metadata flow");
4805                 /* Create the action list appended with copy register. */
4806                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
4807                                              actions_n, error, encap_idx);
4808                 if (ret < 0)
4809                         goto exit;
4810         }
4811         /* Add the unmodified original or prefix subflow. */
4812         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
4813                                       items, ext_actions ? ext_actions :
4814                                       actions, flow_split_info, error);
4815         if (ret < 0)
4816                 goto exit;
4817         MLX5_ASSERT(dev_flow);
4818         if (qrss) {
4819                 const struct rte_flow_attr q_attr = {
4820                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4821                         .ingress = 1,
4822                 };
4823                 /* Internal PMD action to set register. */
4824                 struct mlx5_rte_flow_item_tag q_tag_spec = {
4825                         .data = qrss_id,
4826                         .id = REG_NON,
4827                 };
4828                 struct rte_flow_item q_items[] = {
4829                         {
4830                                 .type = (enum rte_flow_item_type)
4831                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4832                                 .spec = &q_tag_spec,
4833                                 .last = NULL,
4834                                 .mask = NULL,
4835                         },
4836                         {
4837                                 .type = RTE_FLOW_ITEM_TYPE_END,
4838                         },
4839                 };
4840                 struct rte_flow_action q_actions[] = {
4841                         {
4842                                 .type = qrss->type,
4843                                 .conf = qrss->conf,
4844                         },
4845                         {
4846                                 .type = RTE_FLOW_ACTION_TYPE_END,
4847                         },
4848                 };
4849                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
4850
4851                 /*
4852                  * Configure the tag item only if there is no meter subflow.
4853                  * Since tag is already marked in the meter suffix subflow
4854                  * we can just use the meter suffix items as is.
4855                  */
4856                 if (qrss_id) {
4857                         /* Not meter subflow. */
4858                         MLX5_ASSERT(!mtr_sfx);
4859                         /*
4860                          * Put unique id in prefix flow due to it is destroyed
4861                          * after suffix flow and id will be freed after there
4862                          * is no actual flows with this id and identifier
4863                          * reallocation becomes possible (for example, for
4864                          * other flows in other threads).
4865                          */
4866                         dev_flow->handle->split_flow_id = qrss_id;
4867                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
4868                                                    error);
4869                         if (ret < 0)
4870                                 goto exit;
4871                         q_tag_spec.id = ret;
4872                 }
4873                 dev_flow = NULL;
4874                 /* Add suffix subflow to execute Q/RSS. */
4875                 flow_split_info->prefix_layers = layers;
4876                 flow_split_info->prefix_mark = 0;
4877                 ret = flow_create_split_inner(dev, flow, &dev_flow,
4878                                               &q_attr, mtr_sfx ? items :
4879                                               q_items, q_actions,
4880                                               flow_split_info, error);
4881                 if (ret < 0)
4882                         goto exit;
4883                 /* qrss ID should be freed if failed. */
4884                 qrss_id = 0;
4885                 MLX5_ASSERT(dev_flow);
4886         }
4887
4888 exit:
4889         /*
4890          * We do not destroy the partially created sub_flows in case of error.
4891          * These ones are included into parent flow list and will be destroyed
4892          * by flow_drv_destroy.
4893          */
4894         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4895                         qrss_id);
4896         mlx5_free(ext_actions);
4897         return ret;
4898 }
4899
4900 /**
4901  * The splitting for meter feature.
4902  *
4903  * - The meter flow will be split to two flows as prefix and
4904  *   suffix flow. The packets make sense only it pass the prefix
4905  *   meter action.
4906  *
4907  * - Reg_C_5 is used for the packet to match betweend prefix and
4908  *   suffix flow.
4909  *
4910  * @param dev
4911  *   Pointer to Ethernet device.
4912  * @param[in] flow
4913  *   Parent flow structure pointer.
4914  * @param[in] attr
4915  *   Flow rule attributes.
4916  * @param[in] items
4917  *   Pattern specification (list terminated by the END pattern item).
4918  * @param[in] actions
4919  *   Associated actions (list terminated by the END action).
4920  * @param[in] flow_split_info
4921  *   Pointer to flow split info structure.
4922  * @param[out] error
4923  *   Perform verbose error reporting if not NULL.
4924  * @return
4925  *   0 on success, negative value otherwise
4926  */
4927 static int
4928 flow_create_split_meter(struct rte_eth_dev *dev,
4929                         struct rte_flow *flow,
4930                         const struct rte_flow_attr *attr,
4931                         const struct rte_flow_item items[],
4932                         const struct rte_flow_action actions[],
4933                         struct mlx5_flow_split_info *flow_split_info,
4934                         struct rte_flow_error *error)
4935 {
4936         struct mlx5_priv *priv = dev->data->dev_private;
4937         struct rte_flow_action *sfx_actions = NULL;
4938         struct rte_flow_action *pre_actions = NULL;
4939         struct rte_flow_item *sfx_items = NULL;
4940         struct mlx5_flow *dev_flow = NULL;
4941         struct rte_flow_attr sfx_attr = *attr;
4942         uint32_t mtr = 0;
4943         uint32_t mtr_tag_id = 0;
4944         size_t act_size;
4945         size_t item_size;
4946         int actions_n = 0;
4947         int ret;
4948
4949         if (priv->mtr_en)
4950                 actions_n = flow_check_meter_action(actions, &mtr);
4951         if (mtr) {
4952                 /* The five prefix actions: meter, decap, encap, tag, end. */
4953                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
4954                            sizeof(struct mlx5_rte_flow_action_set_tag);
4955                 /* tag, vlan, port id, end. */
4956 #define METER_SUFFIX_ITEM 4
4957                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
4958                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
4959                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
4960                                           0, SOCKET_ID_ANY);
4961                 if (!sfx_actions)
4962                         return rte_flow_error_set(error, ENOMEM,
4963                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4964                                                   NULL, "no memory to split "
4965                                                   "meter flow");
4966                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
4967                              act_size);
4968                 pre_actions = sfx_actions + actions_n;
4969                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
4970                                                    actions, sfx_actions,
4971                                                    pre_actions);
4972                 if (!mtr_tag_id) {
4973                         ret = -rte_errno;
4974                         goto exit;
4975                 }
4976                 /* Add the prefix subflow. */
4977                 flow_split_info->prefix_mark = 0;
4978                 ret = flow_create_split_inner(dev, flow, &dev_flow,
4979                                               attr, items, pre_actions,
4980                                               flow_split_info, error);
4981                 if (ret) {
4982                         ret = -rte_errno;
4983                         goto exit;
4984                 }
4985                 dev_flow->handle->split_flow_id = mtr_tag_id;
4986                 /* Setting the sfx group atrr. */
4987                 sfx_attr.group = sfx_attr.transfer ?
4988                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4989                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4990                 flow_split_info->prefix_layers =
4991                                 flow_get_prefix_layer_flags(dev_flow);
4992                 flow_split_info->prefix_mark = dev_flow->handle->mark;
4993         }
4994         /* Add the prefix subflow. */
4995         ret = flow_create_split_metadata(dev, flow,
4996                                          &sfx_attr, sfx_items ?
4997                                          sfx_items : items,
4998                                          sfx_actions ? sfx_actions : actions,
4999                                          flow_split_info, error);
5000 exit:
5001         if (sfx_actions)
5002                 mlx5_free(sfx_actions);
5003         return ret;
5004 }
5005
5006 /**
5007  * The splitting for sample feature.
5008  *
5009  * Once Sample action is detected in the action list, the flow actions should
5010  * be split into prefix sub flow and suffix sub flow.
5011  *
5012  * The original items remain in the prefix sub flow, all actions preceding the
5013  * sample action and the sample action itself will be copied to the prefix
5014  * sub flow, the actions following the sample action will be copied to the
5015  * suffix sub flow, Queue action always be located in the suffix sub flow.
5016  *
5017  * In order to make the packet from prefix sub flow matches with suffix sub
5018  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5019  * flow uses tag item with the unique flow id.
5020  *
5021  * @param dev
5022  *   Pointer to Ethernet device.
5023  * @param[in] flow
5024  *   Parent flow structure pointer.
5025  * @param[in] attr
5026  *   Flow rule attributes.
5027  * @param[in] items
5028  *   Pattern specification (list terminated by the END pattern item).
5029  * @param[in] actions
5030  *   Associated actions (list terminated by the END action).
5031  * @param[in] flow_split_info
5032  *   Pointer to flow split info structure.
5033  * @param[out] error
5034  *   Perform verbose error reporting if not NULL.
5035  * @return
5036  *   0 on success, negative value otherwise
5037  */
5038 static int
5039 flow_create_split_sample(struct rte_eth_dev *dev,
5040                          struct rte_flow *flow,
5041                          const struct rte_flow_attr *attr,
5042                          const struct rte_flow_item items[],
5043                          const struct rte_flow_action actions[],
5044                          struct mlx5_flow_split_info *flow_split_info,
5045                          struct rte_flow_error *error)
5046 {
5047         struct mlx5_priv *priv = dev->data->dev_private;
5048         struct rte_flow_action *sfx_actions = NULL;
5049         struct rte_flow_action *pre_actions = NULL;
5050         struct rte_flow_item *sfx_items = NULL;
5051         struct mlx5_flow *dev_flow = NULL;
5052         struct rte_flow_attr sfx_attr = *attr;
5053 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5054         struct mlx5_flow_dv_sample_resource *sample_res;
5055         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5056         struct mlx5_flow_tbl_resource *sfx_tbl;
5057 #endif
5058         size_t act_size;
5059         size_t item_size;
5060         uint32_t fdb_tx = 0;
5061         int32_t tag_id = 0;
5062         int actions_n = 0;
5063         int sample_action_pos;
5064         int qrss_action_pos;
5065         int ret = 0;
5066
5067         if (priv->sampler_en)
5068                 actions_n = flow_check_match_action(actions, attr,
5069                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5070                                         &sample_action_pos, &qrss_action_pos);
5071         if (actions_n) {
5072                 /* The prefix actions must includes sample, tag, end. */
5073                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5074                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5075                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5076                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5077                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5078                                           item_size), 0, SOCKET_ID_ANY);
5079                 if (!sfx_actions)
5080                         return rte_flow_error_set(error, ENOMEM,
5081                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5082                                                   NULL, "no memory to split "
5083                                                   "sample flow");
5084                 /* The representor_id is -1 for uplink. */
5085                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5086                 if (!fdb_tx)
5087                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5088                                         + act_size);
5089                 pre_actions = sfx_actions + actions_n;
5090                 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items,
5091                                                 actions, sfx_actions,
5092                                                 pre_actions, actions_n,
5093                                                 sample_action_pos,
5094                                                 qrss_action_pos, error);
5095                 if (tag_id < 0 || (!fdb_tx && !tag_id)) {
5096                         ret = -rte_errno;
5097                         goto exit;
5098                 }
5099                 /* Add the prefix subflow. */
5100                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5101                                               items, pre_actions,
5102                                               flow_split_info, error);
5103                 if (ret) {
5104                         ret = -rte_errno;
5105                         goto exit;
5106                 }
5107                 dev_flow->handle->split_flow_id = tag_id;
5108 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5109                 /* Set the sfx group attr. */
5110                 sample_res = (struct mlx5_flow_dv_sample_resource *)
5111                                         dev_flow->dv.sample_res;
5112                 sfx_tbl = (struct mlx5_flow_tbl_resource *)
5113                                         sample_res->normal_path_tbl;
5114                 sfx_tbl_data = container_of(sfx_tbl,
5115                                         struct mlx5_flow_tbl_data_entry, tbl);
5116                 sfx_attr.group = sfx_attr.transfer ?
5117                                         (sfx_tbl_data->table_id - 1) :
5118                                          sfx_tbl_data->table_id;
5119                 flow_split_info->prefix_layers =
5120                                 flow_get_prefix_layer_flags(dev_flow);
5121                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5122                 /* Suffix group level already be scaled with factor, set
5123                  * skip_scale to 1 to avoid scale again in translation.
5124                  */
5125                 flow_split_info->skip_scale = 1;
5126 #endif
5127         }
5128         /* Add the suffix subflow. */
5129         ret = flow_create_split_meter(dev, flow, &sfx_attr,
5130                                       sfx_items ? sfx_items : items,
5131                                       sfx_actions ? sfx_actions : actions,
5132                                       flow_split_info, error);
5133 exit:
5134         if (sfx_actions)
5135                 mlx5_free(sfx_actions);
5136         return ret;
5137 }
5138
5139 /**
5140  * Split the flow to subflow set. The splitters might be linked
5141  * in the chain, like this:
5142  * flow_create_split_outer() calls:
5143  *   flow_create_split_meter() calls:
5144  *     flow_create_split_metadata(meter_subflow_0) calls:
5145  *       flow_create_split_inner(metadata_subflow_0)
5146  *       flow_create_split_inner(metadata_subflow_1)
5147  *       flow_create_split_inner(metadata_subflow_2)
5148  *     flow_create_split_metadata(meter_subflow_1) calls:
5149  *       flow_create_split_inner(metadata_subflow_0)
5150  *       flow_create_split_inner(metadata_subflow_1)
5151  *       flow_create_split_inner(metadata_subflow_2)
5152  *
5153  * This provide flexible way to add new levels of flow splitting.
5154  * The all of successfully created subflows are included to the
5155  * parent flow dev_flow list.
5156  *
5157  * @param dev
5158  *   Pointer to Ethernet device.
5159  * @param[in] flow
5160  *   Parent flow structure pointer.
5161  * @param[in] attr
5162  *   Flow rule attributes.
5163  * @param[in] items
5164  *   Pattern specification (list terminated by the END pattern item).
5165  * @param[in] actions
5166  *   Associated actions (list terminated by the END action).
5167  * @param[in] flow_split_info
5168  *   Pointer to flow split info structure.
5169  * @param[out] error
5170  *   Perform verbose error reporting if not NULL.
5171  * @return
5172  *   0 on success, negative value otherwise
5173  */
5174 static int
5175 flow_create_split_outer(struct rte_eth_dev *dev,
5176                         struct rte_flow *flow,
5177                         const struct rte_flow_attr *attr,
5178                         const struct rte_flow_item items[],
5179                         const struct rte_flow_action actions[],
5180                         struct mlx5_flow_split_info *flow_split_info,
5181                         struct rte_flow_error *error)
5182 {
5183         int ret;
5184
5185         ret = flow_create_split_sample(dev, flow, attr, items,
5186                                        actions, flow_split_info, error);
5187         MLX5_ASSERT(ret <= 0);
5188         return ret;
5189 }
5190
5191 static struct mlx5_flow_tunnel *
5192 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5193                       const struct rte_flow_attr *attr,
5194                       const struct rte_flow_item items[],
5195                       const struct rte_flow_action actions[])
5196 {
5197         struct mlx5_flow_tunnel *tunnel;
5198
5199 #pragma GCC diagnostic push
5200 #pragma GCC diagnostic ignored "-Wcast-qual"
5201         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5202                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5203         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5204                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5205         else
5206                 tunnel = NULL;
5207 #pragma GCC diagnostic pop
5208
5209         return tunnel;
5210 }
5211
5212 /**
5213  * Adjust flow RSS workspace if needed.
5214  *
5215  * @param wks
5216  *   Pointer to thread flow work space.
5217  * @param rss_desc
5218  *   Pointer to RSS descriptor.
5219  * @param[in] nrssq_num
5220  *   New RSS queue number.
5221  *
5222  * @return
5223  *   0 on success, -1 otherwise and rte_errno is set.
5224  */
5225 static int
5226 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5227                           struct mlx5_flow_rss_desc *rss_desc,
5228                           uint32_t nrssq_num)
5229 {
5230         if (likely(nrssq_num <= wks->rssq_num))
5231                 return 0;
5232         rss_desc->queue = realloc(rss_desc->queue,
5233                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
5234         if (!rss_desc->queue) {
5235                 rte_errno = ENOMEM;
5236                 return -1;
5237         }
5238         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
5239         return 0;
5240 }
5241
5242 /**
5243  * Create a flow and add it to @p list.
5244  *
5245  * @param dev
5246  *   Pointer to Ethernet device.
5247  * @param list
5248  *   Pointer to a TAILQ flow list. If this parameter NULL,
5249  *   no list insertion occurred, flow is just created,
5250  *   this is caller's responsibility to track the
5251  *   created flow.
5252  * @param[in] attr
5253  *   Flow rule attributes.
5254  * @param[in] items
5255  *   Pattern specification (list terminated by the END pattern item).
5256  * @param[in] actions
5257  *   Associated actions (list terminated by the END action).
5258  * @param[in] external
5259  *   This flow rule is created by request external to PMD.
5260  * @param[out] error
5261  *   Perform verbose error reporting if not NULL.
5262  *
5263  * @return
5264  *   A flow index on success, 0 otherwise and rte_errno is set.
5265  */
5266 static uint32_t
5267 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5268                  const struct rte_flow_attr *attr,
5269                  const struct rte_flow_item items[],
5270                  const struct rte_flow_action original_actions[],
5271                  bool external, struct rte_flow_error *error)
5272 {
5273         struct mlx5_priv *priv = dev->data->dev_private;
5274         struct rte_flow *flow = NULL;
5275         struct mlx5_flow *dev_flow;
5276         const struct rte_flow_action_rss *rss;
5277         struct mlx5_translated_shared_action
5278                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5279         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5280         union {
5281                 struct mlx5_flow_expand_rss buf;
5282                 uint8_t buffer[2048];
5283         } expand_buffer;
5284         union {
5285                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5286                 uint8_t buffer[2048];
5287         } actions_rx;
5288         union {
5289                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5290                 uint8_t buffer[2048];
5291         } actions_hairpin_tx;
5292         union {
5293                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5294                 uint8_t buffer[2048];
5295         } items_tx;
5296         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5297         struct mlx5_flow_rss_desc *rss_desc;
5298         const struct rte_flow_action *p_actions_rx;
5299         uint32_t i;
5300         uint32_t idx = 0;
5301         int hairpin_flow;
5302         struct rte_flow_attr attr_tx = { .priority = 0 };
5303         const struct rte_flow_action *actions;
5304         struct rte_flow_action *translated_actions = NULL;
5305         struct mlx5_flow_tunnel *tunnel;
5306         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5307         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
5308         struct mlx5_flow_split_info flow_split_info = {
5309                 .external = !!external,
5310                 .skip_scale = 0,
5311                 .flow_idx = 0,
5312                 .prefix_mark = 0,
5313                 .prefix_layers = 0
5314         };
5315         int ret;
5316
5317         MLX5_ASSERT(wks);
5318         rss_desc = &wks->rss_desc;
5319         ret = flow_shared_actions_translate(dev, original_actions,
5320                                             shared_actions,
5321                                             &shared_actions_n,
5322                                             &translated_actions, error);
5323         if (ret < 0) {
5324                 MLX5_ASSERT(translated_actions == NULL);
5325                 return 0;
5326         }
5327         actions = translated_actions ? translated_actions : original_actions;
5328         p_actions_rx = actions;
5329         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5330         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
5331                                 external, hairpin_flow, error);
5332         if (ret < 0)
5333                 goto error_before_hairpin_split;
5334         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5335         if (!flow) {
5336                 rte_errno = ENOMEM;
5337                 goto error_before_hairpin_split;
5338         }
5339         if (hairpin_flow > 0) {
5340                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5341                         rte_errno = EINVAL;
5342                         goto error_before_hairpin_split;
5343                 }
5344                 flow_hairpin_split(dev, actions, actions_rx.actions,
5345                                    actions_hairpin_tx.actions, items_tx.items,
5346                                    idx);
5347                 p_actions_rx = actions_rx.actions;
5348         }
5349         flow_split_info.flow_idx = idx;
5350         flow->drv_type = flow_get_drv_type(dev, attr);
5351         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5352                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5353         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5354         rss = flow_get_rss_action(p_actions_rx);
5355         if (rss) {
5356                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5357                         return 0;
5358                 /*
5359                  * The following information is required by
5360                  * mlx5_flow_hashfields_adjust() in advance.
5361                  */
5362                 rss_desc->level = rss->level;
5363                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5364                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5365         }
5366         flow->dev_handles = 0;
5367         if (rss && rss->types) {
5368                 unsigned int graph_root;
5369
5370                 graph_root = find_graph_root(items, rss->level);
5371                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5372                                            items, rss->types,
5373                                            mlx5_support_expansion, graph_root);
5374                 MLX5_ASSERT(ret > 0 &&
5375                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5376         } else {
5377                 buf->entries = 1;
5378                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5379         }
5380         rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
5381                                                       shared_actions_n);
5382         for (i = 0; i < buf->entries; ++i) {
5383                 /* Initialize flow split data. */
5384                 flow_split_info.prefix_layers = 0;
5385                 flow_split_info.prefix_mark = 0;
5386                 flow_split_info.skip_scale = 0;
5387                 /*
5388                  * The splitter may create multiple dev_flows,
5389                  * depending on configuration. In the simplest
5390                  * case it just creates unmodified original flow.
5391                  */
5392                 ret = flow_create_split_outer(dev, flow, attr,
5393                                               buf->entry[i].pattern,
5394                                               p_actions_rx, &flow_split_info,
5395                                               error);
5396                 if (ret < 0)
5397                         goto error;
5398                 if (is_flow_tunnel_steer_rule(dev, attr,
5399                                               buf->entry[i].pattern,
5400                                               p_actions_rx)) {
5401                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5402                                                            p_actions_rx,
5403                                                            idx,
5404                                                            &default_miss_ctx,
5405                                                            error);
5406                         if (ret < 0) {
5407                                 mlx5_free(default_miss_ctx.queue);
5408                                 goto error;
5409                         }
5410                 }
5411         }
5412         /* Create the tx flow. */
5413         if (hairpin_flow) {
5414                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5415                 attr_tx.ingress = 0;
5416                 attr_tx.egress = 1;
5417                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5418                                          actions_hairpin_tx.actions,
5419                                          idx, error);
5420                 if (!dev_flow)
5421                         goto error;
5422                 dev_flow->flow = flow;
5423                 dev_flow->external = 0;
5424                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5425                               dev_flow->handle, next);
5426                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5427                                          items_tx.items,
5428                                          actions_hairpin_tx.actions, error);
5429                 if (ret < 0)
5430                         goto error;
5431         }
5432         /*
5433          * Update the metadata register copy table. If extensive
5434          * metadata feature is enabled and registers are supported
5435          * we might create the extra rte_flow for each unique
5436          * MARK/FLAG action ID.
5437          *
5438          * The table is updated for ingress Flows only, because
5439          * the egress Flows belong to the different device and
5440          * copy table should be updated in peer NIC Rx domain.
5441          */
5442         if (attr->ingress &&
5443             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5444                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5445                 if (ret)
5446                         goto error;
5447         }
5448         /*
5449          * If the flow is external (from application) OR device is started,
5450          * OR mreg discover, then apply immediately.
5451          */
5452         if (external || dev->data->dev_started ||
5453             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
5454              attr->priority == MLX5_FLOW_PRIO_RSVD)) {
5455                 ret = flow_drv_apply(dev, flow, error);
5456                 if (ret < 0)
5457                         goto error;
5458         }
5459         if (list) {
5460                 rte_spinlock_lock(&priv->flow_list_lock);
5461                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5462                              flow, next);
5463                 rte_spinlock_unlock(&priv->flow_list_lock);
5464         }
5465         flow_rxq_flags_set(dev, flow);
5466         rte_free(translated_actions);
5467         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5468         if (tunnel) {
5469                 flow->tunnel = 1;
5470                 flow->tunnel_id = tunnel->tunnel_id;
5471                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5472                 mlx5_free(default_miss_ctx.queue);
5473         }
5474         mlx5_flow_pop_thread_workspace();
5475         return idx;
5476 error:
5477         MLX5_ASSERT(flow);
5478         ret = rte_errno; /* Save rte_errno before cleanup. */
5479         flow_mreg_del_copy_action(dev, flow);
5480         flow_drv_destroy(dev, flow);
5481         if (rss_desc->shared_rss)
5482                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
5483                         mlx5_ipool_get
5484                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
5485                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
5486         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5487         rte_errno = ret; /* Restore rte_errno. */
5488         ret = rte_errno;
5489         rte_errno = ret;
5490         mlx5_flow_pop_thread_workspace();
5491 error_before_hairpin_split:
5492         rte_free(translated_actions);
5493         return 0;
5494 }
5495
5496 /**
5497  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5498  * incoming packets to table 1.
5499  *
5500  * Other flow rules, requested for group n, will be created in
5501  * e-switch table n+1.
5502  * Jump action to e-switch group n will be created to group n+1.
5503  *
5504  * Used when working in switchdev mode, to utilise advantages of table 1
5505  * and above.
5506  *
5507  * @param dev
5508  *   Pointer to Ethernet device.
5509  *
5510  * @return
5511  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5512  */
5513 struct rte_flow *
5514 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5515 {
5516         const struct rte_flow_attr attr = {
5517                 .group = 0,
5518                 .priority = 0,
5519                 .ingress = 1,
5520                 .egress = 0,
5521                 .transfer = 1,
5522         };
5523         const struct rte_flow_item pattern = {
5524                 .type = RTE_FLOW_ITEM_TYPE_END,
5525         };
5526         struct rte_flow_action_jump jump = {
5527                 .group = 1,
5528         };
5529         const struct rte_flow_action actions[] = {
5530                 {
5531                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5532                         .conf = &jump,
5533                 },
5534                 {
5535                         .type = RTE_FLOW_ACTION_TYPE_END,
5536                 },
5537         };
5538         struct mlx5_priv *priv = dev->data->dev_private;
5539         struct rte_flow_error error;
5540
5541         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5542                                                    &attr, &pattern,
5543                                                    actions, false, &error);
5544 }
5545
5546 /**
5547  * Validate a flow supported by the NIC.
5548  *
5549  * @see rte_flow_validate()
5550  * @see rte_flow_ops
5551  */
5552 int
5553 mlx5_flow_validate(struct rte_eth_dev *dev,
5554                    const struct rte_flow_attr *attr,
5555                    const struct rte_flow_item items[],
5556                    const struct rte_flow_action original_actions[],
5557                    struct rte_flow_error *error)
5558 {
5559         int hairpin_flow;
5560         struct mlx5_translated_shared_action
5561                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5562         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5563         const struct rte_flow_action *actions;
5564         struct rte_flow_action *translated_actions = NULL;
5565         int ret = flow_shared_actions_translate(dev, original_actions,
5566                                                 shared_actions,
5567                                                 &shared_actions_n,
5568                                                 &translated_actions, error);
5569
5570         if (ret)
5571                 return ret;
5572         actions = translated_actions ? translated_actions : original_actions;
5573         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5574         ret = flow_drv_validate(dev, attr, items, actions,
5575                                 true, hairpin_flow, error);
5576         rte_free(translated_actions);
5577         return ret;
5578 }
5579
5580 /**
5581  * Create a flow.
5582  *
5583  * @see rte_flow_create()
5584  * @see rte_flow_ops
5585  */
5586 struct rte_flow *
5587 mlx5_flow_create(struct rte_eth_dev *dev,
5588                  const struct rte_flow_attr *attr,
5589                  const struct rte_flow_item items[],
5590                  const struct rte_flow_action actions[],
5591                  struct rte_flow_error *error)
5592 {
5593         struct mlx5_priv *priv = dev->data->dev_private;
5594
5595         /*
5596          * If the device is not started yet, it is not allowed to created a
5597          * flow from application. PMD default flows and traffic control flows
5598          * are not affected.
5599          */
5600         if (unlikely(!dev->data->dev_started)) {
5601                 DRV_LOG(DEBUG, "port %u is not started when "
5602                         "inserting a flow", dev->data->port_id);
5603                 rte_flow_error_set(error, ENODEV,
5604                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5605                                    NULL,
5606                                    "port not started");
5607                 return NULL;
5608         }
5609
5610         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5611                                   attr, items, actions, true, error);
5612 }
5613
5614 /**
5615  * Destroy a flow in a list.
5616  *
5617  * @param dev
5618  *   Pointer to Ethernet device.
5619  * @param list
5620  *   Pointer to the Indexed flow list. If this parameter NULL,
5621  *   there is no flow removal from the list. Be noted that as
5622  *   flow is add to the indexed list, memory of the indexed
5623  *   list points to maybe changed as flow destroyed.
5624  * @param[in] flow_idx
5625  *   Index of flow to destroy.
5626  */
5627 static void
5628 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5629                   uint32_t flow_idx)
5630 {
5631         struct mlx5_priv *priv = dev->data->dev_private;
5632         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5633                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5634
5635         if (!flow)
5636                 return;
5637         /*
5638          * Update RX queue flags only if port is started, otherwise it is
5639          * already clean.
5640          */
5641         if (dev->data->dev_started)
5642                 flow_rxq_flags_trim(dev, flow);
5643         flow_drv_destroy(dev, flow);
5644         if (list) {
5645                 rte_spinlock_lock(&priv->flow_list_lock);
5646                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5647                              flow_idx, flow, next);
5648                 rte_spinlock_unlock(&priv->flow_list_lock);
5649         }
5650         if (flow->tunnel) {
5651                 struct mlx5_flow_tunnel *tunnel;
5652
5653                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5654                 RTE_VERIFY(tunnel);
5655                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5656                         mlx5_flow_tunnel_free(dev, tunnel);
5657         }
5658         flow_mreg_del_copy_action(dev, flow);
5659         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5660 }
5661
5662 /**
5663  * Destroy all flows.
5664  *
5665  * @param dev
5666  *   Pointer to Ethernet device.
5667  * @param list
5668  *   Pointer to the Indexed flow list.
5669  * @param active
5670  *   If flushing is called avtively.
5671  */
5672 void
5673 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5674 {
5675         uint32_t num_flushed = 0;
5676
5677         while (*list) {
5678                 flow_list_destroy(dev, list, *list);
5679                 num_flushed++;
5680         }
5681         if (active) {
5682                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5683                         dev->data->port_id, num_flushed);
5684         }
5685 }
5686
5687 /**
5688  * Stop all default actions for flows.
5689  *
5690  * @param dev
5691  *   Pointer to Ethernet device.
5692  */
5693 void
5694 mlx5_flow_stop_default(struct rte_eth_dev *dev)
5695 {
5696         flow_mreg_del_default_copy_action(dev);
5697         flow_rxq_flags_clear(dev);
5698 }
5699
5700 /**
5701  * Start all default actions for flows.
5702  *
5703  * @param dev
5704  *   Pointer to Ethernet device.
5705  * @return
5706  *   0 on success, a negative errno value otherwise and rte_errno is set.
5707  */
5708 int
5709 mlx5_flow_start_default(struct rte_eth_dev *dev)
5710 {
5711         struct rte_flow_error error;
5712
5713         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
5714         return flow_mreg_add_default_copy_action(dev, &error);
5715 }
5716
5717 /**
5718  * Release key of thread specific flow workspace data.
5719  */
5720 void
5721 flow_release_workspace(void *data)
5722 {
5723         struct mlx5_flow_workspace *wks = data;
5724         struct mlx5_flow_workspace *next;
5725
5726         while (wks) {
5727                 next = wks->next;
5728                 free(wks->rss_desc.queue);
5729                 free(wks);
5730                 wks = next;
5731         }
5732 }
5733
5734 /**
5735  * Get thread specific current flow workspace.
5736  *
5737  * @return pointer to thread specific flow workspace data, NULL on error.
5738  */
5739 struct mlx5_flow_workspace*
5740 mlx5_flow_get_thread_workspace(void)
5741 {
5742         struct mlx5_flow_workspace *data;
5743
5744         data = mlx5_flow_os_get_specific_workspace();
5745         MLX5_ASSERT(data && data->inuse);
5746         if (!data || !data->inuse)
5747                 DRV_LOG(ERR, "flow workspace not initialized.");
5748         return data;
5749 }
5750
5751 /**
5752  * Allocate and init new flow workspace.
5753  *
5754  * @return pointer to flow workspace data, NULL on error.
5755  */
5756 static struct mlx5_flow_workspace*
5757 flow_alloc_thread_workspace(void)
5758 {
5759         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
5760
5761         if (!data) {
5762                 DRV_LOG(ERR, "Failed to allocate flow workspace "
5763                         "memory.");
5764                 return NULL;
5765         }
5766         data->rss_desc.queue = calloc(1,
5767                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
5768         if (!data->rss_desc.queue)
5769                 goto err;
5770         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
5771         return data;
5772 err:
5773         if (data->rss_desc.queue)
5774                 free(data->rss_desc.queue);
5775         free(data);
5776         return NULL;
5777 }
5778
5779 /**
5780  * Get new thread specific flow workspace.
5781  *
5782  * If current workspace inuse, create new one and set as current.
5783  *
5784  * @return pointer to thread specific flow workspace data, NULL on error.
5785  */
5786 static struct mlx5_flow_workspace*
5787 mlx5_flow_push_thread_workspace(void)
5788 {
5789         struct mlx5_flow_workspace *curr;
5790         struct mlx5_flow_workspace *data;
5791
5792         curr = mlx5_flow_os_get_specific_workspace();
5793         if (!curr) {
5794                 data = flow_alloc_thread_workspace();
5795                 if (!data)
5796                         return NULL;
5797         } else if (!curr->inuse) {
5798                 data = curr;
5799         } else if (curr->next) {
5800                 data = curr->next;
5801         } else {
5802                 data = flow_alloc_thread_workspace();
5803                 if (!data)
5804                         return NULL;
5805                 curr->next = data;
5806                 data->prev = curr;
5807         }
5808         data->inuse = 1;
5809         data->flow_idx = 0;
5810         /* Set as current workspace */
5811         if (mlx5_flow_os_set_specific_workspace(data))
5812                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
5813         return data;
5814 }
5815
5816 /**
5817  * Close current thread specific flow workspace.
5818  *
5819  * If previous workspace available, set it as current.
5820  *
5821  * @return pointer to thread specific flow workspace data, NULL on error.
5822  */
5823 static void
5824 mlx5_flow_pop_thread_workspace(void)
5825 {
5826         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
5827
5828         if (!data)
5829                 return;
5830         if (!data->inuse) {
5831                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
5832                 return;
5833         }
5834         data->inuse = 0;
5835         if (!data->prev)
5836                 return;
5837         if (mlx5_flow_os_set_specific_workspace(data->prev))
5838                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
5839 }
5840
5841 /**
5842  * Verify the flow list is empty
5843  *
5844  * @param dev
5845  *  Pointer to Ethernet device.
5846  *
5847  * @return the number of flows not released.
5848  */
5849 int
5850 mlx5_flow_verify(struct rte_eth_dev *dev)
5851 {
5852         struct mlx5_priv *priv = dev->data->dev_private;
5853         struct rte_flow *flow;
5854         uint32_t idx;
5855         int ret = 0;
5856
5857         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
5858                       flow, next) {
5859                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
5860                         dev->data->port_id, (void *)flow);
5861                 ++ret;
5862         }
5863         return ret;
5864 }
5865
5866 /**
5867  * Enable default hairpin egress flow.
5868  *
5869  * @param dev
5870  *   Pointer to Ethernet device.
5871  * @param queue
5872  *   The queue index.
5873  *
5874  * @return
5875  *   0 on success, a negative errno value otherwise and rte_errno is set.
5876  */
5877 int
5878 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
5879                             uint32_t queue)
5880 {
5881         struct mlx5_priv *priv = dev->data->dev_private;
5882         const struct rte_flow_attr attr = {
5883                 .egress = 1,
5884                 .priority = 0,
5885         };
5886         struct mlx5_rte_flow_item_tx_queue queue_spec = {
5887                 .queue = queue,
5888         };
5889         struct mlx5_rte_flow_item_tx_queue queue_mask = {
5890                 .queue = UINT32_MAX,
5891         };
5892         struct rte_flow_item items[] = {
5893                 {
5894                         .type = (enum rte_flow_item_type)
5895                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
5896                         .spec = &queue_spec,
5897                         .last = NULL,
5898                         .mask = &queue_mask,
5899                 },
5900                 {
5901                         .type = RTE_FLOW_ITEM_TYPE_END,
5902                 },
5903         };
5904         struct rte_flow_action_jump jump = {
5905                 .group = MLX5_HAIRPIN_TX_TABLE,
5906         };
5907         struct rte_flow_action actions[2];
5908         uint32_t flow_idx;
5909         struct rte_flow_error error;
5910
5911         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
5912         actions[0].conf = &jump;
5913         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
5914         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
5915                                 &attr, items, actions, false, &error);
5916         if (!flow_idx) {
5917                 DRV_LOG(DEBUG,
5918                         "Failed to create ctrl flow: rte_errno(%d),"
5919                         " type(%d), message(%s)",
5920                         rte_errno, error.type,
5921                         error.message ? error.message : " (no stated reason)");
5922                 return -rte_errno;
5923         }
5924         return 0;
5925 }
5926
5927 /**
5928  * Enable a control flow configured from the control plane.
5929  *
5930  * @param dev
5931  *   Pointer to Ethernet device.
5932  * @param eth_spec
5933  *   An Ethernet flow spec to apply.
5934  * @param eth_mask
5935  *   An Ethernet flow mask to apply.
5936  * @param vlan_spec
5937  *   A VLAN flow spec to apply.
5938  * @param vlan_mask
5939  *   A VLAN flow mask to apply.
5940  *
5941  * @return
5942  *   0 on success, a negative errno value otherwise and rte_errno is set.
5943  */
5944 int
5945 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
5946                     struct rte_flow_item_eth *eth_spec,
5947                     struct rte_flow_item_eth *eth_mask,
5948                     struct rte_flow_item_vlan *vlan_spec,
5949                     struct rte_flow_item_vlan *vlan_mask)
5950 {
5951         struct mlx5_priv *priv = dev->data->dev_private;
5952         const struct rte_flow_attr attr = {
5953                 .ingress = 1,
5954                 .priority = MLX5_FLOW_PRIO_RSVD,
5955         };
5956         struct rte_flow_item items[] = {
5957                 {
5958                         .type = RTE_FLOW_ITEM_TYPE_ETH,
5959                         .spec = eth_spec,
5960                         .last = NULL,
5961                         .mask = eth_mask,
5962                 },
5963                 {
5964                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
5965                                               RTE_FLOW_ITEM_TYPE_END,
5966                         .spec = vlan_spec,
5967                         .last = NULL,
5968                         .mask = vlan_mask,
5969                 },
5970                 {
5971                         .type = RTE_FLOW_ITEM_TYPE_END,
5972                 },
5973         };
5974         uint16_t queue[priv->reta_idx_n];
5975         struct rte_flow_action_rss action_rss = {
5976                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
5977                 .level = 0,
5978                 .types = priv->rss_conf.rss_hf,
5979                 .key_len = priv->rss_conf.rss_key_len,
5980                 .queue_num = priv->reta_idx_n,
5981                 .key = priv->rss_conf.rss_key,
5982                 .queue = queue,
5983         };
5984         struct rte_flow_action actions[] = {
5985                 {
5986                         .type = RTE_FLOW_ACTION_TYPE_RSS,
5987                         .conf = &action_rss,
5988                 },
5989                 {
5990                         .type = RTE_FLOW_ACTION_TYPE_END,
5991                 },
5992         };
5993         uint32_t flow_idx;
5994         struct rte_flow_error error;
5995         unsigned int i;
5996
5997         if (!priv->reta_idx_n || !priv->rxqs_n) {
5998                 return 0;
5999         }
6000         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6001                 action_rss.types = 0;
6002         for (i = 0; i != priv->reta_idx_n; ++i)
6003                 queue[i] = (*priv->reta_idx)[i];
6004         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6005                                 &attr, items, actions, false, &error);
6006         if (!flow_idx)
6007                 return -rte_errno;
6008         return 0;
6009 }
6010
6011 /**
6012  * Enable a flow control configured from the control plane.
6013  *
6014  * @param dev
6015  *   Pointer to Ethernet device.
6016  * @param eth_spec
6017  *   An Ethernet flow spec to apply.
6018  * @param eth_mask
6019  *   An Ethernet flow mask to apply.
6020  *
6021  * @return
6022  *   0 on success, a negative errno value otherwise and rte_errno is set.
6023  */
6024 int
6025 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6026                struct rte_flow_item_eth *eth_spec,
6027                struct rte_flow_item_eth *eth_mask)
6028 {
6029         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6030 }
6031
6032 /**
6033  * Create default miss flow rule matching lacp traffic
6034  *
6035  * @param dev
6036  *   Pointer to Ethernet device.
6037  * @param eth_spec
6038  *   An Ethernet flow spec to apply.
6039  *
6040  * @return
6041  *   0 on success, a negative errno value otherwise and rte_errno is set.
6042  */
6043 int
6044 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6045 {
6046         struct mlx5_priv *priv = dev->data->dev_private;
6047         /*
6048          * The LACP matching is done by only using ether type since using
6049          * a multicast dst mac causes kernel to give low priority to this flow.
6050          */
6051         static const struct rte_flow_item_eth lacp_spec = {
6052                 .type = RTE_BE16(0x8809),
6053         };
6054         static const struct rte_flow_item_eth lacp_mask = {
6055                 .type = 0xffff,
6056         };
6057         const struct rte_flow_attr attr = {
6058                 .ingress = 1,
6059         };
6060         struct rte_flow_item items[] = {
6061                 {
6062                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6063                         .spec = &lacp_spec,
6064                         .mask = &lacp_mask,
6065                 },
6066                 {
6067                         .type = RTE_FLOW_ITEM_TYPE_END,
6068                 },
6069         };
6070         struct rte_flow_action actions[] = {
6071                 {
6072                         .type = (enum rte_flow_action_type)
6073                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6074                 },
6075                 {
6076                         .type = RTE_FLOW_ACTION_TYPE_END,
6077                 },
6078         };
6079         struct rte_flow_error error;
6080         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6081                                 &attr, items, actions, false, &error);
6082
6083         if (!flow_idx)
6084                 return -rte_errno;
6085         return 0;
6086 }
6087
6088 /**
6089  * Destroy a flow.
6090  *
6091  * @see rte_flow_destroy()
6092  * @see rte_flow_ops
6093  */
6094 int
6095 mlx5_flow_destroy(struct rte_eth_dev *dev,
6096                   struct rte_flow *flow,
6097                   struct rte_flow_error *error __rte_unused)
6098 {
6099         struct mlx5_priv *priv = dev->data->dev_private;
6100
6101         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6102         return 0;
6103 }
6104
6105 /**
6106  * Destroy all flows.
6107  *
6108  * @see rte_flow_flush()
6109  * @see rte_flow_ops
6110  */
6111 int
6112 mlx5_flow_flush(struct rte_eth_dev *dev,
6113                 struct rte_flow_error *error __rte_unused)
6114 {
6115         struct mlx5_priv *priv = dev->data->dev_private;
6116
6117         mlx5_flow_list_flush(dev, &priv->flows, false);
6118         return 0;
6119 }
6120
6121 /**
6122  * Isolated mode.
6123  *
6124  * @see rte_flow_isolate()
6125  * @see rte_flow_ops
6126  */
6127 int
6128 mlx5_flow_isolate(struct rte_eth_dev *dev,
6129                   int enable,
6130                   struct rte_flow_error *error)
6131 {
6132         struct mlx5_priv *priv = dev->data->dev_private;
6133
6134         if (dev->data->dev_started) {
6135                 rte_flow_error_set(error, EBUSY,
6136                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6137                                    NULL,
6138                                    "port must be stopped first");
6139                 return -rte_errno;
6140         }
6141         priv->isolated = !!enable;
6142         if (enable)
6143                 dev->dev_ops = &mlx5_dev_ops_isolate;
6144         else
6145                 dev->dev_ops = &mlx5_dev_ops;
6146
6147         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6148         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6149
6150         return 0;
6151 }
6152
6153 /**
6154  * Query a flow.
6155  *
6156  * @see rte_flow_query()
6157  * @see rte_flow_ops
6158  */
6159 static int
6160 flow_drv_query(struct rte_eth_dev *dev,
6161                uint32_t flow_idx,
6162                const struct rte_flow_action *actions,
6163                void *data,
6164                struct rte_flow_error *error)
6165 {
6166         struct mlx5_priv *priv = dev->data->dev_private;
6167         const struct mlx5_flow_driver_ops *fops;
6168         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6169                                                [MLX5_IPOOL_RTE_FLOW],
6170                                                flow_idx);
6171         enum mlx5_flow_drv_type ftype;
6172
6173         if (!flow) {
6174                 return rte_flow_error_set(error, ENOENT,
6175                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6176                           NULL,
6177                           "invalid flow handle");
6178         }
6179         ftype = flow->drv_type;
6180         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6181         fops = flow_get_drv_ops(ftype);
6182
6183         return fops->query(dev, flow, actions, data, error);
6184 }
6185
6186 /**
6187  * Query a flow.
6188  *
6189  * @see rte_flow_query()
6190  * @see rte_flow_ops
6191  */
6192 int
6193 mlx5_flow_query(struct rte_eth_dev *dev,
6194                 struct rte_flow *flow,
6195                 const struct rte_flow_action *actions,
6196                 void *data,
6197                 struct rte_flow_error *error)
6198 {
6199         int ret;
6200
6201         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6202                              error);
6203         if (ret < 0)
6204                 return ret;
6205         return 0;
6206 }
6207
6208 /**
6209  * Manage filter operations.
6210  *
6211  * @param dev
6212  *   Pointer to Ethernet device structure.
6213  * @param filter_type
6214  *   Filter type.
6215  * @param filter_op
6216  *   Operation to perform.
6217  * @param arg
6218  *   Pointer to operation-specific structure.
6219  *
6220  * @return
6221  *   0 on success, a negative errno value otherwise and rte_errno is set.
6222  */
6223 int
6224 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
6225                      enum rte_filter_type filter_type,
6226                      enum rte_filter_op filter_op,
6227                      void *arg)
6228 {
6229         switch (filter_type) {
6230         case RTE_ETH_FILTER_GENERIC:
6231                 if (filter_op != RTE_ETH_FILTER_GET) {
6232                         rte_errno = EINVAL;
6233                         return -rte_errno;
6234                 }
6235                 *(const void **)arg = &mlx5_flow_ops;
6236                 return 0;
6237         default:
6238                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
6239                         dev->data->port_id, filter_type);
6240                 rte_errno = ENOTSUP;
6241                 return -rte_errno;
6242         }
6243         return 0;
6244 }
6245
6246 /**
6247  * Create the needed meter and suffix tables.
6248  *
6249  * @param[in] dev
6250  *   Pointer to Ethernet device.
6251  * @param[in] fm
6252  *   Pointer to the flow meter.
6253  *
6254  * @return
6255  *   Pointer to table set on success, NULL otherwise.
6256  */
6257 struct mlx5_meter_domains_infos *
6258 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
6259                           const struct mlx5_flow_meter *fm)
6260 {
6261         const struct mlx5_flow_driver_ops *fops;
6262
6263         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6264         return fops->create_mtr_tbls(dev, fm);
6265 }
6266
6267 /**
6268  * Destroy the meter table set.
6269  *
6270  * @param[in] dev
6271  *   Pointer to Ethernet device.
6272  * @param[in] tbl
6273  *   Pointer to the meter table set.
6274  *
6275  * @return
6276  *   0 on success.
6277  */
6278 int
6279 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
6280                            struct mlx5_meter_domains_infos *tbls)
6281 {
6282         const struct mlx5_flow_driver_ops *fops;
6283
6284         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6285         return fops->destroy_mtr_tbls(dev, tbls);
6286 }
6287
6288 /**
6289  * Create policer rules.
6290  *
6291  * @param[in] dev
6292  *   Pointer to Ethernet device.
6293  * @param[in] fm
6294  *   Pointer to flow meter structure.
6295  * @param[in] attr
6296  *   Pointer to flow attributes.
6297  *
6298  * @return
6299  *   0 on success, -1 otherwise.
6300  */
6301 int
6302 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
6303                                struct mlx5_flow_meter *fm,
6304                                const struct rte_flow_attr *attr)
6305 {
6306         const struct mlx5_flow_driver_ops *fops;
6307
6308         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6309         return fops->create_policer_rules(dev, fm, attr);
6310 }
6311
6312 /**
6313  * Destroy policer rules.
6314  *
6315  * @param[in] fm
6316  *   Pointer to flow meter structure.
6317  * @param[in] attr
6318  *   Pointer to flow attributes.
6319  *
6320  * @return
6321  *   0 on success, -1 otherwise.
6322  */
6323 int
6324 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
6325                                 struct mlx5_flow_meter *fm,
6326                                 const struct rte_flow_attr *attr)
6327 {
6328         const struct mlx5_flow_driver_ops *fops;
6329
6330         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6331         return fops->destroy_policer_rules(dev, fm, attr);
6332 }
6333
6334 /**
6335  * Allocate a counter.
6336  *
6337  * @param[in] dev
6338  *   Pointer to Ethernet device structure.
6339  *
6340  * @return
6341  *   Index to allocated counter  on success, 0 otherwise.
6342  */
6343 uint32_t
6344 mlx5_counter_alloc(struct rte_eth_dev *dev)
6345 {
6346         const struct mlx5_flow_driver_ops *fops;
6347         struct rte_flow_attr attr = { .transfer = 0 };
6348
6349         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6350                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6351                 return fops->counter_alloc(dev);
6352         }
6353         DRV_LOG(ERR,
6354                 "port %u counter allocate is not supported.",
6355                  dev->data->port_id);
6356         return 0;
6357 }
6358
6359 /**
6360  * Free a counter.
6361  *
6362  * @param[in] dev
6363  *   Pointer to Ethernet device structure.
6364  * @param[in] cnt
6365  *   Index to counter to be free.
6366  */
6367 void
6368 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
6369 {
6370         const struct mlx5_flow_driver_ops *fops;
6371         struct rte_flow_attr attr = { .transfer = 0 };
6372
6373         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6374                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6375                 fops->counter_free(dev, cnt);
6376                 return;
6377         }
6378         DRV_LOG(ERR,
6379                 "port %u counter free is not supported.",
6380                  dev->data->port_id);
6381 }
6382
6383 /**
6384  * Query counter statistics.
6385  *
6386  * @param[in] dev
6387  *   Pointer to Ethernet device structure.
6388  * @param[in] cnt
6389  *   Index to counter to query.
6390  * @param[in] clear
6391  *   Set to clear counter statistics.
6392  * @param[out] pkts
6393  *   The counter hits packets number to save.
6394  * @param[out] bytes
6395  *   The counter hits bytes number to save.
6396  *
6397  * @return
6398  *   0 on success, a negative errno value otherwise.
6399  */
6400 int
6401 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
6402                    bool clear, uint64_t *pkts, uint64_t *bytes)
6403 {
6404         const struct mlx5_flow_driver_ops *fops;
6405         struct rte_flow_attr attr = { .transfer = 0 };
6406
6407         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6408                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6409                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
6410         }
6411         DRV_LOG(ERR,
6412                 "port %u counter query is not supported.",
6413                  dev->data->port_id);
6414         return -ENOTSUP;
6415 }
6416
6417 /**
6418  * Allocate a new memory for the counter values wrapped by all the needed
6419  * management.
6420  *
6421  * @param[in] sh
6422  *   Pointer to mlx5_dev_ctx_shared object.
6423  *
6424  * @return
6425  *   0 on success, a negative errno value otherwise.
6426  */
6427 static int
6428 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
6429 {
6430         struct mlx5_devx_mkey_attr mkey_attr;
6431         struct mlx5_counter_stats_mem_mng *mem_mng;
6432         volatile struct flow_counter_stats *raw_data;
6433         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
6434         int size = (sizeof(struct flow_counter_stats) *
6435                         MLX5_COUNTERS_PER_POOL +
6436                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
6437                         sizeof(struct mlx5_counter_stats_mem_mng);
6438         size_t pgsize = rte_mem_page_size();
6439         uint8_t *mem;
6440         int i;
6441
6442         if (pgsize == (size_t)-1) {
6443                 DRV_LOG(ERR, "Failed to get mem page size");
6444                 rte_errno = ENOMEM;
6445                 return -ENOMEM;
6446         }
6447         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
6448         if (!mem) {
6449                 rte_errno = ENOMEM;
6450                 return -ENOMEM;
6451         }
6452         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
6453         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
6454         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
6455                                                  IBV_ACCESS_LOCAL_WRITE);
6456         if (!mem_mng->umem) {
6457                 rte_errno = errno;
6458                 mlx5_free(mem);
6459                 return -rte_errno;
6460         }
6461         mkey_attr.addr = (uintptr_t)mem;
6462         mkey_attr.size = size;
6463         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
6464         mkey_attr.pd = sh->pdn;
6465         mkey_attr.log_entity_size = 0;
6466         mkey_attr.pg_access = 0;
6467         mkey_attr.klm_array = NULL;
6468         mkey_attr.klm_num = 0;
6469         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
6470         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
6471         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
6472         if (!mem_mng->dm) {
6473                 mlx5_os_umem_dereg(mem_mng->umem);
6474                 rte_errno = errno;
6475                 mlx5_free(mem);
6476                 return -rte_errno;
6477         }
6478         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
6479         raw_data = (volatile struct flow_counter_stats *)mem;
6480         for (i = 0; i < raws_n; ++i) {
6481                 mem_mng->raws[i].mem_mng = mem_mng;
6482                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
6483         }
6484         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
6485                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
6486                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
6487                                  next);
6488         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
6489         sh->cmng.mem_mng = mem_mng;
6490         return 0;
6491 }
6492
6493 /**
6494  * Set the statistic memory to the new counter pool.
6495  *
6496  * @param[in] sh
6497  *   Pointer to mlx5_dev_ctx_shared object.
6498  * @param[in] pool
6499  *   Pointer to the pool to set the statistic memory.
6500  *
6501  * @return
6502  *   0 on success, a negative errno value otherwise.
6503  */
6504 static int
6505 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
6506                                struct mlx5_flow_counter_pool *pool)
6507 {
6508         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6509         /* Resize statistic memory once used out. */
6510         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
6511             mlx5_flow_create_counter_stat_mem_mng(sh)) {
6512                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
6513                 return -1;
6514         }
6515         rte_spinlock_lock(&pool->sl);
6516         pool->raw = cmng->mem_mng->raws + pool->index %
6517                     MLX5_CNT_CONTAINER_RESIZE;
6518         rte_spinlock_unlock(&pool->sl);
6519         pool->raw_hw = NULL;
6520         return 0;
6521 }
6522
6523 #define MLX5_POOL_QUERY_FREQ_US 1000000
6524
6525 /**
6526  * Set the periodic procedure for triggering asynchronous batch queries for all
6527  * the counter pools.
6528  *
6529  * @param[in] sh
6530  *   Pointer to mlx5_dev_ctx_shared object.
6531  */
6532 void
6533 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
6534 {
6535         uint32_t pools_n, us;
6536
6537         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
6538         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
6539         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
6540         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
6541                 sh->cmng.query_thread_on = 0;
6542                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
6543         } else {
6544                 sh->cmng.query_thread_on = 1;
6545         }
6546 }
6547
6548 /**
6549  * The periodic procedure for triggering asynchronous batch queries for all the
6550  * counter pools. This function is probably called by the host thread.
6551  *
6552  * @param[in] arg
6553  *   The parameter for the alarm process.
6554  */
6555 void
6556 mlx5_flow_query_alarm(void *arg)
6557 {
6558         struct mlx5_dev_ctx_shared *sh = arg;
6559         int ret;
6560         uint16_t pool_index = sh->cmng.pool_index;
6561         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6562         struct mlx5_flow_counter_pool *pool;
6563         uint16_t n_valid;
6564
6565         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
6566                 goto set_alarm;
6567         rte_spinlock_lock(&cmng->pool_update_sl);
6568         pool = cmng->pools[pool_index];
6569         n_valid = cmng->n_valid;
6570         rte_spinlock_unlock(&cmng->pool_update_sl);
6571         /* Set the statistic memory to the new created pool. */
6572         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
6573                 goto set_alarm;
6574         if (pool->raw_hw)
6575                 /* There is a pool query in progress. */
6576                 goto set_alarm;
6577         pool->raw_hw =
6578                 LIST_FIRST(&sh->cmng.free_stat_raws);
6579         if (!pool->raw_hw)
6580                 /* No free counter statistics raw memory. */
6581                 goto set_alarm;
6582         /*
6583          * Identify the counters released between query trigger and query
6584          * handle more efficiently. The counter released in this gap period
6585          * should wait for a new round of query as the new arrived packets
6586          * will not be taken into account.
6587          */
6588         pool->query_gen++;
6589         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
6590                                                MLX5_COUNTERS_PER_POOL,
6591                                                NULL, NULL,
6592                                                pool->raw_hw->mem_mng->dm->id,
6593                                                (void *)(uintptr_t)
6594                                                pool->raw_hw->data,
6595                                                sh->devx_comp,
6596                                                (uint64_t)(uintptr_t)pool);
6597         if (ret) {
6598                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
6599                         " %d", pool->min_dcs->id);
6600                 pool->raw_hw = NULL;
6601                 goto set_alarm;
6602         }
6603         LIST_REMOVE(pool->raw_hw, next);
6604         sh->cmng.pending_queries++;
6605         pool_index++;
6606         if (pool_index >= n_valid)
6607                 pool_index = 0;
6608 set_alarm:
6609         sh->cmng.pool_index = pool_index;
6610         mlx5_set_query_alarm(sh);
6611 }
6612
6613 /**
6614  * Check and callback event for new aged flow in the counter pool
6615  *
6616  * @param[in] sh
6617  *   Pointer to mlx5_dev_ctx_shared object.
6618  * @param[in] pool
6619  *   Pointer to Current counter pool.
6620  */
6621 static void
6622 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
6623                    struct mlx5_flow_counter_pool *pool)
6624 {
6625         struct mlx5_priv *priv;
6626         struct mlx5_flow_counter *cnt;
6627         struct mlx5_age_info *age_info;
6628         struct mlx5_age_param *age_param;
6629         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
6630         struct mlx5_counter_stats_raw *prev = pool->raw;
6631         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
6632         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
6633         uint16_t expected = AGE_CANDIDATE;
6634         uint32_t i;
6635
6636         pool->time_of_last_age_check = curr_time;
6637         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
6638                 cnt = MLX5_POOL_GET_CNT(pool, i);
6639                 age_param = MLX5_CNT_TO_AGE(cnt);
6640                 if (__atomic_load_n(&age_param->state,
6641                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
6642                         continue;
6643                 if (cur->data[i].hits != prev->data[i].hits) {
6644                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
6645                                          __ATOMIC_RELAXED);
6646                         continue;
6647                 }
6648                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
6649                                        time_delta,
6650                                        __ATOMIC_RELAXED) <= age_param->timeout)
6651                         continue;
6652                 /**
6653                  * Hold the lock first, or if between the
6654                  * state AGE_TMOUT and tailq operation the
6655                  * release happened, the release procedure
6656                  * may delete a non-existent tailq node.
6657                  */
6658                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
6659                 age_info = GET_PORT_AGE_INFO(priv);
6660                 rte_spinlock_lock(&age_info->aged_sl);
6661                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
6662                                                 AGE_TMOUT, false,
6663                                                 __ATOMIC_RELAXED,
6664                                                 __ATOMIC_RELAXED)) {
6665                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
6666                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
6667                 }
6668                 rte_spinlock_unlock(&age_info->aged_sl);
6669         }
6670         mlx5_age_event_prepare(sh);
6671 }
6672
6673 /**
6674  * Handler for the HW respond about ready values from an asynchronous batch
6675  * query. This function is probably called by the host thread.
6676  *
6677  * @param[in] sh
6678  *   The pointer to the shared device context.
6679  * @param[in] async_id
6680  *   The Devx async ID.
6681  * @param[in] status
6682  *   The status of the completion.
6683  */
6684 void
6685 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6686                                   uint64_t async_id, int status)
6687 {
6688         struct mlx5_flow_counter_pool *pool =
6689                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6690         struct mlx5_counter_stats_raw *raw_to_free;
6691         uint8_t query_gen = pool->query_gen ^ 1;
6692         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6693         enum mlx5_counter_type cnt_type =
6694                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6695                                 MLX5_COUNTER_TYPE_ORIGIN;
6696
6697         if (unlikely(status)) {
6698                 raw_to_free = pool->raw_hw;
6699         } else {
6700                 raw_to_free = pool->raw;
6701                 if (pool->is_aged)
6702                         mlx5_flow_aging_check(sh, pool);
6703                 rte_spinlock_lock(&pool->sl);
6704                 pool->raw = pool->raw_hw;
6705                 rte_spinlock_unlock(&pool->sl);
6706                 /* Be sure the new raw counters data is updated in memory. */
6707                 rte_io_wmb();
6708                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
6709                         rte_spinlock_lock(&cmng->csl[cnt_type]);
6710                         TAILQ_CONCAT(&cmng->counters[cnt_type],
6711                                      &pool->counters[query_gen], next);
6712                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6713                 }
6714         }
6715         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6716         pool->raw_hw = NULL;
6717         sh->cmng.pending_queries--;
6718 }
6719
6720 static int
6721 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
6722                     const struct flow_grp_info *grp_info,
6723                     struct rte_flow_error *error)
6724 {
6725         if (grp_info->transfer && grp_info->external &&
6726             grp_info->fdb_def_rule) {
6727                 if (group == UINT32_MAX)
6728                         return rte_flow_error_set
6729                                                 (error, EINVAL,
6730                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6731                                                  NULL,
6732                                                  "group index not supported");
6733                 *table = group + 1;
6734         } else {
6735                 *table = group;
6736         }
6737         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
6738         return 0;
6739 }
6740
6741 /**
6742  * Translate the rte_flow group index to HW table value.
6743  *
6744  * If tunnel offload is disabled, all group ids converted to flow table
6745  * id using the standard method.
6746  * If tunnel offload is enabled, group id can be converted using the
6747  * standard or tunnel conversion method. Group conversion method
6748  * selection depends on flags in `grp_info` parameter:
6749  * - Internal (grp_info.external == 0) groups conversion uses the
6750  *   standard method.
6751  * - Group ids in JUMP action converted with the tunnel conversion.
6752  * - Group id in rule attribute conversion depends on a rule type and
6753  *   group id value:
6754  *   ** non zero group attributes converted with the tunnel method
6755  *   ** zero group attribute in non-tunnel rule is converted using the
6756  *      standard method - there's only one root table
6757  *   ** zero group attribute in steer tunnel rule is converted with the
6758  *      standard method - single root table
6759  *   ** zero group attribute in match tunnel rule is a special OvS
6760  *      case: that value is used for portability reasons. That group
6761  *      id is converted with the tunnel conversion method.
6762  *
6763  * @param[in] dev
6764  *   Port device
6765  * @param[in] tunnel
6766  *   PMD tunnel offload object
6767  * @param[in] group
6768  *   rte_flow group index value.
6769  * @param[out] table
6770  *   HW table value.
6771  * @param[in] grp_info
6772  *   flags used for conversion
6773  * @param[out] error
6774  *   Pointer to error structure.
6775  *
6776  * @return
6777  *   0 on success, a negative errno value otherwise and rte_errno is set.
6778  */
6779 int
6780 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
6781                          const struct mlx5_flow_tunnel *tunnel,
6782                          uint32_t group, uint32_t *table,
6783                          const struct flow_grp_info *grp_info,
6784                          struct rte_flow_error *error)
6785 {
6786         int ret;
6787         bool standard_translation;
6788
6789         if (!grp_info->skip_scale && grp_info->external &&
6790             group < MLX5_MAX_TABLES_EXTERNAL)
6791                 group *= MLX5_FLOW_TABLE_FACTOR;
6792         if (is_tunnel_offload_active(dev)) {
6793                 standard_translation = !grp_info->external ||
6794                                         grp_info->std_tbl_fix;
6795         } else {
6796                 standard_translation = true;
6797         }
6798         DRV_LOG(DEBUG,
6799                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
6800                 dev->data->port_id, group, grp_info->transfer,
6801                 grp_info->external, grp_info->fdb_def_rule,
6802                 standard_translation ? "STANDARD" : "TUNNEL");
6803         if (standard_translation)
6804                 ret = flow_group_to_table(dev->data->port_id, group, table,
6805                                           grp_info, error);
6806         else
6807                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
6808                                                       table, error);
6809
6810         return ret;
6811 }
6812
6813 /**
6814  * Discover availability of metadata reg_c's.
6815  *
6816  * Iteratively use test flows to check availability.
6817  *
6818  * @param[in] dev
6819  *   Pointer to the Ethernet device structure.
6820  *
6821  * @return
6822  *   0 on success, a negative errno value otherwise and rte_errno is set.
6823  */
6824 int
6825 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
6826 {
6827         struct mlx5_priv *priv = dev->data->dev_private;
6828         struct mlx5_dev_config *config = &priv->config;
6829         enum modify_reg idx;
6830         int n = 0;
6831
6832         /* reg_c[0] and reg_c[1] are reserved. */
6833         config->flow_mreg_c[n++] = REG_C_0;
6834         config->flow_mreg_c[n++] = REG_C_1;
6835         /* Discover availability of other reg_c's. */
6836         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
6837                 struct rte_flow_attr attr = {
6838                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
6839                         .priority = MLX5_FLOW_PRIO_RSVD,
6840                         .ingress = 1,
6841                 };
6842                 struct rte_flow_item items[] = {
6843                         [0] = {
6844                                 .type = RTE_FLOW_ITEM_TYPE_END,
6845                         },
6846                 };
6847                 struct rte_flow_action actions[] = {
6848                         [0] = {
6849                                 .type = (enum rte_flow_action_type)
6850                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
6851                                 .conf = &(struct mlx5_flow_action_copy_mreg){
6852                                         .src = REG_C_1,
6853                                         .dst = idx,
6854                                 },
6855                         },
6856                         [1] = {
6857                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6858                                 .conf = &(struct rte_flow_action_jump){
6859                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
6860                                 },
6861                         },
6862                         [2] = {
6863                                 .type = RTE_FLOW_ACTION_TYPE_END,
6864                         },
6865                 };
6866                 uint32_t flow_idx;
6867                 struct rte_flow *flow;
6868                 struct rte_flow_error error;
6869
6870                 if (!config->dv_flow_en)
6871                         break;
6872                 /* Create internal flow, validation skips copy action. */
6873                 flow_idx = flow_list_create(dev, NULL, &attr, items,
6874                                             actions, false, &error);
6875                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
6876                                       flow_idx);
6877                 if (!flow)
6878                         continue;
6879                 config->flow_mreg_c[n++] = idx;
6880                 flow_list_destroy(dev, NULL, flow_idx);
6881         }
6882         for (; n < MLX5_MREG_C_NUM; ++n)
6883                 config->flow_mreg_c[n] = REG_NON;
6884         return 0;
6885 }
6886
6887 /**
6888  * Dump flow raw hw data to file
6889  *
6890  * @param[in] dev
6891  *    The pointer to Ethernet device.
6892  * @param[in] file
6893  *   A pointer to a file for output.
6894  * @param[out] error
6895  *   Perform verbose error reporting if not NULL. PMDs initialize this
6896  *   structure in case of error only.
6897  * @return
6898  *   0 on success, a nagative value otherwise.
6899  */
6900 int
6901 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
6902                    FILE *file,
6903                    struct rte_flow_error *error __rte_unused)
6904 {
6905         struct mlx5_priv *priv = dev->data->dev_private;
6906         struct mlx5_dev_ctx_shared *sh = priv->sh;
6907
6908         if (!priv->config.dv_flow_en) {
6909                 if (fputs("device dv flow disabled\n", file) <= 0)
6910                         return -errno;
6911                 return -ENOTSUP;
6912         }
6913         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
6914                                        sh->tx_domain, file);
6915 }
6916
6917 /**
6918  * Get aged-out flows.
6919  *
6920  * @param[in] dev
6921  *   Pointer to the Ethernet device structure.
6922  * @param[in] context
6923  *   The address of an array of pointers to the aged-out flows contexts.
6924  * @param[in] nb_countexts
6925  *   The length of context array pointers.
6926  * @param[out] error
6927  *   Perform verbose error reporting if not NULL. Initialized in case of
6928  *   error only.
6929  *
6930  * @return
6931  *   how many contexts get in success, otherwise negative errno value.
6932  *   if nb_contexts is 0, return the amount of all aged contexts.
6933  *   if nb_contexts is not 0 , return the amount of aged flows reported
6934  *   in the context array.
6935  */
6936 int
6937 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
6938                         uint32_t nb_contexts, struct rte_flow_error *error)
6939 {
6940         const struct mlx5_flow_driver_ops *fops;
6941         struct rte_flow_attr attr = { .transfer = 0 };
6942
6943         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6944                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6945                 return fops->get_aged_flows(dev, contexts, nb_contexts,
6946                                                     error);
6947         }
6948         DRV_LOG(ERR,
6949                 "port %u get aged flows is not supported.",
6950                  dev->data->port_id);
6951         return -ENOTSUP;
6952 }
6953
6954 /* Wrapper for driver action_validate op callback */
6955 static int
6956 flow_drv_action_validate(struct rte_eth_dev *dev,
6957                          const struct rte_flow_shared_action_conf *conf,
6958                          const struct rte_flow_action *action,
6959                          const struct mlx5_flow_driver_ops *fops,
6960                          struct rte_flow_error *error)
6961 {
6962         static const char err_msg[] = "shared action validation unsupported";
6963
6964         if (!fops->action_validate) {
6965                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
6966                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
6967                                    NULL, err_msg);
6968                 return -rte_errno;
6969         }
6970         return fops->action_validate(dev, conf, action, error);
6971 }
6972
6973 /**
6974  * Destroys the shared action by handle.
6975  *
6976  * @param dev
6977  *   Pointer to Ethernet device structure.
6978  * @param[in] action
6979  *   Handle for the shared action to be destroyed.
6980  * @param[out] error
6981  *   Perform verbose error reporting if not NULL. PMDs initialize this
6982  *   structure in case of error only.
6983  *
6984  * @return
6985  *   0 on success, a negative errno value otherwise and rte_errno is set.
6986  *
6987  * @note: wrapper for driver action_create op callback.
6988  */
6989 static int
6990 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
6991                            struct rte_flow_shared_action *action,
6992                            struct rte_flow_error *error)
6993 {
6994         static const char err_msg[] = "shared action destruction unsupported";
6995         struct rte_flow_attr attr = { .transfer = 0 };
6996         const struct mlx5_flow_driver_ops *fops =
6997                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
6998
6999         if (!fops->action_destroy) {
7000                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7001                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7002                                    NULL, err_msg);
7003                 return -rte_errno;
7004         }
7005         return fops->action_destroy(dev, action, error);
7006 }
7007
7008 /* Wrapper for driver action_destroy op callback */
7009 static int
7010 flow_drv_action_update(struct rte_eth_dev *dev,
7011                        struct rte_flow_shared_action *action,
7012                        const void *action_conf,
7013                        const struct mlx5_flow_driver_ops *fops,
7014                        struct rte_flow_error *error)
7015 {
7016         static const char err_msg[] = "shared action update unsupported";
7017
7018         if (!fops->action_update) {
7019                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7020                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7021                                    NULL, err_msg);
7022                 return -rte_errno;
7023         }
7024         return fops->action_update(dev, action, action_conf, error);
7025 }
7026
7027 /* Wrapper for driver action_destroy op callback */
7028 static int
7029 flow_drv_action_query(struct rte_eth_dev *dev,
7030                       const struct rte_flow_shared_action *action,
7031                       void *data,
7032                       const struct mlx5_flow_driver_ops *fops,
7033                       struct rte_flow_error *error)
7034 {
7035         static const char err_msg[] = "shared action query unsupported";
7036
7037         if (!fops->action_query) {
7038                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7039                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7040                                    NULL, err_msg);
7041                 return -rte_errno;
7042         }
7043         return fops->action_query(dev, action, data, error);
7044 }
7045
7046 /**
7047  * Create shared action for reuse in multiple flow rules.
7048  *
7049  * @param dev
7050  *   Pointer to Ethernet device structure.
7051  * @param[in] action
7052  *   Action configuration for shared action creation.
7053  * @param[out] error
7054  *   Perform verbose error reporting if not NULL. PMDs initialize this
7055  *   structure in case of error only.
7056  * @return
7057  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7058  */
7059 static struct rte_flow_shared_action *
7060 mlx5_shared_action_create(struct rte_eth_dev *dev,
7061                           const struct rte_flow_shared_action_conf *conf,
7062                           const struct rte_flow_action *action,
7063                           struct rte_flow_error *error)
7064 {
7065         static const char err_msg[] = "shared action creation unsupported";
7066         struct rte_flow_attr attr = { .transfer = 0 };
7067         const struct mlx5_flow_driver_ops *fops =
7068                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7069
7070         if (flow_drv_action_validate(dev, conf, action, fops, error))
7071                 return NULL;
7072         if (!fops->action_create) {
7073                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7074                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7075                                    NULL, err_msg);
7076                 return NULL;
7077         }
7078         return fops->action_create(dev, conf, action, error);
7079 }
7080
7081 /**
7082  * Updates inplace the shared action configuration pointed by *action* handle
7083  * with the configuration provided as *action* argument.
7084  * The update of the shared action configuration effects all flow rules reusing
7085  * the action via handle.
7086  *
7087  * @param dev
7088  *   Pointer to Ethernet device structure.
7089  * @param[in] shared_action
7090  *   Handle for the shared action to be updated.
7091  * @param[in] action
7092  *   Action specification used to modify the action pointed by handle.
7093  *   *action* should be of same type with the action pointed by the *action*
7094  *   handle argument, otherwise considered as invalid.
7095  * @param[out] error
7096  *   Perform verbose error reporting if not NULL. PMDs initialize this
7097  *   structure in case of error only.
7098  *
7099  * @return
7100  *   0 on success, a negative errno value otherwise and rte_errno is set.
7101  */
7102 static int
7103 mlx5_shared_action_update(struct rte_eth_dev *dev,
7104                 struct rte_flow_shared_action *shared_action,
7105                 const struct rte_flow_action *action,
7106                 struct rte_flow_error *error)
7107 {
7108         struct rte_flow_attr attr = { .transfer = 0 };
7109         const struct mlx5_flow_driver_ops *fops =
7110                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7111         int ret;
7112
7113         ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7114         if (ret)
7115                 return ret;
7116         return flow_drv_action_update(dev, shared_action, action->conf, fops,
7117                                       error);
7118 }
7119
7120 /**
7121  * Query the shared action by handle.
7122  *
7123  * This function allows retrieving action-specific data such as counters.
7124  * Data is gathered by special action which may be present/referenced in
7125  * more than one flow rule definition.
7126  *
7127  * \see RTE_FLOW_ACTION_TYPE_COUNT
7128  *
7129  * @param dev
7130  *   Pointer to Ethernet device structure.
7131  * @param[in] action
7132  *   Handle for the shared action to query.
7133  * @param[in, out] data
7134  *   Pointer to storage for the associated query data type.
7135  * @param[out] error
7136  *   Perform verbose error reporting if not NULL. PMDs initialize this
7137  *   structure in case of error only.
7138  *
7139  * @return
7140  *   0 on success, a negative errno value otherwise and rte_errno is set.
7141  */
7142 static int
7143 mlx5_shared_action_query(struct rte_eth_dev *dev,
7144                          const struct rte_flow_shared_action *action,
7145                          void *data,
7146                          struct rte_flow_error *error)
7147 {
7148         struct rte_flow_attr attr = { .transfer = 0 };
7149         const struct mlx5_flow_driver_ops *fops =
7150                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7151
7152         return flow_drv_action_query(dev, action, data, fops, error);
7153 }
7154
7155 /**
7156  * Destroy all shared actions.
7157  *
7158  * @param dev
7159  *   Pointer to Ethernet device.
7160  *
7161  * @return
7162  *   0 on success, a negative errno value otherwise and rte_errno is set.
7163  */
7164 int
7165 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7166 {
7167         struct rte_flow_error error;
7168         struct mlx5_priv *priv = dev->data->dev_private;
7169         struct mlx5_shared_action_rss *action;
7170         int ret = 0;
7171         uint32_t idx;
7172
7173         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
7174                       priv->rss_shared_actions, idx, action, next) {
7175                 ret |= mlx5_shared_action_destroy(dev,
7176                        (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
7177         }
7178         return ret;
7179 }
7180
7181 #ifndef HAVE_MLX5DV_DR
7182 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
7183 #else
7184 #define MLX5_DOMAIN_SYNC_FLOW \
7185         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
7186 #endif
7187
7188 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
7189 {
7190         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
7191         const struct mlx5_flow_driver_ops *fops;
7192         int ret;
7193         struct rte_flow_attr attr = { .transfer = 0 };
7194
7195         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7196         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
7197         if (ret > 0)
7198                 ret = -ret;
7199         return ret;
7200 }
7201
7202 /**
7203  * tunnel offload functionalilty is defined for DV environment only
7204  */
7205 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
7206 __extension__
7207 union tunnel_offload_mark {
7208         uint32_t val;
7209         struct {
7210                 uint32_t app_reserve:8;
7211                 uint32_t table_id:15;
7212                 uint32_t transfer:1;
7213                 uint32_t _unused_:8;
7214         };
7215 };
7216
7217 static bool
7218 mlx5_access_tunnel_offload_db
7219         (struct rte_eth_dev *dev,
7220          bool (*match)(struct rte_eth_dev *,
7221                        struct mlx5_flow_tunnel *, const void *),
7222          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7223          void (*miss)(struct rte_eth_dev *, void *),
7224          void *ctx, bool lock_op);
7225
7226 static int
7227 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
7228                              struct rte_flow *flow,
7229                              const struct rte_flow_attr *attr,
7230                              const struct rte_flow_action *app_actions,
7231                              uint32_t flow_idx,
7232                              struct tunnel_default_miss_ctx *ctx,
7233                              struct rte_flow_error *error)
7234 {
7235         struct mlx5_priv *priv = dev->data->dev_private;
7236         struct mlx5_flow *dev_flow;
7237         struct rte_flow_attr miss_attr = *attr;
7238         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
7239         const struct rte_flow_item miss_items[2] = {
7240                 {
7241                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7242                         .spec = NULL,
7243                         .last = NULL,
7244                         .mask = NULL
7245                 },
7246                 {
7247                         .type = RTE_FLOW_ITEM_TYPE_END,
7248                         .spec = NULL,
7249                         .last = NULL,
7250                         .mask = NULL
7251                 }
7252         };
7253         union tunnel_offload_mark mark_id;
7254         struct rte_flow_action_mark miss_mark;
7255         struct rte_flow_action miss_actions[3] = {
7256                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
7257                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
7258         };
7259         const struct rte_flow_action_jump *jump_data;
7260         uint32_t i, flow_table = 0; /* prevent compilation warning */
7261         struct flow_grp_info grp_info = {
7262                 .external = 1,
7263                 .transfer = attr->transfer,
7264                 .fdb_def_rule = !!priv->fdb_def_rule,
7265                 .std_tbl_fix = 0,
7266         };
7267         int ret;
7268
7269         if (!attr->transfer) {
7270                 uint32_t q_size;
7271
7272                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
7273                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
7274                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
7275                                          0, SOCKET_ID_ANY);
7276                 if (!ctx->queue)
7277                         return rte_flow_error_set
7278                                 (error, ENOMEM,
7279                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7280                                 NULL, "invalid default miss RSS");
7281                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7282                 ctx->action_rss.level = 0,
7283                 ctx->action_rss.types = priv->rss_conf.rss_hf,
7284                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
7285                 ctx->action_rss.queue_num = priv->reta_idx_n,
7286                 ctx->action_rss.key = priv->rss_conf.rss_key,
7287                 ctx->action_rss.queue = ctx->queue;
7288                 if (!priv->reta_idx_n || !priv->rxqs_n)
7289                         return rte_flow_error_set
7290                                 (error, EINVAL,
7291                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7292                                 NULL, "invalid port configuration");
7293                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
7294                         ctx->action_rss.types = 0;
7295                 for (i = 0; i != priv->reta_idx_n; ++i)
7296                         ctx->queue[i] = (*priv->reta_idx)[i];
7297         } else {
7298                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
7299                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
7300         }
7301         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
7302         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
7303         jump_data = app_actions->conf;
7304         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
7305         miss_attr.group = jump_data->group;
7306         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
7307                                        &flow_table, &grp_info, error);
7308         if (ret)
7309                 return rte_flow_error_set(error, EINVAL,
7310                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7311                                           NULL, "invalid tunnel id");
7312         mark_id.app_reserve = 0;
7313         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
7314         mark_id.transfer = !!attr->transfer;
7315         mark_id._unused_ = 0;
7316         miss_mark.id = mark_id.val;
7317         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
7318                                     miss_items, miss_actions, flow_idx, error);
7319         if (!dev_flow)
7320                 return -rte_errno;
7321         dev_flow->flow = flow;
7322         dev_flow->external = true;
7323         dev_flow->tunnel = tunnel;
7324         /* Subflow object was created, we must include one in the list. */
7325         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
7326                       dev_flow->handle, next);
7327         DRV_LOG(DEBUG,
7328                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
7329                 dev->data->port_id, tunnel->app_tunnel.type,
7330                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
7331         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
7332                                   miss_actions, error);
7333         if (!ret)
7334                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
7335                                                   error);
7336
7337         return ret;
7338 }
7339
7340 static const struct mlx5_flow_tbl_data_entry  *
7341 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
7342 {
7343         struct mlx5_priv *priv = dev->data->dev_private;
7344         struct mlx5_dev_ctx_shared *sh = priv->sh;
7345         struct mlx5_hlist_entry *he;
7346         union tunnel_offload_mark mbits = { .val = mark };
7347         union mlx5_flow_tbl_key table_key = {
7348                 {
7349                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
7350                         .dummy = 0,
7351                         .domain = !!mbits.transfer,
7352                         .direction = 0,
7353                 }
7354         };
7355         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
7356         return he ?
7357                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
7358 }
7359
7360 static void
7361 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
7362                                    struct mlx5_hlist_entry *entry)
7363 {
7364         struct mlx5_dev_ctx_shared *sh = list->ctx;
7365         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7366
7367         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7368                         tunnel_flow_tbl_to_id(tte->flow_table));
7369         mlx5_free(tte);
7370 }
7371
7372 static int
7373 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused,
7374                                   struct mlx5_hlist_entry *entry,
7375                                   uint64_t key, void *cb_ctx __rte_unused)
7376 {
7377         union tunnel_tbl_key tbl = {
7378                 .val = key,
7379         };
7380         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7381
7382         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
7383 }
7384
7385 static struct mlx5_hlist_entry *
7386 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key,
7387                                    void *ctx __rte_unused)
7388 {
7389         struct mlx5_dev_ctx_shared *sh = list->ctx;
7390         struct tunnel_tbl_entry *tte;
7391         union tunnel_tbl_key tbl = {
7392                 .val = key,
7393         };
7394
7395         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
7396                           sizeof(*tte), 0,
7397                           SOCKET_ID_ANY);
7398         if (!tte)
7399                 goto err;
7400         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7401                           &tte->flow_table);
7402         if (tte->flow_table >= MLX5_MAX_TABLES) {
7403                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
7404                         tte->flow_table);
7405                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7406                                 tte->flow_table);
7407                 goto err;
7408         } else if (!tte->flow_table) {
7409                 goto err;
7410         }
7411         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
7412         tte->tunnel_id = tbl.tunnel_id;
7413         tte->group = tbl.group;
7414         return &tte->hash;
7415 err:
7416         if (tte)
7417                 mlx5_free(tte);
7418         return NULL;
7419 }
7420
7421 static uint32_t
7422 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
7423                                 const struct mlx5_flow_tunnel *tunnel,
7424                                 uint32_t group, uint32_t *table,
7425                                 struct rte_flow_error *error)
7426 {
7427         struct mlx5_hlist_entry *he;
7428         struct tunnel_tbl_entry *tte;
7429         union tunnel_tbl_key key = {
7430                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
7431                 .group = group
7432         };
7433         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7434         struct mlx5_hlist *group_hash;
7435
7436         group_hash = tunnel ? tunnel->groups : thub->groups;
7437         he = mlx5_hlist_register(group_hash, key.val, NULL);
7438         if (!he)
7439                 return rte_flow_error_set(error, EINVAL,
7440                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7441                                           NULL,
7442                                           "tunnel group index not supported");
7443         tte = container_of(he, typeof(*tte), hash);
7444         *table = tte->flow_table;
7445         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7446                 dev->data->port_id, key.tunnel_id, group, *table);
7447         return 0;
7448 }
7449
7450 static void
7451 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
7452                       struct mlx5_flow_tunnel *tunnel)
7453 {
7454         struct mlx5_priv *priv = dev->data->dev_private;
7455         struct mlx5_indexed_pool *ipool;
7456
7457         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
7458                 dev->data->port_id, tunnel->tunnel_id);
7459         LIST_REMOVE(tunnel, chain);
7460         mlx5_hlist_destroy(tunnel->groups);
7461         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7462         mlx5_ipool_free(ipool, tunnel->tunnel_id);
7463 }
7464
7465 static bool
7466 mlx5_access_tunnel_offload_db
7467         (struct rte_eth_dev *dev,
7468          bool (*match)(struct rte_eth_dev *,
7469                        struct mlx5_flow_tunnel *, const void *),
7470          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7471          void (*miss)(struct rte_eth_dev *, void *),
7472          void *ctx, bool lock_op)
7473 {
7474         bool verdict = false;
7475         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7476         struct mlx5_flow_tunnel *tunnel;
7477
7478         rte_spinlock_lock(&thub->sl);
7479         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
7480                 verdict = match(dev, tunnel, (const void *)ctx);
7481                 if (verdict)
7482                         break;
7483         }
7484         if (!lock_op)
7485                 rte_spinlock_unlock(&thub->sl);
7486         if (verdict && hit)
7487                 hit(dev, tunnel, ctx);
7488         if (!verdict && miss)
7489                 miss(dev, ctx);
7490         if (lock_op)
7491                 rte_spinlock_unlock(&thub->sl);
7492
7493         return verdict;
7494 }
7495
7496 struct tunnel_db_find_tunnel_id_ctx {
7497         uint32_t tunnel_id;
7498         struct mlx5_flow_tunnel *tunnel;
7499 };
7500
7501 static bool
7502 find_tunnel_id_match(struct rte_eth_dev *dev,
7503                      struct mlx5_flow_tunnel *tunnel, const void *x)
7504 {
7505         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7506
7507         RTE_SET_USED(dev);
7508         return tunnel->tunnel_id == ctx->tunnel_id;
7509 }
7510
7511 static void
7512 find_tunnel_id_hit(struct rte_eth_dev *dev,
7513                    struct mlx5_flow_tunnel *tunnel, void *x)
7514 {
7515         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7516         RTE_SET_USED(dev);
7517         ctx->tunnel = tunnel;
7518 }
7519
7520 static struct mlx5_flow_tunnel *
7521 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
7522 {
7523         struct tunnel_db_find_tunnel_id_ctx ctx = {
7524                 .tunnel_id = id,
7525         };
7526
7527         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
7528                                       find_tunnel_id_hit, NULL, &ctx, true);
7529
7530         return ctx.tunnel;
7531 }
7532
7533 static struct mlx5_flow_tunnel *
7534 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
7535                           const struct rte_flow_tunnel *app_tunnel)
7536 {
7537         struct mlx5_priv *priv = dev->data->dev_private;
7538         struct mlx5_indexed_pool *ipool;
7539         struct mlx5_flow_tunnel *tunnel;
7540         uint32_t id;
7541
7542         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7543         tunnel = mlx5_ipool_zmalloc(ipool, &id);
7544         if (!tunnel)
7545                 return NULL;
7546         if (id >= MLX5_MAX_TUNNELS) {
7547                 mlx5_ipool_free(ipool, id);
7548                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
7549                 return NULL;
7550         }
7551         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
7552                                            mlx5_flow_tunnel_grp2tbl_create_cb,
7553                                            mlx5_flow_tunnel_grp2tbl_match_cb,
7554                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
7555         if (!tunnel->groups) {
7556                 mlx5_ipool_free(ipool, id);
7557                 return NULL;
7558         }
7559         tunnel->groups->ctx = priv->sh;
7560         /* initiate new PMD tunnel */
7561         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
7562         tunnel->tunnel_id = id;
7563         tunnel->action.type = (typeof(tunnel->action.type))
7564                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
7565         tunnel->action.conf = tunnel;
7566         tunnel->item.type = (typeof(tunnel->item.type))
7567                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
7568         tunnel->item.spec = tunnel;
7569         tunnel->item.last = NULL;
7570         tunnel->item.mask = NULL;
7571
7572         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
7573                 dev->data->port_id, tunnel->tunnel_id);
7574
7575         return tunnel;
7576 }
7577
7578 struct tunnel_db_get_tunnel_ctx {
7579         const struct rte_flow_tunnel *app_tunnel;
7580         struct mlx5_flow_tunnel *tunnel;
7581 };
7582
7583 static bool get_tunnel_match(struct rte_eth_dev *dev,
7584                              struct mlx5_flow_tunnel *tunnel, const void *x)
7585 {
7586         const struct tunnel_db_get_tunnel_ctx *ctx = x;
7587
7588         RTE_SET_USED(dev);
7589         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
7590                        sizeof(*ctx->app_tunnel));
7591 }
7592
7593 static void get_tunnel_hit(struct rte_eth_dev *dev,
7594                            struct mlx5_flow_tunnel *tunnel, void *x)
7595 {
7596         /* called under tunnel spinlock protection */
7597         struct tunnel_db_get_tunnel_ctx *ctx = x;
7598
7599         RTE_SET_USED(dev);
7600         tunnel->refctn++;
7601         ctx->tunnel = tunnel;
7602 }
7603
7604 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
7605 {
7606         /* called under tunnel spinlock protection */
7607         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7608         struct tunnel_db_get_tunnel_ctx *ctx = x;
7609
7610         rte_spinlock_unlock(&thub->sl);
7611         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
7612         ctx->tunnel->refctn = 1;
7613         rte_spinlock_lock(&thub->sl);
7614         if (ctx->tunnel)
7615                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
7616 }
7617
7618
7619 static int
7620 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
7621                      const struct rte_flow_tunnel *app_tunnel,
7622                      struct mlx5_flow_tunnel **tunnel)
7623 {
7624         struct tunnel_db_get_tunnel_ctx ctx = {
7625                 .app_tunnel = app_tunnel,
7626         };
7627
7628         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
7629                                       get_tunnel_miss, &ctx, true);
7630         *tunnel = ctx.tunnel;
7631         return ctx.tunnel ? 0 : -ENOMEM;
7632 }
7633
7634 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
7635 {
7636         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
7637
7638         if (!thub)
7639                 return;
7640         if (!LIST_EMPTY(&thub->tunnels))
7641                 DRV_LOG(WARNING, "port %u tunnels present\n", port_id);
7642         mlx5_hlist_destroy(thub->groups);
7643         mlx5_free(thub);
7644 }
7645
7646 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
7647 {
7648         int err;
7649         struct mlx5_flow_tunnel_hub *thub;
7650
7651         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
7652                            0, SOCKET_ID_ANY);
7653         if (!thub)
7654                 return -ENOMEM;
7655         LIST_INIT(&thub->tunnels);
7656         rte_spinlock_init(&thub->sl);
7657         thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES, 0,
7658                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
7659                                          mlx5_flow_tunnel_grp2tbl_match_cb,
7660                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
7661         if (!thub->groups) {
7662                 err = -rte_errno;
7663                 goto err;
7664         }
7665         thub->groups->ctx = sh;
7666         sh->tunnel_hub = thub;
7667
7668         return 0;
7669
7670 err:
7671         if (thub->groups)
7672                 mlx5_hlist_destroy(thub->groups);
7673         if (thub)
7674                 mlx5_free(thub);
7675         return err;
7676 }
7677
7678 static inline bool
7679 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
7680                           struct rte_flow_tunnel *tunnel,
7681                           const char *err_msg)
7682 {
7683         err_msg = NULL;
7684         if (!is_tunnel_offload_active(dev)) {
7685                 err_msg = "tunnel offload was not activated";
7686                 goto out;
7687         } else if (!tunnel) {
7688                 err_msg = "no application tunnel";
7689                 goto out;
7690         }
7691
7692         switch (tunnel->type) {
7693         default:
7694                 err_msg = "unsupported tunnel type";
7695                 goto out;
7696         case RTE_FLOW_ITEM_TYPE_VXLAN:
7697                 break;
7698         }
7699
7700 out:
7701         return !err_msg;
7702 }
7703
7704 static int
7705 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
7706                     struct rte_flow_tunnel *app_tunnel,
7707                     struct rte_flow_action **actions,
7708                     uint32_t *num_of_actions,
7709                     struct rte_flow_error *error)
7710 {
7711         int ret;
7712         struct mlx5_flow_tunnel *tunnel;
7713         const char *err_msg = NULL;
7714         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
7715
7716         if (!verdict)
7717                 return rte_flow_error_set(error, EINVAL,
7718                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
7719                                           err_msg);
7720         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
7721         if (ret < 0) {
7722                 return rte_flow_error_set(error, ret,
7723                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
7724                                           "failed to initialize pmd tunnel");
7725         }
7726         *actions = &tunnel->action;
7727         *num_of_actions = 1;
7728         return 0;
7729 }
7730
7731 static int
7732 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
7733                        struct rte_flow_tunnel *app_tunnel,
7734                        struct rte_flow_item **items,
7735                        uint32_t *num_of_items,
7736                        struct rte_flow_error *error)
7737 {
7738         int ret;
7739         struct mlx5_flow_tunnel *tunnel;
7740         const char *err_msg = NULL;
7741         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
7742
7743         if (!verdict)
7744                 return rte_flow_error_set(error, EINVAL,
7745                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
7746                                           err_msg);
7747         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
7748         if (ret < 0) {
7749                 return rte_flow_error_set(error, ret,
7750                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
7751                                           "failed to initialize pmd tunnel");
7752         }
7753         *items = &tunnel->item;
7754         *num_of_items = 1;
7755         return 0;
7756 }
7757
7758 struct tunnel_db_element_release_ctx {
7759         struct rte_flow_item *items;
7760         struct rte_flow_action *actions;
7761         uint32_t num_elements;
7762         struct rte_flow_error *error;
7763         int ret;
7764 };
7765
7766 static bool
7767 tunnel_element_release_match(struct rte_eth_dev *dev,
7768                              struct mlx5_flow_tunnel *tunnel, const void *x)
7769 {
7770         const struct tunnel_db_element_release_ctx *ctx = x;
7771
7772         RTE_SET_USED(dev);
7773         if (ctx->num_elements != 1)
7774                 return false;
7775         else if (ctx->items)
7776                 return ctx->items == &tunnel->item;
7777         else if (ctx->actions)
7778                 return ctx->actions == &tunnel->action;
7779
7780         return false;
7781 }
7782
7783 static void
7784 tunnel_element_release_hit(struct rte_eth_dev *dev,
7785                            struct mlx5_flow_tunnel *tunnel, void *x)
7786 {
7787         struct tunnel_db_element_release_ctx *ctx = x;
7788         ctx->ret = 0;
7789         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
7790                 mlx5_flow_tunnel_free(dev, tunnel);
7791 }
7792
7793 static void
7794 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
7795 {
7796         struct tunnel_db_element_release_ctx *ctx = x;
7797         RTE_SET_USED(dev);
7798         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
7799                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
7800                                       "invalid argument");
7801 }
7802
7803 static int
7804 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
7805                        struct rte_flow_item *pmd_items,
7806                        uint32_t num_items, struct rte_flow_error *err)
7807 {
7808         struct tunnel_db_element_release_ctx ctx = {
7809                 .items = pmd_items,
7810                 .actions = NULL,
7811                 .num_elements = num_items,
7812                 .error = err,
7813         };
7814
7815         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
7816                                       tunnel_element_release_hit,
7817                                       tunnel_element_release_miss, &ctx, false);
7818
7819         return ctx.ret;
7820 }
7821
7822 static int
7823 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
7824                          struct rte_flow_action *pmd_actions,
7825                          uint32_t num_actions, struct rte_flow_error *err)
7826 {
7827         struct tunnel_db_element_release_ctx ctx = {
7828                 .items = NULL,
7829                 .actions = pmd_actions,
7830                 .num_elements = num_actions,
7831                 .error = err,
7832         };
7833
7834         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
7835                                       tunnel_element_release_hit,
7836                                       tunnel_element_release_miss, &ctx, false);
7837
7838         return ctx.ret;
7839 }
7840
7841 static int
7842 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
7843                                   struct rte_mbuf *m,
7844                                   struct rte_flow_restore_info *info,
7845                                   struct rte_flow_error *err)
7846 {
7847         uint64_t ol_flags = m->ol_flags;
7848         const struct mlx5_flow_tbl_data_entry *tble;
7849         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
7850
7851         if (!is_tunnel_offload_active(dev)) {
7852                 info->flags = 0;
7853                 return 0;
7854         }
7855
7856         if ((ol_flags & mask) != mask)
7857                 goto err;
7858         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
7859         if (!tble) {
7860                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
7861                         dev->data->port_id, m->hash.fdir.hi);
7862                 goto err;
7863         }
7864         MLX5_ASSERT(tble->tunnel);
7865         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
7866         info->group_id = tble->group_id;
7867         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
7868                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
7869                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
7870
7871         return 0;
7872
7873 err:
7874         return rte_flow_error_set(err, EINVAL,
7875                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7876                                   "failed to get restore info");
7877 }
7878
7879 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
7880 static int
7881 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
7882                            __rte_unused struct rte_flow_tunnel *app_tunnel,
7883                            __rte_unused struct rte_flow_action **actions,
7884                            __rte_unused uint32_t *num_of_actions,
7885                            __rte_unused struct rte_flow_error *error)
7886 {
7887         return -ENOTSUP;
7888 }
7889
7890 static int
7891 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
7892                        __rte_unused struct rte_flow_tunnel *app_tunnel,
7893                        __rte_unused struct rte_flow_item **items,
7894                        __rte_unused uint32_t *num_of_items,
7895                        __rte_unused struct rte_flow_error *error)
7896 {
7897         return -ENOTSUP;
7898 }
7899
7900 static int
7901 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
7902                               __rte_unused struct rte_flow_item *pmd_items,
7903                               __rte_unused uint32_t num_items,
7904                               __rte_unused struct rte_flow_error *err)
7905 {
7906         return -ENOTSUP;
7907 }
7908
7909 static int
7910 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
7911                                 __rte_unused struct rte_flow_action *pmd_action,
7912                                 __rte_unused uint32_t num_actions,
7913                                 __rte_unused struct rte_flow_error *err)
7914 {
7915         return -ENOTSUP;
7916 }
7917
7918 static int
7919 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
7920                                   __rte_unused struct rte_mbuf *m,
7921                                   __rte_unused struct rte_flow_restore_info *i,
7922                                   __rte_unused struct rte_flow_error *err)
7923 {
7924         return -ENOTSUP;
7925 }
7926
7927 static int
7928 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
7929                              __rte_unused struct rte_flow *flow,
7930                              __rte_unused const struct rte_flow_attr *attr,
7931                              __rte_unused const struct rte_flow_action *actions,
7932                              __rte_unused uint32_t flow_idx,
7933                              __rte_unused struct tunnel_default_miss_ctx *ctx,
7934                              __rte_unused struct rte_flow_error *error)
7935 {
7936         return -ENOTSUP;
7937 }
7938
7939 static struct mlx5_flow_tunnel *
7940 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
7941                     __rte_unused uint32_t id)
7942 {
7943         return NULL;
7944 }
7945
7946 static void
7947 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
7948                       __rte_unused struct mlx5_flow_tunnel *tunnel)
7949 {
7950 }
7951
7952 static uint32_t
7953 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
7954                                 __rte_unused const struct mlx5_flow_tunnel *t,
7955                                 __rte_unused uint32_t group,
7956                                 __rte_unused uint32_t *table,
7957                                 struct rte_flow_error *error)
7958 {
7959         return rte_flow_error_set(error, ENOTSUP,
7960                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7961                                   "tunnel offload requires DV support");
7962 }
7963
7964 void
7965 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
7966                         __rte_unused  uint16_t port_id)
7967 {
7968 }
7969 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
7970