1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
6 #include <netinet/in.h>
13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
15 #pragma GCC diagnostic ignored "-Wpedantic"
17 #include <infiniband/verbs.h>
19 #pragma GCC diagnostic error "-Wpedantic"
22 #include <rte_common.h>
23 #include <rte_ether.h>
24 #include <rte_ethdev_driver.h>
26 #include <rte_flow_driver.h>
27 #include <rte_malloc.h>
31 #include "mlx5_defs.h"
32 #include "mlx5_flow.h"
33 #include "mlx5_glue.h"
35 #include "mlx5_rxtx.h"
37 /* Dev ops structure defined in mlx5.c */
38 extern const struct eth_dev_ops mlx5_dev_ops;
39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
41 /** Device flow drivers. */
42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
50 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
52 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
54 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
55 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
60 MLX5_EXPANSION_ROOT_OUTER,
61 MLX5_EXPANSION_ROOT_ETH_VLAN,
62 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
63 MLX5_EXPANSION_OUTER_ETH,
64 MLX5_EXPANSION_OUTER_ETH_VLAN,
65 MLX5_EXPANSION_OUTER_VLAN,
66 MLX5_EXPANSION_OUTER_IPV4,
67 MLX5_EXPANSION_OUTER_IPV4_UDP,
68 MLX5_EXPANSION_OUTER_IPV4_TCP,
69 MLX5_EXPANSION_OUTER_IPV6,
70 MLX5_EXPANSION_OUTER_IPV6_UDP,
71 MLX5_EXPANSION_OUTER_IPV6_TCP,
73 MLX5_EXPANSION_VXLAN_GPE,
77 MLX5_EXPANSION_ETH_VLAN,
80 MLX5_EXPANSION_IPV4_UDP,
81 MLX5_EXPANSION_IPV4_TCP,
83 MLX5_EXPANSION_IPV6_UDP,
84 MLX5_EXPANSION_IPV6_TCP,
87 /** Supported expansion of items. */
88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
89 [MLX5_EXPANSION_ROOT] = {
90 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
93 .type = RTE_FLOW_ITEM_TYPE_END,
95 [MLX5_EXPANSION_ROOT_OUTER] = {
96 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
97 MLX5_EXPANSION_OUTER_IPV4,
98 MLX5_EXPANSION_OUTER_IPV6),
99 .type = RTE_FLOW_ITEM_TYPE_END,
101 [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
102 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
103 .type = RTE_FLOW_ITEM_TYPE_END,
105 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
106 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
107 .type = RTE_FLOW_ITEM_TYPE_END,
109 [MLX5_EXPANSION_OUTER_ETH] = {
110 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
111 MLX5_EXPANSION_OUTER_IPV6,
112 MLX5_EXPANSION_MPLS),
113 .type = RTE_FLOW_ITEM_TYPE_ETH,
116 [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
117 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
118 .type = RTE_FLOW_ITEM_TYPE_ETH,
121 [MLX5_EXPANSION_OUTER_VLAN] = {
122 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
123 MLX5_EXPANSION_OUTER_IPV6),
124 .type = RTE_FLOW_ITEM_TYPE_VLAN,
126 [MLX5_EXPANSION_OUTER_IPV4] = {
127 .next = RTE_FLOW_EXPAND_RSS_NEXT
128 (MLX5_EXPANSION_OUTER_IPV4_UDP,
129 MLX5_EXPANSION_OUTER_IPV4_TCP,
132 MLX5_EXPANSION_IPV6),
133 .type = RTE_FLOW_ITEM_TYPE_IPV4,
134 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
135 ETH_RSS_NONFRAG_IPV4_OTHER,
137 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
138 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
139 MLX5_EXPANSION_VXLAN_GPE),
140 .type = RTE_FLOW_ITEM_TYPE_UDP,
141 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
143 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
144 .type = RTE_FLOW_ITEM_TYPE_TCP,
145 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
147 [MLX5_EXPANSION_OUTER_IPV6] = {
148 .next = RTE_FLOW_EXPAND_RSS_NEXT
149 (MLX5_EXPANSION_OUTER_IPV6_UDP,
150 MLX5_EXPANSION_OUTER_IPV6_TCP,
152 MLX5_EXPANSION_IPV6),
153 .type = RTE_FLOW_ITEM_TYPE_IPV6,
154 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
155 ETH_RSS_NONFRAG_IPV6_OTHER,
157 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
158 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
159 MLX5_EXPANSION_VXLAN_GPE),
160 .type = RTE_FLOW_ITEM_TYPE_UDP,
161 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
163 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
164 .type = RTE_FLOW_ITEM_TYPE_TCP,
165 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
167 [MLX5_EXPANSION_VXLAN] = {
168 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
169 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
171 [MLX5_EXPANSION_VXLAN_GPE] = {
172 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
174 MLX5_EXPANSION_IPV6),
175 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
177 [MLX5_EXPANSION_GRE] = {
178 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
179 .type = RTE_FLOW_ITEM_TYPE_GRE,
181 [MLX5_EXPANSION_MPLS] = {
182 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
183 MLX5_EXPANSION_IPV6),
184 .type = RTE_FLOW_ITEM_TYPE_MPLS,
186 [MLX5_EXPANSION_ETH] = {
187 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
188 MLX5_EXPANSION_IPV6),
189 .type = RTE_FLOW_ITEM_TYPE_ETH,
191 [MLX5_EXPANSION_ETH_VLAN] = {
192 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
193 .type = RTE_FLOW_ITEM_TYPE_ETH,
195 [MLX5_EXPANSION_VLAN] = {
196 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
197 MLX5_EXPANSION_IPV6),
198 .type = RTE_FLOW_ITEM_TYPE_VLAN,
200 [MLX5_EXPANSION_IPV4] = {
201 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
202 MLX5_EXPANSION_IPV4_TCP),
203 .type = RTE_FLOW_ITEM_TYPE_IPV4,
204 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
205 ETH_RSS_NONFRAG_IPV4_OTHER,
207 [MLX5_EXPANSION_IPV4_UDP] = {
208 .type = RTE_FLOW_ITEM_TYPE_UDP,
209 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
211 [MLX5_EXPANSION_IPV4_TCP] = {
212 .type = RTE_FLOW_ITEM_TYPE_TCP,
213 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
215 [MLX5_EXPANSION_IPV6] = {
216 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
217 MLX5_EXPANSION_IPV6_TCP),
218 .type = RTE_FLOW_ITEM_TYPE_IPV6,
219 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
220 ETH_RSS_NONFRAG_IPV6_OTHER,
222 [MLX5_EXPANSION_IPV6_UDP] = {
223 .type = RTE_FLOW_ITEM_TYPE_UDP,
224 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
226 [MLX5_EXPANSION_IPV6_TCP] = {
227 .type = RTE_FLOW_ITEM_TYPE_TCP,
228 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
232 static const struct rte_flow_ops mlx5_flow_ops = {
233 .validate = mlx5_flow_validate,
234 .create = mlx5_flow_create,
235 .destroy = mlx5_flow_destroy,
236 .flush = mlx5_flow_flush,
237 .isolate = mlx5_flow_isolate,
238 .query = mlx5_flow_query,
241 /* Convert FDIR request to Generic flow. */
243 struct rte_flow_attr attr;
244 struct rte_flow_item items[4];
245 struct rte_flow_item_eth l2;
246 struct rte_flow_item_eth l2_mask;
248 struct rte_flow_item_ipv4 ipv4;
249 struct rte_flow_item_ipv6 ipv6;
252 struct rte_flow_item_ipv4 ipv4;
253 struct rte_flow_item_ipv6 ipv6;
256 struct rte_flow_item_udp udp;
257 struct rte_flow_item_tcp tcp;
260 struct rte_flow_item_udp udp;
261 struct rte_flow_item_tcp tcp;
263 struct rte_flow_action actions[2];
264 struct rte_flow_action_queue queue;
267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
269 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
274 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
275 { 9, 10, 11 }, { 12, 13, 14 },
278 /* Tunnel information. */
279 struct mlx5_flow_tunnel_info {
280 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
281 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
286 .tunnel = MLX5_FLOW_LAYER_VXLAN,
287 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
290 .tunnel = MLX5_FLOW_LAYER_GENEVE,
291 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
294 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
295 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
298 .tunnel = MLX5_FLOW_LAYER_GRE,
299 .ptype = RTE_PTYPE_TUNNEL_GRE,
302 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
303 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
306 .tunnel = MLX5_FLOW_LAYER_MPLS,
307 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
310 .tunnel = MLX5_FLOW_LAYER_NVGRE,
311 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
314 .tunnel = MLX5_FLOW_LAYER_IPIP,
315 .ptype = RTE_PTYPE_TUNNEL_IP,
318 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
319 .ptype = RTE_PTYPE_TUNNEL_IP,
324 * Translate tag ID to register.
327 * Pointer to the Ethernet device structure.
329 * The feature that request the register.
331 * The request register ID.
333 * Error description in case of any.
336 * The request register on success, a negative errno
337 * value otherwise and rte_errno is set.
340 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
341 enum mlx5_feature_name feature,
343 struct rte_flow_error *error)
345 struct mlx5_priv *priv = dev->data->dev_private;
346 struct mlx5_dev_config *config = &priv->config;
347 enum modify_reg start_reg;
350 case MLX5_HAIRPIN_RX:
352 case MLX5_HAIRPIN_TX:
354 case MLX5_METADATA_RX:
355 switch (config->dv_xmeta_en) {
356 case MLX5_XMETA_MODE_LEGACY:
358 case MLX5_XMETA_MODE_META16:
360 case MLX5_XMETA_MODE_META32:
364 case MLX5_METADATA_TX:
366 case MLX5_METADATA_FDB:
369 switch (config->dv_xmeta_en) {
370 case MLX5_XMETA_MODE_LEGACY:
372 case MLX5_XMETA_MODE_META16:
374 case MLX5_XMETA_MODE_META32:
381 * Metadata COPY_MARK register using is in meter suffix sub
382 * flow while with meter. It's safe to share the same register.
384 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
386 RTE_ASSERT(priv->mtr_color_reg != REG_NONE);
387 return priv->mtr_color_reg;
390 * If meter is enable, it will engage two registers for color
391 * match and flow match. If meter color match is not using the
392 * REG_C_2, need to skip the REG_C_x be used by meter color
394 * If meter is disable, free to use all available registers.
396 if (priv->mtr_color_reg != REG_NONE)
397 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_3 :
401 if (id > (REG_C_7 - start_reg))
402 return rte_flow_error_set(error, EINVAL,
403 RTE_FLOW_ERROR_TYPE_ITEM,
404 NULL, "invalid tag id");
405 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
406 return rte_flow_error_set(error, ENOTSUP,
407 RTE_FLOW_ERROR_TYPE_ITEM,
408 NULL, "unsupported tag id");
410 * This case means meter is using the REG_C_x great than 2.
411 * Take care not to conflict with meter color REG_C_x.
412 * If the available index REG_C_y >= REG_C_x, skip the
415 if (start_reg == REG_C_3 && config->flow_mreg_c
416 [id + REG_C_3 - REG_C_0] >= priv->mtr_color_reg) {
417 if (config->flow_mreg_c[id + 1 + REG_C_3 - REG_C_0] !=
419 return config->flow_mreg_c
420 [id + 1 + REG_C_3 - REG_C_0];
421 return rte_flow_error_set(error, ENOTSUP,
422 RTE_FLOW_ERROR_TYPE_ITEM,
423 NULL, "unsupported tag id");
425 return config->flow_mreg_c[id + start_reg - REG_C_0];
428 return rte_flow_error_set(error, EINVAL,
429 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
430 NULL, "invalid feature name");
434 * Check extensive flow metadata register support.
437 * Pointer to rte_eth_dev structure.
440 * True if device supports extensive flow metadata register, otherwise false.
443 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
445 struct mlx5_priv *priv = dev->data->dev_private;
446 struct mlx5_dev_config *config = &priv->config;
449 * Having available reg_c can be regarded inclusively as supporting
450 * extensive flow metadata register, which could mean,
451 * - metadata register copy action by modify header.
452 * - 16 modify header actions is supported.
453 * - reg_c's are preserved across different domain (FDB and NIC) on
454 * packet loopback by flow lookup miss.
456 return config->flow_mreg_c[2] != REG_NONE;
460 * Discover the maximum number of priority available.
463 * Pointer to the Ethernet device structure.
466 * number of supported flow priority on success, a negative errno
467 * value otherwise and rte_errno is set.
470 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
472 struct mlx5_priv *priv = dev->data->dev_private;
474 struct ibv_flow_attr attr;
475 struct ibv_flow_spec_eth eth;
476 struct ibv_flow_spec_action_drop drop;
480 .port = (uint8_t)priv->ibv_port,
483 .type = IBV_FLOW_SPEC_ETH,
484 .size = sizeof(struct ibv_flow_spec_eth),
487 .size = sizeof(struct ibv_flow_spec_action_drop),
488 .type = IBV_FLOW_SPEC_ACTION_DROP,
491 struct ibv_flow *flow;
492 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
493 uint16_t vprio[] = { 8, 16 };
501 for (i = 0; i != RTE_DIM(vprio); i++) {
502 flow_attr.attr.priority = vprio[i] - 1;
503 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
506 claim_zero(mlx5_glue->destroy_flow(flow));
509 mlx5_hrxq_drop_release(dev);
512 priority = RTE_DIM(priority_map_3);
515 priority = RTE_DIM(priority_map_5);
520 "port %u verbs maximum priority: %d expected 8/16",
521 dev->data->port_id, priority);
524 DRV_LOG(INFO, "port %u flow maximum priority: %d",
525 dev->data->port_id, priority);
530 * Adjust flow priority based on the highest layer and the request priority.
533 * Pointer to the Ethernet device structure.
534 * @param[in] priority
535 * The rule base priority.
536 * @param[in] subpriority
537 * The priority based on the items.
542 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
543 uint32_t subpriority)
546 struct mlx5_priv *priv = dev->data->dev_private;
548 switch (priv->config.flow_prio) {
549 case RTE_DIM(priority_map_3):
550 res = priority_map_3[priority][subpriority];
552 case RTE_DIM(priority_map_5):
553 res = priority_map_5[priority][subpriority];
560 * Verify the @p item specifications (spec, last, mask) are compatible with the
564 * Item specification.
566 * @p item->mask or flow default bit-masks.
567 * @param[in] nic_mask
568 * Bit-masks covering supported fields by the NIC to compare with user mask.
570 * Bit-masks size in bytes.
572 * Pointer to error structure.
575 * 0 on success, a negative errno value otherwise and rte_errno is set.
578 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
580 const uint8_t *nic_mask,
582 struct rte_flow_error *error)
587 for (i = 0; i < size; ++i)
588 if ((nic_mask[i] | mask[i]) != nic_mask[i])
589 return rte_flow_error_set(error, ENOTSUP,
590 RTE_FLOW_ERROR_TYPE_ITEM,
592 "mask enables non supported"
594 if (!item->spec && (item->mask || item->last))
595 return rte_flow_error_set(error, EINVAL,
596 RTE_FLOW_ERROR_TYPE_ITEM, item,
597 "mask/last without a spec is not"
599 if (item->spec && item->last) {
605 for (i = 0; i < size; ++i) {
606 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
607 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
609 ret = memcmp(spec, last, size);
611 return rte_flow_error_set(error, EINVAL,
612 RTE_FLOW_ERROR_TYPE_ITEM,
614 "range is not valid");
620 * Adjust the hash fields according to the @p flow information.
622 * @param[in] dev_flow.
623 * Pointer to the mlx5_flow.
625 * 1 when the hash field is for a tunnel item.
626 * @param[in] layer_types
628 * @param[in] hash_fields
632 * The hash fields that should be used.
635 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
636 int tunnel __rte_unused, uint64_t layer_types,
637 uint64_t hash_fields)
639 struct rte_flow *flow = dev_flow->flow;
640 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
641 int rss_request_inner = flow->rss.level >= 2;
643 /* Check RSS hash level for tunnel. */
644 if (tunnel && rss_request_inner)
645 hash_fields |= IBV_RX_HASH_INNER;
646 else if (tunnel || rss_request_inner)
649 /* Check if requested layer matches RSS hash fields. */
650 if (!(flow->rss.types & layer_types))
656 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
657 * if several tunnel rules are used on this queue, the tunnel ptype will be
661 * Rx queue to update.
664 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
667 uint32_t tunnel_ptype = 0;
669 /* Look up for the ptype to use. */
670 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
671 if (!rxq_ctrl->flow_tunnels_n[i])
674 tunnel_ptype = tunnels_info[i].ptype;
680 rxq_ctrl->rxq.tunnel = tunnel_ptype;
684 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
688 * Pointer to the Ethernet device structure.
689 * @param[in] dev_flow
690 * Pointer to device flow structure.
693 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
695 struct mlx5_priv *priv = dev->data->dev_private;
696 struct rte_flow *flow = dev_flow->flow;
697 const int mark = !!(dev_flow->actions &
698 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
699 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
702 for (i = 0; i != flow->rss.queue_num; ++i) {
703 int idx = (*flow->rss.queue)[i];
704 struct mlx5_rxq_ctrl *rxq_ctrl =
705 container_of((*priv->rxqs)[idx],
706 struct mlx5_rxq_ctrl, rxq);
709 * To support metadata register copy on Tx loopback,
710 * this must be always enabled (metadata may arive
711 * from other port - not from local flows only.
713 if (priv->config.dv_flow_en &&
714 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
715 mlx5_flow_ext_mreg_supported(dev)) {
716 rxq_ctrl->rxq.mark = 1;
717 rxq_ctrl->flow_mark_n = 1;
719 rxq_ctrl->rxq.mark = 1;
720 rxq_ctrl->flow_mark_n++;
725 /* Increase the counter matching the flow. */
726 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
727 if ((tunnels_info[j].tunnel &
729 tunnels_info[j].tunnel) {
730 rxq_ctrl->flow_tunnels_n[j]++;
734 flow_rxq_tunnel_ptype_update(rxq_ctrl);
740 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
743 * Pointer to the Ethernet device structure.
745 * Pointer to flow structure.
748 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
750 struct mlx5_flow *dev_flow;
752 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
753 flow_drv_rxq_flags_set(dev, dev_flow);
757 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
758 * device flow if no other flow uses it with the same kind of request.
761 * Pointer to Ethernet device.
762 * @param[in] dev_flow
763 * Pointer to the device flow.
766 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
768 struct mlx5_priv *priv = dev->data->dev_private;
769 struct rte_flow *flow = dev_flow->flow;
770 const int mark = !!(dev_flow->actions &
771 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
772 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
775 assert(dev->data->dev_started);
776 for (i = 0; i != flow->rss.queue_num; ++i) {
777 int idx = (*flow->rss.queue)[i];
778 struct mlx5_rxq_ctrl *rxq_ctrl =
779 container_of((*priv->rxqs)[idx],
780 struct mlx5_rxq_ctrl, rxq);
782 if (priv->config.dv_flow_en &&
783 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
784 mlx5_flow_ext_mreg_supported(dev)) {
785 rxq_ctrl->rxq.mark = 1;
786 rxq_ctrl->flow_mark_n = 1;
788 rxq_ctrl->flow_mark_n--;
789 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
794 /* Decrease the counter matching the flow. */
795 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
796 if ((tunnels_info[j].tunnel &
798 tunnels_info[j].tunnel) {
799 rxq_ctrl->flow_tunnels_n[j]--;
803 flow_rxq_tunnel_ptype_update(rxq_ctrl);
809 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
810 * @p flow if no other flow uses it with the same kind of request.
813 * Pointer to Ethernet device.
815 * Pointer to the flow.
818 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
820 struct mlx5_flow *dev_flow;
822 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
823 flow_drv_rxq_flags_trim(dev, dev_flow);
827 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
830 * Pointer to Ethernet device.
833 flow_rxq_flags_clear(struct rte_eth_dev *dev)
835 struct mlx5_priv *priv = dev->data->dev_private;
838 for (i = 0; i != priv->rxqs_n; ++i) {
839 struct mlx5_rxq_ctrl *rxq_ctrl;
842 if (!(*priv->rxqs)[i])
844 rxq_ctrl = container_of((*priv->rxqs)[i],
845 struct mlx5_rxq_ctrl, rxq);
846 rxq_ctrl->flow_mark_n = 0;
847 rxq_ctrl->rxq.mark = 0;
848 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
849 rxq_ctrl->flow_tunnels_n[j] = 0;
850 rxq_ctrl->rxq.tunnel = 0;
855 * return a pointer to the desired action in the list of actions.
858 * The list of actions to search the action in.
860 * The action to find.
863 * Pointer to the action in the list, if found. NULL otherwise.
865 const struct rte_flow_action *
866 mlx5_flow_find_action(const struct rte_flow_action *actions,
867 enum rte_flow_action_type action)
871 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
872 if (actions->type == action)
878 * Validate the flag action.
880 * @param[in] action_flags
881 * Bit-fields that holds the actions detected until now.
883 * Attributes of flow that includes this action.
885 * Pointer to error structure.
888 * 0 on success, a negative errno value otherwise and rte_errno is set.
891 mlx5_flow_validate_action_flag(uint64_t action_flags,
892 const struct rte_flow_attr *attr,
893 struct rte_flow_error *error)
896 if (action_flags & MLX5_FLOW_ACTION_DROP)
897 return rte_flow_error_set(error, EINVAL,
898 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
899 "can't drop and flag in same flow");
900 if (action_flags & MLX5_FLOW_ACTION_MARK)
901 return rte_flow_error_set(error, EINVAL,
902 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
903 "can't mark and flag in same flow");
904 if (action_flags & MLX5_FLOW_ACTION_FLAG)
905 return rte_flow_error_set(error, EINVAL,
906 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
908 " actions in same flow");
910 return rte_flow_error_set(error, ENOTSUP,
911 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
912 "flag action not supported for "
918 * Validate the mark action.
921 * Pointer to the queue action.
922 * @param[in] action_flags
923 * Bit-fields that holds the actions detected until now.
925 * Attributes of flow that includes this action.
927 * Pointer to error structure.
930 * 0 on success, a negative errno value otherwise and rte_errno is set.
933 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
934 uint64_t action_flags,
935 const struct rte_flow_attr *attr,
936 struct rte_flow_error *error)
938 const struct rte_flow_action_mark *mark = action->conf;
941 return rte_flow_error_set(error, EINVAL,
942 RTE_FLOW_ERROR_TYPE_ACTION,
944 "configuration cannot be null");
945 if (mark->id >= MLX5_FLOW_MARK_MAX)
946 return rte_flow_error_set(error, EINVAL,
947 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
949 "mark id must in 0 <= id < "
950 RTE_STR(MLX5_FLOW_MARK_MAX));
951 if (action_flags & MLX5_FLOW_ACTION_DROP)
952 return rte_flow_error_set(error, EINVAL,
953 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
954 "can't drop and mark in same flow");
955 if (action_flags & MLX5_FLOW_ACTION_FLAG)
956 return rte_flow_error_set(error, EINVAL,
957 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
958 "can't flag and mark in same flow");
959 if (action_flags & MLX5_FLOW_ACTION_MARK)
960 return rte_flow_error_set(error, EINVAL,
961 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
962 "can't have 2 mark actions in same"
965 return rte_flow_error_set(error, ENOTSUP,
966 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
967 "mark action not supported for "
973 * Validate the drop action.
975 * @param[in] action_flags
976 * Bit-fields that holds the actions detected until now.
978 * Attributes of flow that includes this action.
980 * Pointer to error structure.
983 * 0 on success, a negative errno value otherwise and rte_errno is set.
986 mlx5_flow_validate_action_drop(uint64_t action_flags,
987 const struct rte_flow_attr *attr,
988 struct rte_flow_error *error)
990 if (action_flags & MLX5_FLOW_ACTION_FLAG)
991 return rte_flow_error_set(error, EINVAL,
992 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
993 "can't drop and flag in same flow");
994 if (action_flags & MLX5_FLOW_ACTION_MARK)
995 return rte_flow_error_set(error, EINVAL,
996 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
997 "can't drop and mark in same flow");
998 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
999 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
1000 return rte_flow_error_set(error, EINVAL,
1001 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1002 "can't have 2 fate actions in"
1005 return rte_flow_error_set(error, ENOTSUP,
1006 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1007 "drop action not supported for "
1013 * Validate the queue action.
1016 * Pointer to the queue action.
1017 * @param[in] action_flags
1018 * Bit-fields that holds the actions detected until now.
1020 * Pointer to the Ethernet device structure.
1022 * Attributes of flow that includes this action.
1024 * Pointer to error structure.
1027 * 0 on success, a negative errno value otherwise and rte_errno is set.
1030 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1031 uint64_t action_flags,
1032 struct rte_eth_dev *dev,
1033 const struct rte_flow_attr *attr,
1034 struct rte_flow_error *error)
1036 struct mlx5_priv *priv = dev->data->dev_private;
1037 const struct rte_flow_action_queue *queue = action->conf;
1039 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1040 return rte_flow_error_set(error, EINVAL,
1041 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1042 "can't have 2 fate actions in"
1045 return rte_flow_error_set(error, EINVAL,
1046 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1047 NULL, "No Rx queues configured");
1048 if (queue->index >= priv->rxqs_n)
1049 return rte_flow_error_set(error, EINVAL,
1050 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1052 "queue index out of range");
1053 if (!(*priv->rxqs)[queue->index])
1054 return rte_flow_error_set(error, EINVAL,
1055 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1057 "queue is not configured");
1059 return rte_flow_error_set(error, ENOTSUP,
1060 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1061 "queue action not supported for "
1067 * Validate the rss action.
1070 * Pointer to the queue action.
1071 * @param[in] action_flags
1072 * Bit-fields that holds the actions detected until now.
1074 * Pointer to the Ethernet device structure.
1076 * Attributes of flow that includes this action.
1077 * @param[in] item_flags
1078 * Items that were detected.
1080 * Pointer to error structure.
1083 * 0 on success, a negative errno value otherwise and rte_errno is set.
1086 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1087 uint64_t action_flags,
1088 struct rte_eth_dev *dev,
1089 const struct rte_flow_attr *attr,
1090 uint64_t item_flags,
1091 struct rte_flow_error *error)
1093 struct mlx5_priv *priv = dev->data->dev_private;
1094 const struct rte_flow_action_rss *rss = action->conf;
1095 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1098 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1099 return rte_flow_error_set(error, EINVAL,
1100 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1101 "can't have 2 fate actions"
1103 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1104 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1105 return rte_flow_error_set(error, ENOTSUP,
1106 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1108 "RSS hash function not supported");
1109 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1114 return rte_flow_error_set(error, ENOTSUP,
1115 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1117 "tunnel RSS is not supported");
1118 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1119 if (rss->key_len == 0 && rss->key != NULL)
1120 return rte_flow_error_set(error, ENOTSUP,
1121 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1123 "RSS hash key length 0");
1124 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1125 return rte_flow_error_set(error, ENOTSUP,
1126 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1128 "RSS hash key too small");
1129 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1130 return rte_flow_error_set(error, ENOTSUP,
1131 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1133 "RSS hash key too large");
1134 if (rss->queue_num > priv->config.ind_table_max_size)
1135 return rte_flow_error_set(error, ENOTSUP,
1136 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1138 "number of queues too large");
1139 if (rss->types & MLX5_RSS_HF_MASK)
1140 return rte_flow_error_set(error, ENOTSUP,
1141 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1143 "some RSS protocols are not"
1146 return rte_flow_error_set(error, EINVAL,
1147 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1148 NULL, "No Rx queues configured");
1149 if (!rss->queue_num)
1150 return rte_flow_error_set(error, EINVAL,
1151 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1152 NULL, "No queues configured");
1153 for (i = 0; i != rss->queue_num; ++i) {
1154 if (!(*priv->rxqs)[rss->queue[i]])
1155 return rte_flow_error_set
1156 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1157 &rss->queue[i], "queue is not configured");
1160 return rte_flow_error_set(error, ENOTSUP,
1161 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1162 "rss action not supported for "
1164 if (rss->level > 1 && !tunnel)
1165 return rte_flow_error_set(error, EINVAL,
1166 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1167 "inner RSS is not supported for "
1168 "non-tunnel flows");
1173 * Validate the count action.
1176 * Pointer to the Ethernet device structure.
1178 * Attributes of flow that includes this action.
1180 * Pointer to error structure.
1183 * 0 on success, a negative errno value otherwise and rte_errno is set.
1186 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1187 const struct rte_flow_attr *attr,
1188 struct rte_flow_error *error)
1191 return rte_flow_error_set(error, ENOTSUP,
1192 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1193 "count action not supported for "
1199 * Verify the @p attributes will be correctly understood by the NIC and store
1200 * them in the @p flow if everything is correct.
1203 * Pointer to the Ethernet device structure.
1204 * @param[in] attributes
1205 * Pointer to flow attributes
1207 * Pointer to error structure.
1210 * 0 on success, a negative errno value otherwise and rte_errno is set.
1213 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1214 const struct rte_flow_attr *attributes,
1215 struct rte_flow_error *error)
1217 struct mlx5_priv *priv = dev->data->dev_private;
1218 uint32_t priority_max = priv->config.flow_prio - 1;
1220 if (attributes->group)
1221 return rte_flow_error_set(error, ENOTSUP,
1222 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1223 NULL, "groups is not supported");
1224 if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1225 attributes->priority >= priority_max)
1226 return rte_flow_error_set(error, ENOTSUP,
1227 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1228 NULL, "priority out of range");
1229 if (attributes->egress)
1230 return rte_flow_error_set(error, ENOTSUP,
1231 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1232 "egress is not supported");
1233 if (attributes->transfer && !priv->config.dv_esw_en)
1234 return rte_flow_error_set(error, ENOTSUP,
1235 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1236 NULL, "transfer is not supported");
1237 if (!attributes->ingress)
1238 return rte_flow_error_set(error, EINVAL,
1239 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1241 "ingress attribute is mandatory");
1246 * Validate ICMP6 item.
1249 * Item specification.
1250 * @param[in] item_flags
1251 * Bit-fields that holds the items detected until now.
1253 * Pointer to error structure.
1256 * 0 on success, a negative errno value otherwise and rte_errno is set.
1259 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1260 uint64_t item_flags,
1261 uint8_t target_protocol,
1262 struct rte_flow_error *error)
1264 const struct rte_flow_item_icmp6 *mask = item->mask;
1265 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1266 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1267 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1268 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1269 MLX5_FLOW_LAYER_OUTER_L4;
1272 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1273 return rte_flow_error_set(error, EINVAL,
1274 RTE_FLOW_ERROR_TYPE_ITEM, item,
1275 "protocol filtering not compatible"
1276 " with ICMP6 layer");
1277 if (!(item_flags & l3m))
1278 return rte_flow_error_set(error, EINVAL,
1279 RTE_FLOW_ERROR_TYPE_ITEM, item,
1280 "IPv6 is mandatory to filter on"
1282 if (item_flags & l4m)
1283 return rte_flow_error_set(error, EINVAL,
1284 RTE_FLOW_ERROR_TYPE_ITEM, item,
1285 "multiple L4 layers not supported");
1287 mask = &rte_flow_item_icmp6_mask;
1288 ret = mlx5_flow_item_acceptable
1289 (item, (const uint8_t *)mask,
1290 (const uint8_t *)&rte_flow_item_icmp6_mask,
1291 sizeof(struct rte_flow_item_icmp6), error);
1298 * Validate ICMP item.
1301 * Item specification.
1302 * @param[in] item_flags
1303 * Bit-fields that holds the items detected until now.
1305 * Pointer to error structure.
1308 * 0 on success, a negative errno value otherwise and rte_errno is set.
1311 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1312 uint64_t item_flags,
1313 uint8_t target_protocol,
1314 struct rte_flow_error *error)
1316 const struct rte_flow_item_icmp *mask = item->mask;
1317 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1318 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1319 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1320 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1321 MLX5_FLOW_LAYER_OUTER_L4;
1324 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1325 return rte_flow_error_set(error, EINVAL,
1326 RTE_FLOW_ERROR_TYPE_ITEM, item,
1327 "protocol filtering not compatible"
1328 " with ICMP layer");
1329 if (!(item_flags & l3m))
1330 return rte_flow_error_set(error, EINVAL,
1331 RTE_FLOW_ERROR_TYPE_ITEM, item,
1332 "IPv4 is mandatory to filter"
1334 if (item_flags & l4m)
1335 return rte_flow_error_set(error, EINVAL,
1336 RTE_FLOW_ERROR_TYPE_ITEM, item,
1337 "multiple L4 layers not supported");
1339 mask = &rte_flow_item_icmp_mask;
1340 ret = mlx5_flow_item_acceptable
1341 (item, (const uint8_t *)mask,
1342 (const uint8_t *)&rte_flow_item_icmp_mask,
1343 sizeof(struct rte_flow_item_icmp), error);
1350 * Validate Ethernet item.
1353 * Item specification.
1354 * @param[in] item_flags
1355 * Bit-fields that holds the items detected until now.
1357 * Pointer to error structure.
1360 * 0 on success, a negative errno value otherwise and rte_errno is set.
1363 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1364 uint64_t item_flags,
1365 struct rte_flow_error *error)
1367 const struct rte_flow_item_eth *mask = item->mask;
1368 const struct rte_flow_item_eth nic_mask = {
1369 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1370 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1371 .type = RTE_BE16(0xffff),
1374 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1375 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1376 MLX5_FLOW_LAYER_OUTER_L2;
1378 if (item_flags & ethm)
1379 return rte_flow_error_set(error, ENOTSUP,
1380 RTE_FLOW_ERROR_TYPE_ITEM, item,
1381 "multiple L2 layers not supported");
1382 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1383 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1384 return rte_flow_error_set(error, EINVAL,
1385 RTE_FLOW_ERROR_TYPE_ITEM, item,
1386 "L2 layer should not follow "
1388 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1389 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1390 return rte_flow_error_set(error, EINVAL,
1391 RTE_FLOW_ERROR_TYPE_ITEM, item,
1392 "L2 layer should not follow VLAN");
1394 mask = &rte_flow_item_eth_mask;
1395 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1396 (const uint8_t *)&nic_mask,
1397 sizeof(struct rte_flow_item_eth),
1403 * Validate VLAN item.
1406 * Item specification.
1407 * @param[in] item_flags
1408 * Bit-fields that holds the items detected until now.
1410 * Ethernet device flow is being created on.
1412 * Pointer to error structure.
1415 * 0 on success, a negative errno value otherwise and rte_errno is set.
1418 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1419 uint64_t item_flags,
1420 struct rte_eth_dev *dev,
1421 struct rte_flow_error *error)
1423 const struct rte_flow_item_vlan *spec = item->spec;
1424 const struct rte_flow_item_vlan *mask = item->mask;
1425 const struct rte_flow_item_vlan nic_mask = {
1426 .tci = RTE_BE16(UINT16_MAX),
1427 .inner_type = RTE_BE16(UINT16_MAX),
1429 uint16_t vlan_tag = 0;
1430 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1432 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1433 MLX5_FLOW_LAYER_INNER_L4) :
1434 (MLX5_FLOW_LAYER_OUTER_L3 |
1435 MLX5_FLOW_LAYER_OUTER_L4);
1436 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1437 MLX5_FLOW_LAYER_OUTER_VLAN;
1439 if (item_flags & vlanm)
1440 return rte_flow_error_set(error, EINVAL,
1441 RTE_FLOW_ERROR_TYPE_ITEM, item,
1442 "multiple VLAN layers not supported");
1443 else if ((item_flags & l34m) != 0)
1444 return rte_flow_error_set(error, EINVAL,
1445 RTE_FLOW_ERROR_TYPE_ITEM, item,
1446 "VLAN cannot follow L3/L4 layer");
1448 mask = &rte_flow_item_vlan_mask;
1449 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1450 (const uint8_t *)&nic_mask,
1451 sizeof(struct rte_flow_item_vlan),
1455 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1456 struct mlx5_priv *priv = dev->data->dev_private;
1458 if (priv->vmwa_context) {
1460 * Non-NULL context means we have a virtual machine
1461 * and SR-IOV enabled, we have to create VLAN interface
1462 * to make hypervisor to setup E-Switch vport
1463 * context correctly. We avoid creating the multiple
1464 * VLAN interfaces, so we cannot support VLAN tag mask.
1466 return rte_flow_error_set(error, EINVAL,
1467 RTE_FLOW_ERROR_TYPE_ITEM,
1469 "VLAN tag mask is not"
1470 " supported in virtual"
1475 vlan_tag = spec->tci;
1476 vlan_tag &= mask->tci;
1479 * From verbs perspective an empty VLAN is equivalent
1480 * to a packet without VLAN layer.
1483 return rte_flow_error_set(error, EINVAL,
1484 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1486 "VLAN cannot be empty");
1491 * Validate IPV4 item.
1494 * Item specification.
1495 * @param[in] item_flags
1496 * Bit-fields that holds the items detected until now.
1497 * @param[in] acc_mask
1498 * Acceptable mask, if NULL default internal default mask
1499 * will be used to check whether item fields are supported.
1501 * Pointer to error structure.
1504 * 0 on success, a negative errno value otherwise and rte_errno is set.
1507 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1508 uint64_t item_flags,
1510 uint16_t ether_type,
1511 const struct rte_flow_item_ipv4 *acc_mask,
1512 struct rte_flow_error *error)
1514 const struct rte_flow_item_ipv4 *mask = item->mask;
1515 const struct rte_flow_item_ipv4 *spec = item->spec;
1516 const struct rte_flow_item_ipv4 nic_mask = {
1518 .src_addr = RTE_BE32(0xffffffff),
1519 .dst_addr = RTE_BE32(0xffffffff),
1520 .type_of_service = 0xff,
1521 .next_proto_id = 0xff,
1524 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1525 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1526 MLX5_FLOW_LAYER_OUTER_L3;
1527 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1528 MLX5_FLOW_LAYER_OUTER_L4;
1530 uint8_t next_proto = 0xFF;
1531 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1532 MLX5_FLOW_LAYER_OUTER_VLAN |
1533 MLX5_FLOW_LAYER_INNER_VLAN);
1535 if ((last_item & l2_vlan) && ether_type &&
1536 ether_type != RTE_ETHER_TYPE_IPV4)
1537 return rte_flow_error_set(error, EINVAL,
1538 RTE_FLOW_ERROR_TYPE_ITEM, item,
1539 "IPv4 cannot follow L2/VLAN layer "
1540 "which ether type is not IPv4");
1541 if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1543 next_proto = mask->hdr.next_proto_id &
1544 spec->hdr.next_proto_id;
1545 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1546 return rte_flow_error_set(error, EINVAL,
1547 RTE_FLOW_ERROR_TYPE_ITEM,
1552 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1553 return rte_flow_error_set(error, EINVAL,
1554 RTE_FLOW_ERROR_TYPE_ITEM, item,
1555 "wrong tunnel type - IPv6 specified "
1556 "but IPv4 item provided");
1557 if (item_flags & l3m)
1558 return rte_flow_error_set(error, ENOTSUP,
1559 RTE_FLOW_ERROR_TYPE_ITEM, item,
1560 "multiple L3 layers not supported");
1561 else if (item_flags & l4m)
1562 return rte_flow_error_set(error, EINVAL,
1563 RTE_FLOW_ERROR_TYPE_ITEM, item,
1564 "L3 cannot follow an L4 layer.");
1565 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1566 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1567 return rte_flow_error_set(error, EINVAL,
1568 RTE_FLOW_ERROR_TYPE_ITEM, item,
1569 "L3 cannot follow an NVGRE layer.");
1571 mask = &rte_flow_item_ipv4_mask;
1572 else if (mask->hdr.next_proto_id != 0 &&
1573 mask->hdr.next_proto_id != 0xff)
1574 return rte_flow_error_set(error, EINVAL,
1575 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1576 "partial mask is not supported"
1578 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1579 acc_mask ? (const uint8_t *)acc_mask
1580 : (const uint8_t *)&nic_mask,
1581 sizeof(struct rte_flow_item_ipv4),
1589 * Validate IPV6 item.
1592 * Item specification.
1593 * @param[in] item_flags
1594 * Bit-fields that holds the items detected until now.
1595 * @param[in] acc_mask
1596 * Acceptable mask, if NULL default internal default mask
1597 * will be used to check whether item fields are supported.
1599 * Pointer to error structure.
1602 * 0 on success, a negative errno value otherwise and rte_errno is set.
1605 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1606 uint64_t item_flags,
1608 uint16_t ether_type,
1609 const struct rte_flow_item_ipv6 *acc_mask,
1610 struct rte_flow_error *error)
1612 const struct rte_flow_item_ipv6 *mask = item->mask;
1613 const struct rte_flow_item_ipv6 *spec = item->spec;
1614 const struct rte_flow_item_ipv6 nic_mask = {
1617 "\xff\xff\xff\xff\xff\xff\xff\xff"
1618 "\xff\xff\xff\xff\xff\xff\xff\xff",
1620 "\xff\xff\xff\xff\xff\xff\xff\xff"
1621 "\xff\xff\xff\xff\xff\xff\xff\xff",
1622 .vtc_flow = RTE_BE32(0xffffffff),
1627 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1628 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1629 MLX5_FLOW_LAYER_OUTER_L3;
1630 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1631 MLX5_FLOW_LAYER_OUTER_L4;
1633 uint8_t next_proto = 0xFF;
1634 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1635 MLX5_FLOW_LAYER_OUTER_VLAN |
1636 MLX5_FLOW_LAYER_INNER_VLAN);
1638 if ((last_item & l2_vlan) && ether_type &&
1639 ether_type != RTE_ETHER_TYPE_IPV6)
1640 return rte_flow_error_set(error, EINVAL,
1641 RTE_FLOW_ERROR_TYPE_ITEM, item,
1642 "IPv6 cannot follow L2/VLAN layer "
1643 "which ether type is not IPv6");
1644 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1646 next_proto = mask->hdr.proto & spec->hdr.proto;
1647 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1648 return rte_flow_error_set(error, EINVAL,
1649 RTE_FLOW_ERROR_TYPE_ITEM,
1654 if (item_flags & MLX5_FLOW_LAYER_IPIP)
1655 return rte_flow_error_set(error, EINVAL,
1656 RTE_FLOW_ERROR_TYPE_ITEM, item,
1657 "wrong tunnel type - IPv4 specified "
1658 "but IPv6 item provided");
1659 if (item_flags & l3m)
1660 return rte_flow_error_set(error, ENOTSUP,
1661 RTE_FLOW_ERROR_TYPE_ITEM, item,
1662 "multiple L3 layers not supported");
1663 else if (item_flags & l4m)
1664 return rte_flow_error_set(error, EINVAL,
1665 RTE_FLOW_ERROR_TYPE_ITEM, item,
1666 "L3 cannot follow an L4 layer.");
1667 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1668 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1669 return rte_flow_error_set(error, EINVAL,
1670 RTE_FLOW_ERROR_TYPE_ITEM, item,
1671 "L3 cannot follow an NVGRE layer.");
1673 mask = &rte_flow_item_ipv6_mask;
1674 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1675 acc_mask ? (const uint8_t *)acc_mask
1676 : (const uint8_t *)&nic_mask,
1677 sizeof(struct rte_flow_item_ipv6),
1685 * Validate UDP item.
1688 * Item specification.
1689 * @param[in] item_flags
1690 * Bit-fields that holds the items detected until now.
1691 * @param[in] target_protocol
1692 * The next protocol in the previous item.
1693 * @param[in] flow_mask
1694 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1696 * Pointer to error structure.
1699 * 0 on success, a negative errno value otherwise and rte_errno is set.
1702 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1703 uint64_t item_flags,
1704 uint8_t target_protocol,
1705 struct rte_flow_error *error)
1707 const struct rte_flow_item_udp *mask = item->mask;
1708 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1709 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1710 MLX5_FLOW_LAYER_OUTER_L3;
1711 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1712 MLX5_FLOW_LAYER_OUTER_L4;
1715 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1716 return rte_flow_error_set(error, EINVAL,
1717 RTE_FLOW_ERROR_TYPE_ITEM, item,
1718 "protocol filtering not compatible"
1720 if (!(item_flags & l3m))
1721 return rte_flow_error_set(error, EINVAL,
1722 RTE_FLOW_ERROR_TYPE_ITEM, item,
1723 "L3 is mandatory to filter on L4");
1724 if (item_flags & l4m)
1725 return rte_flow_error_set(error, EINVAL,
1726 RTE_FLOW_ERROR_TYPE_ITEM, item,
1727 "multiple L4 layers not supported");
1729 mask = &rte_flow_item_udp_mask;
1730 ret = mlx5_flow_item_acceptable
1731 (item, (const uint8_t *)mask,
1732 (const uint8_t *)&rte_flow_item_udp_mask,
1733 sizeof(struct rte_flow_item_udp), error);
1740 * Validate TCP item.
1743 * Item specification.
1744 * @param[in] item_flags
1745 * Bit-fields that holds the items detected until now.
1746 * @param[in] target_protocol
1747 * The next protocol in the previous item.
1749 * Pointer to error structure.
1752 * 0 on success, a negative errno value otherwise and rte_errno is set.
1755 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1756 uint64_t item_flags,
1757 uint8_t target_protocol,
1758 const struct rte_flow_item_tcp *flow_mask,
1759 struct rte_flow_error *error)
1761 const struct rte_flow_item_tcp *mask = item->mask;
1762 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1763 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1764 MLX5_FLOW_LAYER_OUTER_L3;
1765 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1766 MLX5_FLOW_LAYER_OUTER_L4;
1770 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1771 return rte_flow_error_set(error, EINVAL,
1772 RTE_FLOW_ERROR_TYPE_ITEM, item,
1773 "protocol filtering not compatible"
1775 if (!(item_flags & l3m))
1776 return rte_flow_error_set(error, EINVAL,
1777 RTE_FLOW_ERROR_TYPE_ITEM, item,
1778 "L3 is mandatory to filter on L4");
1779 if (item_flags & l4m)
1780 return rte_flow_error_set(error, EINVAL,
1781 RTE_FLOW_ERROR_TYPE_ITEM, item,
1782 "multiple L4 layers not supported");
1784 mask = &rte_flow_item_tcp_mask;
1785 ret = mlx5_flow_item_acceptable
1786 (item, (const uint8_t *)mask,
1787 (const uint8_t *)flow_mask,
1788 sizeof(struct rte_flow_item_tcp), error);
1795 * Validate VXLAN item.
1798 * Item specification.
1799 * @param[in] item_flags
1800 * Bit-fields that holds the items detected until now.
1801 * @param[in] target_protocol
1802 * The next protocol in the previous item.
1804 * Pointer to error structure.
1807 * 0 on success, a negative errno value otherwise and rte_errno is set.
1810 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1811 uint64_t item_flags,
1812 struct rte_flow_error *error)
1814 const struct rte_flow_item_vxlan *spec = item->spec;
1815 const struct rte_flow_item_vxlan *mask = item->mask;
1820 } id = { .vlan_id = 0, };
1821 uint32_t vlan_id = 0;
1824 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1825 return rte_flow_error_set(error, ENOTSUP,
1826 RTE_FLOW_ERROR_TYPE_ITEM, item,
1827 "multiple tunnel layers not"
1830 * Verify only UDPv4 is present as defined in
1831 * https://tools.ietf.org/html/rfc7348
1833 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1834 return rte_flow_error_set(error, EINVAL,
1835 RTE_FLOW_ERROR_TYPE_ITEM, item,
1836 "no outer UDP layer found");
1838 mask = &rte_flow_item_vxlan_mask;
1839 ret = mlx5_flow_item_acceptable
1840 (item, (const uint8_t *)mask,
1841 (const uint8_t *)&rte_flow_item_vxlan_mask,
1842 sizeof(struct rte_flow_item_vxlan),
1847 memcpy(&id.vni[1], spec->vni, 3);
1848 vlan_id = id.vlan_id;
1849 memcpy(&id.vni[1], mask->vni, 3);
1850 vlan_id &= id.vlan_id;
1853 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1854 * only this layer is defined in the Verbs specification it is
1855 * interpreted as wildcard and all packets will match this
1856 * rule, if it follows a full stack layer (ex: eth / ipv4 /
1857 * udp), all packets matching the layers before will also
1858 * match this rule. To avoid such situation, VNI 0 is
1859 * currently refused.
1862 return rte_flow_error_set(error, ENOTSUP,
1863 RTE_FLOW_ERROR_TYPE_ITEM, item,
1864 "VXLAN vni cannot be 0");
1865 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1866 return rte_flow_error_set(error, ENOTSUP,
1867 RTE_FLOW_ERROR_TYPE_ITEM, item,
1868 "VXLAN tunnel must be fully defined");
1873 * Validate VXLAN_GPE item.
1876 * Item specification.
1877 * @param[in] item_flags
1878 * Bit-fields that holds the items detected until now.
1880 * Pointer to the private data structure.
1881 * @param[in] target_protocol
1882 * The next protocol in the previous item.
1884 * Pointer to error structure.
1887 * 0 on success, a negative errno value otherwise and rte_errno is set.
1890 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1891 uint64_t item_flags,
1892 struct rte_eth_dev *dev,
1893 struct rte_flow_error *error)
1895 struct mlx5_priv *priv = dev->data->dev_private;
1896 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1897 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1902 } id = { .vlan_id = 0, };
1903 uint32_t vlan_id = 0;
1905 if (!priv->config.l3_vxlan_en)
1906 return rte_flow_error_set(error, ENOTSUP,
1907 RTE_FLOW_ERROR_TYPE_ITEM, item,
1908 "L3 VXLAN is not enabled by device"
1909 " parameter and/or not configured in"
1911 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1912 return rte_flow_error_set(error, ENOTSUP,
1913 RTE_FLOW_ERROR_TYPE_ITEM, item,
1914 "multiple tunnel layers not"
1917 * Verify only UDPv4 is present as defined in
1918 * https://tools.ietf.org/html/rfc7348
1920 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1921 return rte_flow_error_set(error, EINVAL,
1922 RTE_FLOW_ERROR_TYPE_ITEM, item,
1923 "no outer UDP layer found");
1925 mask = &rte_flow_item_vxlan_gpe_mask;
1926 ret = mlx5_flow_item_acceptable
1927 (item, (const uint8_t *)mask,
1928 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1929 sizeof(struct rte_flow_item_vxlan_gpe),
1935 return rte_flow_error_set(error, ENOTSUP,
1936 RTE_FLOW_ERROR_TYPE_ITEM,
1938 "VxLAN-GPE protocol"
1940 memcpy(&id.vni[1], spec->vni, 3);
1941 vlan_id = id.vlan_id;
1942 memcpy(&id.vni[1], mask->vni, 3);
1943 vlan_id &= id.vlan_id;
1946 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1947 * layer is defined in the Verbs specification it is interpreted as
1948 * wildcard and all packets will match this rule, if it follows a full
1949 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1950 * before will also match this rule. To avoid such situation, VNI 0
1951 * is currently refused.
1954 return rte_flow_error_set(error, ENOTSUP,
1955 RTE_FLOW_ERROR_TYPE_ITEM, item,
1956 "VXLAN-GPE vni cannot be 0");
1957 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1958 return rte_flow_error_set(error, ENOTSUP,
1959 RTE_FLOW_ERROR_TYPE_ITEM, item,
1960 "VXLAN-GPE tunnel must be fully"
1965 * Validate GRE Key item.
1968 * Item specification.
1969 * @param[in] item_flags
1970 * Bit flags to mark detected items.
1971 * @param[in] gre_item
1972 * Pointer to gre_item
1974 * Pointer to error structure.
1977 * 0 on success, a negative errno value otherwise and rte_errno is set.
1980 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1981 uint64_t item_flags,
1982 const struct rte_flow_item *gre_item,
1983 struct rte_flow_error *error)
1985 const rte_be32_t *mask = item->mask;
1987 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1988 const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1989 const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1991 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1992 return rte_flow_error_set(error, ENOTSUP,
1993 RTE_FLOW_ERROR_TYPE_ITEM, item,
1994 "Multiple GRE key not support");
1995 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1996 return rte_flow_error_set(error, ENOTSUP,
1997 RTE_FLOW_ERROR_TYPE_ITEM, item,
1998 "No preceding GRE header");
1999 if (item_flags & MLX5_FLOW_LAYER_INNER)
2000 return rte_flow_error_set(error, ENOTSUP,
2001 RTE_FLOW_ERROR_TYPE_ITEM, item,
2002 "GRE key following a wrong item");
2004 gre_mask = &rte_flow_item_gre_mask;
2005 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2006 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2007 return rte_flow_error_set(error, EINVAL,
2008 RTE_FLOW_ERROR_TYPE_ITEM, item,
2009 "Key bit must be on");
2012 mask = &gre_key_default_mask;
2013 ret = mlx5_flow_item_acceptable
2014 (item, (const uint8_t *)mask,
2015 (const uint8_t *)&gre_key_default_mask,
2016 sizeof(rte_be32_t), error);
2021 * Validate GRE item.
2024 * Item specification.
2025 * @param[in] item_flags
2026 * Bit flags to mark detected items.
2027 * @param[in] target_protocol
2028 * The next protocol in the previous item.
2030 * Pointer to error structure.
2033 * 0 on success, a negative errno value otherwise and rte_errno is set.
2036 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2037 uint64_t item_flags,
2038 uint8_t target_protocol,
2039 struct rte_flow_error *error)
2041 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2042 const struct rte_flow_item_gre *mask = item->mask;
2044 const struct rte_flow_item_gre nic_mask = {
2045 .c_rsvd0_ver = RTE_BE16(0xB000),
2046 .protocol = RTE_BE16(UINT16_MAX),
2049 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2050 return rte_flow_error_set(error, EINVAL,
2051 RTE_FLOW_ERROR_TYPE_ITEM, item,
2052 "protocol filtering not compatible"
2053 " with this GRE layer");
2054 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2055 return rte_flow_error_set(error, ENOTSUP,
2056 RTE_FLOW_ERROR_TYPE_ITEM, item,
2057 "multiple tunnel layers not"
2059 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2060 return rte_flow_error_set(error, ENOTSUP,
2061 RTE_FLOW_ERROR_TYPE_ITEM, item,
2062 "L3 Layer is missing");
2064 mask = &rte_flow_item_gre_mask;
2065 ret = mlx5_flow_item_acceptable
2066 (item, (const uint8_t *)mask,
2067 (const uint8_t *)&nic_mask,
2068 sizeof(struct rte_flow_item_gre), error);
2071 #ifndef HAVE_MLX5DV_DR
2072 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2073 if (spec && (spec->protocol & mask->protocol))
2074 return rte_flow_error_set(error, ENOTSUP,
2075 RTE_FLOW_ERROR_TYPE_ITEM, item,
2076 "without MPLS support the"
2077 " specification cannot be used for"
2085 * Validate Geneve item.
2088 * Item specification.
2089 * @param[in] itemFlags
2090 * Bit-fields that holds the items detected until now.
2092 * Pointer to the private data structure.
2094 * Pointer to error structure.
2097 * 0 on success, a negative errno value otherwise and rte_errno is set.
2101 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2102 uint64_t item_flags,
2103 struct rte_eth_dev *dev,
2104 struct rte_flow_error *error)
2106 struct mlx5_priv *priv = dev->data->dev_private;
2107 const struct rte_flow_item_geneve *spec = item->spec;
2108 const struct rte_flow_item_geneve *mask = item->mask;
2111 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2112 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2113 const struct rte_flow_item_geneve nic_mask = {
2114 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2115 .vni = "\xff\xff\xff",
2116 .protocol = RTE_BE16(UINT16_MAX),
2119 if (!(priv->config.hca_attr.flex_parser_protocols &
2120 MLX5_HCA_FLEX_GENEVE_ENABLED) ||
2121 !priv->config.hca_attr.tunnel_stateless_geneve_rx)
2122 return rte_flow_error_set(error, ENOTSUP,
2123 RTE_FLOW_ERROR_TYPE_ITEM, item,
2124 "L3 Geneve is not enabled by device"
2125 " parameter and/or not configured in"
2127 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2128 return rte_flow_error_set(error, ENOTSUP,
2129 RTE_FLOW_ERROR_TYPE_ITEM, item,
2130 "multiple tunnel layers not"
2133 * Verify only UDPv4 is present as defined in
2134 * https://tools.ietf.org/html/rfc7348
2136 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2137 return rte_flow_error_set(error, EINVAL,
2138 RTE_FLOW_ERROR_TYPE_ITEM, item,
2139 "no outer UDP layer found");
2141 mask = &rte_flow_item_geneve_mask;
2142 ret = mlx5_flow_item_acceptable
2143 (item, (const uint8_t *)mask,
2144 (const uint8_t *)&nic_mask,
2145 sizeof(struct rte_flow_item_geneve), error);
2149 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2150 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2151 MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2152 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2153 return rte_flow_error_set(error, ENOTSUP,
2154 RTE_FLOW_ERROR_TYPE_ITEM,
2156 "Geneve protocol unsupported"
2157 " fields are being used");
2158 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2159 return rte_flow_error_set
2161 RTE_FLOW_ERROR_TYPE_ITEM,
2163 "Unsupported Geneve options length");
2165 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2166 return rte_flow_error_set
2168 RTE_FLOW_ERROR_TYPE_ITEM, item,
2169 "Geneve tunnel must be fully defined");
2174 * Validate MPLS item.
2177 * Pointer to the rte_eth_dev structure.
2179 * Item specification.
2180 * @param[in] item_flags
2181 * Bit-fields that holds the items detected until now.
2182 * @param[in] prev_layer
2183 * The protocol layer indicated in previous item.
2185 * Pointer to error structure.
2188 * 0 on success, a negative errno value otherwise and rte_errno is set.
2191 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2192 const struct rte_flow_item *item __rte_unused,
2193 uint64_t item_flags __rte_unused,
2194 uint64_t prev_layer __rte_unused,
2195 struct rte_flow_error *error)
2197 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2198 const struct rte_flow_item_mpls *mask = item->mask;
2199 struct mlx5_priv *priv = dev->data->dev_private;
2202 if (!priv->config.mpls_en)
2203 return rte_flow_error_set(error, ENOTSUP,
2204 RTE_FLOW_ERROR_TYPE_ITEM, item,
2205 "MPLS not supported or"
2206 " disabled in firmware"
2208 /* MPLS over IP, UDP, GRE is allowed */
2209 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2210 MLX5_FLOW_LAYER_OUTER_L4_UDP |
2211 MLX5_FLOW_LAYER_GRE)))
2212 return rte_flow_error_set(error, EINVAL,
2213 RTE_FLOW_ERROR_TYPE_ITEM, item,
2214 "protocol filtering not compatible"
2215 " with MPLS layer");
2216 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2217 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2218 !(item_flags & MLX5_FLOW_LAYER_GRE))
2219 return rte_flow_error_set(error, ENOTSUP,
2220 RTE_FLOW_ERROR_TYPE_ITEM, item,
2221 "multiple tunnel layers not"
2224 mask = &rte_flow_item_mpls_mask;
2225 ret = mlx5_flow_item_acceptable
2226 (item, (const uint8_t *)mask,
2227 (const uint8_t *)&rte_flow_item_mpls_mask,
2228 sizeof(struct rte_flow_item_mpls), error);
2233 return rte_flow_error_set(error, ENOTSUP,
2234 RTE_FLOW_ERROR_TYPE_ITEM, item,
2235 "MPLS is not supported by Verbs, please"
2240 * Validate NVGRE item.
2243 * Item specification.
2244 * @param[in] item_flags
2245 * Bit flags to mark detected items.
2246 * @param[in] target_protocol
2247 * The next protocol in the previous item.
2249 * Pointer to error structure.
2252 * 0 on success, a negative errno value otherwise and rte_errno is set.
2255 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2256 uint64_t item_flags,
2257 uint8_t target_protocol,
2258 struct rte_flow_error *error)
2260 const struct rte_flow_item_nvgre *mask = item->mask;
2263 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2264 return rte_flow_error_set(error, EINVAL,
2265 RTE_FLOW_ERROR_TYPE_ITEM, item,
2266 "protocol filtering not compatible"
2267 " with this GRE layer");
2268 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2269 return rte_flow_error_set(error, ENOTSUP,
2270 RTE_FLOW_ERROR_TYPE_ITEM, item,
2271 "multiple tunnel layers not"
2273 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2274 return rte_flow_error_set(error, ENOTSUP,
2275 RTE_FLOW_ERROR_TYPE_ITEM, item,
2276 "L3 Layer is missing");
2278 mask = &rte_flow_item_nvgre_mask;
2279 ret = mlx5_flow_item_acceptable
2280 (item, (const uint8_t *)mask,
2281 (const uint8_t *)&rte_flow_item_nvgre_mask,
2282 sizeof(struct rte_flow_item_nvgre), error);
2288 /* Allocate unique ID for the split Q/RSS subflows. */
2290 flow_qrss_get_id(struct rte_eth_dev *dev)
2292 struct mlx5_priv *priv = dev->data->dev_private;
2293 uint32_t qrss_id, ret;
2295 ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2302 /* Free unique ID for the split Q/RSS subflows. */
2304 flow_qrss_free_id(struct rte_eth_dev *dev, uint32_t qrss_id)
2306 struct mlx5_priv *priv = dev->data->dev_private;
2309 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2313 * Release resource related QUEUE/RSS action split.
2316 * Pointer to Ethernet device.
2318 * Flow to release id's from.
2321 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2322 struct rte_flow *flow)
2324 struct mlx5_flow *dev_flow;
2326 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
2327 if (dev_flow->qrss_id)
2328 flow_qrss_free_id(dev, dev_flow->qrss_id);
2332 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2333 const struct rte_flow_attr *attr __rte_unused,
2334 const struct rte_flow_item items[] __rte_unused,
2335 const struct rte_flow_action actions[] __rte_unused,
2336 bool external __rte_unused,
2337 struct rte_flow_error *error)
2339 return rte_flow_error_set(error, ENOTSUP,
2340 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2343 static struct mlx5_flow *
2344 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2345 const struct rte_flow_item items[] __rte_unused,
2346 const struct rte_flow_action actions[] __rte_unused,
2347 struct rte_flow_error *error)
2349 rte_flow_error_set(error, ENOTSUP,
2350 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2355 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2356 struct mlx5_flow *dev_flow __rte_unused,
2357 const struct rte_flow_attr *attr __rte_unused,
2358 const struct rte_flow_item items[] __rte_unused,
2359 const struct rte_flow_action actions[] __rte_unused,
2360 struct rte_flow_error *error)
2362 return rte_flow_error_set(error, ENOTSUP,
2363 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2367 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2368 struct rte_flow *flow __rte_unused,
2369 struct rte_flow_error *error)
2371 return rte_flow_error_set(error, ENOTSUP,
2372 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2376 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2377 struct rte_flow *flow __rte_unused)
2382 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2383 struct rte_flow *flow __rte_unused)
2388 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2389 struct rte_flow *flow __rte_unused,
2390 const struct rte_flow_action *actions __rte_unused,
2391 void *data __rte_unused,
2392 struct rte_flow_error *error)
2394 return rte_flow_error_set(error, ENOTSUP,
2395 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2398 /* Void driver to protect from null pointer reference. */
2399 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2400 .validate = flow_null_validate,
2401 .prepare = flow_null_prepare,
2402 .translate = flow_null_translate,
2403 .apply = flow_null_apply,
2404 .remove = flow_null_remove,
2405 .destroy = flow_null_destroy,
2406 .query = flow_null_query,
2410 * Select flow driver type according to flow attributes and device
2414 * Pointer to the dev structure.
2416 * Pointer to the flow attributes.
2419 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2421 static enum mlx5_flow_drv_type
2422 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2424 struct mlx5_priv *priv = dev->data->dev_private;
2425 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2427 if (attr->transfer && priv->config.dv_esw_en)
2428 type = MLX5_FLOW_TYPE_DV;
2429 if (!attr->transfer)
2430 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2431 MLX5_FLOW_TYPE_VERBS;
2435 #define flow_get_drv_ops(type) flow_drv_ops[type]
2438 * Flow driver validation API. This abstracts calling driver specific functions.
2439 * The type of flow driver is determined according to flow attributes.
2442 * Pointer to the dev structure.
2444 * Pointer to the flow attributes.
2446 * Pointer to the list of items.
2447 * @param[in] actions
2448 * Pointer to the list of actions.
2449 * @param[in] external
2450 * This flow rule is created by request external to PMD.
2452 * Pointer to the error structure.
2455 * 0 on success, a negative errno value otherwise and rte_errno is set.
2458 flow_drv_validate(struct rte_eth_dev *dev,
2459 const struct rte_flow_attr *attr,
2460 const struct rte_flow_item items[],
2461 const struct rte_flow_action actions[],
2462 bool external, struct rte_flow_error *error)
2464 const struct mlx5_flow_driver_ops *fops;
2465 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2467 fops = flow_get_drv_ops(type);
2468 return fops->validate(dev, attr, items, actions, external, error);
2472 * Flow driver preparation API. This abstracts calling driver specific
2473 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2474 * calculates the size of memory required for device flow, allocates the memory,
2475 * initializes the device flow and returns the pointer.
2478 * This function initializes device flow structure such as dv or verbs in
2479 * struct mlx5_flow. However, it is caller's responsibility to initialize the
2480 * rest. For example, adding returning device flow to flow->dev_flow list and
2481 * setting backward reference to the flow should be done out of this function.
2482 * layers field is not filled either.
2485 * Pointer to the flow attributes.
2487 * Pointer to the list of items.
2488 * @param[in] actions
2489 * Pointer to the list of actions.
2491 * Pointer to the error structure.
2494 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
2496 static inline struct mlx5_flow *
2497 flow_drv_prepare(const struct rte_flow *flow,
2498 const struct rte_flow_attr *attr,
2499 const struct rte_flow_item items[],
2500 const struct rte_flow_action actions[],
2501 struct rte_flow_error *error)
2503 const struct mlx5_flow_driver_ops *fops;
2504 enum mlx5_flow_drv_type type = flow->drv_type;
2506 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2507 fops = flow_get_drv_ops(type);
2508 return fops->prepare(attr, items, actions, error);
2512 * Flow driver translation API. This abstracts calling driver specific
2513 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2514 * translates a generic flow into a driver flow. flow_drv_prepare() must
2518 * dev_flow->layers could be filled as a result of parsing during translation
2519 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2520 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2521 * flow->actions could be overwritten even though all the expanded dev_flows
2522 * have the same actions.
2525 * Pointer to the rte dev structure.
2526 * @param[in, out] dev_flow
2527 * Pointer to the mlx5 flow.
2529 * Pointer to the flow attributes.
2531 * Pointer to the list of items.
2532 * @param[in] actions
2533 * Pointer to the list of actions.
2535 * Pointer to the error structure.
2538 * 0 on success, a negative errno value otherwise and rte_errno is set.
2541 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2542 const struct rte_flow_attr *attr,
2543 const struct rte_flow_item items[],
2544 const struct rte_flow_action actions[],
2545 struct rte_flow_error *error)
2547 const struct mlx5_flow_driver_ops *fops;
2548 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2550 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2551 fops = flow_get_drv_ops(type);
2552 return fops->translate(dev, dev_flow, attr, items, actions, error);
2556 * Flow driver apply API. This abstracts calling driver specific functions.
2557 * Parent flow (rte_flow) should have driver type (drv_type). It applies
2558 * translated driver flows on to device. flow_drv_translate() must precede.
2561 * Pointer to Ethernet device structure.
2562 * @param[in, out] flow
2563 * Pointer to flow structure.
2565 * Pointer to error structure.
2568 * 0 on success, a negative errno value otherwise and rte_errno is set.
2571 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2572 struct rte_flow_error *error)
2574 const struct mlx5_flow_driver_ops *fops;
2575 enum mlx5_flow_drv_type type = flow->drv_type;
2577 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2578 fops = flow_get_drv_ops(type);
2579 return fops->apply(dev, flow, error);
2583 * Flow driver remove API. This abstracts calling driver specific functions.
2584 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2585 * on device. All the resources of the flow should be freed by calling
2586 * flow_drv_destroy().
2589 * Pointer to Ethernet device.
2590 * @param[in, out] flow
2591 * Pointer to flow structure.
2594 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2596 const struct mlx5_flow_driver_ops *fops;
2597 enum mlx5_flow_drv_type type = flow->drv_type;
2599 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2600 fops = flow_get_drv_ops(type);
2601 fops->remove(dev, flow);
2605 * Flow driver destroy API. This abstracts calling driver specific functions.
2606 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2607 * on device and releases resources of the flow.
2610 * Pointer to Ethernet device.
2611 * @param[in, out] flow
2612 * Pointer to flow structure.
2615 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2617 const struct mlx5_flow_driver_ops *fops;
2618 enum mlx5_flow_drv_type type = flow->drv_type;
2620 flow_mreg_split_qrss_release(dev, flow);
2621 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2622 fops = flow_get_drv_ops(type);
2623 fops->destroy(dev, flow);
2627 * Validate a flow supported by the NIC.
2629 * @see rte_flow_validate()
2633 mlx5_flow_validate(struct rte_eth_dev *dev,
2634 const struct rte_flow_attr *attr,
2635 const struct rte_flow_item items[],
2636 const struct rte_flow_action actions[],
2637 struct rte_flow_error *error)
2641 ret = flow_drv_validate(dev, attr, items, actions, true, error);
2648 * Get RSS action from the action list.
2650 * @param[in] actions
2651 * Pointer to the list of actions.
2654 * Pointer to the RSS action if exist, else return NULL.
2656 static const struct rte_flow_action_rss*
2657 flow_get_rss_action(const struct rte_flow_action actions[])
2659 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2660 switch (actions->type) {
2661 case RTE_FLOW_ACTION_TYPE_RSS:
2662 return (const struct rte_flow_action_rss *)
2672 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2674 const struct rte_flow_item *item;
2675 unsigned int has_vlan = 0;
2677 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2678 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2684 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2685 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2686 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2687 MLX5_EXPANSION_ROOT_OUTER;
2691 * Get QUEUE/RSS action from the action list.
2693 * @param[in] actions
2694 * Pointer to the list of actions.
2696 * Pointer to the return pointer.
2697 * @param[out] qrss_type
2698 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2699 * if no QUEUE/RSS is found.
2702 * Total number of actions.
2705 flow_parse_qrss_action(const struct rte_flow_action actions[],
2706 const struct rte_flow_action **qrss)
2710 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2711 switch (actions->type) {
2712 case RTE_FLOW_ACTION_TYPE_QUEUE:
2713 case RTE_FLOW_ACTION_TYPE_RSS:
2721 /* Count RTE_FLOW_ACTION_TYPE_END. */
2722 return actions_n + 1;
2726 * Check if the flow should be splited due to hairpin.
2727 * The reason for the split is that in current HW we can't
2728 * support encap on Rx, so if a flow have encap we move it
2732 * Pointer to Ethernet device.
2734 * Flow rule attributes.
2735 * @param[in] actions
2736 * Associated actions (list terminated by the END action).
2739 * > 0 the number of actions and the flow should be split,
2740 * 0 when no split required.
2743 flow_check_hairpin_split(struct rte_eth_dev *dev,
2744 const struct rte_flow_attr *attr,
2745 const struct rte_flow_action actions[])
2747 int queue_action = 0;
2750 const struct rte_flow_action_queue *queue;
2751 const struct rte_flow_action_rss *rss;
2752 const struct rte_flow_action_raw_encap *raw_encap;
2756 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2757 switch (actions->type) {
2758 case RTE_FLOW_ACTION_TYPE_QUEUE:
2759 queue = actions->conf;
2760 if (mlx5_rxq_get_type(dev, queue->index) !=
2761 MLX5_RXQ_TYPE_HAIRPIN)
2766 case RTE_FLOW_ACTION_TYPE_RSS:
2767 rss = actions->conf;
2768 if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2769 MLX5_RXQ_TYPE_HAIRPIN)
2774 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2775 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2779 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2780 raw_encap = actions->conf;
2781 if (raw_encap->size >
2782 (sizeof(struct rte_flow_item_eth) +
2783 sizeof(struct rte_flow_item_ipv4)))
2792 if (encap == 1 && queue_action)
2797 /* Declare flow create/destroy prototype in advance. */
2798 static struct rte_flow *
2799 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2800 const struct rte_flow_attr *attr,
2801 const struct rte_flow_item items[],
2802 const struct rte_flow_action actions[],
2803 bool external, struct rte_flow_error *error);
2806 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2807 struct rte_flow *flow);
2810 * Add a flow of copying flow metadata registers in RX_CP_TBL.
2812 * As mark_id is unique, if there's already a registered flow for the mark_id,
2813 * return by increasing the reference counter of the resource. Otherwise, create
2814 * the resource (mcp_res) and flow.
2817 * - If ingress port is ANY and reg_c[1] is mark_id,
2818 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2820 * For default flow (zero mark_id), flow is like,
2821 * - If ingress port is ANY,
2822 * reg_b := reg_c[0] and jump to RX_ACT_TBL.
2825 * Pointer to Ethernet device.
2827 * ID of MARK action, zero means default flow for META.
2829 * Perform verbose error reporting if not NULL.
2832 * Associated resource on success, NULL otherwise and rte_errno is set.
2834 static struct mlx5_flow_mreg_copy_resource *
2835 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2836 struct rte_flow_error *error)
2838 struct mlx5_priv *priv = dev->data->dev_private;
2839 struct rte_flow_attr attr = {
2840 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2843 struct mlx5_rte_flow_item_tag tag_spec = {
2846 struct rte_flow_item items[] = {
2847 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2849 struct rte_flow_action_mark ftag = {
2852 struct mlx5_flow_action_copy_mreg cp_mreg = {
2856 struct rte_flow_action_jump jump = {
2857 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2859 struct rte_flow_action actions[] = {
2860 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2862 struct mlx5_flow_mreg_copy_resource *mcp_res;
2865 /* Fill the register fileds in the flow. */
2866 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2870 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
2874 /* Check if already registered. */
2875 assert(priv->mreg_cp_tbl);
2876 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
2878 /* For non-default rule. */
2881 assert(mark_id || mcp_res->refcnt == 1);
2884 /* Provide the full width of FLAG specific value. */
2885 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
2886 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
2887 /* Build a new flow. */
2889 items[0] = (struct rte_flow_item){
2890 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
2893 items[1] = (struct rte_flow_item){
2894 .type = RTE_FLOW_ITEM_TYPE_END,
2896 actions[0] = (struct rte_flow_action){
2897 .type = MLX5_RTE_FLOW_ACTION_TYPE_MARK,
2900 actions[1] = (struct rte_flow_action){
2901 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2904 actions[2] = (struct rte_flow_action){
2905 .type = RTE_FLOW_ACTION_TYPE_JUMP,
2908 actions[3] = (struct rte_flow_action){
2909 .type = RTE_FLOW_ACTION_TYPE_END,
2912 /* Default rule, wildcard match. */
2913 attr.priority = MLX5_FLOW_PRIO_RSVD;
2914 items[0] = (struct rte_flow_item){
2915 .type = RTE_FLOW_ITEM_TYPE_END,
2917 actions[0] = (struct rte_flow_action){
2918 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2921 actions[1] = (struct rte_flow_action){
2922 .type = RTE_FLOW_ACTION_TYPE_JUMP,
2925 actions[2] = (struct rte_flow_action){
2926 .type = RTE_FLOW_ACTION_TYPE_END,
2929 /* Build a new entry. */
2930 mcp_res = rte_zmalloc(__func__, sizeof(*mcp_res), 0);
2936 * The copy Flows are not included in any list. There
2937 * ones are referenced from other Flows and can not
2938 * be applied, removed, deleted in ardbitrary order
2939 * by list traversing.
2941 mcp_res->flow = flow_list_create(dev, NULL, &attr, items,
2942 actions, false, error);
2946 mcp_res->hlist_ent.key = mark_id;
2947 ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
2948 &mcp_res->hlist_ent);
2955 flow_list_destroy(dev, NULL, mcp_res->flow);
2961 * Release flow in RX_CP_TBL.
2964 * Pointer to Ethernet device.
2966 * Parent flow for wich copying is provided.
2969 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
2970 struct rte_flow *flow)
2972 struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
2973 struct mlx5_priv *priv = dev->data->dev_private;
2975 if (!mcp_res || !priv->mreg_cp_tbl)
2977 if (flow->copy_applied) {
2978 assert(mcp_res->appcnt);
2979 flow->copy_applied = 0;
2981 if (!mcp_res->appcnt)
2982 flow_drv_remove(dev, mcp_res->flow);
2985 * We do not check availability of metadata registers here,
2986 * because copy resources are allocated in this case.
2988 if (--mcp_res->refcnt)
2990 assert(mcp_res->flow);
2991 flow_list_destroy(dev, NULL, mcp_res->flow);
2992 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
2994 flow->mreg_copy = NULL;
2998 * Start flow in RX_CP_TBL.
3001 * Pointer to Ethernet device.
3003 * Parent flow for wich copying is provided.
3006 * 0 on success, a negative errno value otherwise and rte_errno is set.
3009 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3010 struct rte_flow *flow)
3012 struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3015 if (!mcp_res || flow->copy_applied)
3017 if (!mcp_res->appcnt) {
3018 ret = flow_drv_apply(dev, mcp_res->flow, NULL);
3023 flow->copy_applied = 1;
3028 * Stop flow in RX_CP_TBL.
3031 * Pointer to Ethernet device.
3033 * Parent flow for wich copying is provided.
3036 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3037 struct rte_flow *flow)
3039 struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3041 if (!mcp_res || !flow->copy_applied)
3043 assert(mcp_res->appcnt);
3045 flow->copy_applied = 0;
3046 if (!mcp_res->appcnt)
3047 flow_drv_remove(dev, mcp_res->flow);
3051 * Remove the default copy action from RX_CP_TBL.
3054 * Pointer to Ethernet device.
3057 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3059 struct mlx5_flow_mreg_copy_resource *mcp_res;
3060 struct mlx5_priv *priv = dev->data->dev_private;
3062 /* Check if default flow is registered. */
3063 if (!priv->mreg_cp_tbl)
3065 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, 0ULL);
3068 assert(mcp_res->flow);
3069 flow_list_destroy(dev, NULL, mcp_res->flow);
3070 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3075 * Add the default copy action in in RX_CP_TBL.
3078 * Pointer to Ethernet device.
3080 * Perform verbose error reporting if not NULL.
3083 * 0 for success, negative value otherwise and rte_errno is set.
3086 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3087 struct rte_flow_error *error)
3089 struct mlx5_priv *priv = dev->data->dev_private;
3090 struct mlx5_flow_mreg_copy_resource *mcp_res;
3092 /* Check whether extensive metadata feature is engaged. */
3093 if (!priv->config.dv_flow_en ||
3094 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3095 !mlx5_flow_ext_mreg_supported(dev) ||
3096 !priv->sh->dv_regc0_mask)
3098 mcp_res = flow_mreg_add_copy_action(dev, 0, error);
3105 * Add a flow of copying flow metadata registers in RX_CP_TBL.
3107 * All the flow having Q/RSS action should be split by
3108 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3109 * performs the following,
3110 * - CQE->flow_tag := reg_c[1] (MARK)
3111 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3112 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3113 * but there should be a flow per each MARK ID set by MARK action.
3115 * For the aforementioned reason, if there's a MARK action in flow's action
3116 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3117 * the MARK ID to CQE's flow_tag like,
3118 * - If reg_c[1] is mark_id,
3119 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3121 * For SET_META action which stores value in reg_c[0], as the destination is
3122 * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3123 * MARK ID means the default flow. The default flow looks like,
3124 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3127 * Pointer to Ethernet device.
3129 * Pointer to flow structure.
3130 * @param[in] actions
3131 * Pointer to the list of actions.
3133 * Perform verbose error reporting if not NULL.
3136 * 0 on success, negative value otherwise and rte_errno is set.
3139 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3140 struct rte_flow *flow,
3141 const struct rte_flow_action *actions,
3142 struct rte_flow_error *error)
3144 struct mlx5_priv *priv = dev->data->dev_private;
3145 struct mlx5_dev_config *config = &priv->config;
3146 struct mlx5_flow_mreg_copy_resource *mcp_res;
3147 const struct rte_flow_action_mark *mark;
3149 /* Check whether extensive metadata feature is engaged. */
3150 if (!config->dv_flow_en ||
3151 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3152 !mlx5_flow_ext_mreg_supported(dev) ||
3153 !priv->sh->dv_regc0_mask)
3155 /* Find MARK action. */
3156 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3157 switch (actions->type) {
3158 case RTE_FLOW_ACTION_TYPE_FLAG:
3159 mcp_res = flow_mreg_add_copy_action
3160 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3163 flow->mreg_copy = mcp_res;
3164 if (dev->data->dev_started) {
3166 flow->copy_applied = 1;
3169 case RTE_FLOW_ACTION_TYPE_MARK:
3170 mark = (const struct rte_flow_action_mark *)
3173 flow_mreg_add_copy_action(dev, mark->id, error);
3176 flow->mreg_copy = mcp_res;
3177 if (dev->data->dev_started) {
3179 flow->copy_applied = 1;
3189 #define MLX5_MAX_SPLIT_ACTIONS 24
3190 #define MLX5_MAX_SPLIT_ITEMS 24
3193 * Split the hairpin flow.
3194 * Since HW can't support encap on Rx we move the encap to Tx.
3195 * If the count action is after the encap then we also
3196 * move the count action. in this case the count will also measure
3200 * Pointer to Ethernet device.
3201 * @param[in] actions
3202 * Associated actions (list terminated by the END action).
3203 * @param[out] actions_rx
3205 * @param[out] actions_tx
3207 * @param[out] pattern_tx
3208 * The pattern items for the Tx flow.
3209 * @param[out] flow_id
3210 * The flow ID connected to this flow.
3216 flow_hairpin_split(struct rte_eth_dev *dev,
3217 const struct rte_flow_action actions[],
3218 struct rte_flow_action actions_rx[],
3219 struct rte_flow_action actions_tx[],
3220 struct rte_flow_item pattern_tx[],
3223 struct mlx5_priv *priv = dev->data->dev_private;
3224 const struct rte_flow_action_raw_encap *raw_encap;
3225 const struct rte_flow_action_raw_decap *raw_decap;
3226 struct mlx5_rte_flow_action_set_tag *set_tag;
3227 struct rte_flow_action *tag_action;
3228 struct mlx5_rte_flow_item_tag *tag_item;
3229 struct rte_flow_item *item;
3233 mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3234 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3235 switch (actions->type) {
3236 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3237 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3238 rte_memcpy(actions_tx, actions,
3239 sizeof(struct rte_flow_action));
3242 case RTE_FLOW_ACTION_TYPE_COUNT:
3244 rte_memcpy(actions_tx, actions,
3245 sizeof(struct rte_flow_action));
3248 rte_memcpy(actions_rx, actions,
3249 sizeof(struct rte_flow_action));
3253 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3254 raw_encap = actions->conf;
3255 if (raw_encap->size >
3256 (sizeof(struct rte_flow_item_eth) +
3257 sizeof(struct rte_flow_item_ipv4))) {
3258 memcpy(actions_tx, actions,
3259 sizeof(struct rte_flow_action));
3263 rte_memcpy(actions_rx, actions,
3264 sizeof(struct rte_flow_action));
3268 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3269 raw_decap = actions->conf;
3270 if (raw_decap->size <
3271 (sizeof(struct rte_flow_item_eth) +
3272 sizeof(struct rte_flow_item_ipv4))) {
3273 memcpy(actions_tx, actions,
3274 sizeof(struct rte_flow_action));
3277 rte_memcpy(actions_rx, actions,
3278 sizeof(struct rte_flow_action));
3283 rte_memcpy(actions_rx, actions,
3284 sizeof(struct rte_flow_action));
3289 /* Add set meta action and end action for the Rx flow. */
3290 tag_action = actions_rx;
3291 tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3293 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3295 set_tag = (void *)actions_rx;
3296 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3297 assert(set_tag->id > REG_NONE);
3298 set_tag->data = *flow_id;
3299 tag_action->conf = set_tag;
3300 /* Create Tx item list. */
3301 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3302 addr = (void *)&pattern_tx[2];
3304 item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3305 tag_item = (void *)addr;
3306 tag_item->data = *flow_id;
3307 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3308 assert(set_tag->id > REG_NONE);
3309 item->spec = tag_item;
3310 addr += sizeof(struct mlx5_rte_flow_item_tag);
3311 tag_item = (void *)addr;
3312 tag_item->data = UINT32_MAX;
3313 tag_item->id = UINT16_MAX;
3314 item->mask = tag_item;
3315 addr += sizeof(struct mlx5_rte_flow_item_tag);
3318 item->type = RTE_FLOW_ITEM_TYPE_END;
3323 * The last stage of splitting chain, just creates the subflow
3324 * without any modification.
3327 * Pointer to Ethernet device.
3329 * Parent flow structure pointer.
3330 * @param[in, out] sub_flow
3331 * Pointer to return the created subflow, may be NULL.
3333 * Flow rule attributes.
3335 * Pattern specification (list terminated by the END pattern item).
3336 * @param[in] actions
3337 * Associated actions (list terminated by the END action).
3338 * @param[in] external
3339 * This flow rule is created by request external to PMD.
3341 * Perform verbose error reporting if not NULL.
3343 * 0 on success, negative value otherwise
3346 flow_create_split_inner(struct rte_eth_dev *dev,
3347 struct rte_flow *flow,
3348 struct mlx5_flow **sub_flow,
3349 const struct rte_flow_attr *attr,
3350 const struct rte_flow_item items[],
3351 const struct rte_flow_action actions[],
3352 bool external, struct rte_flow_error *error)
3354 struct mlx5_flow *dev_flow;
3356 dev_flow = flow_drv_prepare(flow, attr, items, actions, error);
3359 dev_flow->flow = flow;
3360 dev_flow->external = external;
3361 /* Subflow object was created, we must include one in the list. */
3362 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3364 *sub_flow = dev_flow;
3365 return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3369 * Split action list having QUEUE/RSS for metadata register copy.
3371 * Once Q/RSS action is detected in user's action list, the flow action
3372 * should be split in order to copy metadata registers, which will happen in
3374 * - CQE->flow_tag := reg_c[1] (MARK)
3375 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3376 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3377 * This is because the last action of each flow must be a terminal action
3378 * (QUEUE, RSS or DROP).
3380 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3381 * stored and kept in the mlx5_flow structure per each sub_flow.
3383 * The Q/RSS action is replaced with,
3384 * - SET_TAG, setting the allocated flow ID to reg_c[2].
3385 * And the following JUMP action is added at the end,
3386 * - JUMP, to RX_CP_TBL.
3388 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3389 * flow_create_split_metadata() routine. The flow will look like,
3390 * - If flow ID matches (reg_c[2]), perform Q/RSS.
3393 * Pointer to Ethernet device.
3394 * @param[out] split_actions
3395 * Pointer to store split actions to jump to CP_TBL.
3396 * @param[in] actions
3397 * Pointer to the list of original flow actions.
3399 * Pointer to the Q/RSS action.
3400 * @param[in] actions_n
3401 * Number of original actions.
3403 * Perform verbose error reporting if not NULL.
3406 * non-zero unique flow_id on success, otherwise 0 and
3407 * error/rte_error are set.
3410 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3411 struct rte_flow_action *split_actions,
3412 const struct rte_flow_action *actions,
3413 const struct rte_flow_action *qrss,
3414 int actions_n, struct rte_flow_error *error)
3416 struct mlx5_rte_flow_action_set_tag *set_tag;
3417 struct rte_flow_action_jump *jump;
3418 const int qrss_idx = qrss - actions;
3423 * Given actions will be split
3424 * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3425 * - Add jump to mreg CP_TBL.
3426 * As a result, there will be one more action.
3430 * Allocate the new subflow ID. This one is unique within
3431 * device and not shared with representors. Otherwise,
3432 * we would have to resolve multi-thread access synch
3433 * issue. Each flow on the shared device is appended
3434 * with source vport identifier, so the resulting
3435 * flows will be unique in the shared (by master and
3436 * representors) domain even if they have coinciding
3439 flow_id = flow_qrss_get_id(dev);
3441 return rte_flow_error_set(error, ENOMEM,
3442 RTE_FLOW_ERROR_TYPE_ACTION,
3443 NULL, "can't allocate id "
3444 "for split Q/RSS subflow");
3445 /* Internal SET_TAG action to set flow ID. */
3446 set_tag = (void *)(split_actions + actions_n);
3447 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3450 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3454 /* JUMP action to jump to mreg copy table (CP_TBL). */
3455 jump = (void *)(set_tag + 1);
3456 *jump = (struct rte_flow_action_jump){
3457 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3459 /* Construct new actions array. */
3460 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3461 /* Replace QUEUE/RSS action. */
3462 split_actions[qrss_idx] = (struct rte_flow_action){
3463 .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3466 split_actions[actions_n - 2] = (struct rte_flow_action){
3467 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3470 split_actions[actions_n - 1] = (struct rte_flow_action){
3471 .type = RTE_FLOW_ACTION_TYPE_END,
3477 * Extend the given action list for Tx metadata copy.
3479 * Copy the given action list to the ext_actions and add flow metadata register
3480 * copy action in order to copy reg_a set by WQE to reg_c[0].
3482 * @param[out] ext_actions
3483 * Pointer to the extended action list.
3484 * @param[in] actions
3485 * Pointer to the list of actions.
3486 * @param[in] actions_n
3487 * Number of actions in the list.
3489 * Perform verbose error reporting if not NULL.
3492 * 0 on success, negative value otherwise
3495 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3496 struct rte_flow_action *ext_actions,
3497 const struct rte_flow_action *actions,
3498 int actions_n, struct rte_flow_error *error)
3500 struct mlx5_flow_action_copy_mreg *cp_mreg =
3501 (struct mlx5_flow_action_copy_mreg *)
3502 (ext_actions + actions_n + 1);
3505 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3509 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3513 memcpy(ext_actions, actions,
3514 sizeof(*ext_actions) * actions_n);
3515 ext_actions[actions_n - 1] = (struct rte_flow_action){
3516 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3519 ext_actions[actions_n] = (struct rte_flow_action){
3520 .type = RTE_FLOW_ACTION_TYPE_END,
3526 * The splitting for metadata feature.
3528 * - Q/RSS action on NIC Rx should be split in order to pass by
3529 * the mreg copy table (RX_CP_TBL) and then it jumps to the
3530 * action table (RX_ACT_TBL) which has the split Q/RSS action.
3532 * - All the actions on NIC Tx should have a mreg copy action to
3533 * copy reg_a from WQE to reg_c[0].
3536 * Pointer to Ethernet device.
3538 * Parent flow structure pointer.
3540 * Flow rule attributes.
3542 * Pattern specification (list terminated by the END pattern item).
3543 * @param[in] actions
3544 * Associated actions (list terminated by the END action).
3545 * @param[in] external
3546 * This flow rule is created by request external to PMD.
3548 * Perform verbose error reporting if not NULL.
3550 * 0 on success, negative value otherwise
3553 flow_create_split_metadata(struct rte_eth_dev *dev,
3554 struct rte_flow *flow,
3555 const struct rte_flow_attr *attr,
3556 const struct rte_flow_item items[],
3557 const struct rte_flow_action actions[],
3558 bool external, struct rte_flow_error *error)
3560 struct mlx5_priv *priv = dev->data->dev_private;
3561 struct mlx5_dev_config *config = &priv->config;
3562 const struct rte_flow_action *qrss = NULL;
3563 struct rte_flow_action *ext_actions = NULL;
3564 struct mlx5_flow *dev_flow = NULL;
3565 uint32_t qrss_id = 0;
3570 /* Check whether extensive metadata feature is engaged. */
3571 if (!config->dv_flow_en ||
3572 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3573 !mlx5_flow_ext_mreg_supported(dev))
3574 return flow_create_split_inner(dev, flow, NULL, attr, items,
3575 actions, external, error);
3576 actions_n = flow_parse_qrss_action(actions, &qrss);
3578 /* Exclude hairpin flows from splitting. */
3579 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3580 const struct rte_flow_action_queue *queue;
3583 if (mlx5_rxq_get_type(dev, queue->index) ==
3584 MLX5_RXQ_TYPE_HAIRPIN)
3586 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3587 const struct rte_flow_action_rss *rss;
3590 if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3591 MLX5_RXQ_TYPE_HAIRPIN)
3597 * Q/RSS action on NIC Rx should be split in order to pass by
3598 * the mreg copy table (RX_CP_TBL) and then it jumps to the
3599 * action table (RX_ACT_TBL) which has the split Q/RSS action.
3601 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3602 sizeof(struct rte_flow_action_set_tag) +
3603 sizeof(struct rte_flow_action_jump);
3604 ext_actions = rte_zmalloc(__func__, act_size, 0);
3606 return rte_flow_error_set(error, ENOMEM,
3607 RTE_FLOW_ERROR_TYPE_ACTION,
3608 NULL, "no memory to split "
3611 * Create the new actions list with removed Q/RSS action
3612 * and appended set tag and jump to register copy table
3613 * (RX_CP_TBL). We should preallocate unique tag ID here
3614 * in advance, because it is needed for set tag action.
3616 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3617 qrss, actions_n, error);
3622 } else if (attr->egress && !attr->transfer) {
3624 * All the actions on NIC Tx should have a metadata register
3625 * copy action to copy reg_a from WQE to reg_c[meta]
3627 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3628 sizeof(struct mlx5_flow_action_copy_mreg);
3629 ext_actions = rte_zmalloc(__func__, act_size, 0);
3631 return rte_flow_error_set(error, ENOMEM,
3632 RTE_FLOW_ERROR_TYPE_ACTION,
3633 NULL, "no memory to split "
3635 /* Create the action list appended with copy register. */
3636 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3641 /* Add the unmodified original or prefix subflow. */
3642 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items,
3643 ext_actions ? ext_actions : actions,
3649 const struct rte_flow_attr q_attr = {
3650 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3653 /* Internal PMD action to set register. */
3654 struct mlx5_rte_flow_item_tag q_tag_spec = {
3658 struct rte_flow_item q_items[] = {
3660 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3661 .spec = &q_tag_spec,
3666 .type = RTE_FLOW_ITEM_TYPE_END,
3669 struct rte_flow_action q_actions[] = {
3675 .type = RTE_FLOW_ACTION_TYPE_END,
3678 uint64_t hash_fields = dev_flow->hash_fields;
3680 * Put unique id in prefix flow due to it is destroyed after
3681 * prefix flow and id will be freed after there is no actual
3682 * flows with this id and identifier reallocation becomes
3683 * possible (for example, for other flows in other threads).
3685 dev_flow->qrss_id = qrss_id;
3688 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3691 q_tag_spec.id = ret;
3692 /* Add suffix subflow to execute Q/RSS. */
3693 ret = flow_create_split_inner(dev, flow, &dev_flow,
3694 &q_attr, q_items, q_actions,
3699 dev_flow->hash_fields = hash_fields;
3704 * We do not destroy the partially created sub_flows in case of error.
3705 * These ones are included into parent flow list and will be destroyed
3706 * by flow_drv_destroy.
3708 flow_qrss_free_id(dev, qrss_id);
3709 rte_free(ext_actions);
3714 * Split the flow to subflow set. The splitters might be linked
3715 * in the chain, like this:
3716 * flow_create_split_outer() calls:
3717 * flow_create_split_meter() calls:
3718 * flow_create_split_metadata(meter_subflow_0) calls:
3719 * flow_create_split_inner(metadata_subflow_0)
3720 * flow_create_split_inner(metadata_subflow_1)
3721 * flow_create_split_inner(metadata_subflow_2)
3722 * flow_create_split_metadata(meter_subflow_1) calls:
3723 * flow_create_split_inner(metadata_subflow_0)
3724 * flow_create_split_inner(metadata_subflow_1)
3725 * flow_create_split_inner(metadata_subflow_2)
3727 * This provide flexible way to add new levels of flow splitting.
3728 * The all of successfully created subflows are included to the
3729 * parent flow dev_flow list.
3732 * Pointer to Ethernet device.
3734 * Parent flow structure pointer.
3736 * Flow rule attributes.
3738 * Pattern specification (list terminated by the END pattern item).
3739 * @param[in] actions
3740 * Associated actions (list terminated by the END action).
3741 * @param[in] external
3742 * This flow rule is created by request external to PMD.
3744 * Perform verbose error reporting if not NULL.
3746 * 0 on success, negative value otherwise
3749 flow_create_split_outer(struct rte_eth_dev *dev,
3750 struct rte_flow *flow,
3751 const struct rte_flow_attr *attr,
3752 const struct rte_flow_item items[],
3753 const struct rte_flow_action actions[],
3754 bool external, struct rte_flow_error *error)
3758 ret = flow_create_split_metadata(dev, flow, attr, items,
3759 actions, external, error);
3765 * Create a flow and add it to @p list.
3768 * Pointer to Ethernet device.
3770 * Pointer to a TAILQ flow list. If this parameter NULL,
3771 * no list insertion occurred, flow is just created,
3772 * this is caller's responsibility to track the
3775 * Flow rule attributes.
3777 * Pattern specification (list terminated by the END pattern item).
3778 * @param[in] actions
3779 * Associated actions (list terminated by the END action).
3780 * @param[in] external
3781 * This flow rule is created by request external to PMD.
3783 * Perform verbose error reporting if not NULL.
3786 * A flow on success, NULL otherwise and rte_errno is set.
3788 static struct rte_flow *
3789 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
3790 const struct rte_flow_attr *attr,
3791 const struct rte_flow_item items[],
3792 const struct rte_flow_action actions[],
3793 bool external, struct rte_flow_error *error)
3795 struct mlx5_priv *priv = dev->data->dev_private;
3796 struct rte_flow *flow = NULL;
3797 struct mlx5_flow *dev_flow;
3798 const struct rte_flow_action_rss *rss;
3800 struct rte_flow_expand_rss buf;
3801 uint8_t buffer[2048];
3804 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
3805 uint8_t buffer[2048];
3808 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
3809 uint8_t buffer[2048];
3810 } actions_hairpin_tx;
3812 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
3813 uint8_t buffer[2048];
3815 struct rte_flow_expand_rss *buf = &expand_buffer.buf;
3816 const struct rte_flow_action *p_actions_rx = actions;
3820 int hairpin_flow = 0;
3821 uint32_t hairpin_id = 0;
3822 struct rte_flow_attr attr_tx = { .priority = 0 };
3824 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
3825 if (hairpin_flow > 0) {
3826 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
3830 flow_hairpin_split(dev, actions, actions_rx.actions,
3831 actions_hairpin_tx.actions, items_tx.items,
3833 p_actions_rx = actions_rx.actions;
3835 ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
3838 goto error_before_flow;
3839 flow_size = sizeof(struct rte_flow);
3840 rss = flow_get_rss_action(p_actions_rx);
3842 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
3845 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
3846 flow = rte_calloc(__func__, 1, flow_size, 0);
3849 goto error_before_flow;
3851 flow->drv_type = flow_get_drv_type(dev, attr);
3852 if (hairpin_id != 0)
3853 flow->hairpin_flow_id = hairpin_id;
3854 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
3855 flow->drv_type < MLX5_FLOW_TYPE_MAX);
3856 flow->rss.queue = (void *)(flow + 1);
3859 * The following information is required by
3860 * mlx5_flow_hashfields_adjust() in advance.
3862 flow->rss.level = rss->level;
3863 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
3864 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
3866 LIST_INIT(&flow->dev_flows);
3867 if (rss && rss->types) {
3868 unsigned int graph_root;
3870 graph_root = find_graph_root(items, rss->level);
3871 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
3873 mlx5_support_expansion,
3876 (unsigned int)ret < sizeof(expand_buffer.buffer));
3879 buf->entry[0].pattern = (void *)(uintptr_t)items;
3881 for (i = 0; i < buf->entries; ++i) {
3883 * The splitter may create multiple dev_flows,
3884 * depending on configuration. In the simplest
3885 * case it just creates unmodified original flow.
3887 ret = flow_create_split_outer(dev, flow, attr,
3888 buf->entry[i].pattern,
3889 p_actions_rx, external,
3894 /* Create the tx flow. */
3896 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
3897 attr_tx.ingress = 0;
3899 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items,
3900 actions_hairpin_tx.actions, error);
3903 dev_flow->flow = flow;
3904 dev_flow->external = 0;
3905 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3906 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
3908 actions_hairpin_tx.actions, error);
3913 * Update the metadata register copy table. If extensive
3914 * metadata feature is enabled and registers are supported
3915 * we might create the extra rte_flow for each unique
3916 * MARK/FLAG action ID.
3918 * The table is updated for ingress Flows only, because
3919 * the egress Flows belong to the different device and
3920 * copy table should be updated in peer NIC Rx domain.
3922 if (attr->ingress &&
3923 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
3924 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
3928 if (dev->data->dev_started) {
3929 ret = flow_drv_apply(dev, flow, error);
3934 TAILQ_INSERT_TAIL(list, flow, next);
3935 flow_rxq_flags_set(dev, flow);
3939 mlx5_flow_id_release(priv->sh->flow_id_pool,
3944 flow_mreg_del_copy_action(dev, flow);
3945 ret = rte_errno; /* Save rte_errno before cleanup. */
3946 if (flow->hairpin_flow_id)
3947 mlx5_flow_id_release(priv->sh->flow_id_pool,
3948 flow->hairpin_flow_id);
3950 flow_drv_destroy(dev, flow);
3952 rte_errno = ret; /* Restore rte_errno. */
3957 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
3958 * incoming packets to table 1.
3960 * Other flow rules, requested for group n, will be created in
3961 * e-switch table n+1.
3962 * Jump action to e-switch group n will be created to group n+1.
3964 * Used when working in switchdev mode, to utilise advantages of table 1
3968 * Pointer to Ethernet device.
3971 * Pointer to flow on success, NULL otherwise and rte_errno is set.
3974 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
3976 const struct rte_flow_attr attr = {
3983 const struct rte_flow_item pattern = {
3984 .type = RTE_FLOW_ITEM_TYPE_END,
3986 struct rte_flow_action_jump jump = {
3989 const struct rte_flow_action actions[] = {
3991 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3995 .type = RTE_FLOW_ACTION_TYPE_END,
3998 struct mlx5_priv *priv = dev->data->dev_private;
3999 struct rte_flow_error error;
4001 return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
4002 actions, false, &error);
4008 * @see rte_flow_create()
4012 mlx5_flow_create(struct rte_eth_dev *dev,
4013 const struct rte_flow_attr *attr,
4014 const struct rte_flow_item items[],
4015 const struct rte_flow_action actions[],
4016 struct rte_flow_error *error)
4018 struct mlx5_priv *priv = dev->data->dev_private;
4020 return flow_list_create(dev, &priv->flows,
4021 attr, items, actions, true, error);
4025 * Destroy a flow in a list.
4028 * Pointer to Ethernet device.
4030 * Pointer to a TAILQ flow list. If this parameter NULL,
4031 * there is no flow removal from the list.
4036 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
4037 struct rte_flow *flow)
4039 struct mlx5_priv *priv = dev->data->dev_private;
4042 * Update RX queue flags only if port is started, otherwise it is
4045 if (dev->data->dev_started)
4046 flow_rxq_flags_trim(dev, flow);
4047 if (flow->hairpin_flow_id)
4048 mlx5_flow_id_release(priv->sh->flow_id_pool,
4049 flow->hairpin_flow_id);
4050 flow_drv_destroy(dev, flow);
4052 TAILQ_REMOVE(list, flow, next);
4053 flow_mreg_del_copy_action(dev, flow);
4054 rte_free(flow->fdir);
4059 * Destroy all flows.
4062 * Pointer to Ethernet device.
4064 * Pointer to a TAILQ flow list.
4067 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
4069 while (!TAILQ_EMPTY(list)) {
4070 struct rte_flow *flow;
4072 flow = TAILQ_FIRST(list);
4073 flow_list_destroy(dev, list, flow);
4081 * Pointer to Ethernet device.
4083 * Pointer to a TAILQ flow list.
4086 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
4088 struct rte_flow *flow;
4090 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) {
4091 flow_drv_remove(dev, flow);
4092 flow_mreg_stop_copy_action(dev, flow);
4094 flow_mreg_del_default_copy_action(dev);
4095 flow_rxq_flags_clear(dev);
4102 * Pointer to Ethernet device.
4104 * Pointer to a TAILQ flow list.
4107 * 0 on success, a negative errno value otherwise and rte_errno is set.
4110 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
4112 struct rte_flow *flow;
4113 struct rte_flow_error error;
4116 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4117 ret = flow_mreg_add_default_copy_action(dev, &error);
4120 /* Apply Flows created by application. */
4121 TAILQ_FOREACH(flow, list, next) {
4122 ret = flow_mreg_start_copy_action(dev, flow);
4125 ret = flow_drv_apply(dev, flow, &error);
4128 flow_rxq_flags_set(dev, flow);
4132 ret = rte_errno; /* Save rte_errno before cleanup. */
4133 mlx5_flow_stop(dev, list);
4134 rte_errno = ret; /* Restore rte_errno. */
4139 * Verify the flow list is empty
4142 * Pointer to Ethernet device.
4144 * @return the number of flows not released.
4147 mlx5_flow_verify(struct rte_eth_dev *dev)
4149 struct mlx5_priv *priv = dev->data->dev_private;
4150 struct rte_flow *flow;
4153 TAILQ_FOREACH(flow, &priv->flows, next) {
4154 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4155 dev->data->port_id, (void *)flow);
4162 * Enable default hairpin egress flow.
4165 * Pointer to Ethernet device.
4170 * 0 on success, a negative errno value otherwise and rte_errno is set.
4173 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4176 struct mlx5_priv *priv = dev->data->dev_private;
4177 const struct rte_flow_attr attr = {
4181 struct mlx5_rte_flow_item_tx_queue queue_spec = {
4184 struct mlx5_rte_flow_item_tx_queue queue_mask = {
4185 .queue = UINT32_MAX,
4187 struct rte_flow_item items[] = {
4189 .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4190 .spec = &queue_spec,
4192 .mask = &queue_mask,
4195 .type = RTE_FLOW_ITEM_TYPE_END,
4198 struct rte_flow_action_jump jump = {
4199 .group = MLX5_HAIRPIN_TX_TABLE,
4201 struct rte_flow_action actions[2];
4202 struct rte_flow *flow;
4203 struct rte_flow_error error;
4205 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4206 actions[0].conf = &jump;
4207 actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4208 flow = flow_list_create(dev, &priv->ctrl_flows,
4209 &attr, items, actions, false, &error);
4212 "Failed to create ctrl flow: rte_errno(%d),"
4213 " type(%d), message(%s)",
4214 rte_errno, error.type,
4215 error.message ? error.message : " (no stated reason)");
4222 * Enable a control flow configured from the control plane.
4225 * Pointer to Ethernet device.
4227 * An Ethernet flow spec to apply.
4229 * An Ethernet flow mask to apply.
4231 * A VLAN flow spec to apply.
4233 * A VLAN flow mask to apply.
4236 * 0 on success, a negative errno value otherwise and rte_errno is set.
4239 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4240 struct rte_flow_item_eth *eth_spec,
4241 struct rte_flow_item_eth *eth_mask,
4242 struct rte_flow_item_vlan *vlan_spec,
4243 struct rte_flow_item_vlan *vlan_mask)
4245 struct mlx5_priv *priv = dev->data->dev_private;
4246 const struct rte_flow_attr attr = {
4248 .priority = MLX5_FLOW_PRIO_RSVD,
4250 struct rte_flow_item items[] = {
4252 .type = RTE_FLOW_ITEM_TYPE_ETH,
4258 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4259 RTE_FLOW_ITEM_TYPE_END,
4265 .type = RTE_FLOW_ITEM_TYPE_END,
4268 uint16_t queue[priv->reta_idx_n];
4269 struct rte_flow_action_rss action_rss = {
4270 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4272 .types = priv->rss_conf.rss_hf,
4273 .key_len = priv->rss_conf.rss_key_len,
4274 .queue_num = priv->reta_idx_n,
4275 .key = priv->rss_conf.rss_key,
4278 struct rte_flow_action actions[] = {
4280 .type = RTE_FLOW_ACTION_TYPE_RSS,
4281 .conf = &action_rss,
4284 .type = RTE_FLOW_ACTION_TYPE_END,
4287 struct rte_flow *flow;
4288 struct rte_flow_error error;
4291 if (!priv->reta_idx_n || !priv->rxqs_n) {
4294 for (i = 0; i != priv->reta_idx_n; ++i)
4295 queue[i] = (*priv->reta_idx)[i];
4296 flow = flow_list_create(dev, &priv->ctrl_flows,
4297 &attr, items, actions, false, &error);
4304 * Enable a flow control configured from the control plane.
4307 * Pointer to Ethernet device.
4309 * An Ethernet flow spec to apply.
4311 * An Ethernet flow mask to apply.
4314 * 0 on success, a negative errno value otherwise and rte_errno is set.
4317 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4318 struct rte_flow_item_eth *eth_spec,
4319 struct rte_flow_item_eth *eth_mask)
4321 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4327 * @see rte_flow_destroy()
4331 mlx5_flow_destroy(struct rte_eth_dev *dev,
4332 struct rte_flow *flow,
4333 struct rte_flow_error *error __rte_unused)
4335 struct mlx5_priv *priv = dev->data->dev_private;
4337 flow_list_destroy(dev, &priv->flows, flow);
4342 * Destroy all flows.
4344 * @see rte_flow_flush()
4348 mlx5_flow_flush(struct rte_eth_dev *dev,
4349 struct rte_flow_error *error __rte_unused)
4351 struct mlx5_priv *priv = dev->data->dev_private;
4353 mlx5_flow_list_flush(dev, &priv->flows);
4360 * @see rte_flow_isolate()
4364 mlx5_flow_isolate(struct rte_eth_dev *dev,
4366 struct rte_flow_error *error)
4368 struct mlx5_priv *priv = dev->data->dev_private;
4370 if (dev->data->dev_started) {
4371 rte_flow_error_set(error, EBUSY,
4372 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4374 "port must be stopped first");
4377 priv->isolated = !!enable;
4379 dev->dev_ops = &mlx5_dev_ops_isolate;
4381 dev->dev_ops = &mlx5_dev_ops;
4388 * @see rte_flow_query()
4392 flow_drv_query(struct rte_eth_dev *dev,
4393 struct rte_flow *flow,
4394 const struct rte_flow_action *actions,
4396 struct rte_flow_error *error)
4398 const struct mlx5_flow_driver_ops *fops;
4399 enum mlx5_flow_drv_type ftype = flow->drv_type;
4401 assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
4402 fops = flow_get_drv_ops(ftype);
4404 return fops->query(dev, flow, actions, data, error);
4410 * @see rte_flow_query()
4414 mlx5_flow_query(struct rte_eth_dev *dev,
4415 struct rte_flow *flow,
4416 const struct rte_flow_action *actions,
4418 struct rte_flow_error *error)
4422 ret = flow_drv_query(dev, flow, actions, data, error);
4429 * Convert a flow director filter to a generic flow.
4432 * Pointer to Ethernet device.
4433 * @param fdir_filter
4434 * Flow director filter to add.
4436 * Generic flow parameters structure.
4439 * 0 on success, a negative errno value otherwise and rte_errno is set.
4442 flow_fdir_filter_convert(struct rte_eth_dev *dev,
4443 const struct rte_eth_fdir_filter *fdir_filter,
4444 struct mlx5_fdir *attributes)
4446 struct mlx5_priv *priv = dev->data->dev_private;
4447 const struct rte_eth_fdir_input *input = &fdir_filter->input;
4448 const struct rte_eth_fdir_masks *mask =
4449 &dev->data->dev_conf.fdir_conf.mask;
4451 /* Validate queue number. */
4452 if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
4453 DRV_LOG(ERR, "port %u invalid queue number %d",
4454 dev->data->port_id, fdir_filter->action.rx_queue);
4458 attributes->attr.ingress = 1;
4459 attributes->items[0] = (struct rte_flow_item) {
4460 .type = RTE_FLOW_ITEM_TYPE_ETH,
4461 .spec = &attributes->l2,
4462 .mask = &attributes->l2_mask,
4464 switch (fdir_filter->action.behavior) {
4465 case RTE_ETH_FDIR_ACCEPT:
4466 attributes->actions[0] = (struct rte_flow_action){
4467 .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4468 .conf = &attributes->queue,
4471 case RTE_ETH_FDIR_REJECT:
4472 attributes->actions[0] = (struct rte_flow_action){
4473 .type = RTE_FLOW_ACTION_TYPE_DROP,
4477 DRV_LOG(ERR, "port %u invalid behavior %d",
4479 fdir_filter->action.behavior);
4480 rte_errno = ENOTSUP;
4483 attributes->queue.index = fdir_filter->action.rx_queue;
4485 switch (fdir_filter->input.flow_type) {
4486 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4487 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4488 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4489 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
4490 .src_addr = input->flow.ip4_flow.src_ip,
4491 .dst_addr = input->flow.ip4_flow.dst_ip,
4492 .time_to_live = input->flow.ip4_flow.ttl,
4493 .type_of_service = input->flow.ip4_flow.tos,
4495 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
4496 .src_addr = mask->ipv4_mask.src_ip,
4497 .dst_addr = mask->ipv4_mask.dst_ip,
4498 .time_to_live = mask->ipv4_mask.ttl,
4499 .type_of_service = mask->ipv4_mask.tos,
4500 .next_proto_id = mask->ipv4_mask.proto,
4502 attributes->items[1] = (struct rte_flow_item){
4503 .type = RTE_FLOW_ITEM_TYPE_IPV4,
4504 .spec = &attributes->l3,
4505 .mask = &attributes->l3_mask,
4508 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4509 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4510 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4511 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
4512 .hop_limits = input->flow.ipv6_flow.hop_limits,
4513 .proto = input->flow.ipv6_flow.proto,
4516 memcpy(attributes->l3.ipv6.hdr.src_addr,
4517 input->flow.ipv6_flow.src_ip,
4518 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4519 memcpy(attributes->l3.ipv6.hdr.dst_addr,
4520 input->flow.ipv6_flow.dst_ip,
4521 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4522 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
4523 mask->ipv6_mask.src_ip,
4524 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4525 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
4526 mask->ipv6_mask.dst_ip,
4527 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4528 attributes->items[1] = (struct rte_flow_item){
4529 .type = RTE_FLOW_ITEM_TYPE_IPV6,
4530 .spec = &attributes->l3,
4531 .mask = &attributes->l3_mask,
4535 DRV_LOG(ERR, "port %u invalid flow type%d",
4536 dev->data->port_id, fdir_filter->input.flow_type);
4537 rte_errno = ENOTSUP;
4541 switch (fdir_filter->input.flow_type) {
4542 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4543 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4544 .src_port = input->flow.udp4_flow.src_port,
4545 .dst_port = input->flow.udp4_flow.dst_port,
4547 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4548 .src_port = mask->src_port_mask,
4549 .dst_port = mask->dst_port_mask,
4551 attributes->items[2] = (struct rte_flow_item){
4552 .type = RTE_FLOW_ITEM_TYPE_UDP,
4553 .spec = &attributes->l4,
4554 .mask = &attributes->l4_mask,
4557 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4558 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4559 .src_port = input->flow.tcp4_flow.src_port,
4560 .dst_port = input->flow.tcp4_flow.dst_port,
4562 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4563 .src_port = mask->src_port_mask,
4564 .dst_port = mask->dst_port_mask,
4566 attributes->items[2] = (struct rte_flow_item){
4567 .type = RTE_FLOW_ITEM_TYPE_TCP,
4568 .spec = &attributes->l4,
4569 .mask = &attributes->l4_mask,
4572 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4573 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4574 .src_port = input->flow.udp6_flow.src_port,
4575 .dst_port = input->flow.udp6_flow.dst_port,
4577 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4578 .src_port = mask->src_port_mask,
4579 .dst_port = mask->dst_port_mask,
4581 attributes->items[2] = (struct rte_flow_item){
4582 .type = RTE_FLOW_ITEM_TYPE_UDP,
4583 .spec = &attributes->l4,
4584 .mask = &attributes->l4_mask,
4587 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4588 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4589 .src_port = input->flow.tcp6_flow.src_port,
4590 .dst_port = input->flow.tcp6_flow.dst_port,
4592 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4593 .src_port = mask->src_port_mask,
4594 .dst_port = mask->dst_port_mask,
4596 attributes->items[2] = (struct rte_flow_item){
4597 .type = RTE_FLOW_ITEM_TYPE_TCP,
4598 .spec = &attributes->l4,
4599 .mask = &attributes->l4_mask,
4602 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4603 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4606 DRV_LOG(ERR, "port %u invalid flow type%d",
4607 dev->data->port_id, fdir_filter->input.flow_type);
4608 rte_errno = ENOTSUP;
4614 #define FLOW_FDIR_CMP(f1, f2, fld) \
4615 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
4618 * Compare two FDIR flows. If items and actions are identical, the two flows are
4622 * Pointer to Ethernet device.
4624 * FDIR flow to compare.
4626 * FDIR flow to compare.
4629 * Zero on match, 1 otherwise.
4632 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
4634 if (FLOW_FDIR_CMP(f1, f2, attr) ||
4635 FLOW_FDIR_CMP(f1, f2, l2) ||
4636 FLOW_FDIR_CMP(f1, f2, l2_mask) ||
4637 FLOW_FDIR_CMP(f1, f2, l3) ||
4638 FLOW_FDIR_CMP(f1, f2, l3_mask) ||
4639 FLOW_FDIR_CMP(f1, f2, l4) ||
4640 FLOW_FDIR_CMP(f1, f2, l4_mask) ||
4641 FLOW_FDIR_CMP(f1, f2, actions[0].type))
4643 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
4644 FLOW_FDIR_CMP(f1, f2, queue))
4650 * Search device flow list to find out a matched FDIR flow.
4653 * Pointer to Ethernet device.
4655 * FDIR flow to lookup.
4658 * Pointer of flow if found, NULL otherwise.
4660 static struct rte_flow *
4661 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
4663 struct mlx5_priv *priv = dev->data->dev_private;
4664 struct rte_flow *flow = NULL;
4667 TAILQ_FOREACH(flow, &priv->flows, next) {
4668 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
4669 DRV_LOG(DEBUG, "port %u found FDIR flow %p",
4670 dev->data->port_id, (void *)flow);
4678 * Add new flow director filter and store it in list.
4681 * Pointer to Ethernet device.
4682 * @param fdir_filter
4683 * Flow director filter to add.
4686 * 0 on success, a negative errno value otherwise and rte_errno is set.
4689 flow_fdir_filter_add(struct rte_eth_dev *dev,
4690 const struct rte_eth_fdir_filter *fdir_filter)
4692 struct mlx5_priv *priv = dev->data->dev_private;
4693 struct mlx5_fdir *fdir_flow;
4694 struct rte_flow *flow;
4697 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
4702 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
4705 flow = flow_fdir_filter_lookup(dev, fdir_flow);
4710 flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
4711 fdir_flow->items, fdir_flow->actions, true,
4715 assert(!flow->fdir);
4716 flow->fdir = fdir_flow;
4717 DRV_LOG(DEBUG, "port %u created FDIR flow %p",
4718 dev->data->port_id, (void *)flow);
4721 rte_free(fdir_flow);
4726 * Delete specific filter.
4729 * Pointer to Ethernet device.
4730 * @param fdir_filter
4731 * Filter to be deleted.
4734 * 0 on success, a negative errno value otherwise and rte_errno is set.
4737 flow_fdir_filter_delete(struct rte_eth_dev *dev,
4738 const struct rte_eth_fdir_filter *fdir_filter)
4740 struct mlx5_priv *priv = dev->data->dev_private;
4741 struct rte_flow *flow;
4742 struct mlx5_fdir fdir_flow = {
4747 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
4750 flow = flow_fdir_filter_lookup(dev, &fdir_flow);
4755 flow_list_destroy(dev, &priv->flows, flow);
4756 DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
4757 dev->data->port_id, (void *)flow);
4762 * Update queue for specific filter.
4765 * Pointer to Ethernet device.
4766 * @param fdir_filter
4767 * Filter to be updated.
4770 * 0 on success, a negative errno value otherwise and rte_errno is set.
4773 flow_fdir_filter_update(struct rte_eth_dev *dev,
4774 const struct rte_eth_fdir_filter *fdir_filter)
4778 ret = flow_fdir_filter_delete(dev, fdir_filter);
4781 return flow_fdir_filter_add(dev, fdir_filter);
4785 * Flush all filters.
4788 * Pointer to Ethernet device.
4791 flow_fdir_filter_flush(struct rte_eth_dev *dev)
4793 struct mlx5_priv *priv = dev->data->dev_private;
4795 mlx5_flow_list_flush(dev, &priv->flows);
4799 * Get flow director information.
4802 * Pointer to Ethernet device.
4803 * @param[out] fdir_info
4804 * Resulting flow director information.
4807 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
4809 struct rte_eth_fdir_masks *mask =
4810 &dev->data->dev_conf.fdir_conf.mask;
4812 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
4813 fdir_info->guarant_spc = 0;
4814 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
4815 fdir_info->max_flexpayload = 0;
4816 fdir_info->flow_types_mask[0] = 0;
4817 fdir_info->flex_payload_unit = 0;
4818 fdir_info->max_flex_payload_segment_num = 0;
4819 fdir_info->flex_payload_limit = 0;
4820 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
4824 * Deal with flow director operations.
4827 * Pointer to Ethernet device.
4829 * Operation to perform.
4831 * Pointer to operation-specific structure.
4834 * 0 on success, a negative errno value otherwise and rte_errno is set.
4837 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
4840 enum rte_fdir_mode fdir_mode =
4841 dev->data->dev_conf.fdir_conf.mode;
4843 if (filter_op == RTE_ETH_FILTER_NOP)
4845 if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
4846 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
4847 DRV_LOG(ERR, "port %u flow director mode %d not supported",
4848 dev->data->port_id, fdir_mode);
4852 switch (filter_op) {
4853 case RTE_ETH_FILTER_ADD:
4854 return flow_fdir_filter_add(dev, arg);
4855 case RTE_ETH_FILTER_UPDATE:
4856 return flow_fdir_filter_update(dev, arg);
4857 case RTE_ETH_FILTER_DELETE:
4858 return flow_fdir_filter_delete(dev, arg);
4859 case RTE_ETH_FILTER_FLUSH:
4860 flow_fdir_filter_flush(dev);
4862 case RTE_ETH_FILTER_INFO:
4863 flow_fdir_info_get(dev, arg);
4866 DRV_LOG(DEBUG, "port %u unknown operation %u",
4867 dev->data->port_id, filter_op);
4875 * Manage filter operations.
4878 * Pointer to Ethernet device structure.
4879 * @param filter_type
4882 * Operation to perform.
4884 * Pointer to operation-specific structure.
4887 * 0 on success, a negative errno value otherwise and rte_errno is set.
4890 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
4891 enum rte_filter_type filter_type,
4892 enum rte_filter_op filter_op,
4895 switch (filter_type) {
4896 case RTE_ETH_FILTER_GENERIC:
4897 if (filter_op != RTE_ETH_FILTER_GET) {
4901 *(const void **)arg = &mlx5_flow_ops;
4903 case RTE_ETH_FILTER_FDIR:
4904 return flow_fdir_ctrl_func(dev, filter_op, arg);
4906 DRV_LOG(ERR, "port %u filter type (%d) not supported",
4907 dev->data->port_id, filter_type);
4908 rte_errno = ENOTSUP;
4915 * Create the needed meter and suffix tables.
4918 * Pointer to Ethernet device.
4921 * Pointer to table set on success, NULL otherwise.
4923 struct mlx5_meter_domains_infos *
4924 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev)
4926 const struct mlx5_flow_driver_ops *fops;
4928 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
4929 return fops->create_mtr_tbls(dev);
4933 * Destroy the meter table set.
4936 * Pointer to Ethernet device.
4938 * Pointer to the meter table set.
4944 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
4945 struct mlx5_meter_domains_infos *tbls)
4947 const struct mlx5_flow_driver_ops *fops;
4949 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
4950 return fops->destroy_mtr_tbls(dev, tbls);
4954 * Create policer rules.
4957 * Pointer to Ethernet device.
4959 * Pointer to flow meter structure.
4961 * Pointer to flow attributes.
4964 * 0 on success, -1 otherwise.
4967 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
4968 struct mlx5_flow_meter *fm,
4969 const struct rte_flow_attr *attr)
4971 const struct mlx5_flow_driver_ops *fops;
4973 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
4974 return fops->create_policer_rules(dev, fm, attr);
4978 * Destroy policer rules.
4981 * Pointer to flow meter structure.
4983 * Pointer to flow attributes.
4986 * 0 on success, -1 otherwise.
4989 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
4990 struct mlx5_flow_meter *fm,
4991 const struct rte_flow_attr *attr)
4993 const struct mlx5_flow_driver_ops *fops;
4995 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
4996 return fops->destroy_policer_rules(dev, fm, attr);
4999 #define MLX5_POOL_QUERY_FREQ_US 1000000
5002 * Set the periodic procedure for triggering asynchronous batch queries for all
5003 * the counter pools.
5006 * Pointer to mlx5_ibv_shared object.
5009 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
5011 struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
5012 uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
5015 cont = MLX5_CNT_CONTAINER(sh, 1, 0);
5016 pools_n += rte_atomic16_read(&cont->n_valid);
5017 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5018 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5019 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5020 sh->cmng.query_thread_on = 0;
5021 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5023 sh->cmng.query_thread_on = 1;
5028 * The periodic procedure for triggering asynchronous batch queries for all the
5029 * counter pools. This function is probably called by the host thread.
5032 * The parameter for the alarm process.
5035 mlx5_flow_query_alarm(void *arg)
5037 struct mlx5_ibv_shared *sh = arg;
5038 struct mlx5_devx_obj *dcs;
5041 uint8_t batch = sh->cmng.batch;
5042 uint16_t pool_index = sh->cmng.pool_index;
5043 struct mlx5_pools_container *cont;
5044 struct mlx5_pools_container *mcont;
5045 struct mlx5_flow_counter_pool *pool;
5047 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5050 cont = MLX5_CNT_CONTAINER(sh, batch, 1);
5051 mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
5052 /* Check if resize was done and need to flip a container. */
5053 if (cont != mcont) {
5055 /* Clean the old container. */
5056 rte_free(cont->pools);
5057 memset(cont, 0, sizeof(*cont));
5060 /* Flip the host container. */
5061 sh->cmng.mhi[batch] ^= (uint8_t)2;
5065 /* 2 empty containers case is unexpected. */
5066 if (unlikely(batch != sh->cmng.batch))
5070 goto next_container;
5072 pool = cont->pools[pool_index];
5074 /* There is a pool query in progress. */
5077 LIST_FIRST(&sh->cmng.free_stat_raws);
5079 /* No free counter statistics raw memory. */
5081 dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5083 offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5084 ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5086 pool->raw_hw->mem_mng->dm->id,
5088 (pool->raw_hw->data + offset),
5090 (uint64_t)(uintptr_t)pool);
5092 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5093 " %d", pool->min_dcs->id);
5094 pool->raw_hw = NULL;
5097 pool->raw_hw->min_dcs_id = dcs->id;
5098 LIST_REMOVE(pool->raw_hw, next);
5099 sh->cmng.pending_queries++;
5101 if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5106 sh->cmng.batch = batch;
5107 sh->cmng.pool_index = pool_index;
5108 mlx5_set_query_alarm(sh);
5112 * Handler for the HW respond about ready values from an asynchronous batch
5113 * query. This function is probably called by the host thread.
5116 * The pointer to the shared IB device context.
5117 * @param[in] async_id
5118 * The Devx async ID.
5120 * The status of the completion.
5123 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
5124 uint64_t async_id, int status)
5126 struct mlx5_flow_counter_pool *pool =
5127 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
5128 struct mlx5_counter_stats_raw *raw_to_free;
5130 if (unlikely(status)) {
5131 raw_to_free = pool->raw_hw;
5133 raw_to_free = pool->raw;
5134 rte_spinlock_lock(&pool->sl);
5135 pool->raw = pool->raw_hw;
5136 rte_spinlock_unlock(&pool->sl);
5137 rte_atomic64_add(&pool->query_gen, 1);
5138 /* Be sure the new raw counters data is updated in memory. */
5141 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
5142 pool->raw_hw = NULL;
5143 sh->cmng.pending_queries--;
5147 * Translate the rte_flow group index to HW table value.
5149 * @param[in] attributes
5150 * Pointer to flow attributes
5151 * @param[in] external
5152 * Value is part of flow rule created by request external to PMD.
5154 * rte_flow group index value.
5158 * Pointer to error structure.
5161 * 0 on success, a negative errno value otherwise and rte_errno is set.
5164 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
5165 uint32_t group, uint32_t *table,
5166 struct rte_flow_error *error)
5168 if (attributes->transfer && external) {
5169 if (group == UINT32_MAX)
5170 return rte_flow_error_set
5172 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5174 "group index not supported");
5183 * Discover availability of metadata reg_c's.
5185 * Iteratively use test flows to check availability.
5188 * Pointer to the Ethernet device structure.
5191 * 0 on success, a negative errno value otherwise and rte_errno is set.
5194 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
5196 struct mlx5_priv *priv = dev->data->dev_private;
5197 struct mlx5_dev_config *config = &priv->config;
5198 enum modify_reg idx;
5201 /* reg_c[0] and reg_c[1] are reserved. */
5202 config->flow_mreg_c[n++] = REG_C_0;
5203 config->flow_mreg_c[n++] = REG_C_1;
5204 /* Discover availability of other reg_c's. */
5205 for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
5206 struct rte_flow_attr attr = {
5207 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5208 .priority = MLX5_FLOW_PRIO_RSVD,
5211 struct rte_flow_item items[] = {
5213 .type = RTE_FLOW_ITEM_TYPE_END,
5216 struct rte_flow_action actions[] = {
5218 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5219 .conf = &(struct mlx5_flow_action_copy_mreg){
5225 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5226 .conf = &(struct rte_flow_action_jump){
5227 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5231 .type = RTE_FLOW_ACTION_TYPE_END,
5234 struct rte_flow *flow;
5235 struct rte_flow_error error;
5237 if (!config->dv_flow_en)
5239 /* Create internal flow, validation skips copy action. */
5240 flow = flow_list_create(dev, NULL, &attr, items,
5241 actions, false, &error);
5244 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
5245 config->flow_mreg_c[n++] = idx;
5246 flow_list_destroy(dev, NULL, flow);
5248 for (; n < MLX5_MREG_C_NUM; ++n)
5249 config->flow_mreg_c[n] = REG_NONE;