drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 #include <rte_common.h>
  14 #include <rte_ether.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_eal_paging.h>
  17 #include <rte_flow.h>
  18 #include <rte_cycles.h>
  19 #include <rte_flow_driver.h>
  20 #include <rte_malloc.h>
  21 #include <rte_ip.h>
  22
  23 #include <mlx5_glue.h>
  24 #include <mlx5_devx_cmds.h>
  25 #include <mlx5_prm.h>
  26 #include <mlx5_malloc.h>
  27
  28 #include "mlx5_defs.h"
  29 #include "mlx5.h"
  30 #include "mlx5_flow.h"
  31 #include "mlx5_flow_os.h"
  32 #include "mlx5_rxtx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              struct tunnel_default_miss_ctx *ctx,
  54                              struct rte_flow_error *error);
  55 static struct mlx5_flow_tunnel *
  56 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  57 static void
  58 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  59 static uint32_t
  60 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  61                                 const struct mlx5_flow_tunnel *tunnel,
  62                                 uint32_t group, uint32_t *table,
  63                                 struct rte_flow_error *error);
  64
  65 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  66 static void mlx5_flow_pop_thread_workspace(void);
  67
  68
  69 /** Device flow drivers. */
  70 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  71
  72 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  73
  74 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  75         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  76 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  77         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  78 #endif
  79         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  80         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  81 };
  82
  83 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  84 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  85         (const int []){ \
  86                 __VA_ARGS__, 0, \
  87         }
  88
  89 /** Node object of input graph for mlx5_flow_expand_rss(). */
  90 struct mlx5_flow_expand_node {
  91         const int *const next;
  92         /**<
  93          * List of next node indexes. Index 0 is interpreted as a terminator.
  94          */
  95         const enum rte_flow_item_type type;
  96         /**< Pattern item type of current node. */
  97         uint64_t rss_types;
  98         /**<
  99          * RSS types bit-field associated with this node
 100          * (see ETH_RSS_* definitions).
 101          */
 102 };
 103
 104 /** Object returned by mlx5_flow_expand_rss(). */
 105 struct mlx5_flow_expand_rss {
 106         uint32_t entries;
 107         /**< Number of entries @p patterns and @p priorities. */
 108         struct {
 109                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 110                 uint32_t priority; /**< Priority offset for each expansion. */
 111         } entry[];
 112 };
 113
 114 static enum rte_flow_item_type
 115 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 116 {
 117         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 118         uint16_t ether_type = 0;
 119         uint16_t ether_type_m;
 120         uint8_t ip_next_proto = 0;
 121         uint8_t ip_next_proto_m;
 122
 123         if (item == NULL || item->spec == NULL)
 124                 return ret;
 125         switch (item->type) {
 126         case RTE_FLOW_ITEM_TYPE_ETH:
 127                 if (item->mask)
 128                         ether_type_m = ((const struct rte_flow_item_eth *)
 129                                                 (item->mask))->type;
 130                 else
 131                         ether_type_m = rte_flow_item_eth_mask.type;
 132                 if (ether_type_m != RTE_BE16(0xFFFF))
 133                         break;
 134                 ether_type = ((const struct rte_flow_item_eth *)
 135                                 (item->spec))->type;
 136                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 137                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 139                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 140                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 141                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 142                 else
 143                         ret = RTE_FLOW_ITEM_TYPE_END;
 144                 break;
 145         case RTE_FLOW_ITEM_TYPE_VLAN:
 146                 if (item->mask)
 147                         ether_type_m = ((const struct rte_flow_item_vlan *)
 148                                                 (item->mask))->inner_type;
 149                 else
 150                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 151                 if (ether_type_m != RTE_BE16(0xFFFF))
 152                         break;
 153                 ether_type = ((const struct rte_flow_item_vlan *)
 154                                 (item->spec))->inner_type;
 155                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 156                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 157                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 158                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 159                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 160                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 161                 else
 162                         ret = RTE_FLOW_ITEM_TYPE_END;
 163                 break;
 164         case RTE_FLOW_ITEM_TYPE_IPV4:
 165                 if (item->mask)
 166                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 167                                         (item->mask))->hdr.next_proto_id;
 168                 else
 169                         ip_next_proto_m =
 170                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 171                 if (ip_next_proto_m != 0xFF)
 172                         break;
 173                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 174                                 (item->spec))->hdr.next_proto_id;
 175                 if (ip_next_proto == IPPROTO_UDP)
 176                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 177                 else if (ip_next_proto == IPPROTO_TCP)
 178                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 179                 else if (ip_next_proto == IPPROTO_IP)
 180                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 181                 else if (ip_next_proto == IPPROTO_IPV6)
 182                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 183                 else
 184                         ret = RTE_FLOW_ITEM_TYPE_END;
 185                 break;
 186         case RTE_FLOW_ITEM_TYPE_IPV6:
 187                 if (item->mask)
 188                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 189                                                 (item->mask))->hdr.proto;
 190                 else
 191                         ip_next_proto_m =
 192                                 rte_flow_item_ipv6_mask.hdr.proto;
 193                 if (ip_next_proto_m != 0xFF)
 194                         break;
 195                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 196                                 (item->spec))->hdr.proto;
 197                 if (ip_next_proto == IPPROTO_UDP)
 198                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 199                 else if (ip_next_proto == IPPROTO_TCP)
 200                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 201                 else if (ip_next_proto == IPPROTO_IP)
 202                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 203                 else if (ip_next_proto == IPPROTO_IPV6)
 204                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 205                 else
 206                         ret = RTE_FLOW_ITEM_TYPE_END;
 207                 break;
 208         default:
 209                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 210                 break;
 211         }
 212         return ret;
 213 }
 214
 215 #define MLX5_RSS_EXP_ELT_N 8
 216
 217 /**
 218  * Expand RSS flows into several possible flows according to the RSS hash
 219  * fields requested and the driver capabilities.
 220  *
 221  * @param[out] buf
 222  *   Buffer to store the result expansion.
 223  * @param[in] size
 224  *   Buffer size in bytes. If 0, @p buf can be NULL.
 225  * @param[in] pattern
 226  *   User flow pattern.
 227  * @param[in] types
 228  *   RSS types to expand (see ETH_RSS_* definitions).
 229  * @param[in] graph
 230  *   Input graph to expand @p pattern according to @p types.
 231  * @param[in] graph_root_index
 232  *   Index of root node in @p graph, typically 0.
 233  *
 234  * @return
 235  *   A positive value representing the size of @p buf in bytes regardless of
 236  *   @p size on success, a negative errno value otherwise and rte_errno is
 237  *   set, the following errors are defined:
 238  *
 239  *   -E2BIG: graph-depth @p graph is too deep.
 240  */
 241 static int
 242 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 243                      const struct rte_flow_item *pattern, uint64_t types,
 244                      const struct mlx5_flow_expand_node graph[],
 245                      int graph_root_index)
 246 {
 247         const struct rte_flow_item *item;
 248         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 249         const int *next_node;
 250         const int *stack[MLX5_RSS_EXP_ELT_N];
 251         int stack_pos = 0;
 252         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 253         unsigned int i;
 254         size_t lsize;
 255         size_t user_pattern_size = 0;
 256         void *addr = NULL;
 257         const struct mlx5_flow_expand_node *next = NULL;
 258         struct rte_flow_item missed_item;
 259         int missed = 0;
 260         int elt = 0;
 261         const struct rte_flow_item *last_item = NULL;
 262
 263         memset(&missed_item, 0, sizeof(missed_item));
 264         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 265                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 266         if (lsize <= size) {
 267                 buf->entry[0].priority = 0;
 268                 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 269                 buf->entries = 0;
 270                 addr = buf->entry[0].pattern;
 271         }
 272         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 273                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 274                         last_item = item;
 275                 for (i = 0; node->next && node->next[i]; ++i) {
 276                         next = &graph[node->next[i]];
 277                         if (next->type == item->type)
 278                                 break;
 279                 }
 280                 if (next)
 281                         node = next;
 282                 user_pattern_size += sizeof(*item);
 283         }
 284         user_pattern_size += sizeof(*item); /* Handle END item. */
 285         lsize += user_pattern_size;
 286         /* Copy the user pattern in the first entry of the buffer. */
 287         if (lsize <= size) {
 288                 rte_memcpy(addr, pattern, user_pattern_size);
 289                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 290                 buf->entries = 1;
 291         }
 292         /* Start expanding. */
 293         memset(flow_items, 0, sizeof(flow_items));
 294         user_pattern_size -= sizeof(*item);
 295         /*
 296          * Check if the last valid item has spec set, need complete pattern,
 297          * and the pattern can be used for expansion.
 298          */
 299         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 300         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 301                 /* Item type END indicates expansion is not required. */
 302                 return lsize;
 303         }
 304         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 305                 next = NULL;
 306                 missed = 1;
 307                 for (i = 0; node->next && node->next[i]; ++i) {
 308                         next = &graph[node->next[i]];
 309                         if (next->type == missed_item.type) {
 310                                 flow_items[0].type = missed_item.type;
 311                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 312                                 break;
 313                         }
 314                         next = NULL;
 315                 }
 316         }
 317         if (next && missed) {
 318                 elt = 2; /* missed item + item end. */
 319                 node = next;
 320                 lsize += elt * sizeof(*item) + user_pattern_size;
 321                 if ((node->rss_types & types) && lsize <= size) {
 322                         buf->entry[buf->entries].priority = 1;
 323                         buf->entry[buf->entries].pattern = addr;
 324                         buf->entries++;
 325                         rte_memcpy(addr, buf->entry[0].pattern,
 326                                    user_pattern_size);
 327                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 328                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 329                         addr = (void *)(((uintptr_t)addr) +
 330                                         elt * sizeof(*item));
 331                 }
 332         }
 333         memset(flow_items, 0, sizeof(flow_items));
 334         next_node = node->next;
 335         stack[stack_pos] = next_node;
 336         node = next_node ? &graph[*next_node] : NULL;
 337         while (node) {
 338                 flow_items[stack_pos].type = node->type;
 339                 if (node->rss_types & types) {
 340                         /*
 341                          * compute the number of items to copy from the
 342                          * expansion and copy it.
 343                          * When the stack_pos is 0, there are 1 element in it,
 344                          * plus the addition END item.
 345                          */
 346                         elt = stack_pos + 2;
 347                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 348                         lsize += elt * sizeof(*item) + user_pattern_size;
 349                         if (lsize <= size) {
 350                                 size_t n = elt * sizeof(*item);
 351
 352                                 buf->entry[buf->entries].priority =
 353                                         stack_pos + 1 + missed;
 354                                 buf->entry[buf->entries].pattern = addr;
 355                                 buf->entries++;
 356                                 rte_memcpy(addr, buf->entry[0].pattern,
 357                                            user_pattern_size);
 358                                 addr = (void *)(((uintptr_t)addr) +
 359                                                 user_pattern_size);
 360                                 rte_memcpy(addr, &missed_item,
 361                                            missed * sizeof(*item));
 362                                 addr = (void *)(((uintptr_t)addr) +
 363                                         missed * sizeof(*item));
 364                                 rte_memcpy(addr, flow_items, n);
 365                                 addr = (void *)(((uintptr_t)addr) + n);
 366                         }
 367                 }
 368                 /* Go deeper. */
 369                 if (node->next) {
 370                         next_node = node->next;
 371                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 372                                 rte_errno = E2BIG;
 373                                 return -rte_errno;
 374                         }
 375                         stack[stack_pos] = next_node;
 376                 } else if (*(next_node + 1)) {
 377                         /* Follow up with the next possibility. */
 378                         ++next_node;
 379                 } else {
 380                         /* Move to the next path. */
 381                         if (stack_pos)
 382                                 next_node = stack[--stack_pos];
 383                         next_node++;
 384                         stack[stack_pos] = next_node;
 385                 }
 386                 node = *next_node ? &graph[*next_node] : NULL;
 387         };
 388         /* no expanded flows but we have missed item, create one rule for it */
 389         if (buf->entries == 1 && missed != 0) {
 390                 elt = 2;
 391                 lsize += elt * sizeof(*item) + user_pattern_size;
 392                 if (lsize <= size) {
 393                         buf->entry[buf->entries].priority = 1;
 394                         buf->entry[buf->entries].pattern = addr;
 395                         buf->entries++;
 396                         flow_items[0].type = missed_item.type;
 397                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 398                         rte_memcpy(addr, buf->entry[0].pattern,
 399                                    user_pattern_size);
 400                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 401                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 402                 }
 403         }
 404         return lsize;
 405 }
 406
 407 enum mlx5_expansion {
 408         MLX5_EXPANSION_ROOT,
 409         MLX5_EXPANSION_ROOT_OUTER,
 410         MLX5_EXPANSION_ROOT_ETH_VLAN,
 411         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 412         MLX5_EXPANSION_OUTER_ETH,
 413         MLX5_EXPANSION_OUTER_ETH_VLAN,
 414         MLX5_EXPANSION_OUTER_VLAN,
 415         MLX5_EXPANSION_OUTER_IPV4,
 416         MLX5_EXPANSION_OUTER_IPV4_UDP,
 417         MLX5_EXPANSION_OUTER_IPV4_TCP,
 418         MLX5_EXPANSION_OUTER_IPV6,
 419         MLX5_EXPANSION_OUTER_IPV6_UDP,
 420         MLX5_EXPANSION_OUTER_IPV6_TCP,
 421         MLX5_EXPANSION_VXLAN,
 422         MLX5_EXPANSION_VXLAN_GPE,
 423         MLX5_EXPANSION_GRE,
 424         MLX5_EXPANSION_MPLS,
 425         MLX5_EXPANSION_ETH,
 426         MLX5_EXPANSION_ETH_VLAN,
 427         MLX5_EXPANSION_VLAN,
 428         MLX5_EXPANSION_IPV4,
 429         MLX5_EXPANSION_IPV4_UDP,
 430         MLX5_EXPANSION_IPV4_TCP,
 431         MLX5_EXPANSION_IPV6,
 432         MLX5_EXPANSION_IPV6_UDP,
 433         MLX5_EXPANSION_IPV6_TCP,
 434 };
 435
 436 /** Supported expansion of items. */
 437 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 438         [MLX5_EXPANSION_ROOT] = {
 439                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 440                                                   MLX5_EXPANSION_IPV4,
 441                                                   MLX5_EXPANSION_IPV6),
 442                 .type = RTE_FLOW_ITEM_TYPE_END,
 443         },
 444         [MLX5_EXPANSION_ROOT_OUTER] = {
 445                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 446                                                   MLX5_EXPANSION_OUTER_IPV4,
 447                                                   MLX5_EXPANSION_OUTER_IPV6),
 448                 .type = RTE_FLOW_ITEM_TYPE_END,
 449         },
 450         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 451                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 452                 .type = RTE_FLOW_ITEM_TYPE_END,
 453         },
 454         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 455                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 456                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 457                 .type = RTE_FLOW_ITEM_TYPE_END,
 458         },
 459         [MLX5_EXPANSION_OUTER_ETH] = {
 460                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 461                                                   MLX5_EXPANSION_OUTER_IPV6,
 462                                                   MLX5_EXPANSION_MPLS),
 463                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 464                 .rss_types = 0,
 465         },
 466         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 467                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 468                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 469                 .rss_types = 0,
 470         },
 471         [MLX5_EXPANSION_OUTER_VLAN] = {
 472                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 473                                                   MLX5_EXPANSION_OUTER_IPV6),
 474                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 475         },
 476         [MLX5_EXPANSION_OUTER_IPV4] = {
 477                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 478                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 479                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 480                          MLX5_EXPANSION_GRE,
 481                          MLX5_EXPANSION_IPV4,
 482                          MLX5_EXPANSION_IPV6),
 483                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 484                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 485                         ETH_RSS_NONFRAG_IPV4_OTHER,
 486         },
 487         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 488                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 489                                                   MLX5_EXPANSION_VXLAN_GPE),
 490                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 491                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 492         },
 493         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 494                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 495                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 496         },
 497         [MLX5_EXPANSION_OUTER_IPV6] = {
 498                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 499                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 500                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 501                          MLX5_EXPANSION_IPV4,
 502                          MLX5_EXPANSION_IPV6),
 503                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 504                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 505                         ETH_RSS_NONFRAG_IPV6_OTHER,
 506         },
 507         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 508                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 509                                                   MLX5_EXPANSION_VXLAN_GPE),
 510                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 511                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 512         },
 513         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 514                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 515                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 516         },
 517         [MLX5_EXPANSION_VXLAN] = {
 518                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 519                                                   MLX5_EXPANSION_IPV4,
 520                                                   MLX5_EXPANSION_IPV6),
 521                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 522         },
 523         [MLX5_EXPANSION_VXLAN_GPE] = {
 524                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 525                                                   MLX5_EXPANSION_IPV4,
 526                                                   MLX5_EXPANSION_IPV6),
 527                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 528         },
 529         [MLX5_EXPANSION_GRE] = {
 530                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 531                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 532         },
 533         [MLX5_EXPANSION_MPLS] = {
 534                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 535                                                   MLX5_EXPANSION_IPV6),
 536                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 537         },
 538         [MLX5_EXPANSION_ETH] = {
 539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 540                                                   MLX5_EXPANSION_IPV6),
 541                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 542         },
 543         [MLX5_EXPANSION_ETH_VLAN] = {
 544                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 545                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 546         },
 547         [MLX5_EXPANSION_VLAN] = {
 548                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 549                                                   MLX5_EXPANSION_IPV6),
 550                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 551         },
 552         [MLX5_EXPANSION_IPV4] = {
 553                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 554                                                   MLX5_EXPANSION_IPV4_TCP),
 555                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 556                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 557                         ETH_RSS_NONFRAG_IPV4_OTHER,
 558         },
 559         [MLX5_EXPANSION_IPV4_UDP] = {
 560                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 561                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 562         },
 563         [MLX5_EXPANSION_IPV4_TCP] = {
 564                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 565                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 566         },
 567         [MLX5_EXPANSION_IPV6] = {
 568                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 569                                                   MLX5_EXPANSION_IPV6_TCP),
 570                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 571                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 572                         ETH_RSS_NONFRAG_IPV6_OTHER,
 573         },
 574         [MLX5_EXPANSION_IPV6_UDP] = {
 575                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 576                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 577         },
 578         [MLX5_EXPANSION_IPV6_TCP] = {
 579                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 580                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 581         },
 582 };
 583
 584 static struct rte_flow_shared_action *
 585 mlx5_shared_action_create(struct rte_eth_dev *dev,
 586                           const struct rte_flow_shared_action_conf *conf,
 587                           const struct rte_flow_action *action,
 588                           struct rte_flow_error *error);
 589 static int mlx5_shared_action_destroy
 590                                 (struct rte_eth_dev *dev,
 591                                  struct rte_flow_shared_action *shared_action,
 592                                  struct rte_flow_error *error);
 593 static int mlx5_shared_action_update
 594                                 (struct rte_eth_dev *dev,
 595                                  struct rte_flow_shared_action *shared_action,
 596                                  const struct rte_flow_action *action,
 597                                  struct rte_flow_error *error);
 598 static int mlx5_shared_action_query
 599                                 (struct rte_eth_dev *dev,
 600                                  const struct rte_flow_shared_action *action,
 601                                  void *data,
 602                                  struct rte_flow_error *error);
 603 static int
 604 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 605                     struct rte_flow_tunnel *app_tunnel,
 606                     struct rte_flow_action **actions,
 607                     uint32_t *num_of_actions,
 608                     struct rte_flow_error *error);
 609 static int
 610 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 611                        struct rte_flow_tunnel *app_tunnel,
 612                        struct rte_flow_item **items,
 613                        uint32_t *num_of_items,
 614                        struct rte_flow_error *error);
 615 static int
 616 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 617                               struct rte_flow_item *pmd_items,
 618                               uint32_t num_items, struct rte_flow_error *err);
 619 static int
 620 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 621                                 struct rte_flow_action *pmd_actions,
 622                                 uint32_t num_actions,
 623                                 struct rte_flow_error *err);
 624 static int
 625 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 626                                   struct rte_mbuf *m,
 627                                   struct rte_flow_restore_info *info,
 628                                   struct rte_flow_error *err);
 629
 630 static const struct rte_flow_ops mlx5_flow_ops = {
 631         .validate = mlx5_flow_validate,
 632         .create = mlx5_flow_create,
 633         .destroy = mlx5_flow_destroy,
 634         .flush = mlx5_flow_flush,
 635         .isolate = mlx5_flow_isolate,
 636         .query = mlx5_flow_query,
 637         .dev_dump = mlx5_flow_dev_dump,
 638         .get_aged_flows = mlx5_flow_get_aged_flows,
 639         .shared_action_create = mlx5_shared_action_create,
 640         .shared_action_destroy = mlx5_shared_action_destroy,
 641         .shared_action_update = mlx5_shared_action_update,
 642         .shared_action_query = mlx5_shared_action_query,
 643         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 644         .tunnel_match = mlx5_flow_tunnel_match,
 645         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 646         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 647         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 648 };
 649
 650 /* Tunnel information. */
 651 struct mlx5_flow_tunnel_info {
 652         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 653         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 654 };
 655
 656 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 657         {
 658                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 659                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 660         },
 661         {
 662                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 663                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 664         },
 665         {
 666                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 667                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 668         },
 669         {
 670                 .tunnel = MLX5_FLOW_LAYER_GRE,
 671                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 672         },
 673         {
 674                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 675                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 676         },
 677         {
 678                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 679                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 680         },
 681         {
 682                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 683                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 684         },
 685         {
 686                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 687                 .ptype = RTE_PTYPE_TUNNEL_IP,
 688         },
 689         {
 690                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 691                 .ptype = RTE_PTYPE_TUNNEL_IP,
 692         },
 693         {
 694                 .tunnel = MLX5_FLOW_LAYER_GTP,
 695                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 696         },
 697 };
 698
 699 /* Key of thread specific flow workspace data. */
 700 static pthread_key_t key_workspace;
 701
 702 /* Thread specific flow workspace data once initialization data. */
 703 static pthread_once_t key_workspace_init;
 704
 705
 706 /**
 707  * Translate tag ID to register.
 708  *
 709  * @param[in] dev
 710  *   Pointer to the Ethernet device structure.
 711  * @param[in] feature
 712  *   The feature that request the register.
 713  * @param[in] id
 714  *   The request register ID.
 715  * @param[out] error
 716  *   Error description in case of any.
 717  *
 718  * @return
 719  *   The request register on success, a negative errno
 720  *   value otherwise and rte_errno is set.
 721  */
 722 int
 723 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 724                      enum mlx5_feature_name feature,
 725                      uint32_t id,
 726                      struct rte_flow_error *error)
 727 {
 728         struct mlx5_priv *priv = dev->data->dev_private;
 729         struct mlx5_dev_config *config = &priv->config;
 730         enum modify_reg start_reg;
 731         bool skip_mtr_reg = false;
 732
 733         switch (feature) {
 734         case MLX5_HAIRPIN_RX:
 735                 return REG_B;
 736         case MLX5_HAIRPIN_TX:
 737                 return REG_A;
 738         case MLX5_METADATA_RX:
 739                 switch (config->dv_xmeta_en) {
 740                 case MLX5_XMETA_MODE_LEGACY:
 741                         return REG_B;
 742                 case MLX5_XMETA_MODE_META16:
 743                         return REG_C_0;
 744                 case MLX5_XMETA_MODE_META32:
 745                         return REG_C_1;
 746                 }
 747                 break;
 748         case MLX5_METADATA_TX:
 749                 return REG_A;
 750         case MLX5_METADATA_FDB:
 751                 switch (config->dv_xmeta_en) {
 752                 case MLX5_XMETA_MODE_LEGACY:
 753                         return REG_NON;
 754                 case MLX5_XMETA_MODE_META16:
 755                         return REG_C_0;
 756                 case MLX5_XMETA_MODE_META32:
 757                         return REG_C_1;
 758                 }
 759                 break;
 760         case MLX5_FLOW_MARK:
 761                 switch (config->dv_xmeta_en) {
 762                 case MLX5_XMETA_MODE_LEGACY:
 763                         return REG_NON;
 764                 case MLX5_XMETA_MODE_META16:
 765                         return REG_C_1;
 766                 case MLX5_XMETA_MODE_META32:
 767                         return REG_C_0;
 768                 }
 769                 break;
 770         case MLX5_MTR_SFX:
 771                 /*
 772                  * If meter color and flow match share one register, flow match
 773                  * should use the meter color register for match.
 774                  */
 775                 if (priv->mtr_reg_share)
 776                         return priv->mtr_color_reg;
 777                 else
 778                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 779                                REG_C_3;
 780         case MLX5_MTR_COLOR:
 781         case MLX5_ASO_FLOW_HIT: /* Both features use the same REG_C. */
 782                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 783                 return priv->mtr_color_reg;
 784         case MLX5_COPY_MARK:
 785                 /*
 786                  * Metadata COPY_MARK register using is in meter suffix sub
 787                  * flow while with meter. It's safe to share the same register.
 788                  */
 789                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 790         case MLX5_APP_TAG:
 791                 /*
 792                  * If meter is enable, it will engage the register for color
 793                  * match and flow match. If meter color match is not using the
 794                  * REG_C_2, need to skip the REG_C_x be used by meter color
 795                  * match.
 796                  * If meter is disable, free to use all available registers.
 797                  */
 798                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 799                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 800                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 801                 if (id > (uint32_t)(REG_C_7 - start_reg))
 802                         return rte_flow_error_set(error, EINVAL,
 803                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 804                                                   NULL, "invalid tag id");
 805                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 806                         return rte_flow_error_set(error, ENOTSUP,
 807                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 808                                                   NULL, "unsupported tag id");
 809                 /*
 810                  * This case means meter is using the REG_C_x great than 2.
 811                  * Take care not to conflict with meter color REG_C_x.
 812                  * If the available index REG_C_y >= REG_C_x, skip the
 813                  * color register.
 814                  */
 815                 if (skip_mtr_reg && config->flow_mreg_c
 816                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 817                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 818                                 return rte_flow_error_set(error, EINVAL,
 819                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 820                                                         NULL, "invalid tag id");
 821                         if (config->flow_mreg_c
 822                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 823                                 return config->flow_mreg_c
 824                                                [id + 1 + start_reg - REG_C_0];
 825                         return rte_flow_error_set(error, ENOTSUP,
 826                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 827                                                   NULL, "unsupported tag id");
 828                 }
 829                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 830         }
 831         MLX5_ASSERT(false);
 832         return rte_flow_error_set(error, EINVAL,
 833                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 834                                   NULL, "invalid feature name");
 835 }
 836
 837 /**
 838  * Check extensive flow metadata register support.
 839  *
 840  * @param dev
 841  *   Pointer to rte_eth_dev structure.
 842  *
 843  * @return
 844  *   True if device supports extensive flow metadata register, otherwise false.
 845  */
 846 bool
 847 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 848 {
 849         struct mlx5_priv *priv = dev->data->dev_private;
 850         struct mlx5_dev_config *config = &priv->config;
 851
 852         /*
 853          * Having available reg_c can be regarded inclusively as supporting
 854          * extensive flow metadata register, which could mean,
 855          * - metadata register copy action by modify header.
 856          * - 16 modify header actions is supported.
 857          * - reg_c's are preserved across different domain (FDB and NIC) on
 858          *   packet loopback by flow lookup miss.
 859          */
 860         return config->flow_mreg_c[2] != REG_NON;
 861 }
 862
 863 /**
 864  * Verify the @p item specifications (spec, last, mask) are compatible with the
 865  * NIC capabilities.
 866  *
 867  * @param[in] item
 868  *   Item specification.
 869  * @param[in] mask
 870  *   @p item->mask or flow default bit-masks.
 871  * @param[in] nic_mask
 872  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 873  * @param[in] size
 874  *   Bit-masks size in bytes.
 875  * @param[in] range_accepted
 876  *   True if range of values is accepted for specific fields, false otherwise.
 877  * @param[out] error
 878  *   Pointer to error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 int
 884 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 885                           const uint8_t *mask,
 886                           const uint8_t *nic_mask,
 887                           unsigned int size,
 888                           bool range_accepted,
 889                           struct rte_flow_error *error)
 890 {
 891         unsigned int i;
 892
 893         MLX5_ASSERT(nic_mask);
 894         for (i = 0; i < size; ++i)
 895                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 896                         return rte_flow_error_set(error, ENOTSUP,
 897                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 898                                                   item,
 899                                                   "mask enables non supported"
 900                                                   " bits");
 901         if (!item->spec && (item->mask || item->last))
 902                 return rte_flow_error_set(error, EINVAL,
 903                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 904                                           "mask/last without a spec is not"
 905                                           " supported");
 906         if (item->spec && item->last && !range_accepted) {
 907                 uint8_t spec[size];
 908                 uint8_t last[size];
 909                 unsigned int i;
 910                 int ret;
 911
 912                 for (i = 0; i < size; ++i) {
 913                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 914                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 915                 }
 916                 ret = memcmp(spec, last, size);
 917                 if (ret != 0)
 918                         return rte_flow_error_set(error, EINVAL,
 919                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 920                                                   item,
 921                                                   "range is not valid");
 922         }
 923         return 0;
 924 }
 925
 926 /**
 927  * Adjust the hash fields according to the @p flow information.
 928  *
 929  * @param[in] dev_flow.
 930  *   Pointer to the mlx5_flow.
 931  * @param[in] tunnel
 932  *   1 when the hash field is for a tunnel item.
 933  * @param[in] layer_types
 934  *   ETH_RSS_* types.
 935  * @param[in] hash_fields
 936  *   Item hash fields.
 937  *
 938  * @return
 939  *   The hash fields that should be used.
 940  */
 941 uint64_t
 942 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
 943                             int tunnel __rte_unused, uint64_t layer_types,
 944                             uint64_t hash_fields)
 945 {
 946 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 947         int rss_request_inner = rss_desc->level >= 2;
 948
 949         /* Check RSS hash level for tunnel. */
 950         if (tunnel && rss_request_inner)
 951                 hash_fields |= IBV_RX_HASH_INNER;
 952         else if (tunnel || rss_request_inner)
 953                 return 0;
 954 #endif
 955         /* Check if requested layer matches RSS hash fields. */
 956         if (!(rss_desc->types & layer_types))
 957                 return 0;
 958         return hash_fields;
 959 }
 960
 961 /**
 962  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 963  * if several tunnel rules are used on this queue, the tunnel ptype will be
 964  * cleared.
 965  *
 966  * @param rxq_ctrl
 967  *   Rx queue to update.
 968  */
 969 static void
 970 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 971 {
 972         unsigned int i;
 973         uint32_t tunnel_ptype = 0;
 974
 975         /* Look up for the ptype to use. */
 976         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 977                 if (!rxq_ctrl->flow_tunnels_n[i])
 978                         continue;
 979                 if (!tunnel_ptype) {
 980                         tunnel_ptype = tunnels_info[i].ptype;
 981                 } else {
 982                         tunnel_ptype = 0;
 983                         break;
 984                 }
 985         }
 986         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 987 }
 988
 989 /**
 990  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 991  * flow.
 992  *
 993  * @param[in] dev
 994  *   Pointer to the Ethernet device structure.
 995  * @param[in] dev_handle
 996  *   Pointer to device flow handle structure.
 997  */
 998 static void
 999 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1000                        struct mlx5_flow_handle *dev_handle)
1001 {
1002         struct mlx5_priv *priv = dev->data->dev_private;
1003         const int mark = dev_handle->mark;
1004         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1005         struct mlx5_ind_table_obj *ind_tbl = NULL;
1006         unsigned int i;
1007
1008         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1009                 struct mlx5_hrxq *hrxq;
1010
1011                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1012                               dev_handle->rix_hrxq);
1013                 if (hrxq)
1014                         ind_tbl = hrxq->ind_table;
1015         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1016                 struct mlx5_shared_action_rss *shared_rss;
1017
1018                 shared_rss = mlx5_ipool_get
1019                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1020                          dev_handle->rix_srss);
1021                 if (shared_rss)
1022                         ind_tbl = shared_rss->ind_tbl;
1023         }
1024         if (!ind_tbl)
1025                 return;
1026         for (i = 0; i != ind_tbl->queues_n; ++i) {
1027                 int idx = ind_tbl->queues[i];
1028                 struct mlx5_rxq_ctrl *rxq_ctrl =
1029                         container_of((*priv->rxqs)[idx],
1030                                      struct mlx5_rxq_ctrl, rxq);
1031
1032                 /*
1033                  * To support metadata register copy on Tx loopback,
1034                  * this must be always enabled (metadata may arive
1035                  * from other port - not from local flows only.
1036                  */
1037                 if (priv->config.dv_flow_en &&
1038                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1039                     mlx5_flow_ext_mreg_supported(dev)) {
1040                         rxq_ctrl->rxq.mark = 1;
1041                         rxq_ctrl->flow_mark_n = 1;
1042                 } else if (mark) {
1043                         rxq_ctrl->rxq.mark = 1;
1044                         rxq_ctrl->flow_mark_n++;
1045                 }
1046                 if (tunnel) {
1047                         unsigned int j;
1048
1049                         /* Increase the counter matching the flow. */
1050                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1051                                 if ((tunnels_info[j].tunnel &
1052                                      dev_handle->layers) ==
1053                                     tunnels_info[j].tunnel) {
1054                                         rxq_ctrl->flow_tunnels_n[j]++;
1055                                         break;
1056                                 }
1057                         }
1058                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1059                 }
1060         }
1061 }
1062
1063 /**
1064  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1065  *
1066  * @param[in] dev
1067  *   Pointer to the Ethernet device structure.
1068  * @param[in] flow
1069  *   Pointer to flow structure.
1070  */
1071 static void
1072 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1073 {
1074         struct mlx5_priv *priv = dev->data->dev_private;
1075         uint32_t handle_idx;
1076         struct mlx5_flow_handle *dev_handle;
1077
1078         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1079                        handle_idx, dev_handle, next)
1080                 flow_drv_rxq_flags_set(dev, dev_handle);
1081 }
1082
1083 /**
1084  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1085  * device flow if no other flow uses it with the same kind of request.
1086  *
1087  * @param dev
1088  *   Pointer to Ethernet device.
1089  * @param[in] dev_handle
1090  *   Pointer to the device flow handle structure.
1091  */
1092 static void
1093 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1094                         struct mlx5_flow_handle *dev_handle)
1095 {
1096         struct mlx5_priv *priv = dev->data->dev_private;
1097         const int mark = dev_handle->mark;
1098         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1099         struct mlx5_ind_table_obj *ind_tbl = NULL;
1100         unsigned int i;
1101
1102         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1103                 struct mlx5_hrxq *hrxq;
1104
1105                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1106                               dev_handle->rix_hrxq);
1107                 if (hrxq)
1108                         ind_tbl = hrxq->ind_table;
1109         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1110                 struct mlx5_shared_action_rss *shared_rss;
1111
1112                 shared_rss = mlx5_ipool_get
1113                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1114                          dev_handle->rix_srss);
1115                 if (shared_rss)
1116                         ind_tbl = shared_rss->ind_tbl;
1117         }
1118         if (!ind_tbl)
1119                 return;
1120         MLX5_ASSERT(dev->data->dev_started);
1121         for (i = 0; i != ind_tbl->queues_n; ++i) {
1122                 int idx = ind_tbl->queues[i];
1123                 struct mlx5_rxq_ctrl *rxq_ctrl =
1124                         container_of((*priv->rxqs)[idx],
1125                                      struct mlx5_rxq_ctrl, rxq);
1126
1127                 if (priv->config.dv_flow_en &&
1128                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1129                     mlx5_flow_ext_mreg_supported(dev)) {
1130                         rxq_ctrl->rxq.mark = 1;
1131                         rxq_ctrl->flow_mark_n = 1;
1132                 } else if (mark) {
1133                         rxq_ctrl->flow_mark_n--;
1134                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1135                 }
1136                 if (tunnel) {
1137                         unsigned int j;
1138
1139                         /* Decrease the counter matching the flow. */
1140                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1141                                 if ((tunnels_info[j].tunnel &
1142                                      dev_handle->layers) ==
1143                                     tunnels_info[j].tunnel) {
1144                                         rxq_ctrl->flow_tunnels_n[j]--;
1145                                         break;
1146                                 }
1147                         }
1148                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1149                 }
1150         }
1151 }
1152
1153 /**
1154  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1155  * @p flow if no other flow uses it with the same kind of request.
1156  *
1157  * @param dev
1158  *   Pointer to Ethernet device.
1159  * @param[in] flow
1160  *   Pointer to the flow.
1161  */
1162 static void
1163 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1164 {
1165         struct mlx5_priv *priv = dev->data->dev_private;
1166         uint32_t handle_idx;
1167         struct mlx5_flow_handle *dev_handle;
1168
1169         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1170                        handle_idx, dev_handle, next)
1171                 flow_drv_rxq_flags_trim(dev, dev_handle);
1172 }
1173
1174 /**
1175  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1176  *
1177  * @param dev
1178  *   Pointer to Ethernet device.
1179  */
1180 static void
1181 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1182 {
1183         struct mlx5_priv *priv = dev->data->dev_private;
1184         unsigned int i;
1185
1186         for (i = 0; i != priv->rxqs_n; ++i) {
1187                 struct mlx5_rxq_ctrl *rxq_ctrl;
1188                 unsigned int j;
1189
1190                 if (!(*priv->rxqs)[i])
1191                         continue;
1192                 rxq_ctrl = container_of((*priv->rxqs)[i],
1193                                         struct mlx5_rxq_ctrl, rxq);
1194                 rxq_ctrl->flow_mark_n = 0;
1195                 rxq_ctrl->rxq.mark = 0;
1196                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1197                         rxq_ctrl->flow_tunnels_n[j] = 0;
1198                 rxq_ctrl->rxq.tunnel = 0;
1199         }
1200 }
1201
1202 /**
1203  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1204  *
1205  * @param[in] dev
1206  *   Pointer to the Ethernet device structure.
1207  */
1208 void
1209 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1210 {
1211         struct mlx5_priv *priv = dev->data->dev_private;
1212         struct mlx5_rxq_data *data;
1213         unsigned int i;
1214
1215         for (i = 0; i != priv->rxqs_n; ++i) {
1216                 if (!(*priv->rxqs)[i])
1217                         continue;
1218                 data = (*priv->rxqs)[i];
1219                 if (!rte_flow_dynf_metadata_avail()) {
1220                         data->dynf_meta = 0;
1221                         data->flow_meta_mask = 0;
1222                         data->flow_meta_offset = -1;
1223                 } else {
1224                         data->dynf_meta = 1;
1225                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1226                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1227                 }
1228         }
1229 }
1230
1231 /*
1232  * return a pointer to the desired action in the list of actions.
1233  *
1234  * @param[in] actions
1235  *   The list of actions to search the action in.
1236  * @param[in] action
1237  *   The action to find.
1238  *
1239  * @return
1240  *   Pointer to the action in the list, if found. NULL otherwise.
1241  */
1242 const struct rte_flow_action *
1243 mlx5_flow_find_action(const struct rte_flow_action *actions,
1244                       enum rte_flow_action_type action)
1245 {
1246         if (actions == NULL)
1247                 return NULL;
1248         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1249                 if (actions->type == action)
1250                         return actions;
1251         return NULL;
1252 }
1253
1254 /*
1255  * Validate the flag action.
1256  *
1257  * @param[in] action_flags
1258  *   Bit-fields that holds the actions detected until now.
1259  * @param[in] attr
1260  *   Attributes of flow that includes this action.
1261  * @param[out] error
1262  *   Pointer to error structure.
1263  *
1264  * @return
1265  *   0 on success, a negative errno value otherwise and rte_errno is set.
1266  */
1267 int
1268 mlx5_flow_validate_action_flag(uint64_t action_flags,
1269                                const struct rte_flow_attr *attr,
1270                                struct rte_flow_error *error)
1271 {
1272         if (action_flags & MLX5_FLOW_ACTION_MARK)
1273                 return rte_flow_error_set(error, EINVAL,
1274                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1275                                           "can't mark and flag in same flow");
1276         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1277                 return rte_flow_error_set(error, EINVAL,
1278                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1279                                           "can't have 2 flag"
1280                                           " actions in same flow");
1281         if (attr->egress)
1282                 return rte_flow_error_set(error, ENOTSUP,
1283                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1284                                           "flag action not supported for "
1285                                           "egress");
1286         return 0;
1287 }
1288
1289 /*
1290  * Validate the mark action.
1291  *
1292  * @param[in] action
1293  *   Pointer to the queue action.
1294  * @param[in] action_flags
1295  *   Bit-fields that holds the actions detected until now.
1296  * @param[in] attr
1297  *   Attributes of flow that includes this action.
1298  * @param[out] error
1299  *   Pointer to error structure.
1300  *
1301  * @return
1302  *   0 on success, a negative errno value otherwise and rte_errno is set.
1303  */
1304 int
1305 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1306                                uint64_t action_flags,
1307                                const struct rte_flow_attr *attr,
1308                                struct rte_flow_error *error)
1309 {
1310         const struct rte_flow_action_mark *mark = action->conf;
1311
1312         if (!mark)
1313                 return rte_flow_error_set(error, EINVAL,
1314                                           RTE_FLOW_ERROR_TYPE_ACTION,
1315                                           action,
1316                                           "configuration cannot be null");
1317         if (mark->id >= MLX5_FLOW_MARK_MAX)
1318                 return rte_flow_error_set(error, EINVAL,
1319                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1320                                           &mark->id,
1321                                           "mark id must in 0 <= id < "
1322                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1323         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1324                 return rte_flow_error_set(error, EINVAL,
1325                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1326                                           "can't flag and mark in same flow");
1327         if (action_flags & MLX5_FLOW_ACTION_MARK)
1328                 return rte_flow_error_set(error, EINVAL,
1329                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1330                                           "can't have 2 mark actions in same"
1331                                           " flow");
1332         if (attr->egress)
1333                 return rte_flow_error_set(error, ENOTSUP,
1334                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1335                                           "mark action not supported for "
1336                                           "egress");
1337         return 0;
1338 }
1339
1340 /*
1341  * Validate the drop action.
1342  *
1343  * @param[in] action_flags
1344  *   Bit-fields that holds the actions detected until now.
1345  * @param[in] attr
1346  *   Attributes of flow that includes this action.
1347  * @param[out] error
1348  *   Pointer to error structure.
1349  *
1350  * @return
1351  *   0 on success, a negative errno value otherwise and rte_errno is set.
1352  */
1353 int
1354 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1355                                const struct rte_flow_attr *attr,
1356                                struct rte_flow_error *error)
1357 {
1358         if (attr->egress)
1359                 return rte_flow_error_set(error, ENOTSUP,
1360                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1361                                           "drop action not supported for "
1362                                           "egress");
1363         return 0;
1364 }
1365
1366 /*
1367  * Validate the queue action.
1368  *
1369  * @param[in] action
1370  *   Pointer to the queue action.
1371  * @param[in] action_flags
1372  *   Bit-fields that holds the actions detected until now.
1373  * @param[in] dev
1374  *   Pointer to the Ethernet device structure.
1375  * @param[in] attr
1376  *   Attributes of flow that includes this action.
1377  * @param[out] error
1378  *   Pointer to error structure.
1379  *
1380  * @return
1381  *   0 on success, a negative errno value otherwise and rte_errno is set.
1382  */
1383 int
1384 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1385                                 uint64_t action_flags,
1386                                 struct rte_eth_dev *dev,
1387                                 const struct rte_flow_attr *attr,
1388                                 struct rte_flow_error *error)
1389 {
1390         struct mlx5_priv *priv = dev->data->dev_private;
1391         const struct rte_flow_action_queue *queue = action->conf;
1392
1393         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1394                 return rte_flow_error_set(error, EINVAL,
1395                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1396                                           "can't have 2 fate actions in"
1397                                           " same flow");
1398         if (!priv->rxqs_n)
1399                 return rte_flow_error_set(error, EINVAL,
1400                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1401                                           NULL, "No Rx queues configured");
1402         if (queue->index >= priv->rxqs_n)
1403                 return rte_flow_error_set(error, EINVAL,
1404                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1405                                           &queue->index,
1406                                           "queue index out of range");
1407         if (!(*priv->rxqs)[queue->index])
1408                 return rte_flow_error_set(error, EINVAL,
1409                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1410                                           &queue->index,
1411                                           "queue is not configured");
1412         if (attr->egress)
1413                 return rte_flow_error_set(error, ENOTSUP,
1414                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1415                                           "queue action not supported for "
1416                                           "egress");
1417         return 0;
1418 }
1419
1420 /*
1421  * Validate the rss action.
1422  *
1423  * @param[in] dev
1424  *   Pointer to the Ethernet device structure.
1425  * @param[in] action
1426  *   Pointer to the queue action.
1427  * @param[out] error
1428  *   Pointer to error structure.
1429  *
1430  * @return
1431  *   0 on success, a negative errno value otherwise and rte_errno is set.
1432  */
1433 int
1434 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1435                          const struct rte_flow_action *action,
1436                          struct rte_flow_error *error)
1437 {
1438         struct mlx5_priv *priv = dev->data->dev_private;
1439         const struct rte_flow_action_rss *rss = action->conf;
1440         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1441         unsigned int i;
1442
1443         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1444             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1445                 return rte_flow_error_set(error, ENOTSUP,
1446                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1447                                           &rss->func,
1448                                           "RSS hash function not supported");
1449 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1450         if (rss->level > 2)
1451 #else
1452         if (rss->level > 1)
1453 #endif
1454                 return rte_flow_error_set(error, ENOTSUP,
1455                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1456                                           &rss->level,
1457                                           "tunnel RSS is not supported");
1458         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1459         if (rss->key_len == 0 && rss->key != NULL)
1460                 return rte_flow_error_set(error, ENOTSUP,
1461                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1462                                           &rss->key_len,
1463                                           "RSS hash key length 0");
1464         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1465                 return rte_flow_error_set(error, ENOTSUP,
1466                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1467                                           &rss->key_len,
1468                                           "RSS hash key too small");
1469         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1470                 return rte_flow_error_set(error, ENOTSUP,
1471                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1472                                           &rss->key_len,
1473                                           "RSS hash key too large");
1474         if (rss->queue_num > priv->config.ind_table_max_size)
1475                 return rte_flow_error_set(error, ENOTSUP,
1476                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1477                                           &rss->queue_num,
1478                                           "number of queues too large");
1479         if (rss->types & MLX5_RSS_HF_MASK)
1480                 return rte_flow_error_set(error, ENOTSUP,
1481                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1482                                           &rss->types,
1483                                           "some RSS protocols are not"
1484                                           " supported");
1485         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1486             !(rss->types & ETH_RSS_IP))
1487                 return rte_flow_error_set(error, EINVAL,
1488                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1489                                           "L3 partial RSS requested but L3 RSS"
1490                                           " type not specified");
1491         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1492             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1493                 return rte_flow_error_set(error, EINVAL,
1494                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1495                                           "L4 partial RSS requested but L4 RSS"
1496                                           " type not specified");
1497         if (!priv->rxqs_n)
1498                 return rte_flow_error_set(error, EINVAL,
1499                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1500                                           NULL, "No Rx queues configured");
1501         if (!rss->queue_num)
1502                 return rte_flow_error_set(error, EINVAL,
1503                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1504                                           NULL, "No queues configured");
1505         for (i = 0; i != rss->queue_num; ++i) {
1506                 struct mlx5_rxq_ctrl *rxq_ctrl;
1507
1508                 if (rss->queue[i] >= priv->rxqs_n)
1509                         return rte_flow_error_set
1510                                 (error, EINVAL,
1511                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1512                                  &rss->queue[i], "queue index out of range");
1513                 if (!(*priv->rxqs)[rss->queue[i]])
1514                         return rte_flow_error_set
1515                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1516                                  &rss->queue[i], "queue is not configured");
1517                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1518                                         struct mlx5_rxq_ctrl, rxq);
1519                 if (i == 0)
1520                         rxq_type = rxq_ctrl->type;
1521                 if (rxq_type != rxq_ctrl->type)
1522                         return rte_flow_error_set
1523                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1524                                  &rss->queue[i],
1525                                  "combining hairpin and regular RSS queues is not supported");
1526         }
1527         return 0;
1528 }
1529
1530 /*
1531  * Validate the rss action.
1532  *
1533  * @param[in] action
1534  *   Pointer to the queue action.
1535  * @param[in] action_flags
1536  *   Bit-fields that holds the actions detected until now.
1537  * @param[in] dev
1538  *   Pointer to the Ethernet device structure.
1539  * @param[in] attr
1540  *   Attributes of flow that includes this action.
1541  * @param[in] item_flags
1542  *   Items that were detected.
1543  * @param[out] error
1544  *   Pointer to error structure.
1545  *
1546  * @return
1547  *   0 on success, a negative errno value otherwise and rte_errno is set.
1548  */
1549 int
1550 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1551                               uint64_t action_flags,
1552                               struct rte_eth_dev *dev,
1553                               const struct rte_flow_attr *attr,
1554                               uint64_t item_flags,
1555                               struct rte_flow_error *error)
1556 {
1557         const struct rte_flow_action_rss *rss = action->conf;
1558         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1559         int ret;
1560
1561         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1562                 return rte_flow_error_set(error, EINVAL,
1563                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1564                                           "can't have 2 fate actions"
1565                                           " in same flow");
1566         ret = mlx5_validate_action_rss(dev, action, error);
1567         if (ret)
1568                 return ret;
1569         if (attr->egress)
1570                 return rte_flow_error_set(error, ENOTSUP,
1571                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1572                                           "rss action not supported for "
1573                                           "egress");
1574         if (rss->level > 1 && !tunnel)
1575                 return rte_flow_error_set(error, EINVAL,
1576                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1577                                           "inner RSS is not supported for "
1578                                           "non-tunnel flows");
1579         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1580             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1581                 return rte_flow_error_set(error, EINVAL,
1582                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1583                                           "RSS on eCPRI is not supported now");
1584         }
1585         return 0;
1586 }
1587
1588 /*
1589  * Validate the default miss action.
1590  *
1591  * @param[in] action_flags
1592  *   Bit-fields that holds the actions detected until now.
1593  * @param[out] error
1594  *   Pointer to error structure.
1595  *
1596  * @return
1597  *   0 on success, a negative errno value otherwise and rte_errno is set.
1598  */
1599 int
1600 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1601                                 const struct rte_flow_attr *attr,
1602                                 struct rte_flow_error *error)
1603 {
1604         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1605                 return rte_flow_error_set(error, EINVAL,
1606                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1607                                           "can't have 2 fate actions in"
1608                                           " same flow");
1609         if (attr->egress)
1610                 return rte_flow_error_set(error, ENOTSUP,
1611                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1612                                           "default miss action not supported "
1613                                           "for egress");
1614         if (attr->group)
1615                 return rte_flow_error_set(error, ENOTSUP,
1616                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1617                                           "only group 0 is supported");
1618         if (attr->transfer)
1619                 return rte_flow_error_set(error, ENOTSUP,
1620                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1621                                           NULL, "transfer is not supported");
1622         return 0;
1623 }
1624
1625 /*
1626  * Validate the count action.
1627  *
1628  * @param[in] dev
1629  *   Pointer to the Ethernet device structure.
1630  * @param[in] attr
1631  *   Attributes of flow that includes this action.
1632  * @param[out] error
1633  *   Pointer to error structure.
1634  *
1635  * @return
1636  *   0 on success, a negative errno value otherwise and rte_errno is set.
1637  */
1638 int
1639 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1640                                 const struct rte_flow_attr *attr,
1641                                 struct rte_flow_error *error)
1642 {
1643         if (attr->egress)
1644                 return rte_flow_error_set(error, ENOTSUP,
1645                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1646                                           "count action not supported for "
1647                                           "egress");
1648         return 0;
1649 }
1650
1651 /**
1652  * Verify the @p attributes will be correctly understood by the NIC and store
1653  * them in the @p flow if everything is correct.
1654  *
1655  * @param[in] dev
1656  *   Pointer to the Ethernet device structure.
1657  * @param[in] attributes
1658  *   Pointer to flow attributes
1659  * @param[out] error
1660  *   Pointer to error structure.
1661  *
1662  * @return
1663  *   0 on success, a negative errno value otherwise and rte_errno is set.
1664  */
1665 int
1666 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1667                               const struct rte_flow_attr *attributes,
1668                               struct rte_flow_error *error)
1669 {
1670         struct mlx5_priv *priv = dev->data->dev_private;
1671         uint32_t priority_max = priv->config.flow_prio - 1;
1672
1673         if (attributes->group)
1674                 return rte_flow_error_set(error, ENOTSUP,
1675                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1676                                           NULL, "groups is not supported");
1677         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1678             attributes->priority >= priority_max)
1679                 return rte_flow_error_set(error, ENOTSUP,
1680                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1681                                           NULL, "priority out of range");
1682         if (attributes->egress)
1683                 return rte_flow_error_set(error, ENOTSUP,
1684                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1685                                           "egress is not supported");
1686         if (attributes->transfer && !priv->config.dv_esw_en)
1687                 return rte_flow_error_set(error, ENOTSUP,
1688                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1689                                           NULL, "transfer is not supported");
1690         if (!attributes->ingress)
1691                 return rte_flow_error_set(error, EINVAL,
1692                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1693                                           NULL,
1694                                           "ingress attribute is mandatory");
1695         return 0;
1696 }
1697
1698 /**
1699  * Validate ICMP6 item.
1700  *
1701  * @param[in] item
1702  *   Item specification.
1703  * @param[in] item_flags
1704  *   Bit-fields that holds the items detected until now.
1705  * @param[in] ext_vlan_sup
1706  *   Whether extended VLAN features are supported or not.
1707  * @param[out] error
1708  *   Pointer to error structure.
1709  *
1710  * @return
1711  *   0 on success, a negative errno value otherwise and rte_errno is set.
1712  */
1713 int
1714 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1715                                uint64_t item_flags,
1716                                uint8_t target_protocol,
1717                                struct rte_flow_error *error)
1718 {
1719         const struct rte_flow_item_icmp6 *mask = item->mask;
1720         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1721         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1722                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1723         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1724                                       MLX5_FLOW_LAYER_OUTER_L4;
1725         int ret;
1726
1727         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1730                                           "protocol filtering not compatible"
1731                                           " with ICMP6 layer");
1732         if (!(item_flags & l3m))
1733                 return rte_flow_error_set(error, EINVAL,
1734                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1735                                           "IPv6 is mandatory to filter on"
1736                                           " ICMP6");
1737         if (item_flags & l4m)
1738                 return rte_flow_error_set(error, EINVAL,
1739                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1740                                           "multiple L4 layers not supported");
1741         if (!mask)
1742                 mask = &rte_flow_item_icmp6_mask;
1743         ret = mlx5_flow_item_acceptable
1744                 (item, (const uint8_t *)mask,
1745                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1746                  sizeof(struct rte_flow_item_icmp6),
1747                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1748         if (ret < 0)
1749                 return ret;
1750         return 0;
1751 }
1752
1753 /**
1754  * Validate ICMP item.
1755  *
1756  * @param[in] item
1757  *   Item specification.
1758  * @param[in] item_flags
1759  *   Bit-fields that holds the items detected until now.
1760  * @param[out] error
1761  *   Pointer to error structure.
1762  *
1763  * @return
1764  *   0 on success, a negative errno value otherwise and rte_errno is set.
1765  */
1766 int
1767 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1768                              uint64_t item_flags,
1769                              uint8_t target_protocol,
1770                              struct rte_flow_error *error)
1771 {
1772         const struct rte_flow_item_icmp *mask = item->mask;
1773         const struct rte_flow_item_icmp nic_mask = {
1774                 .hdr.icmp_type = 0xff,
1775                 .hdr.icmp_code = 0xff,
1776                 .hdr.icmp_ident = RTE_BE16(0xffff),
1777                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1778         };
1779         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1780         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1781                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1782         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1783                                       MLX5_FLOW_LAYER_OUTER_L4;
1784         int ret;
1785
1786         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1789                                           "protocol filtering not compatible"
1790                                           " with ICMP layer");
1791         if (!(item_flags & l3m))
1792                 return rte_flow_error_set(error, EINVAL,
1793                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1794                                           "IPv4 is mandatory to filter"
1795                                           " on ICMP");
1796         if (item_flags & l4m)
1797                 return rte_flow_error_set(error, EINVAL,
1798                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1799                                           "multiple L4 layers not supported");
1800         if (!mask)
1801                 mask = &nic_mask;
1802         ret = mlx5_flow_item_acceptable
1803                 (item, (const uint8_t *)mask,
1804                  (const uint8_t *)&nic_mask,
1805                  sizeof(struct rte_flow_item_icmp),
1806                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1807         if (ret < 0)
1808                 return ret;
1809         return 0;
1810 }
1811
1812 /**
1813  * Validate Ethernet item.
1814  *
1815  * @param[in] item
1816  *   Item specification.
1817  * @param[in] item_flags
1818  *   Bit-fields that holds the items detected until now.
1819  * @param[out] error
1820  *   Pointer to error structure.
1821  *
1822  * @return
1823  *   0 on success, a negative errno value otherwise and rte_errno is set.
1824  */
1825 int
1826 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1827                             uint64_t item_flags, bool ext_vlan_sup,
1828                             struct rte_flow_error *error)
1829 {
1830         const struct rte_flow_item_eth *mask = item->mask;
1831         const struct rte_flow_item_eth nic_mask = {
1832                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1833                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1834                 .type = RTE_BE16(0xffff),
1835                 .has_vlan = ext_vlan_sup ? 1 : 0,
1836         };
1837         int ret;
1838         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1839         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1840                                        MLX5_FLOW_LAYER_OUTER_L2;
1841
1842         if (item_flags & ethm)
1843                 return rte_flow_error_set(error, ENOTSUP,
1844                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1845                                           "multiple L2 layers not supported");
1846         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1847             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1848                 return rte_flow_error_set(error, EINVAL,
1849                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1850                                           "L2 layer should not follow "
1851                                           "L3 layers");
1852         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1853             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1854                 return rte_flow_error_set(error, EINVAL,
1855                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1856                                           "L2 layer should not follow VLAN");
1857         if (!mask)
1858                 mask = &rte_flow_item_eth_mask;
1859         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1860                                         (const uint8_t *)&nic_mask,
1861                                         sizeof(struct rte_flow_item_eth),
1862                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1863         return ret;
1864 }
1865
1866 /**
1867  * Validate VLAN item.
1868  *
1869  * @param[in] item
1870  *   Item specification.
1871  * @param[in] item_flags
1872  *   Bit-fields that holds the items detected until now.
1873  * @param[in] dev
1874  *   Ethernet device flow is being created on.
1875  * @param[out] error
1876  *   Pointer to error structure.
1877  *
1878  * @return
1879  *   0 on success, a negative errno value otherwise and rte_errno is set.
1880  */
1881 int
1882 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1883                              uint64_t item_flags,
1884                              struct rte_eth_dev *dev,
1885                              struct rte_flow_error *error)
1886 {
1887         const struct rte_flow_item_vlan *spec = item->spec;
1888         const struct rte_flow_item_vlan *mask = item->mask;
1889         const struct rte_flow_item_vlan nic_mask = {
1890                 .tci = RTE_BE16(UINT16_MAX),
1891                 .inner_type = RTE_BE16(UINT16_MAX),
1892         };
1893         uint16_t vlan_tag = 0;
1894         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1895         int ret;
1896         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1897                                         MLX5_FLOW_LAYER_INNER_L4) :
1898                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1899                                         MLX5_FLOW_LAYER_OUTER_L4);
1900         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1901                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1902
1903         if (item_flags & vlanm)
1904                 return rte_flow_error_set(error, EINVAL,
1905                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1906                                           "multiple VLAN layers not supported");
1907         else if ((item_flags & l34m) != 0)
1908                 return rte_flow_error_set(error, EINVAL,
1909                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1910                                           "VLAN cannot follow L3/L4 layer");
1911         if (!mask)
1912                 mask = &rte_flow_item_vlan_mask;
1913         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1914                                         (const uint8_t *)&nic_mask,
1915                                         sizeof(struct rte_flow_item_vlan),
1916                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1917         if (ret)
1918                 return ret;
1919         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1920                 struct mlx5_priv *priv = dev->data->dev_private;
1921
1922                 if (priv->vmwa_context) {
1923                         /*
1924                          * Non-NULL context means we have a virtual machine
1925                          * and SR-IOV enabled, we have to create VLAN interface
1926                          * to make hypervisor to setup E-Switch vport
1927                          * context correctly. We avoid creating the multiple
1928                          * VLAN interfaces, so we cannot support VLAN tag mask.
1929                          */
1930                         return rte_flow_error_set(error, EINVAL,
1931                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1932                                                   item,
1933                                                   "VLAN tag mask is not"
1934                                                   " supported in virtual"
1935                                                   " environment");
1936                 }
1937         }
1938         if (spec) {
1939                 vlan_tag = spec->tci;
1940                 vlan_tag &= mask->tci;
1941         }
1942         /*
1943          * From verbs perspective an empty VLAN is equivalent
1944          * to a packet without VLAN layer.
1945          */
1946         if (!vlan_tag)
1947                 return rte_flow_error_set(error, EINVAL,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1949                                           item->spec,
1950                                           "VLAN cannot be empty");
1951         return 0;
1952 }
1953
1954 /**
1955  * Validate IPV4 item.
1956  *
1957  * @param[in] item
1958  *   Item specification.
1959  * @param[in] item_flags
1960  *   Bit-fields that holds the items detected until now.
1961  * @param[in] last_item
1962  *   Previous validated item in the pattern items.
1963  * @param[in] ether_type
1964  *   Type in the ethernet layer header (including dot1q).
1965  * @param[in] acc_mask
1966  *   Acceptable mask, if NULL default internal default mask
1967  *   will be used to check whether item fields are supported.
1968  * @param[in] range_accepted
1969  *   True if range of values is accepted for specific fields, false otherwise.
1970  * @param[out] error
1971  *   Pointer to error structure.
1972  *
1973  * @return
1974  *   0 on success, a negative errno value otherwise and rte_errno is set.
1975  */
1976 int
1977 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1978                              uint64_t item_flags,
1979                              uint64_t last_item,
1980                              uint16_t ether_type,
1981                              const struct rte_flow_item_ipv4 *acc_mask,
1982                              bool range_accepted,
1983                              struct rte_flow_error *error)
1984 {
1985         const struct rte_flow_item_ipv4 *mask = item->mask;
1986         const struct rte_flow_item_ipv4 *spec = item->spec;
1987         const struct rte_flow_item_ipv4 nic_mask = {
1988                 .hdr = {
1989                         .src_addr = RTE_BE32(0xffffffff),
1990                         .dst_addr = RTE_BE32(0xffffffff),
1991                         .type_of_service = 0xff,
1992                         .next_proto_id = 0xff,
1993                 },
1994         };
1995         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1996         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1997                                       MLX5_FLOW_LAYER_OUTER_L3;
1998         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1999                                       MLX5_FLOW_LAYER_OUTER_L4;
2000         int ret;
2001         uint8_t next_proto = 0xFF;
2002         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2003                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2004                                   MLX5_FLOW_LAYER_INNER_VLAN);
2005
2006         if ((last_item & l2_vlan) && ether_type &&
2007             ether_type != RTE_ETHER_TYPE_IPV4)
2008                 return rte_flow_error_set(error, EINVAL,
2009                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2010                                           "IPv4 cannot follow L2/VLAN layer "
2011                                           "which ether type is not IPv4");
2012         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2013                 if (mask && spec)
2014                         next_proto = mask->hdr.next_proto_id &
2015                                      spec->hdr.next_proto_id;
2016                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2017                         return rte_flow_error_set(error, EINVAL,
2018                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2019                                                   item,
2020                                                   "multiple tunnel "
2021                                                   "not supported");
2022         }
2023         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2024                 return rte_flow_error_set(error, EINVAL,
2025                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2026                                           "wrong tunnel type - IPv6 specified "
2027                                           "but IPv4 item provided");
2028         if (item_flags & l3m)
2029                 return rte_flow_error_set(error, ENOTSUP,
2030                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2031                                           "multiple L3 layers not supported");
2032         else if (item_flags & l4m)
2033                 return rte_flow_error_set(error, EINVAL,
2034                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2035                                           "L3 cannot follow an L4 layer.");
2036         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2037                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2038                 return rte_flow_error_set(error, EINVAL,
2039                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2040                                           "L3 cannot follow an NVGRE layer.");
2041         if (!mask)
2042                 mask = &rte_flow_item_ipv4_mask;
2043         else if (mask->hdr.next_proto_id != 0 &&
2044                  mask->hdr.next_proto_id != 0xff)
2045                 return rte_flow_error_set(error, EINVAL,
2046                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2047                                           "partial mask is not supported"
2048                                           " for protocol");
2049         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2050                                         acc_mask ? (const uint8_t *)acc_mask
2051                                                  : (const uint8_t *)&nic_mask,
2052                                         sizeof(struct rte_flow_item_ipv4),
2053                                         range_accepted, error);
2054         if (ret < 0)
2055                 return ret;
2056         return 0;
2057 }
2058
2059 /**
2060  * Validate IPV6 item.
2061  *
2062  * @param[in] item
2063  *   Item specification.
2064  * @param[in] item_flags
2065  *   Bit-fields that holds the items detected until now.
2066  * @param[in] last_item
2067  *   Previous validated item in the pattern items.
2068  * @param[in] ether_type
2069  *   Type in the ethernet layer header (including dot1q).
2070  * @param[in] acc_mask
2071  *   Acceptable mask, if NULL default internal default mask
2072  *   will be used to check whether item fields are supported.
2073  * @param[out] error
2074  *   Pointer to error structure.
2075  *
2076  * @return
2077  *   0 on success, a negative errno value otherwise and rte_errno is set.
2078  */
2079 int
2080 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2081                              uint64_t item_flags,
2082                              uint64_t last_item,
2083                              uint16_t ether_type,
2084                              const struct rte_flow_item_ipv6 *acc_mask,
2085                              struct rte_flow_error *error)
2086 {
2087         const struct rte_flow_item_ipv6 *mask = item->mask;
2088         const struct rte_flow_item_ipv6 *spec = item->spec;
2089         const struct rte_flow_item_ipv6 nic_mask = {
2090                 .hdr = {
2091                         .src_addr =
2092                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2093                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2094                         .dst_addr =
2095                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2096                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2097                         .vtc_flow = RTE_BE32(0xffffffff),
2098                         .proto = 0xff,
2099                 },
2100         };
2101         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2102         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2103                                       MLX5_FLOW_LAYER_OUTER_L3;
2104         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2105                                       MLX5_FLOW_LAYER_OUTER_L4;
2106         int ret;
2107         uint8_t next_proto = 0xFF;
2108         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2109                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2110                                   MLX5_FLOW_LAYER_INNER_VLAN);
2111
2112         if ((last_item & l2_vlan) && ether_type &&
2113             ether_type != RTE_ETHER_TYPE_IPV6)
2114                 return rte_flow_error_set(error, EINVAL,
2115                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2116                                           "IPv6 cannot follow L2/VLAN layer "
2117                                           "which ether type is not IPv6");
2118         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2119                 next_proto = spec->hdr.proto;
2120         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2121                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2122                         return rte_flow_error_set(error, EINVAL,
2123                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2124                                                   item,
2125                                                   "multiple tunnel "
2126                                                   "not supported");
2127         }
2128         if (next_proto == IPPROTO_HOPOPTS  ||
2129             next_proto == IPPROTO_ROUTING  ||
2130             next_proto == IPPROTO_FRAGMENT ||
2131             next_proto == IPPROTO_ESP      ||
2132             next_proto == IPPROTO_AH       ||
2133             next_proto == IPPROTO_DSTOPTS)
2134                 return rte_flow_error_set(error, EINVAL,
2135                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2136                                           "IPv6 proto (next header) should "
2137                                           "not be set as extension header");
2138         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2139                 return rte_flow_error_set(error, EINVAL,
2140                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2141                                           "wrong tunnel type - IPv4 specified "
2142                                           "but IPv6 item provided");
2143         if (item_flags & l3m)
2144                 return rte_flow_error_set(error, ENOTSUP,
2145                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2146                                           "multiple L3 layers not supported");
2147         else if (item_flags & l4m)
2148                 return rte_flow_error_set(error, EINVAL,
2149                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2150                                           "L3 cannot follow an L4 layer.");
2151         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2152                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2153                 return rte_flow_error_set(error, EINVAL,
2154                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2155                                           "L3 cannot follow an NVGRE layer.");
2156         if (!mask)
2157                 mask = &rte_flow_item_ipv6_mask;
2158         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2159                                         acc_mask ? (const uint8_t *)acc_mask
2160                                                  : (const uint8_t *)&nic_mask,
2161                                         sizeof(struct rte_flow_item_ipv6),
2162                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2163         if (ret < 0)
2164                 return ret;
2165         return 0;
2166 }
2167
2168 /**
2169  * Validate UDP item.
2170  *
2171  * @param[in] item
2172  *   Item specification.
2173  * @param[in] item_flags
2174  *   Bit-fields that holds the items detected until now.
2175  * @param[in] target_protocol
2176  *   The next protocol in the previous item.
2177  * @param[in] flow_mask
2178  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2179  * @param[out] error
2180  *   Pointer to error structure.
2181  *
2182  * @return
2183  *   0 on success, a negative errno value otherwise and rte_errno is set.
2184  */
2185 int
2186 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2187                             uint64_t item_flags,
2188                             uint8_t target_protocol,
2189                             struct rte_flow_error *error)
2190 {
2191         const struct rte_flow_item_udp *mask = item->mask;
2192         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2193         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2194                                       MLX5_FLOW_LAYER_OUTER_L3;
2195         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2196                                       MLX5_FLOW_LAYER_OUTER_L4;
2197         int ret;
2198
2199         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2202                                           "protocol filtering not compatible"
2203                                           " with UDP layer");
2204         if (!(item_flags & l3m))
2205                 return rte_flow_error_set(error, EINVAL,
2206                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2207                                           "L3 is mandatory to filter on L4");
2208         if (item_flags & l4m)
2209                 return rte_flow_error_set(error, EINVAL,
2210                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2211                                           "multiple L4 layers not supported");
2212         if (!mask)
2213                 mask = &rte_flow_item_udp_mask;
2214         ret = mlx5_flow_item_acceptable
2215                 (item, (const uint8_t *)mask,
2216                  (const uint8_t *)&rte_flow_item_udp_mask,
2217                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2218                  error);
2219         if (ret < 0)
2220                 return ret;
2221         return 0;
2222 }
2223
2224 /**
2225  * Validate TCP item.
2226  *
2227  * @param[in] item
2228  *   Item specification.
2229  * @param[in] item_flags
2230  *   Bit-fields that holds the items detected until now.
2231  * @param[in] target_protocol
2232  *   The next protocol in the previous item.
2233  * @param[out] error
2234  *   Pointer to error structure.
2235  *
2236  * @return
2237  *   0 on success, a negative errno value otherwise and rte_errno is set.
2238  */
2239 int
2240 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2241                             uint64_t item_flags,
2242                             uint8_t target_protocol,
2243                             const struct rte_flow_item_tcp *flow_mask,
2244                             struct rte_flow_error *error)
2245 {
2246         const struct rte_flow_item_tcp *mask = item->mask;
2247         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2248         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2249                                       MLX5_FLOW_LAYER_OUTER_L3;
2250         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2251                                       MLX5_FLOW_LAYER_OUTER_L4;
2252         int ret;
2253
2254         MLX5_ASSERT(flow_mask);
2255         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2256                 return rte_flow_error_set(error, EINVAL,
2257                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2258                                           "protocol filtering not compatible"
2259                                           " with TCP layer");
2260         if (!(item_flags & l3m))
2261                 return rte_flow_error_set(error, EINVAL,
2262                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2263                                           "L3 is mandatory to filter on L4");
2264         if (item_flags & l4m)
2265                 return rte_flow_error_set(error, EINVAL,
2266                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2267                                           "multiple L4 layers not supported");
2268         if (!mask)
2269                 mask = &rte_flow_item_tcp_mask;
2270         ret = mlx5_flow_item_acceptable
2271                 (item, (const uint8_t *)mask,
2272                  (const uint8_t *)flow_mask,
2273                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2274                  error);
2275         if (ret < 0)
2276                 return ret;
2277         return 0;
2278 }
2279
2280 /**
2281  * Validate VXLAN item.
2282  *
2283  * @param[in] item
2284  *   Item specification.
2285  * @param[in] item_flags
2286  *   Bit-fields that holds the items detected until now.
2287  * @param[in] target_protocol
2288  *   The next protocol in the previous item.
2289  * @param[out] error
2290  *   Pointer to error structure.
2291  *
2292  * @return
2293  *   0 on success, a negative errno value otherwise and rte_errno is set.
2294  */
2295 int
2296 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2297                               uint64_t item_flags,
2298                               struct rte_flow_error *error)
2299 {
2300         const struct rte_flow_item_vxlan *spec = item->spec;
2301         const struct rte_flow_item_vxlan *mask = item->mask;
2302         int ret;
2303         union vni {
2304                 uint32_t vlan_id;
2305                 uint8_t vni[4];
2306         } id = { .vlan_id = 0, };
2307
2308
2309         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2310                 return rte_flow_error_set(error, ENOTSUP,
2311                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2312                                           "multiple tunnel layers not"
2313                                           " supported");
2314         /*
2315          * Verify only UDPv4 is present as defined in
2316          * https://tools.ietf.org/html/rfc7348
2317          */
2318         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2319                 return rte_flow_error_set(error, EINVAL,
2320                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2321                                           "no outer UDP layer found");
2322         if (!mask)
2323                 mask = &rte_flow_item_vxlan_mask;
2324         ret = mlx5_flow_item_acceptable
2325                 (item, (const uint8_t *)mask,
2326                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2327                  sizeof(struct rte_flow_item_vxlan),
2328                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2329         if (ret < 0)
2330                 return ret;
2331         if (spec) {
2332                 memcpy(&id.vni[1], spec->vni, 3);
2333                 memcpy(&id.vni[1], mask->vni, 3);
2334         }
2335         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2336                 return rte_flow_error_set(error, ENOTSUP,
2337                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2338                                           "VXLAN tunnel must be fully defined");
2339         return 0;
2340 }
2341
2342 /**
2343  * Validate VXLAN_GPE item.
2344  *
2345  * @param[in] item
2346  *   Item specification.
2347  * @param[in] item_flags
2348  *   Bit-fields that holds the items detected until now.
2349  * @param[in] priv
2350  *   Pointer to the private data structure.
2351  * @param[in] target_protocol
2352  *   The next protocol in the previous item.
2353  * @param[out] error
2354  *   Pointer to error structure.
2355  *
2356  * @return
2357  *   0 on success, a negative errno value otherwise and rte_errno is set.
2358  */
2359 int
2360 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2361                                   uint64_t item_flags,
2362                                   struct rte_eth_dev *dev,
2363                                   struct rte_flow_error *error)
2364 {
2365         struct mlx5_priv *priv = dev->data->dev_private;
2366         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2367         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2368         int ret;
2369         union vni {
2370                 uint32_t vlan_id;
2371                 uint8_t vni[4];
2372         } id = { .vlan_id = 0, };
2373
2374         if (!priv->config.l3_vxlan_en)
2375                 return rte_flow_error_set(error, ENOTSUP,
2376                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2377                                           "L3 VXLAN is not enabled by device"
2378                                           " parameter and/or not configured in"
2379                                           " firmware");
2380         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2381                 return rte_flow_error_set(error, ENOTSUP,
2382                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2383                                           "multiple tunnel layers not"
2384                                           " supported");
2385         /*
2386          * Verify only UDPv4 is present as defined in
2387          * https://tools.ietf.org/html/rfc7348
2388          */
2389         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2390                 return rte_flow_error_set(error, EINVAL,
2391                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2392                                           "no outer UDP layer found");
2393         if (!mask)
2394                 mask = &rte_flow_item_vxlan_gpe_mask;
2395         ret = mlx5_flow_item_acceptable
2396                 (item, (const uint8_t *)mask,
2397                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2398                  sizeof(struct rte_flow_item_vxlan_gpe),
2399                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2400         if (ret < 0)
2401                 return ret;
2402         if (spec) {
2403                 if (spec->protocol)
2404                         return rte_flow_error_set(error, ENOTSUP,
2405                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2406                                                   item,
2407                                                   "VxLAN-GPE protocol"
2408                                                   " not supported");
2409                 memcpy(&id.vni[1], spec->vni, 3);
2410                 memcpy(&id.vni[1], mask->vni, 3);
2411         }
2412         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2413                 return rte_flow_error_set(error, ENOTSUP,
2414                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2415                                           "VXLAN-GPE tunnel must be fully"
2416                                           " defined");
2417         return 0;
2418 }
2419 /**
2420  * Validate GRE Key item.
2421  *
2422  * @param[in] item
2423  *   Item specification.
2424  * @param[in] item_flags
2425  *   Bit flags to mark detected items.
2426  * @param[in] gre_item
2427  *   Pointer to gre_item
2428  * @param[out] error
2429  *   Pointer to error structure.
2430  *
2431  * @return
2432  *   0 on success, a negative errno value otherwise and rte_errno is set.
2433  */
2434 int
2435 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2436                                 uint64_t item_flags,
2437                                 const struct rte_flow_item *gre_item,
2438                                 struct rte_flow_error *error)
2439 {
2440         const rte_be32_t *mask = item->mask;
2441         int ret = 0;
2442         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2443         const struct rte_flow_item_gre *gre_spec;
2444         const struct rte_flow_item_gre *gre_mask;
2445
2446         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2447                 return rte_flow_error_set(error, ENOTSUP,
2448                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2449                                           "Multiple GRE key not support");
2450         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2451                 return rte_flow_error_set(error, ENOTSUP,
2452                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2453                                           "No preceding GRE header");
2454         if (item_flags & MLX5_FLOW_LAYER_INNER)
2455                 return rte_flow_error_set(error, ENOTSUP,
2456                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2457                                           "GRE key following a wrong item");
2458         gre_mask = gre_item->mask;
2459         if (!gre_mask)
2460                 gre_mask = &rte_flow_item_gre_mask;
2461         gre_spec = gre_item->spec;
2462         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2463                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2464                 return rte_flow_error_set(error, EINVAL,
2465                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2466                                           "Key bit must be on");
2467
2468         if (!mask)
2469                 mask = &gre_key_default_mask;
2470         ret = mlx5_flow_item_acceptable
2471                 (item, (const uint8_t *)mask,
2472                  (const uint8_t *)&gre_key_default_mask,
2473                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2474         return ret;
2475 }
2476
2477 /**
2478  * Validate GRE item.
2479  *
2480  * @param[in] item
2481  *   Item specification.
2482  * @param[in] item_flags
2483  *   Bit flags to mark detected items.
2484  * @param[in] target_protocol
2485  *   The next protocol in the previous item.
2486  * @param[out] error
2487  *   Pointer to error structure.
2488  *
2489  * @return
2490  *   0 on success, a negative errno value otherwise and rte_errno is set.
2491  */
2492 int
2493 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2494                             uint64_t item_flags,
2495                             uint8_t target_protocol,
2496                             struct rte_flow_error *error)
2497 {
2498         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2499         const struct rte_flow_item_gre *mask = item->mask;
2500         int ret;
2501         const struct rte_flow_item_gre nic_mask = {
2502                 .c_rsvd0_ver = RTE_BE16(0xB000),
2503                 .protocol = RTE_BE16(UINT16_MAX),
2504         };
2505
2506         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2507                 return rte_flow_error_set(error, EINVAL,
2508                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2509                                           "protocol filtering not compatible"
2510                                           " with this GRE layer");
2511         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2512                 return rte_flow_error_set(error, ENOTSUP,
2513                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2514                                           "multiple tunnel layers not"
2515                                           " supported");
2516         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2517                 return rte_flow_error_set(error, ENOTSUP,
2518                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2519                                           "L3 Layer is missing");
2520         if (!mask)
2521                 mask = &rte_flow_item_gre_mask;
2522         ret = mlx5_flow_item_acceptable
2523                 (item, (const uint8_t *)mask,
2524                  (const uint8_t *)&nic_mask,
2525                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2526                  error);
2527         if (ret < 0)
2528                 return ret;
2529 #ifndef HAVE_MLX5DV_DR
2530 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2531         if (spec && (spec->protocol & mask->protocol))
2532                 return rte_flow_error_set(error, ENOTSUP,
2533                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2534                                           "without MPLS support the"
2535                                           " specification cannot be used for"
2536                                           " filtering");
2537 #endif
2538 #endif
2539         return 0;
2540 }
2541
2542 /**
2543  * Validate Geneve item.
2544  *
2545  * @param[in] item
2546  *   Item specification.
2547  * @param[in] itemFlags
2548  *   Bit-fields that holds the items detected until now.
2549  * @param[in] enPriv
2550  *   Pointer to the private data structure.
2551  * @param[out] error
2552  *   Pointer to error structure.
2553  *
2554  * @return
2555  *   0 on success, a negative errno value otherwise and rte_errno is set.
2556  */
2557
2558 int
2559 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2560                                uint64_t item_flags,
2561                                struct rte_eth_dev *dev,
2562                                struct rte_flow_error *error)
2563 {
2564         struct mlx5_priv *priv = dev->data->dev_private;
2565         const struct rte_flow_item_geneve *spec = item->spec;
2566         const struct rte_flow_item_geneve *mask = item->mask;
2567         int ret;
2568         uint16_t gbhdr;
2569         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2570                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2571         const struct rte_flow_item_geneve nic_mask = {
2572                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2573                 .vni = "\xff\xff\xff",
2574                 .protocol = RTE_BE16(UINT16_MAX),
2575         };
2576
2577         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2578                 return rte_flow_error_set(error, ENOTSUP,
2579                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2580                                           "L3 Geneve is not enabled by device"
2581                                           " parameter and/or not configured in"
2582                                           " firmware");
2583         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2584                 return rte_flow_error_set(error, ENOTSUP,
2585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2586                                           "multiple tunnel layers not"
2587                                           " supported");
2588         /*
2589          * Verify only UDPv4 is present as defined in
2590          * https://tools.ietf.org/html/rfc7348
2591          */
2592         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2593                 return rte_flow_error_set(error, EINVAL,
2594                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2595                                           "no outer UDP layer found");
2596         if (!mask)
2597                 mask = &rte_flow_item_geneve_mask;
2598         ret = mlx5_flow_item_acceptable
2599                                   (item, (const uint8_t *)mask,
2600                                    (const uint8_t *)&nic_mask,
2601                                    sizeof(struct rte_flow_item_geneve),
2602                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2603         if (ret)
2604                 return ret;
2605         if (spec) {
2606                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2607                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2608                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2609                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2610                         return rte_flow_error_set(error, ENOTSUP,
2611                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2612                                                   item,
2613                                                   "Geneve protocol unsupported"
2614                                                   " fields are being used");
2615                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2616                         return rte_flow_error_set
2617                                         (error, ENOTSUP,
2618                                          RTE_FLOW_ERROR_TYPE_ITEM,
2619                                          item,
2620                                          "Unsupported Geneve options length");
2621         }
2622         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2623                 return rte_flow_error_set
2624                                     (error, ENOTSUP,
2625                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2626                                      "Geneve tunnel must be fully defined");
2627         return 0;
2628 }
2629
2630 /**
2631  * Validate MPLS item.
2632  *
2633  * @param[in] dev
2634  *   Pointer to the rte_eth_dev structure.
2635  * @param[in] item
2636  *   Item specification.
2637  * @param[in] item_flags
2638  *   Bit-fields that holds the items detected until now.
2639  * @param[in] prev_layer
2640  *   The protocol layer indicated in previous item.
2641  * @param[out] error
2642  *   Pointer to error structure.
2643  *
2644  * @return
2645  *   0 on success, a negative errno value otherwise and rte_errno is set.
2646  */
2647 int
2648 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2649                              const struct rte_flow_item *item __rte_unused,
2650                              uint64_t item_flags __rte_unused,
2651                              uint64_t prev_layer __rte_unused,
2652                              struct rte_flow_error *error)
2653 {
2654 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2655         const struct rte_flow_item_mpls *mask = item->mask;
2656         struct mlx5_priv *priv = dev->data->dev_private;
2657         int ret;
2658
2659         if (!priv->config.mpls_en)
2660                 return rte_flow_error_set(error, ENOTSUP,
2661                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2662                                           "MPLS not supported or"
2663                                           " disabled in firmware"
2664                                           " configuration.");
2665         /* MPLS over IP, UDP, GRE is allowed */
2666         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2667                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2668                             MLX5_FLOW_LAYER_GRE |
2669                             MLX5_FLOW_LAYER_GRE_KEY)))
2670                 return rte_flow_error_set(error, EINVAL,
2671                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2672                                           "protocol filtering not compatible"
2673                                           " with MPLS layer");
2674         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2675         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2676             !(item_flags & MLX5_FLOW_LAYER_GRE))
2677                 return rte_flow_error_set(error, ENOTSUP,
2678                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2679                                           "multiple tunnel layers not"
2680                                           " supported");
2681         if (!mask)
2682                 mask = &rte_flow_item_mpls_mask;
2683         ret = mlx5_flow_item_acceptable
2684                 (item, (const uint8_t *)mask,
2685                  (const uint8_t *)&rte_flow_item_mpls_mask,
2686                  sizeof(struct rte_flow_item_mpls),
2687                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2688         if (ret < 0)
2689                 return ret;
2690         return 0;
2691 #else
2692         return rte_flow_error_set(error, ENOTSUP,
2693                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2694                                   "MPLS is not supported by Verbs, please"
2695                                   " update.");
2696 #endif
2697 }
2698
2699 /**
2700  * Validate NVGRE item.
2701  *
2702  * @param[in] item
2703  *   Item specification.
2704  * @param[in] item_flags
2705  *   Bit flags to mark detected items.
2706  * @param[in] target_protocol
2707  *   The next protocol in the previous item.
2708  * @param[out] error
2709  *   Pointer to error structure.
2710  *
2711  * @return
2712  *   0 on success, a negative errno value otherwise and rte_errno is set.
2713  */
2714 int
2715 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2716                               uint64_t item_flags,
2717                               uint8_t target_protocol,
2718                               struct rte_flow_error *error)
2719 {
2720         const struct rte_flow_item_nvgre *mask = item->mask;
2721         int ret;
2722
2723         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2724                 return rte_flow_error_set(error, EINVAL,
2725                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2726                                           "protocol filtering not compatible"
2727                                           " with this GRE layer");
2728         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2729                 return rte_flow_error_set(error, ENOTSUP,
2730                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2731                                           "multiple tunnel layers not"
2732                                           " supported");
2733         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2734                 return rte_flow_error_set(error, ENOTSUP,
2735                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2736                                           "L3 Layer is missing");
2737         if (!mask)
2738                 mask = &rte_flow_item_nvgre_mask;
2739         ret = mlx5_flow_item_acceptable
2740                 (item, (const uint8_t *)mask,
2741                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2742                  sizeof(struct rte_flow_item_nvgre),
2743                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2744         if (ret < 0)
2745                 return ret;
2746         return 0;
2747 }
2748
2749 /**
2750  * Validate eCPRI item.
2751  *
2752  * @param[in] item
2753  *   Item specification.
2754  * @param[in] item_flags
2755  *   Bit-fields that holds the items detected until now.
2756  * @param[in] last_item
2757  *   Previous validated item in the pattern items.
2758  * @param[in] ether_type
2759  *   Type in the ethernet layer header (including dot1q).
2760  * @param[in] acc_mask
2761  *   Acceptable mask, if NULL default internal default mask
2762  *   will be used to check whether item fields are supported.
2763  * @param[out] error
2764  *   Pointer to error structure.
2765  *
2766  * @return
2767  *   0 on success, a negative errno value otherwise and rte_errno is set.
2768  */
2769 int
2770 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2771                               uint64_t item_flags,
2772                               uint64_t last_item,
2773                               uint16_t ether_type,
2774                               const struct rte_flow_item_ecpri *acc_mask,
2775                               struct rte_flow_error *error)
2776 {
2777         const struct rte_flow_item_ecpri *mask = item->mask;
2778         const struct rte_flow_item_ecpri nic_mask = {
2779                 .hdr = {
2780                         .common = {
2781                                 .u32 =
2782                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2783                                         .type = 0xFF,
2784                                         }).u32),
2785                         },
2786                         .dummy[0] = 0xFFFFFFFF,
2787                 },
2788         };
2789         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2790                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2791         struct rte_flow_item_ecpri mask_lo;
2792
2793         if (!(last_item & outer_l2_vlan) &&
2794             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
2795                 return rte_flow_error_set(error, EINVAL,
2796                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2797                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
2798         if ((last_item & outer_l2_vlan) && ether_type &&
2799             ether_type != RTE_ETHER_TYPE_ECPRI)
2800                 return rte_flow_error_set(error, EINVAL,
2801                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2802                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
2803         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2804                 return rte_flow_error_set(error, EINVAL,
2805                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2806                                           "eCPRI with tunnel is not supported right now");
2807         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2808                 return rte_flow_error_set(error, ENOTSUP,
2809                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2810                                           "multiple L3 layers not supported");
2811         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2812                 return rte_flow_error_set(error, EINVAL,
2813                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2814                                           "eCPRI cannot coexist with a TCP layer");
2815         /* In specification, eCPRI could be over UDP layer. */
2816         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2817                 return rte_flow_error_set(error, EINVAL,
2818                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2819                                           "eCPRI over UDP layer is not yet supported right now");
2820         /* Mask for type field in common header could be zero. */
2821         if (!mask)
2822                 mask = &rte_flow_item_ecpri_mask;
2823         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
2824         /* Input mask is in big-endian format. */
2825         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
2826                 return rte_flow_error_set(error, EINVAL,
2827                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2828                                           "partial mask is not supported for protocol");
2829         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
2830                 return rte_flow_error_set(error, EINVAL,
2831                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2832                                           "message header mask must be after a type mask");
2833         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2834                                          acc_mask ? (const uint8_t *)acc_mask
2835                                                   : (const uint8_t *)&nic_mask,
2836                                          sizeof(struct rte_flow_item_ecpri),
2837                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2838 }
2839
2840 /**
2841  * Release resource related QUEUE/RSS action split.
2842  *
2843  * @param dev
2844  *   Pointer to Ethernet device.
2845  * @param flow
2846  *   Flow to release id's from.
2847  */
2848 static void
2849 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2850                              struct rte_flow *flow)
2851 {
2852         struct mlx5_priv *priv = dev->data->dev_private;
2853         uint32_t handle_idx;
2854         struct mlx5_flow_handle *dev_handle;
2855
2856         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2857                        handle_idx, dev_handle, next)
2858                 if (dev_handle->split_flow_id)
2859                         mlx5_ipool_free(priv->sh->ipool
2860                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
2861                                         dev_handle->split_flow_id);
2862 }
2863
2864 static int
2865 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2866                    const struct rte_flow_attr *attr __rte_unused,
2867                    const struct rte_flow_item items[] __rte_unused,
2868                    const struct rte_flow_action actions[] __rte_unused,
2869                    bool external __rte_unused,
2870                    int hairpin __rte_unused,
2871                    struct rte_flow_error *error)
2872 {
2873         return rte_flow_error_set(error, ENOTSUP,
2874                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2875 }
2876
2877 static struct mlx5_flow *
2878 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2879                   const struct rte_flow_attr *attr __rte_unused,
2880                   const struct rte_flow_item items[] __rte_unused,
2881                   const struct rte_flow_action actions[] __rte_unused,
2882                   struct rte_flow_error *error)
2883 {
2884         rte_flow_error_set(error, ENOTSUP,
2885                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2886         return NULL;
2887 }
2888
2889 static int
2890 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2891                     struct mlx5_flow *dev_flow __rte_unused,
2892                     const struct rte_flow_attr *attr __rte_unused,
2893                     const struct rte_flow_item items[] __rte_unused,
2894                     const struct rte_flow_action actions[] __rte_unused,
2895                     struct rte_flow_error *error)
2896 {
2897         return rte_flow_error_set(error, ENOTSUP,
2898                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2899 }
2900
2901 static int
2902 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2903                 struct rte_flow *flow __rte_unused,
2904                 struct rte_flow_error *error)
2905 {
2906         return rte_flow_error_set(error, ENOTSUP,
2907                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2908 }
2909
2910 static void
2911 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2912                  struct rte_flow *flow __rte_unused)
2913 {
2914 }
2915
2916 static void
2917 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2918                   struct rte_flow *flow __rte_unused)
2919 {
2920 }
2921
2922 static int
2923 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2924                 struct rte_flow *flow __rte_unused,
2925                 const struct rte_flow_action *actions __rte_unused,
2926                 void *data __rte_unused,
2927                 struct rte_flow_error *error)
2928 {
2929         return rte_flow_error_set(error, ENOTSUP,
2930                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2931 }
2932
2933 static int
2934 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
2935                       uint32_t domains __rte_unused,
2936                       uint32_t flags __rte_unused)
2937 {
2938         return 0;
2939 }
2940
2941 /* Void driver to protect from null pointer reference. */
2942 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2943         .validate = flow_null_validate,
2944         .prepare = flow_null_prepare,
2945         .translate = flow_null_translate,
2946         .apply = flow_null_apply,
2947         .remove = flow_null_remove,
2948         .destroy = flow_null_destroy,
2949         .query = flow_null_query,
2950         .sync_domain = flow_null_sync_domain,
2951 };
2952
2953 /**
2954  * Select flow driver type according to flow attributes and device
2955  * configuration.
2956  *
2957  * @param[in] dev
2958  *   Pointer to the dev structure.
2959  * @param[in] attr
2960  *   Pointer to the flow attributes.
2961  *
2962  * @return
2963  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2964  */
2965 static enum mlx5_flow_drv_type
2966 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2967 {
2968         struct mlx5_priv *priv = dev->data->dev_private;
2969         /* The OS can determine first a specific flow type (DV, VERBS) */
2970         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
2971
2972         if (type != MLX5_FLOW_TYPE_MAX)
2973                 return type;
2974         /* If no OS specific type - continue with DV/VERBS selection */
2975         if (attr->transfer && priv->config.dv_esw_en)
2976                 type = MLX5_FLOW_TYPE_DV;
2977         if (!attr->transfer)
2978                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2979                                                  MLX5_FLOW_TYPE_VERBS;
2980         return type;
2981 }
2982
2983 #define flow_get_drv_ops(type) flow_drv_ops[type]
2984
2985 /**
2986  * Flow driver validation API. This abstracts calling driver specific functions.
2987  * The type of flow driver is determined according to flow attributes.
2988  *
2989  * @param[in] dev
2990  *   Pointer to the dev structure.
2991  * @param[in] attr
2992  *   Pointer to the flow attributes.
2993  * @param[in] items
2994  *   Pointer to the list of items.
2995  * @param[in] actions
2996  *   Pointer to the list of actions.
2997  * @param[in] external
2998  *   This flow rule is created by request external to PMD.
2999  * @param[in] hairpin
3000  *   Number of hairpin TX actions, 0 means classic flow.
3001  * @param[out] error
3002  *   Pointer to the error structure.
3003  *
3004  * @return
3005  *   0 on success, a negative errno value otherwise and rte_errno is set.
3006  */
3007 static inline int
3008 flow_drv_validate(struct rte_eth_dev *dev,
3009                   const struct rte_flow_attr *attr,
3010                   const struct rte_flow_item items[],
3011                   const struct rte_flow_action actions[],
3012                   bool external, int hairpin, struct rte_flow_error *error)
3013 {
3014         const struct mlx5_flow_driver_ops *fops;
3015         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3016
3017         fops = flow_get_drv_ops(type);
3018         return fops->validate(dev, attr, items, actions, external,
3019                               hairpin, error);
3020 }
3021
3022 /**
3023  * Flow driver preparation API. This abstracts calling driver specific
3024  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3025  * calculates the size of memory required for device flow, allocates the memory,
3026  * initializes the device flow and returns the pointer.
3027  *
3028  * @note
3029  *   This function initializes device flow structure such as dv or verbs in
3030  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3031  *   rest. For example, adding returning device flow to flow->dev_flow list and
3032  *   setting backward reference to the flow should be done out of this function.
3033  *   layers field is not filled either.
3034  *
3035  * @param[in] dev
3036  *   Pointer to the dev structure.
3037  * @param[in] attr
3038  *   Pointer to the flow attributes.
3039  * @param[in] items
3040  *   Pointer to the list of items.
3041  * @param[in] actions
3042  *   Pointer to the list of actions.
3043  * @param[in] flow_idx
3044  *   This memory pool index to the flow.
3045  * @param[out] error
3046  *   Pointer to the error structure.
3047  *
3048  * @return
3049  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3050  */
3051 static inline struct mlx5_flow *
3052 flow_drv_prepare(struct rte_eth_dev *dev,
3053                  const struct rte_flow *flow,
3054                  const struct rte_flow_attr *attr,
3055                  const struct rte_flow_item items[],
3056                  const struct rte_flow_action actions[],
3057                  uint32_t flow_idx,
3058                  struct rte_flow_error *error)
3059 {
3060         const struct mlx5_flow_driver_ops *fops;
3061         enum mlx5_flow_drv_type type = flow->drv_type;
3062         struct mlx5_flow *mlx5_flow = NULL;
3063
3064         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3065         fops = flow_get_drv_ops(type);
3066         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3067         if (mlx5_flow)
3068                 mlx5_flow->flow_idx = flow_idx;
3069         return mlx5_flow;
3070 }
3071
3072 /**
3073  * Flow driver translation API. This abstracts calling driver specific
3074  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3075  * translates a generic flow into a driver flow. flow_drv_prepare() must
3076  * precede.
3077  *
3078  * @note
3079  *   dev_flow->layers could be filled as a result of parsing during translation
3080  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3081  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3082  *   flow->actions could be overwritten even though all the expanded dev_flows
3083  *   have the same actions.
3084  *
3085  * @param[in] dev
3086  *   Pointer to the rte dev structure.
3087  * @param[in, out] dev_flow
3088  *   Pointer to the mlx5 flow.
3089  * @param[in] attr
3090  *   Pointer to the flow attributes.
3091  * @param[in] items
3092  *   Pointer to the list of items.
3093  * @param[in] actions
3094  *   Pointer to the list of actions.
3095  * @param[out] error
3096  *   Pointer to the error structure.
3097  *
3098  * @return
3099  *   0 on success, a negative errno value otherwise and rte_errno is set.
3100  */
3101 static inline int
3102 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3103                    const struct rte_flow_attr *attr,
3104                    const struct rte_flow_item items[],
3105                    const struct rte_flow_action actions[],
3106                    struct rte_flow_error *error)
3107 {
3108         const struct mlx5_flow_driver_ops *fops;
3109         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3110
3111         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3112         fops = flow_get_drv_ops(type);
3113         return fops->translate(dev, dev_flow, attr, items, actions, error);
3114 }
3115
3116 /**
3117  * Flow driver apply API. This abstracts calling driver specific functions.
3118  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3119  * translated driver flows on to device. flow_drv_translate() must precede.
3120  *
3121  * @param[in] dev
3122  *   Pointer to Ethernet device structure.
3123  * @param[in, out] flow
3124  *   Pointer to flow structure.
3125  * @param[out] error
3126  *   Pointer to error structure.
3127  *
3128  * @return
3129  *   0 on success, a negative errno value otherwise and rte_errno is set.
3130  */
3131 static inline int
3132 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3133                struct rte_flow_error *error)
3134 {
3135         const struct mlx5_flow_driver_ops *fops;
3136         enum mlx5_flow_drv_type type = flow->drv_type;
3137
3138         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3139         fops = flow_get_drv_ops(type);
3140         return fops->apply(dev, flow, error);
3141 }
3142
3143 /**
3144  * Flow driver destroy API. This abstracts calling driver specific functions.
3145  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3146  * on device and releases resources of the flow.
3147  *
3148  * @param[in] dev
3149  *   Pointer to Ethernet device.
3150  * @param[in, out] flow
3151  *   Pointer to flow structure.
3152  */
3153 static inline void
3154 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3155 {
3156         const struct mlx5_flow_driver_ops *fops;
3157         enum mlx5_flow_drv_type type = flow->drv_type;
3158
3159         flow_mreg_split_qrss_release(dev, flow);
3160         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3161         fops = flow_get_drv_ops(type);
3162         fops->destroy(dev, flow);
3163 }
3164
3165 /**
3166  * Get RSS action from the action list.
3167  *
3168  * @param[in] actions
3169  *   Pointer to the list of actions.
3170  *
3171  * @return
3172  *   Pointer to the RSS action if exist, else return NULL.
3173  */
3174 static const struct rte_flow_action_rss*
3175 flow_get_rss_action(const struct rte_flow_action actions[])
3176 {
3177         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3178                 switch (actions->type) {
3179                 case RTE_FLOW_ACTION_TYPE_RSS:
3180                         return (const struct rte_flow_action_rss *)
3181                                actions->conf;
3182                 default:
3183                         break;
3184                 }
3185         }
3186         return NULL;
3187 }
3188
3189 /**
3190  * Get ASO age action by index.
3191  *
3192  * @param[in] dev
3193  *   Pointer to the Ethernet device structure.
3194  * @param[in] age_idx
3195  *   Index to the ASO age action.
3196  *
3197  * @return
3198  *   The specified ASO age action.
3199  */
3200 struct mlx5_aso_age_action*
3201 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3202 {
3203         uint16_t pool_idx = age_idx & UINT16_MAX;
3204         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3205         struct mlx5_priv *priv = dev->data->dev_private;
3206         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3207         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3208
3209         return &pool->actions[offset - 1];
3210 }
3211
3212 /* maps shared action to translated non shared in some actions array */
3213 struct mlx5_translated_shared_action {
3214         struct rte_flow_shared_action *action; /**< Shared action */
3215         int index; /**< Index in related array of rte_flow_action */
3216 };
3217
3218 /**
3219  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3220  * non shared action if translation possible.
3221  * This functionality used to run same execution path for both shared & non
3222  * shared actions on flow create. All necessary preparations for shared
3223  * action handling should be preformed on *shared* actions list returned
3224  * from this call.
3225  *
3226  * @param[in] dev
3227  *   Pointer to Ethernet device.
3228  * @param[in] actions
3229  *   List of actions to translate.
3230  * @param[out] shared
3231  *   List to store translated shared actions.
3232  * @param[in, out] shared_n
3233  *   Size of *shared* array. On return should be updated with number of shared
3234  *   actions retrieved from the *actions* list.
3235  * @param[out] translated_actions
3236  *   List of actions where all shared actions were translated to non shared
3237  *   if possible. NULL if no translation took place.
3238  * @param[out] error
3239  *   Pointer to the error structure.
3240  *
3241  * @return
3242  *   0 on success, a negative errno value otherwise and rte_errno is set.
3243  */
3244 static int
3245 flow_shared_actions_translate(struct rte_eth_dev *dev,
3246                               const struct rte_flow_action actions[],
3247                               struct mlx5_translated_shared_action *shared,
3248                               int *shared_n,
3249                               struct rte_flow_action **translated_actions,
3250                               struct rte_flow_error *error)
3251 {
3252         struct mlx5_priv *priv = dev->data->dev_private;
3253         struct rte_flow_action *translated = NULL;
3254         size_t actions_size;
3255         int n;
3256         int copied_n = 0;
3257         struct mlx5_translated_shared_action *shared_end = NULL;
3258
3259         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3260                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3261                         continue;
3262                 if (copied_n == *shared_n) {
3263                         return rte_flow_error_set
3264                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3265                                  NULL, "too many shared actions");
3266                 }
3267                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3268                            sizeof(actions[n].conf));
3269                 shared[copied_n].index = n;
3270                 copied_n++;
3271         }
3272         n++;
3273         *shared_n = copied_n;
3274         if (!copied_n)
3275                 return 0;
3276         actions_size = sizeof(struct rte_flow_action) * n;
3277         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3278         if (!translated) {
3279                 rte_errno = ENOMEM;
3280                 return -ENOMEM;
3281         }
3282         memcpy(translated, actions, actions_size);
3283         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3284                 struct mlx5_shared_action_rss *shared_rss;
3285                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3286                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3287                 uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
3288                                                                            - 1);
3289
3290                 switch (type) {
3291                 case MLX5_SHARED_ACTION_TYPE_RSS:
3292                         shared_rss = mlx5_ipool_get
3293                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3294                         translated[shared->index].type =
3295                                 RTE_FLOW_ACTION_TYPE_RSS;
3296                         translated[shared->index].conf =
3297                                 &shared_rss->origin;
3298                         break;
3299                 case MLX5_SHARED_ACTION_TYPE_AGE:
3300                         if (priv->sh->flow_hit_aso_en) {
3301                                 translated[shared->index].type =
3302                                         (enum rte_flow_action_type)
3303                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3304                                 translated[shared->index].conf =
3305                                                          (void *)(uintptr_t)idx;
3306                                 break;
3307                         }
3308                         /* Fall-through */
3309                 default:
3310                         mlx5_free(translated);
3311                         return rte_flow_error_set
3312                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3313                                  NULL, "invalid shared action type");
3314                 }
3315         }
3316         *translated_actions = translated;
3317         return 0;
3318 }
3319
3320 /**
3321  * Get Shared RSS action from the action list.
3322  *
3323  * @param[in] dev
3324  *   Pointer to Ethernet device.
3325  * @param[in] shared
3326  *   Pointer to the list of actions.
3327  * @param[in] shared_n
3328  *   Actions list length.
3329  *
3330  * @return
3331  *   The MLX5 RSS action ID if exists, otherwise return 0.
3332  */
3333 static uint32_t
3334 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3335                            struct mlx5_translated_shared_action *shared,
3336                            int shared_n)
3337 {
3338         struct mlx5_translated_shared_action *shared_end;
3339         struct mlx5_priv *priv = dev->data->dev_private;
3340         struct mlx5_shared_action_rss *shared_rss;
3341
3342
3343         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3344                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3345                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3346                 uint32_t idx = act_idx &
3347                                    ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
3348                 switch (type) {
3349                 case MLX5_SHARED_ACTION_TYPE_RSS:
3350                         shared_rss = mlx5_ipool_get
3351                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3352                                                                            idx);
3353                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3354                                            __ATOMIC_RELAXED);
3355                         return idx;
3356                 default:
3357                         break;
3358                 }
3359         }
3360         return 0;
3361 }
3362
3363 static unsigned int
3364 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3365 {
3366         const struct rte_flow_item *item;
3367         unsigned int has_vlan = 0;
3368
3369         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3370                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3371                         has_vlan = 1;
3372                         break;
3373                 }
3374         }
3375         if (has_vlan)
3376                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3377                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3378         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3379                                MLX5_EXPANSION_ROOT_OUTER;
3380 }
3381
3382 /**
3383  *  Get layer flags from the prefix flow.
3384  *
3385  *  Some flows may be split to several subflows, the prefix subflow gets the
3386  *  match items and the suffix sub flow gets the actions.
3387  *  Some actions need the user defined match item flags to get the detail for
3388  *  the action.
3389  *  This function helps the suffix flow to get the item layer flags from prefix
3390  *  subflow.
3391  *
3392  * @param[in] dev_flow
3393  *   Pointer the created preifx subflow.
3394  *
3395  * @return
3396  *   The layers get from prefix subflow.
3397  */
3398 static inline uint64_t
3399 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3400 {
3401         uint64_t layers = 0;
3402
3403         /*
3404          * Layers bits could be localization, but usually the compiler will
3405          * help to do the optimization work for source code.
3406          * If no decap actions, use the layers directly.
3407          */
3408         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3409                 return dev_flow->handle->layers;
3410         /* Convert L3 layers with decap action. */
3411         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3412                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3413         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3414                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3415         /* Convert L4 layers with decap action.  */
3416         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3417                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3418         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3419                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3420         return layers;
3421 }
3422
3423 /**
3424  * Get metadata split action information.
3425  *
3426  * @param[in] actions
3427  *   Pointer to the list of actions.
3428  * @param[out] qrss
3429  *   Pointer to the return pointer.
3430  * @param[out] qrss_type
3431  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3432  *   if no QUEUE/RSS is found.
3433  * @param[out] encap_idx
3434  *   Pointer to the index of the encap action if exists, otherwise the last
3435  *   action index.
3436  *
3437  * @return
3438  *   Total number of actions.
3439  */
3440 static int
3441 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3442                                        const struct rte_flow_action **qrss,
3443                                        int *encap_idx)
3444 {
3445         const struct rte_flow_action_raw_encap *raw_encap;
3446         int actions_n = 0;
3447         int raw_decap_idx = -1;
3448
3449         *encap_idx = -1;
3450         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3451                 switch (actions->type) {
3452                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3453                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3454                         *encap_idx = actions_n;
3455                         break;
3456                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3457                         raw_decap_idx = actions_n;
3458                         break;
3459                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3460                         raw_encap = actions->conf;
3461                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3462                                 *encap_idx = raw_decap_idx != -1 ?
3463                                                       raw_decap_idx : actions_n;
3464                         break;
3465                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3466                 case RTE_FLOW_ACTION_TYPE_RSS:
3467                         *qrss = actions;
3468                         break;
3469                 default:
3470                         break;
3471                 }
3472                 actions_n++;
3473         }
3474         if (*encap_idx == -1)
3475                 *encap_idx = actions_n;
3476         /* Count RTE_FLOW_ACTION_TYPE_END. */
3477         return actions_n + 1;
3478 }
3479
3480 /**
3481  * Check meter action from the action list.
3482  *
3483  * @param[in] actions
3484  *   Pointer to the list of actions.
3485  * @param[out] mtr
3486  *   Pointer to the meter exist flag.
3487  *
3488  * @return
3489  *   Total number of actions.
3490  */
3491 static int
3492 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3493 {
3494         int actions_n = 0;
3495
3496         MLX5_ASSERT(mtr);
3497         *mtr = 0;
3498         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3499                 switch (actions->type) {
3500                 case RTE_FLOW_ACTION_TYPE_METER:
3501                         *mtr = 1;
3502                         break;
3503                 default:
3504                         break;
3505                 }
3506                 actions_n++;
3507         }
3508         /* Count RTE_FLOW_ACTION_TYPE_END. */
3509         return actions_n + 1;
3510 }
3511
3512 /**
3513  * Check if the flow should be split due to hairpin.
3514  * The reason for the split is that in current HW we can't
3515  * support encap and push-vlan on Rx, so if a flow contains
3516  * these actions we move it to Tx.
3517  *
3518  * @param dev
3519  *   Pointer to Ethernet device.
3520  * @param[in] attr
3521  *   Flow rule attributes.
3522  * @param[in] actions
3523  *   Associated actions (list terminated by the END action).
3524  *
3525  * @return
3526  *   > 0 the number of actions and the flow should be split,
3527  *   0 when no split required.
3528  */
3529 static int
3530 flow_check_hairpin_split(struct rte_eth_dev *dev,
3531                          const struct rte_flow_attr *attr,
3532                          const struct rte_flow_action actions[])
3533 {
3534         int queue_action = 0;
3535         int action_n = 0;
3536         int split = 0;
3537         const struct rte_flow_action_queue *queue;
3538         const struct rte_flow_action_rss *rss;
3539         const struct rte_flow_action_raw_encap *raw_encap;
3540         const struct rte_eth_hairpin_conf *conf;
3541
3542         if (!attr->ingress)
3543                 return 0;
3544         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3545                 switch (actions->type) {
3546                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3547                         queue = actions->conf;
3548                         if (queue == NULL)
3549                                 return 0;
3550                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3551                         if (conf != NULL && !!conf->tx_explicit)
3552                                 return 0;
3553                         queue_action = 1;
3554                         action_n++;
3555                         break;
3556                 case RTE_FLOW_ACTION_TYPE_RSS:
3557                         rss = actions->conf;
3558                         if (rss == NULL || rss->queue_num == 0)
3559                                 return 0;
3560                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3561                         if (conf != NULL && !!conf->tx_explicit)
3562                                 return 0;
3563                         queue_action = 1;
3564                         action_n++;
3565                         break;
3566                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3567                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3568                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3569                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3570                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3571                         split++;
3572                         action_n++;
3573                         break;
3574                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3575                         raw_encap = actions->conf;
3576                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3577                                 split++;
3578                         action_n++;
3579                         break;
3580                 default:
3581                         action_n++;
3582                         break;
3583                 }
3584         }
3585         if (split && queue_action)
3586                 return action_n;
3587         return 0;
3588 }
3589
3590 /* Declare flow create/destroy prototype in advance. */
3591 static uint32_t
3592 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3593                  const struct rte_flow_attr *attr,
3594                  const struct rte_flow_item items[],
3595                  const struct rte_flow_action actions[],
3596                  bool external, struct rte_flow_error *error);
3597
3598 static void
3599 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3600                   uint32_t flow_idx);
3601
3602 int
3603 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused,
3604                       struct mlx5_hlist_entry *entry,
3605                       uint64_t key, void *cb_ctx __rte_unused)
3606 {
3607         struct mlx5_flow_mreg_copy_resource *mcp_res =
3608                 container_of(entry, typeof(*mcp_res), hlist_ent);
3609
3610         return mcp_res->mark_id != key;
3611 }
3612
3613 struct mlx5_hlist_entry *
3614 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3615                        void *cb_ctx)
3616 {
3617         struct rte_eth_dev *dev = list->ctx;
3618         struct mlx5_priv *priv = dev->data->dev_private;
3619         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3620         struct mlx5_flow_mreg_copy_resource *mcp_res;
3621         struct rte_flow_error *error = ctx->error;
3622         uint32_t idx = 0;
3623         int ret;
3624         uint32_t mark_id = key;
3625         struct rte_flow_attr attr = {
3626                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3627                 .ingress = 1,
3628         };
3629         struct mlx5_rte_flow_item_tag tag_spec = {
3630                 .data = mark_id,
3631         };
3632         struct rte_flow_item items[] = {
3633                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3634         };
3635         struct rte_flow_action_mark ftag = {
3636                 .id = mark_id,
3637         };
3638         struct mlx5_flow_action_copy_mreg cp_mreg = {
3639                 .dst = REG_B,
3640                 .src = REG_NON,
3641         };
3642         struct rte_flow_action_jump jump = {
3643                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3644         };
3645         struct rte_flow_action actions[] = {
3646                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3647         };
3648
3649         /* Fill the register fileds in the flow. */
3650         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3651         if (ret < 0)
3652                 return NULL;
3653         tag_spec.id = ret;
3654         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3655         if (ret < 0)
3656                 return NULL;
3657         cp_mreg.src = ret;
3658         /* Provide the full width of FLAG specific value. */
3659         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3660                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3661         /* Build a new flow. */
3662         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3663                 items[0] = (struct rte_flow_item){
3664                         .type = (enum rte_flow_item_type)
3665                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3666                         .spec = &tag_spec,
3667                 };
3668                 items[1] = (struct rte_flow_item){
3669                         .type = RTE_FLOW_ITEM_TYPE_END,
3670                 };
3671                 actions[0] = (struct rte_flow_action){
3672                         .type = (enum rte_flow_action_type)
3673                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3674                         .conf = &ftag,
3675                 };
3676                 actions[1] = (struct rte_flow_action){
3677                         .type = (enum rte_flow_action_type)
3678                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3679                         .conf = &cp_mreg,
3680                 };
3681                 actions[2] = (struct rte_flow_action){
3682                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3683                         .conf = &jump,
3684                 };
3685                 actions[3] = (struct rte_flow_action){
3686                         .type = RTE_FLOW_ACTION_TYPE_END,
3687                 };
3688         } else {
3689                 /* Default rule, wildcard match. */
3690                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3691                 items[0] = (struct rte_flow_item){
3692                         .type = RTE_FLOW_ITEM_TYPE_END,
3693                 };
3694                 actions[0] = (struct rte_flow_action){
3695                         .type = (enum rte_flow_action_type)
3696                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3697                         .conf = &cp_mreg,
3698                 };
3699                 actions[1] = (struct rte_flow_action){
3700                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3701                         .conf = &jump,
3702                 };
3703                 actions[2] = (struct rte_flow_action){
3704                         .type = RTE_FLOW_ACTION_TYPE_END,
3705                 };
3706         }
3707         /* Build a new entry. */
3708         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3709         if (!mcp_res) {
3710                 rte_errno = ENOMEM;
3711                 return NULL;
3712         }
3713         mcp_res->idx = idx;
3714         mcp_res->mark_id = mark_id;
3715         /*
3716          * The copy Flows are not included in any list. There
3717          * ones are referenced from other Flows and can not
3718          * be applied, removed, deleted in ardbitrary order
3719          * by list traversing.
3720          */
3721         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3722                                          actions, false, error);
3723         if (!mcp_res->rix_flow) {
3724                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
3725                 return NULL;
3726         }
3727         return &mcp_res->hlist_ent;
3728 }
3729
3730 /**
3731  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3732  *
3733  * As mark_id is unique, if there's already a registered flow for the mark_id,
3734  * return by increasing the reference counter of the resource. Otherwise, create
3735  * the resource (mcp_res) and flow.
3736  *
3737  * Flow looks like,
3738  *   - If ingress port is ANY and reg_c[1] is mark_id,
3739  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3740  *
3741  * For default flow (zero mark_id), flow is like,
3742  *   - If ingress port is ANY,
3743  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3744  *
3745  * @param dev
3746  *   Pointer to Ethernet device.
3747  * @param mark_id
3748  *   ID of MARK action, zero means default flow for META.
3749  * @param[out] error
3750  *   Perform verbose error reporting if not NULL.
3751  *
3752  * @return
3753  *   Associated resource on success, NULL otherwise and rte_errno is set.
3754  */
3755 static struct mlx5_flow_mreg_copy_resource *
3756 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3757                           struct rte_flow_error *error)
3758 {
3759         struct mlx5_priv *priv = dev->data->dev_private;
3760         struct mlx5_hlist_entry *entry;
3761         struct mlx5_flow_cb_ctx ctx = {
3762                 .dev = dev,
3763                 .error = error,
3764         };
3765
3766         /* Check if already registered. */
3767         MLX5_ASSERT(priv->mreg_cp_tbl);
3768         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
3769         if (!entry)
3770                 return NULL;
3771         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
3772                             hlist_ent);
3773 }
3774
3775 void
3776 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
3777 {
3778         struct mlx5_flow_mreg_copy_resource *mcp_res =
3779                 container_of(entry, typeof(*mcp_res), hlist_ent);
3780         struct rte_eth_dev *dev = list->ctx;
3781         struct mlx5_priv *priv = dev->data->dev_private;
3782
3783         MLX5_ASSERT(mcp_res->rix_flow);
3784         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3785         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3786 }
3787
3788 /**
3789  * Release flow in RX_CP_TBL.
3790  *
3791  * @param dev
3792  *   Pointer to Ethernet device.
3793  * @flow
3794  *   Parent flow for wich copying is provided.
3795  */
3796 static void
3797 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3798                           struct rte_flow *flow)
3799 {
3800         struct mlx5_flow_mreg_copy_resource *mcp_res;
3801         struct mlx5_priv *priv = dev->data->dev_private;
3802
3803         if (!flow->rix_mreg_copy)
3804                 return;
3805         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3806                                  flow->rix_mreg_copy);
3807         if (!mcp_res || !priv->mreg_cp_tbl)
3808                 return;
3809         MLX5_ASSERT(mcp_res->rix_flow);
3810         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3811         flow->rix_mreg_copy = 0;
3812 }
3813
3814 /**
3815  * Remove the default copy action from RX_CP_TBL.
3816  *
3817  * This functions is called in the mlx5_dev_start(). No thread safe
3818  * is guaranteed.
3819  *
3820  * @param dev
3821  *   Pointer to Ethernet device.
3822  */
3823 static void
3824 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3825 {
3826         struct mlx5_hlist_entry *entry;
3827         struct mlx5_priv *priv = dev->data->dev_private;
3828
3829         /* Check if default flow is registered. */
3830         if (!priv->mreg_cp_tbl)
3831                 return;
3832         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
3833                                   MLX5_DEFAULT_COPY_ID, NULL);
3834         if (!entry)
3835                 return;
3836         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
3837 }
3838
3839 /**
3840  * Add the default copy action in in RX_CP_TBL.
3841  *
3842  * This functions is called in the mlx5_dev_start(). No thread safe
3843  * is guaranteed.
3844  *
3845  * @param dev
3846  *   Pointer to Ethernet device.
3847  * @param[out] error
3848  *   Perform verbose error reporting if not NULL.
3849  *
3850  * @return
3851  *   0 for success, negative value otherwise and rte_errno is set.
3852  */
3853 static int
3854 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3855                                   struct rte_flow_error *error)
3856 {
3857         struct mlx5_priv *priv = dev->data->dev_private;
3858         struct mlx5_flow_mreg_copy_resource *mcp_res;
3859
3860         /* Check whether extensive metadata feature is engaged. */
3861         if (!priv->config.dv_flow_en ||
3862             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3863             !mlx5_flow_ext_mreg_supported(dev) ||
3864             !priv->sh->dv_regc0_mask)
3865                 return 0;
3866         /*
3867          * Add default mreg copy flow may be called multiple time, but
3868          * only be called once in stop. Avoid register it twice.
3869          */
3870         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
3871                 return 0;
3872         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3873         if (!mcp_res)
3874                 return -rte_errno;
3875         return 0;
3876 }
3877
3878 /**
3879  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3880  *
3881  * All the flow having Q/RSS action should be split by
3882  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3883  * performs the following,
3884  *   - CQE->flow_tag := reg_c[1] (MARK)
3885  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3886  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3887  * but there should be a flow per each MARK ID set by MARK action.
3888  *
3889  * For the aforementioned reason, if there's a MARK action in flow's action
3890  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3891  * the MARK ID to CQE's flow_tag like,
3892  *   - If reg_c[1] is mark_id,
3893  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3894  *
3895  * For SET_META action which stores value in reg_c[0], as the destination is
3896  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3897  * MARK ID means the default flow. The default flow looks like,
3898  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3899  *
3900  * @param dev
3901  *   Pointer to Ethernet device.
3902  * @param flow
3903  *   Pointer to flow structure.
3904  * @param[in] actions
3905  *   Pointer to the list of actions.
3906  * @param[out] error
3907  *   Perform verbose error reporting if not NULL.
3908  *
3909  * @return
3910  *   0 on success, negative value otherwise and rte_errno is set.
3911  */
3912 static int
3913 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3914                             struct rte_flow *flow,
3915                             const struct rte_flow_action *actions,
3916                             struct rte_flow_error *error)
3917 {
3918         struct mlx5_priv *priv = dev->data->dev_private;
3919         struct mlx5_dev_config *config = &priv->config;
3920         struct mlx5_flow_mreg_copy_resource *mcp_res;
3921         const struct rte_flow_action_mark *mark;
3922
3923         /* Check whether extensive metadata feature is engaged. */
3924         if (!config->dv_flow_en ||
3925             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3926             !mlx5_flow_ext_mreg_supported(dev) ||
3927             !priv->sh->dv_regc0_mask)
3928                 return 0;
3929         /* Find MARK action. */
3930         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3931                 switch (actions->type) {
3932                 case RTE_FLOW_ACTION_TYPE_FLAG:
3933                         mcp_res = flow_mreg_add_copy_action
3934                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3935                         if (!mcp_res)
3936                                 return -rte_errno;
3937                         flow->rix_mreg_copy = mcp_res->idx;
3938                         return 0;
3939                 case RTE_FLOW_ACTION_TYPE_MARK:
3940                         mark = (const struct rte_flow_action_mark *)
3941                                 actions->conf;
3942                         mcp_res =
3943                                 flow_mreg_add_copy_action(dev, mark->id, error);
3944                         if (!mcp_res)
3945                                 return -rte_errno;
3946                         flow->rix_mreg_copy = mcp_res->idx;
3947                         return 0;
3948                 default:
3949                         break;
3950                 }
3951         }
3952         return 0;
3953 }
3954
3955 #define MLX5_MAX_SPLIT_ACTIONS 24
3956 #define MLX5_MAX_SPLIT_ITEMS 24
3957
3958 /**
3959  * Split the hairpin flow.
3960  * Since HW can't support encap and push-vlan on Rx, we move these
3961  * actions to Tx.
3962  * If the count action is after the encap then we also
3963  * move the count action. in this case the count will also measure
3964  * the outer bytes.
3965  *
3966  * @param dev
3967  *   Pointer to Ethernet device.
3968  * @param[in] actions
3969  *   Associated actions (list terminated by the END action).
3970  * @param[out] actions_rx
3971  *   Rx flow actions.
3972  * @param[out] actions_tx
3973  *   Tx flow actions..
3974  * @param[out] pattern_tx
3975  *   The pattern items for the Tx flow.
3976  * @param[out] flow_id
3977  *   The flow ID connected to this flow.
3978  *
3979  * @return
3980  *   0 on success.
3981  */
3982 static int
3983 flow_hairpin_split(struct rte_eth_dev *dev,
3984                    const struct rte_flow_action actions[],
3985                    struct rte_flow_action actions_rx[],
3986                    struct rte_flow_action actions_tx[],
3987                    struct rte_flow_item pattern_tx[],
3988                    uint32_t flow_id)
3989 {
3990         const struct rte_flow_action_raw_encap *raw_encap;
3991         const struct rte_flow_action_raw_decap *raw_decap;
3992         struct mlx5_rte_flow_action_set_tag *set_tag;
3993         struct rte_flow_action *tag_action;
3994         struct mlx5_rte_flow_item_tag *tag_item;
3995         struct rte_flow_item *item;
3996         char *addr;
3997         int encap = 0;
3998
3999         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4000                 switch (actions->type) {
4001                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4002                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4003                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4004                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4005                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4006                         rte_memcpy(actions_tx, actions,
4007                                sizeof(struct rte_flow_action));
4008                         actions_tx++;
4009                         break;
4010                 case RTE_FLOW_ACTION_TYPE_COUNT:
4011                         if (encap) {
4012                                 rte_memcpy(actions_tx, actions,
4013                                            sizeof(struct rte_flow_action));
4014                                 actions_tx++;
4015                         } else {
4016                                 rte_memcpy(actions_rx, actions,
4017                                            sizeof(struct rte_flow_action));
4018                                 actions_rx++;
4019                         }
4020                         break;
4021                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4022                         raw_encap = actions->conf;
4023                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4024                                 memcpy(actions_tx, actions,
4025                                        sizeof(struct rte_flow_action));
4026                                 actions_tx++;
4027                                 encap = 1;
4028                         } else {
4029                                 rte_memcpy(actions_rx, actions,
4030                                            sizeof(struct rte_flow_action));
4031                                 actions_rx++;
4032                         }
4033                         break;
4034                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4035                         raw_decap = actions->conf;
4036                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4037                                 memcpy(actions_tx, actions,
4038                                        sizeof(struct rte_flow_action));
4039                                 actions_tx++;
4040                         } else {
4041                                 rte_memcpy(actions_rx, actions,
4042                                            sizeof(struct rte_flow_action));
4043                                 actions_rx++;
4044                         }
4045                         break;
4046                 default:
4047                         rte_memcpy(actions_rx, actions,
4048                                    sizeof(struct rte_flow_action));
4049                         actions_rx++;
4050                         break;
4051                 }
4052         }
4053         /* Add set meta action and end action for the Rx flow. */
4054         tag_action = actions_rx;
4055         tag_action->type = (enum rte_flow_action_type)
4056                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4057         actions_rx++;
4058         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4059         actions_rx++;
4060         set_tag = (void *)actions_rx;
4061         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4062         MLX5_ASSERT(set_tag->id > REG_NON);
4063         set_tag->data = flow_id;
4064         tag_action->conf = set_tag;
4065         /* Create Tx item list. */
4066         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4067         addr = (void *)&pattern_tx[2];
4068         item = pattern_tx;
4069         item->type = (enum rte_flow_item_type)
4070                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4071         tag_item = (void *)addr;
4072         tag_item->data = flow_id;
4073         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4074         MLX5_ASSERT(set_tag->id > REG_NON);
4075         item->spec = tag_item;
4076         addr += sizeof(struct mlx5_rte_flow_item_tag);
4077         tag_item = (void *)addr;
4078         tag_item->data = UINT32_MAX;
4079         tag_item->id = UINT16_MAX;
4080         item->mask = tag_item;
4081         item->last = NULL;
4082         item++;
4083         item->type = RTE_FLOW_ITEM_TYPE_END;
4084         return 0;
4085 }
4086
4087 /**
4088  * The last stage of splitting chain, just creates the subflow
4089  * without any modification.
4090  *
4091  * @param[in] dev
4092  *   Pointer to Ethernet device.
4093  * @param[in] flow
4094  *   Parent flow structure pointer.
4095  * @param[in, out] sub_flow
4096  *   Pointer to return the created subflow, may be NULL.
4097  * @param[in] attr
4098  *   Flow rule attributes.
4099  * @param[in] items
4100  *   Pattern specification (list terminated by the END pattern item).
4101  * @param[in] actions
4102  *   Associated actions (list terminated by the END action).
4103  * @param[in] flow_split_info
4104  *   Pointer to flow split info structure.
4105  * @param[out] error
4106  *   Perform verbose error reporting if not NULL.
4107  * @return
4108  *   0 on success, negative value otherwise
4109  */
4110 static int
4111 flow_create_split_inner(struct rte_eth_dev *dev,
4112                         struct rte_flow *flow,
4113                         struct mlx5_flow **sub_flow,
4114                         const struct rte_flow_attr *attr,
4115                         const struct rte_flow_item items[],
4116                         const struct rte_flow_action actions[],
4117                         struct mlx5_flow_split_info *flow_split_info,
4118                         struct rte_flow_error *error)
4119 {
4120         struct mlx5_flow *dev_flow;
4121
4122         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4123                                     flow_split_info->flow_idx, error);
4124         if (!dev_flow)
4125                 return -rte_errno;
4126         dev_flow->flow = flow;
4127         dev_flow->external = flow_split_info->external;
4128         dev_flow->skip_scale = flow_split_info->skip_scale;
4129         /* Subflow object was created, we must include one in the list. */
4130         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4131                       dev_flow->handle, next);
4132         /*
4133          * If dev_flow is as one of the suffix flow, some actions in suffix
4134          * flow may need some user defined item layer flags, and pass the
4135          * Metadate rxq mark flag to suffix flow as well.
4136          */
4137         if (flow_split_info->prefix_layers)
4138                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4139         if (flow_split_info->prefix_mark)
4140                 dev_flow->handle->mark = 1;
4141         if (sub_flow)
4142                 *sub_flow = dev_flow;
4143         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4144 }
4145
4146 /**
4147  * Split the meter flow.
4148  *
4149  * As meter flow will split to three sub flow, other than meter
4150  * action, the other actions make sense to only meter accepts
4151  * the packet. If it need to be dropped, no other additional
4152  * actions should be take.
4153  *
4154  * One kind of special action which decapsulates the L3 tunnel
4155  * header will be in the prefix sub flow, as not to take the
4156  * L3 tunnel header into account.
4157  *
4158  * @param dev
4159  *   Pointer to Ethernet device.
4160  * @param[in] items
4161  *   Pattern specification (list terminated by the END pattern item).
4162  * @param[out] sfx_items
4163  *   Suffix flow match items (list terminated by the END pattern item).
4164  * @param[in] actions
4165  *   Associated actions (list terminated by the END action).
4166  * @param[out] actions_sfx
4167  *   Suffix flow actions.
4168  * @param[out] actions_pre
4169  *   Prefix flow actions.
4170  * @param[out] pattern_sfx
4171  *   The pattern items for the suffix flow.
4172  * @param[out] tag_sfx
4173  *   Pointer to suffix flow tag.
4174  *
4175  * @return
4176  *   0 on success.
4177  */
4178 static int
4179 flow_meter_split_prep(struct rte_eth_dev *dev,
4180                  const struct rte_flow_item items[],
4181                  struct rte_flow_item sfx_items[],
4182                  const struct rte_flow_action actions[],
4183                  struct rte_flow_action actions_sfx[],
4184                  struct rte_flow_action actions_pre[])
4185 {
4186         struct mlx5_priv *priv = dev->data->dev_private;
4187         struct rte_flow_action *tag_action = NULL;
4188         struct rte_flow_item *tag_item;
4189         struct mlx5_rte_flow_action_set_tag *set_tag;
4190         struct rte_flow_error error;
4191         const struct rte_flow_action_raw_encap *raw_encap;
4192         const struct rte_flow_action_raw_decap *raw_decap;
4193         struct mlx5_rte_flow_item_tag *tag_spec;
4194         struct mlx5_rte_flow_item_tag *tag_mask;
4195         uint32_t tag_id = 0;
4196         bool copy_vlan = false;
4197
4198         /* Prepare the actions for prefix and suffix flow. */
4199         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4200                 struct rte_flow_action **action_cur = NULL;
4201
4202                 switch (actions->type) {
4203                 case RTE_FLOW_ACTION_TYPE_METER:
4204                         /* Add the extra tag action first. */
4205                         tag_action = actions_pre;
4206                         tag_action->type = (enum rte_flow_action_type)
4207                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4208                         actions_pre++;
4209                         action_cur = &actions_pre;
4210                         break;
4211                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4212                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4213                         action_cur = &actions_pre;
4214                         break;
4215                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4216                         raw_encap = actions->conf;
4217                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4218                                 action_cur = &actions_pre;
4219                         break;
4220                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4221                         raw_decap = actions->conf;
4222                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4223                                 action_cur = &actions_pre;
4224                         break;
4225                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4226                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4227                         copy_vlan = true;
4228                         break;
4229                 default:
4230                         break;
4231                 }
4232                 if (!action_cur)
4233                         action_cur = &actions_sfx;
4234                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4235                 (*action_cur)++;
4236         }
4237         /* Add end action to the actions. */
4238         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4239         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4240         actions_pre++;
4241         /* Set the tag. */
4242         set_tag = (void *)actions_pre;
4243         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4244         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4245                           &tag_id);
4246         if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) {
4247                 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.",
4248                         dev->data->port_id);
4249                 mlx5_ipool_free(priv->sh->ipool
4250                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id);
4251                 return 0;
4252         } else if (!tag_id) {
4253                 return 0;
4254         }
4255         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4256         assert(tag_action);
4257         tag_action->conf = set_tag;
4258         /* Prepare the suffix subflow items. */
4259         tag_item = sfx_items++;
4260         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4261                 int item_type = items->type;
4262
4263                 switch (item_type) {
4264                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4265                         memcpy(sfx_items, items, sizeof(*sfx_items));
4266                         sfx_items++;
4267                         break;
4268                 case RTE_FLOW_ITEM_TYPE_VLAN:
4269                         if (copy_vlan) {
4270                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4271                                 /*
4272                                  * Convert to internal match item, it is used
4273                                  * for vlan push and set vid.
4274                                  */
4275                                 sfx_items->type = (enum rte_flow_item_type)
4276                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4277                                 sfx_items++;
4278                         }
4279                         break;
4280                 default:
4281                         break;
4282                 }
4283         }
4284         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4285         sfx_items++;
4286         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4287         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4288         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4289         tag_mask = tag_spec + 1;
4290         tag_mask->data = 0xffffff00;
4291         tag_item->type = (enum rte_flow_item_type)
4292                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4293         tag_item->spec = tag_spec;
4294         tag_item->last = NULL;
4295         tag_item->mask = tag_mask;
4296         return tag_id;
4297 }
4298
4299 /**
4300  * Split action list having QUEUE/RSS for metadata register copy.
4301  *
4302  * Once Q/RSS action is detected in user's action list, the flow action
4303  * should be split in order to copy metadata registers, which will happen in
4304  * RX_CP_TBL like,
4305  *   - CQE->flow_tag := reg_c[1] (MARK)
4306  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4307  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4308  * This is because the last action of each flow must be a terminal action
4309  * (QUEUE, RSS or DROP).
4310  *
4311  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4312  * stored and kept in the mlx5_flow structure per each sub_flow.
4313  *
4314  * The Q/RSS action is replaced with,
4315  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4316  * And the following JUMP action is added at the end,
4317  *   - JUMP, to RX_CP_TBL.
4318  *
4319  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4320  * flow_create_split_metadata() routine. The flow will look like,
4321  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4322  *
4323  * @param dev
4324  *   Pointer to Ethernet device.
4325  * @param[out] split_actions
4326  *   Pointer to store split actions to jump to CP_TBL.
4327  * @param[in] actions
4328  *   Pointer to the list of original flow actions.
4329  * @param[in] qrss
4330  *   Pointer to the Q/RSS action.
4331  * @param[in] actions_n
4332  *   Number of original actions.
4333  * @param[out] error
4334  *   Perform verbose error reporting if not NULL.
4335  *
4336  * @return
4337  *   non-zero unique flow_id on success, otherwise 0 and
4338  *   error/rte_error are set.
4339  */
4340 static uint32_t
4341 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4342                           struct rte_flow_action *split_actions,
4343                           const struct rte_flow_action *actions,
4344                           const struct rte_flow_action *qrss,
4345                           int actions_n, struct rte_flow_error *error)
4346 {
4347         struct mlx5_priv *priv = dev->data->dev_private;
4348         struct mlx5_rte_flow_action_set_tag *set_tag;
4349         struct rte_flow_action_jump *jump;
4350         const int qrss_idx = qrss - actions;
4351         uint32_t flow_id = 0;
4352         int ret = 0;
4353
4354         /*
4355          * Given actions will be split
4356          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4357          * - Add jump to mreg CP_TBL.
4358          * As a result, there will be one more action.
4359          */
4360         ++actions_n;
4361         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4362         set_tag = (void *)(split_actions + actions_n);
4363         /*
4364          * If tag action is not set to void(it means we are not the meter
4365          * suffix flow), add the tag action. Since meter suffix flow already
4366          * has the tag added.
4367          */
4368         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4369                 /*
4370                  * Allocate the new subflow ID. This one is unique within
4371                  * device and not shared with representors. Otherwise,
4372                  * we would have to resolve multi-thread access synch
4373                  * issue. Each flow on the shared device is appended
4374                  * with source vport identifier, so the resulting
4375                  * flows will be unique in the shared (by master and
4376                  * representors) domain even if they have coinciding
4377                  * IDs.
4378                  */
4379                 mlx5_ipool_malloc(priv->sh->ipool
4380                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4381                 if (!flow_id)
4382                         return rte_flow_error_set(error, ENOMEM,
4383                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4384                                                   NULL, "can't allocate id "
4385                                                   "for split Q/RSS subflow");
4386                 /* Internal SET_TAG action to set flow ID. */
4387                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4388                         .data = flow_id,
4389                 };
4390                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4391                 if (ret < 0)
4392                         return ret;
4393                 set_tag->id = ret;
4394                 /* Construct new actions array. */
4395                 /* Replace QUEUE/RSS action. */
4396                 split_actions[qrss_idx] = (struct rte_flow_action){
4397                         .type = (enum rte_flow_action_type)
4398                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4399                         .conf = set_tag,
4400                 };
4401         }
4402         /* JUMP action to jump to mreg copy table (CP_TBL). */
4403         jump = (void *)(set_tag + 1);
4404         *jump = (struct rte_flow_action_jump){
4405                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4406         };
4407         split_actions[actions_n - 2] = (struct rte_flow_action){
4408                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4409                 .conf = jump,
4410         };
4411         split_actions[actions_n - 1] = (struct rte_flow_action){
4412                 .type = RTE_FLOW_ACTION_TYPE_END,
4413         };
4414         return flow_id;
4415 }
4416
4417 /**
4418  * Extend the given action list for Tx metadata copy.
4419  *
4420  * Copy the given action list to the ext_actions and add flow metadata register
4421  * copy action in order to copy reg_a set by WQE to reg_c[0].
4422  *
4423  * @param[out] ext_actions
4424  *   Pointer to the extended action list.
4425  * @param[in] actions
4426  *   Pointer to the list of actions.
4427  * @param[in] actions_n
4428  *   Number of actions in the list.
4429  * @param[out] error
4430  *   Perform verbose error reporting if not NULL.
4431  * @param[in] encap_idx
4432  *   The encap action inndex.
4433  *
4434  * @return
4435  *   0 on success, negative value otherwise
4436  */
4437 static int
4438 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4439                        struct rte_flow_action *ext_actions,
4440                        const struct rte_flow_action *actions,
4441                        int actions_n, struct rte_flow_error *error,
4442                        int encap_idx)
4443 {
4444         struct mlx5_flow_action_copy_mreg *cp_mreg =
4445                 (struct mlx5_flow_action_copy_mreg *)
4446                         (ext_actions + actions_n + 1);
4447         int ret;
4448
4449         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4450         if (ret < 0)
4451                 return ret;
4452         cp_mreg->dst = ret;
4453         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4454         if (ret < 0)
4455                 return ret;
4456         cp_mreg->src = ret;
4457         if (encap_idx != 0)
4458                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4459         if (encap_idx == actions_n - 1) {
4460                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4461                         .type = (enum rte_flow_action_type)
4462                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4463                         .conf = cp_mreg,
4464                 };
4465                 ext_actions[actions_n] = (struct rte_flow_action){
4466                         .type = RTE_FLOW_ACTION_TYPE_END,
4467                 };
4468         } else {
4469                 ext_actions[encap_idx] = (struct rte_flow_action){
4470                         .type = (enum rte_flow_action_type)
4471                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4472                         .conf = cp_mreg,
4473                 };
4474                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4475                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4476         }
4477         return 0;
4478 }
4479
4480 /**
4481  * Check the match action from the action list.
4482  *
4483  * @param[in] actions
4484  *   Pointer to the list of actions.
4485  * @param[in] attr
4486  *   Flow rule attributes.
4487  * @param[in] action
4488  *   The action to be check if exist.
4489  * @param[out] match_action_pos
4490  *   Pointer to the position of the matched action if exists, otherwise is -1.
4491  * @param[out] qrss_action_pos
4492  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4493  *
4494  * @return
4495  *   > 0 the total number of actions.
4496  *   0 if not found match action in action list.
4497  */
4498 static int
4499 flow_check_match_action(const struct rte_flow_action actions[],
4500                         const struct rte_flow_attr *attr,
4501                         enum rte_flow_action_type action,
4502                         int *match_action_pos, int *qrss_action_pos)
4503 {
4504         const struct rte_flow_action_sample *sample;
4505         int actions_n = 0;
4506         int jump_flag = 0;
4507         uint32_t ratio = 0;
4508         int sub_type = 0;
4509         int flag = 0;
4510
4511         *match_action_pos = -1;
4512         *qrss_action_pos = -1;
4513         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4514                 if (actions->type == action) {
4515                         flag = 1;
4516                         *match_action_pos = actions_n;
4517                 }
4518                 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE ||
4519                     actions->type == RTE_FLOW_ACTION_TYPE_RSS)
4520                         *qrss_action_pos = actions_n;
4521                 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP)
4522                         jump_flag = 1;
4523                 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) {
4524                         sample = actions->conf;
4525                         ratio = sample->ratio;
4526                         sub_type = ((const struct rte_flow_action *)
4527                                         (sample->actions))->type;
4528                 }
4529                 actions_n++;
4530         }
4531         if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) {
4532                 if (ratio == 1) {
4533                         /* JUMP Action not support for Mirroring;
4534                          * Mirroring support multi-destination;
4535                          */
4536                         if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END)
4537                                 flag = 0;
4538                 }
4539         }
4540         /* Count RTE_FLOW_ACTION_TYPE_END. */
4541         return flag ? actions_n + 1 : 0;
4542 }
4543
4544 #define SAMPLE_SUFFIX_ITEM 2
4545
4546 /**
4547  * Split the sample flow.
4548  *
4549  * As sample flow will split to two sub flow, sample flow with
4550  * sample action, the other actions will move to new suffix flow.
4551  *
4552  * Also add unique tag id with tag action in the sample flow,
4553  * the same tag id will be as match in the suffix flow.
4554  *
4555  * @param dev
4556  *   Pointer to Ethernet device.
4557  * @param[in] fdb_tx
4558  *   FDB egress flow flag.
4559  * @param[out] sfx_items
4560  *   Suffix flow match items (list terminated by the END pattern item).
4561  * @param[in] actions
4562  *   Associated actions (list terminated by the END action).
4563  * @param[out] actions_sfx
4564  *   Suffix flow actions.
4565  * @param[out] actions_pre
4566  *   Prefix flow actions.
4567  * @param[in] actions_n
4568  *  The total number of actions.
4569  * @param[in] sample_action_pos
4570  *   The sample action position.
4571  * @param[in] qrss_action_pos
4572  *   The Queue/RSS action position.
4573  * @param[out] error
4574  *   Perform verbose error reporting if not NULL.
4575  *
4576  * @return
4577  *   0 on success, or unique flow_id, a negative errno value
4578  *   otherwise and rte_errno is set.
4579  */
4580 static int
4581 flow_sample_split_prep(struct rte_eth_dev *dev,
4582                        uint32_t fdb_tx,
4583                        struct rte_flow_item sfx_items[],
4584                        const struct rte_flow_action actions[],
4585                        struct rte_flow_action actions_sfx[],
4586                        struct rte_flow_action actions_pre[],
4587                        int actions_n,
4588                        int sample_action_pos,
4589                        int qrss_action_pos,
4590                        struct rte_flow_error *error)
4591 {
4592         struct mlx5_priv *priv = dev->data->dev_private;
4593         struct mlx5_rte_flow_action_set_tag *set_tag;
4594         struct mlx5_rte_flow_item_tag *tag_spec;
4595         struct mlx5_rte_flow_item_tag *tag_mask;
4596         uint32_t tag_id = 0;
4597         int index;
4598         int ret;
4599
4600         if (sample_action_pos < 0)
4601                 return rte_flow_error_set(error, EINVAL,
4602                                           RTE_FLOW_ERROR_TYPE_ACTION,
4603                                           NULL, "invalid position of sample "
4604                                           "action in list");
4605         if (!fdb_tx) {
4606                 /* Prepare the prefix tag action. */
4607                 set_tag = (void *)(actions_pre + actions_n + 1);
4608                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4609                 if (ret < 0)
4610                         return ret;
4611                 set_tag->id = ret;
4612                 mlx5_ipool_malloc(priv->sh->ipool
4613                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
4614                 set_tag->data = tag_id;
4615                 /* Prepare the suffix subflow items. */
4616                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4617                 tag_spec->data = tag_id;
4618                 tag_spec->id = set_tag->id;
4619                 tag_mask = tag_spec + 1;
4620                 tag_mask->data = UINT32_MAX;
4621                 sfx_items[0] = (struct rte_flow_item){
4622                         .type = (enum rte_flow_item_type)
4623                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4624                         .spec = tag_spec,
4625                         .last = NULL,
4626                         .mask = tag_mask,
4627                 };
4628                 sfx_items[1] = (struct rte_flow_item){
4629                         .type = (enum rte_flow_item_type)
4630                                 RTE_FLOW_ITEM_TYPE_END,
4631                 };
4632         }
4633         /* Prepare the actions for prefix and suffix flow. */
4634         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4635                 index = qrss_action_pos;
4636                 /* Put the preceding the Queue/RSS action into prefix flow. */
4637                 if (index != 0)
4638                         memcpy(actions_pre, actions,
4639                                sizeof(struct rte_flow_action) * index);
4640                 /* Put others preceding the sample action into prefix flow. */
4641                 if (sample_action_pos > index + 1)
4642                         memcpy(actions_pre + index, actions + index + 1,
4643                                sizeof(struct rte_flow_action) *
4644                                (sample_action_pos - index - 1));
4645                 index = sample_action_pos - 1;
4646                 /* Put Queue/RSS action into Suffix flow. */
4647                 memcpy(actions_sfx, actions + qrss_action_pos,
4648                        sizeof(struct rte_flow_action));
4649                 actions_sfx++;
4650         } else {
4651                 index = sample_action_pos;
4652                 if (index != 0)
4653                         memcpy(actions_pre, actions,
4654                                sizeof(struct rte_flow_action) * index);
4655         }
4656         /* Add the extra tag action for NIC-RX and E-Switch ingress. */
4657         if (!fdb_tx) {
4658                 actions_pre[index++] =
4659                         (struct rte_flow_action){
4660                         .type = (enum rte_flow_action_type)
4661                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4662                         .conf = set_tag,
4663                 };
4664         }
4665         memcpy(actions_pre + index, actions + sample_action_pos,
4666                sizeof(struct rte_flow_action));
4667         index += 1;
4668         actions_pre[index] = (struct rte_flow_action){
4669                 .type = (enum rte_flow_action_type)
4670                         RTE_FLOW_ACTION_TYPE_END,
4671         };
4672         /* Put the actions after sample into Suffix flow. */
4673         memcpy(actions_sfx, actions + sample_action_pos + 1,
4674                sizeof(struct rte_flow_action) *
4675                (actions_n - sample_action_pos - 1));
4676         return tag_id;
4677 }
4678
4679 /**
4680  * The splitting for metadata feature.
4681  *
4682  * - Q/RSS action on NIC Rx should be split in order to pass by
4683  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4684  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4685  *
4686  * - All the actions on NIC Tx should have a mreg copy action to
4687  *   copy reg_a from WQE to reg_c[0].
4688  *
4689  * @param dev
4690  *   Pointer to Ethernet device.
4691  * @param[in] flow
4692  *   Parent flow structure pointer.
4693  * @param[in] attr
4694  *   Flow rule attributes.
4695  * @param[in] items
4696  *   Pattern specification (list terminated by the END pattern item).
4697  * @param[in] actions
4698  *   Associated actions (list terminated by the END action).
4699  * @param[in] flow_split_info
4700  *   Pointer to flow split info structure.
4701  * @param[out] error
4702  *   Perform verbose error reporting if not NULL.
4703  * @return
4704  *   0 on success, negative value otherwise
4705  */
4706 static int
4707 flow_create_split_metadata(struct rte_eth_dev *dev,
4708                            struct rte_flow *flow,
4709                            const struct rte_flow_attr *attr,
4710                            const struct rte_flow_item items[],
4711                            const struct rte_flow_action actions[],
4712                            struct mlx5_flow_split_info *flow_split_info,
4713                            struct rte_flow_error *error)
4714 {
4715         struct mlx5_priv *priv = dev->data->dev_private;
4716         struct mlx5_dev_config *config = &priv->config;
4717         const struct rte_flow_action *qrss = NULL;
4718         struct rte_flow_action *ext_actions = NULL;
4719         struct mlx5_flow *dev_flow = NULL;
4720         uint32_t qrss_id = 0;
4721         int mtr_sfx = 0;
4722         size_t act_size;
4723         int actions_n;
4724         int encap_idx;
4725         int ret;
4726
4727         /* Check whether extensive metadata feature is engaged. */
4728         if (!config->dv_flow_en ||
4729             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4730             !mlx5_flow_ext_mreg_supported(dev))
4731                 return flow_create_split_inner(dev, flow, NULL, attr, items,
4732                                                actions, flow_split_info, error);
4733         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
4734                                                            &encap_idx);
4735         if (qrss) {
4736                 /* Exclude hairpin flows from splitting. */
4737                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
4738                         const struct rte_flow_action_queue *queue;
4739
4740                         queue = qrss->conf;
4741                         if (mlx5_rxq_get_type(dev, queue->index) ==
4742                             MLX5_RXQ_TYPE_HAIRPIN)
4743                                 qrss = NULL;
4744                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
4745                         const struct rte_flow_action_rss *rss;
4746
4747                         rss = qrss->conf;
4748                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
4749                             MLX5_RXQ_TYPE_HAIRPIN)
4750                                 qrss = NULL;
4751                 }
4752         }
4753         if (qrss) {
4754                 /* Check if it is in meter suffix table. */
4755                 mtr_sfx = attr->group == (attr->transfer ?
4756                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4757                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
4758                 /*
4759                  * Q/RSS action on NIC Rx should be split in order to pass by
4760                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
4761                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
4762                  */
4763                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4764                            sizeof(struct rte_flow_action_set_tag) +
4765                            sizeof(struct rte_flow_action_jump);
4766                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4767                                           SOCKET_ID_ANY);
4768                 if (!ext_actions)
4769                         return rte_flow_error_set(error, ENOMEM,
4770                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4771                                                   NULL, "no memory to split "
4772                                                   "metadata flow");
4773                 /*
4774                  * If we are the suffix flow of meter, tag already exist.
4775                  * Set the tag action to void.
4776                  */
4777                 if (mtr_sfx)
4778                         ext_actions[qrss - actions].type =
4779                                                 RTE_FLOW_ACTION_TYPE_VOID;
4780                 else
4781                         ext_actions[qrss - actions].type =
4782                                                 (enum rte_flow_action_type)
4783                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4784                 /*
4785                  * Create the new actions list with removed Q/RSS action
4786                  * and appended set tag and jump to register copy table
4787                  * (RX_CP_TBL). We should preallocate unique tag ID here
4788                  * in advance, because it is needed for set tag action.
4789                  */
4790                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
4791                                                     qrss, actions_n, error);
4792                 if (!mtr_sfx && !qrss_id) {
4793                         ret = -rte_errno;
4794                         goto exit;
4795                 }
4796         } else if (attr->egress && !attr->transfer) {
4797                 /*
4798                  * All the actions on NIC Tx should have a metadata register
4799                  * copy action to copy reg_a from WQE to reg_c[meta]
4800                  */
4801                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4802                            sizeof(struct mlx5_flow_action_copy_mreg);
4803                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4804                                           SOCKET_ID_ANY);
4805                 if (!ext_actions)
4806                         return rte_flow_error_set(error, ENOMEM,
4807                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4808                                                   NULL, "no memory to split "
4809                                                   "metadata flow");
4810                 /* Create the action list appended with copy register. */
4811                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
4812                                              actions_n, error, encap_idx);
4813                 if (ret < 0)
4814                         goto exit;
4815         }
4816         /* Add the unmodified original or prefix subflow. */
4817         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
4818                                       items, ext_actions ? ext_actions :
4819                                       actions, flow_split_info, error);
4820         if (ret < 0)
4821                 goto exit;
4822         MLX5_ASSERT(dev_flow);
4823         if (qrss) {
4824                 const struct rte_flow_attr q_attr = {
4825                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4826                         .ingress = 1,
4827                 };
4828                 /* Internal PMD action to set register. */
4829                 struct mlx5_rte_flow_item_tag q_tag_spec = {
4830                         .data = qrss_id,
4831                         .id = REG_NON,
4832                 };
4833                 struct rte_flow_item q_items[] = {
4834                         {
4835                                 .type = (enum rte_flow_item_type)
4836                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4837                                 .spec = &q_tag_spec,
4838                                 .last = NULL,
4839                                 .mask = NULL,
4840                         },
4841                         {
4842                                 .type = RTE_FLOW_ITEM_TYPE_END,
4843                         },
4844                 };
4845                 struct rte_flow_action q_actions[] = {
4846                         {
4847                                 .type = qrss->type,
4848                                 .conf = qrss->conf,
4849                         },
4850                         {
4851                                 .type = RTE_FLOW_ACTION_TYPE_END,
4852                         },
4853                 };
4854                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
4855
4856                 /*
4857                  * Configure the tag item only if there is no meter subflow.
4858                  * Since tag is already marked in the meter suffix subflow
4859                  * we can just use the meter suffix items as is.
4860                  */
4861                 if (qrss_id) {
4862                         /* Not meter subflow. */
4863                         MLX5_ASSERT(!mtr_sfx);
4864                         /*
4865                          * Put unique id in prefix flow due to it is destroyed
4866                          * after suffix flow and id will be freed after there
4867                          * is no actual flows with this id and identifier
4868                          * reallocation becomes possible (for example, for
4869                          * other flows in other threads).
4870                          */
4871                         dev_flow->handle->split_flow_id = qrss_id;
4872                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
4873                                                    error);
4874                         if (ret < 0)
4875                                 goto exit;
4876                         q_tag_spec.id = ret;
4877                 }
4878                 dev_flow = NULL;
4879                 /* Add suffix subflow to execute Q/RSS. */
4880                 flow_split_info->prefix_layers = layers;
4881                 flow_split_info->prefix_mark = 0;
4882                 ret = flow_create_split_inner(dev, flow, &dev_flow,
4883                                               &q_attr, mtr_sfx ? items :
4884                                               q_items, q_actions,
4885                                               flow_split_info, error);
4886                 if (ret < 0)
4887                         goto exit;
4888                 /* qrss ID should be freed if failed. */
4889                 qrss_id = 0;
4890                 MLX5_ASSERT(dev_flow);
4891         }
4892
4893 exit:
4894         /*
4895          * We do not destroy the partially created sub_flows in case of error.
4896          * These ones are included into parent flow list and will be destroyed
4897          * by flow_drv_destroy.
4898          */
4899         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4900                         qrss_id);
4901         mlx5_free(ext_actions);
4902         return ret;
4903 }
4904
4905 /**
4906  * The splitting for meter feature.
4907  *
4908  * - The meter flow will be split to two flows as prefix and
4909  *   suffix flow. The packets make sense only it pass the prefix
4910  *   meter action.
4911  *
4912  * - Reg_C_5 is used for the packet to match betweend prefix and
4913  *   suffix flow.
4914  *
4915  * @param dev
4916  *   Pointer to Ethernet device.
4917  * @param[in] flow
4918  *   Parent flow structure pointer.
4919  * @param[in] attr
4920  *   Flow rule attributes.
4921  * @param[in] items
4922  *   Pattern specification (list terminated by the END pattern item).
4923  * @param[in] actions
4924  *   Associated actions (list terminated by the END action).
4925  * @param[in] flow_split_info
4926  *   Pointer to flow split info structure.
4927  * @param[out] error
4928  *   Perform verbose error reporting if not NULL.
4929  * @return
4930  *   0 on success, negative value otherwise
4931  */
4932 static int
4933 flow_create_split_meter(struct rte_eth_dev *dev,
4934                         struct rte_flow *flow,
4935                         const struct rte_flow_attr *attr,
4936                         const struct rte_flow_item items[],
4937                         const struct rte_flow_action actions[],
4938                         struct mlx5_flow_split_info *flow_split_info,
4939                         struct rte_flow_error *error)
4940 {
4941         struct mlx5_priv *priv = dev->data->dev_private;
4942         struct rte_flow_action *sfx_actions = NULL;
4943         struct rte_flow_action *pre_actions = NULL;
4944         struct rte_flow_item *sfx_items = NULL;
4945         struct mlx5_flow *dev_flow = NULL;
4946         struct rte_flow_attr sfx_attr = *attr;
4947         uint32_t mtr = 0;
4948         uint32_t mtr_tag_id = 0;
4949         size_t act_size;
4950         size_t item_size;
4951         int actions_n = 0;
4952         int ret;
4953
4954         if (priv->mtr_en)
4955                 actions_n = flow_check_meter_action(actions, &mtr);
4956         if (mtr) {
4957                 /* The five prefix actions: meter, decap, encap, tag, end. */
4958                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
4959                            sizeof(struct mlx5_rte_flow_action_set_tag);
4960                 /* tag, vlan, port id, end. */
4961 #define METER_SUFFIX_ITEM 4
4962                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
4963                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
4964                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
4965                                           0, SOCKET_ID_ANY);
4966                 if (!sfx_actions)
4967                         return rte_flow_error_set(error, ENOMEM,
4968                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4969                                                   NULL, "no memory to split "
4970                                                   "meter flow");
4971                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
4972                              act_size);
4973                 pre_actions = sfx_actions + actions_n;
4974                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
4975                                                    actions, sfx_actions,
4976                                                    pre_actions);
4977                 if (!mtr_tag_id) {
4978                         ret = -rte_errno;
4979                         goto exit;
4980                 }
4981                 /* Add the prefix subflow. */
4982                 flow_split_info->prefix_mark = 0;
4983                 ret = flow_create_split_inner(dev, flow, &dev_flow,
4984                                               attr, items, pre_actions,
4985                                               flow_split_info, error);
4986                 if (ret) {
4987                         ret = -rte_errno;
4988                         goto exit;
4989                 }
4990                 dev_flow->handle->split_flow_id = mtr_tag_id;
4991                 /* Setting the sfx group atrr. */
4992                 sfx_attr.group = sfx_attr.transfer ?
4993                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4994                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4995                 flow_split_info->prefix_layers =
4996                                 flow_get_prefix_layer_flags(dev_flow);
4997                 flow_split_info->prefix_mark = dev_flow->handle->mark;
4998         }
4999         /* Add the prefix subflow. */
5000         ret = flow_create_split_metadata(dev, flow,
5001                                          &sfx_attr, sfx_items ?
5002                                          sfx_items : items,
5003                                          sfx_actions ? sfx_actions : actions,
5004                                          flow_split_info, error);
5005 exit:
5006         if (sfx_actions)
5007                 mlx5_free(sfx_actions);
5008         return ret;
5009 }
5010
5011 /**
5012  * The splitting for sample feature.
5013  *
5014  * Once Sample action is detected in the action list, the flow actions should
5015  * be split into prefix sub flow and suffix sub flow.
5016  *
5017  * The original items remain in the prefix sub flow, all actions preceding the
5018  * sample action and the sample action itself will be copied to the prefix
5019  * sub flow, the actions following the sample action will be copied to the
5020  * suffix sub flow, Queue action always be located in the suffix sub flow.
5021  *
5022  * In order to make the packet from prefix sub flow matches with suffix sub
5023  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5024  * flow uses tag item with the unique flow id.
5025  *
5026  * @param dev
5027  *   Pointer to Ethernet device.
5028  * @param[in] flow
5029  *   Parent flow structure pointer.
5030  * @param[in] attr
5031  *   Flow rule attributes.
5032  * @param[in] items
5033  *   Pattern specification (list terminated by the END pattern item).
5034  * @param[in] actions
5035  *   Associated actions (list terminated by the END action).
5036  * @param[in] flow_split_info
5037  *   Pointer to flow split info structure.
5038  * @param[out] error
5039  *   Perform verbose error reporting if not NULL.
5040  * @return
5041  *   0 on success, negative value otherwise
5042  */
5043 static int
5044 flow_create_split_sample(struct rte_eth_dev *dev,
5045                          struct rte_flow *flow,
5046                          const struct rte_flow_attr *attr,
5047                          const struct rte_flow_item items[],
5048                          const struct rte_flow_action actions[],
5049                          struct mlx5_flow_split_info *flow_split_info,
5050                          struct rte_flow_error *error)
5051 {
5052         struct mlx5_priv *priv = dev->data->dev_private;
5053         struct rte_flow_action *sfx_actions = NULL;
5054         struct rte_flow_action *pre_actions = NULL;
5055         struct rte_flow_item *sfx_items = NULL;
5056         struct mlx5_flow *dev_flow = NULL;
5057         struct rte_flow_attr sfx_attr = *attr;
5058 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5059         struct mlx5_flow_dv_sample_resource *sample_res;
5060         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5061         struct mlx5_flow_tbl_resource *sfx_tbl;
5062 #endif
5063         size_t act_size;
5064         size_t item_size;
5065         uint32_t fdb_tx = 0;
5066         int32_t tag_id = 0;
5067         int actions_n = 0;
5068         int sample_action_pos;
5069         int qrss_action_pos;
5070         int ret = 0;
5071
5072         if (priv->sampler_en)
5073                 actions_n = flow_check_match_action(actions, attr,
5074                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5075                                         &sample_action_pos, &qrss_action_pos);
5076         if (actions_n) {
5077                 /* The prefix actions must includes sample, tag, end. */
5078                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5079                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5080                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5081                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5082                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5083                                           item_size), 0, SOCKET_ID_ANY);
5084                 if (!sfx_actions)
5085                         return rte_flow_error_set(error, ENOMEM,
5086                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5087                                                   NULL, "no memory to split "
5088                                                   "sample flow");
5089                 /* The representor_id is -1 for uplink. */
5090                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5091                 if (!fdb_tx)
5092                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5093                                         + act_size);
5094                 pre_actions = sfx_actions + actions_n;
5095                 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items,
5096                                                 actions, sfx_actions,
5097                                                 pre_actions, actions_n,
5098                                                 sample_action_pos,
5099                                                 qrss_action_pos, error);
5100                 if (tag_id < 0 || (!fdb_tx && !tag_id)) {
5101                         ret = -rte_errno;
5102                         goto exit;
5103                 }
5104                 /* Add the prefix subflow. */
5105                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5106                                               items, pre_actions,
5107                                               flow_split_info, error);
5108                 if (ret) {
5109                         ret = -rte_errno;
5110                         goto exit;
5111                 }
5112                 dev_flow->handle->split_flow_id = tag_id;
5113 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5114                 /* Set the sfx group attr. */
5115                 sample_res = (struct mlx5_flow_dv_sample_resource *)
5116                                         dev_flow->dv.sample_res;
5117                 sfx_tbl = (struct mlx5_flow_tbl_resource *)
5118                                         sample_res->normal_path_tbl;
5119                 sfx_tbl_data = container_of(sfx_tbl,
5120                                         struct mlx5_flow_tbl_data_entry, tbl);
5121                 sfx_attr.group = sfx_attr.transfer ?
5122                                         (sfx_tbl_data->table_id - 1) :
5123                                          sfx_tbl_data->table_id;
5124                 flow_split_info->prefix_layers =
5125                                 flow_get_prefix_layer_flags(dev_flow);
5126                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5127                 /* Suffix group level already be scaled with factor, set
5128                  * skip_scale to 1 to avoid scale again in translation.
5129                  */
5130                 flow_split_info->skip_scale = 1;
5131 #endif
5132         }
5133         /* Add the suffix subflow. */
5134         ret = flow_create_split_meter(dev, flow, &sfx_attr,
5135                                       sfx_items ? sfx_items : items,
5136                                       sfx_actions ? sfx_actions : actions,
5137                                       flow_split_info, error);
5138 exit:
5139         if (sfx_actions)
5140                 mlx5_free(sfx_actions);
5141         return ret;
5142 }
5143
5144 /**
5145  * Split the flow to subflow set. The splitters might be linked
5146  * in the chain, like this:
5147  * flow_create_split_outer() calls:
5148  *   flow_create_split_meter() calls:
5149  *     flow_create_split_metadata(meter_subflow_0) calls:
5150  *       flow_create_split_inner(metadata_subflow_0)
5151  *       flow_create_split_inner(metadata_subflow_1)
5152  *       flow_create_split_inner(metadata_subflow_2)
5153  *     flow_create_split_metadata(meter_subflow_1) calls:
5154  *       flow_create_split_inner(metadata_subflow_0)
5155  *       flow_create_split_inner(metadata_subflow_1)
5156  *       flow_create_split_inner(metadata_subflow_2)
5157  *
5158  * This provide flexible way to add new levels of flow splitting.
5159  * The all of successfully created subflows are included to the
5160  * parent flow dev_flow list.
5161  *
5162  * @param dev
5163  *   Pointer to Ethernet device.
5164  * @param[in] flow
5165  *   Parent flow structure pointer.
5166  * @param[in] attr
5167  *   Flow rule attributes.
5168  * @param[in] items
5169  *   Pattern specification (list terminated by the END pattern item).
5170  * @param[in] actions
5171  *   Associated actions (list terminated by the END action).
5172  * @param[in] flow_split_info
5173  *   Pointer to flow split info structure.
5174  * @param[out] error
5175  *   Perform verbose error reporting if not NULL.
5176  * @return
5177  *   0 on success, negative value otherwise
5178  */
5179 static int
5180 flow_create_split_outer(struct rte_eth_dev *dev,
5181                         struct rte_flow *flow,
5182                         const struct rte_flow_attr *attr,
5183                         const struct rte_flow_item items[],
5184                         const struct rte_flow_action actions[],
5185                         struct mlx5_flow_split_info *flow_split_info,
5186                         struct rte_flow_error *error)
5187 {
5188         int ret;
5189
5190         ret = flow_create_split_sample(dev, flow, attr, items,
5191                                        actions, flow_split_info, error);
5192         MLX5_ASSERT(ret <= 0);
5193         return ret;
5194 }
5195
5196 static struct mlx5_flow_tunnel *
5197 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5198                       const struct rte_flow_attr *attr,
5199                       const struct rte_flow_item items[],
5200                       const struct rte_flow_action actions[])
5201 {
5202         struct mlx5_flow_tunnel *tunnel;
5203
5204 #pragma GCC diagnostic push
5205 #pragma GCC diagnostic ignored "-Wcast-qual"
5206         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5207                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5208         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5209                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5210         else
5211                 tunnel = NULL;
5212 #pragma GCC diagnostic pop
5213
5214         return tunnel;
5215 }
5216
5217 /**
5218  * Adjust flow RSS workspace if needed.
5219  *
5220  * @param wks
5221  *   Pointer to thread flow work space.
5222  * @param rss_desc
5223  *   Pointer to RSS descriptor.
5224  * @param[in] nrssq_num
5225  *   New RSS queue number.
5226  *
5227  * @return
5228  *   0 on success, -1 otherwise and rte_errno is set.
5229  */
5230 static int
5231 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5232                           struct mlx5_flow_rss_desc *rss_desc,
5233                           uint32_t nrssq_num)
5234 {
5235         if (likely(nrssq_num <= wks->rssq_num))
5236                 return 0;
5237         rss_desc->queue = realloc(rss_desc->queue,
5238                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
5239         if (!rss_desc->queue) {
5240                 rte_errno = ENOMEM;
5241                 return -1;
5242         }
5243         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
5244         return 0;
5245 }
5246
5247 /**
5248  * Create a flow and add it to @p list.
5249  *
5250  * @param dev
5251  *   Pointer to Ethernet device.
5252  * @param list
5253  *   Pointer to a TAILQ flow list. If this parameter NULL,
5254  *   no list insertion occurred, flow is just created,
5255  *   this is caller's responsibility to track the
5256  *   created flow.
5257  * @param[in] attr
5258  *   Flow rule attributes.
5259  * @param[in] items
5260  *   Pattern specification (list terminated by the END pattern item).
5261  * @param[in] actions
5262  *   Associated actions (list terminated by the END action).
5263  * @param[in] external
5264  *   This flow rule is created by request external to PMD.
5265  * @param[out] error
5266  *   Perform verbose error reporting if not NULL.
5267  *
5268  * @return
5269  *   A flow index on success, 0 otherwise and rte_errno is set.
5270  */
5271 static uint32_t
5272 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5273                  const struct rte_flow_attr *attr,
5274                  const struct rte_flow_item items[],
5275                  const struct rte_flow_action original_actions[],
5276                  bool external, struct rte_flow_error *error)
5277 {
5278         struct mlx5_priv *priv = dev->data->dev_private;
5279         struct rte_flow *flow = NULL;
5280         struct mlx5_flow *dev_flow;
5281         const struct rte_flow_action_rss *rss;
5282         struct mlx5_translated_shared_action
5283                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5284         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5285         union {
5286                 struct mlx5_flow_expand_rss buf;
5287                 uint8_t buffer[2048];
5288         } expand_buffer;
5289         union {
5290                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5291                 uint8_t buffer[2048];
5292         } actions_rx;
5293         union {
5294                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5295                 uint8_t buffer[2048];
5296         } actions_hairpin_tx;
5297         union {
5298                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5299                 uint8_t buffer[2048];
5300         } items_tx;
5301         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5302         struct mlx5_flow_rss_desc *rss_desc;
5303         const struct rte_flow_action *p_actions_rx;
5304         uint32_t i;
5305         uint32_t idx = 0;
5306         int hairpin_flow;
5307         struct rte_flow_attr attr_tx = { .priority = 0 };
5308         const struct rte_flow_action *actions;
5309         struct rte_flow_action *translated_actions = NULL;
5310         struct mlx5_flow_tunnel *tunnel;
5311         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5312         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
5313         struct mlx5_flow_split_info flow_split_info = {
5314                 .external = !!external,
5315                 .skip_scale = 0,
5316                 .flow_idx = 0,
5317                 .prefix_mark = 0,
5318                 .prefix_layers = 0
5319         };
5320         int ret;
5321
5322         MLX5_ASSERT(wks);
5323         rss_desc = &wks->rss_desc;
5324         ret = flow_shared_actions_translate(dev, original_actions,
5325                                             shared_actions,
5326                                             &shared_actions_n,
5327                                             &translated_actions, error);
5328         if (ret < 0) {
5329                 MLX5_ASSERT(translated_actions == NULL);
5330                 return 0;
5331         }
5332         actions = translated_actions ? translated_actions : original_actions;
5333         p_actions_rx = actions;
5334         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5335         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
5336                                 external, hairpin_flow, error);
5337         if (ret < 0)
5338                 goto error_before_hairpin_split;
5339         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5340         if (!flow) {
5341                 rte_errno = ENOMEM;
5342                 goto error_before_hairpin_split;
5343         }
5344         if (hairpin_flow > 0) {
5345                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5346                         rte_errno = EINVAL;
5347                         goto error_before_hairpin_split;
5348                 }
5349                 flow_hairpin_split(dev, actions, actions_rx.actions,
5350                                    actions_hairpin_tx.actions, items_tx.items,
5351                                    idx);
5352                 p_actions_rx = actions_rx.actions;
5353         }
5354         flow_split_info.flow_idx = idx;
5355         flow->drv_type = flow_get_drv_type(dev, attr);
5356         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5357                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5358         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5359         rss = flow_get_rss_action(p_actions_rx);
5360         if (rss) {
5361                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5362                         return 0;
5363                 /*
5364                  * The following information is required by
5365                  * mlx5_flow_hashfields_adjust() in advance.
5366                  */
5367                 rss_desc->level = rss->level;
5368                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5369                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5370         }
5371         flow->dev_handles = 0;
5372         if (rss && rss->types) {
5373                 unsigned int graph_root;
5374
5375                 graph_root = find_graph_root(items, rss->level);
5376                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5377                                            items, rss->types,
5378                                            mlx5_support_expansion, graph_root);
5379                 MLX5_ASSERT(ret > 0 &&
5380                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5381         } else {
5382                 buf->entries = 1;
5383                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5384         }
5385         rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
5386                                                       shared_actions_n);
5387         for (i = 0; i < buf->entries; ++i) {
5388                 /* Initialize flow split data. */
5389                 flow_split_info.prefix_layers = 0;
5390                 flow_split_info.prefix_mark = 0;
5391                 flow_split_info.skip_scale = 0;
5392                 /*
5393                  * The splitter may create multiple dev_flows,
5394                  * depending on configuration. In the simplest
5395                  * case it just creates unmodified original flow.
5396                  */
5397                 ret = flow_create_split_outer(dev, flow, attr,
5398                                               buf->entry[i].pattern,
5399                                               p_actions_rx, &flow_split_info,
5400                                               error);
5401                 if (ret < 0)
5402                         goto error;
5403                 if (is_flow_tunnel_steer_rule(dev, attr,
5404                                               buf->entry[i].pattern,
5405                                               p_actions_rx)) {
5406                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5407                                                            p_actions_rx,
5408                                                            idx,
5409                                                            &default_miss_ctx,
5410                                                            error);
5411                         if (ret < 0) {
5412                                 mlx5_free(default_miss_ctx.queue);
5413                                 goto error;
5414                         }
5415                 }
5416         }
5417         /* Create the tx flow. */
5418         if (hairpin_flow) {
5419                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5420                 attr_tx.ingress = 0;
5421                 attr_tx.egress = 1;
5422                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5423                                          actions_hairpin_tx.actions,
5424                                          idx, error);
5425                 if (!dev_flow)
5426                         goto error;
5427                 dev_flow->flow = flow;
5428                 dev_flow->external = 0;
5429                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5430                               dev_flow->handle, next);
5431                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5432                                          items_tx.items,
5433                                          actions_hairpin_tx.actions, error);
5434                 if (ret < 0)
5435                         goto error;
5436         }
5437         /*
5438          * Update the metadata register copy table. If extensive
5439          * metadata feature is enabled and registers are supported
5440          * we might create the extra rte_flow for each unique
5441          * MARK/FLAG action ID.
5442          *
5443          * The table is updated for ingress Flows only, because
5444          * the egress Flows belong to the different device and
5445          * copy table should be updated in peer NIC Rx domain.
5446          */
5447         if (attr->ingress &&
5448             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5449                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5450                 if (ret)
5451                         goto error;
5452         }
5453         /*
5454          * If the flow is external (from application) OR device is started,
5455          * OR mreg discover, then apply immediately.
5456          */
5457         if (external || dev->data->dev_started ||
5458             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
5459              attr->priority == MLX5_FLOW_PRIO_RSVD)) {
5460                 ret = flow_drv_apply(dev, flow, error);
5461                 if (ret < 0)
5462                         goto error;
5463         }
5464         if (list) {
5465                 rte_spinlock_lock(&priv->flow_list_lock);
5466                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5467                              flow, next);
5468                 rte_spinlock_unlock(&priv->flow_list_lock);
5469         }
5470         flow_rxq_flags_set(dev, flow);
5471         rte_free(translated_actions);
5472         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5473         if (tunnel) {
5474                 flow->tunnel = 1;
5475                 flow->tunnel_id = tunnel->tunnel_id;
5476                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5477                 mlx5_free(default_miss_ctx.queue);
5478         }
5479         mlx5_flow_pop_thread_workspace();
5480         return idx;
5481 error:
5482         MLX5_ASSERT(flow);
5483         ret = rte_errno; /* Save rte_errno before cleanup. */
5484         flow_mreg_del_copy_action(dev, flow);
5485         flow_drv_destroy(dev, flow);
5486         if (rss_desc->shared_rss)
5487                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
5488                         mlx5_ipool_get
5489                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
5490                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
5491         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5492         rte_errno = ret; /* Restore rte_errno. */
5493         ret = rte_errno;
5494         rte_errno = ret;
5495         mlx5_flow_pop_thread_workspace();
5496 error_before_hairpin_split:
5497         rte_free(translated_actions);
5498         return 0;
5499 }
5500
5501 /**
5502  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5503  * incoming packets to table 1.
5504  *
5505  * Other flow rules, requested for group n, will be created in
5506  * e-switch table n+1.
5507  * Jump action to e-switch group n will be created to group n+1.
5508  *
5509  * Used when working in switchdev mode, to utilise advantages of table 1
5510  * and above.
5511  *
5512  * @param dev
5513  *   Pointer to Ethernet device.
5514  *
5515  * @return
5516  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5517  */
5518 struct rte_flow *
5519 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5520 {
5521         const struct rte_flow_attr attr = {
5522                 .group = 0,
5523                 .priority = 0,
5524                 .ingress = 1,
5525                 .egress = 0,
5526                 .transfer = 1,
5527         };
5528         const struct rte_flow_item pattern = {
5529                 .type = RTE_FLOW_ITEM_TYPE_END,
5530         };
5531         struct rte_flow_action_jump jump = {
5532                 .group = 1,
5533         };
5534         const struct rte_flow_action actions[] = {
5535                 {
5536                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5537                         .conf = &jump,
5538                 },
5539                 {
5540                         .type = RTE_FLOW_ACTION_TYPE_END,
5541                 },
5542         };
5543         struct mlx5_priv *priv = dev->data->dev_private;
5544         struct rte_flow_error error;
5545
5546         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5547                                                    &attr, &pattern,
5548                                                    actions, false, &error);
5549 }
5550
5551 /**
5552  * Validate a flow supported by the NIC.
5553  *
5554  * @see rte_flow_validate()
5555  * @see rte_flow_ops
5556  */
5557 int
5558 mlx5_flow_validate(struct rte_eth_dev *dev,
5559                    const struct rte_flow_attr *attr,
5560                    const struct rte_flow_item items[],
5561                    const struct rte_flow_action original_actions[],
5562                    struct rte_flow_error *error)
5563 {
5564         int hairpin_flow;
5565         struct mlx5_translated_shared_action
5566                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5567         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5568         const struct rte_flow_action *actions;
5569         struct rte_flow_action *translated_actions = NULL;
5570         int ret = flow_shared_actions_translate(dev, original_actions,
5571                                                 shared_actions,
5572                                                 &shared_actions_n,
5573                                                 &translated_actions, error);
5574
5575         if (ret)
5576                 return ret;
5577         actions = translated_actions ? translated_actions : original_actions;
5578         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5579         ret = flow_drv_validate(dev, attr, items, actions,
5580                                 true, hairpin_flow, error);
5581         rte_free(translated_actions);
5582         return ret;
5583 }
5584
5585 /**
5586  * Create a flow.
5587  *
5588  * @see rte_flow_create()
5589  * @see rte_flow_ops
5590  */
5591 struct rte_flow *
5592 mlx5_flow_create(struct rte_eth_dev *dev,
5593                  const struct rte_flow_attr *attr,
5594                  const struct rte_flow_item items[],
5595                  const struct rte_flow_action actions[],
5596                  struct rte_flow_error *error)
5597 {
5598         struct mlx5_priv *priv = dev->data->dev_private;
5599
5600         /*
5601          * If the device is not started yet, it is not allowed to created a
5602          * flow from application. PMD default flows and traffic control flows
5603          * are not affected.
5604          */
5605         if (unlikely(!dev->data->dev_started)) {
5606                 DRV_LOG(DEBUG, "port %u is not started when "
5607                         "inserting a flow", dev->data->port_id);
5608                 rte_flow_error_set(error, ENODEV,
5609                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5610                                    NULL,
5611                                    "port not started");
5612                 return NULL;
5613         }
5614
5615         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5616                                   attr, items, actions, true, error);
5617 }
5618
5619 /**
5620  * Destroy a flow in a list.
5621  *
5622  * @param dev
5623  *   Pointer to Ethernet device.
5624  * @param list
5625  *   Pointer to the Indexed flow list. If this parameter NULL,
5626  *   there is no flow removal from the list. Be noted that as
5627  *   flow is add to the indexed list, memory of the indexed
5628  *   list points to maybe changed as flow destroyed.
5629  * @param[in] flow_idx
5630  *   Index of flow to destroy.
5631  */
5632 static void
5633 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5634                   uint32_t flow_idx)
5635 {
5636         struct mlx5_priv *priv = dev->data->dev_private;
5637         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5638                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5639
5640         if (!flow)
5641                 return;
5642         /*
5643          * Update RX queue flags only if port is started, otherwise it is
5644          * already clean.
5645          */
5646         if (dev->data->dev_started)
5647                 flow_rxq_flags_trim(dev, flow);
5648         flow_drv_destroy(dev, flow);
5649         if (list) {
5650                 rte_spinlock_lock(&priv->flow_list_lock);
5651                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5652                              flow_idx, flow, next);
5653                 rte_spinlock_unlock(&priv->flow_list_lock);
5654         }
5655         if (flow->tunnel) {
5656                 struct mlx5_flow_tunnel *tunnel;
5657
5658                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5659                 RTE_VERIFY(tunnel);
5660                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5661                         mlx5_flow_tunnel_free(dev, tunnel);
5662         }
5663         flow_mreg_del_copy_action(dev, flow);
5664         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5665 }
5666
5667 /**
5668  * Destroy all flows.
5669  *
5670  * @param dev
5671  *   Pointer to Ethernet device.
5672  * @param list
5673  *   Pointer to the Indexed flow list.
5674  * @param active
5675  *   If flushing is called avtively.
5676  */
5677 void
5678 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5679 {
5680         uint32_t num_flushed = 0;
5681
5682         while (*list) {
5683                 flow_list_destroy(dev, list, *list);
5684                 num_flushed++;
5685         }
5686         if (active) {
5687                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5688                         dev->data->port_id, num_flushed);
5689         }
5690 }
5691
5692 /**
5693  * Stop all default actions for flows.
5694  *
5695  * @param dev
5696  *   Pointer to Ethernet device.
5697  */
5698 void
5699 mlx5_flow_stop_default(struct rte_eth_dev *dev)
5700 {
5701         flow_mreg_del_default_copy_action(dev);
5702         flow_rxq_flags_clear(dev);
5703 }
5704
5705 /**
5706  * Start all default actions for flows.
5707  *
5708  * @param dev
5709  *   Pointer to Ethernet device.
5710  * @return
5711  *   0 on success, a negative errno value otherwise and rte_errno is set.
5712  */
5713 int
5714 mlx5_flow_start_default(struct rte_eth_dev *dev)
5715 {
5716         struct rte_flow_error error;
5717
5718         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
5719         return flow_mreg_add_default_copy_action(dev, &error);
5720 }
5721
5722 /**
5723  * Release key of thread specific flow workspace data.
5724  */
5725 static void
5726 flow_release_workspace(void *data)
5727 {
5728         struct mlx5_flow_workspace *wks = data;
5729         struct mlx5_flow_workspace *next;
5730
5731         while (wks) {
5732                 next = wks->next;
5733                 free(wks->rss_desc.queue);
5734                 free(wks);
5735                 wks = next;
5736         }
5737 }
5738
5739 /**
5740  * Initialize key of thread specific flow workspace data.
5741  */
5742 static void
5743 flow_alloc_workspace(void)
5744 {
5745         if (pthread_key_create(&key_workspace, flow_release_workspace))
5746                 DRV_LOG(ERR, "Can't create flow workspace data thread key.");
5747 }
5748
5749 /**
5750  * Get thread specific current flow workspace.
5751  *
5752  * @return pointer to thread specific flow workspace data, NULL on error.
5753  */
5754 struct mlx5_flow_workspace*
5755 mlx5_flow_get_thread_workspace(void)
5756 {
5757         struct mlx5_flow_workspace *data;
5758
5759         data = pthread_getspecific(key_workspace);
5760         MLX5_ASSERT(data && data->inuse);
5761         if (!data || !data->inuse)
5762                 DRV_LOG(ERR, "flow workspace not initialized.");
5763         return data;
5764 }
5765
5766 /**
5767  * Allocate and init new flow workspace.
5768  *
5769  * @return pointer to flow workspace data, NULL on error.
5770  */
5771 static struct mlx5_flow_workspace*
5772 flow_alloc_thread_workspace(void)
5773 {
5774         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
5775
5776         if (!data) {
5777                 DRV_LOG(ERR, "Failed to allocate flow workspace "
5778                         "memory.");
5779                 return NULL;
5780         }
5781         data->rss_desc.queue = calloc(1,
5782                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
5783         if (!data->rss_desc.queue)
5784                 goto err;
5785         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
5786         return data;
5787 err:
5788         if (data->rss_desc.queue)
5789                 free(data->rss_desc.queue);
5790         free(data);
5791         return NULL;
5792 }
5793
5794 /**
5795  * Get new thread specific flow workspace.
5796  *
5797  * If current workspace inuse, create new one and set as current.
5798  *
5799  * @return pointer to thread specific flow workspace data, NULL on error.
5800  */
5801 static struct mlx5_flow_workspace*
5802 mlx5_flow_push_thread_workspace(void)
5803 {
5804         struct mlx5_flow_workspace *curr;
5805         struct mlx5_flow_workspace *data;
5806
5807         if (pthread_once(&key_workspace_init, flow_alloc_workspace)) {
5808                 DRV_LOG(ERR, "Failed to init flow workspace data thread key.");
5809                 return NULL;
5810         }
5811         curr = pthread_getspecific(key_workspace);
5812         if (!curr) {
5813                 data = flow_alloc_thread_workspace();
5814                 if (!data)
5815                         return NULL;
5816         } else if (!curr->inuse) {
5817                 data = curr;
5818         } else if (curr->next) {
5819                 data = curr->next;
5820         } else {
5821                 data = flow_alloc_thread_workspace();
5822                 if (!data)
5823                         return NULL;
5824                 curr->next = data;
5825                 data->prev = curr;
5826         }
5827         data->inuse = 1;
5828         data->flow_idx = 0;
5829         /* Set as current workspace */
5830         if (pthread_setspecific(key_workspace, data))
5831                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
5832         return data;
5833 }
5834
5835 /**
5836  * Close current thread specific flow workspace.
5837  *
5838  * If previous workspace available, set it as current.
5839  *
5840  * @return pointer to thread specific flow workspace data, NULL on error.
5841  */
5842 static void
5843 mlx5_flow_pop_thread_workspace(void)
5844 {
5845         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
5846
5847         if (!data)
5848                 return;
5849         if (!data->inuse) {
5850                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
5851                 return;
5852         }
5853         data->inuse = 0;
5854         if (!data->prev)
5855                 return;
5856         if (pthread_setspecific(key_workspace, data->prev))
5857                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
5858 }
5859
5860 /**
5861  * Verify the flow list is empty
5862  *
5863  * @param dev
5864  *  Pointer to Ethernet device.
5865  *
5866  * @return the number of flows not released.
5867  */
5868 int
5869 mlx5_flow_verify(struct rte_eth_dev *dev)
5870 {
5871         struct mlx5_priv *priv = dev->data->dev_private;
5872         struct rte_flow *flow;
5873         uint32_t idx;
5874         int ret = 0;
5875
5876         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
5877                       flow, next) {
5878                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
5879                         dev->data->port_id, (void *)flow);
5880                 ++ret;
5881         }
5882         return ret;
5883 }
5884
5885 /**
5886  * Enable default hairpin egress flow.
5887  *
5888  * @param dev
5889  *   Pointer to Ethernet device.
5890  * @param queue
5891  *   The queue index.
5892  *
5893  * @return
5894  *   0 on success, a negative errno value otherwise and rte_errno is set.
5895  */
5896 int
5897 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
5898                             uint32_t queue)
5899 {
5900         struct mlx5_priv *priv = dev->data->dev_private;
5901         const struct rte_flow_attr attr = {
5902                 .egress = 1,
5903                 .priority = 0,
5904         };
5905         struct mlx5_rte_flow_item_tx_queue queue_spec = {
5906                 .queue = queue,
5907         };
5908         struct mlx5_rte_flow_item_tx_queue queue_mask = {
5909                 .queue = UINT32_MAX,
5910         };
5911         struct rte_flow_item items[] = {
5912                 {
5913                         .type = (enum rte_flow_item_type)
5914                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
5915                         .spec = &queue_spec,
5916                         .last = NULL,
5917                         .mask = &queue_mask,
5918                 },
5919                 {
5920                         .type = RTE_FLOW_ITEM_TYPE_END,
5921                 },
5922         };
5923         struct rte_flow_action_jump jump = {
5924                 .group = MLX5_HAIRPIN_TX_TABLE,
5925         };
5926         struct rte_flow_action actions[2];
5927         uint32_t flow_idx;
5928         struct rte_flow_error error;
5929
5930         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
5931         actions[0].conf = &jump;
5932         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
5933         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
5934                                 &attr, items, actions, false, &error);
5935         if (!flow_idx) {
5936                 DRV_LOG(DEBUG,
5937                         "Failed to create ctrl flow: rte_errno(%d),"
5938                         " type(%d), message(%s)",
5939                         rte_errno, error.type,
5940                         error.message ? error.message : " (no stated reason)");
5941                 return -rte_errno;
5942         }
5943         return 0;
5944 }
5945
5946 /**
5947  * Enable a control flow configured from the control plane.
5948  *
5949  * @param dev
5950  *   Pointer to Ethernet device.
5951  * @param eth_spec
5952  *   An Ethernet flow spec to apply.
5953  * @param eth_mask
5954  *   An Ethernet flow mask to apply.
5955  * @param vlan_spec
5956  *   A VLAN flow spec to apply.
5957  * @param vlan_mask
5958  *   A VLAN flow mask to apply.
5959  *
5960  * @return
5961  *   0 on success, a negative errno value otherwise and rte_errno is set.
5962  */
5963 int
5964 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
5965                     struct rte_flow_item_eth *eth_spec,
5966                     struct rte_flow_item_eth *eth_mask,
5967                     struct rte_flow_item_vlan *vlan_spec,
5968                     struct rte_flow_item_vlan *vlan_mask)
5969 {
5970         struct mlx5_priv *priv = dev->data->dev_private;
5971         const struct rte_flow_attr attr = {
5972                 .ingress = 1,
5973                 .priority = MLX5_FLOW_PRIO_RSVD,
5974         };
5975         struct rte_flow_item items[] = {
5976                 {
5977                         .type = RTE_FLOW_ITEM_TYPE_ETH,
5978                         .spec = eth_spec,
5979                         .last = NULL,
5980                         .mask = eth_mask,
5981                 },
5982                 {
5983                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
5984                                               RTE_FLOW_ITEM_TYPE_END,
5985                         .spec = vlan_spec,
5986                         .last = NULL,
5987                         .mask = vlan_mask,
5988                 },
5989                 {
5990                         .type = RTE_FLOW_ITEM_TYPE_END,
5991                 },
5992         };
5993         uint16_t queue[priv->reta_idx_n];
5994         struct rte_flow_action_rss action_rss = {
5995                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
5996                 .level = 0,
5997                 .types = priv->rss_conf.rss_hf,
5998                 .key_len = priv->rss_conf.rss_key_len,
5999                 .queue_num = priv->reta_idx_n,
6000                 .key = priv->rss_conf.rss_key,
6001                 .queue = queue,
6002         };
6003         struct rte_flow_action actions[] = {
6004                 {
6005                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6006                         .conf = &action_rss,
6007                 },
6008                 {
6009                         .type = RTE_FLOW_ACTION_TYPE_END,
6010                 },
6011         };
6012         uint32_t flow_idx;
6013         struct rte_flow_error error;
6014         unsigned int i;
6015
6016         if (!priv->reta_idx_n || !priv->rxqs_n) {
6017                 return 0;
6018         }
6019         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6020                 action_rss.types = 0;
6021         for (i = 0; i != priv->reta_idx_n; ++i)
6022                 queue[i] = (*priv->reta_idx)[i];
6023         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6024                                 &attr, items, actions, false, &error);
6025         if (!flow_idx)
6026                 return -rte_errno;
6027         return 0;
6028 }
6029
6030 /**
6031  * Enable a flow control configured from the control plane.
6032  *
6033  * @param dev
6034  *   Pointer to Ethernet device.
6035  * @param eth_spec
6036  *   An Ethernet flow spec to apply.
6037  * @param eth_mask
6038  *   An Ethernet flow mask to apply.
6039  *
6040  * @return
6041  *   0 on success, a negative errno value otherwise and rte_errno is set.
6042  */
6043 int
6044 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6045                struct rte_flow_item_eth *eth_spec,
6046                struct rte_flow_item_eth *eth_mask)
6047 {
6048         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6049 }
6050
6051 /**
6052  * Create default miss flow rule matching lacp traffic
6053  *
6054  * @param dev
6055  *   Pointer to Ethernet device.
6056  * @param eth_spec
6057  *   An Ethernet flow spec to apply.
6058  *
6059  * @return
6060  *   0 on success, a negative errno value otherwise and rte_errno is set.
6061  */
6062 int
6063 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6064 {
6065         struct mlx5_priv *priv = dev->data->dev_private;
6066         /*
6067          * The LACP matching is done by only using ether type since using
6068          * a multicast dst mac causes kernel to give low priority to this flow.
6069          */
6070         static const struct rte_flow_item_eth lacp_spec = {
6071                 .type = RTE_BE16(0x8809),
6072         };
6073         static const struct rte_flow_item_eth lacp_mask = {
6074                 .type = 0xffff,
6075         };
6076         const struct rte_flow_attr attr = {
6077                 .ingress = 1,
6078         };
6079         struct rte_flow_item items[] = {
6080                 {
6081                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6082                         .spec = &lacp_spec,
6083                         .mask = &lacp_mask,
6084                 },
6085                 {
6086                         .type = RTE_FLOW_ITEM_TYPE_END,
6087                 },
6088         };
6089         struct rte_flow_action actions[] = {
6090                 {
6091                         .type = (enum rte_flow_action_type)
6092                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6093                 },
6094                 {
6095                         .type = RTE_FLOW_ACTION_TYPE_END,
6096                 },
6097         };
6098         struct rte_flow_error error;
6099         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6100                                 &attr, items, actions, false, &error);
6101
6102         if (!flow_idx)
6103                 return -rte_errno;
6104         return 0;
6105 }
6106
6107 /**
6108  * Destroy a flow.
6109  *
6110  * @see rte_flow_destroy()
6111  * @see rte_flow_ops
6112  */
6113 int
6114 mlx5_flow_destroy(struct rte_eth_dev *dev,
6115                   struct rte_flow *flow,
6116                   struct rte_flow_error *error __rte_unused)
6117 {
6118         struct mlx5_priv *priv = dev->data->dev_private;
6119
6120         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6121         return 0;
6122 }
6123
6124 /**
6125  * Destroy all flows.
6126  *
6127  * @see rte_flow_flush()
6128  * @see rte_flow_ops
6129  */
6130 int
6131 mlx5_flow_flush(struct rte_eth_dev *dev,
6132                 struct rte_flow_error *error __rte_unused)
6133 {
6134         struct mlx5_priv *priv = dev->data->dev_private;
6135
6136         mlx5_flow_list_flush(dev, &priv->flows, false);
6137         return 0;
6138 }
6139
6140 /**
6141  * Isolated mode.
6142  *
6143  * @see rte_flow_isolate()
6144  * @see rte_flow_ops
6145  */
6146 int
6147 mlx5_flow_isolate(struct rte_eth_dev *dev,
6148                   int enable,
6149                   struct rte_flow_error *error)
6150 {
6151         struct mlx5_priv *priv = dev->data->dev_private;
6152
6153         if (dev->data->dev_started) {
6154                 rte_flow_error_set(error, EBUSY,
6155                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6156                                    NULL,
6157                                    "port must be stopped first");
6158                 return -rte_errno;
6159         }
6160         priv->isolated = !!enable;
6161         if (enable)
6162                 dev->dev_ops = &mlx5_dev_ops_isolate;
6163         else
6164                 dev->dev_ops = &mlx5_dev_ops;
6165
6166         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6167         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6168
6169         return 0;
6170 }
6171
6172 /**
6173  * Query a flow.
6174  *
6175  * @see rte_flow_query()
6176  * @see rte_flow_ops
6177  */
6178 static int
6179 flow_drv_query(struct rte_eth_dev *dev,
6180                uint32_t flow_idx,
6181                const struct rte_flow_action *actions,
6182                void *data,
6183                struct rte_flow_error *error)
6184 {
6185         struct mlx5_priv *priv = dev->data->dev_private;
6186         const struct mlx5_flow_driver_ops *fops;
6187         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6188                                                [MLX5_IPOOL_RTE_FLOW],
6189                                                flow_idx);
6190         enum mlx5_flow_drv_type ftype;
6191
6192         if (!flow) {
6193                 return rte_flow_error_set(error, ENOENT,
6194                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6195                           NULL,
6196                           "invalid flow handle");
6197         }
6198         ftype = flow->drv_type;
6199         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6200         fops = flow_get_drv_ops(ftype);
6201
6202         return fops->query(dev, flow, actions, data, error);
6203 }
6204
6205 /**
6206  * Query a flow.
6207  *
6208  * @see rte_flow_query()
6209  * @see rte_flow_ops
6210  */
6211 int
6212 mlx5_flow_query(struct rte_eth_dev *dev,
6213                 struct rte_flow *flow,
6214                 const struct rte_flow_action *actions,
6215                 void *data,
6216                 struct rte_flow_error *error)
6217 {
6218         int ret;
6219
6220         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6221                              error);
6222         if (ret < 0)
6223                 return ret;
6224         return 0;
6225 }
6226
6227 /**
6228  * Manage filter operations.
6229  *
6230  * @param dev
6231  *   Pointer to Ethernet device structure.
6232  * @param filter_type
6233  *   Filter type.
6234  * @param filter_op
6235  *   Operation to perform.
6236  * @param arg
6237  *   Pointer to operation-specific structure.
6238  *
6239  * @return
6240  *   0 on success, a negative errno value otherwise and rte_errno is set.
6241  */
6242 int
6243 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
6244                      enum rte_filter_type filter_type,
6245                      enum rte_filter_op filter_op,
6246                      void *arg)
6247 {
6248         switch (filter_type) {
6249         case RTE_ETH_FILTER_GENERIC:
6250                 if (filter_op != RTE_ETH_FILTER_GET) {
6251                         rte_errno = EINVAL;
6252                         return -rte_errno;
6253                 }
6254                 *(const void **)arg = &mlx5_flow_ops;
6255                 return 0;
6256         default:
6257                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
6258                         dev->data->port_id, filter_type);
6259                 rte_errno = ENOTSUP;
6260                 return -rte_errno;
6261         }
6262         return 0;
6263 }
6264
6265 /**
6266  * Create the needed meter and suffix tables.
6267  *
6268  * @param[in] dev
6269  *   Pointer to Ethernet device.
6270  * @param[in] fm
6271  *   Pointer to the flow meter.
6272  *
6273  * @return
6274  *   Pointer to table set on success, NULL otherwise.
6275  */
6276 struct mlx5_meter_domains_infos *
6277 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
6278                           const struct mlx5_flow_meter *fm)
6279 {
6280         const struct mlx5_flow_driver_ops *fops;
6281
6282         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6283         return fops->create_mtr_tbls(dev, fm);
6284 }
6285
6286 /**
6287  * Destroy the meter table set.
6288  *
6289  * @param[in] dev
6290  *   Pointer to Ethernet device.
6291  * @param[in] tbl
6292  *   Pointer to the meter table set.
6293  *
6294  * @return
6295  *   0 on success.
6296  */
6297 int
6298 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
6299                            struct mlx5_meter_domains_infos *tbls)
6300 {
6301         const struct mlx5_flow_driver_ops *fops;
6302
6303         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6304         return fops->destroy_mtr_tbls(dev, tbls);
6305 }
6306
6307 /**
6308  * Create policer rules.
6309  *
6310  * @param[in] dev
6311  *   Pointer to Ethernet device.
6312  * @param[in] fm
6313  *   Pointer to flow meter structure.
6314  * @param[in] attr
6315  *   Pointer to flow attributes.
6316  *
6317  * @return
6318  *   0 on success, -1 otherwise.
6319  */
6320 int
6321 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
6322                                struct mlx5_flow_meter *fm,
6323                                const struct rte_flow_attr *attr)
6324 {
6325         const struct mlx5_flow_driver_ops *fops;
6326
6327         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6328         return fops->create_policer_rules(dev, fm, attr);
6329 }
6330
6331 /**
6332  * Destroy policer rules.
6333  *
6334  * @param[in] fm
6335  *   Pointer to flow meter structure.
6336  * @param[in] attr
6337  *   Pointer to flow attributes.
6338  *
6339  * @return
6340  *   0 on success, -1 otherwise.
6341  */
6342 int
6343 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
6344                                 struct mlx5_flow_meter *fm,
6345                                 const struct rte_flow_attr *attr)
6346 {
6347         const struct mlx5_flow_driver_ops *fops;
6348
6349         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6350         return fops->destroy_policer_rules(dev, fm, attr);
6351 }
6352
6353 /**
6354  * Allocate a counter.
6355  *
6356  * @param[in] dev
6357  *   Pointer to Ethernet device structure.
6358  *
6359  * @return
6360  *   Index to allocated counter  on success, 0 otherwise.
6361  */
6362 uint32_t
6363 mlx5_counter_alloc(struct rte_eth_dev *dev)
6364 {
6365         const struct mlx5_flow_driver_ops *fops;
6366         struct rte_flow_attr attr = { .transfer = 0 };
6367
6368         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6369                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6370                 return fops->counter_alloc(dev);
6371         }
6372         DRV_LOG(ERR,
6373                 "port %u counter allocate is not supported.",
6374                  dev->data->port_id);
6375         return 0;
6376 }
6377
6378 /**
6379  * Free a counter.
6380  *
6381  * @param[in] dev
6382  *   Pointer to Ethernet device structure.
6383  * @param[in] cnt
6384  *   Index to counter to be free.
6385  */
6386 void
6387 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
6388 {
6389         const struct mlx5_flow_driver_ops *fops;
6390         struct rte_flow_attr attr = { .transfer = 0 };
6391
6392         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6393                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6394                 fops->counter_free(dev, cnt);
6395                 return;
6396         }
6397         DRV_LOG(ERR,
6398                 "port %u counter free is not supported.",
6399                  dev->data->port_id);
6400 }
6401
6402 /**
6403  * Query counter statistics.
6404  *
6405  * @param[in] dev
6406  *   Pointer to Ethernet device structure.
6407  * @param[in] cnt
6408  *   Index to counter to query.
6409  * @param[in] clear
6410  *   Set to clear counter statistics.
6411  * @param[out] pkts
6412  *   The counter hits packets number to save.
6413  * @param[out] bytes
6414  *   The counter hits bytes number to save.
6415  *
6416  * @return
6417  *   0 on success, a negative errno value otherwise.
6418  */
6419 int
6420 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
6421                    bool clear, uint64_t *pkts, uint64_t *bytes)
6422 {
6423         const struct mlx5_flow_driver_ops *fops;
6424         struct rte_flow_attr attr = { .transfer = 0 };
6425
6426         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6427                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6428                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
6429         }
6430         DRV_LOG(ERR,
6431                 "port %u counter query is not supported.",
6432                  dev->data->port_id);
6433         return -ENOTSUP;
6434 }
6435
6436 /**
6437  * Allocate a new memory for the counter values wrapped by all the needed
6438  * management.
6439  *
6440  * @param[in] sh
6441  *   Pointer to mlx5_dev_ctx_shared object.
6442  *
6443  * @return
6444  *   0 on success, a negative errno value otherwise.
6445  */
6446 static int
6447 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
6448 {
6449         struct mlx5_devx_mkey_attr mkey_attr;
6450         struct mlx5_counter_stats_mem_mng *mem_mng;
6451         volatile struct flow_counter_stats *raw_data;
6452         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
6453         int size = (sizeof(struct flow_counter_stats) *
6454                         MLX5_COUNTERS_PER_POOL +
6455                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
6456                         sizeof(struct mlx5_counter_stats_mem_mng);
6457         size_t pgsize = rte_mem_page_size();
6458         uint8_t *mem;
6459         int i;
6460
6461         if (pgsize == (size_t)-1) {
6462                 DRV_LOG(ERR, "Failed to get mem page size");
6463                 rte_errno = ENOMEM;
6464                 return -ENOMEM;
6465         }
6466         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
6467         if (!mem) {
6468                 rte_errno = ENOMEM;
6469                 return -ENOMEM;
6470         }
6471         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
6472         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
6473         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
6474                                                  IBV_ACCESS_LOCAL_WRITE);
6475         if (!mem_mng->umem) {
6476                 rte_errno = errno;
6477                 mlx5_free(mem);
6478                 return -rte_errno;
6479         }
6480         mkey_attr.addr = (uintptr_t)mem;
6481         mkey_attr.size = size;
6482         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
6483         mkey_attr.pd = sh->pdn;
6484         mkey_attr.log_entity_size = 0;
6485         mkey_attr.pg_access = 0;
6486         mkey_attr.klm_array = NULL;
6487         mkey_attr.klm_num = 0;
6488         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
6489         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
6490         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
6491         if (!mem_mng->dm) {
6492                 mlx5_os_umem_dereg(mem_mng->umem);
6493                 rte_errno = errno;
6494                 mlx5_free(mem);
6495                 return -rte_errno;
6496         }
6497         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
6498         raw_data = (volatile struct flow_counter_stats *)mem;
6499         for (i = 0; i < raws_n; ++i) {
6500                 mem_mng->raws[i].mem_mng = mem_mng;
6501                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
6502         }
6503         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
6504                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
6505                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
6506                                  next);
6507         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
6508         sh->cmng.mem_mng = mem_mng;
6509         return 0;
6510 }
6511
6512 /**
6513  * Set the statistic memory to the new counter pool.
6514  *
6515  * @param[in] sh
6516  *   Pointer to mlx5_dev_ctx_shared object.
6517  * @param[in] pool
6518  *   Pointer to the pool to set the statistic memory.
6519  *
6520  * @return
6521  *   0 on success, a negative errno value otherwise.
6522  */
6523 static int
6524 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
6525                                struct mlx5_flow_counter_pool *pool)
6526 {
6527         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6528         /* Resize statistic memory once used out. */
6529         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
6530             mlx5_flow_create_counter_stat_mem_mng(sh)) {
6531                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
6532                 return -1;
6533         }
6534         rte_spinlock_lock(&pool->sl);
6535         pool->raw = cmng->mem_mng->raws + pool->index %
6536                     MLX5_CNT_CONTAINER_RESIZE;
6537         rte_spinlock_unlock(&pool->sl);
6538         pool->raw_hw = NULL;
6539         return 0;
6540 }
6541
6542 #define MLX5_POOL_QUERY_FREQ_US 1000000
6543
6544 /**
6545  * Set the periodic procedure for triggering asynchronous batch queries for all
6546  * the counter pools.
6547  *
6548  * @param[in] sh
6549  *   Pointer to mlx5_dev_ctx_shared object.
6550  */
6551 void
6552 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
6553 {
6554         uint32_t pools_n, us;
6555
6556         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
6557         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
6558         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
6559         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
6560                 sh->cmng.query_thread_on = 0;
6561                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
6562         } else {
6563                 sh->cmng.query_thread_on = 1;
6564         }
6565 }
6566
6567 /**
6568  * The periodic procedure for triggering asynchronous batch queries for all the
6569  * counter pools. This function is probably called by the host thread.
6570  *
6571  * @param[in] arg
6572  *   The parameter for the alarm process.
6573  */
6574 void
6575 mlx5_flow_query_alarm(void *arg)
6576 {
6577         struct mlx5_dev_ctx_shared *sh = arg;
6578         int ret;
6579         uint16_t pool_index = sh->cmng.pool_index;
6580         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6581         struct mlx5_flow_counter_pool *pool;
6582         uint16_t n_valid;
6583
6584         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
6585                 goto set_alarm;
6586         rte_spinlock_lock(&cmng->pool_update_sl);
6587         pool = cmng->pools[pool_index];
6588         n_valid = cmng->n_valid;
6589         rte_spinlock_unlock(&cmng->pool_update_sl);
6590         /* Set the statistic memory to the new created pool. */
6591         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
6592                 goto set_alarm;
6593         if (pool->raw_hw)
6594                 /* There is a pool query in progress. */
6595                 goto set_alarm;
6596         pool->raw_hw =
6597                 LIST_FIRST(&sh->cmng.free_stat_raws);
6598         if (!pool->raw_hw)
6599                 /* No free counter statistics raw memory. */
6600                 goto set_alarm;
6601         /*
6602          * Identify the counters released between query trigger and query
6603          * handle more efficiently. The counter released in this gap period
6604          * should wait for a new round of query as the new arrived packets
6605          * will not be taken into account.
6606          */
6607         pool->query_gen++;
6608         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
6609                                                MLX5_COUNTERS_PER_POOL,
6610                                                NULL, NULL,
6611                                                pool->raw_hw->mem_mng->dm->id,
6612                                                (void *)(uintptr_t)
6613                                                pool->raw_hw->data,
6614                                                sh->devx_comp,
6615                                                (uint64_t)(uintptr_t)pool);
6616         if (ret) {
6617                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
6618                         " %d", pool->min_dcs->id);
6619                 pool->raw_hw = NULL;
6620                 goto set_alarm;
6621         }
6622         LIST_REMOVE(pool->raw_hw, next);
6623         sh->cmng.pending_queries++;
6624         pool_index++;
6625         if (pool_index >= n_valid)
6626                 pool_index = 0;
6627 set_alarm:
6628         sh->cmng.pool_index = pool_index;
6629         mlx5_set_query_alarm(sh);
6630 }
6631
6632 /**
6633  * Check and callback event for new aged flow in the counter pool
6634  *
6635  * @param[in] sh
6636  *   Pointer to mlx5_dev_ctx_shared object.
6637  * @param[in] pool
6638  *   Pointer to Current counter pool.
6639  */
6640 static void
6641 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
6642                    struct mlx5_flow_counter_pool *pool)
6643 {
6644         struct mlx5_priv *priv;
6645         struct mlx5_flow_counter *cnt;
6646         struct mlx5_age_info *age_info;
6647         struct mlx5_age_param *age_param;
6648         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
6649         struct mlx5_counter_stats_raw *prev = pool->raw;
6650         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
6651         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
6652         uint16_t expected = AGE_CANDIDATE;
6653         uint32_t i;
6654
6655         pool->time_of_last_age_check = curr_time;
6656         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
6657                 cnt = MLX5_POOL_GET_CNT(pool, i);
6658                 age_param = MLX5_CNT_TO_AGE(cnt);
6659                 if (__atomic_load_n(&age_param->state,
6660                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
6661                         continue;
6662                 if (cur->data[i].hits != prev->data[i].hits) {
6663                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
6664                                          __ATOMIC_RELAXED);
6665                         continue;
6666                 }
6667                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
6668                                        time_delta,
6669                                        __ATOMIC_RELAXED) <= age_param->timeout)
6670                         continue;
6671                 /**
6672                  * Hold the lock first, or if between the
6673                  * state AGE_TMOUT and tailq operation the
6674                  * release happened, the release procedure
6675                  * may delete a non-existent tailq node.
6676                  */
6677                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
6678                 age_info = GET_PORT_AGE_INFO(priv);
6679                 rte_spinlock_lock(&age_info->aged_sl);
6680                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
6681                                                 AGE_TMOUT, false,
6682                                                 __ATOMIC_RELAXED,
6683                                                 __ATOMIC_RELAXED)) {
6684                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
6685                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
6686                 }
6687                 rte_spinlock_unlock(&age_info->aged_sl);
6688         }
6689         mlx5_age_event_prepare(sh);
6690 }
6691
6692 /**
6693  * Handler for the HW respond about ready values from an asynchronous batch
6694  * query. This function is probably called by the host thread.
6695  *
6696  * @param[in] sh
6697  *   The pointer to the shared device context.
6698  * @param[in] async_id
6699  *   The Devx async ID.
6700  * @param[in] status
6701  *   The status of the completion.
6702  */
6703 void
6704 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6705                                   uint64_t async_id, int status)
6706 {
6707         struct mlx5_flow_counter_pool *pool =
6708                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6709         struct mlx5_counter_stats_raw *raw_to_free;
6710         uint8_t query_gen = pool->query_gen ^ 1;
6711         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6712         enum mlx5_counter_type cnt_type =
6713                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6714                                 MLX5_COUNTER_TYPE_ORIGIN;
6715
6716         if (unlikely(status)) {
6717                 raw_to_free = pool->raw_hw;
6718         } else {
6719                 raw_to_free = pool->raw;
6720                 if (pool->is_aged)
6721                         mlx5_flow_aging_check(sh, pool);
6722                 rte_spinlock_lock(&pool->sl);
6723                 pool->raw = pool->raw_hw;
6724                 rte_spinlock_unlock(&pool->sl);
6725                 /* Be sure the new raw counters data is updated in memory. */
6726                 rte_io_wmb();
6727                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
6728                         rte_spinlock_lock(&cmng->csl[cnt_type]);
6729                         TAILQ_CONCAT(&cmng->counters[cnt_type],
6730                                      &pool->counters[query_gen], next);
6731                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6732                 }
6733         }
6734         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6735         pool->raw_hw = NULL;
6736         sh->cmng.pending_queries--;
6737 }
6738
6739 static int
6740 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
6741                     const struct flow_grp_info *grp_info,
6742                     struct rte_flow_error *error)
6743 {
6744         if (grp_info->transfer && grp_info->external &&
6745             grp_info->fdb_def_rule) {
6746                 if (group == UINT32_MAX)
6747                         return rte_flow_error_set
6748                                                 (error, EINVAL,
6749                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6750                                                  NULL,
6751                                                  "group index not supported");
6752                 *table = group + 1;
6753         } else {
6754                 *table = group;
6755         }
6756         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
6757         return 0;
6758 }
6759
6760 /**
6761  * Translate the rte_flow group index to HW table value.
6762  *
6763  * If tunnel offload is disabled, all group ids converted to flow table
6764  * id using the standard method.
6765  * If tunnel offload is enabled, group id can be converted using the
6766  * standard or tunnel conversion method. Group conversion method
6767  * selection depends on flags in `grp_info` parameter:
6768  * - Internal (grp_info.external == 0) groups conversion uses the
6769  *   standard method.
6770  * - Group ids in JUMP action converted with the tunnel conversion.
6771  * - Group id in rule attribute conversion depends on a rule type and
6772  *   group id value:
6773  *   ** non zero group attributes converted with the tunnel method
6774  *   ** zero group attribute in non-tunnel rule is converted using the
6775  *      standard method - there's only one root table
6776  *   ** zero group attribute in steer tunnel rule is converted with the
6777  *      standard method - single root table
6778  *   ** zero group attribute in match tunnel rule is a special OvS
6779  *      case: that value is used for portability reasons. That group
6780  *      id is converted with the tunnel conversion method.
6781  *
6782  * @param[in] dev
6783  *   Port device
6784  * @param[in] tunnel
6785  *   PMD tunnel offload object
6786  * @param[in] group
6787  *   rte_flow group index value.
6788  * @param[out] table
6789  *   HW table value.
6790  * @param[in] grp_info
6791  *   flags used for conversion
6792  * @param[out] error
6793  *   Pointer to error structure.
6794  *
6795  * @return
6796  *   0 on success, a negative errno value otherwise and rte_errno is set.
6797  */
6798 int
6799 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
6800                          const struct mlx5_flow_tunnel *tunnel,
6801                          uint32_t group, uint32_t *table,
6802                          const struct flow_grp_info *grp_info,
6803                          struct rte_flow_error *error)
6804 {
6805         int ret;
6806         bool standard_translation;
6807
6808         if (!grp_info->skip_scale && grp_info->external &&
6809             group < MLX5_MAX_TABLES_EXTERNAL)
6810                 group *= MLX5_FLOW_TABLE_FACTOR;
6811         if (is_tunnel_offload_active(dev)) {
6812                 standard_translation = !grp_info->external ||
6813                                         grp_info->std_tbl_fix;
6814         } else {
6815                 standard_translation = true;
6816         }
6817         DRV_LOG(DEBUG,
6818                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
6819                 dev->data->port_id, group, grp_info->transfer,
6820                 grp_info->external, grp_info->fdb_def_rule,
6821                 standard_translation ? "STANDARD" : "TUNNEL");
6822         if (standard_translation)
6823                 ret = flow_group_to_table(dev->data->port_id, group, table,
6824                                           grp_info, error);
6825         else
6826                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
6827                                                       table, error);
6828
6829         return ret;
6830 }
6831
6832 /**
6833  * Discover availability of metadata reg_c's.
6834  *
6835  * Iteratively use test flows to check availability.
6836  *
6837  * @param[in] dev
6838  *   Pointer to the Ethernet device structure.
6839  *
6840  * @return
6841  *   0 on success, a negative errno value otherwise and rte_errno is set.
6842  */
6843 int
6844 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
6845 {
6846         struct mlx5_priv *priv = dev->data->dev_private;
6847         struct mlx5_dev_config *config = &priv->config;
6848         enum modify_reg idx;
6849         int n = 0;
6850
6851         /* reg_c[0] and reg_c[1] are reserved. */
6852         config->flow_mreg_c[n++] = REG_C_0;
6853         config->flow_mreg_c[n++] = REG_C_1;
6854         /* Discover availability of other reg_c's. */
6855         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
6856                 struct rte_flow_attr attr = {
6857                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
6858                         .priority = MLX5_FLOW_PRIO_RSVD,
6859                         .ingress = 1,
6860                 };
6861                 struct rte_flow_item items[] = {
6862                         [0] = {
6863                                 .type = RTE_FLOW_ITEM_TYPE_END,
6864                         },
6865                 };
6866                 struct rte_flow_action actions[] = {
6867                         [0] = {
6868                                 .type = (enum rte_flow_action_type)
6869                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
6870                                 .conf = &(struct mlx5_flow_action_copy_mreg){
6871                                         .src = REG_C_1,
6872                                         .dst = idx,
6873                                 },
6874                         },
6875                         [1] = {
6876                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6877                                 .conf = &(struct rte_flow_action_jump){
6878                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
6879                                 },
6880                         },
6881                         [2] = {
6882                                 .type = RTE_FLOW_ACTION_TYPE_END,
6883                         },
6884                 };
6885                 uint32_t flow_idx;
6886                 struct rte_flow *flow;
6887                 struct rte_flow_error error;
6888
6889                 if (!config->dv_flow_en)
6890                         break;
6891                 /* Create internal flow, validation skips copy action. */
6892                 flow_idx = flow_list_create(dev, NULL, &attr, items,
6893                                             actions, false, &error);
6894                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
6895                                       flow_idx);
6896                 if (!flow)
6897                         continue;
6898                 config->flow_mreg_c[n++] = idx;
6899                 flow_list_destroy(dev, NULL, flow_idx);
6900         }
6901         for (; n < MLX5_MREG_C_NUM; ++n)
6902                 config->flow_mreg_c[n] = REG_NON;
6903         return 0;
6904 }
6905
6906 /**
6907  * Dump flow raw hw data to file
6908  *
6909  * @param[in] dev
6910  *    The pointer to Ethernet device.
6911  * @param[in] file
6912  *   A pointer to a file for output.
6913  * @param[out] error
6914  *   Perform verbose error reporting if not NULL. PMDs initialize this
6915  *   structure in case of error only.
6916  * @return
6917  *   0 on success, a nagative value otherwise.
6918  */
6919 int
6920 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
6921                    FILE *file,
6922                    struct rte_flow_error *error __rte_unused)
6923 {
6924         struct mlx5_priv *priv = dev->data->dev_private;
6925         struct mlx5_dev_ctx_shared *sh = priv->sh;
6926
6927         if (!priv->config.dv_flow_en) {
6928                 if (fputs("device dv flow disabled\n", file) <= 0)
6929                         return -errno;
6930                 return -ENOTSUP;
6931         }
6932         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
6933                                        sh->tx_domain, file);
6934 }
6935
6936 /**
6937  * Get aged-out flows.
6938  *
6939  * @param[in] dev
6940  *   Pointer to the Ethernet device structure.
6941  * @param[in] context
6942  *   The address of an array of pointers to the aged-out flows contexts.
6943  * @param[in] nb_countexts
6944  *   The length of context array pointers.
6945  * @param[out] error
6946  *   Perform verbose error reporting if not NULL. Initialized in case of
6947  *   error only.
6948  *
6949  * @return
6950  *   how many contexts get in success, otherwise negative errno value.
6951  *   if nb_contexts is 0, return the amount of all aged contexts.
6952  *   if nb_contexts is not 0 , return the amount of aged flows reported
6953  *   in the context array.
6954  */
6955 int
6956 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
6957                         uint32_t nb_contexts, struct rte_flow_error *error)
6958 {
6959         const struct mlx5_flow_driver_ops *fops;
6960         struct rte_flow_attr attr = { .transfer = 0 };
6961
6962         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6963                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6964                 return fops->get_aged_flows(dev, contexts, nb_contexts,
6965                                                     error);
6966         }
6967         DRV_LOG(ERR,
6968                 "port %u get aged flows is not supported.",
6969                  dev->data->port_id);
6970         return -ENOTSUP;
6971 }
6972
6973 /* Wrapper for driver action_validate op callback */
6974 static int
6975 flow_drv_action_validate(struct rte_eth_dev *dev,
6976                          const struct rte_flow_shared_action_conf *conf,
6977                          const struct rte_flow_action *action,
6978                          const struct mlx5_flow_driver_ops *fops,
6979                          struct rte_flow_error *error)
6980 {
6981         static const char err_msg[] = "shared action validation unsupported";
6982
6983         if (!fops->action_validate) {
6984                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
6985                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
6986                                    NULL, err_msg);
6987                 return -rte_errno;
6988         }
6989         return fops->action_validate(dev, conf, action, error);
6990 }
6991
6992 /**
6993  * Destroys the shared action by handle.
6994  *
6995  * @param dev
6996  *   Pointer to Ethernet device structure.
6997  * @param[in] action
6998  *   Handle for the shared action to be destroyed.
6999  * @param[out] error
7000  *   Perform verbose error reporting if not NULL. PMDs initialize this
7001  *   structure in case of error only.
7002  *
7003  * @return
7004  *   0 on success, a negative errno value otherwise and rte_errno is set.
7005  *
7006  * @note: wrapper for driver action_create op callback.
7007  */
7008 static int
7009 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7010                            struct rte_flow_shared_action *action,
7011                            struct rte_flow_error *error)
7012 {
7013         static const char err_msg[] = "shared action destruction unsupported";
7014         struct rte_flow_attr attr = { .transfer = 0 };
7015         const struct mlx5_flow_driver_ops *fops =
7016                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7017
7018         if (!fops->action_destroy) {
7019                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7020                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7021                                    NULL, err_msg);
7022                 return -rte_errno;
7023         }
7024         return fops->action_destroy(dev, action, error);
7025 }
7026
7027 /* Wrapper for driver action_destroy op callback */
7028 static int
7029 flow_drv_action_update(struct rte_eth_dev *dev,
7030                        struct rte_flow_shared_action *action,
7031                        const void *action_conf,
7032                        const struct mlx5_flow_driver_ops *fops,
7033                        struct rte_flow_error *error)
7034 {
7035         static const char err_msg[] = "shared action update unsupported";
7036
7037         if (!fops->action_update) {
7038                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7039                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7040                                    NULL, err_msg);
7041                 return -rte_errno;
7042         }
7043         return fops->action_update(dev, action, action_conf, error);
7044 }
7045
7046 /* Wrapper for driver action_destroy op callback */
7047 static int
7048 flow_drv_action_query(struct rte_eth_dev *dev,
7049                       const struct rte_flow_shared_action *action,
7050                       void *data,
7051                       const struct mlx5_flow_driver_ops *fops,
7052                       struct rte_flow_error *error)
7053 {
7054         static const char err_msg[] = "shared action query unsupported";
7055
7056         if (!fops->action_query) {
7057                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7058                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7059                                    NULL, err_msg);
7060                 return -rte_errno;
7061         }
7062         return fops->action_query(dev, action, data, error);
7063 }
7064
7065 /**
7066  * Create shared action for reuse in multiple flow rules.
7067  *
7068  * @param dev
7069  *   Pointer to Ethernet device structure.
7070  * @param[in] action
7071  *   Action configuration for shared action creation.
7072  * @param[out] error
7073  *   Perform verbose error reporting if not NULL. PMDs initialize this
7074  *   structure in case of error only.
7075  * @return
7076  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7077  */
7078 static struct rte_flow_shared_action *
7079 mlx5_shared_action_create(struct rte_eth_dev *dev,
7080                           const struct rte_flow_shared_action_conf *conf,
7081                           const struct rte_flow_action *action,
7082                           struct rte_flow_error *error)
7083 {
7084         static const char err_msg[] = "shared action creation unsupported";
7085         struct rte_flow_attr attr = { .transfer = 0 };
7086         const struct mlx5_flow_driver_ops *fops =
7087                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7088
7089         if (flow_drv_action_validate(dev, conf, action, fops, error))
7090                 return NULL;
7091         if (!fops->action_create) {
7092                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7093                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7094                                    NULL, err_msg);
7095                 return NULL;
7096         }
7097         return fops->action_create(dev, conf, action, error);
7098 }
7099
7100 /**
7101  * Updates inplace the shared action configuration pointed by *action* handle
7102  * with the configuration provided as *action* argument.
7103  * The update of the shared action configuration effects all flow rules reusing
7104  * the action via handle.
7105  *
7106  * @param dev
7107  *   Pointer to Ethernet device structure.
7108  * @param[in] shared_action
7109  *   Handle for the shared action to be updated.
7110  * @param[in] action
7111  *   Action specification used to modify the action pointed by handle.
7112  *   *action* should be of same type with the action pointed by the *action*
7113  *   handle argument, otherwise considered as invalid.
7114  * @param[out] error
7115  *   Perform verbose error reporting if not NULL. PMDs initialize this
7116  *   structure in case of error only.
7117  *
7118  * @return
7119  *   0 on success, a negative errno value otherwise and rte_errno is set.
7120  */
7121 static int
7122 mlx5_shared_action_update(struct rte_eth_dev *dev,
7123                 struct rte_flow_shared_action *shared_action,
7124                 const struct rte_flow_action *action,
7125                 struct rte_flow_error *error)
7126 {
7127         struct rte_flow_attr attr = { .transfer = 0 };
7128         const struct mlx5_flow_driver_ops *fops =
7129                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7130         int ret;
7131
7132         ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7133         if (ret)
7134                 return ret;
7135         return flow_drv_action_update(dev, shared_action, action->conf, fops,
7136                                       error);
7137 }
7138
7139 /**
7140  * Query the shared action by handle.
7141  *
7142  * This function allows retrieving action-specific data such as counters.
7143  * Data is gathered by special action which may be present/referenced in
7144  * more than one flow rule definition.
7145  *
7146  * \see RTE_FLOW_ACTION_TYPE_COUNT
7147  *
7148  * @param dev
7149  *   Pointer to Ethernet device structure.
7150  * @param[in] action
7151  *   Handle for the shared action to query.
7152  * @param[in, out] data
7153  *   Pointer to storage for the associated query data type.
7154  * @param[out] error
7155  *   Perform verbose error reporting if not NULL. PMDs initialize this
7156  *   structure in case of error only.
7157  *
7158  * @return
7159  *   0 on success, a negative errno value otherwise and rte_errno is set.
7160  */
7161 static int
7162 mlx5_shared_action_query(struct rte_eth_dev *dev,
7163                          const struct rte_flow_shared_action *action,
7164                          void *data,
7165                          struct rte_flow_error *error)
7166 {
7167         struct rte_flow_attr attr = { .transfer = 0 };
7168         const struct mlx5_flow_driver_ops *fops =
7169                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7170
7171         return flow_drv_action_query(dev, action, data, fops, error);
7172 }
7173
7174 /**
7175  * Destroy all shared actions.
7176  *
7177  * @param dev
7178  *   Pointer to Ethernet device.
7179  *
7180  * @return
7181  *   0 on success, a negative errno value otherwise and rte_errno is set.
7182  */
7183 int
7184 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7185 {
7186         struct rte_flow_error error;
7187         struct mlx5_priv *priv = dev->data->dev_private;
7188         struct mlx5_shared_action_rss *action;
7189         int ret = 0;
7190         uint32_t idx;
7191
7192         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
7193                       priv->rss_shared_actions, idx, action, next) {
7194                 ret |= mlx5_shared_action_destroy(dev,
7195                        (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
7196         }
7197         return ret;
7198 }
7199
7200 #ifndef HAVE_MLX5DV_DR
7201 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
7202 #else
7203 #define MLX5_DOMAIN_SYNC_FLOW \
7204         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
7205 #endif
7206
7207 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
7208 {
7209         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
7210         const struct mlx5_flow_driver_ops *fops;
7211         int ret;
7212         struct rte_flow_attr attr = { .transfer = 0 };
7213
7214         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7215         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
7216         if (ret > 0)
7217                 ret = -ret;
7218         return ret;
7219 }
7220
7221 /**
7222  * tunnel offload functionalilty is defined for DV environment only
7223  */
7224 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
7225 __extension__
7226 union tunnel_offload_mark {
7227         uint32_t val;
7228         struct {
7229                 uint32_t app_reserve:8;
7230                 uint32_t table_id:15;
7231                 uint32_t transfer:1;
7232                 uint32_t _unused_:8;
7233         };
7234 };
7235
7236 static bool
7237 mlx5_access_tunnel_offload_db
7238         (struct rte_eth_dev *dev,
7239          bool (*match)(struct rte_eth_dev *,
7240                        struct mlx5_flow_tunnel *, const void *),
7241          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7242          void (*miss)(struct rte_eth_dev *, void *),
7243          void *ctx, bool lock_op);
7244
7245 static int
7246 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
7247                              struct rte_flow *flow,
7248                              const struct rte_flow_attr *attr,
7249                              const struct rte_flow_action *app_actions,
7250                              uint32_t flow_idx,
7251                              struct tunnel_default_miss_ctx *ctx,
7252                              struct rte_flow_error *error)
7253 {
7254         struct mlx5_priv *priv = dev->data->dev_private;
7255         struct mlx5_flow *dev_flow;
7256         struct rte_flow_attr miss_attr = *attr;
7257         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
7258         const struct rte_flow_item miss_items[2] = {
7259                 {
7260                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7261                         .spec = NULL,
7262                         .last = NULL,
7263                         .mask = NULL
7264                 },
7265                 {
7266                         .type = RTE_FLOW_ITEM_TYPE_END,
7267                         .spec = NULL,
7268                         .last = NULL,
7269                         .mask = NULL
7270                 }
7271         };
7272         union tunnel_offload_mark mark_id;
7273         struct rte_flow_action_mark miss_mark;
7274         struct rte_flow_action miss_actions[3] = {
7275                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
7276                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
7277         };
7278         const struct rte_flow_action_jump *jump_data;
7279         uint32_t i, flow_table = 0; /* prevent compilation warning */
7280         struct flow_grp_info grp_info = {
7281                 .external = 1,
7282                 .transfer = attr->transfer,
7283                 .fdb_def_rule = !!priv->fdb_def_rule,
7284                 .std_tbl_fix = 0,
7285         };
7286         int ret;
7287
7288         if (!attr->transfer) {
7289                 uint32_t q_size;
7290
7291                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
7292                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
7293                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
7294                                          0, SOCKET_ID_ANY);
7295                 if (!ctx->queue)
7296                         return rte_flow_error_set
7297                                 (error, ENOMEM,
7298                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7299                                 NULL, "invalid default miss RSS");
7300                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7301                 ctx->action_rss.level = 0,
7302                 ctx->action_rss.types = priv->rss_conf.rss_hf,
7303                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
7304                 ctx->action_rss.queue_num = priv->reta_idx_n,
7305                 ctx->action_rss.key = priv->rss_conf.rss_key,
7306                 ctx->action_rss.queue = ctx->queue;
7307                 if (!priv->reta_idx_n || !priv->rxqs_n)
7308                         return rte_flow_error_set
7309                                 (error, EINVAL,
7310                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7311                                 NULL, "invalid port configuration");
7312                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
7313                         ctx->action_rss.types = 0;
7314                 for (i = 0; i != priv->reta_idx_n; ++i)
7315                         ctx->queue[i] = (*priv->reta_idx)[i];
7316         } else {
7317                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
7318                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
7319         }
7320         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
7321         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
7322         jump_data = app_actions->conf;
7323         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
7324         miss_attr.group = jump_data->group;
7325         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
7326                                        &flow_table, &grp_info, error);
7327         if (ret)
7328                 return rte_flow_error_set(error, EINVAL,
7329                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7330                                           NULL, "invalid tunnel id");
7331         mark_id.app_reserve = 0;
7332         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
7333         mark_id.transfer = !!attr->transfer;
7334         mark_id._unused_ = 0;
7335         miss_mark.id = mark_id.val;
7336         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
7337                                     miss_items, miss_actions, flow_idx, error);
7338         if (!dev_flow)
7339                 return -rte_errno;
7340         dev_flow->flow = flow;
7341         dev_flow->external = true;
7342         dev_flow->tunnel = tunnel;
7343         /* Subflow object was created, we must include one in the list. */
7344         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
7345                       dev_flow->handle, next);
7346         DRV_LOG(DEBUG,
7347                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
7348                 dev->data->port_id, tunnel->app_tunnel.type,
7349                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
7350         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
7351                                   miss_actions, error);
7352         if (!ret)
7353                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
7354                                                   error);
7355
7356         return ret;
7357 }
7358
7359 static const struct mlx5_flow_tbl_data_entry  *
7360 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
7361 {
7362         struct mlx5_priv *priv = dev->data->dev_private;
7363         struct mlx5_dev_ctx_shared *sh = priv->sh;
7364         struct mlx5_hlist_entry *he;
7365         union tunnel_offload_mark mbits = { .val = mark };
7366         union mlx5_flow_tbl_key table_key = {
7367                 {
7368                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
7369                         .dummy = 0,
7370                         .domain = !!mbits.transfer,
7371                         .direction = 0,
7372                 }
7373         };
7374         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
7375         return he ?
7376                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
7377 }
7378
7379 static void
7380 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
7381                                    struct mlx5_hlist_entry *entry)
7382 {
7383         struct mlx5_dev_ctx_shared *sh = list->ctx;
7384         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7385
7386         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7387                         tunnel_flow_tbl_to_id(tte->flow_table));
7388         mlx5_free(tte);
7389 }
7390
7391 static int
7392 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused,
7393                                   struct mlx5_hlist_entry *entry,
7394                                   uint64_t key, void *cb_ctx __rte_unused)
7395 {
7396         union tunnel_tbl_key tbl = {
7397                 .val = key,
7398         };
7399         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7400
7401         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
7402 }
7403
7404 static struct mlx5_hlist_entry *
7405 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key,
7406                                    void *ctx __rte_unused)
7407 {
7408         struct mlx5_dev_ctx_shared *sh = list->ctx;
7409         struct tunnel_tbl_entry *tte;
7410         union tunnel_tbl_key tbl = {
7411                 .val = key,
7412         };
7413
7414         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
7415                           sizeof(*tte), 0,
7416                           SOCKET_ID_ANY);
7417         if (!tte)
7418                 goto err;
7419         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7420                           &tte->flow_table);
7421         if (tte->flow_table >= MLX5_MAX_TABLES) {
7422                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
7423                         tte->flow_table);
7424                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7425                                 tte->flow_table);
7426                 goto err;
7427         } else if (!tte->flow_table) {
7428                 goto err;
7429         }
7430         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
7431         tte->tunnel_id = tbl.tunnel_id;
7432         tte->group = tbl.group;
7433         return &tte->hash;
7434 err:
7435         if (tte)
7436                 mlx5_free(tte);
7437         return NULL;
7438 }
7439
7440 static uint32_t
7441 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
7442                                 const struct mlx5_flow_tunnel *tunnel,
7443                                 uint32_t group, uint32_t *table,
7444                                 struct rte_flow_error *error)
7445 {
7446         struct mlx5_hlist_entry *he;
7447         struct tunnel_tbl_entry *tte;
7448         union tunnel_tbl_key key = {
7449                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
7450                 .group = group
7451         };
7452         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7453         struct mlx5_hlist *group_hash;
7454
7455         group_hash = tunnel ? tunnel->groups : thub->groups;
7456         he = mlx5_hlist_register(group_hash, key.val, NULL);
7457         if (!he)
7458                 return rte_flow_error_set(error, EINVAL,
7459                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7460                                           NULL,
7461                                           "tunnel group index not supported");
7462         tte = container_of(he, typeof(*tte), hash);
7463         *table = tte->flow_table;
7464         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7465                 dev->data->port_id, key.tunnel_id, group, *table);
7466         return 0;
7467 }
7468
7469 static void
7470 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
7471                       struct mlx5_flow_tunnel *tunnel)
7472 {
7473         struct mlx5_priv *priv = dev->data->dev_private;
7474         struct mlx5_indexed_pool *ipool;
7475
7476         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
7477                 dev->data->port_id, tunnel->tunnel_id);
7478         LIST_REMOVE(tunnel, chain);
7479         mlx5_hlist_destroy(tunnel->groups);
7480         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7481         mlx5_ipool_free(ipool, tunnel->tunnel_id);
7482 }
7483
7484 static bool
7485 mlx5_access_tunnel_offload_db
7486         (struct rte_eth_dev *dev,
7487          bool (*match)(struct rte_eth_dev *,
7488                        struct mlx5_flow_tunnel *, const void *),
7489          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7490          void (*miss)(struct rte_eth_dev *, void *),
7491          void *ctx, bool lock_op)
7492 {
7493         bool verdict = false;
7494         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7495         struct mlx5_flow_tunnel *tunnel;
7496
7497         rte_spinlock_lock(&thub->sl);
7498         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
7499                 verdict = match(dev, tunnel, (const void *)ctx);
7500                 if (verdict)
7501                         break;
7502         }
7503         if (!lock_op)
7504                 rte_spinlock_unlock(&thub->sl);
7505         if (verdict && hit)
7506                 hit(dev, tunnel, ctx);
7507         if (!verdict && miss)
7508                 miss(dev, ctx);
7509         if (lock_op)
7510                 rte_spinlock_unlock(&thub->sl);
7511
7512         return verdict;
7513 }
7514
7515 struct tunnel_db_find_tunnel_id_ctx {
7516         uint32_t tunnel_id;
7517         struct mlx5_flow_tunnel *tunnel;
7518 };
7519
7520 static bool
7521 find_tunnel_id_match(struct rte_eth_dev *dev,
7522                      struct mlx5_flow_tunnel *tunnel, const void *x)
7523 {
7524         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7525
7526         RTE_SET_USED(dev);
7527         return tunnel->tunnel_id == ctx->tunnel_id;
7528 }
7529
7530 static void
7531 find_tunnel_id_hit(struct rte_eth_dev *dev,
7532                    struct mlx5_flow_tunnel *tunnel, void *x)
7533 {
7534         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7535         RTE_SET_USED(dev);
7536         ctx->tunnel = tunnel;
7537 }
7538
7539 static struct mlx5_flow_tunnel *
7540 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
7541 {
7542         struct tunnel_db_find_tunnel_id_ctx ctx = {
7543                 .tunnel_id = id,
7544         };
7545
7546         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
7547                                       find_tunnel_id_hit, NULL, &ctx, true);
7548
7549         return ctx.tunnel;
7550 }
7551
7552 static struct mlx5_flow_tunnel *
7553 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
7554                           const struct rte_flow_tunnel *app_tunnel)
7555 {
7556         struct mlx5_priv *priv = dev->data->dev_private;
7557         struct mlx5_indexed_pool *ipool;
7558         struct mlx5_flow_tunnel *tunnel;
7559         uint32_t id;
7560
7561         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7562         tunnel = mlx5_ipool_zmalloc(ipool, &id);
7563         if (!tunnel)
7564                 return NULL;
7565         if (id >= MLX5_MAX_TUNNELS) {
7566                 mlx5_ipool_free(ipool, id);
7567                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
7568                 return NULL;
7569         }
7570         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
7571                                            mlx5_flow_tunnel_grp2tbl_create_cb,
7572                                            mlx5_flow_tunnel_grp2tbl_match_cb,
7573                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
7574         if (!tunnel->groups) {
7575                 mlx5_ipool_free(ipool, id);
7576                 return NULL;
7577         }
7578         tunnel->groups->ctx = priv->sh;
7579         /* initiate new PMD tunnel */
7580         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
7581         tunnel->tunnel_id = id;
7582         tunnel->action.type = (typeof(tunnel->action.type))
7583                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
7584         tunnel->action.conf = tunnel;
7585         tunnel->item.type = (typeof(tunnel->item.type))
7586                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
7587         tunnel->item.spec = tunnel;
7588         tunnel->item.last = NULL;
7589         tunnel->item.mask = NULL;
7590
7591         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
7592                 dev->data->port_id, tunnel->tunnel_id);
7593
7594         return tunnel;
7595 }
7596
7597 struct tunnel_db_get_tunnel_ctx {
7598         const struct rte_flow_tunnel *app_tunnel;
7599         struct mlx5_flow_tunnel *tunnel;
7600 };
7601
7602 static bool get_tunnel_match(struct rte_eth_dev *dev,
7603                              struct mlx5_flow_tunnel *tunnel, const void *x)
7604 {
7605         const struct tunnel_db_get_tunnel_ctx *ctx = x;
7606
7607         RTE_SET_USED(dev);
7608         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
7609                        sizeof(*ctx->app_tunnel));
7610 }
7611
7612 static void get_tunnel_hit(struct rte_eth_dev *dev,
7613                            struct mlx5_flow_tunnel *tunnel, void *x)
7614 {
7615         /* called under tunnel spinlock protection */
7616         struct tunnel_db_get_tunnel_ctx *ctx = x;
7617
7618         RTE_SET_USED(dev);
7619         tunnel->refctn++;
7620         ctx->tunnel = tunnel;
7621 }
7622
7623 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
7624 {
7625         /* called under tunnel spinlock protection */
7626         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7627         struct tunnel_db_get_tunnel_ctx *ctx = x;
7628
7629         rte_spinlock_unlock(&thub->sl);
7630         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
7631         ctx->tunnel->refctn = 1;
7632         rte_spinlock_lock(&thub->sl);
7633         if (ctx->tunnel)
7634                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
7635 }
7636
7637
7638 static int
7639 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
7640                      const struct rte_flow_tunnel *app_tunnel,
7641                      struct mlx5_flow_tunnel **tunnel)
7642 {
7643         struct tunnel_db_get_tunnel_ctx ctx = {
7644                 .app_tunnel = app_tunnel,
7645         };
7646
7647         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
7648                                       get_tunnel_miss, &ctx, true);
7649         *tunnel = ctx.tunnel;
7650         return ctx.tunnel ? 0 : -ENOMEM;
7651 }
7652
7653 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
7654 {
7655         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
7656
7657         if (!thub)
7658                 return;
7659         if (!LIST_EMPTY(&thub->tunnels))
7660                 DRV_LOG(WARNING, "port %u tunnels present\n", port_id);
7661         mlx5_hlist_destroy(thub->groups);
7662         mlx5_free(thub);
7663 }
7664
7665 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
7666 {
7667         int err;
7668         struct mlx5_flow_tunnel_hub *thub;
7669
7670         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
7671                            0, SOCKET_ID_ANY);
7672         if (!thub)
7673                 return -ENOMEM;
7674         LIST_INIT(&thub->tunnels);
7675         rte_spinlock_init(&thub->sl);
7676         thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES, 0,
7677                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
7678                                          mlx5_flow_tunnel_grp2tbl_match_cb,
7679                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
7680         if (!thub->groups) {
7681                 err = -rte_errno;
7682                 goto err;
7683         }
7684         thub->groups->ctx = sh;
7685         sh->tunnel_hub = thub;
7686
7687         return 0;
7688
7689 err:
7690         if (thub->groups)
7691                 mlx5_hlist_destroy(thub->groups);
7692         if (thub)
7693                 mlx5_free(thub);
7694         return err;
7695 }
7696
7697 static inline bool
7698 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
7699                           struct rte_flow_tunnel *tunnel,
7700                           const char *err_msg)
7701 {
7702         err_msg = NULL;
7703         if (!is_tunnel_offload_active(dev)) {
7704                 err_msg = "tunnel offload was not activated";
7705                 goto out;
7706         } else if (!tunnel) {
7707                 err_msg = "no application tunnel";
7708                 goto out;
7709         }
7710
7711         switch (tunnel->type) {
7712         default:
7713                 err_msg = "unsupported tunnel type";
7714                 goto out;
7715         case RTE_FLOW_ITEM_TYPE_VXLAN:
7716                 break;
7717         }
7718
7719 out:
7720         return !err_msg;
7721 }
7722
7723 static int
7724 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
7725                     struct rte_flow_tunnel *app_tunnel,
7726                     struct rte_flow_action **actions,
7727                     uint32_t *num_of_actions,
7728                     struct rte_flow_error *error)
7729 {
7730         int ret;
7731         struct mlx5_flow_tunnel *tunnel;
7732         const char *err_msg = NULL;
7733         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
7734
7735         if (!verdict)
7736                 return rte_flow_error_set(error, EINVAL,
7737                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
7738                                           err_msg);
7739         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
7740         if (ret < 0) {
7741                 return rte_flow_error_set(error, ret,
7742                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
7743                                           "failed to initialize pmd tunnel");
7744         }
7745         *actions = &tunnel->action;
7746         *num_of_actions = 1;
7747         return 0;
7748 }
7749
7750 static int
7751 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
7752                        struct rte_flow_tunnel *app_tunnel,
7753                        struct rte_flow_item **items,
7754                        uint32_t *num_of_items,
7755                        struct rte_flow_error *error)
7756 {
7757         int ret;
7758         struct mlx5_flow_tunnel *tunnel;
7759         const char *err_msg = NULL;
7760         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
7761
7762         if (!verdict)
7763                 return rte_flow_error_set(error, EINVAL,
7764                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
7765                                           err_msg);
7766         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
7767         if (ret < 0) {
7768                 return rte_flow_error_set(error, ret,
7769                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
7770                                           "failed to initialize pmd tunnel");
7771         }
7772         *items = &tunnel->item;
7773         *num_of_items = 1;
7774         return 0;
7775 }
7776
7777 struct tunnel_db_element_release_ctx {
7778         struct rte_flow_item *items;
7779         struct rte_flow_action *actions;
7780         uint32_t num_elements;
7781         struct rte_flow_error *error;
7782         int ret;
7783 };
7784
7785 static bool
7786 tunnel_element_release_match(struct rte_eth_dev *dev,
7787                              struct mlx5_flow_tunnel *tunnel, const void *x)
7788 {
7789         const struct tunnel_db_element_release_ctx *ctx = x;
7790
7791         RTE_SET_USED(dev);
7792         if (ctx->num_elements != 1)
7793                 return false;
7794         else if (ctx->items)
7795                 return ctx->items == &tunnel->item;
7796         else if (ctx->actions)
7797                 return ctx->actions == &tunnel->action;
7798
7799         return false;
7800 }
7801
7802 static void
7803 tunnel_element_release_hit(struct rte_eth_dev *dev,
7804                            struct mlx5_flow_tunnel *tunnel, void *x)
7805 {
7806         struct tunnel_db_element_release_ctx *ctx = x;
7807         ctx->ret = 0;
7808         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
7809                 mlx5_flow_tunnel_free(dev, tunnel);
7810 }
7811
7812 static void
7813 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
7814 {
7815         struct tunnel_db_element_release_ctx *ctx = x;
7816         RTE_SET_USED(dev);
7817         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
7818                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
7819                                       "invalid argument");
7820 }
7821
7822 static int
7823 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
7824                        struct rte_flow_item *pmd_items,
7825                        uint32_t num_items, struct rte_flow_error *err)
7826 {
7827         struct tunnel_db_element_release_ctx ctx = {
7828                 .items = pmd_items,
7829                 .actions = NULL,
7830                 .num_elements = num_items,
7831                 .error = err,
7832         };
7833
7834         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
7835                                       tunnel_element_release_hit,
7836                                       tunnel_element_release_miss, &ctx, false);
7837
7838         return ctx.ret;
7839 }
7840
7841 static int
7842 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
7843                          struct rte_flow_action *pmd_actions,
7844                          uint32_t num_actions, struct rte_flow_error *err)
7845 {
7846         struct tunnel_db_element_release_ctx ctx = {
7847                 .items = NULL,
7848                 .actions = pmd_actions,
7849                 .num_elements = num_actions,
7850                 .error = err,
7851         };
7852
7853         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
7854                                       tunnel_element_release_hit,
7855                                       tunnel_element_release_miss, &ctx, false);
7856
7857         return ctx.ret;
7858 }
7859
7860 static int
7861 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
7862                                   struct rte_mbuf *m,
7863                                   struct rte_flow_restore_info *info,
7864                                   struct rte_flow_error *err)
7865 {
7866         uint64_t ol_flags = m->ol_flags;
7867         const struct mlx5_flow_tbl_data_entry *tble;
7868         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
7869
7870         if (!is_tunnel_offload_active(dev)) {
7871                 info->flags = 0;
7872                 return 0;
7873         }
7874
7875         if ((ol_flags & mask) != mask)
7876                 goto err;
7877         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
7878         if (!tble) {
7879                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
7880                         dev->data->port_id, m->hash.fdir.hi);
7881                 goto err;
7882         }
7883         MLX5_ASSERT(tble->tunnel);
7884         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
7885         info->group_id = tble->group_id;
7886         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
7887                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
7888                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
7889
7890         return 0;
7891
7892 err:
7893         return rte_flow_error_set(err, EINVAL,
7894                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7895                                   "failed to get restore info");
7896 }
7897
7898 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
7899 static int
7900 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
7901                            __rte_unused struct rte_flow_tunnel *app_tunnel,
7902                            __rte_unused struct rte_flow_action **actions,
7903                            __rte_unused uint32_t *num_of_actions,
7904                            __rte_unused struct rte_flow_error *error)
7905 {
7906         return -ENOTSUP;
7907 }
7908
7909 static int
7910 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
7911                        __rte_unused struct rte_flow_tunnel *app_tunnel,
7912                        __rte_unused struct rte_flow_item **items,
7913                        __rte_unused uint32_t *num_of_items,
7914                        __rte_unused struct rte_flow_error *error)
7915 {
7916         return -ENOTSUP;
7917 }
7918
7919 static int
7920 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
7921                               __rte_unused struct rte_flow_item *pmd_items,
7922                               __rte_unused uint32_t num_items,
7923                               __rte_unused struct rte_flow_error *err)
7924 {
7925         return -ENOTSUP;
7926 }
7927
7928 static int
7929 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
7930                                 __rte_unused struct rte_flow_action *pmd_action,
7931                                 __rte_unused uint32_t num_actions,
7932                                 __rte_unused struct rte_flow_error *err)
7933 {
7934         return -ENOTSUP;
7935 }
7936
7937 static int
7938 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
7939                                   __rte_unused struct rte_mbuf *m,
7940                                   __rte_unused struct rte_flow_restore_info *i,
7941                                   __rte_unused struct rte_flow_error *err)
7942 {
7943         return -ENOTSUP;
7944 }
7945
7946 static int
7947 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
7948                              __rte_unused struct rte_flow *flow,
7949                              __rte_unused const struct rte_flow_attr *attr,
7950                              __rte_unused const struct rte_flow_action *actions,
7951                              __rte_unused uint32_t flow_idx,
7952                              __rte_unused struct tunnel_default_miss_ctx *ctx,
7953                              __rte_unused struct rte_flow_error *error)
7954 {
7955         return -ENOTSUP;
7956 }
7957
7958 static struct mlx5_flow_tunnel *
7959 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
7960                     __rte_unused uint32_t id)
7961 {
7962         return NULL;
7963 }
7964
7965 static void
7966 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
7967                       __rte_unused struct mlx5_flow_tunnel *tunnel)
7968 {
7969 }
7970
7971 static uint32_t
7972 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
7973                                 __rte_unused const struct mlx5_flow_tunnel *t,
7974                                 __rte_unused uint32_t group,
7975                                 __rte_unused uint32_t *table,
7976                                 struct rte_flow_error *error)
7977 {
7978         return rte_flow_error_set(error, ENOTSUP,
7979                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7980                                   "tunnel offload requires DV support");
7981 }
7982
7983 void
7984 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
7985                         __rte_unused  uint16_t port_id)
7986 {
7987 }
7988 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
7989