1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
6 #include <netinet/in.h>
14 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
16 #pragma GCC diagnostic ignored "-Wpedantic"
18 #include <infiniband/verbs.h>
20 #pragma GCC diagnostic error "-Wpedantic"
23 #include <rte_common.h>
24 #include <rte_ether.h>
25 #include <rte_ethdev_driver.h>
27 #include <rte_flow_driver.h>
28 #include <rte_malloc.h>
31 #include <mlx5_glue.h>
32 #include <mlx5_devx_cmds.h>
35 #include "mlx5_defs.h"
37 #include "mlx5_flow.h"
38 #include "mlx5_rxtx.h"
40 /* Dev ops structure defined in mlx5.c */
41 extern const struct eth_dev_ops mlx5_dev_ops;
42 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
44 /** Device flow drivers. */
45 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
46 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
48 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
50 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
52 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
53 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
54 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
55 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
57 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
58 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
63 MLX5_EXPANSION_ROOT_OUTER,
64 MLX5_EXPANSION_ROOT_ETH_VLAN,
65 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
66 MLX5_EXPANSION_OUTER_ETH,
67 MLX5_EXPANSION_OUTER_ETH_VLAN,
68 MLX5_EXPANSION_OUTER_VLAN,
69 MLX5_EXPANSION_OUTER_IPV4,
70 MLX5_EXPANSION_OUTER_IPV4_UDP,
71 MLX5_EXPANSION_OUTER_IPV4_TCP,
72 MLX5_EXPANSION_OUTER_IPV6,
73 MLX5_EXPANSION_OUTER_IPV6_UDP,
74 MLX5_EXPANSION_OUTER_IPV6_TCP,
76 MLX5_EXPANSION_VXLAN_GPE,
80 MLX5_EXPANSION_ETH_VLAN,
83 MLX5_EXPANSION_IPV4_UDP,
84 MLX5_EXPANSION_IPV4_TCP,
86 MLX5_EXPANSION_IPV6_UDP,
87 MLX5_EXPANSION_IPV6_TCP,
90 /** Supported expansion of items. */
91 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
92 [MLX5_EXPANSION_ROOT] = {
93 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
96 .type = RTE_FLOW_ITEM_TYPE_END,
98 [MLX5_EXPANSION_ROOT_OUTER] = {
99 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
100 MLX5_EXPANSION_OUTER_IPV4,
101 MLX5_EXPANSION_OUTER_IPV6),
102 .type = RTE_FLOW_ITEM_TYPE_END,
104 [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
105 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
106 .type = RTE_FLOW_ITEM_TYPE_END,
108 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
109 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
110 .type = RTE_FLOW_ITEM_TYPE_END,
112 [MLX5_EXPANSION_OUTER_ETH] = {
113 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
114 MLX5_EXPANSION_OUTER_IPV6,
115 MLX5_EXPANSION_MPLS),
116 .type = RTE_FLOW_ITEM_TYPE_ETH,
119 [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
120 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
121 .type = RTE_FLOW_ITEM_TYPE_ETH,
124 [MLX5_EXPANSION_OUTER_VLAN] = {
125 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
126 MLX5_EXPANSION_OUTER_IPV6),
127 .type = RTE_FLOW_ITEM_TYPE_VLAN,
129 [MLX5_EXPANSION_OUTER_IPV4] = {
130 .next = RTE_FLOW_EXPAND_RSS_NEXT
131 (MLX5_EXPANSION_OUTER_IPV4_UDP,
132 MLX5_EXPANSION_OUTER_IPV4_TCP,
135 MLX5_EXPANSION_IPV6),
136 .type = RTE_FLOW_ITEM_TYPE_IPV4,
137 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
138 ETH_RSS_NONFRAG_IPV4_OTHER,
140 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
141 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
142 MLX5_EXPANSION_VXLAN_GPE),
143 .type = RTE_FLOW_ITEM_TYPE_UDP,
144 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
146 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
147 .type = RTE_FLOW_ITEM_TYPE_TCP,
148 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
150 [MLX5_EXPANSION_OUTER_IPV6] = {
151 .next = RTE_FLOW_EXPAND_RSS_NEXT
152 (MLX5_EXPANSION_OUTER_IPV6_UDP,
153 MLX5_EXPANSION_OUTER_IPV6_TCP,
155 MLX5_EXPANSION_IPV6),
156 .type = RTE_FLOW_ITEM_TYPE_IPV6,
157 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
158 ETH_RSS_NONFRAG_IPV6_OTHER,
160 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
161 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
162 MLX5_EXPANSION_VXLAN_GPE),
163 .type = RTE_FLOW_ITEM_TYPE_UDP,
164 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
166 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
167 .type = RTE_FLOW_ITEM_TYPE_TCP,
168 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
170 [MLX5_EXPANSION_VXLAN] = {
171 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
173 MLX5_EXPANSION_IPV6),
174 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
176 [MLX5_EXPANSION_VXLAN_GPE] = {
177 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
179 MLX5_EXPANSION_IPV6),
180 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
182 [MLX5_EXPANSION_GRE] = {
183 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
184 .type = RTE_FLOW_ITEM_TYPE_GRE,
186 [MLX5_EXPANSION_MPLS] = {
187 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
188 MLX5_EXPANSION_IPV6),
189 .type = RTE_FLOW_ITEM_TYPE_MPLS,
191 [MLX5_EXPANSION_ETH] = {
192 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
193 MLX5_EXPANSION_IPV6),
194 .type = RTE_FLOW_ITEM_TYPE_ETH,
196 [MLX5_EXPANSION_ETH_VLAN] = {
197 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
198 .type = RTE_FLOW_ITEM_TYPE_ETH,
200 [MLX5_EXPANSION_VLAN] = {
201 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
202 MLX5_EXPANSION_IPV6),
203 .type = RTE_FLOW_ITEM_TYPE_VLAN,
205 [MLX5_EXPANSION_IPV4] = {
206 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
207 MLX5_EXPANSION_IPV4_TCP),
208 .type = RTE_FLOW_ITEM_TYPE_IPV4,
209 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
210 ETH_RSS_NONFRAG_IPV4_OTHER,
212 [MLX5_EXPANSION_IPV4_UDP] = {
213 .type = RTE_FLOW_ITEM_TYPE_UDP,
214 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
216 [MLX5_EXPANSION_IPV4_TCP] = {
217 .type = RTE_FLOW_ITEM_TYPE_TCP,
218 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
220 [MLX5_EXPANSION_IPV6] = {
221 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
222 MLX5_EXPANSION_IPV6_TCP),
223 .type = RTE_FLOW_ITEM_TYPE_IPV6,
224 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
225 ETH_RSS_NONFRAG_IPV6_OTHER,
227 [MLX5_EXPANSION_IPV6_UDP] = {
228 .type = RTE_FLOW_ITEM_TYPE_UDP,
229 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
231 [MLX5_EXPANSION_IPV6_TCP] = {
232 .type = RTE_FLOW_ITEM_TYPE_TCP,
233 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
237 static const struct rte_flow_ops mlx5_flow_ops = {
238 .validate = mlx5_flow_validate,
239 .create = mlx5_flow_create,
240 .destroy = mlx5_flow_destroy,
241 .flush = mlx5_flow_flush,
242 .isolate = mlx5_flow_isolate,
243 .query = mlx5_flow_query,
244 .dev_dump = mlx5_flow_dev_dump,
247 /* Convert FDIR request to Generic flow. */
249 struct rte_flow_attr attr;
250 struct rte_flow_item items[4];
251 struct rte_flow_item_eth l2;
252 struct rte_flow_item_eth l2_mask;
254 struct rte_flow_item_ipv4 ipv4;
255 struct rte_flow_item_ipv6 ipv6;
258 struct rte_flow_item_ipv4 ipv4;
259 struct rte_flow_item_ipv6 ipv6;
262 struct rte_flow_item_udp udp;
263 struct rte_flow_item_tcp tcp;
266 struct rte_flow_item_udp udp;
267 struct rte_flow_item_tcp tcp;
269 struct rte_flow_action actions[2];
270 struct rte_flow_action_queue queue;
273 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
274 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
275 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
278 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
279 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
280 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
281 { 9, 10, 11 }, { 12, 13, 14 },
284 /* Tunnel information. */
285 struct mlx5_flow_tunnel_info {
286 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
287 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
290 static struct mlx5_flow_tunnel_info tunnels_info[] = {
292 .tunnel = MLX5_FLOW_LAYER_VXLAN,
293 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
296 .tunnel = MLX5_FLOW_LAYER_GENEVE,
297 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
300 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
301 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
304 .tunnel = MLX5_FLOW_LAYER_GRE,
305 .ptype = RTE_PTYPE_TUNNEL_GRE,
308 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
309 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
312 .tunnel = MLX5_FLOW_LAYER_MPLS,
313 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
316 .tunnel = MLX5_FLOW_LAYER_NVGRE,
317 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
320 .tunnel = MLX5_FLOW_LAYER_IPIP,
321 .ptype = RTE_PTYPE_TUNNEL_IP,
324 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
325 .ptype = RTE_PTYPE_TUNNEL_IP,
328 .tunnel = MLX5_FLOW_LAYER_GTP,
329 .ptype = RTE_PTYPE_TUNNEL_GTPU,
334 * Translate tag ID to register.
337 * Pointer to the Ethernet device structure.
339 * The feature that request the register.
341 * The request register ID.
343 * Error description in case of any.
346 * The request register on success, a negative errno
347 * value otherwise and rte_errno is set.
350 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
351 enum mlx5_feature_name feature,
353 struct rte_flow_error *error)
355 struct mlx5_priv *priv = dev->data->dev_private;
356 struct mlx5_dev_config *config = &priv->config;
357 enum modify_reg start_reg;
358 bool skip_mtr_reg = false;
361 case MLX5_HAIRPIN_RX:
363 case MLX5_HAIRPIN_TX:
365 case MLX5_METADATA_RX:
366 switch (config->dv_xmeta_en) {
367 case MLX5_XMETA_MODE_LEGACY:
369 case MLX5_XMETA_MODE_META16:
371 case MLX5_XMETA_MODE_META32:
375 case MLX5_METADATA_TX:
377 case MLX5_METADATA_FDB:
378 switch (config->dv_xmeta_en) {
379 case MLX5_XMETA_MODE_LEGACY:
381 case MLX5_XMETA_MODE_META16:
383 case MLX5_XMETA_MODE_META32:
388 switch (config->dv_xmeta_en) {
389 case MLX5_XMETA_MODE_LEGACY:
391 case MLX5_XMETA_MODE_META16:
393 case MLX5_XMETA_MODE_META32:
399 * If meter color and flow match share one register, flow match
400 * should use the meter color register for match.
402 if (priv->mtr_reg_share)
403 return priv->mtr_color_reg;
405 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
408 MLX5_ASSERT(priv->mtr_color_reg != REG_NONE);
409 return priv->mtr_color_reg;
412 * Metadata COPY_MARK register using is in meter suffix sub
413 * flow while with meter. It's safe to share the same register.
415 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
418 * If meter is enable, it will engage the register for color
419 * match and flow match. If meter color match is not using the
420 * REG_C_2, need to skip the REG_C_x be used by meter color
422 * If meter is disable, free to use all available registers.
424 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
425 (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
426 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
427 if (id > (REG_C_7 - start_reg))
428 return rte_flow_error_set(error, EINVAL,
429 RTE_FLOW_ERROR_TYPE_ITEM,
430 NULL, "invalid tag id");
431 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
432 return rte_flow_error_set(error, ENOTSUP,
433 RTE_FLOW_ERROR_TYPE_ITEM,
434 NULL, "unsupported tag id");
436 * This case means meter is using the REG_C_x great than 2.
437 * Take care not to conflict with meter color REG_C_x.
438 * If the available index REG_C_y >= REG_C_x, skip the
441 if (skip_mtr_reg && config->flow_mreg_c
442 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
443 if (config->flow_mreg_c
444 [id + 1 + start_reg - REG_C_0] != REG_NONE)
445 return config->flow_mreg_c
446 [id + 1 + start_reg - REG_C_0];
447 return rte_flow_error_set(error, ENOTSUP,
448 RTE_FLOW_ERROR_TYPE_ITEM,
449 NULL, "unsupported tag id");
451 return config->flow_mreg_c[id + start_reg - REG_C_0];
454 return rte_flow_error_set(error, EINVAL,
455 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
456 NULL, "invalid feature name");
460 * Check extensive flow metadata register support.
463 * Pointer to rte_eth_dev structure.
466 * True if device supports extensive flow metadata register, otherwise false.
469 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
471 struct mlx5_priv *priv = dev->data->dev_private;
472 struct mlx5_dev_config *config = &priv->config;
475 * Having available reg_c can be regarded inclusively as supporting
476 * extensive flow metadata register, which could mean,
477 * - metadata register copy action by modify header.
478 * - 16 modify header actions is supported.
479 * - reg_c's are preserved across different domain (FDB and NIC) on
480 * packet loopback by flow lookup miss.
482 return config->flow_mreg_c[2] != REG_NONE;
486 * Discover the maximum number of priority available.
489 * Pointer to the Ethernet device structure.
492 * number of supported flow priority on success, a negative errno
493 * value otherwise and rte_errno is set.
496 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
498 struct mlx5_priv *priv = dev->data->dev_private;
500 struct ibv_flow_attr attr;
501 struct ibv_flow_spec_eth eth;
502 struct ibv_flow_spec_action_drop drop;
506 .port = (uint8_t)priv->ibv_port,
509 .type = IBV_FLOW_SPEC_ETH,
510 .size = sizeof(struct ibv_flow_spec_eth),
513 .size = sizeof(struct ibv_flow_spec_action_drop),
514 .type = IBV_FLOW_SPEC_ACTION_DROP,
517 struct ibv_flow *flow;
518 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
519 uint16_t vprio[] = { 8, 16 };
527 for (i = 0; i != RTE_DIM(vprio); i++) {
528 flow_attr.attr.priority = vprio[i] - 1;
529 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
532 claim_zero(mlx5_glue->destroy_flow(flow));
535 mlx5_hrxq_drop_release(dev);
538 priority = RTE_DIM(priority_map_3);
541 priority = RTE_DIM(priority_map_5);
546 "port %u verbs maximum priority: %d expected 8/16",
547 dev->data->port_id, priority);
550 DRV_LOG(INFO, "port %u flow maximum priority: %d",
551 dev->data->port_id, priority);
556 * Adjust flow priority based on the highest layer and the request priority.
559 * Pointer to the Ethernet device structure.
560 * @param[in] priority
561 * The rule base priority.
562 * @param[in] subpriority
563 * The priority based on the items.
568 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
569 uint32_t subpriority)
572 struct mlx5_priv *priv = dev->data->dev_private;
574 switch (priv->config.flow_prio) {
575 case RTE_DIM(priority_map_3):
576 res = priority_map_3[priority][subpriority];
578 case RTE_DIM(priority_map_5):
579 res = priority_map_5[priority][subpriority];
586 * Verify the @p item specifications (spec, last, mask) are compatible with the
590 * Item specification.
592 * @p item->mask or flow default bit-masks.
593 * @param[in] nic_mask
594 * Bit-masks covering supported fields by the NIC to compare with user mask.
596 * Bit-masks size in bytes.
598 * Pointer to error structure.
601 * 0 on success, a negative errno value otherwise and rte_errno is set.
604 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
606 const uint8_t *nic_mask,
608 struct rte_flow_error *error)
612 MLX5_ASSERT(nic_mask);
613 for (i = 0; i < size; ++i)
614 if ((nic_mask[i] | mask[i]) != nic_mask[i])
615 return rte_flow_error_set(error, ENOTSUP,
616 RTE_FLOW_ERROR_TYPE_ITEM,
618 "mask enables non supported"
620 if (!item->spec && (item->mask || item->last))
621 return rte_flow_error_set(error, EINVAL,
622 RTE_FLOW_ERROR_TYPE_ITEM, item,
623 "mask/last without a spec is not"
625 if (item->spec && item->last) {
631 for (i = 0; i < size; ++i) {
632 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
633 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
635 ret = memcmp(spec, last, size);
637 return rte_flow_error_set(error, EINVAL,
638 RTE_FLOW_ERROR_TYPE_ITEM,
640 "range is not valid");
646 * Adjust the hash fields according to the @p flow information.
648 * @param[in] dev_flow.
649 * Pointer to the mlx5_flow.
651 * 1 when the hash field is for a tunnel item.
652 * @param[in] layer_types
654 * @param[in] hash_fields
658 * The hash fields that should be used.
661 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
662 int tunnel __rte_unused, uint64_t layer_types,
663 uint64_t hash_fields)
665 struct rte_flow *flow = dev_flow->flow;
666 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
667 int rss_request_inner = flow->rss.level >= 2;
669 /* Check RSS hash level for tunnel. */
670 if (tunnel && rss_request_inner)
671 hash_fields |= IBV_RX_HASH_INNER;
672 else if (tunnel || rss_request_inner)
675 /* Check if requested layer matches RSS hash fields. */
676 if (!(flow->rss.types & layer_types))
682 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
683 * if several tunnel rules are used on this queue, the tunnel ptype will be
687 * Rx queue to update.
690 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
693 uint32_t tunnel_ptype = 0;
695 /* Look up for the ptype to use. */
696 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
697 if (!rxq_ctrl->flow_tunnels_n[i])
700 tunnel_ptype = tunnels_info[i].ptype;
706 rxq_ctrl->rxq.tunnel = tunnel_ptype;
710 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
714 * Pointer to the Ethernet device structure.
716 * Pointer to flow structure.
717 * @param[in] dev_handle
718 * Pointer to device flow handle structure.
721 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow,
722 struct mlx5_flow_handle *dev_handle)
724 struct mlx5_priv *priv = dev->data->dev_private;
725 const int mark = !!(dev_handle->act_flags &
726 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
727 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
730 for (i = 0; i != flow->rss.queue_num; ++i) {
731 int idx = (*flow->rss.queue)[i];
732 struct mlx5_rxq_ctrl *rxq_ctrl =
733 container_of((*priv->rxqs)[idx],
734 struct mlx5_rxq_ctrl, rxq);
737 * To support metadata register copy on Tx loopback,
738 * this must be always enabled (metadata may arive
739 * from other port - not from local flows only.
741 if (priv->config.dv_flow_en &&
742 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
743 mlx5_flow_ext_mreg_supported(dev)) {
744 rxq_ctrl->rxq.mark = 1;
745 rxq_ctrl->flow_mark_n = 1;
747 rxq_ctrl->rxq.mark = 1;
748 rxq_ctrl->flow_mark_n++;
753 /* Increase the counter matching the flow. */
754 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
755 if ((tunnels_info[j].tunnel &
756 dev_handle->layers) ==
757 tunnels_info[j].tunnel) {
758 rxq_ctrl->flow_tunnels_n[j]++;
762 flow_rxq_tunnel_ptype_update(rxq_ctrl);
768 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
771 * Pointer to the Ethernet device structure.
773 * Pointer to flow structure.
776 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
778 struct mlx5_flow_handle *dev_handle;
780 LIST_FOREACH(dev_handle, &flow->dev_handles, next)
781 flow_drv_rxq_flags_set(dev, flow, dev_handle);
785 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
786 * device flow if no other flow uses it with the same kind of request.
789 * Pointer to Ethernet device.
791 * Pointer to flow structure.
792 * @param[in] dev_handle
793 * Pointer to the device flow handle structure.
796 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow,
797 struct mlx5_flow_handle *dev_handle)
799 struct mlx5_priv *priv = dev->data->dev_private;
800 const int mark = !!(dev_handle->act_flags &
801 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
802 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
805 MLX5_ASSERT(dev->data->dev_started);
806 for (i = 0; i != flow->rss.queue_num; ++i) {
807 int idx = (*flow->rss.queue)[i];
808 struct mlx5_rxq_ctrl *rxq_ctrl =
809 container_of((*priv->rxqs)[idx],
810 struct mlx5_rxq_ctrl, rxq);
812 if (priv->config.dv_flow_en &&
813 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
814 mlx5_flow_ext_mreg_supported(dev)) {
815 rxq_ctrl->rxq.mark = 1;
816 rxq_ctrl->flow_mark_n = 1;
818 rxq_ctrl->flow_mark_n--;
819 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
824 /* Decrease the counter matching the flow. */
825 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
826 if ((tunnels_info[j].tunnel &
827 dev_handle->layers) ==
828 tunnels_info[j].tunnel) {
829 rxq_ctrl->flow_tunnels_n[j]--;
833 flow_rxq_tunnel_ptype_update(rxq_ctrl);
839 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
840 * @p flow if no other flow uses it with the same kind of request.
843 * Pointer to Ethernet device.
845 * Pointer to the flow.
848 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
850 struct mlx5_flow_handle *dev_handle;
852 LIST_FOREACH(dev_handle, &flow->dev_handles, next)
853 flow_drv_rxq_flags_trim(dev, flow, dev_handle);
857 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
860 * Pointer to Ethernet device.
863 flow_rxq_flags_clear(struct rte_eth_dev *dev)
865 struct mlx5_priv *priv = dev->data->dev_private;
868 for (i = 0; i != priv->rxqs_n; ++i) {
869 struct mlx5_rxq_ctrl *rxq_ctrl;
872 if (!(*priv->rxqs)[i])
874 rxq_ctrl = container_of((*priv->rxqs)[i],
875 struct mlx5_rxq_ctrl, rxq);
876 rxq_ctrl->flow_mark_n = 0;
877 rxq_ctrl->rxq.mark = 0;
878 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
879 rxq_ctrl->flow_tunnels_n[j] = 0;
880 rxq_ctrl->rxq.tunnel = 0;
885 * return a pointer to the desired action in the list of actions.
888 * The list of actions to search the action in.
890 * The action to find.
893 * Pointer to the action in the list, if found. NULL otherwise.
895 const struct rte_flow_action *
896 mlx5_flow_find_action(const struct rte_flow_action *actions,
897 enum rte_flow_action_type action)
901 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
902 if (actions->type == action)
908 * Validate the flag action.
910 * @param[in] action_flags
911 * Bit-fields that holds the actions detected until now.
913 * Attributes of flow that includes this action.
915 * Pointer to error structure.
918 * 0 on success, a negative errno value otherwise and rte_errno is set.
921 mlx5_flow_validate_action_flag(uint64_t action_flags,
922 const struct rte_flow_attr *attr,
923 struct rte_flow_error *error)
925 if (action_flags & MLX5_FLOW_ACTION_MARK)
926 return rte_flow_error_set(error, EINVAL,
927 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
928 "can't mark and flag in same flow");
929 if (action_flags & MLX5_FLOW_ACTION_FLAG)
930 return rte_flow_error_set(error, EINVAL,
931 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
933 " actions in same flow");
935 return rte_flow_error_set(error, ENOTSUP,
936 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
937 "flag action not supported for "
943 * Validate the mark action.
946 * Pointer to the queue action.
947 * @param[in] action_flags
948 * Bit-fields that holds the actions detected until now.
950 * Attributes of flow that includes this action.
952 * Pointer to error structure.
955 * 0 on success, a negative errno value otherwise and rte_errno is set.
958 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
959 uint64_t action_flags,
960 const struct rte_flow_attr *attr,
961 struct rte_flow_error *error)
963 const struct rte_flow_action_mark *mark = action->conf;
966 return rte_flow_error_set(error, EINVAL,
967 RTE_FLOW_ERROR_TYPE_ACTION,
969 "configuration cannot be null");
970 if (mark->id >= MLX5_FLOW_MARK_MAX)
971 return rte_flow_error_set(error, EINVAL,
972 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
974 "mark id must in 0 <= id < "
975 RTE_STR(MLX5_FLOW_MARK_MAX));
976 if (action_flags & MLX5_FLOW_ACTION_FLAG)
977 return rte_flow_error_set(error, EINVAL,
978 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
979 "can't flag and mark in same flow");
980 if (action_flags & MLX5_FLOW_ACTION_MARK)
981 return rte_flow_error_set(error, EINVAL,
982 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
983 "can't have 2 mark actions in same"
986 return rte_flow_error_set(error, ENOTSUP,
987 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
988 "mark action not supported for "
994 * Validate the drop action.
996 * @param[in] action_flags
997 * Bit-fields that holds the actions detected until now.
999 * Attributes of flow that includes this action.
1001 * Pointer to error structure.
1004 * 0 on success, a negative errno value otherwise and rte_errno is set.
1007 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1008 const struct rte_flow_attr *attr,
1009 struct rte_flow_error *error)
1012 return rte_flow_error_set(error, ENOTSUP,
1013 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1014 "drop action not supported for "
1020 * Validate the queue action.
1023 * Pointer to the queue action.
1024 * @param[in] action_flags
1025 * Bit-fields that holds the actions detected until now.
1027 * Pointer to the Ethernet device structure.
1029 * Attributes of flow that includes this action.
1031 * Pointer to error structure.
1034 * 0 on success, a negative errno value otherwise and rte_errno is set.
1037 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1038 uint64_t action_flags,
1039 struct rte_eth_dev *dev,
1040 const struct rte_flow_attr *attr,
1041 struct rte_flow_error *error)
1043 struct mlx5_priv *priv = dev->data->dev_private;
1044 const struct rte_flow_action_queue *queue = action->conf;
1046 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1047 return rte_flow_error_set(error, EINVAL,
1048 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1049 "can't have 2 fate actions in"
1052 return rte_flow_error_set(error, EINVAL,
1053 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1054 NULL, "No Rx queues configured");
1055 if (queue->index >= priv->rxqs_n)
1056 return rte_flow_error_set(error, EINVAL,
1057 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1059 "queue index out of range");
1060 if (!(*priv->rxqs)[queue->index])
1061 return rte_flow_error_set(error, EINVAL,
1062 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1064 "queue is not configured");
1066 return rte_flow_error_set(error, ENOTSUP,
1067 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1068 "queue action not supported for "
1074 * Validate the rss action.
1077 * Pointer to the queue action.
1078 * @param[in] action_flags
1079 * Bit-fields that holds the actions detected until now.
1081 * Pointer to the Ethernet device structure.
1083 * Attributes of flow that includes this action.
1084 * @param[in] item_flags
1085 * Items that were detected.
1087 * Pointer to error structure.
1090 * 0 on success, a negative errno value otherwise and rte_errno is set.
1093 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1094 uint64_t action_flags,
1095 struct rte_eth_dev *dev,
1096 const struct rte_flow_attr *attr,
1097 uint64_t item_flags,
1098 struct rte_flow_error *error)
1100 struct mlx5_priv *priv = dev->data->dev_private;
1101 const struct rte_flow_action_rss *rss = action->conf;
1102 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1105 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1106 return rte_flow_error_set(error, EINVAL,
1107 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1108 "can't have 2 fate actions"
1110 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1111 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1112 return rte_flow_error_set(error, ENOTSUP,
1113 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1115 "RSS hash function not supported");
1116 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1121 return rte_flow_error_set(error, ENOTSUP,
1122 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1124 "tunnel RSS is not supported");
1125 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1126 if (rss->key_len == 0 && rss->key != NULL)
1127 return rte_flow_error_set(error, ENOTSUP,
1128 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1130 "RSS hash key length 0");
1131 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1132 return rte_flow_error_set(error, ENOTSUP,
1133 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1135 "RSS hash key too small");
1136 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1137 return rte_flow_error_set(error, ENOTSUP,
1138 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1140 "RSS hash key too large");
1141 if (rss->queue_num > priv->config.ind_table_max_size)
1142 return rte_flow_error_set(error, ENOTSUP,
1143 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1145 "number of queues too large");
1146 if (rss->types & MLX5_RSS_HF_MASK)
1147 return rte_flow_error_set(error, ENOTSUP,
1148 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1150 "some RSS protocols are not"
1152 if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1153 !(rss->types & ETH_RSS_IP))
1154 return rte_flow_error_set(error, EINVAL,
1155 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1156 "L3 partial RSS requested but L3 RSS"
1157 " type not specified");
1158 if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1159 !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1160 return rte_flow_error_set(error, EINVAL,
1161 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1162 "L4 partial RSS requested but L4 RSS"
1163 " type not specified");
1165 return rte_flow_error_set(error, EINVAL,
1166 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1167 NULL, "No Rx queues configured");
1168 if (!rss->queue_num)
1169 return rte_flow_error_set(error, EINVAL,
1170 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1171 NULL, "No queues configured");
1172 for (i = 0; i != rss->queue_num; ++i) {
1173 if (rss->queue[i] >= priv->rxqs_n)
1174 return rte_flow_error_set
1176 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1177 &rss->queue[i], "queue index out of range");
1178 if (!(*priv->rxqs)[rss->queue[i]])
1179 return rte_flow_error_set
1180 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1181 &rss->queue[i], "queue is not configured");
1184 return rte_flow_error_set(error, ENOTSUP,
1185 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1186 "rss action not supported for "
1188 if (rss->level > 1 && !tunnel)
1189 return rte_flow_error_set(error, EINVAL,
1190 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1191 "inner RSS is not supported for "
1192 "non-tunnel flows");
1197 * Validate the count action.
1200 * Pointer to the Ethernet device structure.
1202 * Attributes of flow that includes this action.
1204 * Pointer to error structure.
1207 * 0 on success, a negative errno value otherwise and rte_errno is set.
1210 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1211 const struct rte_flow_attr *attr,
1212 struct rte_flow_error *error)
1215 return rte_flow_error_set(error, ENOTSUP,
1216 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1217 "count action not supported for "
1223 * Verify the @p attributes will be correctly understood by the NIC and store
1224 * them in the @p flow if everything is correct.
1227 * Pointer to the Ethernet device structure.
1228 * @param[in] attributes
1229 * Pointer to flow attributes
1231 * Pointer to error structure.
1234 * 0 on success, a negative errno value otherwise and rte_errno is set.
1237 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1238 const struct rte_flow_attr *attributes,
1239 struct rte_flow_error *error)
1241 struct mlx5_priv *priv = dev->data->dev_private;
1242 uint32_t priority_max = priv->config.flow_prio - 1;
1244 if (attributes->group)
1245 return rte_flow_error_set(error, ENOTSUP,
1246 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1247 NULL, "groups is not supported");
1248 if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1249 attributes->priority >= priority_max)
1250 return rte_flow_error_set(error, ENOTSUP,
1251 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1252 NULL, "priority out of range");
1253 if (attributes->egress)
1254 return rte_flow_error_set(error, ENOTSUP,
1255 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1256 "egress is not supported");
1257 if (attributes->transfer && !priv->config.dv_esw_en)
1258 return rte_flow_error_set(error, ENOTSUP,
1259 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1260 NULL, "transfer is not supported");
1261 if (!attributes->ingress)
1262 return rte_flow_error_set(error, EINVAL,
1263 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1265 "ingress attribute is mandatory");
1270 * Validate ICMP6 item.
1273 * Item specification.
1274 * @param[in] item_flags
1275 * Bit-fields that holds the items detected until now.
1277 * Pointer to error structure.
1280 * 0 on success, a negative errno value otherwise and rte_errno is set.
1283 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1284 uint64_t item_flags,
1285 uint8_t target_protocol,
1286 struct rte_flow_error *error)
1288 const struct rte_flow_item_icmp6 *mask = item->mask;
1289 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1290 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1291 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1292 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1293 MLX5_FLOW_LAYER_OUTER_L4;
1296 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1297 return rte_flow_error_set(error, EINVAL,
1298 RTE_FLOW_ERROR_TYPE_ITEM, item,
1299 "protocol filtering not compatible"
1300 " with ICMP6 layer");
1301 if (!(item_flags & l3m))
1302 return rte_flow_error_set(error, EINVAL,
1303 RTE_FLOW_ERROR_TYPE_ITEM, item,
1304 "IPv6 is mandatory to filter on"
1306 if (item_flags & l4m)
1307 return rte_flow_error_set(error, EINVAL,
1308 RTE_FLOW_ERROR_TYPE_ITEM, item,
1309 "multiple L4 layers not supported");
1311 mask = &rte_flow_item_icmp6_mask;
1312 ret = mlx5_flow_item_acceptable
1313 (item, (const uint8_t *)mask,
1314 (const uint8_t *)&rte_flow_item_icmp6_mask,
1315 sizeof(struct rte_flow_item_icmp6), error);
1322 * Validate ICMP item.
1325 * Item specification.
1326 * @param[in] item_flags
1327 * Bit-fields that holds the items detected until now.
1329 * Pointer to error structure.
1332 * 0 on success, a negative errno value otherwise and rte_errno is set.
1335 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1336 uint64_t item_flags,
1337 uint8_t target_protocol,
1338 struct rte_flow_error *error)
1340 const struct rte_flow_item_icmp *mask = item->mask;
1341 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1342 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1343 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1344 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1345 MLX5_FLOW_LAYER_OUTER_L4;
1348 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1349 return rte_flow_error_set(error, EINVAL,
1350 RTE_FLOW_ERROR_TYPE_ITEM, item,
1351 "protocol filtering not compatible"
1352 " with ICMP layer");
1353 if (!(item_flags & l3m))
1354 return rte_flow_error_set(error, EINVAL,
1355 RTE_FLOW_ERROR_TYPE_ITEM, item,
1356 "IPv4 is mandatory to filter"
1358 if (item_flags & l4m)
1359 return rte_flow_error_set(error, EINVAL,
1360 RTE_FLOW_ERROR_TYPE_ITEM, item,
1361 "multiple L4 layers not supported");
1363 mask = &rte_flow_item_icmp_mask;
1364 ret = mlx5_flow_item_acceptable
1365 (item, (const uint8_t *)mask,
1366 (const uint8_t *)&rte_flow_item_icmp_mask,
1367 sizeof(struct rte_flow_item_icmp), error);
1374 * Validate Ethernet item.
1377 * Item specification.
1378 * @param[in] item_flags
1379 * Bit-fields that holds the items detected until now.
1381 * Pointer to error structure.
1384 * 0 on success, a negative errno value otherwise and rte_errno is set.
1387 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1388 uint64_t item_flags,
1389 struct rte_flow_error *error)
1391 const struct rte_flow_item_eth *mask = item->mask;
1392 const struct rte_flow_item_eth nic_mask = {
1393 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1394 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1395 .type = RTE_BE16(0xffff),
1398 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1399 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1400 MLX5_FLOW_LAYER_OUTER_L2;
1402 if (item_flags & ethm)
1403 return rte_flow_error_set(error, ENOTSUP,
1404 RTE_FLOW_ERROR_TYPE_ITEM, item,
1405 "multiple L2 layers not supported");
1406 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1407 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1408 return rte_flow_error_set(error, EINVAL,
1409 RTE_FLOW_ERROR_TYPE_ITEM, item,
1410 "L2 layer should not follow "
1412 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1413 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1414 return rte_flow_error_set(error, EINVAL,
1415 RTE_FLOW_ERROR_TYPE_ITEM, item,
1416 "L2 layer should not follow VLAN");
1418 mask = &rte_flow_item_eth_mask;
1419 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1420 (const uint8_t *)&nic_mask,
1421 sizeof(struct rte_flow_item_eth),
1427 * Validate VLAN item.
1430 * Item specification.
1431 * @param[in] item_flags
1432 * Bit-fields that holds the items detected until now.
1434 * Ethernet device flow is being created on.
1436 * Pointer to error structure.
1439 * 0 on success, a negative errno value otherwise and rte_errno is set.
1442 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1443 uint64_t item_flags,
1444 struct rte_eth_dev *dev,
1445 struct rte_flow_error *error)
1447 const struct rte_flow_item_vlan *spec = item->spec;
1448 const struct rte_flow_item_vlan *mask = item->mask;
1449 const struct rte_flow_item_vlan nic_mask = {
1450 .tci = RTE_BE16(UINT16_MAX),
1451 .inner_type = RTE_BE16(UINT16_MAX),
1453 uint16_t vlan_tag = 0;
1454 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1456 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1457 MLX5_FLOW_LAYER_INNER_L4) :
1458 (MLX5_FLOW_LAYER_OUTER_L3 |
1459 MLX5_FLOW_LAYER_OUTER_L4);
1460 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1461 MLX5_FLOW_LAYER_OUTER_VLAN;
1463 if (item_flags & vlanm)
1464 return rte_flow_error_set(error, EINVAL,
1465 RTE_FLOW_ERROR_TYPE_ITEM, item,
1466 "multiple VLAN layers not supported");
1467 else if ((item_flags & l34m) != 0)
1468 return rte_flow_error_set(error, EINVAL,
1469 RTE_FLOW_ERROR_TYPE_ITEM, item,
1470 "VLAN cannot follow L3/L4 layer");
1472 mask = &rte_flow_item_vlan_mask;
1473 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1474 (const uint8_t *)&nic_mask,
1475 sizeof(struct rte_flow_item_vlan),
1479 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1480 struct mlx5_priv *priv = dev->data->dev_private;
1482 if (priv->vmwa_context) {
1484 * Non-NULL context means we have a virtual machine
1485 * and SR-IOV enabled, we have to create VLAN interface
1486 * to make hypervisor to setup E-Switch vport
1487 * context correctly. We avoid creating the multiple
1488 * VLAN interfaces, so we cannot support VLAN tag mask.
1490 return rte_flow_error_set(error, EINVAL,
1491 RTE_FLOW_ERROR_TYPE_ITEM,
1493 "VLAN tag mask is not"
1494 " supported in virtual"
1499 vlan_tag = spec->tci;
1500 vlan_tag &= mask->tci;
1503 * From verbs perspective an empty VLAN is equivalent
1504 * to a packet without VLAN layer.
1507 return rte_flow_error_set(error, EINVAL,
1508 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1510 "VLAN cannot be empty");
1515 * Validate IPV4 item.
1518 * Item specification.
1519 * @param[in] item_flags
1520 * Bit-fields that holds the items detected until now.
1521 * @param[in] acc_mask
1522 * Acceptable mask, if NULL default internal default mask
1523 * will be used to check whether item fields are supported.
1525 * Pointer to error structure.
1528 * 0 on success, a negative errno value otherwise and rte_errno is set.
1531 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1532 uint64_t item_flags,
1534 uint16_t ether_type,
1535 const struct rte_flow_item_ipv4 *acc_mask,
1536 struct rte_flow_error *error)
1538 const struct rte_flow_item_ipv4 *mask = item->mask;
1539 const struct rte_flow_item_ipv4 *spec = item->spec;
1540 const struct rte_flow_item_ipv4 nic_mask = {
1542 .src_addr = RTE_BE32(0xffffffff),
1543 .dst_addr = RTE_BE32(0xffffffff),
1544 .type_of_service = 0xff,
1545 .next_proto_id = 0xff,
1548 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1549 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1550 MLX5_FLOW_LAYER_OUTER_L3;
1551 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1552 MLX5_FLOW_LAYER_OUTER_L4;
1554 uint8_t next_proto = 0xFF;
1555 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1556 MLX5_FLOW_LAYER_OUTER_VLAN |
1557 MLX5_FLOW_LAYER_INNER_VLAN);
1559 if ((last_item & l2_vlan) && ether_type &&
1560 ether_type != RTE_ETHER_TYPE_IPV4)
1561 return rte_flow_error_set(error, EINVAL,
1562 RTE_FLOW_ERROR_TYPE_ITEM, item,
1563 "IPv4 cannot follow L2/VLAN layer "
1564 "which ether type is not IPv4");
1565 if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1567 next_proto = mask->hdr.next_proto_id &
1568 spec->hdr.next_proto_id;
1569 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1570 return rte_flow_error_set(error, EINVAL,
1571 RTE_FLOW_ERROR_TYPE_ITEM,
1576 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1577 return rte_flow_error_set(error, EINVAL,
1578 RTE_FLOW_ERROR_TYPE_ITEM, item,
1579 "wrong tunnel type - IPv6 specified "
1580 "but IPv4 item provided");
1581 if (item_flags & l3m)
1582 return rte_flow_error_set(error, ENOTSUP,
1583 RTE_FLOW_ERROR_TYPE_ITEM, item,
1584 "multiple L3 layers not supported");
1585 else if (item_flags & l4m)
1586 return rte_flow_error_set(error, EINVAL,
1587 RTE_FLOW_ERROR_TYPE_ITEM, item,
1588 "L3 cannot follow an L4 layer.");
1589 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1590 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1591 return rte_flow_error_set(error, EINVAL,
1592 RTE_FLOW_ERROR_TYPE_ITEM, item,
1593 "L3 cannot follow an NVGRE layer.");
1595 mask = &rte_flow_item_ipv4_mask;
1596 else if (mask->hdr.next_proto_id != 0 &&
1597 mask->hdr.next_proto_id != 0xff)
1598 return rte_flow_error_set(error, EINVAL,
1599 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1600 "partial mask is not supported"
1602 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1603 acc_mask ? (const uint8_t *)acc_mask
1604 : (const uint8_t *)&nic_mask,
1605 sizeof(struct rte_flow_item_ipv4),
1613 * Validate IPV6 item.
1616 * Item specification.
1617 * @param[in] item_flags
1618 * Bit-fields that holds the items detected until now.
1619 * @param[in] acc_mask
1620 * Acceptable mask, if NULL default internal default mask
1621 * will be used to check whether item fields are supported.
1623 * Pointer to error structure.
1626 * 0 on success, a negative errno value otherwise and rte_errno is set.
1629 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1630 uint64_t item_flags,
1632 uint16_t ether_type,
1633 const struct rte_flow_item_ipv6 *acc_mask,
1634 struct rte_flow_error *error)
1636 const struct rte_flow_item_ipv6 *mask = item->mask;
1637 const struct rte_flow_item_ipv6 *spec = item->spec;
1638 const struct rte_flow_item_ipv6 nic_mask = {
1641 "\xff\xff\xff\xff\xff\xff\xff\xff"
1642 "\xff\xff\xff\xff\xff\xff\xff\xff",
1644 "\xff\xff\xff\xff\xff\xff\xff\xff"
1645 "\xff\xff\xff\xff\xff\xff\xff\xff",
1646 .vtc_flow = RTE_BE32(0xffffffff),
1650 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1651 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1652 MLX5_FLOW_LAYER_OUTER_L3;
1653 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1654 MLX5_FLOW_LAYER_OUTER_L4;
1656 uint8_t next_proto = 0xFF;
1657 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1658 MLX5_FLOW_LAYER_OUTER_VLAN |
1659 MLX5_FLOW_LAYER_INNER_VLAN);
1661 if ((last_item & l2_vlan) && ether_type &&
1662 ether_type != RTE_ETHER_TYPE_IPV6)
1663 return rte_flow_error_set(error, EINVAL,
1664 RTE_FLOW_ERROR_TYPE_ITEM, item,
1665 "IPv6 cannot follow L2/VLAN layer "
1666 "which ether type is not IPv6");
1667 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1669 next_proto = mask->hdr.proto & spec->hdr.proto;
1670 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1671 return rte_flow_error_set(error, EINVAL,
1672 RTE_FLOW_ERROR_TYPE_ITEM,
1677 if (item_flags & MLX5_FLOW_LAYER_IPIP)
1678 return rte_flow_error_set(error, EINVAL,
1679 RTE_FLOW_ERROR_TYPE_ITEM, item,
1680 "wrong tunnel type - IPv4 specified "
1681 "but IPv6 item provided");
1682 if (item_flags & l3m)
1683 return rte_flow_error_set(error, ENOTSUP,
1684 RTE_FLOW_ERROR_TYPE_ITEM, item,
1685 "multiple L3 layers not supported");
1686 else if (item_flags & l4m)
1687 return rte_flow_error_set(error, EINVAL,
1688 RTE_FLOW_ERROR_TYPE_ITEM, item,
1689 "L3 cannot follow an L4 layer.");
1690 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1691 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1692 return rte_flow_error_set(error, EINVAL,
1693 RTE_FLOW_ERROR_TYPE_ITEM, item,
1694 "L3 cannot follow an NVGRE layer.");
1696 mask = &rte_flow_item_ipv6_mask;
1697 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1698 acc_mask ? (const uint8_t *)acc_mask
1699 : (const uint8_t *)&nic_mask,
1700 sizeof(struct rte_flow_item_ipv6),
1708 * Validate UDP item.
1711 * Item specification.
1712 * @param[in] item_flags
1713 * Bit-fields that holds the items detected until now.
1714 * @param[in] target_protocol
1715 * The next protocol in the previous item.
1716 * @param[in] flow_mask
1717 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1719 * Pointer to error structure.
1722 * 0 on success, a negative errno value otherwise and rte_errno is set.
1725 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1726 uint64_t item_flags,
1727 uint8_t target_protocol,
1728 struct rte_flow_error *error)
1730 const struct rte_flow_item_udp *mask = item->mask;
1731 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1732 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1733 MLX5_FLOW_LAYER_OUTER_L3;
1734 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1735 MLX5_FLOW_LAYER_OUTER_L4;
1738 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1739 return rte_flow_error_set(error, EINVAL,
1740 RTE_FLOW_ERROR_TYPE_ITEM, item,
1741 "protocol filtering not compatible"
1743 if (!(item_flags & l3m))
1744 return rte_flow_error_set(error, EINVAL,
1745 RTE_FLOW_ERROR_TYPE_ITEM, item,
1746 "L3 is mandatory to filter on L4");
1747 if (item_flags & l4m)
1748 return rte_flow_error_set(error, EINVAL,
1749 RTE_FLOW_ERROR_TYPE_ITEM, item,
1750 "multiple L4 layers not supported");
1752 mask = &rte_flow_item_udp_mask;
1753 ret = mlx5_flow_item_acceptable
1754 (item, (const uint8_t *)mask,
1755 (const uint8_t *)&rte_flow_item_udp_mask,
1756 sizeof(struct rte_flow_item_udp), error);
1763 * Validate TCP item.
1766 * Item specification.
1767 * @param[in] item_flags
1768 * Bit-fields that holds the items detected until now.
1769 * @param[in] target_protocol
1770 * The next protocol in the previous item.
1772 * Pointer to error structure.
1775 * 0 on success, a negative errno value otherwise and rte_errno is set.
1778 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1779 uint64_t item_flags,
1780 uint8_t target_protocol,
1781 const struct rte_flow_item_tcp *flow_mask,
1782 struct rte_flow_error *error)
1784 const struct rte_flow_item_tcp *mask = item->mask;
1785 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1786 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1787 MLX5_FLOW_LAYER_OUTER_L3;
1788 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1789 MLX5_FLOW_LAYER_OUTER_L4;
1792 MLX5_ASSERT(flow_mask);
1793 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1794 return rte_flow_error_set(error, EINVAL,
1795 RTE_FLOW_ERROR_TYPE_ITEM, item,
1796 "protocol filtering not compatible"
1798 if (!(item_flags & l3m))
1799 return rte_flow_error_set(error, EINVAL,
1800 RTE_FLOW_ERROR_TYPE_ITEM, item,
1801 "L3 is mandatory to filter on L4");
1802 if (item_flags & l4m)
1803 return rte_flow_error_set(error, EINVAL,
1804 RTE_FLOW_ERROR_TYPE_ITEM, item,
1805 "multiple L4 layers not supported");
1807 mask = &rte_flow_item_tcp_mask;
1808 ret = mlx5_flow_item_acceptable
1809 (item, (const uint8_t *)mask,
1810 (const uint8_t *)flow_mask,
1811 sizeof(struct rte_flow_item_tcp), error);
1818 * Validate VXLAN item.
1821 * Item specification.
1822 * @param[in] item_flags
1823 * Bit-fields that holds the items detected until now.
1824 * @param[in] target_protocol
1825 * The next protocol in the previous item.
1827 * Pointer to error structure.
1830 * 0 on success, a negative errno value otherwise and rte_errno is set.
1833 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1834 uint64_t item_flags,
1835 struct rte_flow_error *error)
1837 const struct rte_flow_item_vxlan *spec = item->spec;
1838 const struct rte_flow_item_vxlan *mask = item->mask;
1843 } id = { .vlan_id = 0, };
1846 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1847 return rte_flow_error_set(error, ENOTSUP,
1848 RTE_FLOW_ERROR_TYPE_ITEM, item,
1849 "multiple tunnel layers not"
1852 * Verify only UDPv4 is present as defined in
1853 * https://tools.ietf.org/html/rfc7348
1855 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1856 return rte_flow_error_set(error, EINVAL,
1857 RTE_FLOW_ERROR_TYPE_ITEM, item,
1858 "no outer UDP layer found");
1860 mask = &rte_flow_item_vxlan_mask;
1861 ret = mlx5_flow_item_acceptable
1862 (item, (const uint8_t *)mask,
1863 (const uint8_t *)&rte_flow_item_vxlan_mask,
1864 sizeof(struct rte_flow_item_vxlan),
1869 memcpy(&id.vni[1], spec->vni, 3);
1870 memcpy(&id.vni[1], mask->vni, 3);
1872 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1873 return rte_flow_error_set(error, ENOTSUP,
1874 RTE_FLOW_ERROR_TYPE_ITEM, item,
1875 "VXLAN tunnel must be fully defined");
1880 * Validate VXLAN_GPE item.
1883 * Item specification.
1884 * @param[in] item_flags
1885 * Bit-fields that holds the items detected until now.
1887 * Pointer to the private data structure.
1888 * @param[in] target_protocol
1889 * The next protocol in the previous item.
1891 * Pointer to error structure.
1894 * 0 on success, a negative errno value otherwise and rte_errno is set.
1897 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1898 uint64_t item_flags,
1899 struct rte_eth_dev *dev,
1900 struct rte_flow_error *error)
1902 struct mlx5_priv *priv = dev->data->dev_private;
1903 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1904 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1909 } id = { .vlan_id = 0, };
1911 if (!priv->config.l3_vxlan_en)
1912 return rte_flow_error_set(error, ENOTSUP,
1913 RTE_FLOW_ERROR_TYPE_ITEM, item,
1914 "L3 VXLAN is not enabled by device"
1915 " parameter and/or not configured in"
1917 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1918 return rte_flow_error_set(error, ENOTSUP,
1919 RTE_FLOW_ERROR_TYPE_ITEM, item,
1920 "multiple tunnel layers not"
1923 * Verify only UDPv4 is present as defined in
1924 * https://tools.ietf.org/html/rfc7348
1926 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1927 return rte_flow_error_set(error, EINVAL,
1928 RTE_FLOW_ERROR_TYPE_ITEM, item,
1929 "no outer UDP layer found");
1931 mask = &rte_flow_item_vxlan_gpe_mask;
1932 ret = mlx5_flow_item_acceptable
1933 (item, (const uint8_t *)mask,
1934 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1935 sizeof(struct rte_flow_item_vxlan_gpe),
1941 return rte_flow_error_set(error, ENOTSUP,
1942 RTE_FLOW_ERROR_TYPE_ITEM,
1944 "VxLAN-GPE protocol"
1946 memcpy(&id.vni[1], spec->vni, 3);
1947 memcpy(&id.vni[1], mask->vni, 3);
1949 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1950 return rte_flow_error_set(error, ENOTSUP,
1951 RTE_FLOW_ERROR_TYPE_ITEM, item,
1952 "VXLAN-GPE tunnel must be fully"
1957 * Validate GRE Key item.
1960 * Item specification.
1961 * @param[in] item_flags
1962 * Bit flags to mark detected items.
1963 * @param[in] gre_item
1964 * Pointer to gre_item
1966 * Pointer to error structure.
1969 * 0 on success, a negative errno value otherwise and rte_errno is set.
1972 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1973 uint64_t item_flags,
1974 const struct rte_flow_item *gre_item,
1975 struct rte_flow_error *error)
1977 const rte_be32_t *mask = item->mask;
1979 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1980 const struct rte_flow_item_gre *gre_spec;
1981 const struct rte_flow_item_gre *gre_mask;
1983 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1984 return rte_flow_error_set(error, ENOTSUP,
1985 RTE_FLOW_ERROR_TYPE_ITEM, item,
1986 "Multiple GRE key not support");
1987 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1988 return rte_flow_error_set(error, ENOTSUP,
1989 RTE_FLOW_ERROR_TYPE_ITEM, item,
1990 "No preceding GRE header");
1991 if (item_flags & MLX5_FLOW_LAYER_INNER)
1992 return rte_flow_error_set(error, ENOTSUP,
1993 RTE_FLOW_ERROR_TYPE_ITEM, item,
1994 "GRE key following a wrong item");
1995 gre_mask = gre_item->mask;
1997 gre_mask = &rte_flow_item_gre_mask;
1998 gre_spec = gre_item->spec;
1999 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2000 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2001 return rte_flow_error_set(error, EINVAL,
2002 RTE_FLOW_ERROR_TYPE_ITEM, item,
2003 "Key bit must be on");
2006 mask = &gre_key_default_mask;
2007 ret = mlx5_flow_item_acceptable
2008 (item, (const uint8_t *)mask,
2009 (const uint8_t *)&gre_key_default_mask,
2010 sizeof(rte_be32_t), error);
2015 * Validate GRE item.
2018 * Item specification.
2019 * @param[in] item_flags
2020 * Bit flags to mark detected items.
2021 * @param[in] target_protocol
2022 * The next protocol in the previous item.
2024 * Pointer to error structure.
2027 * 0 on success, a negative errno value otherwise and rte_errno is set.
2030 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2031 uint64_t item_flags,
2032 uint8_t target_protocol,
2033 struct rte_flow_error *error)
2035 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2036 const struct rte_flow_item_gre *mask = item->mask;
2038 const struct rte_flow_item_gre nic_mask = {
2039 .c_rsvd0_ver = RTE_BE16(0xB000),
2040 .protocol = RTE_BE16(UINT16_MAX),
2043 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2044 return rte_flow_error_set(error, EINVAL,
2045 RTE_FLOW_ERROR_TYPE_ITEM, item,
2046 "protocol filtering not compatible"
2047 " with this GRE layer");
2048 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2049 return rte_flow_error_set(error, ENOTSUP,
2050 RTE_FLOW_ERROR_TYPE_ITEM, item,
2051 "multiple tunnel layers not"
2053 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2054 return rte_flow_error_set(error, ENOTSUP,
2055 RTE_FLOW_ERROR_TYPE_ITEM, item,
2056 "L3 Layer is missing");
2058 mask = &rte_flow_item_gre_mask;
2059 ret = mlx5_flow_item_acceptable
2060 (item, (const uint8_t *)mask,
2061 (const uint8_t *)&nic_mask,
2062 sizeof(struct rte_flow_item_gre), error);
2065 #ifndef HAVE_MLX5DV_DR
2066 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2067 if (spec && (spec->protocol & mask->protocol))
2068 return rte_flow_error_set(error, ENOTSUP,
2069 RTE_FLOW_ERROR_TYPE_ITEM, item,
2070 "without MPLS support the"
2071 " specification cannot be used for"
2079 * Validate Geneve item.
2082 * Item specification.
2083 * @param[in] itemFlags
2084 * Bit-fields that holds the items detected until now.
2086 * Pointer to the private data structure.
2088 * Pointer to error structure.
2091 * 0 on success, a negative errno value otherwise and rte_errno is set.
2095 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2096 uint64_t item_flags,
2097 struct rte_eth_dev *dev,
2098 struct rte_flow_error *error)
2100 struct mlx5_priv *priv = dev->data->dev_private;
2101 const struct rte_flow_item_geneve *spec = item->spec;
2102 const struct rte_flow_item_geneve *mask = item->mask;
2105 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2106 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2107 const struct rte_flow_item_geneve nic_mask = {
2108 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2109 .vni = "\xff\xff\xff",
2110 .protocol = RTE_BE16(UINT16_MAX),
2113 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2114 return rte_flow_error_set(error, ENOTSUP,
2115 RTE_FLOW_ERROR_TYPE_ITEM, item,
2116 "L3 Geneve is not enabled by device"
2117 " parameter and/or not configured in"
2119 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2120 return rte_flow_error_set(error, ENOTSUP,
2121 RTE_FLOW_ERROR_TYPE_ITEM, item,
2122 "multiple tunnel layers not"
2125 * Verify only UDPv4 is present as defined in
2126 * https://tools.ietf.org/html/rfc7348
2128 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2129 return rte_flow_error_set(error, EINVAL,
2130 RTE_FLOW_ERROR_TYPE_ITEM, item,
2131 "no outer UDP layer found");
2133 mask = &rte_flow_item_geneve_mask;
2134 ret = mlx5_flow_item_acceptable
2135 (item, (const uint8_t *)mask,
2136 (const uint8_t *)&nic_mask,
2137 sizeof(struct rte_flow_item_geneve), error);
2141 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2142 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2143 MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2144 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2145 return rte_flow_error_set(error, ENOTSUP,
2146 RTE_FLOW_ERROR_TYPE_ITEM,
2148 "Geneve protocol unsupported"
2149 " fields are being used");
2150 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2151 return rte_flow_error_set
2153 RTE_FLOW_ERROR_TYPE_ITEM,
2155 "Unsupported Geneve options length");
2157 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2158 return rte_flow_error_set
2160 RTE_FLOW_ERROR_TYPE_ITEM, item,
2161 "Geneve tunnel must be fully defined");
2166 * Validate MPLS item.
2169 * Pointer to the rte_eth_dev structure.
2171 * Item specification.
2172 * @param[in] item_flags
2173 * Bit-fields that holds the items detected until now.
2174 * @param[in] prev_layer
2175 * The protocol layer indicated in previous item.
2177 * Pointer to error structure.
2180 * 0 on success, a negative errno value otherwise and rte_errno is set.
2183 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2184 const struct rte_flow_item *item __rte_unused,
2185 uint64_t item_flags __rte_unused,
2186 uint64_t prev_layer __rte_unused,
2187 struct rte_flow_error *error)
2189 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2190 const struct rte_flow_item_mpls *mask = item->mask;
2191 struct mlx5_priv *priv = dev->data->dev_private;
2194 if (!priv->config.mpls_en)
2195 return rte_flow_error_set(error, ENOTSUP,
2196 RTE_FLOW_ERROR_TYPE_ITEM, item,
2197 "MPLS not supported or"
2198 " disabled in firmware"
2200 /* MPLS over IP, UDP, GRE is allowed */
2201 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2202 MLX5_FLOW_LAYER_OUTER_L4_UDP |
2203 MLX5_FLOW_LAYER_GRE)))
2204 return rte_flow_error_set(error, EINVAL,
2205 RTE_FLOW_ERROR_TYPE_ITEM, item,
2206 "protocol filtering not compatible"
2207 " with MPLS layer");
2208 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2209 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2210 !(item_flags & MLX5_FLOW_LAYER_GRE))
2211 return rte_flow_error_set(error, ENOTSUP,
2212 RTE_FLOW_ERROR_TYPE_ITEM, item,
2213 "multiple tunnel layers not"
2216 mask = &rte_flow_item_mpls_mask;
2217 ret = mlx5_flow_item_acceptable
2218 (item, (const uint8_t *)mask,
2219 (const uint8_t *)&rte_flow_item_mpls_mask,
2220 sizeof(struct rte_flow_item_mpls), error);
2225 return rte_flow_error_set(error, ENOTSUP,
2226 RTE_FLOW_ERROR_TYPE_ITEM, item,
2227 "MPLS is not supported by Verbs, please"
2232 * Validate NVGRE item.
2235 * Item specification.
2236 * @param[in] item_flags
2237 * Bit flags to mark detected items.
2238 * @param[in] target_protocol
2239 * The next protocol in the previous item.
2241 * Pointer to error structure.
2244 * 0 on success, a negative errno value otherwise and rte_errno is set.
2247 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2248 uint64_t item_flags,
2249 uint8_t target_protocol,
2250 struct rte_flow_error *error)
2252 const struct rte_flow_item_nvgre *mask = item->mask;
2255 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2256 return rte_flow_error_set(error, EINVAL,
2257 RTE_FLOW_ERROR_TYPE_ITEM, item,
2258 "protocol filtering not compatible"
2259 " with this GRE layer");
2260 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2261 return rte_flow_error_set(error, ENOTSUP,
2262 RTE_FLOW_ERROR_TYPE_ITEM, item,
2263 "multiple tunnel layers not"
2265 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2266 return rte_flow_error_set(error, ENOTSUP,
2267 RTE_FLOW_ERROR_TYPE_ITEM, item,
2268 "L3 Layer is missing");
2270 mask = &rte_flow_item_nvgre_mask;
2271 ret = mlx5_flow_item_acceptable
2272 (item, (const uint8_t *)mask,
2273 (const uint8_t *)&rte_flow_item_nvgre_mask,
2274 sizeof(struct rte_flow_item_nvgre), error);
2280 /* Allocate unique ID for the split Q/RSS subflows. */
2282 flow_qrss_get_id(struct rte_eth_dev *dev)
2284 struct mlx5_priv *priv = dev->data->dev_private;
2285 uint32_t qrss_id, ret;
2287 ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2290 MLX5_ASSERT(qrss_id);
2294 /* Free unique ID for the split Q/RSS subflows. */
2296 flow_qrss_free_id(struct rte_eth_dev *dev, uint32_t qrss_id)
2298 struct mlx5_priv *priv = dev->data->dev_private;
2301 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2305 * Release resource related QUEUE/RSS action split.
2308 * Pointer to Ethernet device.
2310 * Flow to release id's from.
2313 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2314 struct rte_flow *flow)
2316 struct mlx5_flow_handle *dev_handle;
2318 LIST_FOREACH(dev_handle, &flow->dev_handles, next)
2319 if (dev_handle->qrss_id)
2320 flow_qrss_free_id(dev, dev_handle->qrss_id);
2324 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2325 const struct rte_flow_attr *attr __rte_unused,
2326 const struct rte_flow_item items[] __rte_unused,
2327 const struct rte_flow_action actions[] __rte_unused,
2328 bool external __rte_unused,
2329 struct rte_flow_error *error)
2331 return rte_flow_error_set(error, ENOTSUP,
2332 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2335 static struct mlx5_flow *
2336 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2337 const struct rte_flow_attr *attr __rte_unused,
2338 const struct rte_flow_item items[] __rte_unused,
2339 const struct rte_flow_action actions[] __rte_unused,
2340 struct rte_flow_error *error)
2342 rte_flow_error_set(error, ENOTSUP,
2343 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2348 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2349 struct mlx5_flow *dev_flow __rte_unused,
2350 const struct rte_flow_attr *attr __rte_unused,
2351 const struct rte_flow_item items[] __rte_unused,
2352 const struct rte_flow_action actions[] __rte_unused,
2353 struct rte_flow_error *error)
2355 return rte_flow_error_set(error, ENOTSUP,
2356 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2360 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2361 struct rte_flow *flow __rte_unused,
2362 struct rte_flow_error *error)
2364 return rte_flow_error_set(error, ENOTSUP,
2365 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2369 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2370 struct rte_flow *flow __rte_unused)
2375 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2376 struct rte_flow *flow __rte_unused)
2381 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2382 struct rte_flow *flow __rte_unused,
2383 const struct rte_flow_action *actions __rte_unused,
2384 void *data __rte_unused,
2385 struct rte_flow_error *error)
2387 return rte_flow_error_set(error, ENOTSUP,
2388 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2391 /* Void driver to protect from null pointer reference. */
2392 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2393 .validate = flow_null_validate,
2394 .prepare = flow_null_prepare,
2395 .translate = flow_null_translate,
2396 .apply = flow_null_apply,
2397 .remove = flow_null_remove,
2398 .destroy = flow_null_destroy,
2399 .query = flow_null_query,
2403 * Select flow driver type according to flow attributes and device
2407 * Pointer to the dev structure.
2409 * Pointer to the flow attributes.
2412 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2414 static enum mlx5_flow_drv_type
2415 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2417 struct mlx5_priv *priv = dev->data->dev_private;
2418 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2420 if (attr->transfer && priv->config.dv_esw_en)
2421 type = MLX5_FLOW_TYPE_DV;
2422 if (!attr->transfer)
2423 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2424 MLX5_FLOW_TYPE_VERBS;
2428 #define flow_get_drv_ops(type) flow_drv_ops[type]
2431 * Flow driver validation API. This abstracts calling driver specific functions.
2432 * The type of flow driver is determined according to flow attributes.
2435 * Pointer to the dev structure.
2437 * Pointer to the flow attributes.
2439 * Pointer to the list of items.
2440 * @param[in] actions
2441 * Pointer to the list of actions.
2442 * @param[in] external
2443 * This flow rule is created by request external to PMD.
2445 * Pointer to the error structure.
2448 * 0 on success, a negative errno value otherwise and rte_errno is set.
2451 flow_drv_validate(struct rte_eth_dev *dev,
2452 const struct rte_flow_attr *attr,
2453 const struct rte_flow_item items[],
2454 const struct rte_flow_action actions[],
2455 bool external, struct rte_flow_error *error)
2457 const struct mlx5_flow_driver_ops *fops;
2458 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2460 fops = flow_get_drv_ops(type);
2461 return fops->validate(dev, attr, items, actions, external, error);
2465 * Flow driver preparation API. This abstracts calling driver specific
2466 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2467 * calculates the size of memory required for device flow, allocates the memory,
2468 * initializes the device flow and returns the pointer.
2471 * This function initializes device flow structure such as dv or verbs in
2472 * struct mlx5_flow. However, it is caller's responsibility to initialize the
2473 * rest. For example, adding returning device flow to flow->dev_flow list and
2474 * setting backward reference to the flow should be done out of this function.
2475 * layers field is not filled either.
2478 * Pointer to the dev structure.
2480 * Pointer to the flow attributes.
2482 * Pointer to the list of items.
2483 * @param[in] actions
2484 * Pointer to the list of actions.
2486 * Pointer to the error structure.
2489 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
2491 static inline struct mlx5_flow *
2492 flow_drv_prepare(struct rte_eth_dev *dev,
2493 const struct rte_flow *flow,
2494 const struct rte_flow_attr *attr,
2495 const struct rte_flow_item items[],
2496 const struct rte_flow_action actions[],
2497 struct rte_flow_error *error)
2499 const struct mlx5_flow_driver_ops *fops;
2500 enum mlx5_flow_drv_type type = flow->drv_type;
2502 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2503 fops = flow_get_drv_ops(type);
2504 return fops->prepare(dev, attr, items, actions, error);
2508 * Flow driver translation API. This abstracts calling driver specific
2509 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2510 * translates a generic flow into a driver flow. flow_drv_prepare() must
2514 * dev_flow->layers could be filled as a result of parsing during translation
2515 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2516 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2517 * flow->actions could be overwritten even though all the expanded dev_flows
2518 * have the same actions.
2521 * Pointer to the rte dev structure.
2522 * @param[in, out] dev_flow
2523 * Pointer to the mlx5 flow.
2525 * Pointer to the flow attributes.
2527 * Pointer to the list of items.
2528 * @param[in] actions
2529 * Pointer to the list of actions.
2531 * Pointer to the error structure.
2534 * 0 on success, a negative errno value otherwise and rte_errno is set.
2537 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2538 const struct rte_flow_attr *attr,
2539 const struct rte_flow_item items[],
2540 const struct rte_flow_action actions[],
2541 struct rte_flow_error *error)
2543 const struct mlx5_flow_driver_ops *fops;
2544 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2546 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2547 fops = flow_get_drv_ops(type);
2548 return fops->translate(dev, dev_flow, attr, items, actions, error);
2552 * Flow driver apply API. This abstracts calling driver specific functions.
2553 * Parent flow (rte_flow) should have driver type (drv_type). It applies
2554 * translated driver flows on to device. flow_drv_translate() must precede.
2557 * Pointer to Ethernet device structure.
2558 * @param[in, out] flow
2559 * Pointer to flow structure.
2561 * Pointer to error structure.
2564 * 0 on success, a negative errno value otherwise and rte_errno is set.
2567 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2568 struct rte_flow_error *error)
2570 const struct mlx5_flow_driver_ops *fops;
2571 enum mlx5_flow_drv_type type = flow->drv_type;
2573 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2574 fops = flow_get_drv_ops(type);
2575 return fops->apply(dev, flow, error);
2579 * Flow driver remove API. This abstracts calling driver specific functions.
2580 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2581 * on device. All the resources of the flow should be freed by calling
2582 * flow_drv_destroy().
2585 * Pointer to Ethernet device.
2586 * @param[in, out] flow
2587 * Pointer to flow structure.
2590 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2592 const struct mlx5_flow_driver_ops *fops;
2593 enum mlx5_flow_drv_type type = flow->drv_type;
2595 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2596 fops = flow_get_drv_ops(type);
2597 fops->remove(dev, flow);
2601 * Flow driver destroy API. This abstracts calling driver specific functions.
2602 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2603 * on device and releases resources of the flow.
2606 * Pointer to Ethernet device.
2607 * @param[in, out] flow
2608 * Pointer to flow structure.
2611 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2613 const struct mlx5_flow_driver_ops *fops;
2614 enum mlx5_flow_drv_type type = flow->drv_type;
2616 flow_mreg_split_qrss_release(dev, flow);
2617 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2618 fops = flow_get_drv_ops(type);
2619 fops->destroy(dev, flow);
2623 * Validate a flow supported by the NIC.
2625 * @see rte_flow_validate()
2629 mlx5_flow_validate(struct rte_eth_dev *dev,
2630 const struct rte_flow_attr *attr,
2631 const struct rte_flow_item items[],
2632 const struct rte_flow_action actions[],
2633 struct rte_flow_error *error)
2637 ret = flow_drv_validate(dev, attr, items, actions, true, error);
2644 * Get RSS action from the action list.
2646 * @param[in] actions
2647 * Pointer to the list of actions.
2650 * Pointer to the RSS action if exist, else return NULL.
2652 static const struct rte_flow_action_rss*
2653 flow_get_rss_action(const struct rte_flow_action actions[])
2655 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2656 switch (actions->type) {
2657 case RTE_FLOW_ACTION_TYPE_RSS:
2658 return (const struct rte_flow_action_rss *)
2668 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2670 const struct rte_flow_item *item;
2671 unsigned int has_vlan = 0;
2673 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2674 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2680 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2681 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2682 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2683 MLX5_EXPANSION_ROOT_OUTER;
2687 * Get layer flags from the prefix flow.
2689 * Some flows may be split to several subflows, the prefix subflow gets the
2690 * match items and the suffix sub flow gets the actions.
2691 * Some actions need the user defined match item flags to get the detail for
2693 * This function helps the suffix flow to get the item layer flags from prefix
2696 * @param[in] dev_flow
2697 * Pointer the created preifx subflow.
2700 * The layers get from prefix subflow.
2702 static inline uint64_t
2703 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
2705 uint64_t layers = 0;
2708 * Layers bits could be localization, but usually the compiler will
2709 * help to do the optimization work for source code.
2710 * If no decap actions, use the layers directly.
2712 if (!(dev_flow->handle->act_flags & MLX5_FLOW_ACTION_DECAP))
2713 return dev_flow->handle->layers;
2714 /* Convert L3 layers with decap action. */
2715 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
2716 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2717 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
2718 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2719 /* Convert L4 layers with decap action. */
2720 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
2721 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
2722 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
2723 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
2728 * Get metadata split action information.
2730 * @param[in] actions
2731 * Pointer to the list of actions.
2733 * Pointer to the return pointer.
2734 * @param[out] qrss_type
2735 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2736 * if no QUEUE/RSS is found.
2737 * @param[out] encap_idx
2738 * Pointer to the index of the encap action if exists, otherwise the last
2742 * Total number of actions.
2745 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
2746 const struct rte_flow_action **qrss,
2749 const struct rte_flow_action_raw_encap *raw_encap;
2751 int raw_decap_idx = -1;
2754 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2755 switch (actions->type) {
2756 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2757 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2758 *encap_idx = actions_n;
2760 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2761 raw_decap_idx = actions_n;
2763 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2764 raw_encap = actions->conf;
2765 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2766 *encap_idx = raw_decap_idx != -1 ?
2767 raw_decap_idx : actions_n;
2769 case RTE_FLOW_ACTION_TYPE_QUEUE:
2770 case RTE_FLOW_ACTION_TYPE_RSS:
2778 if (*encap_idx == -1)
2779 *encap_idx = actions_n;
2780 /* Count RTE_FLOW_ACTION_TYPE_END. */
2781 return actions_n + 1;
2785 * Check meter action from the action list.
2787 * @param[in] actions
2788 * Pointer to the list of actions.
2790 * Pointer to the meter exist flag.
2793 * Total number of actions.
2796 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
2802 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2803 switch (actions->type) {
2804 case RTE_FLOW_ACTION_TYPE_METER:
2812 /* Count RTE_FLOW_ACTION_TYPE_END. */
2813 return actions_n + 1;
2817 * Check if the flow should be splited due to hairpin.
2818 * The reason for the split is that in current HW we can't
2819 * support encap on Rx, so if a flow have encap we move it
2823 * Pointer to Ethernet device.
2825 * Flow rule attributes.
2826 * @param[in] actions
2827 * Associated actions (list terminated by the END action).
2830 * > 0 the number of actions and the flow should be split,
2831 * 0 when no split required.
2834 flow_check_hairpin_split(struct rte_eth_dev *dev,
2835 const struct rte_flow_attr *attr,
2836 const struct rte_flow_action actions[])
2838 int queue_action = 0;
2841 const struct rte_flow_action_queue *queue;
2842 const struct rte_flow_action_rss *rss;
2843 const struct rte_flow_action_raw_encap *raw_encap;
2847 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2848 switch (actions->type) {
2849 case RTE_FLOW_ACTION_TYPE_QUEUE:
2850 queue = actions->conf;
2853 if (mlx5_rxq_get_type(dev, queue->index) !=
2854 MLX5_RXQ_TYPE_HAIRPIN)
2859 case RTE_FLOW_ACTION_TYPE_RSS:
2860 rss = actions->conf;
2861 if (rss == NULL || rss->queue_num == 0)
2863 if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2864 MLX5_RXQ_TYPE_HAIRPIN)
2869 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2870 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2874 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2875 raw_encap = actions->conf;
2876 if (raw_encap->size >
2877 (sizeof(struct rte_flow_item_eth) +
2878 sizeof(struct rte_flow_item_ipv4)))
2887 if (encap == 1 && queue_action)
2892 /* Declare flow create/destroy prototype in advance. */
2893 static struct rte_flow *
2894 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2895 const struct rte_flow_attr *attr,
2896 const struct rte_flow_item items[],
2897 const struct rte_flow_action actions[],
2898 bool external, struct rte_flow_error *error);
2901 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2902 struct rte_flow *flow);
2905 * Add a flow of copying flow metadata registers in RX_CP_TBL.
2907 * As mark_id is unique, if there's already a registered flow for the mark_id,
2908 * return by increasing the reference counter of the resource. Otherwise, create
2909 * the resource (mcp_res) and flow.
2912 * - If ingress port is ANY and reg_c[1] is mark_id,
2913 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2915 * For default flow (zero mark_id), flow is like,
2916 * - If ingress port is ANY,
2917 * reg_b := reg_c[0] and jump to RX_ACT_TBL.
2920 * Pointer to Ethernet device.
2922 * ID of MARK action, zero means default flow for META.
2924 * Perform verbose error reporting if not NULL.
2927 * Associated resource on success, NULL otherwise and rte_errno is set.
2929 static struct mlx5_flow_mreg_copy_resource *
2930 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2931 struct rte_flow_error *error)
2933 struct mlx5_priv *priv = dev->data->dev_private;
2934 struct rte_flow_attr attr = {
2935 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2938 struct mlx5_rte_flow_item_tag tag_spec = {
2941 struct rte_flow_item items[] = {
2942 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2944 struct rte_flow_action_mark ftag = {
2947 struct mlx5_flow_action_copy_mreg cp_mreg = {
2951 struct rte_flow_action_jump jump = {
2952 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2954 struct rte_flow_action actions[] = {
2955 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2957 struct mlx5_flow_mreg_copy_resource *mcp_res;
2960 /* Fill the register fileds in the flow. */
2961 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2965 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
2969 /* Check if already registered. */
2970 MLX5_ASSERT(priv->mreg_cp_tbl);
2971 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
2973 /* For non-default rule. */
2974 if (mark_id != MLX5_DEFAULT_COPY_ID)
2976 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID ||
2977 mcp_res->refcnt == 1);
2980 /* Provide the full width of FLAG specific value. */
2981 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
2982 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
2983 /* Build a new flow. */
2984 if (mark_id != MLX5_DEFAULT_COPY_ID) {
2985 items[0] = (struct rte_flow_item){
2986 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
2989 items[1] = (struct rte_flow_item){
2990 .type = RTE_FLOW_ITEM_TYPE_END,
2992 actions[0] = (struct rte_flow_action){
2993 .type = MLX5_RTE_FLOW_ACTION_TYPE_MARK,
2996 actions[1] = (struct rte_flow_action){
2997 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3000 actions[2] = (struct rte_flow_action){
3001 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3004 actions[3] = (struct rte_flow_action){
3005 .type = RTE_FLOW_ACTION_TYPE_END,
3008 /* Default rule, wildcard match. */
3009 attr.priority = MLX5_FLOW_PRIO_RSVD;
3010 items[0] = (struct rte_flow_item){
3011 .type = RTE_FLOW_ITEM_TYPE_END,
3013 actions[0] = (struct rte_flow_action){
3014 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3017 actions[1] = (struct rte_flow_action){
3018 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3021 actions[2] = (struct rte_flow_action){
3022 .type = RTE_FLOW_ACTION_TYPE_END,
3025 /* Build a new entry. */
3026 mcp_res = rte_zmalloc(__func__, sizeof(*mcp_res), 0);
3032 * The copy Flows are not included in any list. There
3033 * ones are referenced from other Flows and can not
3034 * be applied, removed, deleted in ardbitrary order
3035 * by list traversing.
3037 mcp_res->flow = flow_list_create(dev, NULL, &attr, items,
3038 actions, false, error);
3042 mcp_res->hlist_ent.key = mark_id;
3043 ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3044 &mcp_res->hlist_ent);
3051 flow_list_destroy(dev, NULL, mcp_res->flow);
3057 * Release flow in RX_CP_TBL.
3060 * Pointer to Ethernet device.
3062 * Parent flow for wich copying is provided.
3065 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3066 struct rte_flow *flow)
3068 struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3069 struct mlx5_priv *priv = dev->data->dev_private;
3071 if (!mcp_res || !priv->mreg_cp_tbl)
3073 if (flow->copy_applied) {
3074 MLX5_ASSERT(mcp_res->appcnt);
3075 flow->copy_applied = 0;
3077 if (!mcp_res->appcnt)
3078 flow_drv_remove(dev, mcp_res->flow);
3081 * We do not check availability of metadata registers here,
3082 * because copy resources are not allocated in this case.
3084 if (--mcp_res->refcnt)
3086 MLX5_ASSERT(mcp_res->flow);
3087 flow_list_destroy(dev, NULL, mcp_res->flow);
3088 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3090 flow->mreg_copy = NULL;
3094 * Start flow in RX_CP_TBL.
3097 * Pointer to Ethernet device.
3099 * Parent flow for wich copying is provided.
3102 * 0 on success, a negative errno value otherwise and rte_errno is set.
3105 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3106 struct rte_flow *flow)
3108 struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3111 if (!mcp_res || flow->copy_applied)
3113 if (!mcp_res->appcnt) {
3114 ret = flow_drv_apply(dev, mcp_res->flow, NULL);
3119 flow->copy_applied = 1;
3124 * Stop flow in RX_CP_TBL.
3127 * Pointer to Ethernet device.
3129 * Parent flow for wich copying is provided.
3132 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3133 struct rte_flow *flow)
3135 struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3137 if (!mcp_res || !flow->copy_applied)
3139 MLX5_ASSERT(mcp_res->appcnt);
3141 flow->copy_applied = 0;
3142 if (!mcp_res->appcnt)
3143 flow_drv_remove(dev, mcp_res->flow);
3147 * Remove the default copy action from RX_CP_TBL.
3150 * Pointer to Ethernet device.
3153 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3155 struct mlx5_flow_mreg_copy_resource *mcp_res;
3156 struct mlx5_priv *priv = dev->data->dev_private;
3158 /* Check if default flow is registered. */
3159 if (!priv->mreg_cp_tbl)
3161 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl,
3162 MLX5_DEFAULT_COPY_ID);
3165 MLX5_ASSERT(mcp_res->flow);
3166 flow_list_destroy(dev, NULL, mcp_res->flow);
3167 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3172 * Add the default copy action in in RX_CP_TBL.
3175 * Pointer to Ethernet device.
3177 * Perform verbose error reporting if not NULL.
3180 * 0 for success, negative value otherwise and rte_errno is set.
3183 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3184 struct rte_flow_error *error)
3186 struct mlx5_priv *priv = dev->data->dev_private;
3187 struct mlx5_flow_mreg_copy_resource *mcp_res;
3189 /* Check whether extensive metadata feature is engaged. */
3190 if (!priv->config.dv_flow_en ||
3191 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3192 !mlx5_flow_ext_mreg_supported(dev) ||
3193 !priv->sh->dv_regc0_mask)
3195 mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3202 * Add a flow of copying flow metadata registers in RX_CP_TBL.
3204 * All the flow having Q/RSS action should be split by
3205 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3206 * performs the following,
3207 * - CQE->flow_tag := reg_c[1] (MARK)
3208 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3209 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3210 * but there should be a flow per each MARK ID set by MARK action.
3212 * For the aforementioned reason, if there's a MARK action in flow's action
3213 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3214 * the MARK ID to CQE's flow_tag like,
3215 * - If reg_c[1] is mark_id,
3216 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3218 * For SET_META action which stores value in reg_c[0], as the destination is
3219 * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3220 * MARK ID means the default flow. The default flow looks like,
3221 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3224 * Pointer to Ethernet device.
3226 * Pointer to flow structure.
3227 * @param[in] actions
3228 * Pointer to the list of actions.
3230 * Perform verbose error reporting if not NULL.
3233 * 0 on success, negative value otherwise and rte_errno is set.
3236 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3237 struct rte_flow *flow,
3238 const struct rte_flow_action *actions,
3239 struct rte_flow_error *error)
3241 struct mlx5_priv *priv = dev->data->dev_private;
3242 struct mlx5_dev_config *config = &priv->config;
3243 struct mlx5_flow_mreg_copy_resource *mcp_res;
3244 const struct rte_flow_action_mark *mark;
3246 /* Check whether extensive metadata feature is engaged. */
3247 if (!config->dv_flow_en ||
3248 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3249 !mlx5_flow_ext_mreg_supported(dev) ||
3250 !priv->sh->dv_regc0_mask)
3252 /* Find MARK action. */
3253 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3254 switch (actions->type) {
3255 case RTE_FLOW_ACTION_TYPE_FLAG:
3256 mcp_res = flow_mreg_add_copy_action
3257 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3260 flow->mreg_copy = mcp_res;
3261 if (dev->data->dev_started) {
3263 flow->copy_applied = 1;
3266 case RTE_FLOW_ACTION_TYPE_MARK:
3267 mark = (const struct rte_flow_action_mark *)
3270 flow_mreg_add_copy_action(dev, mark->id, error);
3273 flow->mreg_copy = mcp_res;
3274 if (dev->data->dev_started) {
3276 flow->copy_applied = 1;
3286 #define MLX5_MAX_SPLIT_ACTIONS 24
3287 #define MLX5_MAX_SPLIT_ITEMS 24
3290 * Split the hairpin flow.
3291 * Since HW can't support encap on Rx we move the encap to Tx.
3292 * If the count action is after the encap then we also
3293 * move the count action. in this case the count will also measure
3297 * Pointer to Ethernet device.
3298 * @param[in] actions
3299 * Associated actions (list terminated by the END action).
3300 * @param[out] actions_rx
3302 * @param[out] actions_tx
3304 * @param[out] pattern_tx
3305 * The pattern items for the Tx flow.
3306 * @param[out] flow_id
3307 * The flow ID connected to this flow.
3313 flow_hairpin_split(struct rte_eth_dev *dev,
3314 const struct rte_flow_action actions[],
3315 struct rte_flow_action actions_rx[],
3316 struct rte_flow_action actions_tx[],
3317 struct rte_flow_item pattern_tx[],
3320 struct mlx5_priv *priv = dev->data->dev_private;
3321 const struct rte_flow_action_raw_encap *raw_encap;
3322 const struct rte_flow_action_raw_decap *raw_decap;
3323 struct mlx5_rte_flow_action_set_tag *set_tag;
3324 struct rte_flow_action *tag_action;
3325 struct mlx5_rte_flow_item_tag *tag_item;
3326 struct rte_flow_item *item;
3330 mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3331 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3332 switch (actions->type) {
3333 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3334 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3335 rte_memcpy(actions_tx, actions,
3336 sizeof(struct rte_flow_action));
3339 case RTE_FLOW_ACTION_TYPE_COUNT:
3341 rte_memcpy(actions_tx, actions,
3342 sizeof(struct rte_flow_action));
3345 rte_memcpy(actions_rx, actions,
3346 sizeof(struct rte_flow_action));
3350 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3351 raw_encap = actions->conf;
3352 if (raw_encap->size >
3353 (sizeof(struct rte_flow_item_eth) +
3354 sizeof(struct rte_flow_item_ipv4))) {
3355 memcpy(actions_tx, actions,
3356 sizeof(struct rte_flow_action));
3360 rte_memcpy(actions_rx, actions,
3361 sizeof(struct rte_flow_action));
3365 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3366 raw_decap = actions->conf;
3367 if (raw_decap->size <
3368 (sizeof(struct rte_flow_item_eth) +
3369 sizeof(struct rte_flow_item_ipv4))) {
3370 memcpy(actions_tx, actions,
3371 sizeof(struct rte_flow_action));
3374 rte_memcpy(actions_rx, actions,
3375 sizeof(struct rte_flow_action));
3380 rte_memcpy(actions_rx, actions,
3381 sizeof(struct rte_flow_action));
3386 /* Add set meta action and end action for the Rx flow. */
3387 tag_action = actions_rx;
3388 tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3390 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3392 set_tag = (void *)actions_rx;
3393 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3394 MLX5_ASSERT(set_tag->id > REG_NONE);
3395 set_tag->data = *flow_id;
3396 tag_action->conf = set_tag;
3397 /* Create Tx item list. */
3398 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3399 addr = (void *)&pattern_tx[2];
3401 item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3402 tag_item = (void *)addr;
3403 tag_item->data = *flow_id;
3404 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3405 MLX5_ASSERT(set_tag->id > REG_NONE);
3406 item->spec = tag_item;
3407 addr += sizeof(struct mlx5_rte_flow_item_tag);
3408 tag_item = (void *)addr;
3409 tag_item->data = UINT32_MAX;
3410 tag_item->id = UINT16_MAX;
3411 item->mask = tag_item;
3412 addr += sizeof(struct mlx5_rte_flow_item_tag);
3415 item->type = RTE_FLOW_ITEM_TYPE_END;
3420 * The last stage of splitting chain, just creates the subflow
3421 * without any modification.
3424 * Pointer to Ethernet device.
3426 * Parent flow structure pointer.
3427 * @param[in, out] sub_flow
3428 * Pointer to return the created subflow, may be NULL.
3429 * @param[in] prefix_layers
3430 * Prefix subflow layers, may be 0.
3432 * Flow rule attributes.
3434 * Pattern specification (list terminated by the END pattern item).
3435 * @param[in] actions
3436 * Associated actions (list terminated by the END action).
3437 * @param[in] external
3438 * This flow rule is created by request external to PMD.
3440 * Perform verbose error reporting if not NULL.
3442 * 0 on success, negative value otherwise
3445 flow_create_split_inner(struct rte_eth_dev *dev,
3446 struct rte_flow *flow,
3447 struct mlx5_flow **sub_flow,
3448 uint64_t prefix_layers,
3449 const struct rte_flow_attr *attr,
3450 const struct rte_flow_item items[],
3451 const struct rte_flow_action actions[],
3452 bool external, struct rte_flow_error *error)
3454 struct mlx5_flow *dev_flow;
3456 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, error);
3459 dev_flow->flow = flow;
3460 dev_flow->external = external;
3461 /* Subflow object was created, we must include one in the list. */
3462 LIST_INSERT_HEAD(&flow->dev_handles, dev_flow->handle, next);
3464 * If dev_flow is as one of the suffix flow, some actions in suffix
3465 * flow may need some user defined item layer flags.
3468 dev_flow->handle->layers = prefix_layers;
3470 *sub_flow = dev_flow;
3471 return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3475 * Split the meter flow.
3477 * As meter flow will split to three sub flow, other than meter
3478 * action, the other actions make sense to only meter accepts
3479 * the packet. If it need to be dropped, no other additional
3480 * actions should be take.
3482 * One kind of special action which decapsulates the L3 tunnel
3483 * header will be in the prefix sub flow, as not to take the
3484 * L3 tunnel header into account.
3487 * Pointer to Ethernet device.
3489 * Pattern specification (list terminated by the END pattern item).
3490 * @param[out] sfx_items
3491 * Suffix flow match items (list terminated by the END pattern item).
3492 * @param[in] actions
3493 * Associated actions (list terminated by the END action).
3494 * @param[out] actions_sfx
3495 * Suffix flow actions.
3496 * @param[out] actions_pre
3497 * Prefix flow actions.
3498 * @param[out] pattern_sfx
3499 * The pattern items for the suffix flow.
3500 * @param[out] tag_sfx
3501 * Pointer to suffix flow tag.
3507 flow_meter_split_prep(struct rte_eth_dev *dev,
3508 const struct rte_flow_item items[],
3509 struct rte_flow_item sfx_items[],
3510 const struct rte_flow_action actions[],
3511 struct rte_flow_action actions_sfx[],
3512 struct rte_flow_action actions_pre[])
3514 struct rte_flow_action *tag_action = NULL;
3515 struct rte_flow_item *tag_item;
3516 struct mlx5_rte_flow_action_set_tag *set_tag;
3517 struct rte_flow_error error;
3518 const struct rte_flow_action_raw_encap *raw_encap;
3519 const struct rte_flow_action_raw_decap *raw_decap;
3520 struct mlx5_rte_flow_item_tag *tag_spec;
3521 struct mlx5_rte_flow_item_tag *tag_mask;
3523 bool copy_vlan = false;
3525 /* Prepare the actions for prefix and suffix flow. */
3526 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3527 struct rte_flow_action **action_cur = NULL;
3529 switch (actions->type) {
3530 case RTE_FLOW_ACTION_TYPE_METER:
3531 /* Add the extra tag action first. */
3532 tag_action = actions_pre;
3533 tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3535 action_cur = &actions_pre;
3537 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3538 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3539 action_cur = &actions_pre;
3541 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3542 raw_encap = actions->conf;
3543 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
3544 action_cur = &actions_pre;
3546 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3547 raw_decap = actions->conf;
3548 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3549 action_cur = &actions_pre;
3551 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3552 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3559 action_cur = &actions_sfx;
3560 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
3563 /* Add end action to the actions. */
3564 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
3565 actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
3568 set_tag = (void *)actions_pre;
3569 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3571 * Get the id from the qrss_pool to make qrss share the id with meter.
3573 tag_id = flow_qrss_get_id(dev);
3574 set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
3576 tag_action->conf = set_tag;
3577 /* Prepare the suffix subflow items. */
3578 tag_item = sfx_items++;
3579 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3580 int item_type = items->type;
3582 switch (item_type) {
3583 case RTE_FLOW_ITEM_TYPE_PORT_ID:
3584 memcpy(sfx_items, items, sizeof(*sfx_items));
3587 case RTE_FLOW_ITEM_TYPE_VLAN:
3589 memcpy(sfx_items, items, sizeof(*sfx_items));
3591 * Convert to internal match item, it is used
3592 * for vlan push and set vid.
3594 sfx_items->type = MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
3602 sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
3604 tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
3605 tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
3606 tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3607 tag_mask = tag_spec + 1;
3608 tag_mask->data = 0xffffff00;
3609 tag_item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3610 tag_item->spec = tag_spec;
3611 tag_item->last = NULL;
3612 tag_item->mask = tag_mask;
3617 * Split action list having QUEUE/RSS for metadata register copy.
3619 * Once Q/RSS action is detected in user's action list, the flow action
3620 * should be split in order to copy metadata registers, which will happen in
3622 * - CQE->flow_tag := reg_c[1] (MARK)
3623 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3624 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3625 * This is because the last action of each flow must be a terminal action
3626 * (QUEUE, RSS or DROP).
3628 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3629 * stored and kept in the mlx5_flow structure per each sub_flow.
3631 * The Q/RSS action is replaced with,
3632 * - SET_TAG, setting the allocated flow ID to reg_c[2].
3633 * And the following JUMP action is added at the end,
3634 * - JUMP, to RX_CP_TBL.
3636 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3637 * flow_create_split_metadata() routine. The flow will look like,
3638 * - If flow ID matches (reg_c[2]), perform Q/RSS.
3641 * Pointer to Ethernet device.
3642 * @param[out] split_actions
3643 * Pointer to store split actions to jump to CP_TBL.
3644 * @param[in] actions
3645 * Pointer to the list of original flow actions.
3647 * Pointer to the Q/RSS action.
3648 * @param[in] actions_n
3649 * Number of original actions.
3651 * Perform verbose error reporting if not NULL.
3654 * non-zero unique flow_id on success, otherwise 0 and
3655 * error/rte_error are set.
3658 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3659 struct rte_flow_action *split_actions,
3660 const struct rte_flow_action *actions,
3661 const struct rte_flow_action *qrss,
3662 int actions_n, struct rte_flow_error *error)
3664 struct mlx5_rte_flow_action_set_tag *set_tag;
3665 struct rte_flow_action_jump *jump;
3666 const int qrss_idx = qrss - actions;
3667 uint32_t flow_id = 0;
3671 * Given actions will be split
3672 * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3673 * - Add jump to mreg CP_TBL.
3674 * As a result, there will be one more action.
3677 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3678 set_tag = (void *)(split_actions + actions_n);
3680 * If tag action is not set to void(it means we are not the meter
3681 * suffix flow), add the tag action. Since meter suffix flow already
3682 * has the tag added.
3684 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
3686 * Allocate the new subflow ID. This one is unique within
3687 * device and not shared with representors. Otherwise,
3688 * we would have to resolve multi-thread access synch
3689 * issue. Each flow on the shared device is appended
3690 * with source vport identifier, so the resulting
3691 * flows will be unique in the shared (by master and
3692 * representors) domain even if they have coinciding
3695 flow_id = flow_qrss_get_id(dev);
3697 return rte_flow_error_set(error, ENOMEM,
3698 RTE_FLOW_ERROR_TYPE_ACTION,
3699 NULL, "can't allocate id "
3700 "for split Q/RSS subflow");
3701 /* Internal SET_TAG action to set flow ID. */
3702 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3705 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3709 /* Construct new actions array. */
3710 /* Replace QUEUE/RSS action. */
3711 split_actions[qrss_idx] = (struct rte_flow_action){
3712 .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3716 /* JUMP action to jump to mreg copy table (CP_TBL). */
3717 jump = (void *)(set_tag + 1);
3718 *jump = (struct rte_flow_action_jump){
3719 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3721 split_actions[actions_n - 2] = (struct rte_flow_action){
3722 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3725 split_actions[actions_n - 1] = (struct rte_flow_action){
3726 .type = RTE_FLOW_ACTION_TYPE_END,
3732 * Extend the given action list for Tx metadata copy.
3734 * Copy the given action list to the ext_actions and add flow metadata register
3735 * copy action in order to copy reg_a set by WQE to reg_c[0].
3737 * @param[out] ext_actions
3738 * Pointer to the extended action list.
3739 * @param[in] actions
3740 * Pointer to the list of actions.
3741 * @param[in] actions_n
3742 * Number of actions in the list.
3744 * Perform verbose error reporting if not NULL.
3745 * @param[in] encap_idx
3746 * The encap action inndex.
3749 * 0 on success, negative value otherwise
3752 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3753 struct rte_flow_action *ext_actions,
3754 const struct rte_flow_action *actions,
3755 int actions_n, struct rte_flow_error *error,
3758 struct mlx5_flow_action_copy_mreg *cp_mreg =
3759 (struct mlx5_flow_action_copy_mreg *)
3760 (ext_actions + actions_n + 1);
3763 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3767 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3772 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
3773 if (encap_idx == actions_n - 1) {
3774 ext_actions[actions_n - 1] = (struct rte_flow_action){
3775 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3778 ext_actions[actions_n] = (struct rte_flow_action){
3779 .type = RTE_FLOW_ACTION_TYPE_END,
3782 ext_actions[encap_idx] = (struct rte_flow_action){
3783 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3786 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
3787 sizeof(*ext_actions) * (actions_n - encap_idx));
3793 * The splitting for metadata feature.
3795 * - Q/RSS action on NIC Rx should be split in order to pass by
3796 * the mreg copy table (RX_CP_TBL) and then it jumps to the
3797 * action table (RX_ACT_TBL) which has the split Q/RSS action.
3799 * - All the actions on NIC Tx should have a mreg copy action to
3800 * copy reg_a from WQE to reg_c[0].
3803 * Pointer to Ethernet device.
3805 * Parent flow structure pointer.
3806 * @param[in] prefix_layers
3807 * Prefix flow layer flags.
3809 * Flow rule attributes.
3811 * Pattern specification (list terminated by the END pattern item).
3812 * @param[in] actions
3813 * Associated actions (list terminated by the END action).
3814 * @param[in] external
3815 * This flow rule is created by request external to PMD.
3817 * Perform verbose error reporting if not NULL.
3819 * 0 on success, negative value otherwise
3822 flow_create_split_metadata(struct rte_eth_dev *dev,
3823 struct rte_flow *flow,
3824 uint64_t prefix_layers,
3825 const struct rte_flow_attr *attr,
3826 const struct rte_flow_item items[],
3827 const struct rte_flow_action actions[],
3828 bool external, struct rte_flow_error *error)
3830 struct mlx5_priv *priv = dev->data->dev_private;
3831 struct mlx5_dev_config *config = &priv->config;
3832 const struct rte_flow_action *qrss = NULL;
3833 struct rte_flow_action *ext_actions = NULL;
3834 struct mlx5_flow *dev_flow = NULL;
3835 uint32_t qrss_id = 0;
3842 /* Check whether extensive metadata feature is engaged. */
3843 if (!config->dv_flow_en ||
3844 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3845 !mlx5_flow_ext_mreg_supported(dev))
3846 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
3847 attr, items, actions, external,
3849 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
3852 /* Exclude hairpin flows from splitting. */
3853 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3854 const struct rte_flow_action_queue *queue;
3857 if (mlx5_rxq_get_type(dev, queue->index) ==
3858 MLX5_RXQ_TYPE_HAIRPIN)
3860 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3861 const struct rte_flow_action_rss *rss;
3864 if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3865 MLX5_RXQ_TYPE_HAIRPIN)
3870 /* Check if it is in meter suffix table. */
3871 mtr_sfx = attr->group == (attr->transfer ?
3872 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
3873 MLX5_FLOW_TABLE_LEVEL_SUFFIX);
3875 * Q/RSS action on NIC Rx should be split in order to pass by
3876 * the mreg copy table (RX_CP_TBL) and then it jumps to the
3877 * action table (RX_ACT_TBL) which has the split Q/RSS action.
3879 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3880 sizeof(struct rte_flow_action_set_tag) +
3881 sizeof(struct rte_flow_action_jump);
3882 ext_actions = rte_zmalloc(__func__, act_size, 0);
3884 return rte_flow_error_set(error, ENOMEM,
3885 RTE_FLOW_ERROR_TYPE_ACTION,
3886 NULL, "no memory to split "
3889 * If we are the suffix flow of meter, tag already exist.
3890 * Set the tag action to void.
3893 ext_actions[qrss - actions].type =
3894 RTE_FLOW_ACTION_TYPE_VOID;
3896 ext_actions[qrss - actions].type =
3897 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3899 * Create the new actions list with removed Q/RSS action
3900 * and appended set tag and jump to register copy table
3901 * (RX_CP_TBL). We should preallocate unique tag ID here
3902 * in advance, because it is needed for set tag action.
3904 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3905 qrss, actions_n, error);
3906 if (!mtr_sfx && !qrss_id) {
3910 } else if (attr->egress && !attr->transfer) {
3912 * All the actions on NIC Tx should have a metadata register
3913 * copy action to copy reg_a from WQE to reg_c[meta]
3915 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3916 sizeof(struct mlx5_flow_action_copy_mreg);
3917 ext_actions = rte_zmalloc(__func__, act_size, 0);
3919 return rte_flow_error_set(error, ENOMEM,
3920 RTE_FLOW_ERROR_TYPE_ACTION,
3921 NULL, "no memory to split "
3923 /* Create the action list appended with copy register. */
3924 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3925 actions_n, error, encap_idx);
3929 /* Add the unmodified original or prefix subflow. */
3930 ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers, attr,
3931 items, ext_actions ? ext_actions :
3932 actions, external, error);
3935 MLX5_ASSERT(dev_flow);
3937 const struct rte_flow_attr q_attr = {
3938 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3941 /* Internal PMD action to set register. */
3942 struct mlx5_rte_flow_item_tag q_tag_spec = {
3946 struct rte_flow_item q_items[] = {
3948 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3949 .spec = &q_tag_spec,
3954 .type = RTE_FLOW_ITEM_TYPE_END,
3957 struct rte_flow_action q_actions[] = {
3963 .type = RTE_FLOW_ACTION_TYPE_END,
3966 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
3969 * Configure the tag item only if there is no meter subflow.
3970 * Since tag is already marked in the meter suffix subflow
3971 * we can just use the meter suffix items as is.
3974 /* Not meter subflow. */
3975 MLX5_ASSERT(!mtr_sfx);
3977 * Put unique id in prefix flow due to it is destroyed
3978 * after suffix flow and id will be freed after there
3979 * is no actual flows with this id and identifier
3980 * reallocation becomes possible (for example, for
3981 * other flows in other threads).
3983 dev_flow->handle->qrss_id = qrss_id;
3984 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
3988 q_tag_spec.id = ret;
3991 /* Add suffix subflow to execute Q/RSS. */
3992 ret = flow_create_split_inner(dev, flow, &dev_flow, layers,
3993 &q_attr, mtr_sfx ? items :
3998 /* qrss ID should be freed if failed. */
4000 MLX5_ASSERT(dev_flow);
4005 * We do not destroy the partially created sub_flows in case of error.
4006 * These ones are included into parent flow list and will be destroyed
4007 * by flow_drv_destroy.
4009 flow_qrss_free_id(dev, qrss_id);
4010 rte_free(ext_actions);
4015 * The splitting for meter feature.
4017 * - The meter flow will be split to two flows as prefix and
4018 * suffix flow. The packets make sense only it pass the prefix
4021 * - Reg_C_5 is used for the packet to match betweend prefix and
4025 * Pointer to Ethernet device.
4027 * Parent flow structure pointer.
4029 * Flow rule attributes.
4031 * Pattern specification (list terminated by the END pattern item).
4032 * @param[in] actions
4033 * Associated actions (list terminated by the END action).
4034 * @param[in] external
4035 * This flow rule is created by request external to PMD.
4037 * Perform verbose error reporting if not NULL.
4039 * 0 on success, negative value otherwise
4042 flow_create_split_meter(struct rte_eth_dev *dev,
4043 struct rte_flow *flow,
4044 const struct rte_flow_attr *attr,
4045 const struct rte_flow_item items[],
4046 const struct rte_flow_action actions[],
4047 bool external, struct rte_flow_error *error)
4049 struct mlx5_priv *priv = dev->data->dev_private;
4050 struct rte_flow_action *sfx_actions = NULL;
4051 struct rte_flow_action *pre_actions = NULL;
4052 struct rte_flow_item *sfx_items = NULL;
4053 struct mlx5_flow *dev_flow = NULL;
4054 struct rte_flow_attr sfx_attr = *attr;
4056 uint32_t mtr_tag_id = 0;
4063 actions_n = flow_check_meter_action(actions, &mtr);
4065 /* The five prefix actions: meter, decap, encap, tag, end. */
4066 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
4067 sizeof(struct mlx5_rte_flow_action_set_tag);
4068 /* tag, vlan, port id, end. */
4069 #define METER_SUFFIX_ITEM 4
4070 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
4071 sizeof(struct mlx5_rte_flow_item_tag) * 2;
4072 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);
4074 return rte_flow_error_set(error, ENOMEM,
4075 RTE_FLOW_ERROR_TYPE_ACTION,
4076 NULL, "no memory to split "
4078 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
4080 pre_actions = sfx_actions + actions_n;
4081 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
4082 actions, sfx_actions,
4088 /* Add the prefix subflow. */
4089 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, attr,
4090 items, pre_actions, external,
4096 dev_flow->handle->mtr_flow_id = mtr_tag_id;
4097 /* Setting the sfx group atrr. */
4098 sfx_attr.group = sfx_attr.transfer ?
4099 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4100 MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4102 /* Add the prefix subflow. */
4103 ret = flow_create_split_metadata(dev, flow, dev_flow ?
4104 flow_get_prefix_layer_flags(dev_flow) :
4106 sfx_items ? sfx_items : items,
4107 sfx_actions ? sfx_actions : actions,
4111 rte_free(sfx_actions);
4116 * Split the flow to subflow set. The splitters might be linked
4117 * in the chain, like this:
4118 * flow_create_split_outer() calls:
4119 * flow_create_split_meter() calls:
4120 * flow_create_split_metadata(meter_subflow_0) calls:
4121 * flow_create_split_inner(metadata_subflow_0)
4122 * flow_create_split_inner(metadata_subflow_1)
4123 * flow_create_split_inner(metadata_subflow_2)
4124 * flow_create_split_metadata(meter_subflow_1) calls:
4125 * flow_create_split_inner(metadata_subflow_0)
4126 * flow_create_split_inner(metadata_subflow_1)
4127 * flow_create_split_inner(metadata_subflow_2)
4129 * This provide flexible way to add new levels of flow splitting.
4130 * The all of successfully created subflows are included to the
4131 * parent flow dev_flow list.
4134 * Pointer to Ethernet device.
4136 * Parent flow structure pointer.
4138 * Flow rule attributes.
4140 * Pattern specification (list terminated by the END pattern item).
4141 * @param[in] actions
4142 * Associated actions (list terminated by the END action).
4143 * @param[in] external
4144 * This flow rule is created by request external to PMD.
4146 * Perform verbose error reporting if not NULL.
4148 * 0 on success, negative value otherwise
4151 flow_create_split_outer(struct rte_eth_dev *dev,
4152 struct rte_flow *flow,
4153 const struct rte_flow_attr *attr,
4154 const struct rte_flow_item items[],
4155 const struct rte_flow_action actions[],
4156 bool external, struct rte_flow_error *error)
4160 ret = flow_create_split_meter(dev, flow, attr, items,
4161 actions, external, error);
4162 MLX5_ASSERT(ret <= 0);
4167 * Create a flow and add it to @p list.
4170 * Pointer to Ethernet device.
4172 * Pointer to a TAILQ flow list. If this parameter NULL,
4173 * no list insertion occurred, flow is just created,
4174 * this is caller's responsibility to track the
4177 * Flow rule attributes.
4179 * Pattern specification (list terminated by the END pattern item).
4180 * @param[in] actions
4181 * Associated actions (list terminated by the END action).
4182 * @param[in] external
4183 * This flow rule is created by request external to PMD.
4185 * Perform verbose error reporting if not NULL.
4188 * A flow on success, NULL otherwise and rte_errno is set.
4190 static struct rte_flow *
4191 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
4192 const struct rte_flow_attr *attr,
4193 const struct rte_flow_item items[],
4194 const struct rte_flow_action actions[],
4195 bool external, struct rte_flow_error *error)
4197 struct mlx5_priv *priv = dev->data->dev_private;
4198 struct rte_flow *flow = NULL;
4199 struct mlx5_flow *dev_flow;
4200 const struct rte_flow_action_rss *rss;
4202 struct rte_flow_expand_rss buf;
4203 uint8_t buffer[2048];
4206 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4207 uint8_t buffer[2048];
4210 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4211 uint8_t buffer[2048];
4212 } actions_hairpin_tx;
4214 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
4215 uint8_t buffer[2048];
4217 struct rte_flow_expand_rss *buf = &expand_buffer.buf;
4218 const struct rte_flow_action *p_actions_rx = actions;
4221 int hairpin_flow = 0;
4222 uint32_t hairpin_id = 0;
4223 struct rte_flow_attr attr_tx = { .priority = 0 };
4224 int ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
4229 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4230 if (hairpin_flow > 0) {
4231 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
4235 flow_hairpin_split(dev, actions, actions_rx.actions,
4236 actions_hairpin_tx.actions, items_tx.items,
4238 p_actions_rx = actions_rx.actions;
4240 flow_size = sizeof(struct rte_flow);
4241 rss = flow_get_rss_action(p_actions_rx);
4243 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
4246 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
4247 flow = rte_calloc(__func__, 1, flow_size, 0);
4250 goto error_before_flow;
4252 flow->drv_type = flow_get_drv_type(dev, attr);
4253 if (hairpin_id != 0)
4254 flow->hairpin_flow_id = hairpin_id;
4255 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
4256 flow->drv_type < MLX5_FLOW_TYPE_MAX);
4257 flow->rss.queue = (void *)(flow + 1);
4260 * The following information is required by
4261 * mlx5_flow_hashfields_adjust() in advance.
4263 flow->rss.level = rss->level;
4264 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
4265 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4267 LIST_INIT(&flow->dev_handles);
4268 if (rss && rss->types) {
4269 unsigned int graph_root;
4271 graph_root = find_graph_root(items, rss->level);
4272 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
4274 mlx5_support_expansion,
4276 MLX5_ASSERT(ret > 0 &&
4277 (unsigned int)ret < sizeof(expand_buffer.buffer));
4280 buf->entry[0].pattern = (void *)(uintptr_t)items;
4282 /* Reset device flow index to 0. */
4284 for (i = 0; i < buf->entries; ++i) {
4286 * The splitter may create multiple dev_flows,
4287 * depending on configuration. In the simplest
4288 * case it just creates unmodified original flow.
4290 ret = flow_create_split_outer(dev, flow, attr,
4291 buf->entry[i].pattern,
4292 p_actions_rx, external,
4297 /* Create the tx flow. */
4299 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
4300 attr_tx.ingress = 0;
4302 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
4303 actions_hairpin_tx.actions, error);
4306 dev_flow->flow = flow;
4307 dev_flow->external = 0;
4308 LIST_INSERT_HEAD(&flow->dev_handles, dev_flow->handle, next);
4309 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
4311 actions_hairpin_tx.actions, error);
4316 * Update the metadata register copy table. If extensive
4317 * metadata feature is enabled and registers are supported
4318 * we might create the extra rte_flow for each unique
4319 * MARK/FLAG action ID.
4321 * The table is updated for ingress Flows only, because
4322 * the egress Flows belong to the different device and
4323 * copy table should be updated in peer NIC Rx domain.
4325 if (attr->ingress &&
4326 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
4327 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
4332 * If the flow is external (from application) OR device is started, then
4333 * the flow will be applied immediately.
4335 if (external || dev->data->dev_started) {
4336 ret = flow_drv_apply(dev, flow, error);
4341 TAILQ_INSERT_TAIL(list, flow, next);
4342 flow_rxq_flags_set(dev, flow);
4346 mlx5_flow_id_release(priv->sh->flow_id_pool,
4351 flow_mreg_del_copy_action(dev, flow);
4352 ret = rte_errno; /* Save rte_errno before cleanup. */
4353 if (flow->hairpin_flow_id)
4354 mlx5_flow_id_release(priv->sh->flow_id_pool,
4355 flow->hairpin_flow_id);
4357 flow_drv_destroy(dev, flow);
4359 rte_errno = ret; /* Restore rte_errno. */
4364 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
4365 * incoming packets to table 1.
4367 * Other flow rules, requested for group n, will be created in
4368 * e-switch table n+1.
4369 * Jump action to e-switch group n will be created to group n+1.
4371 * Used when working in switchdev mode, to utilise advantages of table 1
4375 * Pointer to Ethernet device.
4378 * Pointer to flow on success, NULL otherwise and rte_errno is set.
4381 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
4383 const struct rte_flow_attr attr = {
4390 const struct rte_flow_item pattern = {
4391 .type = RTE_FLOW_ITEM_TYPE_END,
4393 struct rte_flow_action_jump jump = {
4396 const struct rte_flow_action actions[] = {
4398 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4402 .type = RTE_FLOW_ACTION_TYPE_END,
4405 struct mlx5_priv *priv = dev->data->dev_private;
4406 struct rte_flow_error error;
4408 return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
4409 actions, false, &error);
4415 * @see rte_flow_create()
4419 mlx5_flow_create(struct rte_eth_dev *dev,
4420 const struct rte_flow_attr *attr,
4421 const struct rte_flow_item items[],
4422 const struct rte_flow_action actions[],
4423 struct rte_flow_error *error)
4425 struct mlx5_priv *priv = dev->data->dev_private;
4428 * If the device is not started yet, it is not allowed to created a
4429 * flow from application. PMD default flows and traffic control flows
4432 if (unlikely(!dev->data->dev_started)) {
4434 DRV_LOG(DEBUG, "port %u is not started when "
4435 "inserting a flow", dev->data->port_id);
4438 return flow_list_create(dev, &priv->flows,
4439 attr, items, actions, true, error);
4443 * Destroy a flow in a list.
4446 * Pointer to Ethernet device.
4448 * Pointer to a TAILQ flow list. If this parameter NULL,
4449 * there is no flow removal from the list.
4454 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
4455 struct rte_flow *flow)
4457 struct mlx5_priv *priv = dev->data->dev_private;
4460 * Update RX queue flags only if port is started, otherwise it is
4463 if (dev->data->dev_started)
4464 flow_rxq_flags_trim(dev, flow);
4465 if (flow->hairpin_flow_id)
4466 mlx5_flow_id_release(priv->sh->flow_id_pool,
4467 flow->hairpin_flow_id);
4468 flow_drv_destroy(dev, flow);
4470 TAILQ_REMOVE(list, flow, next);
4471 flow_mreg_del_copy_action(dev, flow);
4472 rte_free(flow->fdir);
4477 * Destroy all flows.
4480 * Pointer to Ethernet device.
4482 * Pointer to a TAILQ flow list.
4484 * If flushing is called avtively.
4487 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list,
4490 uint32_t num_flushed = 0;
4492 while (!TAILQ_EMPTY(list)) {
4493 struct rte_flow *flow;
4495 flow = TAILQ_FIRST(list);
4496 flow_list_destroy(dev, list, flow);
4500 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
4501 dev->data->port_id, num_flushed);
4509 * Pointer to Ethernet device.
4511 * Pointer to a TAILQ flow list.
4514 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
4516 struct rte_flow *flow;
4518 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) {
4519 flow_drv_remove(dev, flow);
4520 flow_mreg_stop_copy_action(dev, flow);
4522 flow_mreg_del_default_copy_action(dev);
4523 flow_rxq_flags_clear(dev);
4530 * Pointer to Ethernet device.
4532 * Pointer to a TAILQ flow list.
4535 * 0 on success, a negative errno value otherwise and rte_errno is set.
4538 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
4540 struct rte_flow *flow;
4541 struct rte_flow_error error;
4544 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4545 ret = flow_mreg_add_default_copy_action(dev, &error);
4548 /* Apply Flows created by application. */
4549 TAILQ_FOREACH(flow, list, next) {
4550 ret = flow_mreg_start_copy_action(dev, flow);
4553 ret = flow_drv_apply(dev, flow, &error);
4556 flow_rxq_flags_set(dev, flow);
4560 ret = rte_errno; /* Save rte_errno before cleanup. */
4561 mlx5_flow_stop(dev, list);
4562 rte_errno = ret; /* Restore rte_errno. */
4567 * Stop all default actions for flows.
4570 * Pointer to Ethernet device.
4573 mlx5_flow_stop_default(struct rte_eth_dev *dev)
4575 flow_mreg_del_default_copy_action(dev);
4579 * Start all default actions for flows.
4582 * Pointer to Ethernet device.
4584 * 0 on success, a negative errno value otherwise and rte_errno is set.
4587 mlx5_flow_start_default(struct rte_eth_dev *dev)
4589 struct rte_flow_error error;
4591 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4592 return flow_mreg_add_default_copy_action(dev, &error);
4596 * Allocate intermediate resources for flow creation.
4599 * Pointer to Ethernet device.
4602 mlx5_flow_alloc_intermediate(struct rte_eth_dev *dev)
4604 struct mlx5_priv *priv = dev->data->dev_private;
4606 if (!priv->inter_flows)
4607 priv->inter_flows = rte_calloc(__func__, MLX5_NUM_MAX_DEV_FLOWS,
4608 sizeof(struct mlx5_flow), 0);
4612 * Free intermediate resources for flows.
4615 * Pointer to Ethernet device.
4618 mlx5_flow_free_intermediate(struct rte_eth_dev *dev)
4620 struct mlx5_priv *priv = dev->data->dev_private;
4622 rte_free(priv->inter_flows);
4623 priv->inter_flows = NULL;
4627 * Verify the flow list is empty
4630 * Pointer to Ethernet device.
4632 * @return the number of flows not released.
4635 mlx5_flow_verify(struct rte_eth_dev *dev)
4637 struct mlx5_priv *priv = dev->data->dev_private;
4638 struct rte_flow *flow;
4641 TAILQ_FOREACH(flow, &priv->flows, next) {
4642 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4643 dev->data->port_id, (void *)flow);
4650 * Enable default hairpin egress flow.
4653 * Pointer to Ethernet device.
4658 * 0 on success, a negative errno value otherwise and rte_errno is set.
4661 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4664 struct mlx5_priv *priv = dev->data->dev_private;
4665 const struct rte_flow_attr attr = {
4669 struct mlx5_rte_flow_item_tx_queue queue_spec = {
4672 struct mlx5_rte_flow_item_tx_queue queue_mask = {
4673 .queue = UINT32_MAX,
4675 struct rte_flow_item items[] = {
4677 .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4678 .spec = &queue_spec,
4680 .mask = &queue_mask,
4683 .type = RTE_FLOW_ITEM_TYPE_END,
4686 struct rte_flow_action_jump jump = {
4687 .group = MLX5_HAIRPIN_TX_TABLE,
4689 struct rte_flow_action actions[2];
4690 struct rte_flow *flow;
4691 struct rte_flow_error error;
4693 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4694 actions[0].conf = &jump;
4695 actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4696 flow = flow_list_create(dev, &priv->ctrl_flows,
4697 &attr, items, actions, false, &error);
4700 "Failed to create ctrl flow: rte_errno(%d),"
4701 " type(%d), message(%s)",
4702 rte_errno, error.type,
4703 error.message ? error.message : " (no stated reason)");
4710 * Enable a control flow configured from the control plane.
4713 * Pointer to Ethernet device.
4715 * An Ethernet flow spec to apply.
4717 * An Ethernet flow mask to apply.
4719 * A VLAN flow spec to apply.
4721 * A VLAN flow mask to apply.
4724 * 0 on success, a negative errno value otherwise and rte_errno is set.
4727 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4728 struct rte_flow_item_eth *eth_spec,
4729 struct rte_flow_item_eth *eth_mask,
4730 struct rte_flow_item_vlan *vlan_spec,
4731 struct rte_flow_item_vlan *vlan_mask)
4733 struct mlx5_priv *priv = dev->data->dev_private;
4734 const struct rte_flow_attr attr = {
4736 .priority = MLX5_FLOW_PRIO_RSVD,
4738 struct rte_flow_item items[] = {
4740 .type = RTE_FLOW_ITEM_TYPE_ETH,
4746 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4747 RTE_FLOW_ITEM_TYPE_END,
4753 .type = RTE_FLOW_ITEM_TYPE_END,
4756 uint16_t queue[priv->reta_idx_n];
4757 struct rte_flow_action_rss action_rss = {
4758 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4760 .types = priv->rss_conf.rss_hf,
4761 .key_len = priv->rss_conf.rss_key_len,
4762 .queue_num = priv->reta_idx_n,
4763 .key = priv->rss_conf.rss_key,
4766 struct rte_flow_action actions[] = {
4768 .type = RTE_FLOW_ACTION_TYPE_RSS,
4769 .conf = &action_rss,
4772 .type = RTE_FLOW_ACTION_TYPE_END,
4775 struct rte_flow *flow;
4776 struct rte_flow_error error;
4779 if (!priv->reta_idx_n || !priv->rxqs_n) {
4782 for (i = 0; i != priv->reta_idx_n; ++i)
4783 queue[i] = (*priv->reta_idx)[i];
4784 flow = flow_list_create(dev, &priv->ctrl_flows,
4785 &attr, items, actions, false, &error);
4792 * Enable a flow control configured from the control plane.
4795 * Pointer to Ethernet device.
4797 * An Ethernet flow spec to apply.
4799 * An Ethernet flow mask to apply.
4802 * 0 on success, a negative errno value otherwise and rte_errno is set.
4805 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4806 struct rte_flow_item_eth *eth_spec,
4807 struct rte_flow_item_eth *eth_mask)
4809 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4815 * @see rte_flow_destroy()
4819 mlx5_flow_destroy(struct rte_eth_dev *dev,
4820 struct rte_flow *flow,
4821 struct rte_flow_error *error __rte_unused)
4823 struct mlx5_priv *priv = dev->data->dev_private;
4825 flow_list_destroy(dev, &priv->flows, flow);
4830 * Destroy all flows.
4832 * @see rte_flow_flush()
4836 mlx5_flow_flush(struct rte_eth_dev *dev,
4837 struct rte_flow_error *error __rte_unused)
4839 struct mlx5_priv *priv = dev->data->dev_private;
4841 mlx5_flow_list_flush(dev, &priv->flows, false);
4848 * @see rte_flow_isolate()
4852 mlx5_flow_isolate(struct rte_eth_dev *dev,
4854 struct rte_flow_error *error)
4856 struct mlx5_priv *priv = dev->data->dev_private;
4858 if (dev->data->dev_started) {
4859 rte_flow_error_set(error, EBUSY,
4860 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4862 "port must be stopped first");
4865 priv->isolated = !!enable;
4867 dev->dev_ops = &mlx5_dev_ops_isolate;
4869 dev->dev_ops = &mlx5_dev_ops;
4876 * @see rte_flow_query()
4880 flow_drv_query(struct rte_eth_dev *dev,
4881 struct rte_flow *flow,
4882 const struct rte_flow_action *actions,
4884 struct rte_flow_error *error)
4886 const struct mlx5_flow_driver_ops *fops;
4887 enum mlx5_flow_drv_type ftype = flow->drv_type;
4889 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
4890 fops = flow_get_drv_ops(ftype);
4892 return fops->query(dev, flow, actions, data, error);
4898 * @see rte_flow_query()
4902 mlx5_flow_query(struct rte_eth_dev *dev,
4903 struct rte_flow *flow,
4904 const struct rte_flow_action *actions,
4906 struct rte_flow_error *error)
4910 ret = flow_drv_query(dev, flow, actions, data, error);
4917 * Convert a flow director filter to a generic flow.
4920 * Pointer to Ethernet device.
4921 * @param fdir_filter
4922 * Flow director filter to add.
4924 * Generic flow parameters structure.
4927 * 0 on success, a negative errno value otherwise and rte_errno is set.
4930 flow_fdir_filter_convert(struct rte_eth_dev *dev,
4931 const struct rte_eth_fdir_filter *fdir_filter,
4932 struct mlx5_fdir *attributes)
4934 struct mlx5_priv *priv = dev->data->dev_private;
4935 const struct rte_eth_fdir_input *input = &fdir_filter->input;
4936 const struct rte_eth_fdir_masks *mask =
4937 &dev->data->dev_conf.fdir_conf.mask;
4939 /* Validate queue number. */
4940 if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
4941 DRV_LOG(ERR, "port %u invalid queue number %d",
4942 dev->data->port_id, fdir_filter->action.rx_queue);
4946 attributes->attr.ingress = 1;
4947 attributes->items[0] = (struct rte_flow_item) {
4948 .type = RTE_FLOW_ITEM_TYPE_ETH,
4949 .spec = &attributes->l2,
4950 .mask = &attributes->l2_mask,
4952 switch (fdir_filter->action.behavior) {
4953 case RTE_ETH_FDIR_ACCEPT:
4954 attributes->actions[0] = (struct rte_flow_action){
4955 .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4956 .conf = &attributes->queue,
4959 case RTE_ETH_FDIR_REJECT:
4960 attributes->actions[0] = (struct rte_flow_action){
4961 .type = RTE_FLOW_ACTION_TYPE_DROP,
4965 DRV_LOG(ERR, "port %u invalid behavior %d",
4967 fdir_filter->action.behavior);
4968 rte_errno = ENOTSUP;
4971 attributes->queue.index = fdir_filter->action.rx_queue;
4973 switch (fdir_filter->input.flow_type) {
4974 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4975 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4976 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4977 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
4978 .src_addr = input->flow.ip4_flow.src_ip,
4979 .dst_addr = input->flow.ip4_flow.dst_ip,
4980 .time_to_live = input->flow.ip4_flow.ttl,
4981 .type_of_service = input->flow.ip4_flow.tos,
4983 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
4984 .src_addr = mask->ipv4_mask.src_ip,
4985 .dst_addr = mask->ipv4_mask.dst_ip,
4986 .time_to_live = mask->ipv4_mask.ttl,
4987 .type_of_service = mask->ipv4_mask.tos,
4988 .next_proto_id = mask->ipv4_mask.proto,
4990 attributes->items[1] = (struct rte_flow_item){
4991 .type = RTE_FLOW_ITEM_TYPE_IPV4,
4992 .spec = &attributes->l3,
4993 .mask = &attributes->l3_mask,
4996 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4997 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4998 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4999 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
5000 .hop_limits = input->flow.ipv6_flow.hop_limits,
5001 .proto = input->flow.ipv6_flow.proto,
5004 memcpy(attributes->l3.ipv6.hdr.src_addr,
5005 input->flow.ipv6_flow.src_ip,
5006 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
5007 memcpy(attributes->l3.ipv6.hdr.dst_addr,
5008 input->flow.ipv6_flow.dst_ip,
5009 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
5010 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
5011 mask->ipv6_mask.src_ip,
5012 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
5013 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
5014 mask->ipv6_mask.dst_ip,
5015 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
5016 attributes->items[1] = (struct rte_flow_item){
5017 .type = RTE_FLOW_ITEM_TYPE_IPV6,
5018 .spec = &attributes->l3,
5019 .mask = &attributes->l3_mask,
5023 DRV_LOG(ERR, "port %u invalid flow type%d",
5024 dev->data->port_id, fdir_filter->input.flow_type);
5025 rte_errno = ENOTSUP;
5029 switch (fdir_filter->input.flow_type) {
5030 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
5031 attributes->l4.udp.hdr = (struct rte_udp_hdr){
5032 .src_port = input->flow.udp4_flow.src_port,
5033 .dst_port = input->flow.udp4_flow.dst_port,
5035 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
5036 .src_port = mask->src_port_mask,
5037 .dst_port = mask->dst_port_mask,
5039 attributes->items[2] = (struct rte_flow_item){
5040 .type = RTE_FLOW_ITEM_TYPE_UDP,
5041 .spec = &attributes->l4,
5042 .mask = &attributes->l4_mask,
5045 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
5046 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
5047 .src_port = input->flow.tcp4_flow.src_port,
5048 .dst_port = input->flow.tcp4_flow.dst_port,
5050 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
5051 .src_port = mask->src_port_mask,
5052 .dst_port = mask->dst_port_mask,
5054 attributes->items[2] = (struct rte_flow_item){
5055 .type = RTE_FLOW_ITEM_TYPE_TCP,
5056 .spec = &attributes->l4,
5057 .mask = &attributes->l4_mask,
5060 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
5061 attributes->l4.udp.hdr = (struct rte_udp_hdr){
5062 .src_port = input->flow.udp6_flow.src_port,
5063 .dst_port = input->flow.udp6_flow.dst_port,
5065 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
5066 .src_port = mask->src_port_mask,
5067 .dst_port = mask->dst_port_mask,
5069 attributes->items[2] = (struct rte_flow_item){
5070 .type = RTE_FLOW_ITEM_TYPE_UDP,
5071 .spec = &attributes->l4,
5072 .mask = &attributes->l4_mask,
5075 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
5076 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
5077 .src_port = input->flow.tcp6_flow.src_port,
5078 .dst_port = input->flow.tcp6_flow.dst_port,
5080 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
5081 .src_port = mask->src_port_mask,
5082 .dst_port = mask->dst_port_mask,
5084 attributes->items[2] = (struct rte_flow_item){
5085 .type = RTE_FLOW_ITEM_TYPE_TCP,
5086 .spec = &attributes->l4,
5087 .mask = &attributes->l4_mask,
5090 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
5091 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
5094 DRV_LOG(ERR, "port %u invalid flow type%d",
5095 dev->data->port_id, fdir_filter->input.flow_type);
5096 rte_errno = ENOTSUP;
5102 #define FLOW_FDIR_CMP(f1, f2, fld) \
5103 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
5106 * Compare two FDIR flows. If items and actions are identical, the two flows are
5110 * Pointer to Ethernet device.
5112 * FDIR flow to compare.
5114 * FDIR flow to compare.
5117 * Zero on match, 1 otherwise.
5120 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
5122 if (FLOW_FDIR_CMP(f1, f2, attr) ||
5123 FLOW_FDIR_CMP(f1, f2, l2) ||
5124 FLOW_FDIR_CMP(f1, f2, l2_mask) ||
5125 FLOW_FDIR_CMP(f1, f2, l3) ||
5126 FLOW_FDIR_CMP(f1, f2, l3_mask) ||
5127 FLOW_FDIR_CMP(f1, f2, l4) ||
5128 FLOW_FDIR_CMP(f1, f2, l4_mask) ||
5129 FLOW_FDIR_CMP(f1, f2, actions[0].type))
5131 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
5132 FLOW_FDIR_CMP(f1, f2, queue))
5138 * Search device flow list to find out a matched FDIR flow.
5141 * Pointer to Ethernet device.
5143 * FDIR flow to lookup.
5146 * Pointer of flow if found, NULL otherwise.
5148 static struct rte_flow *
5149 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
5151 struct mlx5_priv *priv = dev->data->dev_private;
5152 struct rte_flow *flow = NULL;
5154 MLX5_ASSERT(fdir_flow);
5155 TAILQ_FOREACH(flow, &priv->flows, next) {
5156 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
5157 DRV_LOG(DEBUG, "port %u found FDIR flow %p",
5158 dev->data->port_id, (void *)flow);
5166 * Add new flow director filter and store it in list.
5169 * Pointer to Ethernet device.
5170 * @param fdir_filter
5171 * Flow director filter to add.
5174 * 0 on success, a negative errno value otherwise and rte_errno is set.
5177 flow_fdir_filter_add(struct rte_eth_dev *dev,
5178 const struct rte_eth_fdir_filter *fdir_filter)
5180 struct mlx5_priv *priv = dev->data->dev_private;
5181 struct mlx5_fdir *fdir_flow;
5182 struct rte_flow *flow;
5185 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
5190 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
5193 flow = flow_fdir_filter_lookup(dev, fdir_flow);
5198 flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
5199 fdir_flow->items, fdir_flow->actions, true,
5203 MLX5_ASSERT(!flow->fdir);
5204 flow->fdir = fdir_flow;
5205 DRV_LOG(DEBUG, "port %u created FDIR flow %p",
5206 dev->data->port_id, (void *)flow);
5209 rte_free(fdir_flow);
5214 * Delete specific filter.
5217 * Pointer to Ethernet device.
5218 * @param fdir_filter
5219 * Filter to be deleted.
5222 * 0 on success, a negative errno value otherwise and rte_errno is set.
5225 flow_fdir_filter_delete(struct rte_eth_dev *dev,
5226 const struct rte_eth_fdir_filter *fdir_filter)
5228 struct mlx5_priv *priv = dev->data->dev_private;
5229 struct rte_flow *flow;
5230 struct mlx5_fdir fdir_flow = {
5235 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
5238 flow = flow_fdir_filter_lookup(dev, &fdir_flow);
5243 flow_list_destroy(dev, &priv->flows, flow);
5244 DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
5245 dev->data->port_id, (void *)flow);
5250 * Update queue for specific filter.
5253 * Pointer to Ethernet device.
5254 * @param fdir_filter
5255 * Filter to be updated.
5258 * 0 on success, a negative errno value otherwise and rte_errno is set.
5261 flow_fdir_filter_update(struct rte_eth_dev *dev,
5262 const struct rte_eth_fdir_filter *fdir_filter)
5266 ret = flow_fdir_filter_delete(dev, fdir_filter);
5269 return flow_fdir_filter_add(dev, fdir_filter);
5273 * Flush all filters.
5276 * Pointer to Ethernet device.
5279 flow_fdir_filter_flush(struct rte_eth_dev *dev)
5281 struct mlx5_priv *priv = dev->data->dev_private;
5283 mlx5_flow_list_flush(dev, &priv->flows, false);
5287 * Get flow director information.
5290 * Pointer to Ethernet device.
5291 * @param[out] fdir_info
5292 * Resulting flow director information.
5295 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
5297 struct rte_eth_fdir_masks *mask =
5298 &dev->data->dev_conf.fdir_conf.mask;
5300 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
5301 fdir_info->guarant_spc = 0;
5302 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
5303 fdir_info->max_flexpayload = 0;
5304 fdir_info->flow_types_mask[0] = 0;
5305 fdir_info->flex_payload_unit = 0;
5306 fdir_info->max_flex_payload_segment_num = 0;
5307 fdir_info->flex_payload_limit = 0;
5308 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
5312 * Deal with flow director operations.
5315 * Pointer to Ethernet device.
5317 * Operation to perform.
5319 * Pointer to operation-specific structure.
5322 * 0 on success, a negative errno value otherwise and rte_errno is set.
5325 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
5328 enum rte_fdir_mode fdir_mode =
5329 dev->data->dev_conf.fdir_conf.mode;
5331 if (filter_op == RTE_ETH_FILTER_NOP)
5333 if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
5334 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
5335 DRV_LOG(ERR, "port %u flow director mode %d not supported",
5336 dev->data->port_id, fdir_mode);
5340 switch (filter_op) {
5341 case RTE_ETH_FILTER_ADD:
5342 return flow_fdir_filter_add(dev, arg);
5343 case RTE_ETH_FILTER_UPDATE:
5344 return flow_fdir_filter_update(dev, arg);
5345 case RTE_ETH_FILTER_DELETE:
5346 return flow_fdir_filter_delete(dev, arg);
5347 case RTE_ETH_FILTER_FLUSH:
5348 flow_fdir_filter_flush(dev);
5350 case RTE_ETH_FILTER_INFO:
5351 flow_fdir_info_get(dev, arg);
5354 DRV_LOG(DEBUG, "port %u unknown operation %u",
5355 dev->data->port_id, filter_op);
5363 * Manage filter operations.
5366 * Pointer to Ethernet device structure.
5367 * @param filter_type
5370 * Operation to perform.
5372 * Pointer to operation-specific structure.
5375 * 0 on success, a negative errno value otherwise and rte_errno is set.
5378 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
5379 enum rte_filter_type filter_type,
5380 enum rte_filter_op filter_op,
5383 switch (filter_type) {
5384 case RTE_ETH_FILTER_GENERIC:
5385 if (filter_op != RTE_ETH_FILTER_GET) {
5389 *(const void **)arg = &mlx5_flow_ops;
5391 case RTE_ETH_FILTER_FDIR:
5392 return flow_fdir_ctrl_func(dev, filter_op, arg);
5394 DRV_LOG(ERR, "port %u filter type (%d) not supported",
5395 dev->data->port_id, filter_type);
5396 rte_errno = ENOTSUP;
5403 * Create the needed meter and suffix tables.
5406 * Pointer to Ethernet device.
5408 * Pointer to the flow meter.
5411 * Pointer to table set on success, NULL otherwise.
5413 struct mlx5_meter_domains_infos *
5414 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
5415 const struct mlx5_flow_meter *fm)
5417 const struct mlx5_flow_driver_ops *fops;
5419 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5420 return fops->create_mtr_tbls(dev, fm);
5424 * Destroy the meter table set.
5427 * Pointer to Ethernet device.
5429 * Pointer to the meter table set.
5435 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
5436 struct mlx5_meter_domains_infos *tbls)
5438 const struct mlx5_flow_driver_ops *fops;
5440 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5441 return fops->destroy_mtr_tbls(dev, tbls);
5445 * Create policer rules.
5448 * Pointer to Ethernet device.
5450 * Pointer to flow meter structure.
5452 * Pointer to flow attributes.
5455 * 0 on success, -1 otherwise.
5458 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
5459 struct mlx5_flow_meter *fm,
5460 const struct rte_flow_attr *attr)
5462 const struct mlx5_flow_driver_ops *fops;
5464 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5465 return fops->create_policer_rules(dev, fm, attr);
5469 * Destroy policer rules.
5472 * Pointer to flow meter structure.
5474 * Pointer to flow attributes.
5477 * 0 on success, -1 otherwise.
5480 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
5481 struct mlx5_flow_meter *fm,
5482 const struct rte_flow_attr *attr)
5484 const struct mlx5_flow_driver_ops *fops;
5486 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5487 return fops->destroy_policer_rules(dev, fm, attr);
5491 * Allocate a counter.
5494 * Pointer to Ethernet device structure.
5497 * Index to allocated counter on success, 0 otherwise.
5500 mlx5_counter_alloc(struct rte_eth_dev *dev)
5502 const struct mlx5_flow_driver_ops *fops;
5503 struct rte_flow_attr attr = { .transfer = 0 };
5505 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5506 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5507 return fops->counter_alloc(dev);
5510 "port %u counter allocate is not supported.",
5511 dev->data->port_id);
5519 * Pointer to Ethernet device structure.
5521 * Index to counter to be free.
5524 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
5526 const struct mlx5_flow_driver_ops *fops;
5527 struct rte_flow_attr attr = { .transfer = 0 };
5529 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5530 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5531 fops->counter_free(dev, cnt);
5535 "port %u counter free is not supported.",
5536 dev->data->port_id);
5540 * Query counter statistics.
5543 * Pointer to Ethernet device structure.
5545 * Index to counter to query.
5547 * Set to clear counter statistics.
5549 * The counter hits packets number to save.
5551 * The counter hits bytes number to save.
5554 * 0 on success, a negative errno value otherwise.
5557 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
5558 bool clear, uint64_t *pkts, uint64_t *bytes)
5560 const struct mlx5_flow_driver_ops *fops;
5561 struct rte_flow_attr attr = { .transfer = 0 };
5563 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5564 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5565 return fops->counter_query(dev, cnt, clear, pkts, bytes);
5568 "port %u counter query is not supported.",
5569 dev->data->port_id);
5573 #define MLX5_POOL_QUERY_FREQ_US 1000000
5576 * Set the periodic procedure for triggering asynchronous batch queries for all
5577 * the counter pools.
5580 * Pointer to mlx5_ibv_shared object.
5583 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
5585 struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
5586 uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
5589 cont = MLX5_CNT_CONTAINER(sh, 1, 0);
5590 pools_n += rte_atomic16_read(&cont->n_valid);
5591 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5592 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5593 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5594 sh->cmng.query_thread_on = 0;
5595 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5597 sh->cmng.query_thread_on = 1;
5602 * The periodic procedure for triggering asynchronous batch queries for all the
5603 * counter pools. This function is probably called by the host thread.
5606 * The parameter for the alarm process.
5609 mlx5_flow_query_alarm(void *arg)
5611 struct mlx5_ibv_shared *sh = arg;
5612 struct mlx5_devx_obj *dcs;
5615 uint8_t batch = sh->cmng.batch;
5616 uint16_t pool_index = sh->cmng.pool_index;
5617 struct mlx5_pools_container *cont;
5618 struct mlx5_pools_container *mcont;
5619 struct mlx5_flow_counter_pool *pool;
5621 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5624 cont = MLX5_CNT_CONTAINER(sh, batch, 1);
5625 mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
5626 /* Check if resize was done and need to flip a container. */
5627 if (cont != mcont) {
5629 /* Clean the old container. */
5630 rte_free(cont->pools);
5631 memset(cont, 0, sizeof(*cont));
5634 /* Flip the host container. */
5635 sh->cmng.mhi[batch] ^= (uint8_t)2;
5639 /* 2 empty containers case is unexpected. */
5640 if (unlikely(batch != sh->cmng.batch))
5644 goto next_container;
5646 pool = cont->pools[pool_index];
5648 /* There is a pool query in progress. */
5651 LIST_FIRST(&sh->cmng.free_stat_raws);
5653 /* No free counter statistics raw memory. */
5655 dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5657 offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5659 * Identify the counters released between query trigger and query
5660 * handle more effiecntly. The counter released in this gap period
5661 * should wait for a new round of query as the new arrived packets
5662 * will not be taken into account.
5664 rte_atomic64_add(&pool->start_query_gen, 1);
5665 ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5667 pool->raw_hw->mem_mng->dm->id,
5669 (pool->raw_hw->data + offset),
5671 (uint64_t)(uintptr_t)pool);
5673 rte_atomic64_sub(&pool->start_query_gen, 1);
5674 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5675 " %d", pool->min_dcs->id);
5676 pool->raw_hw = NULL;
5679 pool->raw_hw->min_dcs_id = dcs->id;
5680 LIST_REMOVE(pool->raw_hw, next);
5681 sh->cmng.pending_queries++;
5683 if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5688 sh->cmng.batch = batch;
5689 sh->cmng.pool_index = pool_index;
5690 mlx5_set_query_alarm(sh);
5694 * Handler for the HW respond about ready values from an asynchronous batch
5695 * query. This function is probably called by the host thread.
5698 * The pointer to the shared IB device context.
5699 * @param[in] async_id
5700 * The Devx async ID.
5702 * The status of the completion.
5705 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
5706 uint64_t async_id, int status)
5708 struct mlx5_flow_counter_pool *pool =
5709 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
5710 struct mlx5_counter_stats_raw *raw_to_free;
5712 if (unlikely(status)) {
5713 rte_atomic64_sub(&pool->start_query_gen, 1);
5714 raw_to_free = pool->raw_hw;
5716 raw_to_free = pool->raw;
5717 rte_spinlock_lock(&pool->sl);
5718 pool->raw = pool->raw_hw;
5719 rte_spinlock_unlock(&pool->sl);
5720 MLX5_ASSERT(rte_atomic64_read(&pool->end_query_gen) + 1 ==
5721 rte_atomic64_read(&pool->start_query_gen));
5722 rte_atomic64_set(&pool->end_query_gen,
5723 rte_atomic64_read(&pool->start_query_gen));
5724 /* Be sure the new raw counters data is updated in memory. */
5727 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
5728 pool->raw_hw = NULL;
5729 sh->cmng.pending_queries--;
5733 * Translate the rte_flow group index to HW table value.
5735 * @param[in] attributes
5736 * Pointer to flow attributes
5737 * @param[in] external
5738 * Value is part of flow rule created by request external to PMD.
5740 * rte_flow group index value.
5741 * @param[out] fdb_def_rule
5742 * Whether fdb jump to table 1 is configured.
5746 * Pointer to error structure.
5749 * 0 on success, a negative errno value otherwise and rte_errno is set.
5752 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
5753 uint32_t group, bool fdb_def_rule, uint32_t *table,
5754 struct rte_flow_error *error)
5756 if (attributes->transfer && external && fdb_def_rule) {
5757 if (group == UINT32_MAX)
5758 return rte_flow_error_set
5760 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5762 "group index not supported");
5771 * Discover availability of metadata reg_c's.
5773 * Iteratively use test flows to check availability.
5776 * Pointer to the Ethernet device structure.
5779 * 0 on success, a negative errno value otherwise and rte_errno is set.
5782 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
5784 struct mlx5_priv *priv = dev->data->dev_private;
5785 struct mlx5_dev_config *config = &priv->config;
5786 enum modify_reg idx;
5789 /* reg_c[0] and reg_c[1] are reserved. */
5790 config->flow_mreg_c[n++] = REG_C_0;
5791 config->flow_mreg_c[n++] = REG_C_1;
5792 /* Discover availability of other reg_c's. */
5793 for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
5794 struct rte_flow_attr attr = {
5795 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5796 .priority = MLX5_FLOW_PRIO_RSVD,
5799 struct rte_flow_item items[] = {
5801 .type = RTE_FLOW_ITEM_TYPE_END,
5804 struct rte_flow_action actions[] = {
5806 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5807 .conf = &(struct mlx5_flow_action_copy_mreg){
5813 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5814 .conf = &(struct rte_flow_action_jump){
5815 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5819 .type = RTE_FLOW_ACTION_TYPE_END,
5822 struct rte_flow *flow;
5823 struct rte_flow_error error;
5825 if (!config->dv_flow_en)
5827 /* Create internal flow, validation skips copy action. */
5828 flow = flow_list_create(dev, NULL, &attr, items,
5829 actions, false, &error);
5832 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
5833 config->flow_mreg_c[n++] = idx;
5834 flow_list_destroy(dev, NULL, flow);
5836 for (; n < MLX5_MREG_C_NUM; ++n)
5837 config->flow_mreg_c[n] = REG_NONE;
5842 * Dump flow raw hw data to file
5845 * The pointer to Ethernet device.
5847 * A pointer to a file for output.
5849 * Perform verbose error reporting if not NULL. PMDs initialize this
5850 * structure in case of error only.
5852 * 0 on success, a nagative value otherwise.
5855 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
5857 struct rte_flow_error *error __rte_unused)
5859 struct mlx5_priv *priv = dev->data->dev_private;
5860 struct mlx5_ibv_shared *sh = priv->sh;
5862 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
5863 sh->tx_domain, file);