net/mlx5: add translation of connection tracking item
[dpdk.git] / drivers / net / mlx5 / mlx5_flow.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2016 6WIND S.A.
3  * Copyright 2016 Mellanox Technologies, Ltd
4  */
5
6 #include <stdalign.h>
7 #include <stdint.h>
8 #include <string.h>
9 #include <stdbool.h>
10 #include <sys/queue.h>
11
12 #include <rte_common.h>
13 #include <rte_ether.h>
14 #include <ethdev_driver.h>
15 #include <rte_eal_paging.h>
16 #include <rte_flow.h>
17 #include <rte_cycles.h>
18 #include <rte_flow_driver.h>
19 #include <rte_malloc.h>
20 #include <rte_ip.h>
21
22 #include <mlx5_glue.h>
23 #include <mlx5_devx_cmds.h>
24 #include <mlx5_prm.h>
25 #include <mlx5_malloc.h>
26
27 #include "mlx5_defs.h"
28 #include "mlx5.h"
29 #include "mlx5_flow.h"
30 #include "mlx5_flow_os.h"
31 #include "mlx5_rx.h"
32 #include "mlx5_tx.h"
33 #include "mlx5_common_os.h"
34 #include "rte_pmd_mlx5.h"
35
36 struct tunnel_default_miss_ctx {
37         uint16_t *queue;
38         __extension__
39         union {
40                 struct rte_flow_action_rss action_rss;
41                 struct rte_flow_action_queue miss_queue;
42                 struct rte_flow_action_jump miss_jump;
43                 uint8_t raw[0];
44         };
45 };
46
47 static int
48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
49                              struct rte_flow *flow,
50                              const struct rte_flow_attr *attr,
51                              const struct rte_flow_action *app_actions,
52                              uint32_t flow_idx,
53                              struct tunnel_default_miss_ctx *ctx,
54                              struct rte_flow_error *error);
55 static struct mlx5_flow_tunnel *
56 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
57 static void
58 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
59 static uint32_t
60 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
61                                 const struct mlx5_flow_tunnel *tunnel,
62                                 uint32_t group, uint32_t *table,
63                                 struct rte_flow_error *error);
64
65 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
66 static void mlx5_flow_pop_thread_workspace(void);
67
68
69 /** Device flow drivers. */
70 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
71
72 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
73
74 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
75         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
76 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
77         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
78 #endif
79         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
80         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
81 };
82
83 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
84 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
85         (const int []){ \
86                 __VA_ARGS__, 0, \
87         }
88
89 /** Node object of input graph for mlx5_flow_expand_rss(). */
90 struct mlx5_flow_expand_node {
91         const int *const next;
92         /**<
93          * List of next node indexes. Index 0 is interpreted as a terminator.
94          */
95         const enum rte_flow_item_type type;
96         /**< Pattern item type of current node. */
97         uint64_t rss_types;
98         /**<
99          * RSS types bit-field associated with this node
100          * (see ETH_RSS_* definitions).
101          */
102 };
103
104 /** Object returned by mlx5_flow_expand_rss(). */
105 struct mlx5_flow_expand_rss {
106         uint32_t entries;
107         /**< Number of entries @p patterns and @p priorities. */
108         struct {
109                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
110                 uint32_t priority; /**< Priority offset for each expansion. */
111         } entry[];
112 };
113
114 static enum rte_flow_item_type
115 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
116 {
117         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
118         uint16_t ether_type = 0;
119         uint16_t ether_type_m;
120         uint8_t ip_next_proto = 0;
121         uint8_t ip_next_proto_m;
122
123         if (item == NULL || item->spec == NULL)
124                 return ret;
125         switch (item->type) {
126         case RTE_FLOW_ITEM_TYPE_ETH:
127                 if (item->mask)
128                         ether_type_m = ((const struct rte_flow_item_eth *)
129                                                 (item->mask))->type;
130                 else
131                         ether_type_m = rte_flow_item_eth_mask.type;
132                 if (ether_type_m != RTE_BE16(0xFFFF))
133                         break;
134                 ether_type = ((const struct rte_flow_item_eth *)
135                                 (item->spec))->type;
136                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
137                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
139                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
140                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
141                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
142                 else
143                         ret = RTE_FLOW_ITEM_TYPE_END;
144                 break;
145         case RTE_FLOW_ITEM_TYPE_VLAN:
146                 if (item->mask)
147                         ether_type_m = ((const struct rte_flow_item_vlan *)
148                                                 (item->mask))->inner_type;
149                 else
150                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
151                 if (ether_type_m != RTE_BE16(0xFFFF))
152                         break;
153                 ether_type = ((const struct rte_flow_item_vlan *)
154                                 (item->spec))->inner_type;
155                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
156                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
157                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
158                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
159                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
160                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
161                 else
162                         ret = RTE_FLOW_ITEM_TYPE_END;
163                 break;
164         case RTE_FLOW_ITEM_TYPE_IPV4:
165                 if (item->mask)
166                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
167                                         (item->mask))->hdr.next_proto_id;
168                 else
169                         ip_next_proto_m =
170                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
171                 if (ip_next_proto_m != 0xFF)
172                         break;
173                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
174                                 (item->spec))->hdr.next_proto_id;
175                 if (ip_next_proto == IPPROTO_UDP)
176                         ret = RTE_FLOW_ITEM_TYPE_UDP;
177                 else if (ip_next_proto == IPPROTO_TCP)
178                         ret = RTE_FLOW_ITEM_TYPE_TCP;
179                 else if (ip_next_proto == IPPROTO_IP)
180                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
181                 else if (ip_next_proto == IPPROTO_IPV6)
182                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
183                 else
184                         ret = RTE_FLOW_ITEM_TYPE_END;
185                 break;
186         case RTE_FLOW_ITEM_TYPE_IPV6:
187                 if (item->mask)
188                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
189                                                 (item->mask))->hdr.proto;
190                 else
191                         ip_next_proto_m =
192                                 rte_flow_item_ipv6_mask.hdr.proto;
193                 if (ip_next_proto_m != 0xFF)
194                         break;
195                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
196                                 (item->spec))->hdr.proto;
197                 if (ip_next_proto == IPPROTO_UDP)
198                         ret = RTE_FLOW_ITEM_TYPE_UDP;
199                 else if (ip_next_proto == IPPROTO_TCP)
200                         ret = RTE_FLOW_ITEM_TYPE_TCP;
201                 else if (ip_next_proto == IPPROTO_IP)
202                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
203                 else if (ip_next_proto == IPPROTO_IPV6)
204                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
205                 else
206                         ret = RTE_FLOW_ITEM_TYPE_END;
207                 break;
208         default:
209                 ret = RTE_FLOW_ITEM_TYPE_VOID;
210                 break;
211         }
212         return ret;
213 }
214
215 #define MLX5_RSS_EXP_ELT_N 8
216
217 /**
218  * Expand RSS flows into several possible flows according to the RSS hash
219  * fields requested and the driver capabilities.
220  *
221  * @param[out] buf
222  *   Buffer to store the result expansion.
223  * @param[in] size
224  *   Buffer size in bytes. If 0, @p buf can be NULL.
225  * @param[in] pattern
226  *   User flow pattern.
227  * @param[in] types
228  *   RSS types to expand (see ETH_RSS_* definitions).
229  * @param[in] graph
230  *   Input graph to expand @p pattern according to @p types.
231  * @param[in] graph_root_index
232  *   Index of root node in @p graph, typically 0.
233  *
234  * @return
235  *   A positive value representing the size of @p buf in bytes regardless of
236  *   @p size on success, a negative errno value otherwise and rte_errno is
237  *   set, the following errors are defined:
238  *
239  *   -E2BIG: graph-depth @p graph is too deep.
240  */
241 static int
242 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
243                      const struct rte_flow_item *pattern, uint64_t types,
244                      const struct mlx5_flow_expand_node graph[],
245                      int graph_root_index)
246 {
247         const struct rte_flow_item *item;
248         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
249         const int *next_node;
250         const int *stack[MLX5_RSS_EXP_ELT_N];
251         int stack_pos = 0;
252         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
253         unsigned int i;
254         size_t lsize;
255         size_t user_pattern_size = 0;
256         void *addr = NULL;
257         const struct mlx5_flow_expand_node *next = NULL;
258         struct rte_flow_item missed_item;
259         int missed = 0;
260         int elt = 0;
261         const struct rte_flow_item *last_item = NULL;
262
263         memset(&missed_item, 0, sizeof(missed_item));
264         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
265                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
266         if (lsize <= size) {
267                 buf->entry[0].priority = 0;
268                 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
269                 buf->entries = 0;
270                 addr = buf->entry[0].pattern;
271         }
272         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
273                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
274                         last_item = item;
275                 for (i = 0; node->next && node->next[i]; ++i) {
276                         next = &graph[node->next[i]];
277                         if (next->type == item->type)
278                                 break;
279                 }
280                 if (next)
281                         node = next;
282                 user_pattern_size += sizeof(*item);
283         }
284         user_pattern_size += sizeof(*item); /* Handle END item. */
285         lsize += user_pattern_size;
286         /* Copy the user pattern in the first entry of the buffer. */
287         if (lsize <= size) {
288                 rte_memcpy(addr, pattern, user_pattern_size);
289                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
290                 buf->entries = 1;
291         }
292         /* Start expanding. */
293         memset(flow_items, 0, sizeof(flow_items));
294         user_pattern_size -= sizeof(*item);
295         /*
296          * Check if the last valid item has spec set, need complete pattern,
297          * and the pattern can be used for expansion.
298          */
299         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
300         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
301                 /* Item type END indicates expansion is not required. */
302                 return lsize;
303         }
304         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
305                 next = NULL;
306                 missed = 1;
307                 for (i = 0; node->next && node->next[i]; ++i) {
308                         next = &graph[node->next[i]];
309                         if (next->type == missed_item.type) {
310                                 flow_items[0].type = missed_item.type;
311                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
312                                 break;
313                         }
314                         next = NULL;
315                 }
316         }
317         if (next && missed) {
318                 elt = 2; /* missed item + item end. */
319                 node = next;
320                 lsize += elt * sizeof(*item) + user_pattern_size;
321                 if ((node->rss_types & types) && lsize <= size) {
322                         buf->entry[buf->entries].priority = 1;
323                         buf->entry[buf->entries].pattern = addr;
324                         buf->entries++;
325                         rte_memcpy(addr, buf->entry[0].pattern,
326                                    user_pattern_size);
327                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
328                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
329                         addr = (void *)(((uintptr_t)addr) +
330                                         elt * sizeof(*item));
331                 }
332         }
333         memset(flow_items, 0, sizeof(flow_items));
334         next_node = node->next;
335         stack[stack_pos] = next_node;
336         node = next_node ? &graph[*next_node] : NULL;
337         while (node) {
338                 flow_items[stack_pos].type = node->type;
339                 if (node->rss_types & types) {
340                         /*
341                          * compute the number of items to copy from the
342                          * expansion and copy it.
343                          * When the stack_pos is 0, there are 1 element in it,
344                          * plus the addition END item.
345                          */
346                         elt = stack_pos + 2;
347                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
348                         lsize += elt * sizeof(*item) + user_pattern_size;
349                         if (lsize <= size) {
350                                 size_t n = elt * sizeof(*item);
351
352                                 buf->entry[buf->entries].priority =
353                                         stack_pos + 1 + missed;
354                                 buf->entry[buf->entries].pattern = addr;
355                                 buf->entries++;
356                                 rte_memcpy(addr, buf->entry[0].pattern,
357                                            user_pattern_size);
358                                 addr = (void *)(((uintptr_t)addr) +
359                                                 user_pattern_size);
360                                 rte_memcpy(addr, &missed_item,
361                                            missed * sizeof(*item));
362                                 addr = (void *)(((uintptr_t)addr) +
363                                         missed * sizeof(*item));
364                                 rte_memcpy(addr, flow_items, n);
365                                 addr = (void *)(((uintptr_t)addr) + n);
366                         }
367                 }
368                 /* Go deeper. */
369                 if (node->next) {
370                         next_node = node->next;
371                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
372                                 rte_errno = E2BIG;
373                                 return -rte_errno;
374                         }
375                         stack[stack_pos] = next_node;
376                 } else if (*(next_node + 1)) {
377                         /* Follow up with the next possibility. */
378                         ++next_node;
379                 } else {
380                         /* Move to the next path. */
381                         if (stack_pos)
382                                 next_node = stack[--stack_pos];
383                         next_node++;
384                         stack[stack_pos] = next_node;
385                 }
386                 node = *next_node ? &graph[*next_node] : NULL;
387         };
388         return lsize;
389 }
390
391 enum mlx5_expansion {
392         MLX5_EXPANSION_ROOT,
393         MLX5_EXPANSION_ROOT_OUTER,
394         MLX5_EXPANSION_ROOT_ETH_VLAN,
395         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
396         MLX5_EXPANSION_OUTER_ETH,
397         MLX5_EXPANSION_OUTER_ETH_VLAN,
398         MLX5_EXPANSION_OUTER_VLAN,
399         MLX5_EXPANSION_OUTER_IPV4,
400         MLX5_EXPANSION_OUTER_IPV4_UDP,
401         MLX5_EXPANSION_OUTER_IPV4_TCP,
402         MLX5_EXPANSION_OUTER_IPV6,
403         MLX5_EXPANSION_OUTER_IPV6_UDP,
404         MLX5_EXPANSION_OUTER_IPV6_TCP,
405         MLX5_EXPANSION_VXLAN,
406         MLX5_EXPANSION_VXLAN_GPE,
407         MLX5_EXPANSION_GRE,
408         MLX5_EXPANSION_MPLS,
409         MLX5_EXPANSION_ETH,
410         MLX5_EXPANSION_ETH_VLAN,
411         MLX5_EXPANSION_VLAN,
412         MLX5_EXPANSION_IPV4,
413         MLX5_EXPANSION_IPV4_UDP,
414         MLX5_EXPANSION_IPV4_TCP,
415         MLX5_EXPANSION_IPV6,
416         MLX5_EXPANSION_IPV6_UDP,
417         MLX5_EXPANSION_IPV6_TCP,
418 };
419
420 /** Supported expansion of items. */
421 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
422         [MLX5_EXPANSION_ROOT] = {
423                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
424                                                   MLX5_EXPANSION_IPV4,
425                                                   MLX5_EXPANSION_IPV6),
426                 .type = RTE_FLOW_ITEM_TYPE_END,
427         },
428         [MLX5_EXPANSION_ROOT_OUTER] = {
429                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
430                                                   MLX5_EXPANSION_OUTER_IPV4,
431                                                   MLX5_EXPANSION_OUTER_IPV6),
432                 .type = RTE_FLOW_ITEM_TYPE_END,
433         },
434         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
435                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
436                 .type = RTE_FLOW_ITEM_TYPE_END,
437         },
438         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
439                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
440                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
441                 .type = RTE_FLOW_ITEM_TYPE_END,
442         },
443         [MLX5_EXPANSION_OUTER_ETH] = {
444                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
445                                                   MLX5_EXPANSION_OUTER_IPV6,
446                                                   MLX5_EXPANSION_MPLS),
447                 .type = RTE_FLOW_ITEM_TYPE_ETH,
448                 .rss_types = 0,
449         },
450         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
451                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
452                 .type = RTE_FLOW_ITEM_TYPE_ETH,
453                 .rss_types = 0,
454         },
455         [MLX5_EXPANSION_OUTER_VLAN] = {
456                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
457                                                   MLX5_EXPANSION_OUTER_IPV6),
458                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
459         },
460         [MLX5_EXPANSION_OUTER_IPV4] = {
461                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
462                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
463                          MLX5_EXPANSION_OUTER_IPV4_TCP,
464                          MLX5_EXPANSION_GRE,
465                          MLX5_EXPANSION_IPV4,
466                          MLX5_EXPANSION_IPV6),
467                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
468                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
469                         ETH_RSS_NONFRAG_IPV4_OTHER,
470         },
471         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
472                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
473                                                   MLX5_EXPANSION_VXLAN_GPE),
474                 .type = RTE_FLOW_ITEM_TYPE_UDP,
475                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
476         },
477         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
478                 .type = RTE_FLOW_ITEM_TYPE_TCP,
479                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
480         },
481         [MLX5_EXPANSION_OUTER_IPV6] = {
482                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
483                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
484                          MLX5_EXPANSION_OUTER_IPV6_TCP,
485                          MLX5_EXPANSION_IPV4,
486                          MLX5_EXPANSION_IPV6,
487                          MLX5_EXPANSION_GRE),
488                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
489                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
490                         ETH_RSS_NONFRAG_IPV6_OTHER,
491         },
492         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
493                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
494                                                   MLX5_EXPANSION_VXLAN_GPE),
495                 .type = RTE_FLOW_ITEM_TYPE_UDP,
496                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
497         },
498         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
499                 .type = RTE_FLOW_ITEM_TYPE_TCP,
500                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
501         },
502         [MLX5_EXPANSION_VXLAN] = {
503                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
504                                                   MLX5_EXPANSION_IPV4,
505                                                   MLX5_EXPANSION_IPV6),
506                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
507         },
508         [MLX5_EXPANSION_VXLAN_GPE] = {
509                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
510                                                   MLX5_EXPANSION_IPV4,
511                                                   MLX5_EXPANSION_IPV6),
512                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
513         },
514         [MLX5_EXPANSION_GRE] = {
515                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
516                                                   MLX5_EXPANSION_IPV6),
517                 .type = RTE_FLOW_ITEM_TYPE_GRE,
518         },
519         [MLX5_EXPANSION_MPLS] = {
520                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
521                                                   MLX5_EXPANSION_IPV6),
522                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
523         },
524         [MLX5_EXPANSION_ETH] = {
525                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
526                                                   MLX5_EXPANSION_IPV6),
527                 .type = RTE_FLOW_ITEM_TYPE_ETH,
528         },
529         [MLX5_EXPANSION_ETH_VLAN] = {
530                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
531                 .type = RTE_FLOW_ITEM_TYPE_ETH,
532         },
533         [MLX5_EXPANSION_VLAN] = {
534                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
535                                                   MLX5_EXPANSION_IPV6),
536                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
537         },
538         [MLX5_EXPANSION_IPV4] = {
539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
540                                                   MLX5_EXPANSION_IPV4_TCP),
541                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
542                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
543                         ETH_RSS_NONFRAG_IPV4_OTHER,
544         },
545         [MLX5_EXPANSION_IPV4_UDP] = {
546                 .type = RTE_FLOW_ITEM_TYPE_UDP,
547                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
548         },
549         [MLX5_EXPANSION_IPV4_TCP] = {
550                 .type = RTE_FLOW_ITEM_TYPE_TCP,
551                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
552         },
553         [MLX5_EXPANSION_IPV6] = {
554                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
555                                                   MLX5_EXPANSION_IPV6_TCP),
556                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
557                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
558                         ETH_RSS_NONFRAG_IPV6_OTHER,
559         },
560         [MLX5_EXPANSION_IPV6_UDP] = {
561                 .type = RTE_FLOW_ITEM_TYPE_UDP,
562                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
563         },
564         [MLX5_EXPANSION_IPV6_TCP] = {
565                 .type = RTE_FLOW_ITEM_TYPE_TCP,
566                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
567         },
568 };
569
570 static struct rte_flow_action_handle *
571 mlx5_action_handle_create(struct rte_eth_dev *dev,
572                           const struct rte_flow_indir_action_conf *conf,
573                           const struct rte_flow_action *action,
574                           struct rte_flow_error *error);
575 static int mlx5_action_handle_destroy
576                                 (struct rte_eth_dev *dev,
577                                  struct rte_flow_action_handle *handle,
578                                  struct rte_flow_error *error);
579 static int mlx5_action_handle_update
580                                 (struct rte_eth_dev *dev,
581                                  struct rte_flow_action_handle *handle,
582                                  const void *update,
583                                  struct rte_flow_error *error);
584 static int mlx5_action_handle_query
585                                 (struct rte_eth_dev *dev,
586                                  const struct rte_flow_action_handle *handle,
587                                  void *data,
588                                  struct rte_flow_error *error);
589 static int
590 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
591                     struct rte_flow_tunnel *app_tunnel,
592                     struct rte_flow_action **actions,
593                     uint32_t *num_of_actions,
594                     struct rte_flow_error *error);
595 static int
596 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
597                        struct rte_flow_tunnel *app_tunnel,
598                        struct rte_flow_item **items,
599                        uint32_t *num_of_items,
600                        struct rte_flow_error *error);
601 static int
602 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
603                               struct rte_flow_item *pmd_items,
604                               uint32_t num_items, struct rte_flow_error *err);
605 static int
606 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
607                                 struct rte_flow_action *pmd_actions,
608                                 uint32_t num_actions,
609                                 struct rte_flow_error *err);
610 static int
611 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
612                                   struct rte_mbuf *m,
613                                   struct rte_flow_restore_info *info,
614                                   struct rte_flow_error *err);
615
616 static const struct rte_flow_ops mlx5_flow_ops = {
617         .validate = mlx5_flow_validate,
618         .create = mlx5_flow_create,
619         .destroy = mlx5_flow_destroy,
620         .flush = mlx5_flow_flush,
621         .isolate = mlx5_flow_isolate,
622         .query = mlx5_flow_query,
623         .dev_dump = mlx5_flow_dev_dump,
624         .get_aged_flows = mlx5_flow_get_aged_flows,
625         .action_handle_create = mlx5_action_handle_create,
626         .action_handle_destroy = mlx5_action_handle_destroy,
627         .action_handle_update = mlx5_action_handle_update,
628         .action_handle_query = mlx5_action_handle_query,
629         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
630         .tunnel_match = mlx5_flow_tunnel_match,
631         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
632         .tunnel_item_release = mlx5_flow_tunnel_item_release,
633         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
634 };
635
636 /* Tunnel information. */
637 struct mlx5_flow_tunnel_info {
638         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
639         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
640 };
641
642 static struct mlx5_flow_tunnel_info tunnels_info[] = {
643         {
644                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
645                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
646         },
647         {
648                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
649                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
650         },
651         {
652                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
653                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
654         },
655         {
656                 .tunnel = MLX5_FLOW_LAYER_GRE,
657                 .ptype = RTE_PTYPE_TUNNEL_GRE,
658         },
659         {
660                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
661                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
662         },
663         {
664                 .tunnel = MLX5_FLOW_LAYER_MPLS,
665                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
666         },
667         {
668                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
669                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
670         },
671         {
672                 .tunnel = MLX5_FLOW_LAYER_IPIP,
673                 .ptype = RTE_PTYPE_TUNNEL_IP,
674         },
675         {
676                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
677                 .ptype = RTE_PTYPE_TUNNEL_IP,
678         },
679         {
680                 .tunnel = MLX5_FLOW_LAYER_GTP,
681                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
682         },
683 };
684
685
686
687 /**
688  * Translate tag ID to register.
689  *
690  * @param[in] dev
691  *   Pointer to the Ethernet device structure.
692  * @param[in] feature
693  *   The feature that request the register.
694  * @param[in] id
695  *   The request register ID.
696  * @param[out] error
697  *   Error description in case of any.
698  *
699  * @return
700  *   The request register on success, a negative errno
701  *   value otherwise and rte_errno is set.
702  */
703 int
704 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
705                      enum mlx5_feature_name feature,
706                      uint32_t id,
707                      struct rte_flow_error *error)
708 {
709         struct mlx5_priv *priv = dev->data->dev_private;
710         struct mlx5_dev_config *config = &priv->config;
711         enum modify_reg start_reg;
712         bool skip_mtr_reg = false;
713
714         switch (feature) {
715         case MLX5_HAIRPIN_RX:
716                 return REG_B;
717         case MLX5_HAIRPIN_TX:
718                 return REG_A;
719         case MLX5_METADATA_RX:
720                 switch (config->dv_xmeta_en) {
721                 case MLX5_XMETA_MODE_LEGACY:
722                         return REG_B;
723                 case MLX5_XMETA_MODE_META16:
724                         return REG_C_0;
725                 case MLX5_XMETA_MODE_META32:
726                         return REG_C_1;
727                 }
728                 break;
729         case MLX5_METADATA_TX:
730                 return REG_A;
731         case MLX5_METADATA_FDB:
732                 switch (config->dv_xmeta_en) {
733                 case MLX5_XMETA_MODE_LEGACY:
734                         return REG_NON;
735                 case MLX5_XMETA_MODE_META16:
736                         return REG_C_0;
737                 case MLX5_XMETA_MODE_META32:
738                         return REG_C_1;
739                 }
740                 break;
741         case MLX5_FLOW_MARK:
742                 switch (config->dv_xmeta_en) {
743                 case MLX5_XMETA_MODE_LEGACY:
744                         return REG_NON;
745                 case MLX5_XMETA_MODE_META16:
746                         return REG_C_1;
747                 case MLX5_XMETA_MODE_META32:
748                         return REG_C_0;
749                 }
750                 break;
751         case MLX5_MTR_ID:
752                 /*
753                  * If meter color and meter id share one register, flow match
754                  * should use the meter color register for match.
755                  */
756                 if (priv->mtr_reg_share)
757                         return priv->mtr_color_reg;
758                 else
759                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
760                                REG_C_3;
761         case MLX5_MTR_COLOR:
762         case MLX5_ASO_FLOW_HIT:
763         case MLX5_ASO_CONNTRACK:
764                 /* All features use the same REG_C. */
765                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
766                 return priv->mtr_color_reg;
767         case MLX5_COPY_MARK:
768                 /*
769                  * Metadata COPY_MARK register using is in meter suffix sub
770                  * flow while with meter. It's safe to share the same register.
771                  */
772                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
773         case MLX5_APP_TAG:
774                 /*
775                  * If meter is enable, it will engage the register for color
776                  * match and flow match. If meter color match is not using the
777                  * REG_C_2, need to skip the REG_C_x be used by meter color
778                  * match.
779                  * If meter is disable, free to use all available registers.
780                  */
781                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
782                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
783                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
784                 if (id > (uint32_t)(REG_C_7 - start_reg))
785                         return rte_flow_error_set(error, EINVAL,
786                                                   RTE_FLOW_ERROR_TYPE_ITEM,
787                                                   NULL, "invalid tag id");
788                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
789                         return rte_flow_error_set(error, ENOTSUP,
790                                                   RTE_FLOW_ERROR_TYPE_ITEM,
791                                                   NULL, "unsupported tag id");
792                 /*
793                  * This case means meter is using the REG_C_x great than 2.
794                  * Take care not to conflict with meter color REG_C_x.
795                  * If the available index REG_C_y >= REG_C_x, skip the
796                  * color register.
797                  */
798                 if (skip_mtr_reg && config->flow_mreg_c
799                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
800                         if (id >= (uint32_t)(REG_C_7 - start_reg))
801                                 return rte_flow_error_set(error, EINVAL,
802                                                        RTE_FLOW_ERROR_TYPE_ITEM,
803                                                         NULL, "invalid tag id");
804                         if (config->flow_mreg_c
805                             [id + 1 + start_reg - REG_C_0] != REG_NON)
806                                 return config->flow_mreg_c
807                                                [id + 1 + start_reg - REG_C_0];
808                         return rte_flow_error_set(error, ENOTSUP,
809                                                   RTE_FLOW_ERROR_TYPE_ITEM,
810                                                   NULL, "unsupported tag id");
811                 }
812                 return config->flow_mreg_c[id + start_reg - REG_C_0];
813         }
814         MLX5_ASSERT(false);
815         return rte_flow_error_set(error, EINVAL,
816                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
817                                   NULL, "invalid feature name");
818 }
819
820 /**
821  * Check extensive flow metadata register support.
822  *
823  * @param dev
824  *   Pointer to rte_eth_dev structure.
825  *
826  * @return
827  *   True if device supports extensive flow metadata register, otherwise false.
828  */
829 bool
830 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
831 {
832         struct mlx5_priv *priv = dev->data->dev_private;
833         struct mlx5_dev_config *config = &priv->config;
834
835         /*
836          * Having available reg_c can be regarded inclusively as supporting
837          * extensive flow metadata register, which could mean,
838          * - metadata register copy action by modify header.
839          * - 16 modify header actions is supported.
840          * - reg_c's are preserved across different domain (FDB and NIC) on
841          *   packet loopback by flow lookup miss.
842          */
843         return config->flow_mreg_c[2] != REG_NON;
844 }
845
846 /**
847  * Get the lowest priority.
848  *
849  * @param[in] dev
850  *   Pointer to the Ethernet device structure.
851  * @param[in] attributes
852  *   Pointer to device flow rule attributes.
853  *
854  * @return
855  *   The value of lowest priority of flow.
856  */
857 uint32_t
858 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
859                           const struct rte_flow_attr *attr)
860 {
861         struct mlx5_priv *priv = dev->data->dev_private;
862
863         if (!attr->group && !attr->transfer)
864                 return priv->config.flow_prio - 2;
865         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
866 }
867
868 /**
869  * Calculate matcher priority of the flow.
870  *
871  * @param[in] dev
872  *   Pointer to the Ethernet device structure.
873  * @param[in] attr
874  *   Pointer to device flow rule attributes.
875  * @param[in] subpriority
876  *   The priority based on the items.
877  * @return
878  *   The matcher priority of the flow.
879  */
880 uint16_t
881 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
882                           const struct rte_flow_attr *attr,
883                           uint32_t subpriority)
884 {
885         uint16_t priority = (uint16_t)attr->priority;
886         struct mlx5_priv *priv = dev->data->dev_private;
887
888         if (!attr->group && !attr->transfer) {
889                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
890                         priority = priv->config.flow_prio - 1;
891                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
892         }
893         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
894                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
895         return priority * 3 + subpriority;
896 }
897
898 /**
899  * Verify the @p item specifications (spec, last, mask) are compatible with the
900  * NIC capabilities.
901  *
902  * @param[in] item
903  *   Item specification.
904  * @param[in] mask
905  *   @p item->mask or flow default bit-masks.
906  * @param[in] nic_mask
907  *   Bit-masks covering supported fields by the NIC to compare with user mask.
908  * @param[in] size
909  *   Bit-masks size in bytes.
910  * @param[in] range_accepted
911  *   True if range of values is accepted for specific fields, false otherwise.
912  * @param[out] error
913  *   Pointer to error structure.
914  *
915  * @return
916  *   0 on success, a negative errno value otherwise and rte_errno is set.
917  */
918 int
919 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
920                           const uint8_t *mask,
921                           const uint8_t *nic_mask,
922                           unsigned int size,
923                           bool range_accepted,
924                           struct rte_flow_error *error)
925 {
926         unsigned int i;
927
928         MLX5_ASSERT(nic_mask);
929         for (i = 0; i < size; ++i)
930                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
931                         return rte_flow_error_set(error, ENOTSUP,
932                                                   RTE_FLOW_ERROR_TYPE_ITEM,
933                                                   item,
934                                                   "mask enables non supported"
935                                                   " bits");
936         if (!item->spec && (item->mask || item->last))
937                 return rte_flow_error_set(error, EINVAL,
938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
939                                           "mask/last without a spec is not"
940                                           " supported");
941         if (item->spec && item->last && !range_accepted) {
942                 uint8_t spec[size];
943                 uint8_t last[size];
944                 unsigned int i;
945                 int ret;
946
947                 for (i = 0; i < size; ++i) {
948                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
949                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
950                 }
951                 ret = memcmp(spec, last, size);
952                 if (ret != 0)
953                         return rte_flow_error_set(error, EINVAL,
954                                                   RTE_FLOW_ERROR_TYPE_ITEM,
955                                                   item,
956                                                   "range is not valid");
957         }
958         return 0;
959 }
960
961 /**
962  * Adjust the hash fields according to the @p flow information.
963  *
964  * @param[in] dev_flow.
965  *   Pointer to the mlx5_flow.
966  * @param[in] tunnel
967  *   1 when the hash field is for a tunnel item.
968  * @param[in] layer_types
969  *   ETH_RSS_* types.
970  * @param[in] hash_fields
971  *   Item hash fields.
972  *
973  * @return
974  *   The hash fields that should be used.
975  */
976 uint64_t
977 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
978                             int tunnel __rte_unused, uint64_t layer_types,
979                             uint64_t hash_fields)
980 {
981 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
982         int rss_request_inner = rss_desc->level >= 2;
983
984         /* Check RSS hash level for tunnel. */
985         if (tunnel && rss_request_inner)
986                 hash_fields |= IBV_RX_HASH_INNER;
987         else if (tunnel || rss_request_inner)
988                 return 0;
989 #endif
990         /* Check if requested layer matches RSS hash fields. */
991         if (!(rss_desc->types & layer_types))
992                 return 0;
993         return hash_fields;
994 }
995
996 /**
997  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
998  * if several tunnel rules are used on this queue, the tunnel ptype will be
999  * cleared.
1000  *
1001  * @param rxq_ctrl
1002  *   Rx queue to update.
1003  */
1004 static void
1005 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1006 {
1007         unsigned int i;
1008         uint32_t tunnel_ptype = 0;
1009
1010         /* Look up for the ptype to use. */
1011         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1012                 if (!rxq_ctrl->flow_tunnels_n[i])
1013                         continue;
1014                 if (!tunnel_ptype) {
1015                         tunnel_ptype = tunnels_info[i].ptype;
1016                 } else {
1017                         tunnel_ptype = 0;
1018                         break;
1019                 }
1020         }
1021         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1022 }
1023
1024 /**
1025  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1026  * flow.
1027  *
1028  * @param[in] dev
1029  *   Pointer to the Ethernet device structure.
1030  * @param[in] dev_handle
1031  *   Pointer to device flow handle structure.
1032  */
1033 void
1034 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1035                        struct mlx5_flow_handle *dev_handle)
1036 {
1037         struct mlx5_priv *priv = dev->data->dev_private;
1038         const int mark = dev_handle->mark;
1039         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1040         struct mlx5_ind_table_obj *ind_tbl = NULL;
1041         unsigned int i;
1042
1043         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1044                 struct mlx5_hrxq *hrxq;
1045
1046                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1047                               dev_handle->rix_hrxq);
1048                 if (hrxq)
1049                         ind_tbl = hrxq->ind_table;
1050         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1051                 struct mlx5_shared_action_rss *shared_rss;
1052
1053                 shared_rss = mlx5_ipool_get
1054                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1055                          dev_handle->rix_srss);
1056                 if (shared_rss)
1057                         ind_tbl = shared_rss->ind_tbl;
1058         }
1059         if (!ind_tbl)
1060                 return;
1061         for (i = 0; i != ind_tbl->queues_n; ++i) {
1062                 int idx = ind_tbl->queues[i];
1063                 struct mlx5_rxq_ctrl *rxq_ctrl =
1064                         container_of((*priv->rxqs)[idx],
1065                                      struct mlx5_rxq_ctrl, rxq);
1066
1067                 /*
1068                  * To support metadata register copy on Tx loopback,
1069                  * this must be always enabled (metadata may arive
1070                  * from other port - not from local flows only.
1071                  */
1072                 if (priv->config.dv_flow_en &&
1073                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1074                     mlx5_flow_ext_mreg_supported(dev)) {
1075                         rxq_ctrl->rxq.mark = 1;
1076                         rxq_ctrl->flow_mark_n = 1;
1077                 } else if (mark) {
1078                         rxq_ctrl->rxq.mark = 1;
1079                         rxq_ctrl->flow_mark_n++;
1080                 }
1081                 if (tunnel) {
1082                         unsigned int j;
1083
1084                         /* Increase the counter matching the flow. */
1085                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1086                                 if ((tunnels_info[j].tunnel &
1087                                      dev_handle->layers) ==
1088                                     tunnels_info[j].tunnel) {
1089                                         rxq_ctrl->flow_tunnels_n[j]++;
1090                                         break;
1091                                 }
1092                         }
1093                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1094                 }
1095         }
1096 }
1097
1098 /**
1099  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1100  *
1101  * @param[in] dev
1102  *   Pointer to the Ethernet device structure.
1103  * @param[in] flow
1104  *   Pointer to flow structure.
1105  */
1106 static void
1107 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1108 {
1109         struct mlx5_priv *priv = dev->data->dev_private;
1110         uint32_t handle_idx;
1111         struct mlx5_flow_handle *dev_handle;
1112
1113         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1114                        handle_idx, dev_handle, next)
1115                 flow_drv_rxq_flags_set(dev, dev_handle);
1116 }
1117
1118 /**
1119  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1120  * device flow if no other flow uses it with the same kind of request.
1121  *
1122  * @param dev
1123  *   Pointer to Ethernet device.
1124  * @param[in] dev_handle
1125  *   Pointer to the device flow handle structure.
1126  */
1127 static void
1128 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1129                         struct mlx5_flow_handle *dev_handle)
1130 {
1131         struct mlx5_priv *priv = dev->data->dev_private;
1132         const int mark = dev_handle->mark;
1133         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1134         struct mlx5_ind_table_obj *ind_tbl = NULL;
1135         unsigned int i;
1136
1137         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1138                 struct mlx5_hrxq *hrxq;
1139
1140                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1141                               dev_handle->rix_hrxq);
1142                 if (hrxq)
1143                         ind_tbl = hrxq->ind_table;
1144         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1145                 struct mlx5_shared_action_rss *shared_rss;
1146
1147                 shared_rss = mlx5_ipool_get
1148                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1149                          dev_handle->rix_srss);
1150                 if (shared_rss)
1151                         ind_tbl = shared_rss->ind_tbl;
1152         }
1153         if (!ind_tbl)
1154                 return;
1155         MLX5_ASSERT(dev->data->dev_started);
1156         for (i = 0; i != ind_tbl->queues_n; ++i) {
1157                 int idx = ind_tbl->queues[i];
1158                 struct mlx5_rxq_ctrl *rxq_ctrl =
1159                         container_of((*priv->rxqs)[idx],
1160                                      struct mlx5_rxq_ctrl, rxq);
1161
1162                 if (priv->config.dv_flow_en &&
1163                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1164                     mlx5_flow_ext_mreg_supported(dev)) {
1165                         rxq_ctrl->rxq.mark = 1;
1166                         rxq_ctrl->flow_mark_n = 1;
1167                 } else if (mark) {
1168                         rxq_ctrl->flow_mark_n--;
1169                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1170                 }
1171                 if (tunnel) {
1172                         unsigned int j;
1173
1174                         /* Decrease the counter matching the flow. */
1175                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1176                                 if ((tunnels_info[j].tunnel &
1177                                      dev_handle->layers) ==
1178                                     tunnels_info[j].tunnel) {
1179                                         rxq_ctrl->flow_tunnels_n[j]--;
1180                                         break;
1181                                 }
1182                         }
1183                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1184                 }
1185         }
1186 }
1187
1188 /**
1189  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1190  * @p flow if no other flow uses it with the same kind of request.
1191  *
1192  * @param dev
1193  *   Pointer to Ethernet device.
1194  * @param[in] flow
1195  *   Pointer to the flow.
1196  */
1197 static void
1198 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1199 {
1200         struct mlx5_priv *priv = dev->data->dev_private;
1201         uint32_t handle_idx;
1202         struct mlx5_flow_handle *dev_handle;
1203
1204         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1205                        handle_idx, dev_handle, next)
1206                 flow_drv_rxq_flags_trim(dev, dev_handle);
1207 }
1208
1209 /**
1210  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1211  *
1212  * @param dev
1213  *   Pointer to Ethernet device.
1214  */
1215 static void
1216 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1217 {
1218         struct mlx5_priv *priv = dev->data->dev_private;
1219         unsigned int i;
1220
1221         for (i = 0; i != priv->rxqs_n; ++i) {
1222                 struct mlx5_rxq_ctrl *rxq_ctrl;
1223                 unsigned int j;
1224
1225                 if (!(*priv->rxqs)[i])
1226                         continue;
1227                 rxq_ctrl = container_of((*priv->rxqs)[i],
1228                                         struct mlx5_rxq_ctrl, rxq);
1229                 rxq_ctrl->flow_mark_n = 0;
1230                 rxq_ctrl->rxq.mark = 0;
1231                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1232                         rxq_ctrl->flow_tunnels_n[j] = 0;
1233                 rxq_ctrl->rxq.tunnel = 0;
1234         }
1235 }
1236
1237 /**
1238  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1239  *
1240  * @param[in] dev
1241  *   Pointer to the Ethernet device structure.
1242  */
1243 void
1244 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1245 {
1246         struct mlx5_priv *priv = dev->data->dev_private;
1247         struct mlx5_rxq_data *data;
1248         unsigned int i;
1249
1250         for (i = 0; i != priv->rxqs_n; ++i) {
1251                 if (!(*priv->rxqs)[i])
1252                         continue;
1253                 data = (*priv->rxqs)[i];
1254                 if (!rte_flow_dynf_metadata_avail()) {
1255                         data->dynf_meta = 0;
1256                         data->flow_meta_mask = 0;
1257                         data->flow_meta_offset = -1;
1258                         data->flow_meta_port_mask = 0;
1259                 } else {
1260                         data->dynf_meta = 1;
1261                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1262                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1263                         data->flow_meta_port_mask = (uint32_t)~0;
1264                         if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16)
1265                                 data->flow_meta_port_mask >>= 16;
1266                 }
1267         }
1268 }
1269
1270 /*
1271  * return a pointer to the desired action in the list of actions.
1272  *
1273  * @param[in] actions
1274  *   The list of actions to search the action in.
1275  * @param[in] action
1276  *   The action to find.
1277  *
1278  * @return
1279  *   Pointer to the action in the list, if found. NULL otherwise.
1280  */
1281 const struct rte_flow_action *
1282 mlx5_flow_find_action(const struct rte_flow_action *actions,
1283                       enum rte_flow_action_type action)
1284 {
1285         if (actions == NULL)
1286                 return NULL;
1287         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1288                 if (actions->type == action)
1289                         return actions;
1290         return NULL;
1291 }
1292
1293 /*
1294  * Validate the flag action.
1295  *
1296  * @param[in] action_flags
1297  *   Bit-fields that holds the actions detected until now.
1298  * @param[in] attr
1299  *   Attributes of flow that includes this action.
1300  * @param[out] error
1301  *   Pointer to error structure.
1302  *
1303  * @return
1304  *   0 on success, a negative errno value otherwise and rte_errno is set.
1305  */
1306 int
1307 mlx5_flow_validate_action_flag(uint64_t action_flags,
1308                                const struct rte_flow_attr *attr,
1309                                struct rte_flow_error *error)
1310 {
1311         if (action_flags & MLX5_FLOW_ACTION_MARK)
1312                 return rte_flow_error_set(error, EINVAL,
1313                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1314                                           "can't mark and flag in same flow");
1315         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1316                 return rte_flow_error_set(error, EINVAL,
1317                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1318                                           "can't have 2 flag"
1319                                           " actions in same flow");
1320         if (attr->egress)
1321                 return rte_flow_error_set(error, ENOTSUP,
1322                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1323                                           "flag action not supported for "
1324                                           "egress");
1325         return 0;
1326 }
1327
1328 /*
1329  * Validate the mark action.
1330  *
1331  * @param[in] action
1332  *   Pointer to the queue action.
1333  * @param[in] action_flags
1334  *   Bit-fields that holds the actions detected until now.
1335  * @param[in] attr
1336  *   Attributes of flow that includes this action.
1337  * @param[out] error
1338  *   Pointer to error structure.
1339  *
1340  * @return
1341  *   0 on success, a negative errno value otherwise and rte_errno is set.
1342  */
1343 int
1344 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1345                                uint64_t action_flags,
1346                                const struct rte_flow_attr *attr,
1347                                struct rte_flow_error *error)
1348 {
1349         const struct rte_flow_action_mark *mark = action->conf;
1350
1351         if (!mark)
1352                 return rte_flow_error_set(error, EINVAL,
1353                                           RTE_FLOW_ERROR_TYPE_ACTION,
1354                                           action,
1355                                           "configuration cannot be null");
1356         if (mark->id >= MLX5_FLOW_MARK_MAX)
1357                 return rte_flow_error_set(error, EINVAL,
1358                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1359                                           &mark->id,
1360                                           "mark id must in 0 <= id < "
1361                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1362         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1363                 return rte_flow_error_set(error, EINVAL,
1364                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1365                                           "can't flag and mark in same flow");
1366         if (action_flags & MLX5_FLOW_ACTION_MARK)
1367                 return rte_flow_error_set(error, EINVAL,
1368                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1369                                           "can't have 2 mark actions in same"
1370                                           " flow");
1371         if (attr->egress)
1372                 return rte_flow_error_set(error, ENOTSUP,
1373                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1374                                           "mark action not supported for "
1375                                           "egress");
1376         return 0;
1377 }
1378
1379 /*
1380  * Validate the drop action.
1381  *
1382  * @param[in] action_flags
1383  *   Bit-fields that holds the actions detected until now.
1384  * @param[in] attr
1385  *   Attributes of flow that includes this action.
1386  * @param[out] error
1387  *   Pointer to error structure.
1388  *
1389  * @return
1390  *   0 on success, a negative errno value otherwise and rte_errno is set.
1391  */
1392 int
1393 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1394                                const struct rte_flow_attr *attr,
1395                                struct rte_flow_error *error)
1396 {
1397         if (attr->egress)
1398                 return rte_flow_error_set(error, ENOTSUP,
1399                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1400                                           "drop action not supported for "
1401                                           "egress");
1402         return 0;
1403 }
1404
1405 /*
1406  * Validate the queue action.
1407  *
1408  * @param[in] action
1409  *   Pointer to the queue action.
1410  * @param[in] action_flags
1411  *   Bit-fields that holds the actions detected until now.
1412  * @param[in] dev
1413  *   Pointer to the Ethernet device structure.
1414  * @param[in] attr
1415  *   Attributes of flow that includes this action.
1416  * @param[out] error
1417  *   Pointer to error structure.
1418  *
1419  * @return
1420  *   0 on success, a negative errno value otherwise and rte_errno is set.
1421  */
1422 int
1423 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1424                                 uint64_t action_flags,
1425                                 struct rte_eth_dev *dev,
1426                                 const struct rte_flow_attr *attr,
1427                                 struct rte_flow_error *error)
1428 {
1429         struct mlx5_priv *priv = dev->data->dev_private;
1430         const struct rte_flow_action_queue *queue = action->conf;
1431
1432         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1433                 return rte_flow_error_set(error, EINVAL,
1434                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1435                                           "can't have 2 fate actions in"
1436                                           " same flow");
1437         if (!priv->rxqs_n)
1438                 return rte_flow_error_set(error, EINVAL,
1439                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1440                                           NULL, "No Rx queues configured");
1441         if (queue->index >= priv->rxqs_n)
1442                 return rte_flow_error_set(error, EINVAL,
1443                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1444                                           &queue->index,
1445                                           "queue index out of range");
1446         if (!(*priv->rxqs)[queue->index])
1447                 return rte_flow_error_set(error, EINVAL,
1448                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1449                                           &queue->index,
1450                                           "queue is not configured");
1451         if (attr->egress)
1452                 return rte_flow_error_set(error, ENOTSUP,
1453                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1454                                           "queue action not supported for "
1455                                           "egress");
1456         return 0;
1457 }
1458
1459 /*
1460  * Validate the rss action.
1461  *
1462  * @param[in] dev
1463  *   Pointer to the Ethernet device structure.
1464  * @param[in] action
1465  *   Pointer to the queue action.
1466  * @param[out] error
1467  *   Pointer to error structure.
1468  *
1469  * @return
1470  *   0 on success, a negative errno value otherwise and rte_errno is set.
1471  */
1472 int
1473 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1474                          const struct rte_flow_action *action,
1475                          struct rte_flow_error *error)
1476 {
1477         struct mlx5_priv *priv = dev->data->dev_private;
1478         const struct rte_flow_action_rss *rss = action->conf;
1479         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1480         unsigned int i;
1481
1482         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1483             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1484                 return rte_flow_error_set(error, ENOTSUP,
1485                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1486                                           &rss->func,
1487                                           "RSS hash function not supported");
1488 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1489         if (rss->level > 2)
1490 #else
1491         if (rss->level > 1)
1492 #endif
1493                 return rte_flow_error_set(error, ENOTSUP,
1494                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1495                                           &rss->level,
1496                                           "tunnel RSS is not supported");
1497         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1498         if (rss->key_len == 0 && rss->key != NULL)
1499                 return rte_flow_error_set(error, ENOTSUP,
1500                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1501                                           &rss->key_len,
1502                                           "RSS hash key length 0");
1503         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1504                 return rte_flow_error_set(error, ENOTSUP,
1505                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1506                                           &rss->key_len,
1507                                           "RSS hash key too small");
1508         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1509                 return rte_flow_error_set(error, ENOTSUP,
1510                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1511                                           &rss->key_len,
1512                                           "RSS hash key too large");
1513         if (rss->queue_num > priv->config.ind_table_max_size)
1514                 return rte_flow_error_set(error, ENOTSUP,
1515                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1516                                           &rss->queue_num,
1517                                           "number of queues too large");
1518         if (rss->types & MLX5_RSS_HF_MASK)
1519                 return rte_flow_error_set(error, ENOTSUP,
1520                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1521                                           &rss->types,
1522                                           "some RSS protocols are not"
1523                                           " supported");
1524         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1525             !(rss->types & ETH_RSS_IP))
1526                 return rte_flow_error_set(error, EINVAL,
1527                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1528                                           "L3 partial RSS requested but L3 RSS"
1529                                           " type not specified");
1530         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1531             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1532                 return rte_flow_error_set(error, EINVAL,
1533                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1534                                           "L4 partial RSS requested but L4 RSS"
1535                                           " type not specified");
1536         if (!priv->rxqs_n)
1537                 return rte_flow_error_set(error, EINVAL,
1538                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1539                                           NULL, "No Rx queues configured");
1540         if (!rss->queue_num)
1541                 return rte_flow_error_set(error, EINVAL,
1542                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1543                                           NULL, "No queues configured");
1544         for (i = 0; i != rss->queue_num; ++i) {
1545                 struct mlx5_rxq_ctrl *rxq_ctrl;
1546
1547                 if (rss->queue[i] >= priv->rxqs_n)
1548                         return rte_flow_error_set
1549                                 (error, EINVAL,
1550                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1551                                  &rss->queue[i], "queue index out of range");
1552                 if (!(*priv->rxqs)[rss->queue[i]])
1553                         return rte_flow_error_set
1554                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1555                                  &rss->queue[i], "queue is not configured");
1556                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1557                                         struct mlx5_rxq_ctrl, rxq);
1558                 if (i == 0)
1559                         rxq_type = rxq_ctrl->type;
1560                 if (rxq_type != rxq_ctrl->type)
1561                         return rte_flow_error_set
1562                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1563                                  &rss->queue[i],
1564                                  "combining hairpin and regular RSS queues is not supported");
1565         }
1566         return 0;
1567 }
1568
1569 /*
1570  * Validate the rss action.
1571  *
1572  * @param[in] action
1573  *   Pointer to the queue action.
1574  * @param[in] action_flags
1575  *   Bit-fields that holds the actions detected until now.
1576  * @param[in] dev
1577  *   Pointer to the Ethernet device structure.
1578  * @param[in] attr
1579  *   Attributes of flow that includes this action.
1580  * @param[in] item_flags
1581  *   Items that were detected.
1582  * @param[out] error
1583  *   Pointer to error structure.
1584  *
1585  * @return
1586  *   0 on success, a negative errno value otherwise and rte_errno is set.
1587  */
1588 int
1589 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1590                               uint64_t action_flags,
1591                               struct rte_eth_dev *dev,
1592                               const struct rte_flow_attr *attr,
1593                               uint64_t item_flags,
1594                               struct rte_flow_error *error)
1595 {
1596         const struct rte_flow_action_rss *rss = action->conf;
1597         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1598         int ret;
1599
1600         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1601                 return rte_flow_error_set(error, EINVAL,
1602                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1603                                           "can't have 2 fate actions"
1604                                           " in same flow");
1605         ret = mlx5_validate_action_rss(dev, action, error);
1606         if (ret)
1607                 return ret;
1608         if (attr->egress)
1609                 return rte_flow_error_set(error, ENOTSUP,
1610                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1611                                           "rss action not supported for "
1612                                           "egress");
1613         if (rss->level > 1 && !tunnel)
1614                 return rte_flow_error_set(error, EINVAL,
1615                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1616                                           "inner RSS is not supported for "
1617                                           "non-tunnel flows");
1618         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1619             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1620                 return rte_flow_error_set(error, EINVAL,
1621                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1622                                           "RSS on eCPRI is not supported now");
1623         }
1624         return 0;
1625 }
1626
1627 /*
1628  * Validate the default miss action.
1629  *
1630  * @param[in] action_flags
1631  *   Bit-fields that holds the actions detected until now.
1632  * @param[out] error
1633  *   Pointer to error structure.
1634  *
1635  * @return
1636  *   0 on success, a negative errno value otherwise and rte_errno is set.
1637  */
1638 int
1639 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1640                                 const struct rte_flow_attr *attr,
1641                                 struct rte_flow_error *error)
1642 {
1643         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1644                 return rte_flow_error_set(error, EINVAL,
1645                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1646                                           "can't have 2 fate actions in"
1647                                           " same flow");
1648         if (attr->egress)
1649                 return rte_flow_error_set(error, ENOTSUP,
1650                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1651                                           "default miss action not supported "
1652                                           "for egress");
1653         if (attr->group)
1654                 return rte_flow_error_set(error, ENOTSUP,
1655                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1656                                           "only group 0 is supported");
1657         if (attr->transfer)
1658                 return rte_flow_error_set(error, ENOTSUP,
1659                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1660                                           NULL, "transfer is not supported");
1661         return 0;
1662 }
1663
1664 /*
1665  * Validate the count action.
1666  *
1667  * @param[in] dev
1668  *   Pointer to the Ethernet device structure.
1669  * @param[in] attr
1670  *   Attributes of flow that includes this action.
1671  * @param[out] error
1672  *   Pointer to error structure.
1673  *
1674  * @return
1675  *   0 on success, a negative errno value otherwise and rte_errno is set.
1676  */
1677 int
1678 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1679                                 const struct rte_flow_attr *attr,
1680                                 struct rte_flow_error *error)
1681 {
1682         if (attr->egress)
1683                 return rte_flow_error_set(error, ENOTSUP,
1684                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1685                                           "count action not supported for "
1686                                           "egress");
1687         return 0;
1688 }
1689
1690 /**
1691  * Verify the @p attributes will be correctly understood by the NIC and store
1692  * them in the @p flow if everything is correct.
1693  *
1694  * @param[in] dev
1695  *   Pointer to the Ethernet device structure.
1696  * @param[in] attributes
1697  *   Pointer to flow attributes
1698  * @param[out] error
1699  *   Pointer to error structure.
1700  *
1701  * @return
1702  *   0 on success, a negative errno value otherwise and rte_errno is set.
1703  */
1704 int
1705 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1706                               const struct rte_flow_attr *attributes,
1707                               struct rte_flow_error *error)
1708 {
1709         struct mlx5_priv *priv = dev->data->dev_private;
1710         uint32_t priority_max = priv->config.flow_prio - 1;
1711
1712         if (attributes->group)
1713                 return rte_flow_error_set(error, ENOTSUP,
1714                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1715                                           NULL, "groups is not supported");
1716         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1717             attributes->priority >= priority_max)
1718                 return rte_flow_error_set(error, ENOTSUP,
1719                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1720                                           NULL, "priority out of range");
1721         if (attributes->egress)
1722                 return rte_flow_error_set(error, ENOTSUP,
1723                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1724                                           "egress is not supported");
1725         if (attributes->transfer && !priv->config.dv_esw_en)
1726                 return rte_flow_error_set(error, ENOTSUP,
1727                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1728                                           NULL, "transfer is not supported");
1729         if (!attributes->ingress)
1730                 return rte_flow_error_set(error, EINVAL,
1731                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1732                                           NULL,
1733                                           "ingress attribute is mandatory");
1734         return 0;
1735 }
1736
1737 /**
1738  * Validate ICMP6 item.
1739  *
1740  * @param[in] item
1741  *   Item specification.
1742  * @param[in] item_flags
1743  *   Bit-fields that holds the items detected until now.
1744  * @param[in] ext_vlan_sup
1745  *   Whether extended VLAN features are supported or not.
1746  * @param[out] error
1747  *   Pointer to error structure.
1748  *
1749  * @return
1750  *   0 on success, a negative errno value otherwise and rte_errno is set.
1751  */
1752 int
1753 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1754                                uint64_t item_flags,
1755                                uint8_t target_protocol,
1756                                struct rte_flow_error *error)
1757 {
1758         const struct rte_flow_item_icmp6 *mask = item->mask;
1759         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1760         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1761                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1762         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1763                                       MLX5_FLOW_LAYER_OUTER_L4;
1764         int ret;
1765
1766         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1767                 return rte_flow_error_set(error, EINVAL,
1768                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1769                                           "protocol filtering not compatible"
1770                                           " with ICMP6 layer");
1771         if (!(item_flags & l3m))
1772                 return rte_flow_error_set(error, EINVAL,
1773                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1774                                           "IPv6 is mandatory to filter on"
1775                                           " ICMP6");
1776         if (item_flags & l4m)
1777                 return rte_flow_error_set(error, EINVAL,
1778                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1779                                           "multiple L4 layers not supported");
1780         if (!mask)
1781                 mask = &rte_flow_item_icmp6_mask;
1782         ret = mlx5_flow_item_acceptable
1783                 (item, (const uint8_t *)mask,
1784                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1785                  sizeof(struct rte_flow_item_icmp6),
1786                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1787         if (ret < 0)
1788                 return ret;
1789         return 0;
1790 }
1791
1792 /**
1793  * Validate ICMP item.
1794  *
1795  * @param[in] item
1796  *   Item specification.
1797  * @param[in] item_flags
1798  *   Bit-fields that holds the items detected until now.
1799  * @param[out] error
1800  *   Pointer to error structure.
1801  *
1802  * @return
1803  *   0 on success, a negative errno value otherwise and rte_errno is set.
1804  */
1805 int
1806 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1807                              uint64_t item_flags,
1808                              uint8_t target_protocol,
1809                              struct rte_flow_error *error)
1810 {
1811         const struct rte_flow_item_icmp *mask = item->mask;
1812         const struct rte_flow_item_icmp nic_mask = {
1813                 .hdr.icmp_type = 0xff,
1814                 .hdr.icmp_code = 0xff,
1815                 .hdr.icmp_ident = RTE_BE16(0xffff),
1816                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1817         };
1818         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1819         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1820                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1821         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1822                                       MLX5_FLOW_LAYER_OUTER_L4;
1823         int ret;
1824
1825         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1826                 return rte_flow_error_set(error, EINVAL,
1827                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1828                                           "protocol filtering not compatible"
1829                                           " with ICMP layer");
1830         if (!(item_flags & l3m))
1831                 return rte_flow_error_set(error, EINVAL,
1832                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1833                                           "IPv4 is mandatory to filter"
1834                                           " on ICMP");
1835         if (item_flags & l4m)
1836                 return rte_flow_error_set(error, EINVAL,
1837                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1838                                           "multiple L4 layers not supported");
1839         if (!mask)
1840                 mask = &nic_mask;
1841         ret = mlx5_flow_item_acceptable
1842                 (item, (const uint8_t *)mask,
1843                  (const uint8_t *)&nic_mask,
1844                  sizeof(struct rte_flow_item_icmp),
1845                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1846         if (ret < 0)
1847                 return ret;
1848         return 0;
1849 }
1850
1851 /**
1852  * Validate Ethernet item.
1853  *
1854  * @param[in] item
1855  *   Item specification.
1856  * @param[in] item_flags
1857  *   Bit-fields that holds the items detected until now.
1858  * @param[out] error
1859  *   Pointer to error structure.
1860  *
1861  * @return
1862  *   0 on success, a negative errno value otherwise and rte_errno is set.
1863  */
1864 int
1865 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1866                             uint64_t item_flags, bool ext_vlan_sup,
1867                             struct rte_flow_error *error)
1868 {
1869         const struct rte_flow_item_eth *mask = item->mask;
1870         const struct rte_flow_item_eth nic_mask = {
1871                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1872                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1873                 .type = RTE_BE16(0xffff),
1874                 .has_vlan = ext_vlan_sup ? 1 : 0,
1875         };
1876         int ret;
1877         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1878         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1879                                        MLX5_FLOW_LAYER_OUTER_L2;
1880
1881         if (item_flags & ethm)
1882                 return rte_flow_error_set(error, ENOTSUP,
1883                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1884                                           "multiple L2 layers not supported");
1885         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1886             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1887                 return rte_flow_error_set(error, EINVAL,
1888                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1889                                           "L2 layer should not follow "
1890                                           "L3 layers");
1891         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1892             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1893                 return rte_flow_error_set(error, EINVAL,
1894                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1895                                           "L2 layer should not follow VLAN");
1896         if (!mask)
1897                 mask = &rte_flow_item_eth_mask;
1898         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1899                                         (const uint8_t *)&nic_mask,
1900                                         sizeof(struct rte_flow_item_eth),
1901                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1902         return ret;
1903 }
1904
1905 /**
1906  * Validate VLAN item.
1907  *
1908  * @param[in] item
1909  *   Item specification.
1910  * @param[in] item_flags
1911  *   Bit-fields that holds the items detected until now.
1912  * @param[in] dev
1913  *   Ethernet device flow is being created on.
1914  * @param[out] error
1915  *   Pointer to error structure.
1916  *
1917  * @return
1918  *   0 on success, a negative errno value otherwise and rte_errno is set.
1919  */
1920 int
1921 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1922                              uint64_t item_flags,
1923                              struct rte_eth_dev *dev,
1924                              struct rte_flow_error *error)
1925 {
1926         const struct rte_flow_item_vlan *spec = item->spec;
1927         const struct rte_flow_item_vlan *mask = item->mask;
1928         const struct rte_flow_item_vlan nic_mask = {
1929                 .tci = RTE_BE16(UINT16_MAX),
1930                 .inner_type = RTE_BE16(UINT16_MAX),
1931         };
1932         uint16_t vlan_tag = 0;
1933         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1934         int ret;
1935         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1936                                         MLX5_FLOW_LAYER_INNER_L4) :
1937                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1938                                         MLX5_FLOW_LAYER_OUTER_L4);
1939         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1940                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1941
1942         if (item_flags & vlanm)
1943                 return rte_flow_error_set(error, EINVAL,
1944                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1945                                           "multiple VLAN layers not supported");
1946         else if ((item_flags & l34m) != 0)
1947                 return rte_flow_error_set(error, EINVAL,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "VLAN cannot follow L3/L4 layer");
1950         if (!mask)
1951                 mask = &rte_flow_item_vlan_mask;
1952         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1953                                         (const uint8_t *)&nic_mask,
1954                                         sizeof(struct rte_flow_item_vlan),
1955                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1956         if (ret)
1957                 return ret;
1958         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1959                 struct mlx5_priv *priv = dev->data->dev_private;
1960
1961                 if (priv->vmwa_context) {
1962                         /*
1963                          * Non-NULL context means we have a virtual machine
1964                          * and SR-IOV enabled, we have to create VLAN interface
1965                          * to make hypervisor to setup E-Switch vport
1966                          * context correctly. We avoid creating the multiple
1967                          * VLAN interfaces, so we cannot support VLAN tag mask.
1968                          */
1969                         return rte_flow_error_set(error, EINVAL,
1970                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1971                                                   item,
1972                                                   "VLAN tag mask is not"
1973                                                   " supported in virtual"
1974                                                   " environment");
1975                 }
1976         }
1977         if (spec) {
1978                 vlan_tag = spec->tci;
1979                 vlan_tag &= mask->tci;
1980         }
1981         /*
1982          * From verbs perspective an empty VLAN is equivalent
1983          * to a packet without VLAN layer.
1984          */
1985         if (!vlan_tag)
1986                 return rte_flow_error_set(error, EINVAL,
1987                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1988                                           item->spec,
1989                                           "VLAN cannot be empty");
1990         return 0;
1991 }
1992
1993 /**
1994  * Validate IPV4 item.
1995  *
1996  * @param[in] item
1997  *   Item specification.
1998  * @param[in] item_flags
1999  *   Bit-fields that holds the items detected until now.
2000  * @param[in] last_item
2001  *   Previous validated item in the pattern items.
2002  * @param[in] ether_type
2003  *   Type in the ethernet layer header (including dot1q).
2004  * @param[in] acc_mask
2005  *   Acceptable mask, if NULL default internal default mask
2006  *   will be used to check whether item fields are supported.
2007  * @param[in] range_accepted
2008  *   True if range of values is accepted for specific fields, false otherwise.
2009  * @param[out] error
2010  *   Pointer to error structure.
2011  *
2012  * @return
2013  *   0 on success, a negative errno value otherwise and rte_errno is set.
2014  */
2015 int
2016 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2017                              uint64_t item_flags,
2018                              uint64_t last_item,
2019                              uint16_t ether_type,
2020                              const struct rte_flow_item_ipv4 *acc_mask,
2021                              bool range_accepted,
2022                              struct rte_flow_error *error)
2023 {
2024         const struct rte_flow_item_ipv4 *mask = item->mask;
2025         const struct rte_flow_item_ipv4 *spec = item->spec;
2026         const struct rte_flow_item_ipv4 nic_mask = {
2027                 .hdr = {
2028                         .src_addr = RTE_BE32(0xffffffff),
2029                         .dst_addr = RTE_BE32(0xffffffff),
2030                         .type_of_service = 0xff,
2031                         .next_proto_id = 0xff,
2032                 },
2033         };
2034         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2035         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2036                                       MLX5_FLOW_LAYER_OUTER_L3;
2037         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2038                                       MLX5_FLOW_LAYER_OUTER_L4;
2039         int ret;
2040         uint8_t next_proto = 0xFF;
2041         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2042                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2043                                   MLX5_FLOW_LAYER_INNER_VLAN);
2044
2045         if ((last_item & l2_vlan) && ether_type &&
2046             ether_type != RTE_ETHER_TYPE_IPV4)
2047                 return rte_flow_error_set(error, EINVAL,
2048                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2049                                           "IPv4 cannot follow L2/VLAN layer "
2050                                           "which ether type is not IPv4");
2051         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2052                 if (mask && spec)
2053                         next_proto = mask->hdr.next_proto_id &
2054                                      spec->hdr.next_proto_id;
2055                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2056                         return rte_flow_error_set(error, EINVAL,
2057                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2058                                                   item,
2059                                                   "multiple tunnel "
2060                                                   "not supported");
2061         }
2062         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2063                 return rte_flow_error_set(error, EINVAL,
2064                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2065                                           "wrong tunnel type - IPv6 specified "
2066                                           "but IPv4 item provided");
2067         if (item_flags & l3m)
2068                 return rte_flow_error_set(error, ENOTSUP,
2069                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2070                                           "multiple L3 layers not supported");
2071         else if (item_flags & l4m)
2072                 return rte_flow_error_set(error, EINVAL,
2073                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2074                                           "L3 cannot follow an L4 layer.");
2075         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2076                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2077                 return rte_flow_error_set(error, EINVAL,
2078                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2079                                           "L3 cannot follow an NVGRE layer.");
2080         if (!mask)
2081                 mask = &rte_flow_item_ipv4_mask;
2082         else if (mask->hdr.next_proto_id != 0 &&
2083                  mask->hdr.next_proto_id != 0xff)
2084                 return rte_flow_error_set(error, EINVAL,
2085                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2086                                           "partial mask is not supported"
2087                                           " for protocol");
2088         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2089                                         acc_mask ? (const uint8_t *)acc_mask
2090                                                  : (const uint8_t *)&nic_mask,
2091                                         sizeof(struct rte_flow_item_ipv4),
2092                                         range_accepted, error);
2093         if (ret < 0)
2094                 return ret;
2095         return 0;
2096 }
2097
2098 /**
2099  * Validate IPV6 item.
2100  *
2101  * @param[in] item
2102  *   Item specification.
2103  * @param[in] item_flags
2104  *   Bit-fields that holds the items detected until now.
2105  * @param[in] last_item
2106  *   Previous validated item in the pattern items.
2107  * @param[in] ether_type
2108  *   Type in the ethernet layer header (including dot1q).
2109  * @param[in] acc_mask
2110  *   Acceptable mask, if NULL default internal default mask
2111  *   will be used to check whether item fields are supported.
2112  * @param[out] error
2113  *   Pointer to error structure.
2114  *
2115  * @return
2116  *   0 on success, a negative errno value otherwise and rte_errno is set.
2117  */
2118 int
2119 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2120                              uint64_t item_flags,
2121                              uint64_t last_item,
2122                              uint16_t ether_type,
2123                              const struct rte_flow_item_ipv6 *acc_mask,
2124                              struct rte_flow_error *error)
2125 {
2126         const struct rte_flow_item_ipv6 *mask = item->mask;
2127         const struct rte_flow_item_ipv6 *spec = item->spec;
2128         const struct rte_flow_item_ipv6 nic_mask = {
2129                 .hdr = {
2130                         .src_addr =
2131                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2132                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2133                         .dst_addr =
2134                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2135                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2136                         .vtc_flow = RTE_BE32(0xffffffff),
2137                         .proto = 0xff,
2138                 },
2139         };
2140         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2141         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2142                                       MLX5_FLOW_LAYER_OUTER_L3;
2143         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2144                                       MLX5_FLOW_LAYER_OUTER_L4;
2145         int ret;
2146         uint8_t next_proto = 0xFF;
2147         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2148                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2149                                   MLX5_FLOW_LAYER_INNER_VLAN);
2150
2151         if ((last_item & l2_vlan) && ether_type &&
2152             ether_type != RTE_ETHER_TYPE_IPV6)
2153                 return rte_flow_error_set(error, EINVAL,
2154                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2155                                           "IPv6 cannot follow L2/VLAN layer "
2156                                           "which ether type is not IPv6");
2157         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2158                 next_proto = spec->hdr.proto;
2159         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2160                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2161                         return rte_flow_error_set(error, EINVAL,
2162                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2163                                                   item,
2164                                                   "multiple tunnel "
2165                                                   "not supported");
2166         }
2167         if (next_proto == IPPROTO_HOPOPTS  ||
2168             next_proto == IPPROTO_ROUTING  ||
2169             next_proto == IPPROTO_FRAGMENT ||
2170             next_proto == IPPROTO_ESP      ||
2171             next_proto == IPPROTO_AH       ||
2172             next_proto == IPPROTO_DSTOPTS)
2173                 return rte_flow_error_set(error, EINVAL,
2174                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2175                                           "IPv6 proto (next header) should "
2176                                           "not be set as extension header");
2177         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2178                 return rte_flow_error_set(error, EINVAL,
2179                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2180                                           "wrong tunnel type - IPv4 specified "
2181                                           "but IPv6 item provided");
2182         if (item_flags & l3m)
2183                 return rte_flow_error_set(error, ENOTSUP,
2184                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2185                                           "multiple L3 layers not supported");
2186         else if (item_flags & l4m)
2187                 return rte_flow_error_set(error, EINVAL,
2188                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2189                                           "L3 cannot follow an L4 layer.");
2190         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2191                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2192                 return rte_flow_error_set(error, EINVAL,
2193                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2194                                           "L3 cannot follow an NVGRE layer.");
2195         if (!mask)
2196                 mask = &rte_flow_item_ipv6_mask;
2197         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2198                                         acc_mask ? (const uint8_t *)acc_mask
2199                                                  : (const uint8_t *)&nic_mask,
2200                                         sizeof(struct rte_flow_item_ipv6),
2201                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2202         if (ret < 0)
2203                 return ret;
2204         return 0;
2205 }
2206
2207 /**
2208  * Validate UDP item.
2209  *
2210  * @param[in] item
2211  *   Item specification.
2212  * @param[in] item_flags
2213  *   Bit-fields that holds the items detected until now.
2214  * @param[in] target_protocol
2215  *   The next protocol in the previous item.
2216  * @param[in] flow_mask
2217  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2218  * @param[out] error
2219  *   Pointer to error structure.
2220  *
2221  * @return
2222  *   0 on success, a negative errno value otherwise and rte_errno is set.
2223  */
2224 int
2225 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2226                             uint64_t item_flags,
2227                             uint8_t target_protocol,
2228                             struct rte_flow_error *error)
2229 {
2230         const struct rte_flow_item_udp *mask = item->mask;
2231         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2232         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2233                                       MLX5_FLOW_LAYER_OUTER_L3;
2234         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2235                                       MLX5_FLOW_LAYER_OUTER_L4;
2236         int ret;
2237
2238         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2239                 return rte_flow_error_set(error, EINVAL,
2240                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2241                                           "protocol filtering not compatible"
2242                                           " with UDP layer");
2243         if (!(item_flags & l3m))
2244                 return rte_flow_error_set(error, EINVAL,
2245                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2246                                           "L3 is mandatory to filter on L4");
2247         if (item_flags & l4m)
2248                 return rte_flow_error_set(error, EINVAL,
2249                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2250                                           "multiple L4 layers not supported");
2251         if (!mask)
2252                 mask = &rte_flow_item_udp_mask;
2253         ret = mlx5_flow_item_acceptable
2254                 (item, (const uint8_t *)mask,
2255                  (const uint8_t *)&rte_flow_item_udp_mask,
2256                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2257                  error);
2258         if (ret < 0)
2259                 return ret;
2260         return 0;
2261 }
2262
2263 /**
2264  * Validate TCP item.
2265  *
2266  * @param[in] item
2267  *   Item specification.
2268  * @param[in] item_flags
2269  *   Bit-fields that holds the items detected until now.
2270  * @param[in] target_protocol
2271  *   The next protocol in the previous item.
2272  * @param[out] error
2273  *   Pointer to error structure.
2274  *
2275  * @return
2276  *   0 on success, a negative errno value otherwise and rte_errno is set.
2277  */
2278 int
2279 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2280                             uint64_t item_flags,
2281                             uint8_t target_protocol,
2282                             const struct rte_flow_item_tcp *flow_mask,
2283                             struct rte_flow_error *error)
2284 {
2285         const struct rte_flow_item_tcp *mask = item->mask;
2286         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2287         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2288                                       MLX5_FLOW_LAYER_OUTER_L3;
2289         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2290                                       MLX5_FLOW_LAYER_OUTER_L4;
2291         int ret;
2292
2293         MLX5_ASSERT(flow_mask);
2294         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2295                 return rte_flow_error_set(error, EINVAL,
2296                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2297                                           "protocol filtering not compatible"
2298                                           " with TCP layer");
2299         if (!(item_flags & l3m))
2300                 return rte_flow_error_set(error, EINVAL,
2301                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2302                                           "L3 is mandatory to filter on L4");
2303         if (item_flags & l4m)
2304                 return rte_flow_error_set(error, EINVAL,
2305                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2306                                           "multiple L4 layers not supported");
2307         if (!mask)
2308                 mask = &rte_flow_item_tcp_mask;
2309         ret = mlx5_flow_item_acceptable
2310                 (item, (const uint8_t *)mask,
2311                  (const uint8_t *)flow_mask,
2312                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2313                  error);
2314         if (ret < 0)
2315                 return ret;
2316         return 0;
2317 }
2318
2319 /**
2320  * Validate VXLAN item.
2321  *
2322  * @param[in] item
2323  *   Item specification.
2324  * @param[in] item_flags
2325  *   Bit-fields that holds the items detected until now.
2326  * @param[in] target_protocol
2327  *   The next protocol in the previous item.
2328  * @param[out] error
2329  *   Pointer to error structure.
2330  *
2331  * @return
2332  *   0 on success, a negative errno value otherwise and rte_errno is set.
2333  */
2334 int
2335 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2336                               uint64_t item_flags,
2337                               struct rte_flow_error *error)
2338 {
2339         const struct rte_flow_item_vxlan *spec = item->spec;
2340         const struct rte_flow_item_vxlan *mask = item->mask;
2341         int ret;
2342         union vni {
2343                 uint32_t vlan_id;
2344                 uint8_t vni[4];
2345         } id = { .vlan_id = 0, };
2346
2347
2348         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2349                 return rte_flow_error_set(error, ENOTSUP,
2350                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2351                                           "multiple tunnel layers not"
2352                                           " supported");
2353         /*
2354          * Verify only UDPv4 is present as defined in
2355          * https://tools.ietf.org/html/rfc7348
2356          */
2357         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2358                 return rte_flow_error_set(error, EINVAL,
2359                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2360                                           "no outer UDP layer found");
2361         if (!mask)
2362                 mask = &rte_flow_item_vxlan_mask;
2363         ret = mlx5_flow_item_acceptable
2364                 (item, (const uint8_t *)mask,
2365                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2366                  sizeof(struct rte_flow_item_vxlan),
2367                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2368         if (ret < 0)
2369                 return ret;
2370         if (spec) {
2371                 memcpy(&id.vni[1], spec->vni, 3);
2372                 memcpy(&id.vni[1], mask->vni, 3);
2373         }
2374         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2375                 return rte_flow_error_set(error, ENOTSUP,
2376                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2377                                           "VXLAN tunnel must be fully defined");
2378         return 0;
2379 }
2380
2381 /**
2382  * Validate VXLAN_GPE item.
2383  *
2384  * @param[in] item
2385  *   Item specification.
2386  * @param[in] item_flags
2387  *   Bit-fields that holds the items detected until now.
2388  * @param[in] priv
2389  *   Pointer to the private data structure.
2390  * @param[in] target_protocol
2391  *   The next protocol in the previous item.
2392  * @param[out] error
2393  *   Pointer to error structure.
2394  *
2395  * @return
2396  *   0 on success, a negative errno value otherwise and rte_errno is set.
2397  */
2398 int
2399 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2400                                   uint64_t item_flags,
2401                                   struct rte_eth_dev *dev,
2402                                   struct rte_flow_error *error)
2403 {
2404         struct mlx5_priv *priv = dev->data->dev_private;
2405         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2406         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2407         int ret;
2408         union vni {
2409                 uint32_t vlan_id;
2410                 uint8_t vni[4];
2411         } id = { .vlan_id = 0, };
2412
2413         if (!priv->config.l3_vxlan_en)
2414                 return rte_flow_error_set(error, ENOTSUP,
2415                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2416                                           "L3 VXLAN is not enabled by device"
2417                                           " parameter and/or not configured in"
2418                                           " firmware");
2419         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2420                 return rte_flow_error_set(error, ENOTSUP,
2421                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2422                                           "multiple tunnel layers not"
2423                                           " supported");
2424         /*
2425          * Verify only UDPv4 is present as defined in
2426          * https://tools.ietf.org/html/rfc7348
2427          */
2428         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2429                 return rte_flow_error_set(error, EINVAL,
2430                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2431                                           "no outer UDP layer found");
2432         if (!mask)
2433                 mask = &rte_flow_item_vxlan_gpe_mask;
2434         ret = mlx5_flow_item_acceptable
2435                 (item, (const uint8_t *)mask,
2436                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2437                  sizeof(struct rte_flow_item_vxlan_gpe),
2438                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2439         if (ret < 0)
2440                 return ret;
2441         if (spec) {
2442                 if (spec->protocol)
2443                         return rte_flow_error_set(error, ENOTSUP,
2444                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2445                                                   item,
2446                                                   "VxLAN-GPE protocol"
2447                                                   " not supported");
2448                 memcpy(&id.vni[1], spec->vni, 3);
2449                 memcpy(&id.vni[1], mask->vni, 3);
2450         }
2451         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2452                 return rte_flow_error_set(error, ENOTSUP,
2453                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2454                                           "VXLAN-GPE tunnel must be fully"
2455                                           " defined");
2456         return 0;
2457 }
2458 /**
2459  * Validate GRE Key item.
2460  *
2461  * @param[in] item
2462  *   Item specification.
2463  * @param[in] item_flags
2464  *   Bit flags to mark detected items.
2465  * @param[in] gre_item
2466  *   Pointer to gre_item
2467  * @param[out] error
2468  *   Pointer to error structure.
2469  *
2470  * @return
2471  *   0 on success, a negative errno value otherwise and rte_errno is set.
2472  */
2473 int
2474 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2475                                 uint64_t item_flags,
2476                                 const struct rte_flow_item *gre_item,
2477                                 struct rte_flow_error *error)
2478 {
2479         const rte_be32_t *mask = item->mask;
2480         int ret = 0;
2481         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2482         const struct rte_flow_item_gre *gre_spec;
2483         const struct rte_flow_item_gre *gre_mask;
2484
2485         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2486                 return rte_flow_error_set(error, ENOTSUP,
2487                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2488                                           "Multiple GRE key not support");
2489         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2490                 return rte_flow_error_set(error, ENOTSUP,
2491                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2492                                           "No preceding GRE header");
2493         if (item_flags & MLX5_FLOW_LAYER_INNER)
2494                 return rte_flow_error_set(error, ENOTSUP,
2495                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2496                                           "GRE key following a wrong item");
2497         gre_mask = gre_item->mask;
2498         if (!gre_mask)
2499                 gre_mask = &rte_flow_item_gre_mask;
2500         gre_spec = gre_item->spec;
2501         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2502                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2503                 return rte_flow_error_set(error, EINVAL,
2504                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2505                                           "Key bit must be on");
2506
2507         if (!mask)
2508                 mask = &gre_key_default_mask;
2509         ret = mlx5_flow_item_acceptable
2510                 (item, (const uint8_t *)mask,
2511                  (const uint8_t *)&gre_key_default_mask,
2512                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2513         return ret;
2514 }
2515
2516 /**
2517  * Validate GRE item.
2518  *
2519  * @param[in] item
2520  *   Item specification.
2521  * @param[in] item_flags
2522  *   Bit flags to mark detected items.
2523  * @param[in] target_protocol
2524  *   The next protocol in the previous item.
2525  * @param[out] error
2526  *   Pointer to error structure.
2527  *
2528  * @return
2529  *   0 on success, a negative errno value otherwise and rte_errno is set.
2530  */
2531 int
2532 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2533                             uint64_t item_flags,
2534                             uint8_t target_protocol,
2535                             struct rte_flow_error *error)
2536 {
2537         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2538         const struct rte_flow_item_gre *mask = item->mask;
2539         int ret;
2540         const struct rte_flow_item_gre nic_mask = {
2541                 .c_rsvd0_ver = RTE_BE16(0xB000),
2542                 .protocol = RTE_BE16(UINT16_MAX),
2543         };
2544
2545         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2546                 return rte_flow_error_set(error, EINVAL,
2547                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2548                                           "protocol filtering not compatible"
2549                                           " with this GRE layer");
2550         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2551                 return rte_flow_error_set(error, ENOTSUP,
2552                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2553                                           "multiple tunnel layers not"
2554                                           " supported");
2555         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2556                 return rte_flow_error_set(error, ENOTSUP,
2557                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2558                                           "L3 Layer is missing");
2559         if (!mask)
2560                 mask = &rte_flow_item_gre_mask;
2561         ret = mlx5_flow_item_acceptable
2562                 (item, (const uint8_t *)mask,
2563                  (const uint8_t *)&nic_mask,
2564                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2565                  error);
2566         if (ret < 0)
2567                 return ret;
2568 #ifndef HAVE_MLX5DV_DR
2569 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2570         if (spec && (spec->protocol & mask->protocol))
2571                 return rte_flow_error_set(error, ENOTSUP,
2572                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2573                                           "without MPLS support the"
2574                                           " specification cannot be used for"
2575                                           " filtering");
2576 #endif
2577 #endif
2578         return 0;
2579 }
2580
2581 /**
2582  * Validate Geneve item.
2583  *
2584  * @param[in] item
2585  *   Item specification.
2586  * @param[in] itemFlags
2587  *   Bit-fields that holds the items detected until now.
2588  * @param[in] enPriv
2589  *   Pointer to the private data structure.
2590  * @param[out] error
2591  *   Pointer to error structure.
2592  *
2593  * @return
2594  *   0 on success, a negative errno value otherwise and rte_errno is set.
2595  */
2596
2597 int
2598 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2599                                uint64_t item_flags,
2600                                struct rte_eth_dev *dev,
2601                                struct rte_flow_error *error)
2602 {
2603         struct mlx5_priv *priv = dev->data->dev_private;
2604         const struct rte_flow_item_geneve *spec = item->spec;
2605         const struct rte_flow_item_geneve *mask = item->mask;
2606         int ret;
2607         uint16_t gbhdr;
2608         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2609                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2610         const struct rte_flow_item_geneve nic_mask = {
2611                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2612                 .vni = "\xff\xff\xff",
2613                 .protocol = RTE_BE16(UINT16_MAX),
2614         };
2615
2616         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2617                 return rte_flow_error_set(error, ENOTSUP,
2618                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2619                                           "L3 Geneve is not enabled by device"
2620                                           " parameter and/or not configured in"
2621                                           " firmware");
2622         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2623                 return rte_flow_error_set(error, ENOTSUP,
2624                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2625                                           "multiple tunnel layers not"
2626                                           " supported");
2627         /*
2628          * Verify only UDPv4 is present as defined in
2629          * https://tools.ietf.org/html/rfc7348
2630          */
2631         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2632                 return rte_flow_error_set(error, EINVAL,
2633                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2634                                           "no outer UDP layer found");
2635         if (!mask)
2636                 mask = &rte_flow_item_geneve_mask;
2637         ret = mlx5_flow_item_acceptable
2638                                   (item, (const uint8_t *)mask,
2639                                    (const uint8_t *)&nic_mask,
2640                                    sizeof(struct rte_flow_item_geneve),
2641                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2642         if (ret)
2643                 return ret;
2644         if (spec) {
2645                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2646                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2647                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2648                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2649                         return rte_flow_error_set(error, ENOTSUP,
2650                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2651                                                   item,
2652                                                   "Geneve protocol unsupported"
2653                                                   " fields are being used");
2654                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2655                         return rte_flow_error_set
2656                                         (error, ENOTSUP,
2657                                          RTE_FLOW_ERROR_TYPE_ITEM,
2658                                          item,
2659                                          "Unsupported Geneve options length");
2660         }
2661         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2662                 return rte_flow_error_set
2663                                     (error, ENOTSUP,
2664                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2665                                      "Geneve tunnel must be fully defined");
2666         return 0;
2667 }
2668
2669 /**
2670  * Validate Geneve TLV option item.
2671  *
2672  * @param[in] item
2673  *   Item specification.
2674  * @param[in] last_item
2675  *   Previous validated item in the pattern items.
2676  * @param[in] geneve_item
2677  *   Previous GENEVE item specification.
2678  * @param[in] dev
2679  *   Pointer to the rte_eth_dev structure.
2680  * @param[out] error
2681  *   Pointer to error structure.
2682  *
2683  * @return
2684  *   0 on success, a negative errno value otherwise and rte_errno is set.
2685  */
2686 int
2687 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2688                                    uint64_t last_item,
2689                                    const struct rte_flow_item *geneve_item,
2690                                    struct rte_eth_dev *dev,
2691                                    struct rte_flow_error *error)
2692 {
2693         struct mlx5_priv *priv = dev->data->dev_private;
2694         struct mlx5_dev_ctx_shared *sh = priv->sh;
2695         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2696         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2697         uint8_t data_max_supported =
2698                         hca_attr->max_geneve_tlv_option_data_len * 4;
2699         struct mlx5_dev_config *config = &priv->config;
2700         const struct rte_flow_item_geneve *geneve_spec;
2701         const struct rte_flow_item_geneve *geneve_mask;
2702         const struct rte_flow_item_geneve_opt *spec = item->spec;
2703         const struct rte_flow_item_geneve_opt *mask = item->mask;
2704         unsigned int i;
2705         unsigned int data_len;
2706         uint8_t tlv_option_len;
2707         uint16_t optlen_m, optlen_v;
2708         const struct rte_flow_item_geneve_opt full_mask = {
2709                 .option_class = RTE_BE16(0xffff),
2710                 .option_type = 0xff,
2711                 .option_len = 0x1f,
2712         };
2713
2714         if (!mask)
2715                 mask = &rte_flow_item_geneve_opt_mask;
2716         if (!spec)
2717                 return rte_flow_error_set
2718                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2719                         "Geneve TLV opt class/type/length must be specified");
2720         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2721                 return rte_flow_error_set
2722                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2723                         "Geneve TLV opt length exceeeds the limit (31)");
2724         /* Check if class type and length masks are full. */
2725         if (full_mask.option_class != mask->option_class ||
2726             full_mask.option_type != mask->option_type ||
2727             full_mask.option_len != (mask->option_len & full_mask.option_len))
2728                 return rte_flow_error_set
2729                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2730                         "Geneve TLV opt class/type/length masks must be full");
2731         /* Check if length is supported */
2732         if ((uint32_t)spec->option_len >
2733                         config->hca_attr.max_geneve_tlv_option_data_len)
2734                 return rte_flow_error_set
2735                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2736                         "Geneve TLV opt length not supported");
2737         if (config->hca_attr.max_geneve_tlv_options > 1)
2738                 DRV_LOG(DEBUG,
2739                         "max_geneve_tlv_options supports more than 1 option");
2740         /* Check GENEVE item preceding. */
2741         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2742                 return rte_flow_error_set
2743                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2744                         "Geneve opt item must be preceded with Geneve item");
2745         geneve_spec = geneve_item->spec;
2746         geneve_mask = geneve_item->mask ? geneve_item->mask :
2747                                           &rte_flow_item_geneve_mask;
2748         /* Check if GENEVE TLV option size doesn't exceed option length */
2749         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2750                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2751                 tlv_option_len = spec->option_len & mask->option_len;
2752                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2753                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2754                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2755                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2756                 if ((optlen_v & optlen_m) <= tlv_option_len)
2757                         return rte_flow_error_set
2758                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2759                                  "GENEVE TLV option length exceeds optlen");
2760         }
2761         /* Check if length is 0 or data is 0. */
2762         if (spec->data == NULL || spec->option_len == 0)
2763                 return rte_flow_error_set
2764                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2765                         "Geneve TLV opt with zero data/length not supported");
2766         /* Check not all data & mask are 0. */
2767         data_len = spec->option_len * 4;
2768         if (mask->data == NULL) {
2769                 for (i = 0; i < data_len; i++)
2770                         if (spec->data[i])
2771                                 break;
2772                 if (i == data_len)
2773                         return rte_flow_error_set(error, ENOTSUP,
2774                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2775                                 "Can't match on Geneve option data 0");
2776         } else {
2777                 for (i = 0; i < data_len; i++)
2778                         if (spec->data[i] & mask->data[i])
2779                                 break;
2780                 if (i == data_len)
2781                         return rte_flow_error_set(error, ENOTSUP,
2782                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2783                                 "Can't match on Geneve option data and mask 0");
2784                 /* Check data mask supported. */
2785                 for (i = data_max_supported; i < data_len ; i++)
2786                         if (mask->data[i])
2787                                 return rte_flow_error_set(error, ENOTSUP,
2788                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2789                                         "Data mask is of unsupported size");
2790         }
2791         /* Check GENEVE option is supported in NIC. */
2792         if (!config->hca_attr.geneve_tlv_opt)
2793                 return rte_flow_error_set
2794                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2795                         "Geneve TLV opt not supported");
2796         /* Check if we already have geneve option with different type/class. */
2797         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2798         geneve_opt_resource = sh->geneve_tlv_option_resource;
2799         if (geneve_opt_resource != NULL)
2800                 if (geneve_opt_resource->option_class != spec->option_class ||
2801                     geneve_opt_resource->option_type != spec->option_type ||
2802                     geneve_opt_resource->length != spec->option_len) {
2803                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2804                         return rte_flow_error_set(error, ENOTSUP,
2805                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2806                                 "Only one Geneve TLV option supported");
2807                 }
2808         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2809         return 0;
2810 }
2811
2812 /**
2813  * Validate MPLS item.
2814  *
2815  * @param[in] dev
2816  *   Pointer to the rte_eth_dev structure.
2817  * @param[in] item
2818  *   Item specification.
2819  * @param[in] item_flags
2820  *   Bit-fields that holds the items detected until now.
2821  * @param[in] prev_layer
2822  *   The protocol layer indicated in previous item.
2823  * @param[out] error
2824  *   Pointer to error structure.
2825  *
2826  * @return
2827  *   0 on success, a negative errno value otherwise and rte_errno is set.
2828  */
2829 int
2830 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2831                              const struct rte_flow_item *item __rte_unused,
2832                              uint64_t item_flags __rte_unused,
2833                              uint64_t prev_layer __rte_unused,
2834                              struct rte_flow_error *error)
2835 {
2836 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2837         const struct rte_flow_item_mpls *mask = item->mask;
2838         struct mlx5_priv *priv = dev->data->dev_private;
2839         int ret;
2840
2841         if (!priv->config.mpls_en)
2842                 return rte_flow_error_set(error, ENOTSUP,
2843                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2844                                           "MPLS not supported or"
2845                                           " disabled in firmware"
2846                                           " configuration.");
2847         /* MPLS over IP, UDP, GRE is allowed */
2848         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2849                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2850                             MLX5_FLOW_LAYER_GRE |
2851                             MLX5_FLOW_LAYER_GRE_KEY)))
2852                 return rte_flow_error_set(error, EINVAL,
2853                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2854                                           "protocol filtering not compatible"
2855                                           " with MPLS layer");
2856         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2857         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2858             !(item_flags & MLX5_FLOW_LAYER_GRE))
2859                 return rte_flow_error_set(error, ENOTSUP,
2860                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2861                                           "multiple tunnel layers not"
2862                                           " supported");
2863         if (!mask)
2864                 mask = &rte_flow_item_mpls_mask;
2865         ret = mlx5_flow_item_acceptable
2866                 (item, (const uint8_t *)mask,
2867                  (const uint8_t *)&rte_flow_item_mpls_mask,
2868                  sizeof(struct rte_flow_item_mpls),
2869                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2870         if (ret < 0)
2871                 return ret;
2872         return 0;
2873 #else
2874         return rte_flow_error_set(error, ENOTSUP,
2875                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2876                                   "MPLS is not supported by Verbs, please"
2877                                   " update.");
2878 #endif
2879 }
2880
2881 /**
2882  * Validate NVGRE item.
2883  *
2884  * @param[in] item
2885  *   Item specification.
2886  * @param[in] item_flags
2887  *   Bit flags to mark detected items.
2888  * @param[in] target_protocol
2889  *   The next protocol in the previous item.
2890  * @param[out] error
2891  *   Pointer to error structure.
2892  *
2893  * @return
2894  *   0 on success, a negative errno value otherwise and rte_errno is set.
2895  */
2896 int
2897 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2898                               uint64_t item_flags,
2899                               uint8_t target_protocol,
2900                               struct rte_flow_error *error)
2901 {
2902         const struct rte_flow_item_nvgre *mask = item->mask;
2903         int ret;
2904
2905         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2906                 return rte_flow_error_set(error, EINVAL,
2907                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2908                                           "protocol filtering not compatible"
2909                                           " with this GRE layer");
2910         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2911                 return rte_flow_error_set(error, ENOTSUP,
2912                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2913                                           "multiple tunnel layers not"
2914                                           " supported");
2915         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2916                 return rte_flow_error_set(error, ENOTSUP,
2917                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2918                                           "L3 Layer is missing");
2919         if (!mask)
2920                 mask = &rte_flow_item_nvgre_mask;
2921         ret = mlx5_flow_item_acceptable
2922                 (item, (const uint8_t *)mask,
2923                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2924                  sizeof(struct rte_flow_item_nvgre),
2925                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2926         if (ret < 0)
2927                 return ret;
2928         return 0;
2929 }
2930
2931 /**
2932  * Validate eCPRI item.
2933  *
2934  * @param[in] item
2935  *   Item specification.
2936  * @param[in] item_flags
2937  *   Bit-fields that holds the items detected until now.
2938  * @param[in] last_item
2939  *   Previous validated item in the pattern items.
2940  * @param[in] ether_type
2941  *   Type in the ethernet layer header (including dot1q).
2942  * @param[in] acc_mask
2943  *   Acceptable mask, if NULL default internal default mask
2944  *   will be used to check whether item fields are supported.
2945  * @param[out] error
2946  *   Pointer to error structure.
2947  *
2948  * @return
2949  *   0 on success, a negative errno value otherwise and rte_errno is set.
2950  */
2951 int
2952 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2953                               uint64_t item_flags,
2954                               uint64_t last_item,
2955                               uint16_t ether_type,
2956                               const struct rte_flow_item_ecpri *acc_mask,
2957                               struct rte_flow_error *error)
2958 {
2959         const struct rte_flow_item_ecpri *mask = item->mask;
2960         const struct rte_flow_item_ecpri nic_mask = {
2961                 .hdr = {
2962                         .common = {
2963                                 .u32 =
2964                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2965                                         .type = 0xFF,
2966                                         }).u32),
2967                         },
2968                         .dummy[0] = 0xFFFFFFFF,
2969                 },
2970         };
2971         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2972                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2973         struct rte_flow_item_ecpri mask_lo;
2974
2975         if (!(last_item & outer_l2_vlan) &&
2976             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
2977                 return rte_flow_error_set(error, EINVAL,
2978                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2979                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
2980         if ((last_item & outer_l2_vlan) && ether_type &&
2981             ether_type != RTE_ETHER_TYPE_ECPRI)
2982                 return rte_flow_error_set(error, EINVAL,
2983                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2984                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
2985         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2986                 return rte_flow_error_set(error, EINVAL,
2987                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2988                                           "eCPRI with tunnel is not supported right now");
2989         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2990                 return rte_flow_error_set(error, ENOTSUP,
2991                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2992                                           "multiple L3 layers not supported");
2993         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2994                 return rte_flow_error_set(error, EINVAL,
2995                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2996                                           "eCPRI cannot coexist with a TCP layer");
2997         /* In specification, eCPRI could be over UDP layer. */
2998         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2999                 return rte_flow_error_set(error, EINVAL,
3000                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3001                                           "eCPRI over UDP layer is not yet supported right now");
3002         /* Mask for type field in common header could be zero. */
3003         if (!mask)
3004                 mask = &rte_flow_item_ecpri_mask;
3005         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3006         /* Input mask is in big-endian format. */
3007         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3008                 return rte_flow_error_set(error, EINVAL,
3009                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3010                                           "partial mask is not supported for protocol");
3011         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3012                 return rte_flow_error_set(error, EINVAL,
3013                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3014                                           "message header mask must be after a type mask");
3015         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3016                                          acc_mask ? (const uint8_t *)acc_mask
3017                                                   : (const uint8_t *)&nic_mask,
3018                                          sizeof(struct rte_flow_item_ecpri),
3019                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3020 }
3021
3022 /**
3023  * Release resource related QUEUE/RSS action split.
3024  *
3025  * @param dev
3026  *   Pointer to Ethernet device.
3027  * @param flow
3028  *   Flow to release id's from.
3029  */
3030 static void
3031 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
3032                              struct rte_flow *flow)
3033 {
3034         struct mlx5_priv *priv = dev->data->dev_private;
3035         uint32_t handle_idx;
3036         struct mlx5_flow_handle *dev_handle;
3037
3038         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
3039                        handle_idx, dev_handle, next)
3040                 if (dev_handle->split_flow_id &&
3041                     !dev_handle->is_meter_flow_id)
3042                         mlx5_ipool_free(priv->sh->ipool
3043                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
3044                                         dev_handle->split_flow_id);
3045 }
3046
3047 static int
3048 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3049                    const struct rte_flow_attr *attr __rte_unused,
3050                    const struct rte_flow_item items[] __rte_unused,
3051                    const struct rte_flow_action actions[] __rte_unused,
3052                    bool external __rte_unused,
3053                    int hairpin __rte_unused,
3054                    struct rte_flow_error *error)
3055 {
3056         return rte_flow_error_set(error, ENOTSUP,
3057                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3058 }
3059
3060 static struct mlx5_flow *
3061 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3062                   const struct rte_flow_attr *attr __rte_unused,
3063                   const struct rte_flow_item items[] __rte_unused,
3064                   const struct rte_flow_action actions[] __rte_unused,
3065                   struct rte_flow_error *error)
3066 {
3067         rte_flow_error_set(error, ENOTSUP,
3068                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3069         return NULL;
3070 }
3071
3072 static int
3073 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3074                     struct mlx5_flow *dev_flow __rte_unused,
3075                     const struct rte_flow_attr *attr __rte_unused,
3076                     const struct rte_flow_item items[] __rte_unused,
3077                     const struct rte_flow_action actions[] __rte_unused,
3078                     struct rte_flow_error *error)
3079 {
3080         return rte_flow_error_set(error, ENOTSUP,
3081                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3082 }
3083
3084 static int
3085 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3086                 struct rte_flow *flow __rte_unused,
3087                 struct rte_flow_error *error)
3088 {
3089         return rte_flow_error_set(error, ENOTSUP,
3090                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3091 }
3092
3093 static void
3094 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3095                  struct rte_flow *flow __rte_unused)
3096 {
3097 }
3098
3099 static void
3100 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3101                   struct rte_flow *flow __rte_unused)
3102 {
3103 }
3104
3105 static int
3106 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3107                 struct rte_flow *flow __rte_unused,
3108                 const struct rte_flow_action *actions __rte_unused,
3109                 void *data __rte_unused,
3110                 struct rte_flow_error *error)
3111 {
3112         return rte_flow_error_set(error, ENOTSUP,
3113                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3114 }
3115
3116 static int
3117 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3118                       uint32_t domains __rte_unused,
3119                       uint32_t flags __rte_unused)
3120 {
3121         return 0;
3122 }
3123
3124 /* Void driver to protect from null pointer reference. */
3125 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3126         .validate = flow_null_validate,
3127         .prepare = flow_null_prepare,
3128         .translate = flow_null_translate,
3129         .apply = flow_null_apply,
3130         .remove = flow_null_remove,
3131         .destroy = flow_null_destroy,
3132         .query = flow_null_query,
3133         .sync_domain = flow_null_sync_domain,
3134 };
3135
3136 /**
3137  * Select flow driver type according to flow attributes and device
3138  * configuration.
3139  *
3140  * @param[in] dev
3141  *   Pointer to the dev structure.
3142  * @param[in] attr
3143  *   Pointer to the flow attributes.
3144  *
3145  * @return
3146  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3147  */
3148 static enum mlx5_flow_drv_type
3149 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3150 {
3151         struct mlx5_priv *priv = dev->data->dev_private;
3152         /* The OS can determine first a specific flow type (DV, VERBS) */
3153         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3154
3155         if (type != MLX5_FLOW_TYPE_MAX)
3156                 return type;
3157         /* If no OS specific type - continue with DV/VERBS selection */
3158         if (attr->transfer && priv->config.dv_esw_en)
3159                 type = MLX5_FLOW_TYPE_DV;
3160         if (!attr->transfer)
3161                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3162                                                  MLX5_FLOW_TYPE_VERBS;
3163         return type;
3164 }
3165
3166 #define flow_get_drv_ops(type) flow_drv_ops[type]
3167
3168 /**
3169  * Flow driver validation API. This abstracts calling driver specific functions.
3170  * The type of flow driver is determined according to flow attributes.
3171  *
3172  * @param[in] dev
3173  *   Pointer to the dev structure.
3174  * @param[in] attr
3175  *   Pointer to the flow attributes.
3176  * @param[in] items
3177  *   Pointer to the list of items.
3178  * @param[in] actions
3179  *   Pointer to the list of actions.
3180  * @param[in] external
3181  *   This flow rule is created by request external to PMD.
3182  * @param[in] hairpin
3183  *   Number of hairpin TX actions, 0 means classic flow.
3184  * @param[out] error
3185  *   Pointer to the error structure.
3186  *
3187  * @return
3188  *   0 on success, a negative errno value otherwise and rte_errno is set.
3189  */
3190 static inline int
3191 flow_drv_validate(struct rte_eth_dev *dev,
3192                   const struct rte_flow_attr *attr,
3193                   const struct rte_flow_item items[],
3194                   const struct rte_flow_action actions[],
3195                   bool external, int hairpin, struct rte_flow_error *error)
3196 {
3197         const struct mlx5_flow_driver_ops *fops;
3198         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3199
3200         fops = flow_get_drv_ops(type);
3201         return fops->validate(dev, attr, items, actions, external,
3202                               hairpin, error);
3203 }
3204
3205 /**
3206  * Flow driver preparation API. This abstracts calling driver specific
3207  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3208  * calculates the size of memory required for device flow, allocates the memory,
3209  * initializes the device flow and returns the pointer.
3210  *
3211  * @note
3212  *   This function initializes device flow structure such as dv or verbs in
3213  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3214  *   rest. For example, adding returning device flow to flow->dev_flow list and
3215  *   setting backward reference to the flow should be done out of this function.
3216  *   layers field is not filled either.
3217  *
3218  * @param[in] dev
3219  *   Pointer to the dev structure.
3220  * @param[in] attr
3221  *   Pointer to the flow attributes.
3222  * @param[in] items
3223  *   Pointer to the list of items.
3224  * @param[in] actions
3225  *   Pointer to the list of actions.
3226  * @param[in] flow_idx
3227  *   This memory pool index to the flow.
3228  * @param[out] error
3229  *   Pointer to the error structure.
3230  *
3231  * @return
3232  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3233  */
3234 static inline struct mlx5_flow *
3235 flow_drv_prepare(struct rte_eth_dev *dev,
3236                  const struct rte_flow *flow,
3237                  const struct rte_flow_attr *attr,
3238                  const struct rte_flow_item items[],
3239                  const struct rte_flow_action actions[],
3240                  uint32_t flow_idx,
3241                  struct rte_flow_error *error)
3242 {
3243         const struct mlx5_flow_driver_ops *fops;
3244         enum mlx5_flow_drv_type type = flow->drv_type;
3245         struct mlx5_flow *mlx5_flow = NULL;
3246
3247         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3248         fops = flow_get_drv_ops(type);
3249         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3250         if (mlx5_flow)
3251                 mlx5_flow->flow_idx = flow_idx;
3252         return mlx5_flow;
3253 }
3254
3255 /**
3256  * Flow driver translation API. This abstracts calling driver specific
3257  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3258  * translates a generic flow into a driver flow. flow_drv_prepare() must
3259  * precede.
3260  *
3261  * @note
3262  *   dev_flow->layers could be filled as a result of parsing during translation
3263  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3264  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3265  *   flow->actions could be overwritten even though all the expanded dev_flows
3266  *   have the same actions.
3267  *
3268  * @param[in] dev
3269  *   Pointer to the rte dev structure.
3270  * @param[in, out] dev_flow
3271  *   Pointer to the mlx5 flow.
3272  * @param[in] attr
3273  *   Pointer to the flow attributes.
3274  * @param[in] items
3275  *   Pointer to the list of items.
3276  * @param[in] actions
3277  *   Pointer to the list of actions.
3278  * @param[out] error
3279  *   Pointer to the error structure.
3280  *
3281  * @return
3282  *   0 on success, a negative errno value otherwise and rte_errno is set.
3283  */
3284 static inline int
3285 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3286                    const struct rte_flow_attr *attr,
3287                    const struct rte_flow_item items[],
3288                    const struct rte_flow_action actions[],
3289                    struct rte_flow_error *error)
3290 {
3291         const struct mlx5_flow_driver_ops *fops;
3292         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3293
3294         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3295         fops = flow_get_drv_ops(type);
3296         return fops->translate(dev, dev_flow, attr, items, actions, error);
3297 }
3298
3299 /**
3300  * Flow driver apply API. This abstracts calling driver specific functions.
3301  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3302  * translated driver flows on to device. flow_drv_translate() must precede.
3303  *
3304  * @param[in] dev
3305  *   Pointer to Ethernet device structure.
3306  * @param[in, out] flow
3307  *   Pointer to flow structure.
3308  * @param[out] error
3309  *   Pointer to error structure.
3310  *
3311  * @return
3312  *   0 on success, a negative errno value otherwise and rte_errno is set.
3313  */
3314 static inline int
3315 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3316                struct rte_flow_error *error)
3317 {
3318         const struct mlx5_flow_driver_ops *fops;
3319         enum mlx5_flow_drv_type type = flow->drv_type;
3320
3321         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3322         fops = flow_get_drv_ops(type);
3323         return fops->apply(dev, flow, error);
3324 }
3325
3326 /**
3327  * Flow driver destroy API. This abstracts calling driver specific functions.
3328  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3329  * on device and releases resources of the flow.
3330  *
3331  * @param[in] dev
3332  *   Pointer to Ethernet device.
3333  * @param[in, out] flow
3334  *   Pointer to flow structure.
3335  */
3336 static inline void
3337 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3338 {
3339         const struct mlx5_flow_driver_ops *fops;
3340         enum mlx5_flow_drv_type type = flow->drv_type;
3341
3342         flow_mreg_split_qrss_release(dev, flow);
3343         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3344         fops = flow_get_drv_ops(type);
3345         fops->destroy(dev, flow);
3346 }
3347
3348 /**
3349  * Flow driver find RSS policy tbl API. This abstracts calling driver
3350  * specific functions. Parent flow (rte_flow) should have driver
3351  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3352  *
3353  * @param[in] dev
3354  *   Pointer to Ethernet device.
3355  * @param[in, out] flow
3356  *   Pointer to flow structure.
3357  * @param[in] policy
3358  *   Pointer to meter policy table.
3359  * @param[in] rss_desc
3360  *   Pointer to rss_desc
3361  */
3362 static struct mlx5_flow_meter_sub_policy *
3363 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3364                 struct rte_flow *flow,
3365                 struct mlx5_flow_meter_policy *policy,
3366                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3367 {
3368         const struct mlx5_flow_driver_ops *fops;
3369         enum mlx5_flow_drv_type type = flow->drv_type;
3370
3371         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3372         fops = flow_get_drv_ops(type);
3373         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3374 }
3375
3376 /**
3377  * Get RSS action from the action list.
3378  *
3379  * @param[in] dev
3380  *   Pointer to Ethernet device.
3381  * @param[in] actions
3382  *   Pointer to the list of actions.
3383  * @param[in] flow
3384  *   Parent flow structure pointer.
3385  *
3386  * @return
3387  *   Pointer to the RSS action if exist, else return NULL.
3388  */
3389 static const struct rte_flow_action_rss*
3390 flow_get_rss_action(struct rte_eth_dev *dev,
3391                     const struct rte_flow_action actions[])
3392 {
3393         struct mlx5_priv *priv = dev->data->dev_private;
3394         const struct rte_flow_action_rss *rss = NULL;
3395
3396         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3397                 switch (actions->type) {
3398                 case RTE_FLOW_ACTION_TYPE_RSS:
3399                         rss = actions->conf;
3400                         break;
3401                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3402                 {
3403                         const struct rte_flow_action_sample *sample =
3404                                                                 actions->conf;
3405                         const struct rte_flow_action *act = sample->actions;
3406                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3407                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3408                                         rss = act->conf;
3409                         break;
3410                 }
3411                 case RTE_FLOW_ACTION_TYPE_METER:
3412                 {
3413                         uint32_t mtr_idx;
3414                         struct mlx5_flow_meter_info *fm;
3415                         struct mlx5_flow_meter_policy *policy;
3416                         const struct rte_flow_action_meter *mtr = actions->conf;
3417
3418                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3419                         if (fm) {
3420                                 policy = mlx5_flow_meter_policy_find(dev,
3421                                                 fm->policy_id, NULL);
3422                                 if (policy && policy->is_rss)
3423                                         rss =
3424                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3425                         }
3426                         break;
3427                 }
3428                 default:
3429                         break;
3430                 }
3431         }
3432         return rss;
3433 }
3434
3435 /**
3436  * Get ASO age action by index.
3437  *
3438  * @param[in] dev
3439  *   Pointer to the Ethernet device structure.
3440  * @param[in] age_idx
3441  *   Index to the ASO age action.
3442  *
3443  * @return
3444  *   The specified ASO age action.
3445  */
3446 struct mlx5_aso_age_action*
3447 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3448 {
3449         uint16_t pool_idx = age_idx & UINT16_MAX;
3450         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3451         struct mlx5_priv *priv = dev->data->dev_private;
3452         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3453         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3454
3455         return &pool->actions[offset - 1];
3456 }
3457
3458 /* maps indirect action to translated direct in some actions array */
3459 struct mlx5_translated_action_handle {
3460         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3461         int index; /**< Index in related array of rte_flow_action. */
3462 };
3463
3464 /**
3465  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3466  * direct action if translation possible.
3467  * This functionality used to run same execution path for both direct and
3468  * indirect actions on flow create. All necessary preparations for indirect
3469  * action handling should be performed on *handle* actions list returned
3470  * from this call.
3471  *
3472  * @param[in] dev
3473  *   Pointer to Ethernet device.
3474  * @param[in] actions
3475  *   List of actions to translate.
3476  * @param[out] handle
3477  *   List to store translated indirect action object handles.
3478  * @param[in, out] indir_n
3479  *   Size of *handle* array. On return should be updated with number of
3480  *   indirect actions retrieved from the *actions* list.
3481  * @param[out] translated_actions
3482  *   List of actions where all indirect actions were translated to direct
3483  *   if possible. NULL if no translation took place.
3484  * @param[out] error
3485  *   Pointer to the error structure.
3486  *
3487  * @return
3488  *   0 on success, a negative errno value otherwise and rte_errno is set.
3489  */
3490 static int
3491 flow_action_handles_translate(struct rte_eth_dev *dev,
3492                               const struct rte_flow_action actions[],
3493                               struct mlx5_translated_action_handle *handle,
3494                               int *indir_n,
3495                               struct rte_flow_action **translated_actions,
3496                               struct rte_flow_error *error)
3497 {
3498         struct mlx5_priv *priv = dev->data->dev_private;
3499         struct rte_flow_action *translated = NULL;
3500         size_t actions_size;
3501         int n;
3502         int copied_n = 0;
3503         struct mlx5_translated_action_handle *handle_end = NULL;
3504
3505         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3506                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3507                         continue;
3508                 if (copied_n == *indir_n) {
3509                         return rte_flow_error_set
3510                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3511                                  NULL, "too many shared actions");
3512                 }
3513                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3514                            sizeof(actions[n].conf));
3515                 handle[copied_n].index = n;
3516                 copied_n++;
3517         }
3518         n++;
3519         *indir_n = copied_n;
3520         if (!copied_n)
3521                 return 0;
3522         actions_size = sizeof(struct rte_flow_action) * n;
3523         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3524         if (!translated) {
3525                 rte_errno = ENOMEM;
3526                 return -ENOMEM;
3527         }
3528         memcpy(translated, actions, actions_size);
3529         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3530                 struct mlx5_shared_action_rss *shared_rss;
3531                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3532                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3533                 uint32_t idx = act_idx &
3534                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3535
3536                 switch (type) {
3537                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3538                         shared_rss = mlx5_ipool_get
3539                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3540                         translated[handle->index].type =
3541                                 RTE_FLOW_ACTION_TYPE_RSS;
3542                         translated[handle->index].conf =
3543                                 &shared_rss->origin;
3544                         break;
3545                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3546                         translated[handle->index].type =
3547                                                 (enum rte_flow_action_type)
3548                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3549                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3550                         break;
3551                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3552                         if (priv->sh->flow_hit_aso_en) {
3553                                 translated[handle->index].type =
3554                                         (enum rte_flow_action_type)
3555                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3556                                 translated[handle->index].conf =
3557                                                          (void *)(uintptr_t)idx;
3558                                 break;
3559                         }
3560                         /* Fall-through */
3561                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3562                         if (priv->sh->ct_aso_en) {
3563                                 translated[handle->index].type =
3564                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3565                                 translated[handle->index].conf =
3566                                                          (void *)(uintptr_t)idx;
3567                                 break;
3568                         }
3569                         /* Fall-through */
3570                 default:
3571                         mlx5_free(translated);
3572                         return rte_flow_error_set
3573                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3574                                  NULL, "invalid indirect action type");
3575                 }
3576         }
3577         *translated_actions = translated;
3578         return 0;
3579 }
3580
3581 /**
3582  * Get Shared RSS action from the action list.
3583  *
3584  * @param[in] dev
3585  *   Pointer to Ethernet device.
3586  * @param[in] shared
3587  *   Pointer to the list of actions.
3588  * @param[in] shared_n
3589  *   Actions list length.
3590  *
3591  * @return
3592  *   The MLX5 RSS action ID if exists, otherwise return 0.
3593  */
3594 static uint32_t
3595 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3596                            struct mlx5_translated_action_handle *handle,
3597                            int shared_n)
3598 {
3599         struct mlx5_translated_action_handle *handle_end;
3600         struct mlx5_priv *priv = dev->data->dev_private;
3601         struct mlx5_shared_action_rss *shared_rss;
3602
3603
3604         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3605                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3606                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3607                 uint32_t idx = act_idx &
3608                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3609                 switch (type) {
3610                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3611                         shared_rss = mlx5_ipool_get
3612                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3613                                                                            idx);
3614                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3615                                            __ATOMIC_RELAXED);
3616                         return idx;
3617                 default:
3618                         break;
3619                 }
3620         }
3621         return 0;
3622 }
3623
3624 static unsigned int
3625 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3626 {
3627         const struct rte_flow_item *item;
3628         unsigned int has_vlan = 0;
3629
3630         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3631                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3632                         has_vlan = 1;
3633                         break;
3634                 }
3635         }
3636         if (has_vlan)
3637                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3638                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3639         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3640                                MLX5_EXPANSION_ROOT_OUTER;
3641 }
3642
3643 /**
3644  *  Get layer flags from the prefix flow.
3645  *
3646  *  Some flows may be split to several subflows, the prefix subflow gets the
3647  *  match items and the suffix sub flow gets the actions.
3648  *  Some actions need the user defined match item flags to get the detail for
3649  *  the action.
3650  *  This function helps the suffix flow to get the item layer flags from prefix
3651  *  subflow.
3652  *
3653  * @param[in] dev_flow
3654  *   Pointer the created preifx subflow.
3655  *
3656  * @return
3657  *   The layers get from prefix subflow.
3658  */
3659 static inline uint64_t
3660 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3661 {
3662         uint64_t layers = 0;
3663
3664         /*
3665          * Layers bits could be localization, but usually the compiler will
3666          * help to do the optimization work for source code.
3667          * If no decap actions, use the layers directly.
3668          */
3669         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3670                 return dev_flow->handle->layers;
3671         /* Convert L3 layers with decap action. */
3672         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3673                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3674         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3675                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3676         /* Convert L4 layers with decap action.  */
3677         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3678                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3679         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3680                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3681         return layers;
3682 }
3683
3684 /**
3685  * Get metadata split action information.
3686  *
3687  * @param[in] actions
3688  *   Pointer to the list of actions.
3689  * @param[out] qrss
3690  *   Pointer to the return pointer.
3691  * @param[out] qrss_type
3692  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3693  *   if no QUEUE/RSS is found.
3694  * @param[out] encap_idx
3695  *   Pointer to the index of the encap action if exists, otherwise the last
3696  *   action index.
3697  *
3698  * @return
3699  *   Total number of actions.
3700  */
3701 static int
3702 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3703                                        const struct rte_flow_action **qrss,
3704                                        int *encap_idx)
3705 {
3706         const struct rte_flow_action_raw_encap *raw_encap;
3707         int actions_n = 0;
3708         int raw_decap_idx = -1;
3709
3710         *encap_idx = -1;
3711         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3712                 switch (actions->type) {
3713                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3714                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3715                         *encap_idx = actions_n;
3716                         break;
3717                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3718                         raw_decap_idx = actions_n;
3719                         break;
3720                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3721                         raw_encap = actions->conf;
3722                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3723                                 *encap_idx = raw_decap_idx != -1 ?
3724                                                       raw_decap_idx : actions_n;
3725                         break;
3726                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3727                 case RTE_FLOW_ACTION_TYPE_RSS:
3728                         *qrss = actions;
3729                         break;
3730                 default:
3731                         break;
3732                 }
3733                 actions_n++;
3734         }
3735         if (*encap_idx == -1)
3736                 *encap_idx = actions_n;
3737         /* Count RTE_FLOW_ACTION_TYPE_END. */
3738         return actions_n + 1;
3739 }
3740
3741 /**
3742  * Check if the action will change packet.
3743  *
3744  * @param dev
3745  *   Pointer to Ethernet device.
3746  * @param[in] type
3747  *   action type.
3748  *
3749  * @return
3750  *   true if action will change packet, false otherwise.
3751  */
3752 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3753                                           enum rte_flow_action_type type)
3754 {
3755         struct mlx5_priv *priv = dev->data->dev_private;
3756
3757         switch (type) {
3758         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3759         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3760         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3761         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3762         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3763         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3764         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3765         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3766         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3767         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3768         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3769         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3770         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3771         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3772         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3773         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3774         case RTE_FLOW_ACTION_TYPE_SET_META:
3775         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3776         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3777         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3778         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3779         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3780         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3781         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3782         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3783         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3784         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3785         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3786         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3787                 return true;
3788         case RTE_FLOW_ACTION_TYPE_FLAG:
3789         case RTE_FLOW_ACTION_TYPE_MARK:
3790                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3791                         return true;
3792                 else
3793                         return false;
3794         default:
3795                 return false;
3796         }
3797 }
3798
3799 /**
3800  * Check meter action from the action list.
3801  *
3802  * @param dev
3803  *   Pointer to Ethernet device.
3804  * @param[in] actions
3805  *   Pointer to the list of actions.
3806  * @param[out] has_mtr
3807  *   Pointer to the meter exist flag.
3808  * @param[out] has_modify
3809  *   Pointer to the flag showing there's packet change action.
3810  * @param[out] meter_id
3811  *   Pointer to the meter id.
3812  *
3813  * @return
3814  *   Total number of actions.
3815  */
3816 static int
3817 flow_check_meter_action(struct rte_eth_dev *dev,
3818                         const struct rte_flow_action actions[],
3819                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
3820 {
3821         const struct rte_flow_action_meter *mtr = NULL;
3822         int actions_n = 0;
3823
3824         MLX5_ASSERT(has_mtr);
3825         *has_mtr = false;
3826         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3827                 switch (actions->type) {
3828                 case RTE_FLOW_ACTION_TYPE_METER:
3829                         mtr = actions->conf;
3830                         *meter_id = mtr->mtr_id;
3831                         *has_mtr = true;
3832                         break;
3833                 default:
3834                         break;
3835                 }
3836                 if (!*has_mtr)
3837                         *has_modify |= flow_check_modify_action_type(dev,
3838                                                                 actions->type);
3839                 actions_n++;
3840         }
3841         /* Count RTE_FLOW_ACTION_TYPE_END. */
3842         return actions_n + 1;
3843 }
3844
3845 /**
3846  * Check if the flow should be split due to hairpin.
3847  * The reason for the split is that in current HW we can't
3848  * support encap and push-vlan on Rx, so if a flow contains
3849  * these actions we move it to Tx.
3850  *
3851  * @param dev
3852  *   Pointer to Ethernet device.
3853  * @param[in] attr
3854  *   Flow rule attributes.
3855  * @param[in] actions
3856  *   Associated actions (list terminated by the END action).
3857  *
3858  * @return
3859  *   > 0 the number of actions and the flow should be split,
3860  *   0 when no split required.
3861  */
3862 static int
3863 flow_check_hairpin_split(struct rte_eth_dev *dev,
3864                          const struct rte_flow_attr *attr,
3865                          const struct rte_flow_action actions[])
3866 {
3867         int queue_action = 0;
3868         int action_n = 0;
3869         int split = 0;
3870         const struct rte_flow_action_queue *queue;
3871         const struct rte_flow_action_rss *rss;
3872         const struct rte_flow_action_raw_encap *raw_encap;
3873         const struct rte_eth_hairpin_conf *conf;
3874
3875         if (!attr->ingress)
3876                 return 0;
3877         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3878                 switch (actions->type) {
3879                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3880                         queue = actions->conf;
3881                         if (queue == NULL)
3882                                 return 0;
3883                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3884                         if (conf == NULL || conf->tx_explicit != 0)
3885                                 return 0;
3886                         queue_action = 1;
3887                         action_n++;
3888                         break;
3889                 case RTE_FLOW_ACTION_TYPE_RSS:
3890                         rss = actions->conf;
3891                         if (rss == NULL || rss->queue_num == 0)
3892                                 return 0;
3893                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3894                         if (conf == NULL || conf->tx_explicit != 0)
3895                                 return 0;
3896                         queue_action = 1;
3897                         action_n++;
3898                         break;
3899                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3900                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3901                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3902                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3903                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3904                         split++;
3905                         action_n++;
3906                         break;
3907                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3908                         raw_encap = actions->conf;
3909                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3910                                 split++;
3911                         action_n++;
3912                         break;
3913                 default:
3914                         action_n++;
3915                         break;
3916                 }
3917         }
3918         if (split && queue_action)
3919                 return action_n;
3920         return 0;
3921 }
3922
3923 /* Declare flow create/destroy prototype in advance. */
3924 static uint32_t
3925 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3926                  const struct rte_flow_attr *attr,
3927                  const struct rte_flow_item items[],
3928                  const struct rte_flow_action actions[],
3929                  bool external, struct rte_flow_error *error);
3930
3931 static void
3932 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3933                   uint32_t flow_idx);
3934
3935 int
3936 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused,
3937                       struct mlx5_hlist_entry *entry,
3938                       uint64_t key, void *cb_ctx __rte_unused)
3939 {
3940         struct mlx5_flow_mreg_copy_resource *mcp_res =
3941                 container_of(entry, typeof(*mcp_res), hlist_ent);
3942
3943         return mcp_res->mark_id != key;
3944 }
3945
3946 struct mlx5_hlist_entry *
3947 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3948                        void *cb_ctx)
3949 {
3950         struct rte_eth_dev *dev = list->ctx;
3951         struct mlx5_priv *priv = dev->data->dev_private;
3952         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3953         struct mlx5_flow_mreg_copy_resource *mcp_res;
3954         struct rte_flow_error *error = ctx->error;
3955         uint32_t idx = 0;
3956         int ret;
3957         uint32_t mark_id = key;
3958         struct rte_flow_attr attr = {
3959                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3960                 .ingress = 1,
3961         };
3962         struct mlx5_rte_flow_item_tag tag_spec = {
3963                 .data = mark_id,
3964         };
3965         struct rte_flow_item items[] = {
3966                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3967         };
3968         struct rte_flow_action_mark ftag = {
3969                 .id = mark_id,
3970         };
3971         struct mlx5_flow_action_copy_mreg cp_mreg = {
3972                 .dst = REG_B,
3973                 .src = REG_NON,
3974         };
3975         struct rte_flow_action_jump jump = {
3976                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3977         };
3978         struct rte_flow_action actions[] = {
3979                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3980         };
3981
3982         /* Fill the register fileds in the flow. */
3983         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3984         if (ret < 0)
3985                 return NULL;
3986         tag_spec.id = ret;
3987         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3988         if (ret < 0)
3989                 return NULL;
3990         cp_mreg.src = ret;
3991         /* Provide the full width of FLAG specific value. */
3992         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3993                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3994         /* Build a new flow. */
3995         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3996                 items[0] = (struct rte_flow_item){
3997                         .type = (enum rte_flow_item_type)
3998                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3999                         .spec = &tag_spec,
4000                 };
4001                 items[1] = (struct rte_flow_item){
4002                         .type = RTE_FLOW_ITEM_TYPE_END,
4003                 };
4004                 actions[0] = (struct rte_flow_action){
4005                         .type = (enum rte_flow_action_type)
4006                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4007                         .conf = &ftag,
4008                 };
4009                 actions[1] = (struct rte_flow_action){
4010                         .type = (enum rte_flow_action_type)
4011                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4012                         .conf = &cp_mreg,
4013                 };
4014                 actions[2] = (struct rte_flow_action){
4015                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4016                         .conf = &jump,
4017                 };
4018                 actions[3] = (struct rte_flow_action){
4019                         .type = RTE_FLOW_ACTION_TYPE_END,
4020                 };
4021         } else {
4022                 /* Default rule, wildcard match. */
4023                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4024                 items[0] = (struct rte_flow_item){
4025                         .type = RTE_FLOW_ITEM_TYPE_END,
4026                 };
4027                 actions[0] = (struct rte_flow_action){
4028                         .type = (enum rte_flow_action_type)
4029                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4030                         .conf = &cp_mreg,
4031                 };
4032                 actions[1] = (struct rte_flow_action){
4033                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4034                         .conf = &jump,
4035                 };
4036                 actions[2] = (struct rte_flow_action){
4037                         .type = RTE_FLOW_ACTION_TYPE_END,
4038                 };
4039         }
4040         /* Build a new entry. */
4041         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4042         if (!mcp_res) {
4043                 rte_errno = ENOMEM;
4044                 return NULL;
4045         }
4046         mcp_res->idx = idx;
4047         mcp_res->mark_id = mark_id;
4048         /*
4049          * The copy Flows are not included in any list. There
4050          * ones are referenced from other Flows and can not
4051          * be applied, removed, deleted in ardbitrary order
4052          * by list traversing.
4053          */
4054         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
4055                                          actions, false, error);
4056         if (!mcp_res->rix_flow) {
4057                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4058                 return NULL;
4059         }
4060         return &mcp_res->hlist_ent;
4061 }
4062
4063 /**
4064  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4065  *
4066  * As mark_id is unique, if there's already a registered flow for the mark_id,
4067  * return by increasing the reference counter of the resource. Otherwise, create
4068  * the resource (mcp_res) and flow.
4069  *
4070  * Flow looks like,
4071  *   - If ingress port is ANY and reg_c[1] is mark_id,
4072  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4073  *
4074  * For default flow (zero mark_id), flow is like,
4075  *   - If ingress port is ANY,
4076  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4077  *
4078  * @param dev
4079  *   Pointer to Ethernet device.
4080  * @param mark_id
4081  *   ID of MARK action, zero means default flow for META.
4082  * @param[out] error
4083  *   Perform verbose error reporting if not NULL.
4084  *
4085  * @return
4086  *   Associated resource on success, NULL otherwise and rte_errno is set.
4087  */
4088 static struct mlx5_flow_mreg_copy_resource *
4089 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4090                           struct rte_flow_error *error)
4091 {
4092         struct mlx5_priv *priv = dev->data->dev_private;
4093         struct mlx5_hlist_entry *entry;
4094         struct mlx5_flow_cb_ctx ctx = {
4095                 .dev = dev,
4096                 .error = error,
4097         };
4098
4099         /* Check if already registered. */
4100         MLX5_ASSERT(priv->mreg_cp_tbl);
4101         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4102         if (!entry)
4103                 return NULL;
4104         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4105                             hlist_ent);
4106 }
4107
4108 void
4109 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
4110 {
4111         struct mlx5_flow_mreg_copy_resource *mcp_res =
4112                 container_of(entry, typeof(*mcp_res), hlist_ent);
4113         struct rte_eth_dev *dev = list->ctx;
4114         struct mlx5_priv *priv = dev->data->dev_private;
4115
4116         MLX5_ASSERT(mcp_res->rix_flow);
4117         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
4118         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4119 }
4120
4121 /**
4122  * Release flow in RX_CP_TBL.
4123  *
4124  * @param dev
4125  *   Pointer to Ethernet device.
4126  * @flow
4127  *   Parent flow for wich copying is provided.
4128  */
4129 static void
4130 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4131                           struct rte_flow *flow)
4132 {
4133         struct mlx5_flow_mreg_copy_resource *mcp_res;
4134         struct mlx5_priv *priv = dev->data->dev_private;
4135
4136         if (!flow->rix_mreg_copy)
4137                 return;
4138         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4139                                  flow->rix_mreg_copy);
4140         if (!mcp_res || !priv->mreg_cp_tbl)
4141                 return;
4142         MLX5_ASSERT(mcp_res->rix_flow);
4143         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4144         flow->rix_mreg_copy = 0;
4145 }
4146
4147 /**
4148  * Remove the default copy action from RX_CP_TBL.
4149  *
4150  * This functions is called in the mlx5_dev_start(). No thread safe
4151  * is guaranteed.
4152  *
4153  * @param dev
4154  *   Pointer to Ethernet device.
4155  */
4156 static void
4157 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4158 {
4159         struct mlx5_hlist_entry *entry;
4160         struct mlx5_priv *priv = dev->data->dev_private;
4161
4162         /* Check if default flow is registered. */
4163         if (!priv->mreg_cp_tbl)
4164                 return;
4165         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
4166                                   MLX5_DEFAULT_COPY_ID, NULL);
4167         if (!entry)
4168                 return;
4169         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4170 }
4171
4172 /**
4173  * Add the default copy action in in RX_CP_TBL.
4174  *
4175  * This functions is called in the mlx5_dev_start(). No thread safe
4176  * is guaranteed.
4177  *
4178  * @param dev
4179  *   Pointer to Ethernet device.
4180  * @param[out] error
4181  *   Perform verbose error reporting if not NULL.
4182  *
4183  * @return
4184  *   0 for success, negative value otherwise and rte_errno is set.
4185  */
4186 static int
4187 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4188                                   struct rte_flow_error *error)
4189 {
4190         struct mlx5_priv *priv = dev->data->dev_private;
4191         struct mlx5_flow_mreg_copy_resource *mcp_res;
4192
4193         /* Check whether extensive metadata feature is engaged. */
4194         if (!priv->config.dv_flow_en ||
4195             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4196             !mlx5_flow_ext_mreg_supported(dev) ||
4197             !priv->sh->dv_regc0_mask)
4198                 return 0;
4199         /*
4200          * Add default mreg copy flow may be called multiple time, but
4201          * only be called once in stop. Avoid register it twice.
4202          */
4203         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
4204                 return 0;
4205         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
4206         if (!mcp_res)
4207                 return -rte_errno;
4208         return 0;
4209 }
4210
4211 /**
4212  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4213  *
4214  * All the flow having Q/RSS action should be split by
4215  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4216  * performs the following,
4217  *   - CQE->flow_tag := reg_c[1] (MARK)
4218  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4219  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4220  * but there should be a flow per each MARK ID set by MARK action.
4221  *
4222  * For the aforementioned reason, if there's a MARK action in flow's action
4223  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4224  * the MARK ID to CQE's flow_tag like,
4225  *   - If reg_c[1] is mark_id,
4226  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4227  *
4228  * For SET_META action which stores value in reg_c[0], as the destination is
4229  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4230  * MARK ID means the default flow. The default flow looks like,
4231  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4232  *
4233  * @param dev
4234  *   Pointer to Ethernet device.
4235  * @param flow
4236  *   Pointer to flow structure.
4237  * @param[in] actions
4238  *   Pointer to the list of actions.
4239  * @param[out] error
4240  *   Perform verbose error reporting if not NULL.
4241  *
4242  * @return
4243  *   0 on success, negative value otherwise and rte_errno is set.
4244  */
4245 static int
4246 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4247                             struct rte_flow *flow,
4248                             const struct rte_flow_action *actions,
4249                             struct rte_flow_error *error)
4250 {
4251         struct mlx5_priv *priv = dev->data->dev_private;
4252         struct mlx5_dev_config *config = &priv->config;
4253         struct mlx5_flow_mreg_copy_resource *mcp_res;
4254         const struct rte_flow_action_mark *mark;
4255
4256         /* Check whether extensive metadata feature is engaged. */
4257         if (!config->dv_flow_en ||
4258             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4259             !mlx5_flow_ext_mreg_supported(dev) ||
4260             !priv->sh->dv_regc0_mask)
4261                 return 0;
4262         /* Find MARK action. */
4263         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4264                 switch (actions->type) {
4265                 case RTE_FLOW_ACTION_TYPE_FLAG:
4266                         mcp_res = flow_mreg_add_copy_action
4267                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4268                         if (!mcp_res)
4269                                 return -rte_errno;
4270                         flow->rix_mreg_copy = mcp_res->idx;
4271                         return 0;
4272                 case RTE_FLOW_ACTION_TYPE_MARK:
4273                         mark = (const struct rte_flow_action_mark *)
4274                                 actions->conf;
4275                         mcp_res =
4276                                 flow_mreg_add_copy_action(dev, mark->id, error);
4277                         if (!mcp_res)
4278                                 return -rte_errno;
4279                         flow->rix_mreg_copy = mcp_res->idx;
4280                         return 0;
4281                 default:
4282                         break;
4283                 }
4284         }
4285         return 0;
4286 }
4287
4288 #define MLX5_MAX_SPLIT_ACTIONS 24
4289 #define MLX5_MAX_SPLIT_ITEMS 24
4290
4291 /**
4292  * Split the hairpin flow.
4293  * Since HW can't support encap and push-vlan on Rx, we move these
4294  * actions to Tx.
4295  * If the count action is after the encap then we also
4296  * move the count action. in this case the count will also measure
4297  * the outer bytes.
4298  *
4299  * @param dev
4300  *   Pointer to Ethernet device.
4301  * @param[in] actions
4302  *   Associated actions (list terminated by the END action).
4303  * @param[out] actions_rx
4304  *   Rx flow actions.
4305  * @param[out] actions_tx
4306  *   Tx flow actions..
4307  * @param[out] pattern_tx
4308  *   The pattern items for the Tx flow.
4309  * @param[out] flow_id
4310  *   The flow ID connected to this flow.
4311  *
4312  * @return
4313  *   0 on success.
4314  */
4315 static int
4316 flow_hairpin_split(struct rte_eth_dev *dev,
4317                    const struct rte_flow_action actions[],
4318                    struct rte_flow_action actions_rx[],
4319                    struct rte_flow_action actions_tx[],
4320                    struct rte_flow_item pattern_tx[],
4321                    uint32_t flow_id)
4322 {
4323         const struct rte_flow_action_raw_encap *raw_encap;
4324         const struct rte_flow_action_raw_decap *raw_decap;
4325         struct mlx5_rte_flow_action_set_tag *set_tag;
4326         struct rte_flow_action *tag_action;
4327         struct mlx5_rte_flow_item_tag *tag_item;
4328         struct rte_flow_item *item;
4329         char *addr;
4330         int encap = 0;
4331
4332         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4333                 switch (actions->type) {
4334                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4335                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4336                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4337                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4338                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4339                         rte_memcpy(actions_tx, actions,
4340                                sizeof(struct rte_flow_action));
4341                         actions_tx++;
4342                         break;
4343                 case RTE_FLOW_ACTION_TYPE_COUNT:
4344                         if (encap) {
4345                                 rte_memcpy(actions_tx, actions,
4346                                            sizeof(struct rte_flow_action));
4347                                 actions_tx++;
4348                         } else {
4349                                 rte_memcpy(actions_rx, actions,
4350                                            sizeof(struct rte_flow_action));
4351                                 actions_rx++;
4352                         }
4353                         break;
4354                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4355                         raw_encap = actions->conf;
4356                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4357                                 memcpy(actions_tx, actions,
4358                                        sizeof(struct rte_flow_action));
4359                                 actions_tx++;
4360                                 encap = 1;
4361                         } else {
4362                                 rte_memcpy(actions_rx, actions,
4363                                            sizeof(struct rte_flow_action));
4364                                 actions_rx++;
4365                         }
4366                         break;
4367                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4368                         raw_decap = actions->conf;
4369                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4370                                 memcpy(actions_tx, actions,
4371                                        sizeof(struct rte_flow_action));
4372                                 actions_tx++;
4373                         } else {
4374                                 rte_memcpy(actions_rx, actions,
4375                                            sizeof(struct rte_flow_action));
4376                                 actions_rx++;
4377                         }
4378                         break;
4379                 default:
4380                         rte_memcpy(actions_rx, actions,
4381                                    sizeof(struct rte_flow_action));
4382                         actions_rx++;
4383                         break;
4384                 }
4385         }
4386         /* Add set meta action and end action for the Rx flow. */
4387         tag_action = actions_rx;
4388         tag_action->type = (enum rte_flow_action_type)
4389                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4390         actions_rx++;
4391         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4392         actions_rx++;
4393         set_tag = (void *)actions_rx;
4394         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4395                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4396                 .data = flow_id,
4397         };
4398         MLX5_ASSERT(set_tag->id > REG_NON);
4399         tag_action->conf = set_tag;
4400         /* Create Tx item list. */
4401         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4402         addr = (void *)&pattern_tx[2];
4403         item = pattern_tx;
4404         item->type = (enum rte_flow_item_type)
4405                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4406         tag_item = (void *)addr;
4407         tag_item->data = flow_id;
4408         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4409         MLX5_ASSERT(set_tag->id > REG_NON);
4410         item->spec = tag_item;
4411         addr += sizeof(struct mlx5_rte_flow_item_tag);
4412         tag_item = (void *)addr;
4413         tag_item->data = UINT32_MAX;
4414         tag_item->id = UINT16_MAX;
4415         item->mask = tag_item;
4416         item->last = NULL;
4417         item++;
4418         item->type = RTE_FLOW_ITEM_TYPE_END;
4419         return 0;
4420 }
4421
4422 /**
4423  * The last stage of splitting chain, just creates the subflow
4424  * without any modification.
4425  *
4426  * @param[in] dev
4427  *   Pointer to Ethernet device.
4428  * @param[in] flow
4429  *   Parent flow structure pointer.
4430  * @param[in, out] sub_flow
4431  *   Pointer to return the created subflow, may be NULL.
4432  * @param[in] attr
4433  *   Flow rule attributes.
4434  * @param[in] items
4435  *   Pattern specification (list terminated by the END pattern item).
4436  * @param[in] actions
4437  *   Associated actions (list terminated by the END action).
4438  * @param[in] flow_split_info
4439  *   Pointer to flow split info structure.
4440  * @param[out] error
4441  *   Perform verbose error reporting if not NULL.
4442  * @return
4443  *   0 on success, negative value otherwise
4444  */
4445 static int
4446 flow_create_split_inner(struct rte_eth_dev *dev,
4447                         struct rte_flow *flow,
4448                         struct mlx5_flow **sub_flow,
4449                         const struct rte_flow_attr *attr,
4450                         const struct rte_flow_item items[],
4451                         const struct rte_flow_action actions[],
4452                         struct mlx5_flow_split_info *flow_split_info,
4453                         struct rte_flow_error *error)
4454 {
4455         struct mlx5_flow *dev_flow;
4456
4457         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4458                                     flow_split_info->flow_idx, error);
4459         if (!dev_flow)
4460                 return -rte_errno;
4461         dev_flow->flow = flow;
4462         dev_flow->external = flow_split_info->external;
4463         dev_flow->skip_scale = flow_split_info->skip_scale;
4464         /* Subflow object was created, we must include one in the list. */
4465         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4466                       dev_flow->handle, next);
4467         /*
4468          * If dev_flow is as one of the suffix flow, some actions in suffix
4469          * flow may need some user defined item layer flags, and pass the
4470          * Metadate rxq mark flag to suffix flow as well.
4471          */
4472         if (flow_split_info->prefix_layers)
4473                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4474         if (flow_split_info->prefix_mark)
4475                 dev_flow->handle->mark = 1;
4476         if (sub_flow)
4477                 *sub_flow = dev_flow;
4478 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4479         dev_flow->dv.table_id = flow_split_info->table_id;
4480 #endif
4481         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4482 }
4483
4484 /**
4485  * Get the sub policy of a meter.
4486  *
4487  * @param[in] dev
4488  *   Pointer to Ethernet device.
4489  * @param[in] flow
4490  *   Parent flow structure pointer.
4491  * @param[in] policy_id;
4492  *   Meter Policy id.
4493  * @param[in] attr
4494  *   Flow rule attributes.
4495  * @param[in] items
4496  *   Pattern specification (list terminated by the END pattern item).
4497  * @param[out] error
4498  *   Perform verbose error reporting if not NULL.
4499  *
4500  * @return
4501  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4502  */
4503 static struct mlx5_flow_meter_sub_policy *
4504 get_meter_sub_policy(struct rte_eth_dev *dev,
4505                      struct rte_flow *flow,
4506                      uint32_t policy_id,
4507                      const struct rte_flow_attr *attr,
4508                      const struct rte_flow_item items[],
4509                      struct rte_flow_error *error)
4510 {
4511         struct mlx5_flow_meter_policy *policy;
4512         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4513
4514         policy = mlx5_flow_meter_policy_find(dev, policy_id, NULL);
4515         if (!policy) {
4516                 rte_flow_error_set(error, EINVAL,
4517                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4518                                    "Failed to find Meter Policy.");
4519                 goto exit;
4520         }
4521         if (policy->is_rss) {
4522                 struct mlx5_flow_workspace *wks =
4523                                 mlx5_flow_get_thread_workspace();
4524                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4525                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4526                 uint32_t i;
4527
4528                 MLX5_ASSERT(wks);
4529                 /**
4530                  * This is a tmp dev_flow,
4531                  * no need to register any matcher for it in translate.
4532                  */
4533                 wks->skip_matcher_reg = 1;
4534                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4535                         struct mlx5_flow dev_flow = {0};
4536                         struct mlx5_flow_handle dev_handle = { {0} };
4537                         const void *rss_act = policy->act_cnt[i].rss->conf;
4538                         struct rte_flow_action rss_actions[2] = {
4539                                 [0] = {
4540                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4541                                         .conf = rss_act
4542                                 },
4543                                 [1] = {
4544                                         .type = RTE_FLOW_ACTION_TYPE_END,
4545                                         .conf = NULL
4546                                 }
4547                         };
4548
4549                         dev_flow.handle = &dev_handle;
4550                         dev_flow.ingress = attr->ingress;
4551                         dev_flow.flow = flow;
4552                         dev_flow.external = 0;
4553 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4554                         dev_flow.dv.transfer = attr->transfer;
4555 #endif
4556                         /* Translate RSS action to get rss hash fields. */
4557                         if (flow_drv_translate(dev, &dev_flow, attr,
4558                                                 items, rss_actions, error))
4559                                 goto exit;
4560                         rss_desc_v[i] = wks->rss_desc;
4561                         rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4562                         rss_desc_v[i].hash_fields = dev_flow.hash_fields;
4563                         rss_desc_v[i].queue_num = rss_desc_v[i].hash_fields ?
4564                                                   rss_desc_v[i].queue_num : 1;
4565                         rss_desc[i] = &rss_desc_v[i];
4566                 }
4567                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4568                                                 flow, policy, rss_desc);
4569         } else {
4570                 enum mlx5_meter_domain mtr_domain =
4571                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4572                                 attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4573                                         MLX5_MTR_DOMAIN_INGRESS;
4574                 sub_policy = policy->sub_policys[mtr_domain][0];
4575         }
4576         if (!sub_policy) {
4577                 rte_flow_error_set(error, EINVAL,
4578                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4579                         "Failed to get meter sub-policy.");
4580                 goto exit;
4581         }
4582 exit:
4583         return sub_policy;
4584 }
4585
4586 /**
4587  * Split the meter flow.
4588  *
4589  * As meter flow will split to three sub flow, other than meter
4590  * action, the other actions make sense to only meter accepts
4591  * the packet. If it need to be dropped, no other additional
4592  * actions should be take.
4593  *
4594  * One kind of special action which decapsulates the L3 tunnel
4595  * header will be in the prefix sub flow, as not to take the
4596  * L3 tunnel header into account.
4597  *
4598  * @param[in] dev
4599  *   Pointer to Ethernet device.
4600  * @param[in] flow
4601  *   Parent flow structure pointer.
4602  * @param[in] fm
4603  *   Pointer to flow meter structure.
4604  * @param[in] attr
4605  *   Flow rule attributes.
4606  * @param[in] items
4607  *   Pattern specification (list terminated by the END pattern item).
4608  * @param[out] sfx_items
4609  *   Suffix flow match items (list terminated by the END pattern item).
4610  * @param[in] actions
4611  *   Associated actions (list terminated by the END action).
4612  * @param[out] actions_sfx
4613  *   Suffix flow actions.
4614  * @param[out] actions_pre
4615  *   Prefix flow actions.
4616  * @param[out] mtr_flow_id
4617  *   Pointer to meter flow id.
4618  * @param[out] error
4619  *   Perform verbose error reporting if not NULL.
4620  *
4621  * @return
4622  *   0 on success, a negative errno value otherwise and rte_errno is set.
4623  */
4624 static int
4625 flow_meter_split_prep(struct rte_eth_dev *dev,
4626                       struct rte_flow *flow,
4627                       struct mlx5_flow_meter_info *fm,
4628                       const struct rte_flow_attr *attr,
4629                       const struct rte_flow_item items[],
4630                       struct rte_flow_item sfx_items[],
4631                       const struct rte_flow_action actions[],
4632                       struct rte_flow_action actions_sfx[],
4633                       struct rte_flow_action actions_pre[],
4634                       uint32_t *mtr_flow_id,
4635                       struct rte_flow_error *error)
4636 {
4637         struct mlx5_priv *priv = dev->data->dev_private;
4638         struct rte_flow_action *tag_action = NULL;
4639         struct rte_flow_item *tag_item;
4640         struct mlx5_rte_flow_action_set_tag *set_tag;
4641         const struct rte_flow_action_raw_encap *raw_encap;
4642         const struct rte_flow_action_raw_decap *raw_decap;
4643         struct mlx5_rte_flow_item_tag *tag_item_spec;
4644         struct mlx5_rte_flow_item_tag *tag_item_mask;
4645         uint32_t tag_id = 0;
4646         bool copy_vlan = false;
4647         struct rte_flow_action *hw_mtr_action;
4648         struct rte_flow_action *action_pre_head = NULL;
4649         bool mtr_first = priv->sh->meter_aso_en &&
4650                         (attr->egress ||
4651                         (attr->transfer && priv->representor_id != UINT16_MAX));
4652         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4653         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4654                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4655         uint32_t flow_id = 0;
4656         uint32_t flow_id_reversed = 0;
4657         uint8_t flow_id_bits = 0;
4658         int shift;
4659
4660         /* For ASO meter, meter must be before tag in TX direction. */
4661         if (mtr_first) {
4662                 action_pre_head = actions_pre++;
4663                 /* Leave space for tag action. */
4664                 tag_action = actions_pre++;
4665         }
4666         /* Prepare the actions for prefix and suffix flow. */
4667         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4668                 struct rte_flow_action *action_cur = NULL;
4669
4670                 switch (actions->type) {
4671                 case RTE_FLOW_ACTION_TYPE_METER:
4672                         if (mtr_first) {
4673                                 action_cur = action_pre_head;
4674                         } else {
4675                                 /* Leave space for tag action. */
4676                                 tag_action = actions_pre++;
4677                                 action_cur = actions_pre++;
4678                         }
4679                         break;
4680                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4681                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4682                         action_cur = actions_pre++;
4683                         break;
4684                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4685                         raw_encap = actions->conf;
4686                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4687                                 action_cur = actions_pre++;
4688                         break;
4689                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4690                         raw_decap = actions->conf;
4691                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4692                                 action_cur = actions_pre++;
4693                         break;
4694                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4695                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4696                         copy_vlan = true;
4697                         break;
4698                 default:
4699                         break;
4700                 }
4701                 if (!action_cur)
4702                         action_cur = (fm->def_policy) ?
4703                                         actions_sfx++ : actions_pre++;
4704                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
4705         }
4706         /* Add end action to the actions. */
4707         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4708         if (priv->sh->meter_aso_en) {
4709                 /**
4710                  * For ASO meter, need to add an extra jump action explicitly,
4711                  * to jump from meter to policer table.
4712                  */
4713                 struct mlx5_flow_meter_sub_policy *sub_policy;
4714                 struct mlx5_flow_tbl_data_entry *tbl_data;
4715
4716                 if (!fm->def_policy) {
4717                         sub_policy = get_meter_sub_policy(dev, flow,
4718                                                           fm->policy_id, attr,
4719                                                           items, error);
4720                         if (!sub_policy)
4721                                 return -rte_errno;
4722                 } else {
4723                         enum mlx5_meter_domain mtr_domain =
4724                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4725                                 attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4726                                         MLX5_MTR_DOMAIN_INGRESS;
4727
4728                         sub_policy =
4729                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
4730                 }
4731                 tbl_data = container_of(sub_policy->tbl_rsc,
4732                                         struct mlx5_flow_tbl_data_entry, tbl);
4733                 hw_mtr_action = actions_pre++;
4734                 hw_mtr_action->type = (enum rte_flow_action_type)
4735                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
4736                 hw_mtr_action->conf = tbl_data->jump.action;
4737         }
4738         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4739         actions_pre++;
4740         if (!tag_action)
4741                 return rte_flow_error_set(error, ENOMEM,
4742                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4743                                         "No tag action space.");
4744         if (!mtr_flow_id) {
4745                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
4746                 goto exit;
4747         }
4748         /* Only default-policy Meter creates mtr flow id. */
4749         if (fm->def_policy) {
4750                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
4751                 if (!tag_id)
4752                         return rte_flow_error_set(error, ENOMEM,
4753                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4754                                         "Failed to allocate meter flow id.");
4755                 flow_id = tag_id - 1;
4756                 flow_id_bits = MLX5_REG_BITS - __builtin_clz(flow_id);
4757                 flow_id_bits = flow_id_bits ? flow_id_bits : 1;
4758                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
4759                     mtr_reg_bits) {
4760                         mlx5_ipool_free(fm->flow_ipool, tag_id);
4761                         return rte_flow_error_set(error, EINVAL,
4762                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4763                                         "Meter flow id exceeds max limit.");
4764                 }
4765                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
4766                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
4767         }
4768         /* Prepare the suffix subflow items. */
4769         tag_item = sfx_items++;
4770         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4771                 int item_type = items->type;
4772
4773                 switch (item_type) {
4774                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4775                         memcpy(sfx_items, items, sizeof(*sfx_items));
4776                         sfx_items++;
4777                         break;
4778                 case RTE_FLOW_ITEM_TYPE_VLAN:
4779                         if (copy_vlan) {
4780                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4781                                 /*
4782                                  * Convert to internal match item, it is used
4783                                  * for vlan push and set vid.
4784                                  */
4785                                 sfx_items->type = (enum rte_flow_item_type)
4786                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4787                                 sfx_items++;
4788                         }
4789                         break;
4790                 default:
4791                         break;
4792                 }
4793         }
4794         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4795         sfx_items++;
4796         /* Build tag actions and items for meter_id/meter flow_id. */
4797         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
4798         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4799         tag_item_mask = tag_item_spec + 1;
4800         /* Both flow_id and meter_id share the same register. */
4801         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4802                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
4803                                                             0, error),
4804                 .offset = mtr_id_offset,
4805                 .length = mtr_reg_bits,
4806                 .data = flow->meter,
4807         };
4808         /*
4809          * The color Reg bits used by flow_id are growing from
4810          * msb to lsb, so must do bit reverse for flow_id val in RegC.
4811          */
4812         for (shift = 0; shift < flow_id_bits; shift++)
4813                 flow_id_reversed = (flow_id_reversed << 1) |
4814                                 ((flow_id >> shift) & 0x1);
4815         set_tag->data |=
4816                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
4817         tag_item_spec->id = set_tag->id;
4818         tag_item_spec->data = set_tag->data << mtr_id_offset;
4819         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
4820         tag_action->type = (enum rte_flow_action_type)
4821                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4822         tag_action->conf = set_tag;
4823         tag_item->type = (enum rte_flow_item_type)
4824                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4825         tag_item->spec = tag_item_spec;
4826         tag_item->last = NULL;
4827         tag_item->mask = tag_item_mask;
4828 exit:
4829         if (mtr_flow_id)
4830                 *mtr_flow_id = tag_id;
4831         return 0;
4832 }
4833
4834 /**
4835  * Split action list having QUEUE/RSS for metadata register copy.
4836  *
4837  * Once Q/RSS action is detected in user's action list, the flow action
4838  * should be split in order to copy metadata registers, which will happen in
4839  * RX_CP_TBL like,
4840  *   - CQE->flow_tag := reg_c[1] (MARK)
4841  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4842  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4843  * This is because the last action of each flow must be a terminal action
4844  * (QUEUE, RSS or DROP).
4845  *
4846  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4847  * stored and kept in the mlx5_flow structure per each sub_flow.
4848  *
4849  * The Q/RSS action is replaced with,
4850  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4851  * And the following JUMP action is added at the end,
4852  *   - JUMP, to RX_CP_TBL.
4853  *
4854  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4855  * flow_create_split_metadata() routine. The flow will look like,
4856  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4857  *
4858  * @param dev
4859  *   Pointer to Ethernet device.
4860  * @param[out] split_actions
4861  *   Pointer to store split actions to jump to CP_TBL.
4862  * @param[in] actions
4863  *   Pointer to the list of original flow actions.
4864  * @param[in] qrss
4865  *   Pointer to the Q/RSS action.
4866  * @param[in] actions_n
4867  *   Number of original actions.
4868  * @param[out] error
4869  *   Perform verbose error reporting if not NULL.
4870  *
4871  * @return
4872  *   non-zero unique flow_id on success, otherwise 0 and
4873  *   error/rte_error are set.
4874  */
4875 static uint32_t
4876 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4877                           struct rte_flow_action *split_actions,
4878                           const struct rte_flow_action *actions,
4879                           const struct rte_flow_action *qrss,
4880                           int actions_n, struct rte_flow_error *error)
4881 {
4882         struct mlx5_priv *priv = dev->data->dev_private;
4883         struct mlx5_rte_flow_action_set_tag *set_tag;
4884         struct rte_flow_action_jump *jump;
4885         const int qrss_idx = qrss - actions;
4886         uint32_t flow_id = 0;
4887         int ret = 0;
4888
4889         /*
4890          * Given actions will be split
4891          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4892          * - Add jump to mreg CP_TBL.
4893          * As a result, there will be one more action.
4894          */
4895         ++actions_n;
4896         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4897         set_tag = (void *)(split_actions + actions_n);
4898         /*
4899          * If tag action is not set to void(it means we are not the meter
4900          * suffix flow), add the tag action. Since meter suffix flow already
4901          * has the tag added.
4902          */
4903         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4904                 /*
4905                  * Allocate the new subflow ID. This one is unique within
4906                  * device and not shared with representors. Otherwise,
4907                  * we would have to resolve multi-thread access synch
4908                  * issue. Each flow on the shared device is appended
4909                  * with source vport identifier, so the resulting
4910                  * flows will be unique in the shared (by master and
4911                  * representors) domain even if they have coinciding
4912                  * IDs.
4913                  */
4914                 mlx5_ipool_malloc(priv->sh->ipool
4915                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4916                 if (!flow_id)
4917                         return rte_flow_error_set(error, ENOMEM,
4918                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4919                                                   NULL, "can't allocate id "
4920                                                   "for split Q/RSS subflow");
4921                 /* Internal SET_TAG action to set flow ID. */
4922                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4923                         .data = flow_id,
4924                 };
4925                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4926                 if (ret < 0)
4927                         return ret;
4928                 set_tag->id = ret;
4929                 /* Construct new actions array. */
4930                 /* Replace QUEUE/RSS action. */
4931                 split_actions[qrss_idx] = (struct rte_flow_action){
4932                         .type = (enum rte_flow_action_type)
4933                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4934                         .conf = set_tag,
4935                 };
4936         }
4937         /* JUMP action to jump to mreg copy table (CP_TBL). */
4938         jump = (void *)(set_tag + 1);
4939         *jump = (struct rte_flow_action_jump){
4940                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4941         };
4942         split_actions[actions_n - 2] = (struct rte_flow_action){
4943                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4944                 .conf = jump,
4945         };
4946         split_actions[actions_n - 1] = (struct rte_flow_action){
4947                 .type = RTE_FLOW_ACTION_TYPE_END,
4948         };
4949         return flow_id;
4950 }
4951
4952 /**
4953  * Extend the given action list for Tx metadata copy.
4954  *
4955  * Copy the given action list to the ext_actions and add flow metadata register
4956  * copy action in order to copy reg_a set by WQE to reg_c[0].
4957  *
4958  * @param[out] ext_actions
4959  *   Pointer to the extended action list.
4960  * @param[in] actions
4961  *   Pointer to the list of actions.
4962  * @param[in] actions_n
4963  *   Number of actions in the list.
4964  * @param[out] error
4965  *   Perform verbose error reporting if not NULL.
4966  * @param[in] encap_idx
4967  *   The encap action inndex.
4968  *
4969  * @return
4970  *   0 on success, negative value otherwise
4971  */
4972 static int
4973 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4974                        struct rte_flow_action *ext_actions,
4975                        const struct rte_flow_action *actions,
4976                        int actions_n, struct rte_flow_error *error,
4977                        int encap_idx)
4978 {
4979         struct mlx5_flow_action_copy_mreg *cp_mreg =
4980                 (struct mlx5_flow_action_copy_mreg *)
4981                         (ext_actions + actions_n + 1);
4982         int ret;
4983
4984         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4985         if (ret < 0)
4986                 return ret;
4987         cp_mreg->dst = ret;
4988         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4989         if (ret < 0)
4990                 return ret;
4991         cp_mreg->src = ret;
4992         if (encap_idx != 0)
4993                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4994         if (encap_idx == actions_n - 1) {
4995                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4996                         .type = (enum rte_flow_action_type)
4997                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4998                         .conf = cp_mreg,
4999                 };
5000                 ext_actions[actions_n] = (struct rte_flow_action){
5001                         .type = RTE_FLOW_ACTION_TYPE_END,
5002                 };
5003         } else {
5004                 ext_actions[encap_idx] = (struct rte_flow_action){
5005                         .type = (enum rte_flow_action_type)
5006                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5007                         .conf = cp_mreg,
5008                 };
5009                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5010                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5011         }
5012         return 0;
5013 }
5014
5015 /**
5016  * Check the match action from the action list.
5017  *
5018  * @param[in] actions
5019  *   Pointer to the list of actions.
5020  * @param[in] attr
5021  *   Flow rule attributes.
5022  * @param[in] action
5023  *   The action to be check if exist.
5024  * @param[out] match_action_pos
5025  *   Pointer to the position of the matched action if exists, otherwise is -1.
5026  * @param[out] qrss_action_pos
5027  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5028  * @param[out] modify_after_mirror
5029  *   Pointer to the flag of modify action after FDB mirroring.
5030  *
5031  * @return
5032  *   > 0 the total number of actions.
5033  *   0 if not found match action in action list.
5034  */
5035 static int
5036 flow_check_match_action(const struct rte_flow_action actions[],
5037                         const struct rte_flow_attr *attr,
5038                         enum rte_flow_action_type action,
5039                         int *match_action_pos, int *qrss_action_pos,
5040                         int *modify_after_mirror)
5041 {
5042         const struct rte_flow_action_sample *sample;
5043         int actions_n = 0;
5044         uint32_t ratio = 0;
5045         int sub_type = 0;
5046         int flag = 0;
5047         int fdb_mirror = 0;
5048
5049         *match_action_pos = -1;
5050         *qrss_action_pos = -1;
5051         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5052                 if (actions->type == action) {
5053                         flag = 1;
5054                         *match_action_pos = actions_n;
5055                 }
5056                 switch (actions->type) {
5057                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5058                 case RTE_FLOW_ACTION_TYPE_RSS:
5059                         *qrss_action_pos = actions_n;
5060                         break;
5061                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5062                         sample = actions->conf;
5063                         ratio = sample->ratio;
5064                         sub_type = ((const struct rte_flow_action *)
5065                                         (sample->actions))->type;
5066                         if (ratio == 1 && attr->transfer)
5067                                 fdb_mirror = 1;
5068                         break;
5069                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5070                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5071                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5072                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5073                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5074                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5075                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5076                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5077                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5078                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5079                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5080                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5081                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5082                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5083                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5084                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5085                 case RTE_FLOW_ACTION_TYPE_FLAG:
5086                 case RTE_FLOW_ACTION_TYPE_MARK:
5087                 case RTE_FLOW_ACTION_TYPE_SET_META:
5088                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5089                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5090                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5091                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5092                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5093                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5094                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5095                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5096                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5097                         if (fdb_mirror)
5098                                 *modify_after_mirror = 1;
5099                         break;
5100                 default:
5101                         break;
5102                 }
5103                 actions_n++;
5104         }
5105         if (flag && fdb_mirror && !*modify_after_mirror) {
5106                 /* FDB mirroring uses the destination array to implement
5107                  * instead of FLOW_SAMPLER object.
5108                  */
5109                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5110                         flag = 0;
5111         }
5112         /* Count RTE_FLOW_ACTION_TYPE_END. */
5113         return flag ? actions_n + 1 : 0;
5114 }
5115
5116 #define SAMPLE_SUFFIX_ITEM 2
5117
5118 /**
5119  * Split the sample flow.
5120  *
5121  * As sample flow will split to two sub flow, sample flow with
5122  * sample action, the other actions will move to new suffix flow.
5123  *
5124  * Also add unique tag id with tag action in the sample flow,
5125  * the same tag id will be as match in the suffix flow.
5126  *
5127  * @param dev
5128  *   Pointer to Ethernet device.
5129  * @param[in] add_tag
5130  *   Add extra tag action flag.
5131  * @param[out] sfx_items
5132  *   Suffix flow match items (list terminated by the END pattern item).
5133  * @param[in] actions
5134  *   Associated actions (list terminated by the END action).
5135  * @param[out] actions_sfx
5136  *   Suffix flow actions.
5137  * @param[out] actions_pre
5138  *   Prefix flow actions.
5139  * @param[in] actions_n
5140  *  The total number of actions.
5141  * @param[in] sample_action_pos
5142  *   The sample action position.
5143  * @param[in] qrss_action_pos
5144  *   The Queue/RSS action position.
5145  * @param[in] jump_table
5146  *   Add extra jump action flag.
5147  * @param[out] error
5148  *   Perform verbose error reporting if not NULL.
5149  *
5150  * @return
5151  *   0 on success, or unique flow_id, a negative errno value
5152  *   otherwise and rte_errno is set.
5153  */
5154 static int
5155 flow_sample_split_prep(struct rte_eth_dev *dev,
5156                        int add_tag,
5157                        struct rte_flow_item sfx_items[],
5158                        const struct rte_flow_action actions[],
5159                        struct rte_flow_action actions_sfx[],
5160                        struct rte_flow_action actions_pre[],
5161                        int actions_n,
5162                        int sample_action_pos,
5163                        int qrss_action_pos,
5164                        int jump_table,
5165                        struct rte_flow_error *error)
5166 {
5167         struct mlx5_priv *priv = dev->data->dev_private;
5168         struct mlx5_rte_flow_action_set_tag *set_tag;
5169         struct mlx5_rte_flow_item_tag *tag_spec;
5170         struct mlx5_rte_flow_item_tag *tag_mask;
5171         struct rte_flow_action_jump *jump_action;
5172         uint32_t tag_id = 0;
5173         int index;
5174         int append_index = 0;
5175         int ret;
5176
5177         if (sample_action_pos < 0)
5178                 return rte_flow_error_set(error, EINVAL,
5179                                           RTE_FLOW_ERROR_TYPE_ACTION,
5180                                           NULL, "invalid position of sample "
5181                                           "action in list");
5182         /* Prepare the actions for prefix and suffix flow. */
5183         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5184                 index = qrss_action_pos;
5185                 /* Put the preceding the Queue/RSS action into prefix flow. */
5186                 if (index != 0)
5187                         memcpy(actions_pre, actions,
5188                                sizeof(struct rte_flow_action) * index);
5189                 /* Put others preceding the sample action into prefix flow. */
5190                 if (sample_action_pos > index + 1)
5191                         memcpy(actions_pre + index, actions + index + 1,
5192                                sizeof(struct rte_flow_action) *
5193                                (sample_action_pos - index - 1));
5194                 index = sample_action_pos - 1;
5195                 /* Put Queue/RSS action into Suffix flow. */
5196                 memcpy(actions_sfx, actions + qrss_action_pos,
5197                        sizeof(struct rte_flow_action));
5198                 actions_sfx++;
5199         } else {
5200                 index = sample_action_pos;
5201                 if (index != 0)
5202                         memcpy(actions_pre, actions,
5203                                sizeof(struct rte_flow_action) * index);
5204         }
5205         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5206          * For CX6DX and above, metadata registers Cx preserve their value,
5207          * add an extra tag action for NIC-RX and E-Switch Domain.
5208          */
5209         if (add_tag) {
5210                 /* Prepare the prefix tag action. */
5211                 append_index++;
5212                 set_tag = (void *)(actions_pre + actions_n + append_index);
5213                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5214                 if (ret < 0)
5215                         return ret;
5216                 mlx5_ipool_malloc(priv->sh->ipool
5217                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5218                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5219                         .id = ret,
5220                         .data = tag_id,
5221                 };
5222                 /* Prepare the suffix subflow items. */
5223                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5224                 tag_spec->data = tag_id;
5225                 tag_spec->id = set_tag->id;
5226                 tag_mask = tag_spec + 1;
5227                 tag_mask->data = UINT32_MAX;
5228                 sfx_items[0] = (struct rte_flow_item){
5229                         .type = (enum rte_flow_item_type)
5230                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5231                         .spec = tag_spec,
5232                         .last = NULL,
5233                         .mask = tag_mask,
5234                 };
5235                 sfx_items[1] = (struct rte_flow_item){
5236                         .type = (enum rte_flow_item_type)
5237                                 RTE_FLOW_ITEM_TYPE_END,
5238                 };
5239                 /* Prepare the tag action in prefix subflow. */
5240                 actions_pre[index++] =
5241                         (struct rte_flow_action){
5242                         .type = (enum rte_flow_action_type)
5243                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5244                         .conf = set_tag,
5245                 };
5246         }
5247         memcpy(actions_pre + index, actions + sample_action_pos,
5248                sizeof(struct rte_flow_action));
5249         index += 1;
5250         /* For the modify action after the sample action in E-Switch mirroring,
5251          * Add the extra jump action in prefix subflow and jump into the next
5252          * table, then do the modify action in the new table.
5253          */
5254         if (jump_table) {
5255                 /* Prepare the prefix jump action. */
5256                 append_index++;
5257                 jump_action = (void *)(actions_pre + actions_n + append_index);
5258                 jump_action->group = jump_table;
5259                 actions_pre[index++] =
5260                         (struct rte_flow_action){
5261                         .type = (enum rte_flow_action_type)
5262                                 RTE_FLOW_ACTION_TYPE_JUMP,
5263                         .conf = jump_action,
5264                 };
5265         }
5266         actions_pre[index] = (struct rte_flow_action){
5267                 .type = (enum rte_flow_action_type)
5268                         RTE_FLOW_ACTION_TYPE_END,
5269         };
5270         /* Put the actions after sample into Suffix flow. */
5271         memcpy(actions_sfx, actions + sample_action_pos + 1,
5272                sizeof(struct rte_flow_action) *
5273                (actions_n - sample_action_pos - 1));
5274         return tag_id;
5275 }
5276
5277 /**
5278  * The splitting for metadata feature.
5279  *
5280  * - Q/RSS action on NIC Rx should be split in order to pass by
5281  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5282  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5283  *
5284  * - All the actions on NIC Tx should have a mreg copy action to
5285  *   copy reg_a from WQE to reg_c[0].
5286  *
5287  * @param dev
5288  *   Pointer to Ethernet device.
5289  * @param[in] flow
5290  *   Parent flow structure pointer.
5291  * @param[in] attr
5292  *   Flow rule attributes.
5293  * @param[in] items
5294  *   Pattern specification (list terminated by the END pattern item).
5295  * @param[in] actions
5296  *   Associated actions (list terminated by the END action).
5297  * @param[in] flow_split_info
5298  *   Pointer to flow split info structure.
5299  * @param[out] error
5300  *   Perform verbose error reporting if not NULL.
5301  * @return
5302  *   0 on success, negative value otherwise
5303  */
5304 static int
5305 flow_create_split_metadata(struct rte_eth_dev *dev,
5306                            struct rte_flow *flow,
5307                            const struct rte_flow_attr *attr,
5308                            const struct rte_flow_item items[],
5309                            const struct rte_flow_action actions[],
5310                            struct mlx5_flow_split_info *flow_split_info,
5311                            struct rte_flow_error *error)
5312 {
5313         struct mlx5_priv *priv = dev->data->dev_private;
5314         struct mlx5_dev_config *config = &priv->config;
5315         const struct rte_flow_action *qrss = NULL;
5316         struct rte_flow_action *ext_actions = NULL;
5317         struct mlx5_flow *dev_flow = NULL;
5318         uint32_t qrss_id = 0;
5319         int mtr_sfx = 0;
5320         size_t act_size;
5321         int actions_n;
5322         int encap_idx;
5323         int ret;
5324
5325         /* Check whether extensive metadata feature is engaged. */
5326         if (!config->dv_flow_en ||
5327             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5328             !mlx5_flow_ext_mreg_supported(dev))
5329                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5330                                                actions, flow_split_info, error);
5331         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5332                                                            &encap_idx);
5333         if (qrss) {
5334                 /* Exclude hairpin flows from splitting. */
5335                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5336                         const struct rte_flow_action_queue *queue;
5337
5338                         queue = qrss->conf;
5339                         if (mlx5_rxq_get_type(dev, queue->index) ==
5340                             MLX5_RXQ_TYPE_HAIRPIN)
5341                                 qrss = NULL;
5342                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5343                         const struct rte_flow_action_rss *rss;
5344
5345                         rss = qrss->conf;
5346                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5347                             MLX5_RXQ_TYPE_HAIRPIN)
5348                                 qrss = NULL;
5349                 }
5350         }
5351         if (qrss) {
5352                 /* Check if it is in meter suffix table. */
5353                 mtr_sfx = attr->group == (attr->transfer ?
5354                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5355                           MLX5_FLOW_TABLE_LEVEL_METER);
5356                 /*
5357                  * Q/RSS action on NIC Rx should be split in order to pass by
5358                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5359                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5360                  */
5361                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5362                            sizeof(struct rte_flow_action_set_tag) +
5363                            sizeof(struct rte_flow_action_jump);
5364                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5365                                           SOCKET_ID_ANY);
5366                 if (!ext_actions)
5367                         return rte_flow_error_set(error, ENOMEM,
5368                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5369                                                   NULL, "no memory to split "
5370                                                   "metadata flow");
5371                 /*
5372                  * If we are the suffix flow of meter, tag already exist.
5373                  * Set the tag action to void.
5374                  */
5375                 if (mtr_sfx)
5376                         ext_actions[qrss - actions].type =
5377                                                 RTE_FLOW_ACTION_TYPE_VOID;
5378                 else
5379                         ext_actions[qrss - actions].type =
5380                                                 (enum rte_flow_action_type)
5381                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5382                 /*
5383                  * Create the new actions list with removed Q/RSS action
5384                  * and appended set tag and jump to register copy table
5385                  * (RX_CP_TBL). We should preallocate unique tag ID here
5386                  * in advance, because it is needed for set tag action.
5387                  */
5388                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5389                                                     qrss, actions_n, error);
5390                 if (!mtr_sfx && !qrss_id) {
5391                         ret = -rte_errno;
5392                         goto exit;
5393                 }
5394         } else if (attr->egress && !attr->transfer) {
5395                 /*
5396                  * All the actions on NIC Tx should have a metadata register
5397                  * copy action to copy reg_a from WQE to reg_c[meta]
5398                  */
5399                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5400                            sizeof(struct mlx5_flow_action_copy_mreg);
5401                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5402                                           SOCKET_ID_ANY);
5403                 if (!ext_actions)
5404                         return rte_flow_error_set(error, ENOMEM,
5405                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5406                                                   NULL, "no memory to split "
5407                                                   "metadata flow");
5408                 /* Create the action list appended with copy register. */
5409                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5410                                              actions_n, error, encap_idx);
5411                 if (ret < 0)
5412                         goto exit;
5413         }
5414         /* Add the unmodified original or prefix subflow. */
5415         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5416                                       items, ext_actions ? ext_actions :
5417                                       actions, flow_split_info, error);
5418         if (ret < 0)
5419                 goto exit;
5420         MLX5_ASSERT(dev_flow);
5421         if (qrss) {
5422                 const struct rte_flow_attr q_attr = {
5423                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5424                         .ingress = 1,
5425                 };
5426                 /* Internal PMD action to set register. */
5427                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5428                         .data = qrss_id,
5429                         .id = REG_NON,
5430                 };
5431                 struct rte_flow_item q_items[] = {
5432                         {
5433                                 .type = (enum rte_flow_item_type)
5434                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5435                                 .spec = &q_tag_spec,
5436                                 .last = NULL,
5437                                 .mask = NULL,
5438                         },
5439                         {
5440                                 .type = RTE_FLOW_ITEM_TYPE_END,
5441                         },
5442                 };
5443                 struct rte_flow_action q_actions[] = {
5444                         {
5445                                 .type = qrss->type,
5446                                 .conf = qrss->conf,
5447                         },
5448                         {
5449                                 .type = RTE_FLOW_ACTION_TYPE_END,
5450                         },
5451                 };
5452                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5453
5454                 /*
5455                  * Configure the tag item only if there is no meter subflow.
5456                  * Since tag is already marked in the meter suffix subflow
5457                  * we can just use the meter suffix items as is.
5458                  */
5459                 if (qrss_id) {
5460                         /* Not meter subflow. */
5461                         MLX5_ASSERT(!mtr_sfx);
5462                         /*
5463                          * Put unique id in prefix flow due to it is destroyed
5464                          * after suffix flow and id will be freed after there
5465                          * is no actual flows with this id and identifier
5466                          * reallocation becomes possible (for example, for
5467                          * other flows in other threads).
5468                          */
5469                         dev_flow->handle->split_flow_id = qrss_id;
5470                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5471                                                    error);
5472                         if (ret < 0)
5473                                 goto exit;
5474                         q_tag_spec.id = ret;
5475                 }
5476                 dev_flow = NULL;
5477                 /* Add suffix subflow to execute Q/RSS. */
5478                 flow_split_info->prefix_layers = layers;
5479                 flow_split_info->prefix_mark = 0;
5480                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5481                                               &q_attr, mtr_sfx ? items :
5482                                               q_items, q_actions,
5483                                               flow_split_info, error);
5484                 if (ret < 0)
5485                         goto exit;
5486                 /* qrss ID should be freed if failed. */
5487                 qrss_id = 0;
5488                 MLX5_ASSERT(dev_flow);
5489         }
5490
5491 exit:
5492         /*
5493          * We do not destroy the partially created sub_flows in case of error.
5494          * These ones are included into parent flow list and will be destroyed
5495          * by flow_drv_destroy.
5496          */
5497         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5498                         qrss_id);
5499         mlx5_free(ext_actions);
5500         return ret;
5501 }
5502
5503 /**
5504  * Create meter internal drop flow with the original pattern.
5505  *
5506  * @param dev
5507  *   Pointer to Ethernet device.
5508  * @param[in] flow
5509  *   Parent flow structure pointer.
5510  * @param[in] attr
5511  *   Flow rule attributes.
5512  * @param[in] items
5513  *   Pattern specification (list terminated by the END pattern item).
5514  * @param[in] flow_split_info
5515  *   Pointer to flow split info structure.
5516  * @param[in] fm
5517  *   Pointer to flow meter structure.
5518  * @param[out] error
5519  *   Perform verbose error reporting if not NULL.
5520  * @return
5521  *   0 on success, negative value otherwise
5522  */
5523 static uint32_t
5524 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5525                         struct rte_flow *flow,
5526                         const struct rte_flow_attr *attr,
5527                         const struct rte_flow_item items[],
5528                         struct mlx5_flow_split_info *flow_split_info,
5529                         struct mlx5_flow_meter_info *fm,
5530                         struct rte_flow_error *error)
5531 {
5532         struct mlx5_flow *dev_flow = NULL;
5533         struct rte_flow_attr drop_attr = *attr;
5534         struct rte_flow_action drop_actions[3];
5535         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5536
5537         MLX5_ASSERT(fm->drop_cnt);
5538         drop_actions[0].type =
5539                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5540         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5541         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5542         drop_actions[1].conf = NULL;
5543         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5544         drop_actions[2].conf = NULL;
5545         drop_split_info.external = false;
5546         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5547         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5548         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5549         return flow_create_split_inner(dev, flow, &dev_flow,
5550                                 &drop_attr, items, drop_actions,
5551                                 &drop_split_info, error);
5552 }
5553
5554 /**
5555  * The splitting for meter feature.
5556  *
5557  * - The meter flow will be split to two flows as prefix and
5558  *   suffix flow. The packets make sense only it pass the prefix
5559  *   meter action.
5560  *
5561  * - Reg_C_5 is used for the packet to match betweend prefix and
5562  *   suffix flow.
5563  *
5564  * @param dev
5565  *   Pointer to Ethernet device.
5566  * @param[in] flow
5567  *   Parent flow structure pointer.
5568  * @param[in] attr
5569  *   Flow rule attributes.
5570  * @param[in] items
5571  *   Pattern specification (list terminated by the END pattern item).
5572  * @param[in] actions
5573  *   Associated actions (list terminated by the END action).
5574  * @param[in] flow_split_info
5575  *   Pointer to flow split info structure.
5576  * @param[out] error
5577  *   Perform verbose error reporting if not NULL.
5578  * @return
5579  *   0 on success, negative value otherwise
5580  */
5581 static int
5582 flow_create_split_meter(struct rte_eth_dev *dev,
5583                         struct rte_flow *flow,
5584                         const struct rte_flow_attr *attr,
5585                         const struct rte_flow_item items[],
5586                         const struct rte_flow_action actions[],
5587                         struct mlx5_flow_split_info *flow_split_info,
5588                         struct rte_flow_error *error)
5589 {
5590         struct mlx5_priv *priv = dev->data->dev_private;
5591         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5592         struct rte_flow_action *sfx_actions = NULL;
5593         struct rte_flow_action *pre_actions = NULL;
5594         struct rte_flow_item *sfx_items = NULL;
5595         struct mlx5_flow *dev_flow = NULL;
5596         struct rte_flow_attr sfx_attr = *attr;
5597         struct mlx5_flow_meter_info *fm = NULL;
5598         uint8_t skip_scale_restore;
5599         bool has_mtr = false;
5600         bool has_modify = false;
5601         bool set_mtr_reg = true;
5602         uint32_t meter_id = 0;
5603         uint32_t mtr_idx = 0;
5604         uint32_t mtr_flow_id = 0;
5605         size_t act_size;
5606         size_t item_size;
5607         int actions_n = 0;
5608         int ret = 0;
5609
5610         if (priv->mtr_en)
5611                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5612                                                     &has_modify, &meter_id);
5613         if (has_mtr) {
5614                 if (flow->meter) {
5615                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5616                         if (!fm)
5617                                 return rte_flow_error_set(error, EINVAL,
5618                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5619                                                 NULL, "Meter not found.");
5620                 } else {
5621                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5622                         if (!fm)
5623                                 return rte_flow_error_set(error, EINVAL,
5624                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5625                                                 NULL, "Meter not found.");
5626                         ret = mlx5_flow_meter_attach(priv, fm,
5627                                                      &sfx_attr, error);
5628                         if (ret)
5629                                 return -rte_errno;
5630                         flow->meter = mtr_idx;
5631                 }
5632                 MLX5_ASSERT(wks);
5633                 wks->fm = fm;
5634                 /*
5635                  * If it isn't default-policy Meter, and
5636                  * 1. There's no action in flow to change
5637                  *    packet (modify/encap/decap etc.), OR
5638                  * 2. No drop count needed for this meter.
5639                  * no need to use regC to save meter id anymore.
5640                  */
5641                 if (!fm->def_policy && (!has_modify || !fm->drop_cnt))
5642                         set_mtr_reg = false;
5643                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5644                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5645                            sizeof(struct mlx5_rte_flow_action_set_tag);
5646                 /* Suffix items: tag, vlan, port id, end. */
5647 #define METER_SUFFIX_ITEM 4
5648                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5649                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5650                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5651                                           0, SOCKET_ID_ANY);
5652                 if (!sfx_actions)
5653                         return rte_flow_error_set(error, ENOMEM,
5654                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5655                                                   NULL, "no memory to split "
5656                                                   "meter flow");
5657                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5658                              act_size);
5659                 /* There's no suffix flow for meter of non-default policy. */
5660                 if (!fm->def_policy)
5661                         pre_actions = sfx_actions + 1;
5662                 else
5663                         pre_actions = sfx_actions + actions_n;
5664                 ret = flow_meter_split_prep(dev, flow, fm, &sfx_attr,
5665                                             items, sfx_items, actions,
5666                                             sfx_actions, pre_actions,
5667                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5668                                             error);
5669                 if (ret) {
5670                         ret = -rte_errno;
5671                         goto exit;
5672                 }
5673                 /* Add the prefix subflow. */
5674                 flow_split_info->prefix_mark = 0;
5675                 skip_scale_restore = flow_split_info->skip_scale;
5676                 flow_split_info->skip_scale |=
5677                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5678                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5679                                               attr, items, pre_actions,
5680                                               flow_split_info, error);
5681                 flow_split_info->skip_scale = skip_scale_restore;
5682                 if (ret) {
5683                         if (mtr_flow_id)
5684                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
5685                         ret = -rte_errno;
5686                         goto exit;
5687                 }
5688                 if (mtr_flow_id) {
5689                         dev_flow->handle->split_flow_id = mtr_flow_id;
5690                         dev_flow->handle->is_meter_flow_id = 1;
5691                 }
5692                 if (!fm->def_policy) {
5693                         if (!set_mtr_reg && fm->drop_cnt)
5694                                 ret =
5695                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
5696                                                         &sfx_attr, items,
5697                                                         flow_split_info,
5698                                                         fm, error);
5699                         goto exit;
5700                 }
5701                 /* Setting the sfx group atrr. */
5702                 sfx_attr.group = sfx_attr.transfer ?
5703                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5704                                  MLX5_FLOW_TABLE_LEVEL_METER;
5705                 flow_split_info->prefix_layers =
5706                                 flow_get_prefix_layer_flags(dev_flow);
5707                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5708                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
5709         }
5710         /* Add the prefix subflow. */
5711         ret = flow_create_split_metadata(dev, flow,
5712                                          &sfx_attr, sfx_items ?
5713                                          sfx_items : items,
5714                                          sfx_actions ? sfx_actions : actions,
5715                                          flow_split_info, error);
5716 exit:
5717         if (sfx_actions)
5718                 mlx5_free(sfx_actions);
5719         return ret;
5720 }
5721
5722 /**
5723  * The splitting for sample feature.
5724  *
5725  * Once Sample action is detected in the action list, the flow actions should
5726  * be split into prefix sub flow and suffix sub flow.
5727  *
5728  * The original items remain in the prefix sub flow, all actions preceding the
5729  * sample action and the sample action itself will be copied to the prefix
5730  * sub flow, the actions following the sample action will be copied to the
5731  * suffix sub flow, Queue action always be located in the suffix sub flow.
5732  *
5733  * In order to make the packet from prefix sub flow matches with suffix sub
5734  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5735  * flow uses tag item with the unique flow id.
5736  *
5737  * @param dev
5738  *   Pointer to Ethernet device.
5739  * @param[in] flow
5740  *   Parent flow structure pointer.
5741  * @param[in] attr
5742  *   Flow rule attributes.
5743  * @param[in] items
5744  *   Pattern specification (list terminated by the END pattern item).
5745  * @param[in] actions
5746  *   Associated actions (list terminated by the END action).
5747  * @param[in] flow_split_info
5748  *   Pointer to flow split info structure.
5749  * @param[out] error
5750  *   Perform verbose error reporting if not NULL.
5751  * @return
5752  *   0 on success, negative value otherwise
5753  */
5754 static int
5755 flow_create_split_sample(struct rte_eth_dev *dev,
5756                          struct rte_flow *flow,
5757                          const struct rte_flow_attr *attr,
5758                          const struct rte_flow_item items[],
5759                          const struct rte_flow_action actions[],
5760                          struct mlx5_flow_split_info *flow_split_info,
5761                          struct rte_flow_error *error)
5762 {
5763         struct mlx5_priv *priv = dev->data->dev_private;
5764         struct rte_flow_action *sfx_actions = NULL;
5765         struct rte_flow_action *pre_actions = NULL;
5766         struct rte_flow_item *sfx_items = NULL;
5767         struct mlx5_flow *dev_flow = NULL;
5768         struct rte_flow_attr sfx_attr = *attr;
5769 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5770         struct mlx5_flow_dv_sample_resource *sample_res;
5771         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5772         struct mlx5_flow_tbl_resource *sfx_tbl;
5773 #endif
5774         size_t act_size;
5775         size_t item_size;
5776         uint32_t fdb_tx = 0;
5777         int32_t tag_id = 0;
5778         int actions_n = 0;
5779         int sample_action_pos;
5780         int qrss_action_pos;
5781         int add_tag = 0;
5782         int modify_after_mirror = 0;
5783         uint16_t jump_table = 0;
5784         const uint32_t next_ft_step = 1;
5785         int ret = 0;
5786
5787         if (priv->sampler_en)
5788                 actions_n = flow_check_match_action(actions, attr,
5789                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5790                                         &sample_action_pos, &qrss_action_pos,
5791                                         &modify_after_mirror);
5792         if (actions_n) {
5793                 /* The prefix actions must includes sample, tag, end. */
5794                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5795                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5796                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5797                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5798                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5799                                           item_size), 0, SOCKET_ID_ANY);
5800                 if (!sfx_actions)
5801                         return rte_flow_error_set(error, ENOMEM,
5802                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5803                                                   NULL, "no memory to split "
5804                                                   "sample flow");
5805                 /* The representor_id is -1 for uplink. */
5806                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5807                 /*
5808                  * When reg_c_preserve is set, metadata registers Cx preserve
5809                  * their value even through packet duplication.
5810                  */
5811                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
5812                 if (add_tag)
5813                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5814                                         + act_size);
5815                 if (modify_after_mirror)
5816                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
5817                                      next_ft_step;
5818                 pre_actions = sfx_actions + actions_n;
5819                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
5820                                                 actions, sfx_actions,
5821                                                 pre_actions, actions_n,
5822                                                 sample_action_pos,
5823                                                 qrss_action_pos, jump_table,
5824                                                 error);
5825                 if (tag_id < 0 || (add_tag && !tag_id)) {
5826                         ret = -rte_errno;
5827                         goto exit;
5828                 }
5829                 if (modify_after_mirror)
5830                         flow_split_info->skip_scale =
5831                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5832                 /* Add the prefix subflow. */
5833                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5834                                               items, pre_actions,
5835                                               flow_split_info, error);
5836                 if (ret) {
5837                         ret = -rte_errno;
5838                         goto exit;
5839                 }
5840                 dev_flow->handle->split_flow_id = tag_id;
5841 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5842                 if (!modify_after_mirror) {
5843                         /* Set the sfx group attr. */
5844                         sample_res = (struct mlx5_flow_dv_sample_resource *)
5845                                                 dev_flow->dv.sample_res;
5846                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
5847                                                 sample_res->normal_path_tbl;
5848                         sfx_tbl_data = container_of(sfx_tbl,
5849                                                 struct mlx5_flow_tbl_data_entry,
5850                                                 tbl);
5851                         sfx_attr.group = sfx_attr.transfer ?
5852                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
5853                 } else {
5854                         MLX5_ASSERT(attr->transfer);
5855                         sfx_attr.group = jump_table;
5856                 }
5857                 flow_split_info->prefix_layers =
5858                                 flow_get_prefix_layer_flags(dev_flow);
5859                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5860                 /* Suffix group level already be scaled with factor, set
5861                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
5862                  * again in translation.
5863                  */
5864                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5865 #endif
5866         }
5867         /* Add the suffix subflow. */
5868         ret = flow_create_split_meter(dev, flow, &sfx_attr,
5869                                       sfx_items ? sfx_items : items,
5870                                       sfx_actions ? sfx_actions : actions,
5871                                       flow_split_info, error);
5872 exit:
5873         if (sfx_actions)
5874                 mlx5_free(sfx_actions);
5875         return ret;
5876 }
5877
5878 /**
5879  * Split the flow to subflow set. The splitters might be linked
5880  * in the chain, like this:
5881  * flow_create_split_outer() calls:
5882  *   flow_create_split_meter() calls:
5883  *     flow_create_split_metadata(meter_subflow_0) calls:
5884  *       flow_create_split_inner(metadata_subflow_0)
5885  *       flow_create_split_inner(metadata_subflow_1)
5886  *       flow_create_split_inner(metadata_subflow_2)
5887  *     flow_create_split_metadata(meter_subflow_1) calls:
5888  *       flow_create_split_inner(metadata_subflow_0)
5889  *       flow_create_split_inner(metadata_subflow_1)
5890  *       flow_create_split_inner(metadata_subflow_2)
5891  *
5892  * This provide flexible way to add new levels of flow splitting.
5893  * The all of successfully created subflows are included to the
5894  * parent flow dev_flow list.
5895  *
5896  * @param dev
5897  *   Pointer to Ethernet device.
5898  * @param[in] flow
5899  *   Parent flow structure pointer.
5900  * @param[in] attr
5901  *   Flow rule attributes.
5902  * @param[in] items
5903  *   Pattern specification (list terminated by the END pattern item).
5904  * @param[in] actions
5905  *   Associated actions (list terminated by the END action).
5906  * @param[in] flow_split_info
5907  *   Pointer to flow split info structure.
5908  * @param[out] error
5909  *   Perform verbose error reporting if not NULL.
5910  * @return
5911  *   0 on success, negative value otherwise
5912  */
5913 static int
5914 flow_create_split_outer(struct rte_eth_dev *dev,
5915                         struct rte_flow *flow,
5916                         const struct rte_flow_attr *attr,
5917                         const struct rte_flow_item items[],
5918                         const struct rte_flow_action actions[],
5919                         struct mlx5_flow_split_info *flow_split_info,
5920                         struct rte_flow_error *error)
5921 {
5922         int ret;
5923
5924         ret = flow_create_split_sample(dev, flow, attr, items,
5925                                        actions, flow_split_info, error);
5926         MLX5_ASSERT(ret <= 0);
5927         return ret;
5928 }
5929
5930 static struct mlx5_flow_tunnel *
5931 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5932                       const struct rte_flow_attr *attr,
5933                       const struct rte_flow_item items[],
5934                       const struct rte_flow_action actions[])
5935 {
5936         struct mlx5_flow_tunnel *tunnel;
5937
5938 #pragma GCC diagnostic push
5939 #pragma GCC diagnostic ignored "-Wcast-qual"
5940         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5941                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5942         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5943                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5944         else
5945                 tunnel = NULL;
5946 #pragma GCC diagnostic pop
5947
5948         return tunnel;
5949 }
5950
5951 /**
5952  * Adjust flow RSS workspace if needed.
5953  *
5954  * @param wks
5955  *   Pointer to thread flow work space.
5956  * @param rss_desc
5957  *   Pointer to RSS descriptor.
5958  * @param[in] nrssq_num
5959  *   New RSS queue number.
5960  *
5961  * @return
5962  *   0 on success, -1 otherwise and rte_errno is set.
5963  */
5964 static int
5965 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5966                           struct mlx5_flow_rss_desc *rss_desc,
5967                           uint32_t nrssq_num)
5968 {
5969         if (likely(nrssq_num <= wks->rssq_num))
5970                 return 0;
5971         rss_desc->queue = realloc(rss_desc->queue,
5972                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
5973         if (!rss_desc->queue) {
5974                 rte_errno = ENOMEM;
5975                 return -1;
5976         }
5977         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
5978         return 0;
5979 }
5980
5981 /**
5982  * Create a flow and add it to @p list.
5983  *
5984  * @param dev
5985  *   Pointer to Ethernet device.
5986  * @param list
5987  *   Pointer to a TAILQ flow list. If this parameter NULL,
5988  *   no list insertion occurred, flow is just created,
5989  *   this is caller's responsibility to track the
5990  *   created flow.
5991  * @param[in] attr
5992  *   Flow rule attributes.
5993  * @param[in] items
5994  *   Pattern specification (list terminated by the END pattern item).
5995  * @param[in] actions
5996  *   Associated actions (list terminated by the END action).
5997  * @param[in] external
5998  *   This flow rule is created by request external to PMD.
5999  * @param[out] error
6000  *   Perform verbose error reporting if not NULL.
6001  *
6002  * @return
6003  *   A flow index on success, 0 otherwise and rte_errno is set.
6004  */
6005 static uint32_t
6006 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
6007                  const struct rte_flow_attr *attr,
6008                  const struct rte_flow_item items[],
6009                  const struct rte_flow_action original_actions[],
6010                  bool external, struct rte_flow_error *error)
6011 {
6012         struct mlx5_priv *priv = dev->data->dev_private;
6013         struct rte_flow *flow = NULL;
6014         struct mlx5_flow *dev_flow;
6015         const struct rte_flow_action_rss *rss = NULL;
6016         struct mlx5_translated_action_handle
6017                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6018         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6019         union {
6020                 struct mlx5_flow_expand_rss buf;
6021                 uint8_t buffer[2048];
6022         } expand_buffer;
6023         union {
6024                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6025                 uint8_t buffer[2048];
6026         } actions_rx;
6027         union {
6028                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6029                 uint8_t buffer[2048];
6030         } actions_hairpin_tx;
6031         union {
6032                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6033                 uint8_t buffer[2048];
6034         } items_tx;
6035         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6036         struct mlx5_flow_rss_desc *rss_desc;
6037         const struct rte_flow_action *p_actions_rx;
6038         uint32_t i;
6039         uint32_t idx = 0;
6040         int hairpin_flow;
6041         struct rte_flow_attr attr_tx = { .priority = 0 };
6042         const struct rte_flow_action *actions;
6043         struct rte_flow_action *translated_actions = NULL;
6044         struct mlx5_flow_tunnel *tunnel;
6045         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6046         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6047         struct mlx5_flow_split_info flow_split_info = {
6048                 .external = !!external,
6049                 .skip_scale = 0,
6050                 .flow_idx = 0,
6051                 .prefix_mark = 0,
6052                 .prefix_layers = 0,
6053                 .table_id = 0
6054         };
6055         int ret;
6056
6057         MLX5_ASSERT(wks);
6058         rss_desc = &wks->rss_desc;
6059         ret = flow_action_handles_translate(dev, original_actions,
6060                                             indir_actions,
6061                                             &indir_actions_n,
6062                                             &translated_actions, error);
6063         if (ret < 0) {
6064                 MLX5_ASSERT(translated_actions == NULL);
6065                 return 0;
6066         }
6067         actions = translated_actions ? translated_actions : original_actions;
6068         p_actions_rx = actions;
6069         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6070         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6071                                 external, hairpin_flow, error);
6072         if (ret < 0)
6073                 goto error_before_hairpin_split;
6074         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
6075         if (!flow) {
6076                 rte_errno = ENOMEM;
6077                 goto error_before_hairpin_split;
6078         }
6079         if (hairpin_flow > 0) {
6080                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6081                         rte_errno = EINVAL;
6082                         goto error_before_hairpin_split;
6083                 }
6084                 flow_hairpin_split(dev, actions, actions_rx.actions,
6085                                    actions_hairpin_tx.actions, items_tx.items,
6086                                    idx);
6087                 p_actions_rx = actions_rx.actions;
6088         }
6089         flow_split_info.flow_idx = idx;
6090         flow->drv_type = flow_get_drv_type(dev, attr);
6091         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6092                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6093         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6094         /* RSS Action only works on NIC RX domain */
6095         if (attr->ingress && !attr->transfer)
6096                 rss = flow_get_rss_action(dev, p_actions_rx);
6097         if (rss) {
6098                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6099                         return 0;
6100                 /*
6101                  * The following information is required by
6102                  * mlx5_flow_hashfields_adjust() in advance.
6103                  */
6104                 rss_desc->level = rss->level;
6105                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6106                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6107         }
6108         flow->dev_handles = 0;
6109         if (rss && rss->types) {
6110                 unsigned int graph_root;
6111
6112                 graph_root = find_graph_root(items, rss->level);
6113                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6114                                            items, rss->types,
6115                                            mlx5_support_expansion, graph_root);
6116                 MLX5_ASSERT(ret > 0 &&
6117                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6118         } else {
6119                 buf->entries = 1;
6120                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6121         }
6122         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6123                                                       indir_actions_n);
6124         for (i = 0; i < buf->entries; ++i) {
6125                 /* Initialize flow split data. */
6126                 flow_split_info.prefix_layers = 0;
6127                 flow_split_info.prefix_mark = 0;
6128                 flow_split_info.skip_scale = 0;
6129                 /*
6130                  * The splitter may create multiple dev_flows,
6131                  * depending on configuration. In the simplest
6132                  * case it just creates unmodified original flow.
6133                  */
6134                 ret = flow_create_split_outer(dev, flow, attr,
6135                                               buf->entry[i].pattern,
6136                                               p_actions_rx, &flow_split_info,
6137                                               error);
6138                 if (ret < 0)
6139                         goto error;
6140                 if (is_flow_tunnel_steer_rule(dev, attr,
6141                                               buf->entry[i].pattern,
6142                                               p_actions_rx)) {
6143                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6144                                                            p_actions_rx,
6145                                                            idx,
6146                                                            &default_miss_ctx,
6147                                                            error);
6148                         if (ret < 0) {
6149                                 mlx5_free(default_miss_ctx.queue);
6150                                 goto error;
6151                         }
6152                 }
6153         }
6154         /* Create the tx flow. */
6155         if (hairpin_flow) {
6156                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6157                 attr_tx.ingress = 0;
6158                 attr_tx.egress = 1;
6159                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6160                                          actions_hairpin_tx.actions,
6161                                          idx, error);
6162                 if (!dev_flow)
6163                         goto error;
6164                 dev_flow->flow = flow;
6165                 dev_flow->external = 0;
6166                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6167                               dev_flow->handle, next);
6168                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6169                                          items_tx.items,
6170                                          actions_hairpin_tx.actions, error);
6171                 if (ret < 0)
6172                         goto error;
6173         }
6174         /*
6175          * Update the metadata register copy table. If extensive
6176          * metadata feature is enabled and registers are supported
6177          * we might create the extra rte_flow for each unique
6178          * MARK/FLAG action ID.
6179          *
6180          * The table is updated for ingress Flows only, because
6181          * the egress Flows belong to the different device and
6182          * copy table should be updated in peer NIC Rx domain.
6183          */
6184         if (attr->ingress &&
6185             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6186                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6187                 if (ret)
6188                         goto error;
6189         }
6190         /*
6191          * If the flow is external (from application) OR device is started,
6192          * OR mreg discover, then apply immediately.
6193          */
6194         if (external || dev->data->dev_started ||
6195             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6196              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6197                 ret = flow_drv_apply(dev, flow, error);
6198                 if (ret < 0)
6199                         goto error;
6200         }
6201         if (list) {
6202                 rte_spinlock_lock(&priv->flow_list_lock);
6203                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
6204                              flow, next);
6205                 rte_spinlock_unlock(&priv->flow_list_lock);
6206         }
6207         flow_rxq_flags_set(dev, flow);
6208         rte_free(translated_actions);
6209         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
6210         if (tunnel) {
6211                 flow->tunnel = 1;
6212                 flow->tunnel_id = tunnel->tunnel_id;
6213                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6214                 mlx5_free(default_miss_ctx.queue);
6215         }
6216         mlx5_flow_pop_thread_workspace();
6217         return idx;
6218 error:
6219         MLX5_ASSERT(flow);
6220         ret = rte_errno; /* Save rte_errno before cleanup. */
6221         flow_mreg_del_copy_action(dev, flow);
6222         flow_drv_destroy(dev, flow);
6223         if (rss_desc->shared_rss)
6224                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6225                         mlx5_ipool_get
6226                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6227                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6228         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
6229         rte_errno = ret; /* Restore rte_errno. */
6230         ret = rte_errno;
6231         rte_errno = ret;
6232         mlx5_flow_pop_thread_workspace();
6233 error_before_hairpin_split:
6234         rte_free(translated_actions);
6235         return 0;
6236 }
6237
6238 /**
6239  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6240  * incoming packets to table 1.
6241  *
6242  * Other flow rules, requested for group n, will be created in
6243  * e-switch table n+1.
6244  * Jump action to e-switch group n will be created to group n+1.
6245  *
6246  * Used when working in switchdev mode, to utilise advantages of table 1
6247  * and above.
6248  *
6249  * @param dev
6250  *   Pointer to Ethernet device.
6251  *
6252  * @return
6253  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6254  */
6255 struct rte_flow *
6256 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6257 {
6258         const struct rte_flow_attr attr = {
6259                 .group = 0,
6260                 .priority = 0,
6261                 .ingress = 1,
6262                 .egress = 0,
6263                 .transfer = 1,
6264         };
6265         const struct rte_flow_item pattern = {
6266                 .type = RTE_FLOW_ITEM_TYPE_END,
6267         };
6268         struct rte_flow_action_jump jump = {
6269                 .group = 1,
6270         };
6271         const struct rte_flow_action actions[] = {
6272                 {
6273                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6274                         .conf = &jump,
6275                 },
6276                 {
6277                         .type = RTE_FLOW_ACTION_TYPE_END,
6278                 },
6279         };
6280         struct mlx5_priv *priv = dev->data->dev_private;
6281         struct rte_flow_error error;
6282
6283         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
6284                                                    &attr, &pattern,
6285                                                    actions, false, &error);
6286 }
6287
6288 /**
6289  * Validate a flow supported by the NIC.
6290  *
6291  * @see rte_flow_validate()
6292  * @see rte_flow_ops
6293  */
6294 int
6295 mlx5_flow_validate(struct rte_eth_dev *dev,
6296                    const struct rte_flow_attr *attr,
6297                    const struct rte_flow_item items[],
6298                    const struct rte_flow_action original_actions[],
6299                    struct rte_flow_error *error)
6300 {
6301         int hairpin_flow;
6302         struct mlx5_translated_action_handle
6303                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6304         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6305         const struct rte_flow_action *actions;
6306         struct rte_flow_action *translated_actions = NULL;
6307         int ret = flow_action_handles_translate(dev, original_actions,
6308                                                 indir_actions,
6309                                                 &indir_actions_n,
6310                                                 &translated_actions, error);
6311
6312         if (ret)
6313                 return ret;
6314         actions = translated_actions ? translated_actions : original_actions;
6315         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6316         ret = flow_drv_validate(dev, attr, items, actions,
6317                                 true, hairpin_flow, error);
6318         rte_free(translated_actions);
6319         return ret;
6320 }
6321
6322 /**
6323  * Create a flow.
6324  *
6325  * @see rte_flow_create()
6326  * @see rte_flow_ops
6327  */
6328 struct rte_flow *
6329 mlx5_flow_create(struct rte_eth_dev *dev,
6330                  const struct rte_flow_attr *attr,
6331                  const struct rte_flow_item items[],
6332                  const struct rte_flow_action actions[],
6333                  struct rte_flow_error *error)
6334 {
6335         struct mlx5_priv *priv = dev->data->dev_private;
6336
6337         /*
6338          * If the device is not started yet, it is not allowed to created a
6339          * flow from application. PMD default flows and traffic control flows
6340          * are not affected.
6341          */
6342         if (unlikely(!dev->data->dev_started)) {
6343                 DRV_LOG(DEBUG, "port %u is not started when "
6344                         "inserting a flow", dev->data->port_id);
6345                 rte_flow_error_set(error, ENODEV,
6346                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6347                                    NULL,
6348                                    "port not started");
6349                 return NULL;
6350         }
6351
6352         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
6353                                   attr, items, actions, true, error);
6354 }
6355
6356 /**
6357  * Destroy a flow in a list.
6358  *
6359  * @param dev
6360  *   Pointer to Ethernet device.
6361  * @param list
6362  *   Pointer to the Indexed flow list. If this parameter NULL,
6363  *   there is no flow removal from the list. Be noted that as
6364  *   flow is add to the indexed list, memory of the indexed
6365  *   list points to maybe changed as flow destroyed.
6366  * @param[in] flow_idx
6367  *   Index of flow to destroy.
6368  */
6369 static void
6370 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
6371                   uint32_t flow_idx)
6372 {
6373         struct mlx5_priv *priv = dev->data->dev_private;
6374         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6375                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
6376
6377         if (!flow)
6378                 return;
6379         /*
6380          * Update RX queue flags only if port is started, otherwise it is
6381          * already clean.
6382          */
6383         if (dev->data->dev_started)
6384                 flow_rxq_flags_trim(dev, flow);
6385         flow_drv_destroy(dev, flow);
6386         if (list) {
6387                 rte_spinlock_lock(&priv->flow_list_lock);
6388                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
6389                              flow_idx, flow, next);
6390                 rte_spinlock_unlock(&priv->flow_list_lock);
6391         }
6392         if (flow->tunnel) {
6393                 struct mlx5_flow_tunnel *tunnel;
6394
6395                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6396                 RTE_VERIFY(tunnel);
6397                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6398                         mlx5_flow_tunnel_free(dev, tunnel);
6399         }
6400         flow_mreg_del_copy_action(dev, flow);
6401         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
6402 }
6403
6404 /**
6405  * Destroy all flows.
6406  *
6407  * @param dev
6408  *   Pointer to Ethernet device.
6409  * @param list
6410  *   Pointer to the Indexed flow list.
6411  * @param active
6412  *   If flushing is called avtively.
6413  */
6414 void
6415 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
6416 {
6417         uint32_t num_flushed = 0;
6418
6419         while (*list) {
6420                 flow_list_destroy(dev, list, *list);
6421                 num_flushed++;
6422         }
6423         if (active) {
6424                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6425                         dev->data->port_id, num_flushed);
6426         }
6427 }
6428
6429 /**
6430  * Stop all default actions for flows.
6431  *
6432  * @param dev
6433  *   Pointer to Ethernet device.
6434  */
6435 void
6436 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6437 {
6438         flow_mreg_del_default_copy_action(dev);
6439         flow_rxq_flags_clear(dev);
6440 }
6441
6442 /**
6443  * Start all default actions for flows.
6444  *
6445  * @param dev
6446  *   Pointer to Ethernet device.
6447  * @return
6448  *   0 on success, a negative errno value otherwise and rte_errno is set.
6449  */
6450 int
6451 mlx5_flow_start_default(struct rte_eth_dev *dev)
6452 {
6453         struct rte_flow_error error;
6454
6455         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6456         return flow_mreg_add_default_copy_action(dev, &error);
6457 }
6458
6459 /**
6460  * Release key of thread specific flow workspace data.
6461  */
6462 void
6463 flow_release_workspace(void *data)
6464 {
6465         struct mlx5_flow_workspace *wks = data;
6466         struct mlx5_flow_workspace *next;
6467
6468         while (wks) {
6469                 next = wks->next;
6470                 free(wks->rss_desc.queue);
6471                 free(wks);
6472                 wks = next;
6473         }
6474 }
6475
6476 /**
6477  * Get thread specific current flow workspace.
6478  *
6479  * @return pointer to thread specific flow workspace data, NULL on error.
6480  */
6481 struct mlx5_flow_workspace*
6482 mlx5_flow_get_thread_workspace(void)
6483 {
6484         struct mlx5_flow_workspace *data;
6485
6486         data = mlx5_flow_os_get_specific_workspace();
6487         MLX5_ASSERT(data && data->inuse);
6488         if (!data || !data->inuse)
6489                 DRV_LOG(ERR, "flow workspace not initialized.");
6490         return data;
6491 }
6492
6493 /**
6494  * Allocate and init new flow workspace.
6495  *
6496  * @return pointer to flow workspace data, NULL on error.
6497  */
6498 static struct mlx5_flow_workspace*
6499 flow_alloc_thread_workspace(void)
6500 {
6501         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6502
6503         if (!data) {
6504                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6505                         "memory.");
6506                 return NULL;
6507         }
6508         data->rss_desc.queue = calloc(1,
6509                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6510         if (!data->rss_desc.queue)
6511                 goto err;
6512         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6513         return data;
6514 err:
6515         if (data->rss_desc.queue)
6516                 free(data->rss_desc.queue);
6517         free(data);
6518         return NULL;
6519 }
6520
6521 /**
6522  * Get new thread specific flow workspace.
6523  *
6524  * If current workspace inuse, create new one and set as current.
6525  *
6526  * @return pointer to thread specific flow workspace data, NULL on error.
6527  */
6528 static struct mlx5_flow_workspace*
6529 mlx5_flow_push_thread_workspace(void)
6530 {
6531         struct mlx5_flow_workspace *curr;
6532         struct mlx5_flow_workspace *data;
6533
6534         curr = mlx5_flow_os_get_specific_workspace();
6535         if (!curr) {
6536                 data = flow_alloc_thread_workspace();
6537                 if (!data)
6538                         return NULL;
6539         } else if (!curr->inuse) {
6540                 data = curr;
6541         } else if (curr->next) {
6542                 data = curr->next;
6543         } else {
6544                 data = flow_alloc_thread_workspace();
6545                 if (!data)
6546                         return NULL;
6547                 curr->next = data;
6548                 data->prev = curr;
6549         }
6550         data->inuse = 1;
6551         data->flow_idx = 0;
6552         /* Set as current workspace */
6553         if (mlx5_flow_os_set_specific_workspace(data))
6554                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6555         return data;
6556 }
6557
6558 /**
6559  * Close current thread specific flow workspace.
6560  *
6561  * If previous workspace available, set it as current.
6562  *
6563  * @return pointer to thread specific flow workspace data, NULL on error.
6564  */
6565 static void
6566 mlx5_flow_pop_thread_workspace(void)
6567 {
6568         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6569
6570         if (!data)
6571                 return;
6572         if (!data->inuse) {
6573                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6574                 return;
6575         }
6576         data->inuse = 0;
6577         if (!data->prev)
6578                 return;
6579         if (mlx5_flow_os_set_specific_workspace(data->prev))
6580                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6581 }
6582
6583 /**
6584  * Verify the flow list is empty
6585  *
6586  * @param dev
6587  *  Pointer to Ethernet device.
6588  *
6589  * @return the number of flows not released.
6590  */
6591 int
6592 mlx5_flow_verify(struct rte_eth_dev *dev)
6593 {
6594         struct mlx5_priv *priv = dev->data->dev_private;
6595         struct rte_flow *flow;
6596         uint32_t idx;
6597         int ret = 0;
6598
6599         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6600                       flow, next) {
6601                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6602                         dev->data->port_id, (void *)flow);
6603                 ++ret;
6604         }
6605         return ret;
6606 }
6607
6608 /**
6609  * Enable default hairpin egress flow.
6610  *
6611  * @param dev
6612  *   Pointer to Ethernet device.
6613  * @param queue
6614  *   The queue index.
6615  *
6616  * @return
6617  *   0 on success, a negative errno value otherwise and rte_errno is set.
6618  */
6619 int
6620 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6621                             uint32_t queue)
6622 {
6623         struct mlx5_priv *priv = dev->data->dev_private;
6624         const struct rte_flow_attr attr = {
6625                 .egress = 1,
6626                 .priority = 0,
6627         };
6628         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6629                 .queue = queue,
6630         };
6631         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6632                 .queue = UINT32_MAX,
6633         };
6634         struct rte_flow_item items[] = {
6635                 {
6636                         .type = (enum rte_flow_item_type)
6637                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6638                         .spec = &queue_spec,
6639                         .last = NULL,
6640                         .mask = &queue_mask,
6641                 },
6642                 {
6643                         .type = RTE_FLOW_ITEM_TYPE_END,
6644                 },
6645         };
6646         struct rte_flow_action_jump jump = {
6647                 .group = MLX5_HAIRPIN_TX_TABLE,
6648         };
6649         struct rte_flow_action actions[2];
6650         uint32_t flow_idx;
6651         struct rte_flow_error error;
6652
6653         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6654         actions[0].conf = &jump;
6655         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6656         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6657                                 &attr, items, actions, false, &error);
6658         if (!flow_idx) {
6659                 DRV_LOG(DEBUG,
6660                         "Failed to create ctrl flow: rte_errno(%d),"
6661                         " type(%d), message(%s)",
6662                         rte_errno, error.type,
6663                         error.message ? error.message : " (no stated reason)");
6664                 return -rte_errno;
6665         }
6666         return 0;
6667 }
6668
6669 /**
6670  * Enable a control flow configured from the control plane.
6671  *
6672  * @param dev
6673  *   Pointer to Ethernet device.
6674  * @param eth_spec
6675  *   An Ethernet flow spec to apply.
6676  * @param eth_mask
6677  *   An Ethernet flow mask to apply.
6678  * @param vlan_spec
6679  *   A VLAN flow spec to apply.
6680  * @param vlan_mask
6681  *   A VLAN flow mask to apply.
6682  *
6683  * @return
6684  *   0 on success, a negative errno value otherwise and rte_errno is set.
6685  */
6686 int
6687 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6688                     struct rte_flow_item_eth *eth_spec,
6689                     struct rte_flow_item_eth *eth_mask,
6690                     struct rte_flow_item_vlan *vlan_spec,
6691                     struct rte_flow_item_vlan *vlan_mask)
6692 {
6693         struct mlx5_priv *priv = dev->data->dev_private;
6694         const struct rte_flow_attr attr = {
6695                 .ingress = 1,
6696                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6697         };
6698         struct rte_flow_item items[] = {
6699                 {
6700                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6701                         .spec = eth_spec,
6702                         .last = NULL,
6703                         .mask = eth_mask,
6704                 },
6705                 {
6706                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6707                                               RTE_FLOW_ITEM_TYPE_END,
6708                         .spec = vlan_spec,
6709                         .last = NULL,
6710                         .mask = vlan_mask,
6711                 },
6712                 {
6713                         .type = RTE_FLOW_ITEM_TYPE_END,
6714                 },
6715         };
6716         uint16_t queue[priv->reta_idx_n];
6717         struct rte_flow_action_rss action_rss = {
6718                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6719                 .level = 0,
6720                 .types = priv->rss_conf.rss_hf,
6721                 .key_len = priv->rss_conf.rss_key_len,
6722                 .queue_num = priv->reta_idx_n,
6723                 .key = priv->rss_conf.rss_key,
6724                 .queue = queue,
6725         };
6726         struct rte_flow_action actions[] = {
6727                 {
6728                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6729                         .conf = &action_rss,
6730                 },
6731                 {
6732                         .type = RTE_FLOW_ACTION_TYPE_END,
6733                 },
6734         };
6735         uint32_t flow_idx;
6736         struct rte_flow_error error;
6737         unsigned int i;
6738
6739         if (!priv->reta_idx_n || !priv->rxqs_n) {
6740                 return 0;
6741         }
6742         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6743                 action_rss.types = 0;
6744         for (i = 0; i != priv->reta_idx_n; ++i)
6745                 queue[i] = (*priv->reta_idx)[i];
6746         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6747                                 &attr, items, actions, false, &error);
6748         if (!flow_idx)
6749                 return -rte_errno;
6750         return 0;
6751 }
6752
6753 /**
6754  * Enable a flow control configured from the control plane.
6755  *
6756  * @param dev
6757  *   Pointer to Ethernet device.
6758  * @param eth_spec
6759  *   An Ethernet flow spec to apply.
6760  * @param eth_mask
6761  *   An Ethernet flow mask to apply.
6762  *
6763  * @return
6764  *   0 on success, a negative errno value otherwise and rte_errno is set.
6765  */
6766 int
6767 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6768                struct rte_flow_item_eth *eth_spec,
6769                struct rte_flow_item_eth *eth_mask)
6770 {
6771         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6772 }
6773
6774 /**
6775  * Create default miss flow rule matching lacp traffic
6776  *
6777  * @param dev
6778  *   Pointer to Ethernet device.
6779  * @param eth_spec
6780  *   An Ethernet flow spec to apply.
6781  *
6782  * @return
6783  *   0 on success, a negative errno value otherwise and rte_errno is set.
6784  */
6785 int
6786 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6787 {
6788         struct mlx5_priv *priv = dev->data->dev_private;
6789         /*
6790          * The LACP matching is done by only using ether type since using
6791          * a multicast dst mac causes kernel to give low priority to this flow.
6792          */
6793         static const struct rte_flow_item_eth lacp_spec = {
6794                 .type = RTE_BE16(0x8809),
6795         };
6796         static const struct rte_flow_item_eth lacp_mask = {
6797                 .type = 0xffff,
6798         };
6799         const struct rte_flow_attr attr = {
6800                 .ingress = 1,
6801         };
6802         struct rte_flow_item items[] = {
6803                 {
6804                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6805                         .spec = &lacp_spec,
6806                         .mask = &lacp_mask,
6807                 },
6808                 {
6809                         .type = RTE_FLOW_ITEM_TYPE_END,
6810                 },
6811         };
6812         struct rte_flow_action actions[] = {
6813                 {
6814                         .type = (enum rte_flow_action_type)
6815                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6816                 },
6817                 {
6818                         .type = RTE_FLOW_ACTION_TYPE_END,
6819                 },
6820         };
6821         struct rte_flow_error error;
6822         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6823                                 &attr, items, actions, false, &error);
6824
6825         if (!flow_idx)
6826                 return -rte_errno;
6827         return 0;
6828 }
6829
6830 /**
6831  * Destroy a flow.
6832  *
6833  * @see rte_flow_destroy()
6834  * @see rte_flow_ops
6835  */
6836 int
6837 mlx5_flow_destroy(struct rte_eth_dev *dev,
6838                   struct rte_flow *flow,
6839                   struct rte_flow_error *error __rte_unused)
6840 {
6841         struct mlx5_priv *priv = dev->data->dev_private;
6842
6843         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6844         return 0;
6845 }
6846
6847 /**
6848  * Destroy all flows.
6849  *
6850  * @see rte_flow_flush()
6851  * @see rte_flow_ops
6852  */
6853 int
6854 mlx5_flow_flush(struct rte_eth_dev *dev,
6855                 struct rte_flow_error *error __rte_unused)
6856 {
6857         struct mlx5_priv *priv = dev->data->dev_private;
6858
6859         mlx5_flow_list_flush(dev, &priv->flows, false);
6860         return 0;
6861 }
6862
6863 /**
6864  * Isolated mode.
6865  *
6866  * @see rte_flow_isolate()
6867  * @see rte_flow_ops
6868  */
6869 int
6870 mlx5_flow_isolate(struct rte_eth_dev *dev,
6871                   int enable,
6872                   struct rte_flow_error *error)
6873 {
6874         struct mlx5_priv *priv = dev->data->dev_private;
6875
6876         if (dev->data->dev_started) {
6877                 rte_flow_error_set(error, EBUSY,
6878                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6879                                    NULL,
6880                                    "port must be stopped first");
6881                 return -rte_errno;
6882         }
6883         priv->isolated = !!enable;
6884         if (enable)
6885                 dev->dev_ops = &mlx5_dev_ops_isolate;
6886         else
6887                 dev->dev_ops = &mlx5_dev_ops;
6888
6889         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6890         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6891
6892         return 0;
6893 }
6894
6895 /**
6896  * Query a flow.
6897  *
6898  * @see rte_flow_query()
6899  * @see rte_flow_ops
6900  */
6901 static int
6902 flow_drv_query(struct rte_eth_dev *dev,
6903                uint32_t flow_idx,
6904                const struct rte_flow_action *actions,
6905                void *data,
6906                struct rte_flow_error *error)
6907 {
6908         struct mlx5_priv *priv = dev->data->dev_private;
6909         const struct mlx5_flow_driver_ops *fops;
6910         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6911                                                [MLX5_IPOOL_RTE_FLOW],
6912                                                flow_idx);
6913         enum mlx5_flow_drv_type ftype;
6914
6915         if (!flow) {
6916                 return rte_flow_error_set(error, ENOENT,
6917                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6918                           NULL,
6919                           "invalid flow handle");
6920         }
6921         ftype = flow->drv_type;
6922         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6923         fops = flow_get_drv_ops(ftype);
6924
6925         return fops->query(dev, flow, actions, data, error);
6926 }
6927
6928 /**
6929  * Query a flow.
6930  *
6931  * @see rte_flow_query()
6932  * @see rte_flow_ops
6933  */
6934 int
6935 mlx5_flow_query(struct rte_eth_dev *dev,
6936                 struct rte_flow *flow,
6937                 const struct rte_flow_action *actions,
6938                 void *data,
6939                 struct rte_flow_error *error)
6940 {
6941         int ret;
6942
6943         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6944                              error);
6945         if (ret < 0)
6946                 return ret;
6947         return 0;
6948 }
6949
6950 /**
6951  * Get rte_flow callbacks.
6952  *
6953  * @param dev
6954  *   Pointer to Ethernet device structure.
6955  * @param ops
6956  *   Pointer to operation-specific structure.
6957  *
6958  * @return 0
6959  */
6960 int
6961 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
6962                   const struct rte_flow_ops **ops)
6963 {
6964         *ops = &mlx5_flow_ops;
6965         return 0;
6966 }
6967
6968 /**
6969  * Validate meter policy actions.
6970  * Dispatcher for action type specific validation.
6971  *
6972  * @param[in] dev
6973  *   Pointer to the Ethernet device structure.
6974  * @param[in] action
6975  *   The meter policy action object to validate.
6976  * @param[in] attr
6977  *   Attributes of flow to determine steering domain.
6978  * @param[out] is_rss
6979  *   Is RSS or not.
6980  * @param[out] domain_bitmap
6981  *   Domain bitmap.
6982  * @param[out] is_def_policy
6983  *   Is default policy or not.
6984  * @param[out] error
6985  *   Perform verbose error reporting if not NULL. Initialized in case of
6986  *   error only.
6987  *
6988  * @return
6989  *   0 on success, otherwise negative errno value.
6990  */
6991 int
6992 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
6993                         const struct rte_flow_action *actions[RTE_COLORS],
6994                         struct rte_flow_attr *attr,
6995                         bool *is_rss,
6996                         uint8_t *domain_bitmap,
6997                         bool *is_def_policy,
6998                         struct rte_mtr_error *error)
6999 {
7000         const struct mlx5_flow_driver_ops *fops;
7001
7002         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7003         return fops->validate_mtr_acts(dev, actions, attr,
7004                         is_rss, domain_bitmap, is_def_policy, error);
7005 }
7006
7007 /**
7008  * Destroy the meter table set.
7009  *
7010  * @param[in] dev
7011  *   Pointer to Ethernet device.
7012  * @param[in] mtr_policy
7013  *   Meter policy struct.
7014  */
7015 void
7016 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7017                       struct mlx5_flow_meter_policy *mtr_policy)
7018 {
7019         const struct mlx5_flow_driver_ops *fops;
7020
7021         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7022         fops->destroy_mtr_acts(dev, mtr_policy);
7023 }
7024
7025 /**
7026  * Create policy action, lock free,
7027  * (mutex should be acquired by caller).
7028  * Dispatcher for action type specific call.
7029  *
7030  * @param[in] dev
7031  *   Pointer to the Ethernet device structure.
7032  * @param[in] mtr_policy
7033  *   Meter policy struct.
7034  * @param[in] action
7035  *   Action specification used to create meter actions.
7036  * @param[out] error
7037  *   Perform verbose error reporting if not NULL. Initialized in case of
7038  *   error only.
7039  *
7040  * @return
7041  *   0 on success, otherwise negative errno value.
7042  */
7043 int
7044 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7045                       struct mlx5_flow_meter_policy *mtr_policy,
7046                       const struct rte_flow_action *actions[RTE_COLORS],
7047                       struct rte_mtr_error *error)
7048 {
7049         const struct mlx5_flow_driver_ops *fops;
7050
7051         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7052         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7053 }
7054
7055 /**
7056  * Create policy rules, lock free,
7057  * (mutex should be acquired by caller).
7058  * Dispatcher for action type specific call.
7059  *
7060  * @param[in] dev
7061  *   Pointer to the Ethernet device structure.
7062  * @param[in] mtr_policy
7063  *   Meter policy struct.
7064  *
7065  * @return
7066  *   0 on success, -1 otherwise.
7067  */
7068 int
7069 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7070                              struct mlx5_flow_meter_policy *mtr_policy)
7071 {
7072         const struct mlx5_flow_driver_ops *fops;
7073
7074         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7075         return fops->create_policy_rules(dev, mtr_policy);
7076 }
7077
7078 /**
7079  * Destroy policy rules, lock free,
7080  * (mutex should be acquired by caller).
7081  * Dispatcher for action type specific call.
7082  *
7083  * @param[in] dev
7084  *   Pointer to the Ethernet device structure.
7085  * @param[in] mtr_policy
7086  *   Meter policy struct.
7087  */
7088 void
7089 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7090                              struct mlx5_flow_meter_policy *mtr_policy)
7091 {
7092         const struct mlx5_flow_driver_ops *fops;
7093
7094         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7095         fops->destroy_policy_rules(dev, mtr_policy);
7096 }
7097
7098 /**
7099  * Destroy the default policy table set.
7100  *
7101  * @param[in] dev
7102  *   Pointer to Ethernet device.
7103  */
7104 void
7105 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7106 {
7107         const struct mlx5_flow_driver_ops *fops;
7108
7109         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7110         fops->destroy_def_policy(dev);
7111 }
7112
7113 /**
7114  * Destroy the default policy table set.
7115  *
7116  * @param[in] dev
7117  *   Pointer to Ethernet device.
7118  *
7119  * @return
7120  *   0 on success, -1 otherwise.
7121  */
7122 int
7123 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7124 {
7125         const struct mlx5_flow_driver_ops *fops;
7126
7127         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7128         return fops->create_def_policy(dev);
7129 }
7130
7131 /**
7132  * Create the needed meter and suffix tables.
7133  *
7134  * @param[in] dev
7135  *   Pointer to Ethernet device.
7136  *
7137  * @return
7138  *   0 on success, -1 otherwise.
7139  */
7140 int
7141 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7142                         struct mlx5_flow_meter_info *fm,
7143                         uint32_t mtr_idx,
7144                         uint8_t domain_bitmap)
7145 {
7146         const struct mlx5_flow_driver_ops *fops;
7147
7148         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7149         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7150 }
7151
7152 /**
7153  * Destroy the meter table set.
7154  *
7155  * @param[in] dev
7156  *   Pointer to Ethernet device.
7157  * @param[in] tbl
7158  *   Pointer to the meter table set.
7159  */
7160 void
7161 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7162                            struct mlx5_flow_meter_info *fm)
7163 {
7164         const struct mlx5_flow_driver_ops *fops;
7165
7166         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7167         fops->destroy_mtr_tbls(dev, fm);
7168 }
7169
7170 /**
7171  * Destroy the global meter drop table.
7172  *
7173  * @param[in] dev
7174  *   Pointer to Ethernet device.
7175  */
7176 void
7177 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7178 {
7179         const struct mlx5_flow_driver_ops *fops;
7180
7181         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7182         fops->destroy_mtr_drop_tbls(dev);
7183 }
7184
7185 /**
7186  * Allocate the needed aso flow meter id.
7187  *
7188  * @param[in] dev
7189  *   Pointer to Ethernet device.
7190  *
7191  * @return
7192  *   Index to aso flow meter on success, NULL otherwise.
7193  */
7194 uint32_t
7195 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7196 {
7197         const struct mlx5_flow_driver_ops *fops;
7198
7199         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7200         return fops->create_meter(dev);
7201 }
7202
7203 /**
7204  * Free the aso flow meter id.
7205  *
7206  * @param[in] dev
7207  *   Pointer to Ethernet device.
7208  * @param[in] mtr_idx
7209  *  Index to aso flow meter to be free.
7210  *
7211  * @return
7212  *   0 on success.
7213  */
7214 void
7215 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7216 {
7217         const struct mlx5_flow_driver_ops *fops;
7218
7219         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7220         fops->free_meter(dev, mtr_idx);
7221 }
7222
7223 /**
7224  * Allocate a counter.
7225  *
7226  * @param[in] dev
7227  *   Pointer to Ethernet device structure.
7228  *
7229  * @return
7230  *   Index to allocated counter  on success, 0 otherwise.
7231  */
7232 uint32_t
7233 mlx5_counter_alloc(struct rte_eth_dev *dev)
7234 {
7235         const struct mlx5_flow_driver_ops *fops;
7236         struct rte_flow_attr attr = { .transfer = 0 };
7237
7238         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7239                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7240                 return fops->counter_alloc(dev);
7241         }
7242         DRV_LOG(ERR,
7243                 "port %u counter allocate is not supported.",
7244                  dev->data->port_id);
7245         return 0;
7246 }
7247
7248 /**
7249  * Free a counter.
7250  *
7251  * @param[in] dev
7252  *   Pointer to Ethernet device structure.
7253  * @param[in] cnt
7254  *   Index to counter to be free.
7255  */
7256 void
7257 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7258 {
7259         const struct mlx5_flow_driver_ops *fops;
7260         struct rte_flow_attr attr = { .transfer = 0 };
7261
7262         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7263                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7264                 fops->counter_free(dev, cnt);
7265                 return;
7266         }
7267         DRV_LOG(ERR,
7268                 "port %u counter free is not supported.",
7269                  dev->data->port_id);
7270 }
7271
7272 /**
7273  * Query counter statistics.
7274  *
7275  * @param[in] dev
7276  *   Pointer to Ethernet device structure.
7277  * @param[in] cnt
7278  *   Index to counter to query.
7279  * @param[in] clear
7280  *   Set to clear counter statistics.
7281  * @param[out] pkts
7282  *   The counter hits packets number to save.
7283  * @param[out] bytes
7284  *   The counter hits bytes number to save.
7285  *
7286  * @return
7287  *   0 on success, a negative errno value otherwise.
7288  */
7289 int
7290 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7291                    bool clear, uint64_t *pkts, uint64_t *bytes)
7292 {
7293         const struct mlx5_flow_driver_ops *fops;
7294         struct rte_flow_attr attr = { .transfer = 0 };
7295
7296         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7297                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7298                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7299         }
7300         DRV_LOG(ERR,
7301                 "port %u counter query is not supported.",
7302                  dev->data->port_id);
7303         return -ENOTSUP;
7304 }
7305
7306 /**
7307  * Allocate a new memory for the counter values wrapped by all the needed
7308  * management.
7309  *
7310  * @param[in] sh
7311  *   Pointer to mlx5_dev_ctx_shared object.
7312  *
7313  * @return
7314  *   0 on success, a negative errno value otherwise.
7315  */
7316 static int
7317 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7318 {
7319         struct mlx5_devx_mkey_attr mkey_attr;
7320         struct mlx5_counter_stats_mem_mng *mem_mng;
7321         volatile struct flow_counter_stats *raw_data;
7322         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7323         int size = (sizeof(struct flow_counter_stats) *
7324                         MLX5_COUNTERS_PER_POOL +
7325                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7326                         sizeof(struct mlx5_counter_stats_mem_mng);
7327         size_t pgsize = rte_mem_page_size();
7328         uint8_t *mem;
7329         int i;
7330
7331         if (pgsize == (size_t)-1) {
7332                 DRV_LOG(ERR, "Failed to get mem page size");
7333                 rte_errno = ENOMEM;
7334                 return -ENOMEM;
7335         }
7336         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7337         if (!mem) {
7338                 rte_errno = ENOMEM;
7339                 return -ENOMEM;
7340         }
7341         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7342         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7343         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
7344                                                  IBV_ACCESS_LOCAL_WRITE);
7345         if (!mem_mng->umem) {
7346                 rte_errno = errno;
7347                 mlx5_free(mem);
7348                 return -rte_errno;
7349         }
7350         mkey_attr.addr = (uintptr_t)mem;
7351         mkey_attr.size = size;
7352         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7353         mkey_attr.pd = sh->pdn;
7354         mkey_attr.log_entity_size = 0;
7355         mkey_attr.pg_access = 0;
7356         mkey_attr.klm_array = NULL;
7357         mkey_attr.klm_num = 0;
7358         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7359         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7360         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7361         if (!mem_mng->dm) {
7362                 mlx5_os_umem_dereg(mem_mng->umem);
7363                 rte_errno = errno;
7364                 mlx5_free(mem);
7365                 return -rte_errno;
7366         }
7367         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7368         raw_data = (volatile struct flow_counter_stats *)mem;
7369         for (i = 0; i < raws_n; ++i) {
7370                 mem_mng->raws[i].mem_mng = mem_mng;
7371                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7372         }
7373         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7374                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7375                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7376                                  next);
7377         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7378         sh->cmng.mem_mng = mem_mng;
7379         return 0;
7380 }
7381
7382 /**
7383  * Set the statistic memory to the new counter pool.
7384  *
7385  * @param[in] sh
7386  *   Pointer to mlx5_dev_ctx_shared object.
7387  * @param[in] pool
7388  *   Pointer to the pool to set the statistic memory.
7389  *
7390  * @return
7391  *   0 on success, a negative errno value otherwise.
7392  */
7393 static int
7394 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7395                                struct mlx5_flow_counter_pool *pool)
7396 {
7397         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7398         /* Resize statistic memory once used out. */
7399         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7400             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7401                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7402                 return -1;
7403         }
7404         rte_spinlock_lock(&pool->sl);
7405         pool->raw = cmng->mem_mng->raws + pool->index %
7406                     MLX5_CNT_CONTAINER_RESIZE;
7407         rte_spinlock_unlock(&pool->sl);
7408         pool->raw_hw = NULL;
7409         return 0;
7410 }
7411
7412 #define MLX5_POOL_QUERY_FREQ_US 1000000
7413
7414 /**
7415  * Set the periodic procedure for triggering asynchronous batch queries for all
7416  * the counter pools.
7417  *
7418  * @param[in] sh
7419  *   Pointer to mlx5_dev_ctx_shared object.
7420  */
7421 void
7422 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7423 {
7424         uint32_t pools_n, us;
7425
7426         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7427         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7428         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7429         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7430                 sh->cmng.query_thread_on = 0;
7431                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7432         } else {
7433                 sh->cmng.query_thread_on = 1;
7434         }
7435 }
7436
7437 /**
7438  * The periodic procedure for triggering asynchronous batch queries for all the
7439  * counter pools. This function is probably called by the host thread.
7440  *
7441  * @param[in] arg
7442  *   The parameter for the alarm process.
7443  */
7444 void
7445 mlx5_flow_query_alarm(void *arg)
7446 {
7447         struct mlx5_dev_ctx_shared *sh = arg;
7448         int ret;
7449         uint16_t pool_index = sh->cmng.pool_index;
7450         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7451         struct mlx5_flow_counter_pool *pool;
7452         uint16_t n_valid;
7453
7454         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7455                 goto set_alarm;
7456         rte_spinlock_lock(&cmng->pool_update_sl);
7457         pool = cmng->pools[pool_index];
7458         n_valid = cmng->n_valid;
7459         rte_spinlock_unlock(&cmng->pool_update_sl);
7460         /* Set the statistic memory to the new created pool. */
7461         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7462                 goto set_alarm;
7463         if (pool->raw_hw)
7464                 /* There is a pool query in progress. */
7465                 goto set_alarm;
7466         pool->raw_hw =
7467                 LIST_FIRST(&sh->cmng.free_stat_raws);
7468         if (!pool->raw_hw)
7469                 /* No free counter statistics raw memory. */
7470                 goto set_alarm;
7471         /*
7472          * Identify the counters released between query trigger and query
7473          * handle more efficiently. The counter released in this gap period
7474          * should wait for a new round of query as the new arrived packets
7475          * will not be taken into account.
7476          */
7477         pool->query_gen++;
7478         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7479                                                MLX5_COUNTERS_PER_POOL,
7480                                                NULL, NULL,
7481                                                pool->raw_hw->mem_mng->dm->id,
7482                                                (void *)(uintptr_t)
7483                                                pool->raw_hw->data,
7484                                                sh->devx_comp,
7485                                                (uint64_t)(uintptr_t)pool);
7486         if (ret) {
7487                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7488                         " %d", pool->min_dcs->id);
7489                 pool->raw_hw = NULL;
7490                 goto set_alarm;
7491         }
7492         LIST_REMOVE(pool->raw_hw, next);
7493         sh->cmng.pending_queries++;
7494         pool_index++;
7495         if (pool_index >= n_valid)
7496                 pool_index = 0;
7497 set_alarm:
7498         sh->cmng.pool_index = pool_index;
7499         mlx5_set_query_alarm(sh);
7500 }
7501
7502 /**
7503  * Check and callback event for new aged flow in the counter pool
7504  *
7505  * @param[in] sh
7506  *   Pointer to mlx5_dev_ctx_shared object.
7507  * @param[in] pool
7508  *   Pointer to Current counter pool.
7509  */
7510 static void
7511 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7512                    struct mlx5_flow_counter_pool *pool)
7513 {
7514         struct mlx5_priv *priv;
7515         struct mlx5_flow_counter *cnt;
7516         struct mlx5_age_info *age_info;
7517         struct mlx5_age_param *age_param;
7518         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7519         struct mlx5_counter_stats_raw *prev = pool->raw;
7520         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7521         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7522         uint16_t expected = AGE_CANDIDATE;
7523         uint32_t i;
7524
7525         pool->time_of_last_age_check = curr_time;
7526         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7527                 cnt = MLX5_POOL_GET_CNT(pool, i);
7528                 age_param = MLX5_CNT_TO_AGE(cnt);
7529                 if (__atomic_load_n(&age_param->state,
7530                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7531                         continue;
7532                 if (cur->data[i].hits != prev->data[i].hits) {
7533                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7534                                          __ATOMIC_RELAXED);
7535                         continue;
7536                 }
7537                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7538                                        time_delta,
7539                                        __ATOMIC_RELAXED) <= age_param->timeout)
7540                         continue;
7541                 /**
7542                  * Hold the lock first, or if between the
7543                  * state AGE_TMOUT and tailq operation the
7544                  * release happened, the release procedure
7545                  * may delete a non-existent tailq node.
7546                  */
7547                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7548                 age_info = GET_PORT_AGE_INFO(priv);
7549                 rte_spinlock_lock(&age_info->aged_sl);
7550                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7551                                                 AGE_TMOUT, false,
7552                                                 __ATOMIC_RELAXED,
7553                                                 __ATOMIC_RELAXED)) {
7554                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7555                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7556                 }
7557                 rte_spinlock_unlock(&age_info->aged_sl);
7558         }
7559         mlx5_age_event_prepare(sh);
7560 }
7561
7562 /**
7563  * Handler for the HW respond about ready values from an asynchronous batch
7564  * query. This function is probably called by the host thread.
7565  *
7566  * @param[in] sh
7567  *   The pointer to the shared device context.
7568  * @param[in] async_id
7569  *   The Devx async ID.
7570  * @param[in] status
7571  *   The status of the completion.
7572  */
7573 void
7574 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7575                                   uint64_t async_id, int status)
7576 {
7577         struct mlx5_flow_counter_pool *pool =
7578                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7579         struct mlx5_counter_stats_raw *raw_to_free;
7580         uint8_t query_gen = pool->query_gen ^ 1;
7581         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7582         enum mlx5_counter_type cnt_type =
7583                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7584                                 MLX5_COUNTER_TYPE_ORIGIN;
7585
7586         if (unlikely(status)) {
7587                 raw_to_free = pool->raw_hw;
7588         } else {
7589                 raw_to_free = pool->raw;
7590                 if (pool->is_aged)
7591                         mlx5_flow_aging_check(sh, pool);
7592                 rte_spinlock_lock(&pool->sl);
7593                 pool->raw = pool->raw_hw;
7594                 rte_spinlock_unlock(&pool->sl);
7595                 /* Be sure the new raw counters data is updated in memory. */
7596                 rte_io_wmb();
7597                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7598                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7599                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7600                                      &pool->counters[query_gen], next);
7601                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7602                 }
7603         }
7604         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7605         pool->raw_hw = NULL;
7606         sh->cmng.pending_queries--;
7607 }
7608
7609 static int
7610 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7611                     const struct flow_grp_info *grp_info,
7612                     struct rte_flow_error *error)
7613 {
7614         if (grp_info->transfer && grp_info->external &&
7615             grp_info->fdb_def_rule) {
7616                 if (group == UINT32_MAX)
7617                         return rte_flow_error_set
7618                                                 (error, EINVAL,
7619                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7620                                                  NULL,
7621                                                  "group index not supported");
7622                 *table = group + 1;
7623         } else {
7624                 *table = group;
7625         }
7626         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7627         return 0;
7628 }
7629
7630 /**
7631  * Translate the rte_flow group index to HW table value.
7632  *
7633  * If tunnel offload is disabled, all group ids converted to flow table
7634  * id using the standard method.
7635  * If tunnel offload is enabled, group id can be converted using the
7636  * standard or tunnel conversion method. Group conversion method
7637  * selection depends on flags in `grp_info` parameter:
7638  * - Internal (grp_info.external == 0) groups conversion uses the
7639  *   standard method.
7640  * - Group ids in JUMP action converted with the tunnel conversion.
7641  * - Group id in rule attribute conversion depends on a rule type and
7642  *   group id value:
7643  *   ** non zero group attributes converted with the tunnel method
7644  *   ** zero group attribute in non-tunnel rule is converted using the
7645  *      standard method - there's only one root table
7646  *   ** zero group attribute in steer tunnel rule is converted with the
7647  *      standard method - single root table
7648  *   ** zero group attribute in match tunnel rule is a special OvS
7649  *      case: that value is used for portability reasons. That group
7650  *      id is converted with the tunnel conversion method.
7651  *
7652  * @param[in] dev
7653  *   Port device
7654  * @param[in] tunnel
7655  *   PMD tunnel offload object
7656  * @param[in] group
7657  *   rte_flow group index value.
7658  * @param[out] table
7659  *   HW table value.
7660  * @param[in] grp_info
7661  *   flags used for conversion
7662  * @param[out] error
7663  *   Pointer to error structure.
7664  *
7665  * @return
7666  *   0 on success, a negative errno value otherwise and rte_errno is set.
7667  */
7668 int
7669 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7670                          const struct mlx5_flow_tunnel *tunnel,
7671                          uint32_t group, uint32_t *table,
7672                          const struct flow_grp_info *grp_info,
7673                          struct rte_flow_error *error)
7674 {
7675         int ret;
7676         bool standard_translation;
7677
7678         if (!grp_info->skip_scale && grp_info->external &&
7679             group < MLX5_MAX_TABLES_EXTERNAL)
7680                 group *= MLX5_FLOW_TABLE_FACTOR;
7681         if (is_tunnel_offload_active(dev)) {
7682                 standard_translation = !grp_info->external ||
7683                                         grp_info->std_tbl_fix;
7684         } else {
7685                 standard_translation = true;
7686         }
7687         DRV_LOG(DEBUG,
7688                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7689                 dev->data->port_id, group, grp_info->transfer,
7690                 grp_info->external, grp_info->fdb_def_rule,
7691                 standard_translation ? "STANDARD" : "TUNNEL");
7692         if (standard_translation)
7693                 ret = flow_group_to_table(dev->data->port_id, group, table,
7694                                           grp_info, error);
7695         else
7696                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7697                                                       table, error);
7698
7699         return ret;
7700 }
7701
7702 /**
7703  * Discover availability of metadata reg_c's.
7704  *
7705  * Iteratively use test flows to check availability.
7706  *
7707  * @param[in] dev
7708  *   Pointer to the Ethernet device structure.
7709  *
7710  * @return
7711  *   0 on success, a negative errno value otherwise and rte_errno is set.
7712  */
7713 int
7714 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7715 {
7716         struct mlx5_priv *priv = dev->data->dev_private;
7717         struct mlx5_dev_config *config = &priv->config;
7718         enum modify_reg idx;
7719         int n = 0;
7720
7721         /* reg_c[0] and reg_c[1] are reserved. */
7722         config->flow_mreg_c[n++] = REG_C_0;
7723         config->flow_mreg_c[n++] = REG_C_1;
7724         /* Discover availability of other reg_c's. */
7725         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7726                 struct rte_flow_attr attr = {
7727                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7728                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7729                         .ingress = 1,
7730                 };
7731                 struct rte_flow_item items[] = {
7732                         [0] = {
7733                                 .type = RTE_FLOW_ITEM_TYPE_END,
7734                         },
7735                 };
7736                 struct rte_flow_action actions[] = {
7737                         [0] = {
7738                                 .type = (enum rte_flow_action_type)
7739                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7740                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7741                                         .src = REG_C_1,
7742                                         .dst = idx,
7743                                 },
7744                         },
7745                         [1] = {
7746                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7747                                 .conf = &(struct rte_flow_action_jump){
7748                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7749                                 },
7750                         },
7751                         [2] = {
7752                                 .type = RTE_FLOW_ACTION_TYPE_END,
7753                         },
7754                 };
7755                 uint32_t flow_idx;
7756                 struct rte_flow *flow;
7757                 struct rte_flow_error error;
7758
7759                 if (!config->dv_flow_en)
7760                         break;
7761                 /* Create internal flow, validation skips copy action. */
7762                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7763                                             actions, false, &error);
7764                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7765                                       flow_idx);
7766                 if (!flow)
7767                         continue;
7768                 config->flow_mreg_c[n++] = idx;
7769                 flow_list_destroy(dev, NULL, flow_idx);
7770         }
7771         for (; n < MLX5_MREG_C_NUM; ++n)
7772                 config->flow_mreg_c[n] = REG_NON;
7773         return 0;
7774 }
7775
7776 /**
7777  * Dump flow raw hw data to file
7778  *
7779  * @param[in] dev
7780  *    The pointer to Ethernet device.
7781  * @param[in] file
7782  *   A pointer to a file for output.
7783  * @param[out] error
7784  *   Perform verbose error reporting if not NULL. PMDs initialize this
7785  *   structure in case of error only.
7786  * @return
7787  *   0 on success, a nagative value otherwise.
7788  */
7789 int
7790 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
7791                    FILE *file,
7792                    struct rte_flow_error *error __rte_unused)
7793 {
7794         struct mlx5_priv *priv = dev->data->dev_private;
7795         struct mlx5_dev_ctx_shared *sh = priv->sh;
7796         uint32_t handle_idx;
7797         int ret;
7798         struct mlx5_flow_handle *dh;
7799         struct rte_flow *flow;
7800
7801         if (!priv->config.dv_flow_en) {
7802                 if (fputs("device dv flow disabled\n", file) <= 0)
7803                         return -errno;
7804                 return -ENOTSUP;
7805         }
7806
7807         /* dump all */
7808         if (!flow_idx)
7809                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
7810                                         sh->rx_domain,
7811                                         sh->tx_domain, file);
7812         /* dump one */
7813         flow = mlx5_ipool_get(priv->sh->ipool
7814                         [MLX5_IPOOL_RTE_FLOW], (uintptr_t)(void *)flow_idx);
7815         if (!flow)
7816                 return -ENOENT;
7817
7818         handle_idx = flow->dev_handles;
7819         while (handle_idx) {
7820                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7821                                 handle_idx);
7822                 if (!dh)
7823                         return -ENOENT;
7824                 if (dh->drv_flow) {
7825                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
7826                                         file);
7827                         if (ret)
7828                                 return -ENOENT;
7829                 }
7830                 handle_idx = dh->next.next;
7831         }
7832         return 0;
7833 }
7834
7835 /**
7836  * Get aged-out flows.
7837  *
7838  * @param[in] dev
7839  *   Pointer to the Ethernet device structure.
7840  * @param[in] context
7841  *   The address of an array of pointers to the aged-out flows contexts.
7842  * @param[in] nb_countexts
7843  *   The length of context array pointers.
7844  * @param[out] error
7845  *   Perform verbose error reporting if not NULL. Initialized in case of
7846  *   error only.
7847  *
7848  * @return
7849  *   how many contexts get in success, otherwise negative errno value.
7850  *   if nb_contexts is 0, return the amount of all aged contexts.
7851  *   if nb_contexts is not 0 , return the amount of aged flows reported
7852  *   in the context array.
7853  */
7854 int
7855 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7856                         uint32_t nb_contexts, struct rte_flow_error *error)
7857 {
7858         const struct mlx5_flow_driver_ops *fops;
7859         struct rte_flow_attr attr = { .transfer = 0 };
7860
7861         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7862                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7863                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7864                                                     error);
7865         }
7866         DRV_LOG(ERR,
7867                 "port %u get aged flows is not supported.",
7868                  dev->data->port_id);
7869         return -ENOTSUP;
7870 }
7871
7872 /* Wrapper for driver action_validate op callback */
7873 static int
7874 flow_drv_action_validate(struct rte_eth_dev *dev,
7875                          const struct rte_flow_indir_action_conf *conf,
7876                          const struct rte_flow_action *action,
7877                          const struct mlx5_flow_driver_ops *fops,
7878                          struct rte_flow_error *error)
7879 {
7880         static const char err_msg[] = "indirect action validation unsupported";
7881
7882         if (!fops->action_validate) {
7883                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7884                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7885                                    NULL, err_msg);
7886                 return -rte_errno;
7887         }
7888         return fops->action_validate(dev, conf, action, error);
7889 }
7890
7891 /**
7892  * Destroys the shared action by handle.
7893  *
7894  * @param dev
7895  *   Pointer to Ethernet device structure.
7896  * @param[in] handle
7897  *   Handle for the indirect action object to be destroyed.
7898  * @param[out] error
7899  *   Perform verbose error reporting if not NULL. PMDs initialize this
7900  *   structure in case of error only.
7901  *
7902  * @return
7903  *   0 on success, a negative errno value otherwise and rte_errno is set.
7904  *
7905  * @note: wrapper for driver action_create op callback.
7906  */
7907 static int
7908 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
7909                            struct rte_flow_action_handle *handle,
7910                            struct rte_flow_error *error)
7911 {
7912         static const char err_msg[] = "indirect action destruction unsupported";
7913         struct rte_flow_attr attr = { .transfer = 0 };
7914         const struct mlx5_flow_driver_ops *fops =
7915                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7916
7917         if (!fops->action_destroy) {
7918                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7919                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7920                                    NULL, err_msg);
7921                 return -rte_errno;
7922         }
7923         return fops->action_destroy(dev, handle, error);
7924 }
7925
7926 /* Wrapper for driver action_destroy op callback */
7927 static int
7928 flow_drv_action_update(struct rte_eth_dev *dev,
7929                        struct rte_flow_action_handle *handle,
7930                        const void *update,
7931                        const struct mlx5_flow_driver_ops *fops,
7932                        struct rte_flow_error *error)
7933 {
7934         static const char err_msg[] = "indirect action update unsupported";
7935
7936         if (!fops->action_update) {
7937                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7938                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7939                                    NULL, err_msg);
7940                 return -rte_errno;
7941         }
7942         return fops->action_update(dev, handle, update, error);
7943 }
7944
7945 /* Wrapper for driver action_destroy op callback */
7946 static int
7947 flow_drv_action_query(struct rte_eth_dev *dev,
7948                       const struct rte_flow_action_handle *handle,
7949                       void *data,
7950                       const struct mlx5_flow_driver_ops *fops,
7951                       struct rte_flow_error *error)
7952 {
7953         static const char err_msg[] = "indirect action query unsupported";
7954
7955         if (!fops->action_query) {
7956                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7957                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7958                                    NULL, err_msg);
7959                 return -rte_errno;
7960         }
7961         return fops->action_query(dev, handle, data, error);
7962 }
7963
7964 /**
7965  * Create indirect action for reuse in multiple flow rules.
7966  *
7967  * @param dev
7968  *   Pointer to Ethernet device structure.
7969  * @param conf
7970  *   Pointer to indirect action object configuration.
7971  * @param[in] action
7972  *   Action configuration for indirect action object creation.
7973  * @param[out] error
7974  *   Perform verbose error reporting if not NULL. PMDs initialize this
7975  *   structure in case of error only.
7976  * @return
7977  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7978  */
7979 static struct rte_flow_action_handle *
7980 mlx5_action_handle_create(struct rte_eth_dev *dev,
7981                           const struct rte_flow_indir_action_conf *conf,
7982                           const struct rte_flow_action *action,
7983                           struct rte_flow_error *error)
7984 {
7985         static const char err_msg[] = "indirect action creation unsupported";
7986         struct rte_flow_attr attr = { .transfer = 0 };
7987         const struct mlx5_flow_driver_ops *fops =
7988                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7989
7990         if (flow_drv_action_validate(dev, conf, action, fops, error))
7991                 return NULL;
7992         if (!fops->action_create) {
7993                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7994                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7995                                    NULL, err_msg);
7996                 return NULL;
7997         }
7998         return fops->action_create(dev, conf, action, error);
7999 }
8000
8001 /**
8002  * Updates inplace the indirect action configuration pointed by *handle*
8003  * with the configuration provided as *update* argument.
8004  * The update of the indirect action configuration effects all flow rules
8005  * reusing the action via handle.
8006  *
8007  * @param dev
8008  *   Pointer to Ethernet device structure.
8009  * @param[in] handle
8010  *   Handle for the indirect action to be updated.
8011  * @param[in] update
8012  *   Action specification used to modify the action pointed by handle.
8013  *   *update* could be of same type with the action pointed by the *handle*
8014  *   handle argument, or some other structures like a wrapper, depending on
8015  *   the indirect action type.
8016  * @param[out] error
8017  *   Perform verbose error reporting if not NULL. PMDs initialize this
8018  *   structure in case of error only.
8019  *
8020  * @return
8021  *   0 on success, a negative errno value otherwise and rte_errno is set.
8022  */
8023 static int
8024 mlx5_action_handle_update(struct rte_eth_dev *dev,
8025                 struct rte_flow_action_handle *handle,
8026                 const void *update,
8027                 struct rte_flow_error *error)
8028 {
8029         struct rte_flow_attr attr = { .transfer = 0 };
8030         const struct mlx5_flow_driver_ops *fops =
8031                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8032         int ret;
8033
8034         ret = flow_drv_action_validate(dev, NULL,
8035                         (const struct rte_flow_action *)update, fops, error);
8036         if (ret)
8037                 return ret;
8038         return flow_drv_action_update(dev, handle, update, fops,
8039                                       error);
8040 }
8041
8042 /**
8043  * Query the indirect action by handle.
8044  *
8045  * This function allows retrieving action-specific data such as counters.
8046  * Data is gathered by special action which may be present/referenced in
8047  * more than one flow rule definition.
8048  *
8049  * see @RTE_FLOW_ACTION_TYPE_COUNT
8050  *
8051  * @param dev
8052  *   Pointer to Ethernet device structure.
8053  * @param[in] handle
8054  *   Handle for the indirect action to query.
8055  * @param[in, out] data
8056  *   Pointer to storage for the associated query data type.
8057  * @param[out] error
8058  *   Perform verbose error reporting if not NULL. PMDs initialize this
8059  *   structure in case of error only.
8060  *
8061  * @return
8062  *   0 on success, a negative errno value otherwise and rte_errno is set.
8063  */
8064 static int
8065 mlx5_action_handle_query(struct rte_eth_dev *dev,
8066                          const struct rte_flow_action_handle *handle,
8067                          void *data,
8068                          struct rte_flow_error *error)
8069 {
8070         struct rte_flow_attr attr = { .transfer = 0 };
8071         const struct mlx5_flow_driver_ops *fops =
8072                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8073
8074         return flow_drv_action_query(dev, handle, data, fops, error);
8075 }
8076
8077 /**
8078  * Destroy all indirect actions (shared RSS).
8079  *
8080  * @param dev
8081  *   Pointer to Ethernet device.
8082  *
8083  * @return
8084  *   0 on success, a negative errno value otherwise and rte_errno is set.
8085  */
8086 int
8087 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8088 {
8089         struct rte_flow_error error;
8090         struct mlx5_priv *priv = dev->data->dev_private;
8091         struct mlx5_shared_action_rss *shared_rss;
8092         int ret = 0;
8093         uint32_t idx;
8094
8095         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8096                       priv->rss_shared_actions, idx, shared_rss, next) {
8097                 ret |= mlx5_action_handle_destroy(dev,
8098                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8099         }
8100         return ret;
8101 }
8102
8103 #ifndef HAVE_MLX5DV_DR
8104 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8105 #else
8106 #define MLX5_DOMAIN_SYNC_FLOW \
8107         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8108 #endif
8109
8110 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8111 {
8112         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8113         const struct mlx5_flow_driver_ops *fops;
8114         int ret;
8115         struct rte_flow_attr attr = { .transfer = 0 };
8116
8117         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8118         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8119         if (ret > 0)
8120                 ret = -ret;
8121         return ret;
8122 }
8123
8124 /**
8125  * tunnel offload functionalilty is defined for DV environment only
8126  */
8127 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8128 __extension__
8129 union tunnel_offload_mark {
8130         uint32_t val;
8131         struct {
8132                 uint32_t app_reserve:8;
8133                 uint32_t table_id:15;
8134                 uint32_t transfer:1;
8135                 uint32_t _unused_:8;
8136         };
8137 };
8138
8139 static bool
8140 mlx5_access_tunnel_offload_db
8141         (struct rte_eth_dev *dev,
8142          bool (*match)(struct rte_eth_dev *,
8143                        struct mlx5_flow_tunnel *, const void *),
8144          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8145          void (*miss)(struct rte_eth_dev *, void *),
8146          void *ctx, bool lock_op);
8147
8148 static int
8149 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8150                              struct rte_flow *flow,
8151                              const struct rte_flow_attr *attr,
8152                              const struct rte_flow_action *app_actions,
8153                              uint32_t flow_idx,
8154                              struct tunnel_default_miss_ctx *ctx,
8155                              struct rte_flow_error *error)
8156 {
8157         struct mlx5_priv *priv = dev->data->dev_private;
8158         struct mlx5_flow *dev_flow;
8159         struct rte_flow_attr miss_attr = *attr;
8160         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
8161         const struct rte_flow_item miss_items[2] = {
8162                 {
8163                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8164                         .spec = NULL,
8165                         .last = NULL,
8166                         .mask = NULL
8167                 },
8168                 {
8169                         .type = RTE_FLOW_ITEM_TYPE_END,
8170                         .spec = NULL,
8171                         .last = NULL,
8172                         .mask = NULL
8173                 }
8174         };
8175         union tunnel_offload_mark mark_id;
8176         struct rte_flow_action_mark miss_mark;
8177         struct rte_flow_action miss_actions[3] = {
8178                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8179                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8180         };
8181         const struct rte_flow_action_jump *jump_data;
8182         uint32_t i, flow_table = 0; /* prevent compilation warning */
8183         struct flow_grp_info grp_info = {
8184                 .external = 1,
8185                 .transfer = attr->transfer,
8186                 .fdb_def_rule = !!priv->fdb_def_rule,
8187                 .std_tbl_fix = 0,
8188         };
8189         int ret;
8190
8191         if (!attr->transfer) {
8192                 uint32_t q_size;
8193
8194                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8195                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8196                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8197                                          0, SOCKET_ID_ANY);
8198                 if (!ctx->queue)
8199                         return rte_flow_error_set
8200                                 (error, ENOMEM,
8201                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8202                                 NULL, "invalid default miss RSS");
8203                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8204                 ctx->action_rss.level = 0,
8205                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8206                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8207                 ctx->action_rss.queue_num = priv->reta_idx_n,
8208                 ctx->action_rss.key = priv->rss_conf.rss_key,
8209                 ctx->action_rss.queue = ctx->queue;
8210                 if (!priv->reta_idx_n || !priv->rxqs_n)
8211                         return rte_flow_error_set
8212                                 (error, EINVAL,
8213                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8214                                 NULL, "invalid port configuration");
8215                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8216                         ctx->action_rss.types = 0;
8217                 for (i = 0; i != priv->reta_idx_n; ++i)
8218                         ctx->queue[i] = (*priv->reta_idx)[i];
8219         } else {
8220                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8221                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8222         }
8223         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8224         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8225         jump_data = app_actions->conf;
8226         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8227         miss_attr.group = jump_data->group;
8228         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8229                                        &flow_table, &grp_info, error);
8230         if (ret)
8231                 return rte_flow_error_set(error, EINVAL,
8232                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8233                                           NULL, "invalid tunnel id");
8234         mark_id.app_reserve = 0;
8235         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8236         mark_id.transfer = !!attr->transfer;
8237         mark_id._unused_ = 0;
8238         miss_mark.id = mark_id.val;
8239         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8240                                     miss_items, miss_actions, flow_idx, error);
8241         if (!dev_flow)
8242                 return -rte_errno;
8243         dev_flow->flow = flow;
8244         dev_flow->external = true;
8245         dev_flow->tunnel = tunnel;
8246         /* Subflow object was created, we must include one in the list. */
8247         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8248                       dev_flow->handle, next);
8249         DRV_LOG(DEBUG,
8250                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8251                 dev->data->port_id, tunnel->app_tunnel.type,
8252                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8253         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8254                                   miss_actions, error);
8255         if (!ret)
8256                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8257                                                   error);
8258
8259         return ret;
8260 }
8261
8262 static const struct mlx5_flow_tbl_data_entry  *
8263 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8264 {
8265         struct mlx5_priv *priv = dev->data->dev_private;
8266         struct mlx5_dev_ctx_shared *sh = priv->sh;
8267         struct mlx5_hlist_entry *he;
8268         union tunnel_offload_mark mbits = { .val = mark };
8269         union mlx5_flow_tbl_key table_key = {
8270                 {
8271                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8272                         .id = 0,
8273                         .reserved = 0,
8274                         .dummy = 0,
8275                         .is_fdb = !!mbits.transfer,
8276                         .is_egress = 0,
8277                 }
8278         };
8279         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
8280         return he ?
8281                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8282 }
8283
8284 static void
8285 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
8286                                    struct mlx5_hlist_entry *entry)
8287 {
8288         struct mlx5_dev_ctx_shared *sh = list->ctx;
8289         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8290
8291         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8292                         tunnel_flow_tbl_to_id(tte->flow_table));
8293         mlx5_free(tte);
8294 }
8295
8296 static int
8297 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused,
8298                                   struct mlx5_hlist_entry *entry,
8299                                   uint64_t key, void *cb_ctx __rte_unused)
8300 {
8301         union tunnel_tbl_key tbl = {
8302                 .val = key,
8303         };
8304         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8305
8306         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8307 }
8308
8309 static struct mlx5_hlist_entry *
8310 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key,
8311                                    void *ctx __rte_unused)
8312 {
8313         struct mlx5_dev_ctx_shared *sh = list->ctx;
8314         struct tunnel_tbl_entry *tte;
8315         union tunnel_tbl_key tbl = {
8316                 .val = key,
8317         };
8318
8319         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8320                           sizeof(*tte), 0,
8321                           SOCKET_ID_ANY);
8322         if (!tte)
8323                 goto err;
8324         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8325                           &tte->flow_table);
8326         if (tte->flow_table >= MLX5_MAX_TABLES) {
8327                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8328                         tte->flow_table);
8329                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8330                                 tte->flow_table);
8331                 goto err;
8332         } else if (!tte->flow_table) {
8333                 goto err;
8334         }
8335         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8336         tte->tunnel_id = tbl.tunnel_id;
8337         tte->group = tbl.group;
8338         return &tte->hash;
8339 err:
8340         if (tte)
8341                 mlx5_free(tte);
8342         return NULL;
8343 }
8344
8345 static uint32_t
8346 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8347                                 const struct mlx5_flow_tunnel *tunnel,
8348                                 uint32_t group, uint32_t *table,
8349                                 struct rte_flow_error *error)
8350 {
8351         struct mlx5_hlist_entry *he;
8352         struct tunnel_tbl_entry *tte;
8353         union tunnel_tbl_key key = {
8354                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8355                 .group = group
8356         };
8357         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8358         struct mlx5_hlist *group_hash;
8359
8360         group_hash = tunnel ? tunnel->groups : thub->groups;
8361         he = mlx5_hlist_register(group_hash, key.val, NULL);
8362         if (!he)
8363                 return rte_flow_error_set(error, EINVAL,
8364                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8365                                           NULL,
8366                                           "tunnel group index not supported");
8367         tte = container_of(he, typeof(*tte), hash);
8368         *table = tte->flow_table;
8369         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8370                 dev->data->port_id, key.tunnel_id, group, *table);
8371         return 0;
8372 }
8373
8374 static void
8375 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8376                       struct mlx5_flow_tunnel *tunnel)
8377 {
8378         struct mlx5_priv *priv = dev->data->dev_private;
8379         struct mlx5_indexed_pool *ipool;
8380
8381         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8382                 dev->data->port_id, tunnel->tunnel_id);
8383         LIST_REMOVE(tunnel, chain);
8384         mlx5_hlist_destroy(tunnel->groups);
8385         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8386         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8387 }
8388
8389 static bool
8390 mlx5_access_tunnel_offload_db
8391         (struct rte_eth_dev *dev,
8392          bool (*match)(struct rte_eth_dev *,
8393                        struct mlx5_flow_tunnel *, const void *),
8394          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8395          void (*miss)(struct rte_eth_dev *, void *),
8396          void *ctx, bool lock_op)
8397 {
8398         bool verdict = false;
8399         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8400         struct mlx5_flow_tunnel *tunnel;
8401
8402         rte_spinlock_lock(&thub->sl);
8403         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
8404                 verdict = match(dev, tunnel, (const void *)ctx);
8405                 if (verdict)
8406                         break;
8407         }
8408         if (!lock_op)
8409                 rte_spinlock_unlock(&thub->sl);
8410         if (verdict && hit)
8411                 hit(dev, tunnel, ctx);
8412         if (!verdict && miss)
8413                 miss(dev, ctx);
8414         if (lock_op)
8415                 rte_spinlock_unlock(&thub->sl);
8416
8417         return verdict;
8418 }
8419
8420 struct tunnel_db_find_tunnel_id_ctx {
8421         uint32_t tunnel_id;
8422         struct mlx5_flow_tunnel *tunnel;
8423 };
8424
8425 static bool
8426 find_tunnel_id_match(struct rte_eth_dev *dev,
8427                      struct mlx5_flow_tunnel *tunnel, const void *x)
8428 {
8429         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8430
8431         RTE_SET_USED(dev);
8432         return tunnel->tunnel_id == ctx->tunnel_id;
8433 }
8434
8435 static void
8436 find_tunnel_id_hit(struct rte_eth_dev *dev,
8437                    struct mlx5_flow_tunnel *tunnel, void *x)
8438 {
8439         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8440         RTE_SET_USED(dev);
8441         ctx->tunnel = tunnel;
8442 }
8443
8444 static struct mlx5_flow_tunnel *
8445 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8446 {
8447         struct tunnel_db_find_tunnel_id_ctx ctx = {
8448                 .tunnel_id = id,
8449         };
8450
8451         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
8452                                       find_tunnel_id_hit, NULL, &ctx, true);
8453
8454         return ctx.tunnel;
8455 }
8456
8457 static struct mlx5_flow_tunnel *
8458 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8459                           const struct rte_flow_tunnel *app_tunnel)
8460 {
8461         struct mlx5_priv *priv = dev->data->dev_private;
8462         struct mlx5_indexed_pool *ipool;
8463         struct mlx5_flow_tunnel *tunnel;
8464         uint32_t id;
8465
8466         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8467         tunnel = mlx5_ipool_zmalloc(ipool, &id);
8468         if (!tunnel)
8469                 return NULL;
8470         if (id >= MLX5_MAX_TUNNELS) {
8471                 mlx5_ipool_free(ipool, id);
8472                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
8473                 return NULL;
8474         }
8475         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
8476                                            mlx5_flow_tunnel_grp2tbl_create_cb,
8477                                            mlx5_flow_tunnel_grp2tbl_match_cb,
8478                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
8479         if (!tunnel->groups) {
8480                 mlx5_ipool_free(ipool, id);
8481                 return NULL;
8482         }
8483         tunnel->groups->ctx = priv->sh;
8484         /* initiate new PMD tunnel */
8485         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8486         tunnel->tunnel_id = id;
8487         tunnel->action.type = (typeof(tunnel->action.type))
8488                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8489         tunnel->action.conf = tunnel;
8490         tunnel->item.type = (typeof(tunnel->item.type))
8491                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8492         tunnel->item.spec = tunnel;
8493         tunnel->item.last = NULL;
8494         tunnel->item.mask = NULL;
8495
8496         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8497                 dev->data->port_id, tunnel->tunnel_id);
8498
8499         return tunnel;
8500 }
8501
8502 struct tunnel_db_get_tunnel_ctx {
8503         const struct rte_flow_tunnel *app_tunnel;
8504         struct mlx5_flow_tunnel *tunnel;
8505 };
8506
8507 static bool get_tunnel_match(struct rte_eth_dev *dev,
8508                              struct mlx5_flow_tunnel *tunnel, const void *x)
8509 {
8510         const struct tunnel_db_get_tunnel_ctx *ctx = x;
8511
8512         RTE_SET_USED(dev);
8513         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
8514                        sizeof(*ctx->app_tunnel));
8515 }
8516
8517 static void get_tunnel_hit(struct rte_eth_dev *dev,
8518                            struct mlx5_flow_tunnel *tunnel, void *x)
8519 {
8520         /* called under tunnel spinlock protection */
8521         struct tunnel_db_get_tunnel_ctx *ctx = x;
8522
8523         RTE_SET_USED(dev);
8524         tunnel->refctn++;
8525         ctx->tunnel = tunnel;
8526 }
8527
8528 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
8529 {
8530         /* called under tunnel spinlock protection */
8531         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8532         struct tunnel_db_get_tunnel_ctx *ctx = x;
8533
8534         rte_spinlock_unlock(&thub->sl);
8535         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
8536         rte_spinlock_lock(&thub->sl);
8537         if (ctx->tunnel) {
8538                 ctx->tunnel->refctn = 1;
8539                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
8540         }
8541 }
8542
8543
8544 static int
8545 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
8546                      const struct rte_flow_tunnel *app_tunnel,
8547                      struct mlx5_flow_tunnel **tunnel)
8548 {
8549         struct tunnel_db_get_tunnel_ctx ctx = {
8550                 .app_tunnel = app_tunnel,
8551         };
8552
8553         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
8554                                       get_tunnel_miss, &ctx, true);
8555         *tunnel = ctx.tunnel;
8556         return ctx.tunnel ? 0 : -ENOMEM;
8557 }
8558
8559 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
8560 {
8561         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8562
8563         if (!thub)
8564                 return;
8565         if (!LIST_EMPTY(&thub->tunnels))
8566                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
8567         mlx5_hlist_destroy(thub->groups);
8568         mlx5_free(thub);
8569 }
8570
8571 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
8572 {
8573         int err;
8574         struct mlx5_flow_tunnel_hub *thub;
8575
8576         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
8577                            0, SOCKET_ID_ANY);
8578         if (!thub)
8579                 return -ENOMEM;
8580         LIST_INIT(&thub->tunnels);
8581         rte_spinlock_init(&thub->sl);
8582         thub->groups = mlx5_hlist_create("flow groups",
8583                                          rte_align32pow2(MLX5_MAX_TABLES), 0,
8584                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
8585                                          mlx5_flow_tunnel_grp2tbl_match_cb,
8586                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
8587         if (!thub->groups) {
8588                 err = -rte_errno;
8589                 goto err;
8590         }
8591         thub->groups->ctx = sh;
8592         sh->tunnel_hub = thub;
8593
8594         return 0;
8595
8596 err:
8597         if (thub->groups)
8598                 mlx5_hlist_destroy(thub->groups);
8599         if (thub)
8600                 mlx5_free(thub);
8601         return err;
8602 }
8603
8604 static inline bool
8605 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
8606                           struct rte_flow_tunnel *tunnel,
8607                           const char *err_msg)
8608 {
8609         err_msg = NULL;
8610         if (!is_tunnel_offload_active(dev)) {
8611                 err_msg = "tunnel offload was not activated";
8612                 goto out;
8613         } else if (!tunnel) {
8614                 err_msg = "no application tunnel";
8615                 goto out;
8616         }
8617
8618         switch (tunnel->type) {
8619         default:
8620                 err_msg = "unsupported tunnel type";
8621                 goto out;
8622         case RTE_FLOW_ITEM_TYPE_VXLAN:
8623                 break;
8624         }
8625
8626 out:
8627         return !err_msg;
8628 }
8629
8630 static int
8631 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
8632                     struct rte_flow_tunnel *app_tunnel,
8633                     struct rte_flow_action **actions,
8634                     uint32_t *num_of_actions,
8635                     struct rte_flow_error *error)
8636 {
8637         int ret;
8638         struct mlx5_flow_tunnel *tunnel;
8639         const char *err_msg = NULL;
8640         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
8641
8642         if (!verdict)
8643                 return rte_flow_error_set(error, EINVAL,
8644                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
8645                                           err_msg);
8646         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
8647         if (ret < 0) {
8648                 return rte_flow_error_set(error, ret,
8649                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
8650                                           "failed to initialize pmd tunnel");
8651         }
8652         *actions = &tunnel->action;
8653         *num_of_actions = 1;
8654         return 0;
8655 }
8656
8657 static int
8658 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
8659                        struct rte_flow_tunnel *app_tunnel,
8660                        struct rte_flow_item **items,
8661                        uint32_t *num_of_items,
8662                        struct rte_flow_error *error)
8663 {
8664         int ret;
8665         struct mlx5_flow_tunnel *tunnel;
8666         const char *err_msg = NULL;
8667         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
8668
8669         if (!verdict)
8670                 return rte_flow_error_set(error, EINVAL,
8671                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8672                                           err_msg);
8673         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
8674         if (ret < 0) {
8675                 return rte_flow_error_set(error, ret,
8676                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8677                                           "failed to initialize pmd tunnel");
8678         }
8679         *items = &tunnel->item;
8680         *num_of_items = 1;
8681         return 0;
8682 }
8683
8684 struct tunnel_db_element_release_ctx {
8685         struct rte_flow_item *items;
8686         struct rte_flow_action *actions;
8687         uint32_t num_elements;
8688         struct rte_flow_error *error;
8689         int ret;
8690 };
8691
8692 static bool
8693 tunnel_element_release_match(struct rte_eth_dev *dev,
8694                              struct mlx5_flow_tunnel *tunnel, const void *x)
8695 {
8696         const struct tunnel_db_element_release_ctx *ctx = x;
8697
8698         RTE_SET_USED(dev);
8699         if (ctx->num_elements != 1)
8700                 return false;
8701         else if (ctx->items)
8702                 return ctx->items == &tunnel->item;
8703         else if (ctx->actions)
8704                 return ctx->actions == &tunnel->action;
8705
8706         return false;
8707 }
8708
8709 static void
8710 tunnel_element_release_hit(struct rte_eth_dev *dev,
8711                            struct mlx5_flow_tunnel *tunnel, void *x)
8712 {
8713         struct tunnel_db_element_release_ctx *ctx = x;
8714         ctx->ret = 0;
8715         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
8716                 mlx5_flow_tunnel_free(dev, tunnel);
8717 }
8718
8719 static void
8720 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
8721 {
8722         struct tunnel_db_element_release_ctx *ctx = x;
8723         RTE_SET_USED(dev);
8724         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
8725                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8726                                       "invalid argument");
8727 }
8728
8729 static int
8730 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
8731                        struct rte_flow_item *pmd_items,
8732                        uint32_t num_items, struct rte_flow_error *err)
8733 {
8734         struct tunnel_db_element_release_ctx ctx = {
8735                 .items = pmd_items,
8736                 .actions = NULL,
8737                 .num_elements = num_items,
8738                 .error = err,
8739         };
8740
8741         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8742                                       tunnel_element_release_hit,
8743                                       tunnel_element_release_miss, &ctx, false);
8744
8745         return ctx.ret;
8746 }
8747
8748 static int
8749 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
8750                          struct rte_flow_action *pmd_actions,
8751                          uint32_t num_actions, struct rte_flow_error *err)
8752 {
8753         struct tunnel_db_element_release_ctx ctx = {
8754                 .items = NULL,
8755                 .actions = pmd_actions,
8756                 .num_elements = num_actions,
8757                 .error = err,
8758         };
8759
8760         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8761                                       tunnel_element_release_hit,
8762                                       tunnel_element_release_miss, &ctx, false);
8763
8764         return ctx.ret;
8765 }
8766
8767 static int
8768 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
8769                                   struct rte_mbuf *m,
8770                                   struct rte_flow_restore_info *info,
8771                                   struct rte_flow_error *err)
8772 {
8773         uint64_t ol_flags = m->ol_flags;
8774         const struct mlx5_flow_tbl_data_entry *tble;
8775         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
8776
8777         if (!is_tunnel_offload_active(dev)) {
8778                 info->flags = 0;
8779                 return 0;
8780         }
8781
8782         if ((ol_flags & mask) != mask)
8783                 goto err;
8784         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
8785         if (!tble) {
8786                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
8787                         dev->data->port_id, m->hash.fdir.hi);
8788                 goto err;
8789         }
8790         MLX5_ASSERT(tble->tunnel);
8791         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
8792         info->group_id = tble->group_id;
8793         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
8794                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
8795                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
8796
8797         return 0;
8798
8799 err:
8800         return rte_flow_error_set(err, EINVAL,
8801                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8802                                   "failed to get restore info");
8803 }
8804
8805 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
8806 static int
8807 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
8808                            __rte_unused struct rte_flow_tunnel *app_tunnel,
8809                            __rte_unused struct rte_flow_action **actions,
8810                            __rte_unused uint32_t *num_of_actions,
8811                            __rte_unused struct rte_flow_error *error)
8812 {
8813         return -ENOTSUP;
8814 }
8815
8816 static int
8817 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
8818                        __rte_unused struct rte_flow_tunnel *app_tunnel,
8819                        __rte_unused struct rte_flow_item **items,
8820                        __rte_unused uint32_t *num_of_items,
8821                        __rte_unused struct rte_flow_error *error)
8822 {
8823         return -ENOTSUP;
8824 }
8825
8826 static int
8827 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
8828                               __rte_unused struct rte_flow_item *pmd_items,
8829                               __rte_unused uint32_t num_items,
8830                               __rte_unused struct rte_flow_error *err)
8831 {
8832         return -ENOTSUP;
8833 }
8834
8835 static int
8836 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
8837                                 __rte_unused struct rte_flow_action *pmd_action,
8838                                 __rte_unused uint32_t num_actions,
8839                                 __rte_unused struct rte_flow_error *err)
8840 {
8841         return -ENOTSUP;
8842 }
8843
8844 static int
8845 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
8846                                   __rte_unused struct rte_mbuf *m,
8847                                   __rte_unused struct rte_flow_restore_info *i,
8848                                   __rte_unused struct rte_flow_error *err)
8849 {
8850         return -ENOTSUP;
8851 }
8852
8853 static int
8854 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
8855                              __rte_unused struct rte_flow *flow,
8856                              __rte_unused const struct rte_flow_attr *attr,
8857                              __rte_unused const struct rte_flow_action *actions,
8858                              __rte_unused uint32_t flow_idx,
8859                              __rte_unused struct tunnel_default_miss_ctx *ctx,
8860                              __rte_unused struct rte_flow_error *error)
8861 {
8862         return -ENOTSUP;
8863 }
8864
8865 static struct mlx5_flow_tunnel *
8866 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
8867                     __rte_unused uint32_t id)
8868 {
8869         return NULL;
8870 }
8871
8872 static void
8873 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
8874                       __rte_unused struct mlx5_flow_tunnel *tunnel)
8875 {
8876 }
8877
8878 static uint32_t
8879 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
8880                                 __rte_unused const struct mlx5_flow_tunnel *t,
8881                                 __rte_unused uint32_t group,
8882                                 __rte_unused uint32_t *table,
8883                                 struct rte_flow_error *error)
8884 {
8885         return rte_flow_error_set(error, ENOTSUP,
8886                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8887                                   "tunnel offload requires DV support");
8888 }
8889
8890 void
8891 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
8892                         __rte_unused  uint16_t port_id)
8893 {
8894 }
8895 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */