drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see RTE_ETH_RSS_* definitions).
 102          */
 103         uint64_t node_flags;
 104         /**<
 105          *  Bit-fields that define how the node is used in the expansion.
 106          * (see MLX5_EXPANSION_NODE_* definitions).
 107          */
 108 };
 109
 110 /* Optional expand field. The expansion alg will not go deeper. */
 111 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
 112
 113 /* The node is not added implicitly as expansion to the flow pattern.
 114  * If the node type does not match the flow pattern item type, the
 115  * expansion alg will go deeper to its next items.
 116  * In the current implementation, the list of next nodes indexes can
 117  * have up to one node with this flag set and it has to be the last
 118  * node index (before the list terminator).
 119  */
 120 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
 121
 122 /** Object returned by mlx5_flow_expand_rss(). */
 123 struct mlx5_flow_expand_rss {
 124         uint32_t entries;
 125         /**< Number of entries @p patterns and @p priorities. */
 126         struct {
 127                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 128                 uint32_t priority; /**< Priority offset for each expansion. */
 129         } entry[];
 130 };
 131
 132 static void
 133 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 134
 135 static const struct mlx5_flow_expand_node *
 136 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
 137                 unsigned int item_idx,
 138                 const struct mlx5_flow_expand_node graph[],
 139                 const struct mlx5_flow_expand_node *node);
 140
 141 static bool
 142 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 143 {
 144         switch (item->type) {
 145         case RTE_FLOW_ITEM_TYPE_ETH:
 146         case RTE_FLOW_ITEM_TYPE_VLAN:
 147         case RTE_FLOW_ITEM_TYPE_IPV4:
 148         case RTE_FLOW_ITEM_TYPE_IPV6:
 149         case RTE_FLOW_ITEM_TYPE_UDP:
 150         case RTE_FLOW_ITEM_TYPE_TCP:
 151         case RTE_FLOW_ITEM_TYPE_VXLAN:
 152         case RTE_FLOW_ITEM_TYPE_NVGRE:
 153         case RTE_FLOW_ITEM_TYPE_GRE:
 154         case RTE_FLOW_ITEM_TYPE_GENEVE:
 155         case RTE_FLOW_ITEM_TYPE_MPLS:
 156         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 157         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 158         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 159         case RTE_FLOW_ITEM_TYPE_GTP:
 160                 return true;
 161         default:
 162                 break;
 163         }
 164         return false;
 165 }
 166
 167 static enum rte_flow_item_type
 168 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 169 {
 170         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 171         uint16_t ether_type = 0;
 172         uint16_t ether_type_m;
 173         uint8_t ip_next_proto = 0;
 174         uint8_t ip_next_proto_m;
 175
 176         if (item == NULL || item->spec == NULL)
 177                 return ret;
 178         switch (item->type) {
 179         case RTE_FLOW_ITEM_TYPE_ETH:
 180                 if (item->mask)
 181                         ether_type_m = ((const struct rte_flow_item_eth *)
 182                                                 (item->mask))->type;
 183                 else
 184                         ether_type_m = rte_flow_item_eth_mask.type;
 185                 if (ether_type_m != RTE_BE16(0xFFFF))
 186                         break;
 187                 ether_type = ((const struct rte_flow_item_eth *)
 188                                 (item->spec))->type;
 189                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 190                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 191                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 192                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 193                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 194                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 195                 else
 196                         ret = RTE_FLOW_ITEM_TYPE_END;
 197                 break;
 198         case RTE_FLOW_ITEM_TYPE_VLAN:
 199                 if (item->mask)
 200                         ether_type_m = ((const struct rte_flow_item_vlan *)
 201                                                 (item->mask))->inner_type;
 202                 else
 203                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 204                 if (ether_type_m != RTE_BE16(0xFFFF))
 205                         break;
 206                 ether_type = ((const struct rte_flow_item_vlan *)
 207                                 (item->spec))->inner_type;
 208                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 209                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 210                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 211                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 212                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 213                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 214                 else
 215                         ret = RTE_FLOW_ITEM_TYPE_END;
 216                 break;
 217         case RTE_FLOW_ITEM_TYPE_IPV4:
 218                 if (item->mask)
 219                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 220                                         (item->mask))->hdr.next_proto_id;
 221                 else
 222                         ip_next_proto_m =
 223                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 224                 if (ip_next_proto_m != 0xFF)
 225                         break;
 226                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 227                                 (item->spec))->hdr.next_proto_id;
 228                 if (ip_next_proto == IPPROTO_UDP)
 229                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 230                 else if (ip_next_proto == IPPROTO_TCP)
 231                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 232                 else if (ip_next_proto == IPPROTO_IP)
 233                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 234                 else if (ip_next_proto == IPPROTO_IPV6)
 235                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 236                 else
 237                         ret = RTE_FLOW_ITEM_TYPE_END;
 238                 break;
 239         case RTE_FLOW_ITEM_TYPE_IPV6:
 240                 if (item->mask)
 241                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 242                                                 (item->mask))->hdr.proto;
 243                 else
 244                         ip_next_proto_m =
 245                                 rte_flow_item_ipv6_mask.hdr.proto;
 246                 if (ip_next_proto_m != 0xFF)
 247                         break;
 248                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 249                                 (item->spec))->hdr.proto;
 250                 if (ip_next_proto == IPPROTO_UDP)
 251                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 252                 else if (ip_next_proto == IPPROTO_TCP)
 253                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 254                 else if (ip_next_proto == IPPROTO_IP)
 255                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 256                 else if (ip_next_proto == IPPROTO_IPV6)
 257                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 258                 else
 259                         ret = RTE_FLOW_ITEM_TYPE_END;
 260                 break;
 261         default:
 262                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 263                 break;
 264         }
 265         return ret;
 266 }
 267
 268 static const int *
 269 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
 270                 const int *next_node)
 271 {
 272         const struct mlx5_flow_expand_node *node = NULL;
 273         const int *next = next_node;
 274
 275         while (next && *next) {
 276                 /*
 277                  * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
 278                  * flag set, because they were not found in the flow pattern.
 279                  */
 280                 node = &graph[*next];
 281                 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
 282                         break;
 283                 next = node->next;
 284         }
 285         return next;
 286 }
 287
 288 #define MLX5_RSS_EXP_ELT_N 16
 289
 290 /**
 291  * Expand RSS flows into several possible flows according to the RSS hash
 292  * fields requested and the driver capabilities.
 293  *
 294  * @param[out] buf
 295  *   Buffer to store the result expansion.
 296  * @param[in] size
 297  *   Buffer size in bytes. If 0, @p buf can be NULL.
 298  * @param[in] pattern
 299  *   User flow pattern.
 300  * @param[in] types
 301  *   RSS types to expand (see RTE_ETH_RSS_* definitions).
 302  * @param[in] graph
 303  *   Input graph to expand @p pattern according to @p types.
 304  * @param[in] graph_root_index
 305  *   Index of root node in @p graph, typically 0.
 306  *
 307  * @return
 308  *   A positive value representing the size of @p buf in bytes regardless of
 309  *   @p size on success, a negative errno value otherwise and rte_errno is
 310  *   set, the following errors are defined:
 311  *
 312  *   -E2BIG: graph-depth @p graph is too deep.
 313  *   -EINVAL: @p size has not enough space for expanded pattern.
 314  */
 315 static int
 316 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 317                      const struct rte_flow_item *pattern, uint64_t types,
 318                      const struct mlx5_flow_expand_node graph[],
 319                      int graph_root_index)
 320 {
 321         const struct rte_flow_item *item;
 322         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 323         const int *next_node;
 324         const int *stack[MLX5_RSS_EXP_ELT_N];
 325         int stack_pos = 0;
 326         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 327         unsigned int i, item_idx, last_expand_item_idx = 0;
 328         size_t lsize;
 329         size_t user_pattern_size = 0;
 330         void *addr = NULL;
 331         const struct mlx5_flow_expand_node *next = NULL;
 332         struct rte_flow_item missed_item;
 333         int missed = 0;
 334         int elt = 0;
 335         const struct rte_flow_item *last_expand_item = NULL;
 336
 337         memset(&missed_item, 0, sizeof(missed_item));
 338         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 339                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 340         if (lsize > size)
 341                 return -EINVAL;
 342         buf->entry[0].priority = 0;
 343         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 344         buf->entries = 0;
 345         addr = buf->entry[0].pattern;
 346         for (item = pattern, item_idx = 0;
 347                         item->type != RTE_FLOW_ITEM_TYPE_END;
 348                         item++, item_idx++) {
 349                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 350                         user_pattern_size += sizeof(*item);
 351                         continue;
 352                 }
 353                 last_expand_item = item;
 354                 last_expand_item_idx = item_idx;
 355                 i = 0;
 356                 while (node->next && node->next[i]) {
 357                         next = &graph[node->next[i]];
 358                         if (next->type == item->type)
 359                                 break;
 360                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 361                                 node = next;
 362                                 i = 0;
 363                         } else {
 364                                 ++i;
 365                         }
 366                 }
 367                 if (next)
 368                         node = next;
 369                 user_pattern_size += sizeof(*item);
 370         }
 371         user_pattern_size += sizeof(*item); /* Handle END item. */
 372         lsize += user_pattern_size;
 373         if (lsize > size)
 374                 return -EINVAL;
 375         /* Copy the user pattern in the first entry of the buffer. */
 376         rte_memcpy(addr, pattern, user_pattern_size);
 377         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 378         buf->entries = 1;
 379         /* Start expanding. */
 380         memset(flow_items, 0, sizeof(flow_items));
 381         user_pattern_size -= sizeof(*item);
 382         /*
 383          * Check if the last valid item has spec set, need complete pattern,
 384          * and the pattern can be used for expansion.
 385          */
 386         missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
 387         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 388                 /* Item type END indicates expansion is not required. */
 389                 return lsize;
 390         }
 391         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 392                 next = NULL;
 393                 missed = 1;
 394                 i = 0;
 395                 while (node->next && node->next[i]) {
 396                         next = &graph[node->next[i]];
 397                         if (next->type == missed_item.type) {
 398                                 flow_items[0].type = missed_item.type;
 399                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 400                                 break;
 401                         }
 402                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 403                                 node = next;
 404                                 i = 0;
 405                         } else {
 406                                 ++i;
 407                         }
 408                         next = NULL;
 409                 }
 410         }
 411         if (next && missed) {
 412                 elt = 2; /* missed item + item end. */
 413                 node = next;
 414                 lsize += elt * sizeof(*item) + user_pattern_size;
 415                 if (lsize > size)
 416                         return -EINVAL;
 417                 if (node->rss_types & types) {
 418                         buf->entry[buf->entries].priority = 1;
 419                         buf->entry[buf->entries].pattern = addr;
 420                         buf->entries++;
 421                         rte_memcpy(addr, buf->entry[0].pattern,
 422                                    user_pattern_size);
 423                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 424                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 425                         addr = (void *)(((uintptr_t)addr) +
 426                                         elt * sizeof(*item));
 427                 }
 428         } else if (last_expand_item != NULL) {
 429                 node = mlx5_flow_expand_rss_adjust_node(pattern,
 430                                 last_expand_item_idx, graph, node);
 431         }
 432         memset(flow_items, 0, sizeof(flow_items));
 433         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 434                         node->next);
 435         stack[stack_pos] = next_node;
 436         node = next_node ? &graph[*next_node] : NULL;
 437         while (node) {
 438                 flow_items[stack_pos].type = node->type;
 439                 if (node->rss_types & types) {
 440                         size_t n;
 441                         /*
 442                          * compute the number of items to copy from the
 443                          * expansion and copy it.
 444                          * When the stack_pos is 0, there are 1 element in it,
 445                          * plus the addition END item.
 446                          */
 447                         elt = stack_pos + 2;
 448                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 449                         lsize += elt * sizeof(*item) + user_pattern_size;
 450                         if (lsize > size)
 451                                 return -EINVAL;
 452                         n = elt * sizeof(*item);
 453                         buf->entry[buf->entries].priority =
 454                                 stack_pos + 1 + missed;
 455                         buf->entry[buf->entries].pattern = addr;
 456                         buf->entries++;
 457                         rte_memcpy(addr, buf->entry[0].pattern,
 458                                    user_pattern_size);
 459                         addr = (void *)(((uintptr_t)addr) +
 460                                         user_pattern_size);
 461                         rte_memcpy(addr, &missed_item,
 462                                    missed * sizeof(*item));
 463                         addr = (void *)(((uintptr_t)addr) +
 464                                 missed * sizeof(*item));
 465                         rte_memcpy(addr, flow_items, n);
 466                         addr = (void *)(((uintptr_t)addr) + n);
 467                 }
 468                 /* Go deeper. */
 469                 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
 470                                 node->next) {
 471                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 472                                         node->next);
 473                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 474                                 rte_errno = E2BIG;
 475                                 return -rte_errno;
 476                         }
 477                         stack[stack_pos] = next_node;
 478                 } else if (*(next_node + 1)) {
 479                         /* Follow up with the next possibility. */
 480                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 481                                         ++next_node);
 482                 } else if (!stack_pos) {
 483                         /*
 484                          * Completing the traverse over the different paths.
 485                          * The next_node is advanced to the terminator.
 486                          */
 487                         ++next_node;
 488                 } else {
 489                         /* Move to the next path. */
 490                         while (stack_pos) {
 491                                 next_node = stack[--stack_pos];
 492                                 next_node++;
 493                                 if (*next_node)
 494                                         break;
 495                         }
 496                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 497                                         next_node);
 498                         stack[stack_pos] = next_node;
 499                 }
 500                 node = next_node && *next_node ? &graph[*next_node] : NULL;
 501         };
 502         return lsize;
 503 }
 504
 505 enum mlx5_expansion {
 506         MLX5_EXPANSION_ROOT,
 507         MLX5_EXPANSION_ROOT_OUTER,
 508         MLX5_EXPANSION_OUTER_ETH,
 509         MLX5_EXPANSION_OUTER_VLAN,
 510         MLX5_EXPANSION_OUTER_IPV4,
 511         MLX5_EXPANSION_OUTER_IPV4_UDP,
 512         MLX5_EXPANSION_OUTER_IPV4_TCP,
 513         MLX5_EXPANSION_OUTER_IPV6,
 514         MLX5_EXPANSION_OUTER_IPV6_UDP,
 515         MLX5_EXPANSION_OUTER_IPV6_TCP,
 516         MLX5_EXPANSION_VXLAN,
 517         MLX5_EXPANSION_STD_VXLAN,
 518         MLX5_EXPANSION_L3_VXLAN,
 519         MLX5_EXPANSION_VXLAN_GPE,
 520         MLX5_EXPANSION_GRE,
 521         MLX5_EXPANSION_NVGRE,
 522         MLX5_EXPANSION_GRE_KEY,
 523         MLX5_EXPANSION_MPLS,
 524         MLX5_EXPANSION_ETH,
 525         MLX5_EXPANSION_VLAN,
 526         MLX5_EXPANSION_IPV4,
 527         MLX5_EXPANSION_IPV4_UDP,
 528         MLX5_EXPANSION_IPV4_TCP,
 529         MLX5_EXPANSION_IPV6,
 530         MLX5_EXPANSION_IPV6_UDP,
 531         MLX5_EXPANSION_IPV6_TCP,
 532         MLX5_EXPANSION_IPV6_FRAG_EXT,
 533         MLX5_EXPANSION_GTP
 534 };
 535
 536 /** Supported expansion of items. */
 537 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 538         [MLX5_EXPANSION_ROOT] = {
 539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 540                                                   MLX5_EXPANSION_IPV4,
 541                                                   MLX5_EXPANSION_IPV6),
 542                 .type = RTE_FLOW_ITEM_TYPE_END,
 543         },
 544         [MLX5_EXPANSION_ROOT_OUTER] = {
 545                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 546                                                   MLX5_EXPANSION_OUTER_IPV4,
 547                                                   MLX5_EXPANSION_OUTER_IPV6),
 548                 .type = RTE_FLOW_ITEM_TYPE_END,
 549         },
 550         [MLX5_EXPANSION_OUTER_ETH] = {
 551                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 552                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 553                 .rss_types = 0,
 554         },
 555         [MLX5_EXPANSION_OUTER_VLAN] = {
 556                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 557                                                   MLX5_EXPANSION_OUTER_IPV6),
 558                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 559                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 560         },
 561         [MLX5_EXPANSION_OUTER_IPV4] = {
 562                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 563                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 564                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 565                          MLX5_EXPANSION_GRE,
 566                          MLX5_EXPANSION_NVGRE,
 567                          MLX5_EXPANSION_IPV4,
 568                          MLX5_EXPANSION_IPV6),
 569                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 570                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 571                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 572         },
 573         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 574                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 575                                                   MLX5_EXPANSION_VXLAN_GPE,
 576                                                   MLX5_EXPANSION_MPLS,
 577                                                   MLX5_EXPANSION_GTP),
 578                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 579                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 580         },
 581         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 582                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 583                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 584         },
 585         [MLX5_EXPANSION_OUTER_IPV6] = {
 586                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 587                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 588                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 589                          MLX5_EXPANSION_IPV4,
 590                          MLX5_EXPANSION_IPV6,
 591                          MLX5_EXPANSION_GRE,
 592                          MLX5_EXPANSION_NVGRE),
 593                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 594                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 595                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 596         },
 597         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 598                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 599                                                   MLX5_EXPANSION_VXLAN_GPE,
 600                                                   MLX5_EXPANSION_MPLS,
 601                                                   MLX5_EXPANSION_GTP),
 602                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 603                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 604         },
 605         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 606                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 607                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 608         },
 609         [MLX5_EXPANSION_VXLAN] = {
 610                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 611                                                   MLX5_EXPANSION_IPV4,
 612                                                   MLX5_EXPANSION_IPV6),
 613                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 614         },
 615         [MLX5_EXPANSION_STD_VXLAN] = {
 616                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 617                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 618         },
 619         [MLX5_EXPANSION_L3_VXLAN] = {
 620                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 621                                         MLX5_EXPANSION_IPV6),
 622                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 623         },
 624         [MLX5_EXPANSION_VXLAN_GPE] = {
 625                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 626                                                   MLX5_EXPANSION_IPV4,
 627                                                   MLX5_EXPANSION_IPV6),
 628                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 629         },
 630         [MLX5_EXPANSION_GRE] = {
 631                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 632                                                   MLX5_EXPANSION_IPV6,
 633                                                   MLX5_EXPANSION_GRE_KEY,
 634                                                   MLX5_EXPANSION_MPLS),
 635                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 636         },
 637         [MLX5_EXPANSION_GRE_KEY] = {
 638                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 639                                                   MLX5_EXPANSION_IPV6,
 640                                                   MLX5_EXPANSION_MPLS),
 641                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 642                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 643         },
 644         [MLX5_EXPANSION_NVGRE] = {
 645                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 646                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 647         },
 648         [MLX5_EXPANSION_MPLS] = {
 649                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 650                                                   MLX5_EXPANSION_IPV6,
 651                                                   MLX5_EXPANSION_ETH),
 652                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 653                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 654         },
 655         [MLX5_EXPANSION_ETH] = {
 656                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 657                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 658         },
 659         [MLX5_EXPANSION_VLAN] = {
 660                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 661                                                   MLX5_EXPANSION_IPV6),
 662                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 663                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 664         },
 665         [MLX5_EXPANSION_IPV4] = {
 666                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 667                                                   MLX5_EXPANSION_IPV4_TCP),
 668                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 669                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 670                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 671         },
 672         [MLX5_EXPANSION_IPV4_UDP] = {
 673                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 674                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 675         },
 676         [MLX5_EXPANSION_IPV4_TCP] = {
 677                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 678                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 679         },
 680         [MLX5_EXPANSION_IPV6] = {
 681                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 682                                                   MLX5_EXPANSION_IPV6_TCP,
 683                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 684                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 685                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 686                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 687         },
 688         [MLX5_EXPANSION_IPV6_UDP] = {
 689                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 690                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 691         },
 692         [MLX5_EXPANSION_IPV6_TCP] = {
 693                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 694                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 695         },
 696         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 697                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 698         },
 699         [MLX5_EXPANSION_GTP] = {
 700                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 701                                                   MLX5_EXPANSION_IPV6),
 702                 .type = RTE_FLOW_ITEM_TYPE_GTP,
 703         },
 704 };
 705
 706 static struct rte_flow_action_handle *
 707 mlx5_action_handle_create(struct rte_eth_dev *dev,
 708                           const struct rte_flow_indir_action_conf *conf,
 709                           const struct rte_flow_action *action,
 710                           struct rte_flow_error *error);
 711 static int mlx5_action_handle_destroy
 712                                 (struct rte_eth_dev *dev,
 713                                  struct rte_flow_action_handle *handle,
 714                                  struct rte_flow_error *error);
 715 static int mlx5_action_handle_update
 716                                 (struct rte_eth_dev *dev,
 717                                  struct rte_flow_action_handle *handle,
 718                                  const void *update,
 719                                  struct rte_flow_error *error);
 720 static int mlx5_action_handle_query
 721                                 (struct rte_eth_dev *dev,
 722                                  const struct rte_flow_action_handle *handle,
 723                                  void *data,
 724                                  struct rte_flow_error *error);
 725 static int
 726 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 727                     struct rte_flow_tunnel *app_tunnel,
 728                     struct rte_flow_action **actions,
 729                     uint32_t *num_of_actions,
 730                     struct rte_flow_error *error);
 731 static int
 732 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 733                        struct rte_flow_tunnel *app_tunnel,
 734                        struct rte_flow_item **items,
 735                        uint32_t *num_of_items,
 736                        struct rte_flow_error *error);
 737 static int
 738 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 739                               struct rte_flow_item *pmd_items,
 740                               uint32_t num_items, struct rte_flow_error *err);
 741 static int
 742 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 743                                 struct rte_flow_action *pmd_actions,
 744                                 uint32_t num_actions,
 745                                 struct rte_flow_error *err);
 746 static int
 747 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 748                                   struct rte_mbuf *m,
 749                                   struct rte_flow_restore_info *info,
 750                                   struct rte_flow_error *err);
 751 static struct rte_flow_item_flex_handle *
 752 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
 753                            const struct rte_flow_item_flex_conf *conf,
 754                            struct rte_flow_error *error);
 755 static int
 756 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
 757                             const struct rte_flow_item_flex_handle *handle,
 758                             struct rte_flow_error *error);
 759
 760 static const struct rte_flow_ops mlx5_flow_ops = {
 761         .validate = mlx5_flow_validate,
 762         .create = mlx5_flow_create,
 763         .destroy = mlx5_flow_destroy,
 764         .flush = mlx5_flow_flush,
 765         .isolate = mlx5_flow_isolate,
 766         .query = mlx5_flow_query,
 767         .dev_dump = mlx5_flow_dev_dump,
 768         .get_aged_flows = mlx5_flow_get_aged_flows,
 769         .action_handle_create = mlx5_action_handle_create,
 770         .action_handle_destroy = mlx5_action_handle_destroy,
 771         .action_handle_update = mlx5_action_handle_update,
 772         .action_handle_query = mlx5_action_handle_query,
 773         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 774         .tunnel_match = mlx5_flow_tunnel_match,
 775         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 776         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 777         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 778         .flex_item_create = mlx5_flow_flex_item_create,
 779         .flex_item_release = mlx5_flow_flex_item_release,
 780 };
 781
 782 /* Tunnel information. */
 783 struct mlx5_flow_tunnel_info {
 784         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 785         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 786 };
 787
 788 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 789         {
 790                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 791                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 792         },
 793         {
 794                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 795                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 796         },
 797         {
 798                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 799                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 800         },
 801         {
 802                 .tunnel = MLX5_FLOW_LAYER_GRE,
 803                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 804         },
 805         {
 806                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 807                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 808         },
 809         {
 810                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 811                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 812         },
 813         {
 814                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 815                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 816         },
 817         {
 818                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 819                 .ptype = RTE_PTYPE_TUNNEL_IP,
 820         },
 821         {
 822                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 823                 .ptype = RTE_PTYPE_TUNNEL_IP,
 824         },
 825         {
 826                 .tunnel = MLX5_FLOW_LAYER_GTP,
 827                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 828         },
 829 };
 830
 831
 832
 833 /**
 834  * Translate tag ID to register.
 835  *
 836  * @param[in] dev
 837  *   Pointer to the Ethernet device structure.
 838  * @param[in] feature
 839  *   The feature that request the register.
 840  * @param[in] id
 841  *   The request register ID.
 842  * @param[out] error
 843  *   Error description in case of any.
 844  *
 845  * @return
 846  *   The request register on success, a negative errno
 847  *   value otherwise and rte_errno is set.
 848  */
 849 int
 850 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 851                      enum mlx5_feature_name feature,
 852                      uint32_t id,
 853                      struct rte_flow_error *error)
 854 {
 855         struct mlx5_priv *priv = dev->data->dev_private;
 856         struct mlx5_dev_config *config = &priv->config;
 857         enum modify_reg start_reg;
 858         bool skip_mtr_reg = false;
 859
 860         switch (feature) {
 861         case MLX5_HAIRPIN_RX:
 862                 return REG_B;
 863         case MLX5_HAIRPIN_TX:
 864                 return REG_A;
 865         case MLX5_METADATA_RX:
 866                 switch (config->dv_xmeta_en) {
 867                 case MLX5_XMETA_MODE_LEGACY:
 868                         return REG_B;
 869                 case MLX5_XMETA_MODE_META16:
 870                         return REG_C_0;
 871                 case MLX5_XMETA_MODE_META32:
 872                         return REG_C_1;
 873                 }
 874                 break;
 875         case MLX5_METADATA_TX:
 876                 return REG_A;
 877         case MLX5_METADATA_FDB:
 878                 switch (config->dv_xmeta_en) {
 879                 case MLX5_XMETA_MODE_LEGACY:
 880                         return REG_NON;
 881                 case MLX5_XMETA_MODE_META16:
 882                         return REG_C_0;
 883                 case MLX5_XMETA_MODE_META32:
 884                         return REG_C_1;
 885                 }
 886                 break;
 887         case MLX5_FLOW_MARK:
 888                 switch (config->dv_xmeta_en) {
 889                 case MLX5_XMETA_MODE_LEGACY:
 890                         return REG_NON;
 891                 case MLX5_XMETA_MODE_META16:
 892                         return REG_C_1;
 893                 case MLX5_XMETA_MODE_META32:
 894                         return REG_C_0;
 895                 }
 896                 break;
 897         case MLX5_MTR_ID:
 898                 /*
 899                  * If meter color and meter id share one register, flow match
 900                  * should use the meter color register for match.
 901                  */
 902                 if (priv->mtr_reg_share)
 903                         return priv->mtr_color_reg;
 904                 else
 905                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 906                                REG_C_3;
 907         case MLX5_MTR_COLOR:
 908         case MLX5_ASO_FLOW_HIT:
 909         case MLX5_ASO_CONNTRACK:
 910                 /* All features use the same REG_C. */
 911                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 912                 return priv->mtr_color_reg;
 913         case MLX5_COPY_MARK:
 914                 /*
 915                  * Metadata COPY_MARK register using is in meter suffix sub
 916                  * flow while with meter. It's safe to share the same register.
 917                  */
 918                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 919         case MLX5_APP_TAG:
 920                 /*
 921                  * If meter is enable, it will engage the register for color
 922                  * match and flow match. If meter color match is not using the
 923                  * REG_C_2, need to skip the REG_C_x be used by meter color
 924                  * match.
 925                  * If meter is disable, free to use all available registers.
 926                  */
 927                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 928                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 929                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 930                 if (id > (uint32_t)(REG_C_7 - start_reg))
 931                         return rte_flow_error_set(error, EINVAL,
 932                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 933                                                   NULL, "invalid tag id");
 934                 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 935                         return rte_flow_error_set(error, ENOTSUP,
 936                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 937                                                   NULL, "unsupported tag id");
 938                 /*
 939                  * This case means meter is using the REG_C_x great than 2.
 940                  * Take care not to conflict with meter color REG_C_x.
 941                  * If the available index REG_C_y >= REG_C_x, skip the
 942                  * color register.
 943                  */
 944                 if (skip_mtr_reg && priv->sh->flow_mreg_c
 945                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 946                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 947                                 return rte_flow_error_set(error, EINVAL,
 948                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 949                                                         NULL, "invalid tag id");
 950                         if (priv->sh->flow_mreg_c
 951                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 952                                 return priv->sh->flow_mreg_c
 953                                                [id + 1 + start_reg - REG_C_0];
 954                         return rte_flow_error_set(error, ENOTSUP,
 955                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 956                                                   NULL, "unsupported tag id");
 957                 }
 958                 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0];
 959         }
 960         MLX5_ASSERT(false);
 961         return rte_flow_error_set(error, EINVAL,
 962                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 963                                   NULL, "invalid feature name");
 964 }
 965
 966 /**
 967  * Check extensive flow metadata register support.
 968  *
 969  * @param dev
 970  *   Pointer to rte_eth_dev structure.
 971  *
 972  * @return
 973  *   True if device supports extensive flow metadata register, otherwise false.
 974  */
 975 bool
 976 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 977 {
 978         struct mlx5_priv *priv = dev->data->dev_private;
 979
 980         /*
 981          * Having available reg_c can be regarded inclusively as supporting
 982          * extensive flow metadata register, which could mean,
 983          * - metadata register copy action by modify header.
 984          * - 16 modify header actions is supported.
 985          * - reg_c's are preserved across different domain (FDB and NIC) on
 986          *   packet loopback by flow lookup miss.
 987          */
 988         return priv->sh->flow_mreg_c[2] != REG_NON;
 989 }
 990
 991 /**
 992  * Get the lowest priority.
 993  *
 994  * @param[in] dev
 995  *   Pointer to the Ethernet device structure.
 996  * @param[in] attributes
 997  *   Pointer to device flow rule attributes.
 998  *
 999  * @return
1000  *   The value of lowest priority of flow.
1001  */
1002 uint32_t
1003 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
1004                           const struct rte_flow_attr *attr)
1005 {
1006         struct mlx5_priv *priv = dev->data->dev_private;
1007
1008         if (!attr->group && !attr->transfer)
1009                 return priv->sh->flow_max_priority - 2;
1010         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
1011 }
1012
1013 /**
1014  * Calculate matcher priority of the flow.
1015  *
1016  * @param[in] dev
1017  *   Pointer to the Ethernet device structure.
1018  * @param[in] attr
1019  *   Pointer to device flow rule attributes.
1020  * @param[in] subpriority
1021  *   The priority based on the items.
1022  * @param[in] external
1023  *   Flow is user flow.
1024  * @return
1025  *   The matcher priority of the flow.
1026  */
1027 uint16_t
1028 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1029                           const struct rte_flow_attr *attr,
1030                           uint32_t subpriority, bool external)
1031 {
1032         uint16_t priority = (uint16_t)attr->priority;
1033         struct mlx5_priv *priv = dev->data->dev_private;
1034
1035         if (!attr->group && !attr->transfer) {
1036                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1037                         priority = priv->sh->flow_max_priority - 1;
1038                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1039         } else if (!external && attr->transfer && attr->group == 0 &&
1040                    attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
1041                 return (priv->sh->flow_max_priority - 1) * 3;
1042         }
1043         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1044                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1045         return priority * 3 + subpriority;
1046 }
1047
1048 /**
1049  * Verify the @p item specifications (spec, last, mask) are compatible with the
1050  * NIC capabilities.
1051  *
1052  * @param[in] item
1053  *   Item specification.
1054  * @param[in] mask
1055  *   @p item->mask or flow default bit-masks.
1056  * @param[in] nic_mask
1057  *   Bit-masks covering supported fields by the NIC to compare with user mask.
1058  * @param[in] size
1059  *   Bit-masks size in bytes.
1060  * @param[in] range_accepted
1061  *   True if range of values is accepted for specific fields, false otherwise.
1062  * @param[out] error
1063  *   Pointer to error structure.
1064  *
1065  * @return
1066  *   0 on success, a negative errno value otherwise and rte_errno is set.
1067  */
1068 int
1069 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1070                           const uint8_t *mask,
1071                           const uint8_t *nic_mask,
1072                           unsigned int size,
1073                           bool range_accepted,
1074                           struct rte_flow_error *error)
1075 {
1076         unsigned int i;
1077
1078         MLX5_ASSERT(nic_mask);
1079         for (i = 0; i < size; ++i)
1080                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1081                         return rte_flow_error_set(error, ENOTSUP,
1082                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1083                                                   item,
1084                                                   "mask enables non supported"
1085                                                   " bits");
1086         if (!item->spec && (item->mask || item->last))
1087                 return rte_flow_error_set(error, EINVAL,
1088                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1089                                           "mask/last without a spec is not"
1090                                           " supported");
1091         if (item->spec && item->last && !range_accepted) {
1092                 uint8_t spec[size];
1093                 uint8_t last[size];
1094                 unsigned int i;
1095                 int ret;
1096
1097                 for (i = 0; i < size; ++i) {
1098                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1099                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1100                 }
1101                 ret = memcmp(spec, last, size);
1102                 if (ret != 0)
1103                         return rte_flow_error_set(error, EINVAL,
1104                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1105                                                   item,
1106                                                   "range is not valid");
1107         }
1108         return 0;
1109 }
1110
1111 /**
1112  * Adjust the hash fields according to the @p flow information.
1113  *
1114  * @param[in] dev_flow.
1115  *   Pointer to the mlx5_flow.
1116  * @param[in] tunnel
1117  *   1 when the hash field is for a tunnel item.
1118  * @param[in] layer_types
1119  *   RTE_ETH_RSS_* types.
1120  * @param[in] hash_fields
1121  *   Item hash fields.
1122  *
1123  * @return
1124  *   The hash fields that should be used.
1125  */
1126 uint64_t
1127 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1128                             int tunnel __rte_unused, uint64_t layer_types,
1129                             uint64_t hash_fields)
1130 {
1131 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1132         int rss_request_inner = rss_desc->level >= 2;
1133
1134         /* Check RSS hash level for tunnel. */
1135         if (tunnel && rss_request_inner)
1136                 hash_fields |= IBV_RX_HASH_INNER;
1137         else if (tunnel || rss_request_inner)
1138                 return 0;
1139 #endif
1140         /* Check if requested layer matches RSS hash fields. */
1141         if (!(rss_desc->types & layer_types))
1142                 return 0;
1143         return hash_fields;
1144 }
1145
1146 /**
1147  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1148  * if several tunnel rules are used on this queue, the tunnel ptype will be
1149  * cleared.
1150  *
1151  * @param rxq_ctrl
1152  *   Rx queue to update.
1153  */
1154 static void
1155 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1156 {
1157         unsigned int i;
1158         uint32_t tunnel_ptype = 0;
1159
1160         /* Look up for the ptype to use. */
1161         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1162                 if (!rxq_ctrl->flow_tunnels_n[i])
1163                         continue;
1164                 if (!tunnel_ptype) {
1165                         tunnel_ptype = tunnels_info[i].ptype;
1166                 } else {
1167                         tunnel_ptype = 0;
1168                         break;
1169                 }
1170         }
1171         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1172 }
1173
1174 /**
1175  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1176  * flow.
1177  *
1178  * @param[in] dev
1179  *   Pointer to the Ethernet device structure.
1180  * @param[in] dev_handle
1181  *   Pointer to device flow handle structure.
1182  */
1183 void
1184 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1185                        struct mlx5_flow_handle *dev_handle)
1186 {
1187         struct mlx5_priv *priv = dev->data->dev_private;
1188         const int mark = dev_handle->mark;
1189         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1190         struct mlx5_ind_table_obj *ind_tbl = NULL;
1191         unsigned int i;
1192
1193         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1194                 struct mlx5_hrxq *hrxq;
1195
1196                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1197                               dev_handle->rix_hrxq);
1198                 if (hrxq)
1199                         ind_tbl = hrxq->ind_table;
1200         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1201                 struct mlx5_shared_action_rss *shared_rss;
1202
1203                 shared_rss = mlx5_ipool_get
1204                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1205                          dev_handle->rix_srss);
1206                 if (shared_rss)
1207                         ind_tbl = shared_rss->ind_tbl;
1208         }
1209         if (!ind_tbl)
1210                 return;
1211         for (i = 0; i != ind_tbl->queues_n; ++i) {
1212                 int idx = ind_tbl->queues[i];
1213                 struct mlx5_rxq_ctrl *rxq_ctrl =
1214                         container_of((*priv->rxqs)[idx],
1215                                      struct mlx5_rxq_ctrl, rxq);
1216
1217                 /*
1218                  * To support metadata register copy on Tx loopback,
1219                  * this must be always enabled (metadata may arive
1220                  * from other port - not from local flows only.
1221                  */
1222                 if (priv->config.dv_flow_en &&
1223                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1224                     mlx5_flow_ext_mreg_supported(dev)) {
1225                         rxq_ctrl->rxq.mark = 1;
1226                         rxq_ctrl->flow_mark_n = 1;
1227                 } else if (mark) {
1228                         rxq_ctrl->rxq.mark = 1;
1229                         rxq_ctrl->flow_mark_n++;
1230                 }
1231                 if (tunnel) {
1232                         unsigned int j;
1233
1234                         /* Increase the counter matching the flow. */
1235                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1236                                 if ((tunnels_info[j].tunnel &
1237                                      dev_handle->layers) ==
1238                                     tunnels_info[j].tunnel) {
1239                                         rxq_ctrl->flow_tunnels_n[j]++;
1240                                         break;
1241                                 }
1242                         }
1243                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1244                 }
1245         }
1246 }
1247
1248 /**
1249  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1250  *
1251  * @param[in] dev
1252  *   Pointer to the Ethernet device structure.
1253  * @param[in] flow
1254  *   Pointer to flow structure.
1255  */
1256 static void
1257 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1258 {
1259         struct mlx5_priv *priv = dev->data->dev_private;
1260         uint32_t handle_idx;
1261         struct mlx5_flow_handle *dev_handle;
1262
1263         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1264                        handle_idx, dev_handle, next)
1265                 flow_drv_rxq_flags_set(dev, dev_handle);
1266 }
1267
1268 /**
1269  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1270  * device flow if no other flow uses it with the same kind of request.
1271  *
1272  * @param dev
1273  *   Pointer to Ethernet device.
1274  * @param[in] dev_handle
1275  *   Pointer to the device flow handle structure.
1276  */
1277 static void
1278 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1279                         struct mlx5_flow_handle *dev_handle)
1280 {
1281         struct mlx5_priv *priv = dev->data->dev_private;
1282         const int mark = dev_handle->mark;
1283         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1284         struct mlx5_ind_table_obj *ind_tbl = NULL;
1285         unsigned int i;
1286
1287         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1288                 struct mlx5_hrxq *hrxq;
1289
1290                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1291                               dev_handle->rix_hrxq);
1292                 if (hrxq)
1293                         ind_tbl = hrxq->ind_table;
1294         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1295                 struct mlx5_shared_action_rss *shared_rss;
1296
1297                 shared_rss = mlx5_ipool_get
1298                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1299                          dev_handle->rix_srss);
1300                 if (shared_rss)
1301                         ind_tbl = shared_rss->ind_tbl;
1302         }
1303         if (!ind_tbl)
1304                 return;
1305         MLX5_ASSERT(dev->data->dev_started);
1306         for (i = 0; i != ind_tbl->queues_n; ++i) {
1307                 int idx = ind_tbl->queues[i];
1308                 struct mlx5_rxq_ctrl *rxq_ctrl =
1309                         container_of((*priv->rxqs)[idx],
1310                                      struct mlx5_rxq_ctrl, rxq);
1311
1312                 if (priv->config.dv_flow_en &&
1313                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1314                     mlx5_flow_ext_mreg_supported(dev)) {
1315                         rxq_ctrl->rxq.mark = 1;
1316                         rxq_ctrl->flow_mark_n = 1;
1317                 } else if (mark) {
1318                         rxq_ctrl->flow_mark_n--;
1319                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1320                 }
1321                 if (tunnel) {
1322                         unsigned int j;
1323
1324                         /* Decrease the counter matching the flow. */
1325                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1326                                 if ((tunnels_info[j].tunnel &
1327                                      dev_handle->layers) ==
1328                                     tunnels_info[j].tunnel) {
1329                                         rxq_ctrl->flow_tunnels_n[j]--;
1330                                         break;
1331                                 }
1332                         }
1333                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1334                 }
1335         }
1336 }
1337
1338 /**
1339  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1340  * @p flow if no other flow uses it with the same kind of request.
1341  *
1342  * @param dev
1343  *   Pointer to Ethernet device.
1344  * @param[in] flow
1345  *   Pointer to the flow.
1346  */
1347 static void
1348 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1349 {
1350         struct mlx5_priv *priv = dev->data->dev_private;
1351         uint32_t handle_idx;
1352         struct mlx5_flow_handle *dev_handle;
1353
1354         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1355                        handle_idx, dev_handle, next)
1356                 flow_drv_rxq_flags_trim(dev, dev_handle);
1357 }
1358
1359 /**
1360  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1361  *
1362  * @param dev
1363  *   Pointer to Ethernet device.
1364  */
1365 static void
1366 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1367 {
1368         struct mlx5_priv *priv = dev->data->dev_private;
1369         unsigned int i;
1370
1371         for (i = 0; i != priv->rxqs_n; ++i) {
1372                 struct mlx5_rxq_ctrl *rxq_ctrl;
1373                 unsigned int j;
1374
1375                 if (!(*priv->rxqs)[i])
1376                         continue;
1377                 rxq_ctrl = container_of((*priv->rxqs)[i],
1378                                         struct mlx5_rxq_ctrl, rxq);
1379                 rxq_ctrl->flow_mark_n = 0;
1380                 rxq_ctrl->rxq.mark = 0;
1381                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1382                         rxq_ctrl->flow_tunnels_n[j] = 0;
1383                 rxq_ctrl->rxq.tunnel = 0;
1384         }
1385 }
1386
1387 /**
1388  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1389  *
1390  * @param[in] dev
1391  *   Pointer to the Ethernet device structure.
1392  */
1393 void
1394 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1395 {
1396         struct mlx5_priv *priv = dev->data->dev_private;
1397         struct mlx5_rxq_data *data;
1398         unsigned int i;
1399
1400         for (i = 0; i != priv->rxqs_n; ++i) {
1401                 if (!(*priv->rxqs)[i])
1402                         continue;
1403                 data = (*priv->rxqs)[i];
1404                 if (!rte_flow_dynf_metadata_avail()) {
1405                         data->dynf_meta = 0;
1406                         data->flow_meta_mask = 0;
1407                         data->flow_meta_offset = -1;
1408                         data->flow_meta_port_mask = 0;
1409                 } else {
1410                         data->dynf_meta = 1;
1411                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1412                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1413                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1414                 }
1415         }
1416 }
1417
1418 /*
1419  * return a pointer to the desired action in the list of actions.
1420  *
1421  * @param[in] actions
1422  *   The list of actions to search the action in.
1423  * @param[in] action
1424  *   The action to find.
1425  *
1426  * @return
1427  *   Pointer to the action in the list, if found. NULL otherwise.
1428  */
1429 const struct rte_flow_action *
1430 mlx5_flow_find_action(const struct rte_flow_action *actions,
1431                       enum rte_flow_action_type action)
1432 {
1433         if (actions == NULL)
1434                 return NULL;
1435         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1436                 if (actions->type == action)
1437                         return actions;
1438         return NULL;
1439 }
1440
1441 /*
1442  * Validate the flag action.
1443  *
1444  * @param[in] action_flags
1445  *   Bit-fields that holds the actions detected until now.
1446  * @param[in] attr
1447  *   Attributes of flow that includes this action.
1448  * @param[out] error
1449  *   Pointer to error structure.
1450  *
1451  * @return
1452  *   0 on success, a negative errno value otherwise and rte_errno is set.
1453  */
1454 int
1455 mlx5_flow_validate_action_flag(uint64_t action_flags,
1456                                const struct rte_flow_attr *attr,
1457                                struct rte_flow_error *error)
1458 {
1459         if (action_flags & MLX5_FLOW_ACTION_MARK)
1460                 return rte_flow_error_set(error, EINVAL,
1461                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1462                                           "can't mark and flag in same flow");
1463         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1464                 return rte_flow_error_set(error, EINVAL,
1465                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1466                                           "can't have 2 flag"
1467                                           " actions in same flow");
1468         if (attr->egress)
1469                 return rte_flow_error_set(error, ENOTSUP,
1470                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1471                                           "flag action not supported for "
1472                                           "egress");
1473         return 0;
1474 }
1475
1476 /*
1477  * Validate the mark action.
1478  *
1479  * @param[in] action
1480  *   Pointer to the queue action.
1481  * @param[in] action_flags
1482  *   Bit-fields that holds the actions detected until now.
1483  * @param[in] attr
1484  *   Attributes of flow that includes this action.
1485  * @param[out] error
1486  *   Pointer to error structure.
1487  *
1488  * @return
1489  *   0 on success, a negative errno value otherwise and rte_errno is set.
1490  */
1491 int
1492 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1493                                uint64_t action_flags,
1494                                const struct rte_flow_attr *attr,
1495                                struct rte_flow_error *error)
1496 {
1497         const struct rte_flow_action_mark *mark = action->conf;
1498
1499         if (!mark)
1500                 return rte_flow_error_set(error, EINVAL,
1501                                           RTE_FLOW_ERROR_TYPE_ACTION,
1502                                           action,
1503                                           "configuration cannot be null");
1504         if (mark->id >= MLX5_FLOW_MARK_MAX)
1505                 return rte_flow_error_set(error, EINVAL,
1506                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1507                                           &mark->id,
1508                                           "mark id must in 0 <= id < "
1509                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1510         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1511                 return rte_flow_error_set(error, EINVAL,
1512                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1513                                           "can't flag and mark in same flow");
1514         if (action_flags & MLX5_FLOW_ACTION_MARK)
1515                 return rte_flow_error_set(error, EINVAL,
1516                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1517                                           "can't have 2 mark actions in same"
1518                                           " flow");
1519         if (attr->egress)
1520                 return rte_flow_error_set(error, ENOTSUP,
1521                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1522                                           "mark action not supported for "
1523                                           "egress");
1524         return 0;
1525 }
1526
1527 /*
1528  * Validate the drop action.
1529  *
1530  * @param[in] action_flags
1531  *   Bit-fields that holds the actions detected until now.
1532  * @param[in] attr
1533  *   Attributes of flow that includes this action.
1534  * @param[out] error
1535  *   Pointer to error structure.
1536  *
1537  * @return
1538  *   0 on success, a negative errno value otherwise and rte_errno is set.
1539  */
1540 int
1541 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1542                                const struct rte_flow_attr *attr,
1543                                struct rte_flow_error *error)
1544 {
1545         if (attr->egress)
1546                 return rte_flow_error_set(error, ENOTSUP,
1547                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1548                                           "drop action not supported for "
1549                                           "egress");
1550         return 0;
1551 }
1552
1553 /*
1554  * Validate the queue action.
1555  *
1556  * @param[in] action
1557  *   Pointer to the queue action.
1558  * @param[in] action_flags
1559  *   Bit-fields that holds the actions detected until now.
1560  * @param[in] dev
1561  *   Pointer to the Ethernet device structure.
1562  * @param[in] attr
1563  *   Attributes of flow that includes this action.
1564  * @param[out] error
1565  *   Pointer to error structure.
1566  *
1567  * @return
1568  *   0 on success, a negative errno value otherwise and rte_errno is set.
1569  */
1570 int
1571 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1572                                 uint64_t action_flags,
1573                                 struct rte_eth_dev *dev,
1574                                 const struct rte_flow_attr *attr,
1575                                 struct rte_flow_error *error)
1576 {
1577         struct mlx5_priv *priv = dev->data->dev_private;
1578         const struct rte_flow_action_queue *queue = action->conf;
1579
1580         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1581                 return rte_flow_error_set(error, EINVAL,
1582                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1583                                           "can't have 2 fate actions in"
1584                                           " same flow");
1585         if (!priv->rxqs_n)
1586                 return rte_flow_error_set(error, EINVAL,
1587                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1588                                           NULL, "No Rx queues configured");
1589         if (queue->index >= priv->rxqs_n)
1590                 return rte_flow_error_set(error, EINVAL,
1591                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1592                                           &queue->index,
1593                                           "queue index out of range");
1594         if (!(*priv->rxqs)[queue->index])
1595                 return rte_flow_error_set(error, EINVAL,
1596                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1597                                           &queue->index,
1598                                           "queue is not configured");
1599         if (attr->egress)
1600                 return rte_flow_error_set(error, ENOTSUP,
1601                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1602                                           "queue action not supported for "
1603                                           "egress");
1604         return 0;
1605 }
1606
1607 /**
1608  * Validate queue numbers for device RSS.
1609  *
1610  * @param[in] dev
1611  *   Configured device.
1612  * @param[in] queues
1613  *   Array of queue numbers.
1614  * @param[in] queues_n
1615  *   Size of the @p queues array.
1616  * @param[out] error
1617  *   On error, filled with a textual error description.
1618  * @param[out] queue
1619  *   On error, filled with an offending queue index in @p queues array.
1620  *
1621  * @return
1622  *   0 on success, a negative errno code on error.
1623  */
1624 static int
1625 mlx5_validate_rss_queues(const struct rte_eth_dev *dev,
1626                          const uint16_t *queues, uint32_t queues_n,
1627                          const char **error, uint32_t *queue_idx)
1628 {
1629         const struct mlx5_priv *priv = dev->data->dev_private;
1630         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1631         uint32_t i;
1632
1633         for (i = 0; i != queues_n; ++i) {
1634                 struct mlx5_rxq_ctrl *rxq_ctrl;
1635
1636                 if (queues[i] >= priv->rxqs_n) {
1637                         *error = "queue index out of range";
1638                         *queue_idx = i;
1639                         return -EINVAL;
1640                 }
1641                 if (!(*priv->rxqs)[queues[i]]) {
1642                         *error =  "queue is not configured";
1643                         *queue_idx = i;
1644                         return -EINVAL;
1645                 }
1646                 rxq_ctrl = container_of((*priv->rxqs)[queues[i]],
1647                                         struct mlx5_rxq_ctrl, rxq);
1648                 if (i == 0)
1649                         rxq_type = rxq_ctrl->type;
1650                 if (rxq_type != rxq_ctrl->type) {
1651                         *error = "combining hairpin and regular RSS queues is not supported";
1652                         *queue_idx = i;
1653                         return -ENOTSUP;
1654                 }
1655         }
1656         return 0;
1657 }
1658
1659 /*
1660  * Validate the rss action.
1661  *
1662  * @param[in] dev
1663  *   Pointer to the Ethernet device structure.
1664  * @param[in] action
1665  *   Pointer to the queue action.
1666  * @param[out] error
1667  *   Pointer to error structure.
1668  *
1669  * @return
1670  *   0 on success, a negative errno value otherwise and rte_errno is set.
1671  */
1672 int
1673 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1674                          const struct rte_flow_action *action,
1675                          struct rte_flow_error *error)
1676 {
1677         struct mlx5_priv *priv = dev->data->dev_private;
1678         const struct rte_flow_action_rss *rss = action->conf;
1679         int ret;
1680         const char *message;
1681         uint32_t queue_idx;
1682
1683         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1684             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1685                 return rte_flow_error_set(error, ENOTSUP,
1686                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1687                                           &rss->func,
1688                                           "RSS hash function not supported");
1689 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1690         if (rss->level > 2)
1691 #else
1692         if (rss->level > 1)
1693 #endif
1694                 return rte_flow_error_set(error, ENOTSUP,
1695                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1696                                           &rss->level,
1697                                           "tunnel RSS is not supported");
1698         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1699         if (rss->key_len == 0 && rss->key != NULL)
1700                 return rte_flow_error_set(error, ENOTSUP,
1701                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1702                                           &rss->key_len,
1703                                           "RSS hash key length 0");
1704         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1705                 return rte_flow_error_set(error, ENOTSUP,
1706                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1707                                           &rss->key_len,
1708                                           "RSS hash key too small");
1709         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1710                 return rte_flow_error_set(error, ENOTSUP,
1711                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1712                                           &rss->key_len,
1713                                           "RSS hash key too large");
1714         if (rss->queue_num > priv->config.ind_table_max_size)
1715                 return rte_flow_error_set(error, ENOTSUP,
1716                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1717                                           &rss->queue_num,
1718                                           "number of queues too large");
1719         if (rss->types & MLX5_RSS_HF_MASK)
1720                 return rte_flow_error_set(error, ENOTSUP,
1721                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1722                                           &rss->types,
1723                                           "some RSS protocols are not"
1724                                           " supported");
1725         if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) &&
1726             !(rss->types & RTE_ETH_RSS_IP))
1727                 return rte_flow_error_set(error, EINVAL,
1728                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1729                                           "L3 partial RSS requested but L3 RSS"
1730                                           " type not specified");
1731         if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) &&
1732             !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP)))
1733                 return rte_flow_error_set(error, EINVAL,
1734                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1735                                           "L4 partial RSS requested but L4 RSS"
1736                                           " type not specified");
1737         if (!priv->rxqs_n)
1738                 return rte_flow_error_set(error, EINVAL,
1739                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1740                                           NULL, "No Rx queues configured");
1741         if (!rss->queue_num)
1742                 return rte_flow_error_set(error, EINVAL,
1743                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1744                                           NULL, "No queues configured");
1745         ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num,
1746                                        &message, &queue_idx);
1747         if (ret != 0) {
1748                 return rte_flow_error_set(error, -ret,
1749                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1750                                           &rss->queue[queue_idx], message);
1751         }
1752         return 0;
1753 }
1754
1755 /*
1756  * Validate the rss action.
1757  *
1758  * @param[in] action
1759  *   Pointer to the queue action.
1760  * @param[in] action_flags
1761  *   Bit-fields that holds the actions detected until now.
1762  * @param[in] dev
1763  *   Pointer to the Ethernet device structure.
1764  * @param[in] attr
1765  *   Attributes of flow that includes this action.
1766  * @param[in] item_flags
1767  *   Items that were detected.
1768  * @param[out] error
1769  *   Pointer to error structure.
1770  *
1771  * @return
1772  *   0 on success, a negative errno value otherwise and rte_errno is set.
1773  */
1774 int
1775 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1776                               uint64_t action_flags,
1777                               struct rte_eth_dev *dev,
1778                               const struct rte_flow_attr *attr,
1779                               uint64_t item_flags,
1780                               struct rte_flow_error *error)
1781 {
1782         const struct rte_flow_action_rss *rss = action->conf;
1783         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1784         int ret;
1785
1786         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1789                                           "can't have 2 fate actions"
1790                                           " in same flow");
1791         ret = mlx5_validate_action_rss(dev, action, error);
1792         if (ret)
1793                 return ret;
1794         if (attr->egress)
1795                 return rte_flow_error_set(error, ENOTSUP,
1796                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1797                                           "rss action not supported for "
1798                                           "egress");
1799         if (rss->level > 1 && !tunnel)
1800                 return rte_flow_error_set(error, EINVAL,
1801                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1802                                           "inner RSS is not supported for "
1803                                           "non-tunnel flows");
1804         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1805             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1806                 return rte_flow_error_set(error, EINVAL,
1807                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1808                                           "RSS on eCPRI is not supported now");
1809         }
1810         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1811             !(item_flags &
1812               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1813             rss->level > 1)
1814                 return rte_flow_error_set(error, EINVAL,
1815                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1816                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1817         return 0;
1818 }
1819
1820 /*
1821  * Validate the default miss action.
1822  *
1823  * @param[in] action_flags
1824  *   Bit-fields that holds the actions detected until now.
1825  * @param[out] error
1826  *   Pointer to error structure.
1827  *
1828  * @return
1829  *   0 on success, a negative errno value otherwise and rte_errno is set.
1830  */
1831 int
1832 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1833                                 const struct rte_flow_attr *attr,
1834                                 struct rte_flow_error *error)
1835 {
1836         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1837                 return rte_flow_error_set(error, EINVAL,
1838                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1839                                           "can't have 2 fate actions in"
1840                                           " same flow");
1841         if (attr->egress)
1842                 return rte_flow_error_set(error, ENOTSUP,
1843                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1844                                           "default miss action not supported "
1845                                           "for egress");
1846         if (attr->group)
1847                 return rte_flow_error_set(error, ENOTSUP,
1848                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1849                                           "only group 0 is supported");
1850         if (attr->transfer)
1851                 return rte_flow_error_set(error, ENOTSUP,
1852                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1853                                           NULL, "transfer is not supported");
1854         return 0;
1855 }
1856
1857 /*
1858  * Validate the count action.
1859  *
1860  * @param[in] dev
1861  *   Pointer to the Ethernet device structure.
1862  * @param[in] attr
1863  *   Attributes of flow that includes this action.
1864  * @param[out] error
1865  *   Pointer to error structure.
1866  *
1867  * @return
1868  *   0 on success, a negative errno value otherwise and rte_errno is set.
1869  */
1870 int
1871 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1872                                 const struct rte_flow_attr *attr,
1873                                 struct rte_flow_error *error)
1874 {
1875         if (attr->egress)
1876                 return rte_flow_error_set(error, ENOTSUP,
1877                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1878                                           "count action not supported for "
1879                                           "egress");
1880         return 0;
1881 }
1882
1883 /*
1884  * Validate the ASO CT action.
1885  *
1886  * @param[in] dev
1887  *   Pointer to the Ethernet device structure.
1888  * @param[in] conntrack
1889  *   Pointer to the CT action profile.
1890  * @param[out] error
1891  *   Pointer to error structure.
1892  *
1893  * @return
1894  *   0 on success, a negative errno value otherwise and rte_errno is set.
1895  */
1896 int
1897 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1898                         const struct rte_flow_action_conntrack *conntrack,
1899                         struct rte_flow_error *error)
1900 {
1901         RTE_SET_USED(dev);
1902
1903         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1904                 return rte_flow_error_set(error, EINVAL,
1905                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1906                                           "Invalid CT state");
1907         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1908                 return rte_flow_error_set(error, EINVAL,
1909                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1910                                           "Invalid last TCP packet flag");
1911         return 0;
1912 }
1913
1914 /**
1915  * Verify the @p attributes will be correctly understood by the NIC and store
1916  * them in the @p flow if everything is correct.
1917  *
1918  * @param[in] dev
1919  *   Pointer to the Ethernet device structure.
1920  * @param[in] attributes
1921  *   Pointer to flow attributes
1922  * @param[out] error
1923  *   Pointer to error structure.
1924  *
1925  * @return
1926  *   0 on success, a negative errno value otherwise and rte_errno is set.
1927  */
1928 int
1929 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1930                               const struct rte_flow_attr *attributes,
1931                               struct rte_flow_error *error)
1932 {
1933         struct mlx5_priv *priv = dev->data->dev_private;
1934         uint32_t priority_max = priv->sh->flow_max_priority - 1;
1935
1936         if (attributes->group)
1937                 return rte_flow_error_set(error, ENOTSUP,
1938                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1939                                           NULL, "groups is not supported");
1940         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1941             attributes->priority >= priority_max)
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1944                                           NULL, "priority out of range");
1945         if (attributes->egress)
1946                 return rte_flow_error_set(error, ENOTSUP,
1947                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1948                                           "egress is not supported");
1949         if (attributes->transfer && !priv->config.dv_esw_en)
1950                 return rte_flow_error_set(error, ENOTSUP,
1951                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1952                                           NULL, "transfer is not supported");
1953         if (!attributes->ingress)
1954                 return rte_flow_error_set(error, EINVAL,
1955                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1956                                           NULL,
1957                                           "ingress attribute is mandatory");
1958         return 0;
1959 }
1960
1961 /**
1962  * Validate ICMP6 item.
1963  *
1964  * @param[in] item
1965  *   Item specification.
1966  * @param[in] item_flags
1967  *   Bit-fields that holds the items detected until now.
1968  * @param[in] ext_vlan_sup
1969  *   Whether extended VLAN features are supported or not.
1970  * @param[out] error
1971  *   Pointer to error structure.
1972  *
1973  * @return
1974  *   0 on success, a negative errno value otherwise and rte_errno is set.
1975  */
1976 int
1977 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1978                                uint64_t item_flags,
1979                                uint8_t target_protocol,
1980                                struct rte_flow_error *error)
1981 {
1982         const struct rte_flow_item_icmp6 *mask = item->mask;
1983         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1984         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1985                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1986         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1987                                       MLX5_FLOW_LAYER_OUTER_L4;
1988         int ret;
1989
1990         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1991                 return rte_flow_error_set(error, EINVAL,
1992                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1993                                           "protocol filtering not compatible"
1994                                           " with ICMP6 layer");
1995         if (!(item_flags & l3m))
1996                 return rte_flow_error_set(error, EINVAL,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "IPv6 is mandatory to filter on"
1999                                           " ICMP6");
2000         if (item_flags & l4m)
2001                 return rte_flow_error_set(error, EINVAL,
2002                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2003                                           "multiple L4 layers not supported");
2004         if (!mask)
2005                 mask = &rte_flow_item_icmp6_mask;
2006         ret = mlx5_flow_item_acceptable
2007                 (item, (const uint8_t *)mask,
2008                  (const uint8_t *)&rte_flow_item_icmp6_mask,
2009                  sizeof(struct rte_flow_item_icmp6),
2010                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2011         if (ret < 0)
2012                 return ret;
2013         return 0;
2014 }
2015
2016 /**
2017  * Validate ICMP item.
2018  *
2019  * @param[in] item
2020  *   Item specification.
2021  * @param[in] item_flags
2022  *   Bit-fields that holds the items detected until now.
2023  * @param[out] error
2024  *   Pointer to error structure.
2025  *
2026  * @return
2027  *   0 on success, a negative errno value otherwise and rte_errno is set.
2028  */
2029 int
2030 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
2031                              uint64_t item_flags,
2032                              uint8_t target_protocol,
2033                              struct rte_flow_error *error)
2034 {
2035         const struct rte_flow_item_icmp *mask = item->mask;
2036         const struct rte_flow_item_icmp nic_mask = {
2037                 .hdr.icmp_type = 0xff,
2038                 .hdr.icmp_code = 0xff,
2039                 .hdr.icmp_ident = RTE_BE16(0xffff),
2040                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
2041         };
2042         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2043         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2044                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2045         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2046                                       MLX5_FLOW_LAYER_OUTER_L4;
2047         int ret;
2048
2049         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
2050                 return rte_flow_error_set(error, EINVAL,
2051                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2052                                           "protocol filtering not compatible"
2053                                           " with ICMP layer");
2054         if (!(item_flags & l3m))
2055                 return rte_flow_error_set(error, EINVAL,
2056                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2057                                           "IPv4 is mandatory to filter"
2058                                           " on ICMP");
2059         if (item_flags & l4m)
2060                 return rte_flow_error_set(error, EINVAL,
2061                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2062                                           "multiple L4 layers not supported");
2063         if (!mask)
2064                 mask = &nic_mask;
2065         ret = mlx5_flow_item_acceptable
2066                 (item, (const uint8_t *)mask,
2067                  (const uint8_t *)&nic_mask,
2068                  sizeof(struct rte_flow_item_icmp),
2069                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2070         if (ret < 0)
2071                 return ret;
2072         return 0;
2073 }
2074
2075 /**
2076  * Validate Ethernet item.
2077  *
2078  * @param[in] item
2079  *   Item specification.
2080  * @param[in] item_flags
2081  *   Bit-fields that holds the items detected until now.
2082  * @param[out] error
2083  *   Pointer to error structure.
2084  *
2085  * @return
2086  *   0 on success, a negative errno value otherwise and rte_errno is set.
2087  */
2088 int
2089 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2090                             uint64_t item_flags, bool ext_vlan_sup,
2091                             struct rte_flow_error *error)
2092 {
2093         const struct rte_flow_item_eth *mask = item->mask;
2094         const struct rte_flow_item_eth nic_mask = {
2095                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2096                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2097                 .type = RTE_BE16(0xffff),
2098                 .has_vlan = ext_vlan_sup ? 1 : 0,
2099         };
2100         int ret;
2101         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2102         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2103                                        MLX5_FLOW_LAYER_OUTER_L2;
2104
2105         if (item_flags & ethm)
2106                 return rte_flow_error_set(error, ENOTSUP,
2107                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2108                                           "multiple L2 layers not supported");
2109         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2110             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2111                 return rte_flow_error_set(error, EINVAL,
2112                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2113                                           "L2 layer should not follow "
2114                                           "L3 layers");
2115         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2116             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2117                 return rte_flow_error_set(error, EINVAL,
2118                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2119                                           "L2 layer should not follow VLAN");
2120         if (item_flags & MLX5_FLOW_LAYER_GTP)
2121                 return rte_flow_error_set(error, EINVAL,
2122                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2123                                           "L2 layer should not follow GTP");
2124         if (!mask)
2125                 mask = &rte_flow_item_eth_mask;
2126         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2127                                         (const uint8_t *)&nic_mask,
2128                                         sizeof(struct rte_flow_item_eth),
2129                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2130         return ret;
2131 }
2132
2133 /**
2134  * Validate VLAN item.
2135  *
2136  * @param[in] item
2137  *   Item specification.
2138  * @param[in] item_flags
2139  *   Bit-fields that holds the items detected until now.
2140  * @param[in] dev
2141  *   Ethernet device flow is being created on.
2142  * @param[out] error
2143  *   Pointer to error structure.
2144  *
2145  * @return
2146  *   0 on success, a negative errno value otherwise and rte_errno is set.
2147  */
2148 int
2149 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2150                              uint64_t item_flags,
2151                              struct rte_eth_dev *dev,
2152                              struct rte_flow_error *error)
2153 {
2154         const struct rte_flow_item_vlan *spec = item->spec;
2155         const struct rte_flow_item_vlan *mask = item->mask;
2156         const struct rte_flow_item_vlan nic_mask = {
2157                 .tci = RTE_BE16(UINT16_MAX),
2158                 .inner_type = RTE_BE16(UINT16_MAX),
2159         };
2160         uint16_t vlan_tag = 0;
2161         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2162         int ret;
2163         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2164                                         MLX5_FLOW_LAYER_INNER_L4) :
2165                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2166                                         MLX5_FLOW_LAYER_OUTER_L4);
2167         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2168                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2169
2170         if (item_flags & vlanm)
2171                 return rte_flow_error_set(error, EINVAL,
2172                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2173                                           "multiple VLAN layers not supported");
2174         else if ((item_flags & l34m) != 0)
2175                 return rte_flow_error_set(error, EINVAL,
2176                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2177                                           "VLAN cannot follow L3/L4 layer");
2178         if (!mask)
2179                 mask = &rte_flow_item_vlan_mask;
2180         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2181                                         (const uint8_t *)&nic_mask,
2182                                         sizeof(struct rte_flow_item_vlan),
2183                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2184         if (ret)
2185                 return ret;
2186         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2187                 struct mlx5_priv *priv = dev->data->dev_private;
2188
2189                 if (priv->vmwa_context) {
2190                         /*
2191                          * Non-NULL context means we have a virtual machine
2192                          * and SR-IOV enabled, we have to create VLAN interface
2193                          * to make hypervisor to setup E-Switch vport
2194                          * context correctly. We avoid creating the multiple
2195                          * VLAN interfaces, so we cannot support VLAN tag mask.
2196                          */
2197                         return rte_flow_error_set(error, EINVAL,
2198                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2199                                                   item,
2200                                                   "VLAN tag mask is not"
2201                                                   " supported in virtual"
2202                                                   " environment");
2203                 }
2204         }
2205         if (spec) {
2206                 vlan_tag = spec->tci;
2207                 vlan_tag &= mask->tci;
2208         }
2209         /*
2210          * From verbs perspective an empty VLAN is equivalent
2211          * to a packet without VLAN layer.
2212          */
2213         if (!vlan_tag)
2214                 return rte_flow_error_set(error, EINVAL,
2215                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2216                                           item->spec,
2217                                           "VLAN cannot be empty");
2218         return 0;
2219 }
2220
2221 /**
2222  * Validate IPV4 item.
2223  *
2224  * @param[in] item
2225  *   Item specification.
2226  * @param[in] item_flags
2227  *   Bit-fields that holds the items detected until now.
2228  * @param[in] last_item
2229  *   Previous validated item in the pattern items.
2230  * @param[in] ether_type
2231  *   Type in the ethernet layer header (including dot1q).
2232  * @param[in] acc_mask
2233  *   Acceptable mask, if NULL default internal default mask
2234  *   will be used to check whether item fields are supported.
2235  * @param[in] range_accepted
2236  *   True if range of values is accepted for specific fields, false otherwise.
2237  * @param[out] error
2238  *   Pointer to error structure.
2239  *
2240  * @return
2241  *   0 on success, a negative errno value otherwise and rte_errno is set.
2242  */
2243 int
2244 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2245                              uint64_t item_flags,
2246                              uint64_t last_item,
2247                              uint16_t ether_type,
2248                              const struct rte_flow_item_ipv4 *acc_mask,
2249                              bool range_accepted,
2250                              struct rte_flow_error *error)
2251 {
2252         const struct rte_flow_item_ipv4 *mask = item->mask;
2253         const struct rte_flow_item_ipv4 *spec = item->spec;
2254         const struct rte_flow_item_ipv4 nic_mask = {
2255                 .hdr = {
2256                         .src_addr = RTE_BE32(0xffffffff),
2257                         .dst_addr = RTE_BE32(0xffffffff),
2258                         .type_of_service = 0xff,
2259                         .next_proto_id = 0xff,
2260                 },
2261         };
2262         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2263         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2264                                       MLX5_FLOW_LAYER_OUTER_L3;
2265         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2266                                       MLX5_FLOW_LAYER_OUTER_L4;
2267         int ret;
2268         uint8_t next_proto = 0xFF;
2269         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2270                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2271                                   MLX5_FLOW_LAYER_INNER_VLAN);
2272
2273         if ((last_item & l2_vlan) && ether_type &&
2274             ether_type != RTE_ETHER_TYPE_IPV4)
2275                 return rte_flow_error_set(error, EINVAL,
2276                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2277                                           "IPv4 cannot follow L2/VLAN layer "
2278                                           "which ether type is not IPv4");
2279         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2280                 if (mask && spec)
2281                         next_proto = mask->hdr.next_proto_id &
2282                                      spec->hdr.next_proto_id;
2283                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2284                         return rte_flow_error_set(error, EINVAL,
2285                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2286                                                   item,
2287                                                   "multiple tunnel "
2288                                                   "not supported");
2289         }
2290         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2291                 return rte_flow_error_set(error, EINVAL,
2292                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2293                                           "wrong tunnel type - IPv6 specified "
2294                                           "but IPv4 item provided");
2295         if (item_flags & l3m)
2296                 return rte_flow_error_set(error, ENOTSUP,
2297                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2298                                           "multiple L3 layers not supported");
2299         else if (item_flags & l4m)
2300                 return rte_flow_error_set(error, EINVAL,
2301                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2302                                           "L3 cannot follow an L4 layer.");
2303         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2304                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2305                 return rte_flow_error_set(error, EINVAL,
2306                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2307                                           "L3 cannot follow an NVGRE layer.");
2308         if (!mask)
2309                 mask = &rte_flow_item_ipv4_mask;
2310         else if (mask->hdr.next_proto_id != 0 &&
2311                  mask->hdr.next_proto_id != 0xff)
2312                 return rte_flow_error_set(error, EINVAL,
2313                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2314                                           "partial mask is not supported"
2315                                           " for protocol");
2316         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2317                                         acc_mask ? (const uint8_t *)acc_mask
2318                                                  : (const uint8_t *)&nic_mask,
2319                                         sizeof(struct rte_flow_item_ipv4),
2320                                         range_accepted, error);
2321         if (ret < 0)
2322                 return ret;
2323         return 0;
2324 }
2325
2326 /**
2327  * Validate IPV6 item.
2328  *
2329  * @param[in] item
2330  *   Item specification.
2331  * @param[in] item_flags
2332  *   Bit-fields that holds the items detected until now.
2333  * @param[in] last_item
2334  *   Previous validated item in the pattern items.
2335  * @param[in] ether_type
2336  *   Type in the ethernet layer header (including dot1q).
2337  * @param[in] acc_mask
2338  *   Acceptable mask, if NULL default internal default mask
2339  *   will be used to check whether item fields are supported.
2340  * @param[out] error
2341  *   Pointer to error structure.
2342  *
2343  * @return
2344  *   0 on success, a negative errno value otherwise and rte_errno is set.
2345  */
2346 int
2347 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2348                              uint64_t item_flags,
2349                              uint64_t last_item,
2350                              uint16_t ether_type,
2351                              const struct rte_flow_item_ipv6 *acc_mask,
2352                              struct rte_flow_error *error)
2353 {
2354         const struct rte_flow_item_ipv6 *mask = item->mask;
2355         const struct rte_flow_item_ipv6 *spec = item->spec;
2356         const struct rte_flow_item_ipv6 nic_mask = {
2357                 .hdr = {
2358                         .src_addr =
2359                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2360                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2361                         .dst_addr =
2362                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2363                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2364                         .vtc_flow = RTE_BE32(0xffffffff),
2365                         .proto = 0xff,
2366                 },
2367         };
2368         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2369         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2370                                       MLX5_FLOW_LAYER_OUTER_L3;
2371         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2372                                       MLX5_FLOW_LAYER_OUTER_L4;
2373         int ret;
2374         uint8_t next_proto = 0xFF;
2375         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2376                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2377                                   MLX5_FLOW_LAYER_INNER_VLAN);
2378
2379         if ((last_item & l2_vlan) && ether_type &&
2380             ether_type != RTE_ETHER_TYPE_IPV6)
2381                 return rte_flow_error_set(error, EINVAL,
2382                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2383                                           "IPv6 cannot follow L2/VLAN layer "
2384                                           "which ether type is not IPv6");
2385         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2386                 next_proto = spec->hdr.proto;
2387         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2388                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2389                         return rte_flow_error_set(error, EINVAL,
2390                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2391                                                   item,
2392                                                   "multiple tunnel "
2393                                                   "not supported");
2394         }
2395         if (next_proto == IPPROTO_HOPOPTS  ||
2396             next_proto == IPPROTO_ROUTING  ||
2397             next_proto == IPPROTO_FRAGMENT ||
2398             next_proto == IPPROTO_ESP      ||
2399             next_proto == IPPROTO_AH       ||
2400             next_proto == IPPROTO_DSTOPTS)
2401                 return rte_flow_error_set(error, EINVAL,
2402                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2403                                           "IPv6 proto (next header) should "
2404                                           "not be set as extension header");
2405         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2406                 return rte_flow_error_set(error, EINVAL,
2407                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2408                                           "wrong tunnel type - IPv4 specified "
2409                                           "but IPv6 item provided");
2410         if (item_flags & l3m)
2411                 return rte_flow_error_set(error, ENOTSUP,
2412                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2413                                           "multiple L3 layers not supported");
2414         else if (item_flags & l4m)
2415                 return rte_flow_error_set(error, EINVAL,
2416                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2417                                           "L3 cannot follow an L4 layer.");
2418         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2419                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2420                 return rte_flow_error_set(error, EINVAL,
2421                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2422                                           "L3 cannot follow an NVGRE layer.");
2423         if (!mask)
2424                 mask = &rte_flow_item_ipv6_mask;
2425         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2426                                         acc_mask ? (const uint8_t *)acc_mask
2427                                                  : (const uint8_t *)&nic_mask,
2428                                         sizeof(struct rte_flow_item_ipv6),
2429                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2430         if (ret < 0)
2431                 return ret;
2432         return 0;
2433 }
2434
2435 /**
2436  * Validate UDP item.
2437  *
2438  * @param[in] item
2439  *   Item specification.
2440  * @param[in] item_flags
2441  *   Bit-fields that holds the items detected until now.
2442  * @param[in] target_protocol
2443  *   The next protocol in the previous item.
2444  * @param[in] flow_mask
2445  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2446  * @param[out] error
2447  *   Pointer to error structure.
2448  *
2449  * @return
2450  *   0 on success, a negative errno value otherwise and rte_errno is set.
2451  */
2452 int
2453 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2454                             uint64_t item_flags,
2455                             uint8_t target_protocol,
2456                             struct rte_flow_error *error)
2457 {
2458         const struct rte_flow_item_udp *mask = item->mask;
2459         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2460         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2461                                       MLX5_FLOW_LAYER_OUTER_L3;
2462         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2463                                       MLX5_FLOW_LAYER_OUTER_L4;
2464         int ret;
2465
2466         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2467                 return rte_flow_error_set(error, EINVAL,
2468                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2469                                           "protocol filtering not compatible"
2470                                           " with UDP layer");
2471         if (!(item_flags & l3m))
2472                 return rte_flow_error_set(error, EINVAL,
2473                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2474                                           "L3 is mandatory to filter on L4");
2475         if (item_flags & l4m)
2476                 return rte_flow_error_set(error, EINVAL,
2477                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2478                                           "multiple L4 layers not supported");
2479         if (!mask)
2480                 mask = &rte_flow_item_udp_mask;
2481         ret = mlx5_flow_item_acceptable
2482                 (item, (const uint8_t *)mask,
2483                  (const uint8_t *)&rte_flow_item_udp_mask,
2484                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2485                  error);
2486         if (ret < 0)
2487                 return ret;
2488         return 0;
2489 }
2490
2491 /**
2492  * Validate TCP item.
2493  *
2494  * @param[in] item
2495  *   Item specification.
2496  * @param[in] item_flags
2497  *   Bit-fields that holds the items detected until now.
2498  * @param[in] target_protocol
2499  *   The next protocol in the previous item.
2500  * @param[out] error
2501  *   Pointer to error structure.
2502  *
2503  * @return
2504  *   0 on success, a negative errno value otherwise and rte_errno is set.
2505  */
2506 int
2507 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2508                             uint64_t item_flags,
2509                             uint8_t target_protocol,
2510                             const struct rte_flow_item_tcp *flow_mask,
2511                             struct rte_flow_error *error)
2512 {
2513         const struct rte_flow_item_tcp *mask = item->mask;
2514         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2515         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2516                                       MLX5_FLOW_LAYER_OUTER_L3;
2517         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2518                                       MLX5_FLOW_LAYER_OUTER_L4;
2519         int ret;
2520
2521         MLX5_ASSERT(flow_mask);
2522         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2523                 return rte_flow_error_set(error, EINVAL,
2524                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2525                                           "protocol filtering not compatible"
2526                                           " with TCP layer");
2527         if (!(item_flags & l3m))
2528                 return rte_flow_error_set(error, EINVAL,
2529                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2530                                           "L3 is mandatory to filter on L4");
2531         if (item_flags & l4m)
2532                 return rte_flow_error_set(error, EINVAL,
2533                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2534                                           "multiple L4 layers not supported");
2535         if (!mask)
2536                 mask = &rte_flow_item_tcp_mask;
2537         ret = mlx5_flow_item_acceptable
2538                 (item, (const uint8_t *)mask,
2539                  (const uint8_t *)flow_mask,
2540                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2541                  error);
2542         if (ret < 0)
2543                 return ret;
2544         return 0;
2545 }
2546
2547 /**
2548  * Validate VXLAN item.
2549  *
2550  * @param[in] dev
2551  *   Pointer to the Ethernet device structure.
2552  * @param[in] udp_dport
2553  *   UDP destination port
2554  * @param[in] item
2555  *   Item specification.
2556  * @param[in] item_flags
2557  *   Bit-fields that holds the items detected until now.
2558  * @param[in] attr
2559  *   Flow rule attributes.
2560  * @param[out] error
2561  *   Pointer to error structure.
2562  *
2563  * @return
2564  *   0 on success, a negative errno value otherwise and rte_errno is set.
2565  */
2566 int
2567 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2568                               uint16_t udp_dport,
2569                               const struct rte_flow_item *item,
2570                               uint64_t item_flags,
2571                               const struct rte_flow_attr *attr,
2572                               struct rte_flow_error *error)
2573 {
2574         const struct rte_flow_item_vxlan *spec = item->spec;
2575         const struct rte_flow_item_vxlan *mask = item->mask;
2576         int ret;
2577         struct mlx5_priv *priv = dev->data->dev_private;
2578         union vni {
2579                 uint32_t vlan_id;
2580                 uint8_t vni[4];
2581         } id = { .vlan_id = 0, };
2582         const struct rte_flow_item_vxlan nic_mask = {
2583                 .vni = "\xff\xff\xff",
2584                 .rsvd1 = 0xff,
2585         };
2586         const struct rte_flow_item_vxlan *valid_mask;
2587
2588         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2589                 return rte_flow_error_set(error, ENOTSUP,
2590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2591                                           "multiple tunnel layers not"
2592                                           " supported");
2593         valid_mask = &rte_flow_item_vxlan_mask;
2594         /*
2595          * Verify only UDPv4 is present as defined in
2596          * https://tools.ietf.org/html/rfc7348
2597          */
2598         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2599                 return rte_flow_error_set(error, EINVAL,
2600                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2601                                           "no outer UDP layer found");
2602         if (!mask)
2603                 mask = &rte_flow_item_vxlan_mask;
2604
2605         if (priv->sh->steering_format_version !=
2606             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2607             !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2608                 /* FDB domain & NIC domain non-zero group */
2609                 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2610                         valid_mask = &nic_mask;
2611                 /* Group zero in NIC domain */
2612                 if (!attr->group && !attr->transfer &&
2613                     priv->sh->tunnel_header_0_1)
2614                         valid_mask = &nic_mask;
2615         }
2616         ret = mlx5_flow_item_acceptable
2617                 (item, (const uint8_t *)mask,
2618                  (const uint8_t *)valid_mask,
2619                  sizeof(struct rte_flow_item_vxlan),
2620                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2621         if (ret < 0)
2622                 return ret;
2623         if (spec) {
2624                 memcpy(&id.vni[1], spec->vni, 3);
2625                 memcpy(&id.vni[1], mask->vni, 3);
2626         }
2627         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2628                 return rte_flow_error_set(error, ENOTSUP,
2629                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2630                                           "VXLAN tunnel must be fully defined");
2631         return 0;
2632 }
2633
2634 /**
2635  * Validate VXLAN_GPE item.
2636  *
2637  * @param[in] item
2638  *   Item specification.
2639  * @param[in] item_flags
2640  *   Bit-fields that holds the items detected until now.
2641  * @param[in] priv
2642  *   Pointer to the private data structure.
2643  * @param[in] target_protocol
2644  *   The next protocol in the previous item.
2645  * @param[out] error
2646  *   Pointer to error structure.
2647  *
2648  * @return
2649  *   0 on success, a negative errno value otherwise and rte_errno is set.
2650  */
2651 int
2652 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2653                                   uint64_t item_flags,
2654                                   struct rte_eth_dev *dev,
2655                                   struct rte_flow_error *error)
2656 {
2657         struct mlx5_priv *priv = dev->data->dev_private;
2658         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2659         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2660         int ret;
2661         union vni {
2662                 uint32_t vlan_id;
2663                 uint8_t vni[4];
2664         } id = { .vlan_id = 0, };
2665
2666         if (!priv->config.l3_vxlan_en)
2667                 return rte_flow_error_set(error, ENOTSUP,
2668                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2669                                           "L3 VXLAN is not enabled by device"
2670                                           " parameter and/or not configured in"
2671                                           " firmware");
2672         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2673                 return rte_flow_error_set(error, ENOTSUP,
2674                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2675                                           "multiple tunnel layers not"
2676                                           " supported");
2677         /*
2678          * Verify only UDPv4 is present as defined in
2679          * https://tools.ietf.org/html/rfc7348
2680          */
2681         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2682                 return rte_flow_error_set(error, EINVAL,
2683                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2684                                           "no outer UDP layer found");
2685         if (!mask)
2686                 mask = &rte_flow_item_vxlan_gpe_mask;
2687         ret = mlx5_flow_item_acceptable
2688                 (item, (const uint8_t *)mask,
2689                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2690                  sizeof(struct rte_flow_item_vxlan_gpe),
2691                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2692         if (ret < 0)
2693                 return ret;
2694         if (spec) {
2695                 if (spec->protocol)
2696                         return rte_flow_error_set(error, ENOTSUP,
2697                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2698                                                   item,
2699                                                   "VxLAN-GPE protocol"
2700                                                   " not supported");
2701                 memcpy(&id.vni[1], spec->vni, 3);
2702                 memcpy(&id.vni[1], mask->vni, 3);
2703         }
2704         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2705                 return rte_flow_error_set(error, ENOTSUP,
2706                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2707                                           "VXLAN-GPE tunnel must be fully"
2708                                           " defined");
2709         return 0;
2710 }
2711 /**
2712  * Validate GRE Key item.
2713  *
2714  * @param[in] item
2715  *   Item specification.
2716  * @param[in] item_flags
2717  *   Bit flags to mark detected items.
2718  * @param[in] gre_item
2719  *   Pointer to gre_item
2720  * @param[out] error
2721  *   Pointer to error structure.
2722  *
2723  * @return
2724  *   0 on success, a negative errno value otherwise and rte_errno is set.
2725  */
2726 int
2727 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2728                                 uint64_t item_flags,
2729                                 const struct rte_flow_item *gre_item,
2730                                 struct rte_flow_error *error)
2731 {
2732         const rte_be32_t *mask = item->mask;
2733         int ret = 0;
2734         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2735         const struct rte_flow_item_gre *gre_spec;
2736         const struct rte_flow_item_gre *gre_mask;
2737
2738         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2739                 return rte_flow_error_set(error, ENOTSUP,
2740                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2741                                           "Multiple GRE key not support");
2742         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2743                 return rte_flow_error_set(error, ENOTSUP,
2744                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2745                                           "No preceding GRE header");
2746         if (item_flags & MLX5_FLOW_LAYER_INNER)
2747                 return rte_flow_error_set(error, ENOTSUP,
2748                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2749                                           "GRE key following a wrong item");
2750         gre_mask = gre_item->mask;
2751         if (!gre_mask)
2752                 gre_mask = &rte_flow_item_gre_mask;
2753         gre_spec = gre_item->spec;
2754         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2755                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2756                 return rte_flow_error_set(error, EINVAL,
2757                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2758                                           "Key bit must be on");
2759
2760         if (!mask)
2761                 mask = &gre_key_default_mask;
2762         ret = mlx5_flow_item_acceptable
2763                 (item, (const uint8_t *)mask,
2764                  (const uint8_t *)&gre_key_default_mask,
2765                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2766         return ret;
2767 }
2768
2769 /**
2770  * Validate GRE item.
2771  *
2772  * @param[in] item
2773  *   Item specification.
2774  * @param[in] item_flags
2775  *   Bit flags to mark detected items.
2776  * @param[in] target_protocol
2777  *   The next protocol in the previous item.
2778  * @param[out] error
2779  *   Pointer to error structure.
2780  *
2781  * @return
2782  *   0 on success, a negative errno value otherwise and rte_errno is set.
2783  */
2784 int
2785 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2786                             uint64_t item_flags,
2787                             uint8_t target_protocol,
2788                             struct rte_flow_error *error)
2789 {
2790         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2791         const struct rte_flow_item_gre *mask = item->mask;
2792         int ret;
2793         const struct rte_flow_item_gre nic_mask = {
2794                 .c_rsvd0_ver = RTE_BE16(0xB000),
2795                 .protocol = RTE_BE16(UINT16_MAX),
2796         };
2797
2798         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2799                 return rte_flow_error_set(error, EINVAL,
2800                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2801                                           "protocol filtering not compatible"
2802                                           " with this GRE layer");
2803         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2804                 return rte_flow_error_set(error, ENOTSUP,
2805                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2806                                           "multiple tunnel layers not"
2807                                           " supported");
2808         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2809                 return rte_flow_error_set(error, ENOTSUP,
2810                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2811                                           "L3 Layer is missing");
2812         if (!mask)
2813                 mask = &rte_flow_item_gre_mask;
2814         ret = mlx5_flow_item_acceptable
2815                 (item, (const uint8_t *)mask,
2816                  (const uint8_t *)&nic_mask,
2817                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2818                  error);
2819         if (ret < 0)
2820                 return ret;
2821 #ifndef HAVE_MLX5DV_DR
2822 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2823         if (spec && (spec->protocol & mask->protocol))
2824                 return rte_flow_error_set(error, ENOTSUP,
2825                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2826                                           "without MPLS support the"
2827                                           " specification cannot be used for"
2828                                           " filtering");
2829 #endif
2830 #endif
2831         return 0;
2832 }
2833
2834 /**
2835  * Validate Geneve item.
2836  *
2837  * @param[in] item
2838  *   Item specification.
2839  * @param[in] itemFlags
2840  *   Bit-fields that holds the items detected until now.
2841  * @param[in] enPriv
2842  *   Pointer to the private data structure.
2843  * @param[out] error
2844  *   Pointer to error structure.
2845  *
2846  * @return
2847  *   0 on success, a negative errno value otherwise and rte_errno is set.
2848  */
2849
2850 int
2851 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2852                                uint64_t item_flags,
2853                                struct rte_eth_dev *dev,
2854                                struct rte_flow_error *error)
2855 {
2856         struct mlx5_priv *priv = dev->data->dev_private;
2857         const struct rte_flow_item_geneve *spec = item->spec;
2858         const struct rte_flow_item_geneve *mask = item->mask;
2859         int ret;
2860         uint16_t gbhdr;
2861         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2862                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2863         const struct rte_flow_item_geneve nic_mask = {
2864                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2865                 .vni = "\xff\xff\xff",
2866                 .protocol = RTE_BE16(UINT16_MAX),
2867         };
2868
2869         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2870                 return rte_flow_error_set(error, ENOTSUP,
2871                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2872                                           "L3 Geneve is not enabled by device"
2873                                           " parameter and/or not configured in"
2874                                           " firmware");
2875         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2876                 return rte_flow_error_set(error, ENOTSUP,
2877                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2878                                           "multiple tunnel layers not"
2879                                           " supported");
2880         /*
2881          * Verify only UDPv4 is present as defined in
2882          * https://tools.ietf.org/html/rfc7348
2883          */
2884         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2885                 return rte_flow_error_set(error, EINVAL,
2886                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2887                                           "no outer UDP layer found");
2888         if (!mask)
2889                 mask = &rte_flow_item_geneve_mask;
2890         ret = mlx5_flow_item_acceptable
2891                                   (item, (const uint8_t *)mask,
2892                                    (const uint8_t *)&nic_mask,
2893                                    sizeof(struct rte_flow_item_geneve),
2894                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2895         if (ret)
2896                 return ret;
2897         if (spec) {
2898                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2899                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2900                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2901                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2902                         return rte_flow_error_set(error, ENOTSUP,
2903                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2904                                                   item,
2905                                                   "Geneve protocol unsupported"
2906                                                   " fields are being used");
2907                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2908                         return rte_flow_error_set
2909                                         (error, ENOTSUP,
2910                                          RTE_FLOW_ERROR_TYPE_ITEM,
2911                                          item,
2912                                          "Unsupported Geneve options length");
2913         }
2914         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2915                 return rte_flow_error_set
2916                                     (error, ENOTSUP,
2917                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2918                                      "Geneve tunnel must be fully defined");
2919         return 0;
2920 }
2921
2922 /**
2923  * Validate Geneve TLV option item.
2924  *
2925  * @param[in] item
2926  *   Item specification.
2927  * @param[in] last_item
2928  *   Previous validated item in the pattern items.
2929  * @param[in] geneve_item
2930  *   Previous GENEVE item specification.
2931  * @param[in] dev
2932  *   Pointer to the rte_eth_dev structure.
2933  * @param[out] error
2934  *   Pointer to error structure.
2935  *
2936  * @return
2937  *   0 on success, a negative errno value otherwise and rte_errno is set.
2938  */
2939 int
2940 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2941                                    uint64_t last_item,
2942                                    const struct rte_flow_item *geneve_item,
2943                                    struct rte_eth_dev *dev,
2944                                    struct rte_flow_error *error)
2945 {
2946         struct mlx5_priv *priv = dev->data->dev_private;
2947         struct mlx5_dev_ctx_shared *sh = priv->sh;
2948         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2949         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2950         uint8_t data_max_supported =
2951                         hca_attr->max_geneve_tlv_option_data_len * 4;
2952         struct mlx5_dev_config *config = &priv->config;
2953         const struct rte_flow_item_geneve *geneve_spec;
2954         const struct rte_flow_item_geneve *geneve_mask;
2955         const struct rte_flow_item_geneve_opt *spec = item->spec;
2956         const struct rte_flow_item_geneve_opt *mask = item->mask;
2957         unsigned int i;
2958         unsigned int data_len;
2959         uint8_t tlv_option_len;
2960         uint16_t optlen_m, optlen_v;
2961         const struct rte_flow_item_geneve_opt full_mask = {
2962                 .option_class = RTE_BE16(0xffff),
2963                 .option_type = 0xff,
2964                 .option_len = 0x1f,
2965         };
2966
2967         if (!mask)
2968                 mask = &rte_flow_item_geneve_opt_mask;
2969         if (!spec)
2970                 return rte_flow_error_set
2971                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2972                         "Geneve TLV opt class/type/length must be specified");
2973         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2974                 return rte_flow_error_set
2975                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2976                         "Geneve TLV opt length exceeeds the limit (31)");
2977         /* Check if class type and length masks are full. */
2978         if (full_mask.option_class != mask->option_class ||
2979             full_mask.option_type != mask->option_type ||
2980             full_mask.option_len != (mask->option_len & full_mask.option_len))
2981                 return rte_flow_error_set
2982                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2983                         "Geneve TLV opt class/type/length masks must be full");
2984         /* Check if length is supported */
2985         if ((uint32_t)spec->option_len >
2986                         config->hca_attr.max_geneve_tlv_option_data_len)
2987                 return rte_flow_error_set
2988                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2989                         "Geneve TLV opt length not supported");
2990         if (config->hca_attr.max_geneve_tlv_options > 1)
2991                 DRV_LOG(DEBUG,
2992                         "max_geneve_tlv_options supports more than 1 option");
2993         /* Check GENEVE item preceding. */
2994         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2995                 return rte_flow_error_set
2996                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2997                         "Geneve opt item must be preceded with Geneve item");
2998         geneve_spec = geneve_item->spec;
2999         geneve_mask = geneve_item->mask ? geneve_item->mask :
3000                                           &rte_flow_item_geneve_mask;
3001         /* Check if GENEVE TLV option size doesn't exceed option length */
3002         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
3003                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
3004                 tlv_option_len = spec->option_len & mask->option_len;
3005                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
3006                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
3007                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
3008                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
3009                 if ((optlen_v & optlen_m) <= tlv_option_len)
3010                         return rte_flow_error_set
3011                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3012                                  "GENEVE TLV option length exceeds optlen");
3013         }
3014         /* Check if length is 0 or data is 0. */
3015         if (spec->data == NULL || spec->option_len == 0)
3016                 return rte_flow_error_set
3017                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3018                         "Geneve TLV opt with zero data/length not supported");
3019         /* Check not all data & mask are 0. */
3020         data_len = spec->option_len * 4;
3021         if (mask->data == NULL) {
3022                 for (i = 0; i < data_len; i++)
3023                         if (spec->data[i])
3024                                 break;
3025                 if (i == data_len)
3026                         return rte_flow_error_set(error, ENOTSUP,
3027                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3028                                 "Can't match on Geneve option data 0");
3029         } else {
3030                 for (i = 0; i < data_len; i++)
3031                         if (spec->data[i] & mask->data[i])
3032                                 break;
3033                 if (i == data_len)
3034                         return rte_flow_error_set(error, ENOTSUP,
3035                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3036                                 "Can't match on Geneve option data and mask 0");
3037                 /* Check data mask supported. */
3038                 for (i = data_max_supported; i < data_len ; i++)
3039                         if (mask->data[i])
3040                                 return rte_flow_error_set(error, ENOTSUP,
3041                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
3042                                         "Data mask is of unsupported size");
3043         }
3044         /* Check GENEVE option is supported in NIC. */
3045         if (!config->hca_attr.geneve_tlv_opt)
3046                 return rte_flow_error_set
3047                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3048                         "Geneve TLV opt not supported");
3049         /* Check if we already have geneve option with different type/class. */
3050         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
3051         geneve_opt_resource = sh->geneve_tlv_option_resource;
3052         if (geneve_opt_resource != NULL)
3053                 if (geneve_opt_resource->option_class != spec->option_class ||
3054                     geneve_opt_resource->option_type != spec->option_type ||
3055                     geneve_opt_resource->length != spec->option_len) {
3056                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3057                         return rte_flow_error_set(error, ENOTSUP,
3058                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3059                                 "Only one Geneve TLV option supported");
3060                 }
3061         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3062         return 0;
3063 }
3064
3065 /**
3066  * Validate MPLS item.
3067  *
3068  * @param[in] dev
3069  *   Pointer to the rte_eth_dev structure.
3070  * @param[in] item
3071  *   Item specification.
3072  * @param[in] item_flags
3073  *   Bit-fields that holds the items detected until now.
3074  * @param[in] prev_layer
3075  *   The protocol layer indicated in previous item.
3076  * @param[out] error
3077  *   Pointer to error structure.
3078  *
3079  * @return
3080  *   0 on success, a negative errno value otherwise and rte_errno is set.
3081  */
3082 int
3083 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3084                              const struct rte_flow_item *item __rte_unused,
3085                              uint64_t item_flags __rte_unused,
3086                              uint64_t prev_layer __rte_unused,
3087                              struct rte_flow_error *error)
3088 {
3089 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3090         const struct rte_flow_item_mpls *mask = item->mask;
3091         struct mlx5_priv *priv = dev->data->dev_private;
3092         int ret;
3093
3094         if (!priv->config.mpls_en)
3095                 return rte_flow_error_set(error, ENOTSUP,
3096                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3097                                           "MPLS not supported or"
3098                                           " disabled in firmware"
3099                                           " configuration.");
3100         /* MPLS over UDP, GRE is allowed */
3101         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3102                             MLX5_FLOW_LAYER_GRE |
3103                             MLX5_FLOW_LAYER_GRE_KEY)))
3104                 return rte_flow_error_set(error, EINVAL,
3105                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3106                                           "protocol filtering not compatible"
3107                                           " with MPLS layer");
3108         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3109         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3110             !(item_flags & MLX5_FLOW_LAYER_GRE))
3111                 return rte_flow_error_set(error, ENOTSUP,
3112                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3113                                           "multiple tunnel layers not"
3114                                           " supported");
3115         if (!mask)
3116                 mask = &rte_flow_item_mpls_mask;
3117         ret = mlx5_flow_item_acceptable
3118                 (item, (const uint8_t *)mask,
3119                  (const uint8_t *)&rte_flow_item_mpls_mask,
3120                  sizeof(struct rte_flow_item_mpls),
3121                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3122         if (ret < 0)
3123                 return ret;
3124         return 0;
3125 #else
3126         return rte_flow_error_set(error, ENOTSUP,
3127                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3128                                   "MPLS is not supported by Verbs, please"
3129                                   " update.");
3130 #endif
3131 }
3132
3133 /**
3134  * Validate NVGRE item.
3135  *
3136  * @param[in] item
3137  *   Item specification.
3138  * @param[in] item_flags
3139  *   Bit flags to mark detected items.
3140  * @param[in] target_protocol
3141  *   The next protocol in the previous item.
3142  * @param[out] error
3143  *   Pointer to error structure.
3144  *
3145  * @return
3146  *   0 on success, a negative errno value otherwise and rte_errno is set.
3147  */
3148 int
3149 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3150                               uint64_t item_flags,
3151                               uint8_t target_protocol,
3152                               struct rte_flow_error *error)
3153 {
3154         const struct rte_flow_item_nvgre *mask = item->mask;
3155         int ret;
3156
3157         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3158                 return rte_flow_error_set(error, EINVAL,
3159                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3160                                           "protocol filtering not compatible"
3161                                           " with this GRE layer");
3162         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3163                 return rte_flow_error_set(error, ENOTSUP,
3164                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3165                                           "multiple tunnel layers not"
3166                                           " supported");
3167         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3168                 return rte_flow_error_set(error, ENOTSUP,
3169                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3170                                           "L3 Layer is missing");
3171         if (!mask)
3172                 mask = &rte_flow_item_nvgre_mask;
3173         ret = mlx5_flow_item_acceptable
3174                 (item, (const uint8_t *)mask,
3175                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3176                  sizeof(struct rte_flow_item_nvgre),
3177                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3178         if (ret < 0)
3179                 return ret;
3180         return 0;
3181 }
3182
3183 /**
3184  * Validate eCPRI item.
3185  *
3186  * @param[in] item
3187  *   Item specification.
3188  * @param[in] item_flags
3189  *   Bit-fields that holds the items detected until now.
3190  * @param[in] last_item
3191  *   Previous validated item in the pattern items.
3192  * @param[in] ether_type
3193  *   Type in the ethernet layer header (including dot1q).
3194  * @param[in] acc_mask
3195  *   Acceptable mask, if NULL default internal default mask
3196  *   will be used to check whether item fields are supported.
3197  * @param[out] error
3198  *   Pointer to error structure.
3199  *
3200  * @return
3201  *   0 on success, a negative errno value otherwise and rte_errno is set.
3202  */
3203 int
3204 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3205                               uint64_t item_flags,
3206                               uint64_t last_item,
3207                               uint16_t ether_type,
3208                               const struct rte_flow_item_ecpri *acc_mask,
3209                               struct rte_flow_error *error)
3210 {
3211         const struct rte_flow_item_ecpri *mask = item->mask;
3212         const struct rte_flow_item_ecpri nic_mask = {
3213                 .hdr = {
3214                         .common = {
3215                                 .u32 =
3216                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3217                                         .type = 0xFF,
3218                                         }).u32),
3219                         },
3220                         .dummy[0] = 0xFFFFFFFF,
3221                 },
3222         };
3223         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3224                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3225         struct rte_flow_item_ecpri mask_lo;
3226
3227         if (!(last_item & outer_l2_vlan) &&
3228             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3229                 return rte_flow_error_set(error, EINVAL,
3230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3231                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3232         if ((last_item & outer_l2_vlan) && ether_type &&
3233             ether_type != RTE_ETHER_TYPE_ECPRI)
3234                 return rte_flow_error_set(error, EINVAL,
3235                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3236                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3237         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3238                 return rte_flow_error_set(error, EINVAL,
3239                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3240                                           "eCPRI with tunnel is not supported right now");
3241         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3242                 return rte_flow_error_set(error, ENOTSUP,
3243                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3244                                           "multiple L3 layers not supported");
3245         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3246                 return rte_flow_error_set(error, EINVAL,
3247                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3248                                           "eCPRI cannot coexist with a TCP layer");
3249         /* In specification, eCPRI could be over UDP layer. */
3250         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3251                 return rte_flow_error_set(error, EINVAL,
3252                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3253                                           "eCPRI over UDP layer is not yet supported right now");
3254         /* Mask for type field in common header could be zero. */
3255         if (!mask)
3256                 mask = &rte_flow_item_ecpri_mask;
3257         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3258         /* Input mask is in big-endian format. */
3259         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3260                 return rte_flow_error_set(error, EINVAL,
3261                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3262                                           "partial mask is not supported for protocol");
3263         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3264                 return rte_flow_error_set(error, EINVAL,
3265                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3266                                           "message header mask must be after a type mask");
3267         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3268                                          acc_mask ? (const uint8_t *)acc_mask
3269                                                   : (const uint8_t *)&nic_mask,
3270                                          sizeof(struct rte_flow_item_ecpri),
3271                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3272 }
3273
3274 static int
3275 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3276                    const struct rte_flow_attr *attr __rte_unused,
3277                    const struct rte_flow_item items[] __rte_unused,
3278                    const struct rte_flow_action actions[] __rte_unused,
3279                    bool external __rte_unused,
3280                    int hairpin __rte_unused,
3281                    struct rte_flow_error *error)
3282 {
3283         return rte_flow_error_set(error, ENOTSUP,
3284                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3285 }
3286
3287 static struct mlx5_flow *
3288 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3289                   const struct rte_flow_attr *attr __rte_unused,
3290                   const struct rte_flow_item items[] __rte_unused,
3291                   const struct rte_flow_action actions[] __rte_unused,
3292                   struct rte_flow_error *error)
3293 {
3294         rte_flow_error_set(error, ENOTSUP,
3295                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3296         return NULL;
3297 }
3298
3299 static int
3300 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3301                     struct mlx5_flow *dev_flow __rte_unused,
3302                     const struct rte_flow_attr *attr __rte_unused,
3303                     const struct rte_flow_item items[] __rte_unused,
3304                     const struct rte_flow_action actions[] __rte_unused,
3305                     struct rte_flow_error *error)
3306 {
3307         return rte_flow_error_set(error, ENOTSUP,
3308                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3309 }
3310
3311 static int
3312 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3313                 struct rte_flow *flow __rte_unused,
3314                 struct rte_flow_error *error)
3315 {
3316         return rte_flow_error_set(error, ENOTSUP,
3317                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3318 }
3319
3320 static void
3321 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3322                  struct rte_flow *flow __rte_unused)
3323 {
3324 }
3325
3326 static void
3327 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3328                   struct rte_flow *flow __rte_unused)
3329 {
3330 }
3331
3332 static int
3333 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3334                 struct rte_flow *flow __rte_unused,
3335                 const struct rte_flow_action *actions __rte_unused,
3336                 void *data __rte_unused,
3337                 struct rte_flow_error *error)
3338 {
3339         return rte_flow_error_set(error, ENOTSUP,
3340                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3341 }
3342
3343 static int
3344 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3345                       uint32_t domains __rte_unused,
3346                       uint32_t flags __rte_unused)
3347 {
3348         return 0;
3349 }
3350
3351 /* Void driver to protect from null pointer reference. */
3352 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3353         .validate = flow_null_validate,
3354         .prepare = flow_null_prepare,
3355         .translate = flow_null_translate,
3356         .apply = flow_null_apply,
3357         .remove = flow_null_remove,
3358         .destroy = flow_null_destroy,
3359         .query = flow_null_query,
3360         .sync_domain = flow_null_sync_domain,
3361 };
3362
3363 /**
3364  * Select flow driver type according to flow attributes and device
3365  * configuration.
3366  *
3367  * @param[in] dev
3368  *   Pointer to the dev structure.
3369  * @param[in] attr
3370  *   Pointer to the flow attributes.
3371  *
3372  * @return
3373  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3374  */
3375 static enum mlx5_flow_drv_type
3376 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3377 {
3378         struct mlx5_priv *priv = dev->data->dev_private;
3379         /* The OS can determine first a specific flow type (DV, VERBS) */
3380         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3381
3382         if (type != MLX5_FLOW_TYPE_MAX)
3383                 return type;
3384         /* If no OS specific type - continue with DV/VERBS selection */
3385         if (attr->transfer && priv->config.dv_esw_en)
3386                 type = MLX5_FLOW_TYPE_DV;
3387         if (!attr->transfer)
3388                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3389                                                  MLX5_FLOW_TYPE_VERBS;
3390         return type;
3391 }
3392
3393 #define flow_get_drv_ops(type) flow_drv_ops[type]
3394
3395 /**
3396  * Flow driver validation API. This abstracts calling driver specific functions.
3397  * The type of flow driver is determined according to flow attributes.
3398  *
3399  * @param[in] dev
3400  *   Pointer to the dev structure.
3401  * @param[in] attr
3402  *   Pointer to the flow attributes.
3403  * @param[in] items
3404  *   Pointer to the list of items.
3405  * @param[in] actions
3406  *   Pointer to the list of actions.
3407  * @param[in] external
3408  *   This flow rule is created by request external to PMD.
3409  * @param[in] hairpin
3410  *   Number of hairpin TX actions, 0 means classic flow.
3411  * @param[out] error
3412  *   Pointer to the error structure.
3413  *
3414  * @return
3415  *   0 on success, a negative errno value otherwise and rte_errno is set.
3416  */
3417 static inline int
3418 flow_drv_validate(struct rte_eth_dev *dev,
3419                   const struct rte_flow_attr *attr,
3420                   const struct rte_flow_item items[],
3421                   const struct rte_flow_action actions[],
3422                   bool external, int hairpin, struct rte_flow_error *error)
3423 {
3424         const struct mlx5_flow_driver_ops *fops;
3425         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3426
3427         fops = flow_get_drv_ops(type);
3428         return fops->validate(dev, attr, items, actions, external,
3429                               hairpin, error);
3430 }
3431
3432 /**
3433  * Flow driver preparation API. This abstracts calling driver specific
3434  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3435  * calculates the size of memory required for device flow, allocates the memory,
3436  * initializes the device flow and returns the pointer.
3437  *
3438  * @note
3439  *   This function initializes device flow structure such as dv or verbs in
3440  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3441  *   rest. For example, adding returning device flow to flow->dev_flow list and
3442  *   setting backward reference to the flow should be done out of this function.
3443  *   layers field is not filled either.
3444  *
3445  * @param[in] dev
3446  *   Pointer to the dev structure.
3447  * @param[in] attr
3448  *   Pointer to the flow attributes.
3449  * @param[in] items
3450  *   Pointer to the list of items.
3451  * @param[in] actions
3452  *   Pointer to the list of actions.
3453  * @param[in] flow_idx
3454  *   This memory pool index to the flow.
3455  * @param[out] error
3456  *   Pointer to the error structure.
3457  *
3458  * @return
3459  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3460  */
3461 static inline struct mlx5_flow *
3462 flow_drv_prepare(struct rte_eth_dev *dev,
3463                  const struct rte_flow *flow,
3464                  const struct rte_flow_attr *attr,
3465                  const struct rte_flow_item items[],
3466                  const struct rte_flow_action actions[],
3467                  uint32_t flow_idx,
3468                  struct rte_flow_error *error)
3469 {
3470         const struct mlx5_flow_driver_ops *fops;
3471         enum mlx5_flow_drv_type type = flow->drv_type;
3472         struct mlx5_flow *mlx5_flow = NULL;
3473
3474         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3475         fops = flow_get_drv_ops(type);
3476         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3477         if (mlx5_flow)
3478                 mlx5_flow->flow_idx = flow_idx;
3479         return mlx5_flow;
3480 }
3481
3482 /**
3483  * Flow driver translation API. This abstracts calling driver specific
3484  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3485  * translates a generic flow into a driver flow. flow_drv_prepare() must
3486  * precede.
3487  *
3488  * @note
3489  *   dev_flow->layers could be filled as a result of parsing during translation
3490  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3491  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3492  *   flow->actions could be overwritten even though all the expanded dev_flows
3493  *   have the same actions.
3494  *
3495  * @param[in] dev
3496  *   Pointer to the rte dev structure.
3497  * @param[in, out] dev_flow
3498  *   Pointer to the mlx5 flow.
3499  * @param[in] attr
3500  *   Pointer to the flow attributes.
3501  * @param[in] items
3502  *   Pointer to the list of items.
3503  * @param[in] actions
3504  *   Pointer to the list of actions.
3505  * @param[out] error
3506  *   Pointer to the error structure.
3507  *
3508  * @return
3509  *   0 on success, a negative errno value otherwise and rte_errno is set.
3510  */
3511 static inline int
3512 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3513                    const struct rte_flow_attr *attr,
3514                    const struct rte_flow_item items[],
3515                    const struct rte_flow_action actions[],
3516                    struct rte_flow_error *error)
3517 {
3518         const struct mlx5_flow_driver_ops *fops;
3519         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3520
3521         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3522         fops = flow_get_drv_ops(type);
3523         return fops->translate(dev, dev_flow, attr, items, actions, error);
3524 }
3525
3526 /**
3527  * Flow driver apply API. This abstracts calling driver specific functions.
3528  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3529  * translated driver flows on to device. flow_drv_translate() must precede.
3530  *
3531  * @param[in] dev
3532  *   Pointer to Ethernet device structure.
3533  * @param[in, out] flow
3534  *   Pointer to flow structure.
3535  * @param[out] error
3536  *   Pointer to error structure.
3537  *
3538  * @return
3539  *   0 on success, a negative errno value otherwise and rte_errno is set.
3540  */
3541 static inline int
3542 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3543                struct rte_flow_error *error)
3544 {
3545         const struct mlx5_flow_driver_ops *fops;
3546         enum mlx5_flow_drv_type type = flow->drv_type;
3547
3548         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3549         fops = flow_get_drv_ops(type);
3550         return fops->apply(dev, flow, error);
3551 }
3552
3553 /**
3554  * Flow driver destroy API. This abstracts calling driver specific functions.
3555  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3556  * on device and releases resources of the flow.
3557  *
3558  * @param[in] dev
3559  *   Pointer to Ethernet device.
3560  * @param[in, out] flow
3561  *   Pointer to flow structure.
3562  */
3563 static inline void
3564 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3565 {
3566         const struct mlx5_flow_driver_ops *fops;
3567         enum mlx5_flow_drv_type type = flow->drv_type;
3568
3569         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3570         fops = flow_get_drv_ops(type);
3571         fops->destroy(dev, flow);
3572 }
3573
3574 /**
3575  * Flow driver find RSS policy tbl API. This abstracts calling driver
3576  * specific functions. Parent flow (rte_flow) should have driver
3577  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3578  *
3579  * @param[in] dev
3580  *   Pointer to Ethernet device.
3581  * @param[in, out] flow
3582  *   Pointer to flow structure.
3583  * @param[in] policy
3584  *   Pointer to meter policy table.
3585  * @param[in] rss_desc
3586  *   Pointer to rss_desc
3587  */
3588 static struct mlx5_flow_meter_sub_policy *
3589 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3590                 struct rte_flow *flow,
3591                 struct mlx5_flow_meter_policy *policy,
3592                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3593 {
3594         const struct mlx5_flow_driver_ops *fops;
3595         enum mlx5_flow_drv_type type = flow->drv_type;
3596
3597         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3598         fops = flow_get_drv_ops(type);
3599         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3600 }
3601
3602 /**
3603  * Flow driver color tag rule API. This abstracts calling driver
3604  * specific functions. Parent flow (rte_flow) should have driver
3605  * type (drv_type). It will create the color tag rules in hierarchy meter.
3606  *
3607  * @param[in] dev
3608  *   Pointer to Ethernet device.
3609  * @param[in, out] flow
3610  *   Pointer to flow structure.
3611  * @param[in] fm
3612  *   Pointer to flow meter structure.
3613  * @param[in] src_port
3614  *   The src port this extra rule should use.
3615  * @param[in] item
3616  *   The src port id match item.
3617  * @param[out] error
3618  *   Pointer to error structure.
3619  */
3620 static int
3621 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3622                 struct rte_flow *flow,
3623                 struct mlx5_flow_meter_info *fm,
3624                 int32_t src_port,
3625                 const struct rte_flow_item *item,
3626                 struct rte_flow_error *error)
3627 {
3628         const struct mlx5_flow_driver_ops *fops;
3629         enum mlx5_flow_drv_type type = flow->drv_type;
3630
3631         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3632         fops = flow_get_drv_ops(type);
3633         return fops->meter_hierarchy_rule_create(dev, fm,
3634                                                 src_port, item, error);
3635 }
3636
3637 /**
3638  * Get RSS action from the action list.
3639  *
3640  * @param[in] dev
3641  *   Pointer to Ethernet device.
3642  * @param[in] actions
3643  *   Pointer to the list of actions.
3644  * @param[in] flow
3645  *   Parent flow structure pointer.
3646  *
3647  * @return
3648  *   Pointer to the RSS action if exist, else return NULL.
3649  */
3650 static const struct rte_flow_action_rss*
3651 flow_get_rss_action(struct rte_eth_dev *dev,
3652                     const struct rte_flow_action actions[])
3653 {
3654         struct mlx5_priv *priv = dev->data->dev_private;
3655         const struct rte_flow_action_rss *rss = NULL;
3656         struct mlx5_meter_policy_action_container *acg;
3657         struct mlx5_meter_policy_action_container *acy;
3658
3659         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3660                 switch (actions->type) {
3661                 case RTE_FLOW_ACTION_TYPE_RSS:
3662                         rss = actions->conf;
3663                         break;
3664                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3665                 {
3666                         const struct rte_flow_action_sample *sample =
3667                                                                 actions->conf;
3668                         const struct rte_flow_action *act = sample->actions;
3669                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3670                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3671                                         rss = act->conf;
3672                         break;
3673                 }
3674                 case RTE_FLOW_ACTION_TYPE_METER:
3675                 {
3676                         uint32_t mtr_idx;
3677                         struct mlx5_flow_meter_info *fm;
3678                         struct mlx5_flow_meter_policy *policy;
3679                         const struct rte_flow_action_meter *mtr = actions->conf;
3680
3681                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3682                         if (fm && !fm->def_policy) {
3683                                 policy = mlx5_flow_meter_policy_find(dev,
3684                                                 fm->policy_id, NULL);
3685                                 MLX5_ASSERT(policy);
3686                                 if (policy->is_hierarchy) {
3687                                         policy =
3688                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3689                                                                         policy);
3690                                         if (!policy)
3691                                                 return NULL;
3692                                 }
3693                                 if (policy->is_rss) {
3694                                         acg =
3695                                         &policy->act_cnt[RTE_COLOR_GREEN];
3696                                         acy =
3697                                         &policy->act_cnt[RTE_COLOR_YELLOW];
3698                                         if (acg->fate_action ==
3699                                             MLX5_FLOW_FATE_SHARED_RSS)
3700                                                 rss = acg->rss->conf;
3701                                         else if (acy->fate_action ==
3702                                                  MLX5_FLOW_FATE_SHARED_RSS)
3703                                                 rss = acy->rss->conf;
3704                                 }
3705                         }
3706                         break;
3707                 }
3708                 default:
3709                         break;
3710                 }
3711         }
3712         return rss;
3713 }
3714
3715 /**
3716  * Get ASO age action by index.
3717  *
3718  * @param[in] dev
3719  *   Pointer to the Ethernet device structure.
3720  * @param[in] age_idx
3721  *   Index to the ASO age action.
3722  *
3723  * @return
3724  *   The specified ASO age action.
3725  */
3726 struct mlx5_aso_age_action*
3727 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3728 {
3729         uint16_t pool_idx = age_idx & UINT16_MAX;
3730         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3731         struct mlx5_priv *priv = dev->data->dev_private;
3732         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3733         struct mlx5_aso_age_pool *pool;
3734
3735         rte_rwlock_read_lock(&mng->resize_rwl);
3736         pool = mng->pools[pool_idx];
3737         rte_rwlock_read_unlock(&mng->resize_rwl);
3738         return &pool->actions[offset - 1];
3739 }
3740
3741 /* maps indirect action to translated direct in some actions array */
3742 struct mlx5_translated_action_handle {
3743         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3744         int index; /**< Index in related array of rte_flow_action. */
3745 };
3746
3747 /**
3748  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3749  * direct action if translation possible.
3750  * This functionality used to run same execution path for both direct and
3751  * indirect actions on flow create. All necessary preparations for indirect
3752  * action handling should be performed on *handle* actions list returned
3753  * from this call.
3754  *
3755  * @param[in] dev
3756  *   Pointer to Ethernet device.
3757  * @param[in] actions
3758  *   List of actions to translate.
3759  * @param[out] handle
3760  *   List to store translated indirect action object handles.
3761  * @param[in, out] indir_n
3762  *   Size of *handle* array. On return should be updated with number of
3763  *   indirect actions retrieved from the *actions* list.
3764  * @param[out] translated_actions
3765  *   List of actions where all indirect actions were translated to direct
3766  *   if possible. NULL if no translation took place.
3767  * @param[out] error
3768  *   Pointer to the error structure.
3769  *
3770  * @return
3771  *   0 on success, a negative errno value otherwise and rte_errno is set.
3772  */
3773 static int
3774 flow_action_handles_translate(struct rte_eth_dev *dev,
3775                               const struct rte_flow_action actions[],
3776                               struct mlx5_translated_action_handle *handle,
3777                               int *indir_n,
3778                               struct rte_flow_action **translated_actions,
3779                               struct rte_flow_error *error)
3780 {
3781         struct mlx5_priv *priv = dev->data->dev_private;
3782         struct rte_flow_action *translated = NULL;
3783         size_t actions_size;
3784         int n;
3785         int copied_n = 0;
3786         struct mlx5_translated_action_handle *handle_end = NULL;
3787
3788         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3789                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3790                         continue;
3791                 if (copied_n == *indir_n) {
3792                         return rte_flow_error_set
3793                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3794                                  NULL, "too many shared actions");
3795                 }
3796                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3797                            sizeof(actions[n].conf));
3798                 handle[copied_n].index = n;
3799                 copied_n++;
3800         }
3801         n++;
3802         *indir_n = copied_n;
3803         if (!copied_n)
3804                 return 0;
3805         actions_size = sizeof(struct rte_flow_action) * n;
3806         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3807         if (!translated) {
3808                 rte_errno = ENOMEM;
3809                 return -ENOMEM;
3810         }
3811         memcpy(translated, actions, actions_size);
3812         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3813                 struct mlx5_shared_action_rss *shared_rss;
3814                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3815                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3816                 uint32_t idx = act_idx &
3817                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3818
3819                 switch (type) {
3820                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3821                         shared_rss = mlx5_ipool_get
3822                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3823                         translated[handle->index].type =
3824                                 RTE_FLOW_ACTION_TYPE_RSS;
3825                         translated[handle->index].conf =
3826                                 &shared_rss->origin;
3827                         break;
3828                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3829                         translated[handle->index].type =
3830                                                 (enum rte_flow_action_type)
3831                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3832                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3833                         break;
3834                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3835                         if (priv->sh->flow_hit_aso_en) {
3836                                 translated[handle->index].type =
3837                                         (enum rte_flow_action_type)
3838                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3839                                 translated[handle->index].conf =
3840                                                          (void *)(uintptr_t)idx;
3841                                 break;
3842                         }
3843                         /* Fall-through */
3844                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3845                         if (priv->sh->ct_aso_en) {
3846                                 translated[handle->index].type =
3847                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3848                                 translated[handle->index].conf =
3849                                                          (void *)(uintptr_t)idx;
3850                                 break;
3851                         }
3852                         /* Fall-through */
3853                 default:
3854                         mlx5_free(translated);
3855                         return rte_flow_error_set
3856                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3857                                  NULL, "invalid indirect action type");
3858                 }
3859         }
3860         *translated_actions = translated;
3861         return 0;
3862 }
3863
3864 /**
3865  * Get Shared RSS action from the action list.
3866  *
3867  * @param[in] dev
3868  *   Pointer to Ethernet device.
3869  * @param[in] shared
3870  *   Pointer to the list of actions.
3871  * @param[in] shared_n
3872  *   Actions list length.
3873  *
3874  * @return
3875  *   The MLX5 RSS action ID if exists, otherwise return 0.
3876  */
3877 static uint32_t
3878 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3879                            struct mlx5_translated_action_handle *handle,
3880                            int shared_n)
3881 {
3882         struct mlx5_translated_action_handle *handle_end;
3883         struct mlx5_priv *priv = dev->data->dev_private;
3884         struct mlx5_shared_action_rss *shared_rss;
3885
3886
3887         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3888                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3889                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3890                 uint32_t idx = act_idx &
3891                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3892                 switch (type) {
3893                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3894                         shared_rss = mlx5_ipool_get
3895                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3896                                                                            idx);
3897                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3898                                            __ATOMIC_RELAXED);
3899                         return idx;
3900                 default:
3901                         break;
3902                 }
3903         }
3904         return 0;
3905 }
3906
3907 static unsigned int
3908 find_graph_root(uint32_t rss_level)
3909 {
3910         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3911                                MLX5_EXPANSION_ROOT_OUTER;
3912 }
3913
3914 /**
3915  *  Get layer flags from the prefix flow.
3916  *
3917  *  Some flows may be split to several subflows, the prefix subflow gets the
3918  *  match items and the suffix sub flow gets the actions.
3919  *  Some actions need the user defined match item flags to get the detail for
3920  *  the action.
3921  *  This function helps the suffix flow to get the item layer flags from prefix
3922  *  subflow.
3923  *
3924  * @param[in] dev_flow
3925  *   Pointer the created preifx subflow.
3926  *
3927  * @return
3928  *   The layers get from prefix subflow.
3929  */
3930 static inline uint64_t
3931 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3932 {
3933         uint64_t layers = 0;
3934
3935         /*
3936          * Layers bits could be localization, but usually the compiler will
3937          * help to do the optimization work for source code.
3938          * If no decap actions, use the layers directly.
3939          */
3940         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3941                 return dev_flow->handle->layers;
3942         /* Convert L3 layers with decap action. */
3943         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3944                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3945         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3946                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3947         /* Convert L4 layers with decap action.  */
3948         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3949                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3950         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3951                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3952         return layers;
3953 }
3954
3955 /**
3956  * Get metadata split action information.
3957  *
3958  * @param[in] actions
3959  *   Pointer to the list of actions.
3960  * @param[out] qrss
3961  *   Pointer to the return pointer.
3962  * @param[out] qrss_type
3963  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3964  *   if no QUEUE/RSS is found.
3965  * @param[out] encap_idx
3966  *   Pointer to the index of the encap action if exists, otherwise the last
3967  *   action index.
3968  *
3969  * @return
3970  *   Total number of actions.
3971  */
3972 static int
3973 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3974                                        const struct rte_flow_action **qrss,
3975                                        int *encap_idx)
3976 {
3977         const struct rte_flow_action_raw_encap *raw_encap;
3978         int actions_n = 0;
3979         int raw_decap_idx = -1;
3980
3981         *encap_idx = -1;
3982         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3983                 switch (actions->type) {
3984                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3985                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3986                         *encap_idx = actions_n;
3987                         break;
3988                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3989                         raw_decap_idx = actions_n;
3990                         break;
3991                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3992                         raw_encap = actions->conf;
3993                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3994                                 *encap_idx = raw_decap_idx != -1 ?
3995                                                       raw_decap_idx : actions_n;
3996                         break;
3997                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3998                 case RTE_FLOW_ACTION_TYPE_RSS:
3999                         *qrss = actions;
4000                         break;
4001                 default:
4002                         break;
4003                 }
4004                 actions_n++;
4005         }
4006         if (*encap_idx == -1)
4007                 *encap_idx = actions_n;
4008         /* Count RTE_FLOW_ACTION_TYPE_END. */
4009         return actions_n + 1;
4010 }
4011
4012 /**
4013  * Check if the action will change packet.
4014  *
4015  * @param dev
4016  *   Pointer to Ethernet device.
4017  * @param[in] type
4018  *   action type.
4019  *
4020  * @return
4021  *   true if action will change packet, false otherwise.
4022  */
4023 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
4024                                           enum rte_flow_action_type type)
4025 {
4026         struct mlx5_priv *priv = dev->data->dev_private;
4027
4028         switch (type) {
4029         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4030         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4031         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4032         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4033         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4034         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4035         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4036         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4037         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4038         case RTE_FLOW_ACTION_TYPE_SET_TTL:
4039         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4040         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4041         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4042         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4043         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4044         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4045         case RTE_FLOW_ACTION_TYPE_SET_META:
4046         case RTE_FLOW_ACTION_TYPE_SET_TAG:
4047         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4048         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4049         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4050         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4051         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4052         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4053         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4054         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4055         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4056         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4057         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
4058                 return true;
4059         case RTE_FLOW_ACTION_TYPE_FLAG:
4060         case RTE_FLOW_ACTION_TYPE_MARK:
4061                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4062                         return true;
4063                 else
4064                         return false;
4065         default:
4066                 return false;
4067         }
4068 }
4069
4070 /**
4071  * Check meter action from the action list.
4072  *
4073  * @param dev
4074  *   Pointer to Ethernet device.
4075  * @param[in] actions
4076  *   Pointer to the list of actions.
4077  * @param[out] has_mtr
4078  *   Pointer to the meter exist flag.
4079  * @param[out] has_modify
4080  *   Pointer to the flag showing there's packet change action.
4081  * @param[out] meter_id
4082  *   Pointer to the meter id.
4083  *
4084  * @return
4085  *   Total number of actions.
4086  */
4087 static int
4088 flow_check_meter_action(struct rte_eth_dev *dev,
4089                         const struct rte_flow_action actions[],
4090                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4091 {
4092         const struct rte_flow_action_meter *mtr = NULL;
4093         int actions_n = 0;
4094
4095         MLX5_ASSERT(has_mtr);
4096         *has_mtr = false;
4097         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4098                 switch (actions->type) {
4099                 case RTE_FLOW_ACTION_TYPE_METER:
4100                         mtr = actions->conf;
4101                         *meter_id = mtr->mtr_id;
4102                         *has_mtr = true;
4103                         break;
4104                 default:
4105                         break;
4106                 }
4107                 if (!*has_mtr)
4108                         *has_modify |= flow_check_modify_action_type(dev,
4109                                                                 actions->type);
4110                 actions_n++;
4111         }
4112         /* Count RTE_FLOW_ACTION_TYPE_END. */
4113         return actions_n + 1;
4114 }
4115
4116 /**
4117  * Check if the flow should be split due to hairpin.
4118  * The reason for the split is that in current HW we can't
4119  * support encap and push-vlan on Rx, so if a flow contains
4120  * these actions we move it to Tx.
4121  *
4122  * @param dev
4123  *   Pointer to Ethernet device.
4124  * @param[in] attr
4125  *   Flow rule attributes.
4126  * @param[in] actions
4127  *   Associated actions (list terminated by the END action).
4128  *
4129  * @return
4130  *   > 0 the number of actions and the flow should be split,
4131  *   0 when no split required.
4132  */
4133 static int
4134 flow_check_hairpin_split(struct rte_eth_dev *dev,
4135                          const struct rte_flow_attr *attr,
4136                          const struct rte_flow_action actions[])
4137 {
4138         int queue_action = 0;
4139         int action_n = 0;
4140         int split = 0;
4141         const struct rte_flow_action_queue *queue;
4142         const struct rte_flow_action_rss *rss;
4143         const struct rte_flow_action_raw_encap *raw_encap;
4144         const struct rte_eth_hairpin_conf *conf;
4145
4146         if (!attr->ingress)
4147                 return 0;
4148         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4149                 switch (actions->type) {
4150                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4151                         queue = actions->conf;
4152                         if (queue == NULL)
4153                                 return 0;
4154                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4155                         if (conf == NULL || conf->tx_explicit != 0)
4156                                 return 0;
4157                         queue_action = 1;
4158                         action_n++;
4159                         break;
4160                 case RTE_FLOW_ACTION_TYPE_RSS:
4161                         rss = actions->conf;
4162                         if (rss == NULL || rss->queue_num == 0)
4163                                 return 0;
4164                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4165                         if (conf == NULL || conf->tx_explicit != 0)
4166                                 return 0;
4167                         queue_action = 1;
4168                         action_n++;
4169                         break;
4170                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4171                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4172                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4173                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4174                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4175                         split++;
4176                         action_n++;
4177                         break;
4178                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4179                         raw_encap = actions->conf;
4180                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4181                                 split++;
4182                         action_n++;
4183                         break;
4184                 default:
4185                         action_n++;
4186                         break;
4187                 }
4188         }
4189         if (split && queue_action)
4190                 return action_n;
4191         return 0;
4192 }
4193
4194 /* Declare flow create/destroy prototype in advance. */
4195 static uint32_t
4196 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4197                  const struct rte_flow_attr *attr,
4198                  const struct rte_flow_item items[],
4199                  const struct rte_flow_action actions[],
4200                  bool external, struct rte_flow_error *error);
4201
4202 static void
4203 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4204                   uint32_t flow_idx);
4205
4206 int
4207 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4208                       struct mlx5_list_entry *entry, void *cb_ctx)
4209 {
4210         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4211         struct mlx5_flow_mreg_copy_resource *mcp_res =
4212                                container_of(entry, typeof(*mcp_res), hlist_ent);
4213
4214         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4215 }
4216
4217 struct mlx5_list_entry *
4218 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4219 {
4220         struct rte_eth_dev *dev = tool_ctx;
4221         struct mlx5_priv *priv = dev->data->dev_private;
4222         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4223         struct mlx5_flow_mreg_copy_resource *mcp_res;
4224         struct rte_flow_error *error = ctx->error;
4225         uint32_t idx = 0;
4226         int ret;
4227         uint32_t mark_id = *(uint32_t *)(ctx->data);
4228         struct rte_flow_attr attr = {
4229                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4230                 .ingress = 1,
4231         };
4232         struct mlx5_rte_flow_item_tag tag_spec = {
4233                 .data = mark_id,
4234         };
4235         struct rte_flow_item items[] = {
4236                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4237         };
4238         struct rte_flow_action_mark ftag = {
4239                 .id = mark_id,
4240         };
4241         struct mlx5_flow_action_copy_mreg cp_mreg = {
4242                 .dst = REG_B,
4243                 .src = REG_NON,
4244         };
4245         struct rte_flow_action_jump jump = {
4246                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4247         };
4248         struct rte_flow_action actions[] = {
4249                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4250         };
4251
4252         /* Fill the register fileds in the flow. */
4253         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4254         if (ret < 0)
4255                 return NULL;
4256         tag_spec.id = ret;
4257         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4258         if (ret < 0)
4259                 return NULL;
4260         cp_mreg.src = ret;
4261         /* Provide the full width of FLAG specific value. */
4262         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4263                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4264         /* Build a new flow. */
4265         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4266                 items[0] = (struct rte_flow_item){
4267                         .type = (enum rte_flow_item_type)
4268                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4269                         .spec = &tag_spec,
4270                 };
4271                 items[1] = (struct rte_flow_item){
4272                         .type = RTE_FLOW_ITEM_TYPE_END,
4273                 };
4274                 actions[0] = (struct rte_flow_action){
4275                         .type = (enum rte_flow_action_type)
4276                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4277                         .conf = &ftag,
4278                 };
4279                 actions[1] = (struct rte_flow_action){
4280                         .type = (enum rte_flow_action_type)
4281                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4282                         .conf = &cp_mreg,
4283                 };
4284                 actions[2] = (struct rte_flow_action){
4285                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4286                         .conf = &jump,
4287                 };
4288                 actions[3] = (struct rte_flow_action){
4289                         .type = RTE_FLOW_ACTION_TYPE_END,
4290                 };
4291         } else {
4292                 /* Default rule, wildcard match. */
4293                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4294                 items[0] = (struct rte_flow_item){
4295                         .type = RTE_FLOW_ITEM_TYPE_END,
4296                 };
4297                 actions[0] = (struct rte_flow_action){
4298                         .type = (enum rte_flow_action_type)
4299                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4300                         .conf = &cp_mreg,
4301                 };
4302                 actions[1] = (struct rte_flow_action){
4303                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4304                         .conf = &jump,
4305                 };
4306                 actions[2] = (struct rte_flow_action){
4307                         .type = RTE_FLOW_ACTION_TYPE_END,
4308                 };
4309         }
4310         /* Build a new entry. */
4311         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4312         if (!mcp_res) {
4313                 rte_errno = ENOMEM;
4314                 return NULL;
4315         }
4316         mcp_res->idx = idx;
4317         mcp_res->mark_id = mark_id;
4318         /*
4319          * The copy Flows are not included in any list. There
4320          * ones are referenced from other Flows and can not
4321          * be applied, removed, deleted in ardbitrary order
4322          * by list traversing.
4323          */
4324         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4325                                         &attr, items, actions, false, error);
4326         if (!mcp_res->rix_flow) {
4327                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4328                 return NULL;
4329         }
4330         return &mcp_res->hlist_ent;
4331 }
4332
4333 struct mlx5_list_entry *
4334 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4335                       void *cb_ctx __rte_unused)
4336 {
4337         struct rte_eth_dev *dev = tool_ctx;
4338         struct mlx5_priv *priv = dev->data->dev_private;
4339         struct mlx5_flow_mreg_copy_resource *mcp_res;
4340         uint32_t idx = 0;
4341
4342         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4343         if (!mcp_res) {
4344                 rte_errno = ENOMEM;
4345                 return NULL;
4346         }
4347         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4348         mcp_res->idx = idx;
4349         return &mcp_res->hlist_ent;
4350 }
4351
4352 void
4353 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4354 {
4355         struct mlx5_flow_mreg_copy_resource *mcp_res =
4356                                container_of(entry, typeof(*mcp_res), hlist_ent);
4357         struct rte_eth_dev *dev = tool_ctx;
4358         struct mlx5_priv *priv = dev->data->dev_private;
4359
4360         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4361 }
4362
4363 /**
4364  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4365  *
4366  * As mark_id is unique, if there's already a registered flow for the mark_id,
4367  * return by increasing the reference counter of the resource. Otherwise, create
4368  * the resource (mcp_res) and flow.
4369  *
4370  * Flow looks like,
4371  *   - If ingress port is ANY and reg_c[1] is mark_id,
4372  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4373  *
4374  * For default flow (zero mark_id), flow is like,
4375  *   - If ingress port is ANY,
4376  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4377  *
4378  * @param dev
4379  *   Pointer to Ethernet device.
4380  * @param mark_id
4381  *   ID of MARK action, zero means default flow for META.
4382  * @param[out] error
4383  *   Perform verbose error reporting if not NULL.
4384  *
4385  * @return
4386  *   Associated resource on success, NULL otherwise and rte_errno is set.
4387  */
4388 static struct mlx5_flow_mreg_copy_resource *
4389 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4390                           struct rte_flow_error *error)
4391 {
4392         struct mlx5_priv *priv = dev->data->dev_private;
4393         struct mlx5_list_entry *entry;
4394         struct mlx5_flow_cb_ctx ctx = {
4395                 .dev = dev,
4396                 .error = error,
4397                 .data = &mark_id,
4398         };
4399
4400         /* Check if already registered. */
4401         MLX5_ASSERT(priv->mreg_cp_tbl);
4402         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4403         if (!entry)
4404                 return NULL;
4405         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4406                             hlist_ent);
4407 }
4408
4409 void
4410 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4411 {
4412         struct mlx5_flow_mreg_copy_resource *mcp_res =
4413                                container_of(entry, typeof(*mcp_res), hlist_ent);
4414         struct rte_eth_dev *dev = tool_ctx;
4415         struct mlx5_priv *priv = dev->data->dev_private;
4416
4417         MLX5_ASSERT(mcp_res->rix_flow);
4418         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4419         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4420 }
4421
4422 /**
4423  * Release flow in RX_CP_TBL.
4424  *
4425  * @param dev
4426  *   Pointer to Ethernet device.
4427  * @flow
4428  *   Parent flow for wich copying is provided.
4429  */
4430 static void
4431 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4432                           struct rte_flow *flow)
4433 {
4434         struct mlx5_flow_mreg_copy_resource *mcp_res;
4435         struct mlx5_priv *priv = dev->data->dev_private;
4436
4437         if (!flow->rix_mreg_copy)
4438                 return;
4439         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4440                                  flow->rix_mreg_copy);
4441         if (!mcp_res || !priv->mreg_cp_tbl)
4442                 return;
4443         MLX5_ASSERT(mcp_res->rix_flow);
4444         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4445         flow->rix_mreg_copy = 0;
4446 }
4447
4448 /**
4449  * Remove the default copy action from RX_CP_TBL.
4450  *
4451  * This functions is called in the mlx5_dev_start(). No thread safe
4452  * is guaranteed.
4453  *
4454  * @param dev
4455  *   Pointer to Ethernet device.
4456  */
4457 static void
4458 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4459 {
4460         struct mlx5_list_entry *entry;
4461         struct mlx5_priv *priv = dev->data->dev_private;
4462         struct mlx5_flow_cb_ctx ctx;
4463         uint32_t mark_id;
4464
4465         /* Check if default flow is registered. */
4466         if (!priv->mreg_cp_tbl)
4467                 return;
4468         mark_id = MLX5_DEFAULT_COPY_ID;
4469         ctx.data = &mark_id;
4470         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4471         if (!entry)
4472                 return;
4473         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4474 }
4475
4476 /**
4477  * Add the default copy action in in RX_CP_TBL.
4478  *
4479  * This functions is called in the mlx5_dev_start(). No thread safe
4480  * is guaranteed.
4481  *
4482  * @param dev
4483  *   Pointer to Ethernet device.
4484  * @param[out] error
4485  *   Perform verbose error reporting if not NULL.
4486  *
4487  * @return
4488  *   0 for success, negative value otherwise and rte_errno is set.
4489  */
4490 static int
4491 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4492                                   struct rte_flow_error *error)
4493 {
4494         struct mlx5_priv *priv = dev->data->dev_private;
4495         struct mlx5_flow_mreg_copy_resource *mcp_res;
4496         struct mlx5_flow_cb_ctx ctx;
4497         uint32_t mark_id;
4498
4499         /* Check whether extensive metadata feature is engaged. */
4500         if (!priv->config.dv_flow_en ||
4501             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4502             !mlx5_flow_ext_mreg_supported(dev) ||
4503             !priv->sh->dv_regc0_mask)
4504                 return 0;
4505         /*
4506          * Add default mreg copy flow may be called multiple time, but
4507          * only be called once in stop. Avoid register it twice.
4508          */
4509         mark_id = MLX5_DEFAULT_COPY_ID;
4510         ctx.data = &mark_id;
4511         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4512                 return 0;
4513         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4514         if (!mcp_res)
4515                 return -rte_errno;
4516         return 0;
4517 }
4518
4519 /**
4520  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4521  *
4522  * All the flow having Q/RSS action should be split by
4523  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4524  * performs the following,
4525  *   - CQE->flow_tag := reg_c[1] (MARK)
4526  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4527  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4528  * but there should be a flow per each MARK ID set by MARK action.
4529  *
4530  * For the aforementioned reason, if there's a MARK action in flow's action
4531  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4532  * the MARK ID to CQE's flow_tag like,
4533  *   - If reg_c[1] is mark_id,
4534  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4535  *
4536  * For SET_META action which stores value in reg_c[0], as the destination is
4537  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4538  * MARK ID means the default flow. The default flow looks like,
4539  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4540  *
4541  * @param dev
4542  *   Pointer to Ethernet device.
4543  * @param flow
4544  *   Pointer to flow structure.
4545  * @param[in] actions
4546  *   Pointer to the list of actions.
4547  * @param[out] error
4548  *   Perform verbose error reporting if not NULL.
4549  *
4550  * @return
4551  *   0 on success, negative value otherwise and rte_errno is set.
4552  */
4553 static int
4554 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4555                             struct rte_flow *flow,
4556                             const struct rte_flow_action *actions,
4557                             struct rte_flow_error *error)
4558 {
4559         struct mlx5_priv *priv = dev->data->dev_private;
4560         struct mlx5_dev_config *config = &priv->config;
4561         struct mlx5_flow_mreg_copy_resource *mcp_res;
4562         const struct rte_flow_action_mark *mark;
4563
4564         /* Check whether extensive metadata feature is engaged. */
4565         if (!config->dv_flow_en ||
4566             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4567             !mlx5_flow_ext_mreg_supported(dev) ||
4568             !priv->sh->dv_regc0_mask)
4569                 return 0;
4570         /* Find MARK action. */
4571         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4572                 switch (actions->type) {
4573                 case RTE_FLOW_ACTION_TYPE_FLAG:
4574                         mcp_res = flow_mreg_add_copy_action
4575                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4576                         if (!mcp_res)
4577                                 return -rte_errno;
4578                         flow->rix_mreg_copy = mcp_res->idx;
4579                         return 0;
4580                 case RTE_FLOW_ACTION_TYPE_MARK:
4581                         mark = (const struct rte_flow_action_mark *)
4582                                 actions->conf;
4583                         mcp_res =
4584                                 flow_mreg_add_copy_action(dev, mark->id, error);
4585                         if (!mcp_res)
4586                                 return -rte_errno;
4587                         flow->rix_mreg_copy = mcp_res->idx;
4588                         return 0;
4589                 default:
4590                         break;
4591                 }
4592         }
4593         return 0;
4594 }
4595
4596 #define MLX5_MAX_SPLIT_ACTIONS 24
4597 #define MLX5_MAX_SPLIT_ITEMS 24
4598
4599 /**
4600  * Split the hairpin flow.
4601  * Since HW can't support encap and push-vlan on Rx, we move these
4602  * actions to Tx.
4603  * If the count action is after the encap then we also
4604  * move the count action. in this case the count will also measure
4605  * the outer bytes.
4606  *
4607  * @param dev
4608  *   Pointer to Ethernet device.
4609  * @param[in] actions
4610  *   Associated actions (list terminated by the END action).
4611  * @param[out] actions_rx
4612  *   Rx flow actions.
4613  * @param[out] actions_tx
4614  *   Tx flow actions..
4615  * @param[out] pattern_tx
4616  *   The pattern items for the Tx flow.
4617  * @param[out] flow_id
4618  *   The flow ID connected to this flow.
4619  *
4620  * @return
4621  *   0 on success.
4622  */
4623 static int
4624 flow_hairpin_split(struct rte_eth_dev *dev,
4625                    const struct rte_flow_action actions[],
4626                    struct rte_flow_action actions_rx[],
4627                    struct rte_flow_action actions_tx[],
4628                    struct rte_flow_item pattern_tx[],
4629                    uint32_t flow_id)
4630 {
4631         const struct rte_flow_action_raw_encap *raw_encap;
4632         const struct rte_flow_action_raw_decap *raw_decap;
4633         struct mlx5_rte_flow_action_set_tag *set_tag;
4634         struct rte_flow_action *tag_action;
4635         struct mlx5_rte_flow_item_tag *tag_item;
4636         struct rte_flow_item *item;
4637         char *addr;
4638         int encap = 0;
4639
4640         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4641                 switch (actions->type) {
4642                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4643                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4644                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4645                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4646                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4647                         rte_memcpy(actions_tx, actions,
4648                                sizeof(struct rte_flow_action));
4649                         actions_tx++;
4650                         break;
4651                 case RTE_FLOW_ACTION_TYPE_COUNT:
4652                         if (encap) {
4653                                 rte_memcpy(actions_tx, actions,
4654                                            sizeof(struct rte_flow_action));
4655                                 actions_tx++;
4656                         } else {
4657                                 rte_memcpy(actions_rx, actions,
4658                                            sizeof(struct rte_flow_action));
4659                                 actions_rx++;
4660                         }
4661                         break;
4662                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4663                         raw_encap = actions->conf;
4664                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4665                                 memcpy(actions_tx, actions,
4666                                        sizeof(struct rte_flow_action));
4667                                 actions_tx++;
4668                                 encap = 1;
4669                         } else {
4670                                 rte_memcpy(actions_rx, actions,
4671                                            sizeof(struct rte_flow_action));
4672                                 actions_rx++;
4673                         }
4674                         break;
4675                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4676                         raw_decap = actions->conf;
4677                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4678                                 memcpy(actions_tx, actions,
4679                                        sizeof(struct rte_flow_action));
4680                                 actions_tx++;
4681                         } else {
4682                                 rte_memcpy(actions_rx, actions,
4683                                            sizeof(struct rte_flow_action));
4684                                 actions_rx++;
4685                         }
4686                         break;
4687                 default:
4688                         rte_memcpy(actions_rx, actions,
4689                                    sizeof(struct rte_flow_action));
4690                         actions_rx++;
4691                         break;
4692                 }
4693         }
4694         /* Add set meta action and end action for the Rx flow. */
4695         tag_action = actions_rx;
4696         tag_action->type = (enum rte_flow_action_type)
4697                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4698         actions_rx++;
4699         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4700         actions_rx++;
4701         set_tag = (void *)actions_rx;
4702         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4703                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4704                 .data = flow_id,
4705         };
4706         MLX5_ASSERT(set_tag->id > REG_NON);
4707         tag_action->conf = set_tag;
4708         /* Create Tx item list. */
4709         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4710         addr = (void *)&pattern_tx[2];
4711         item = pattern_tx;
4712         item->type = (enum rte_flow_item_type)
4713                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4714         tag_item = (void *)addr;
4715         tag_item->data = flow_id;
4716         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4717         MLX5_ASSERT(set_tag->id > REG_NON);
4718         item->spec = tag_item;
4719         addr += sizeof(struct mlx5_rte_flow_item_tag);
4720         tag_item = (void *)addr;
4721         tag_item->data = UINT32_MAX;
4722         tag_item->id = UINT16_MAX;
4723         item->mask = tag_item;
4724         item->last = NULL;
4725         item++;
4726         item->type = RTE_FLOW_ITEM_TYPE_END;
4727         return 0;
4728 }
4729
4730 /**
4731  * The last stage of splitting chain, just creates the subflow
4732  * without any modification.
4733  *
4734  * @param[in] dev
4735  *   Pointer to Ethernet device.
4736  * @param[in] flow
4737  *   Parent flow structure pointer.
4738  * @param[in, out] sub_flow
4739  *   Pointer to return the created subflow, may be NULL.
4740  * @param[in] attr
4741  *   Flow rule attributes.
4742  * @param[in] items
4743  *   Pattern specification (list terminated by the END pattern item).
4744  * @param[in] actions
4745  *   Associated actions (list terminated by the END action).
4746  * @param[in] flow_split_info
4747  *   Pointer to flow split info structure.
4748  * @param[out] error
4749  *   Perform verbose error reporting if not NULL.
4750  * @return
4751  *   0 on success, negative value otherwise
4752  */
4753 static int
4754 flow_create_split_inner(struct rte_eth_dev *dev,
4755                         struct rte_flow *flow,
4756                         struct mlx5_flow **sub_flow,
4757                         const struct rte_flow_attr *attr,
4758                         const struct rte_flow_item items[],
4759                         const struct rte_flow_action actions[],
4760                         struct mlx5_flow_split_info *flow_split_info,
4761                         struct rte_flow_error *error)
4762 {
4763         struct mlx5_flow *dev_flow;
4764
4765         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4766                                     flow_split_info->flow_idx, error);
4767         if (!dev_flow)
4768                 return -rte_errno;
4769         dev_flow->flow = flow;
4770         dev_flow->external = flow_split_info->external;
4771         dev_flow->skip_scale = flow_split_info->skip_scale;
4772         /* Subflow object was created, we must include one in the list. */
4773         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4774                       dev_flow->handle, next);
4775         /*
4776          * If dev_flow is as one of the suffix flow, some actions in suffix
4777          * flow may need some user defined item layer flags, and pass the
4778          * Metadate rxq mark flag to suffix flow as well.
4779          */
4780         if (flow_split_info->prefix_layers)
4781                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4782         if (flow_split_info->prefix_mark)
4783                 dev_flow->handle->mark = 1;
4784         if (sub_flow)
4785                 *sub_flow = dev_flow;
4786 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4787         dev_flow->dv.table_id = flow_split_info->table_id;
4788 #endif
4789         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4790 }
4791
4792 /**
4793  * Get the sub policy of a meter.
4794  *
4795  * @param[in] dev
4796  *   Pointer to Ethernet device.
4797  * @param[in] flow
4798  *   Parent flow structure pointer.
4799  * @param wks
4800  *   Pointer to thread flow work space.
4801  * @param[in] attr
4802  *   Flow rule attributes.
4803  * @param[in] items
4804  *   Pattern specification (list terminated by the END pattern item).
4805  * @param[out] error
4806  *   Perform verbose error reporting if not NULL.
4807  *
4808  * @return
4809  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4810  */
4811 static struct mlx5_flow_meter_sub_policy *
4812 get_meter_sub_policy(struct rte_eth_dev *dev,
4813                      struct rte_flow *flow,
4814                      struct mlx5_flow_workspace *wks,
4815                      const struct rte_flow_attr *attr,
4816                      const struct rte_flow_item items[],
4817                      struct rte_flow_error *error)
4818 {
4819         struct mlx5_flow_meter_policy *policy;
4820         struct mlx5_flow_meter_policy *final_policy;
4821         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4822
4823         policy = wks->policy;
4824         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4825         if (final_policy->is_rss || final_policy->is_queue) {
4826                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4827                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4828                 uint32_t i;
4829
4830                 /*
4831                  * This is a tmp dev_flow,
4832                  * no need to register any matcher for it in translate.
4833                  */
4834                 wks->skip_matcher_reg = 1;
4835                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4836                         struct mlx5_flow dev_flow = {0};
4837                         struct mlx5_flow_handle dev_handle = { {0} };
4838                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4839
4840                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4841                                 const struct rte_flow_action_rss *rss_act =
4842                                         final_policy->act_cnt[i].rss->conf;
4843                                 struct rte_flow_action rss_actions[2] = {
4844                                         [0] = {
4845                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4846                                         .conf = rss_act,
4847                                         },
4848                                         [1] = {
4849                                         .type = RTE_FLOW_ACTION_TYPE_END,
4850                                         .conf = NULL,
4851                                         }
4852                                 };
4853
4854                                 dev_flow.handle = &dev_handle;
4855                                 dev_flow.ingress = attr->ingress;
4856                                 dev_flow.flow = flow;
4857                                 dev_flow.external = 0;
4858 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4859                                 dev_flow.dv.transfer = attr->transfer;
4860 #endif
4861                                 /**
4862                                  * Translate RSS action to get rss hash fields.
4863                                  */
4864                                 if (flow_drv_translate(dev, &dev_flow, attr,
4865                                                 items, rss_actions, error))
4866                                         goto exit;
4867                                 rss_desc_v[i] = wks->rss_desc;
4868                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4869                                 rss_desc_v[i].hash_fields =
4870                                                 dev_flow.hash_fields;
4871                                 rss_desc_v[i].queue_num =
4872                                                 rss_desc_v[i].hash_fields ?
4873                                                 rss_desc_v[i].queue_num : 1;
4874                                 rss_desc_v[i].tunnel =
4875                                                 !!(dev_flow.handle->layers &
4876                                                    MLX5_FLOW_LAYER_TUNNEL);
4877                                 /* Use the RSS queues in the containers. */
4878                                 rss_desc_v[i].queue =
4879                                         (uint16_t *)(uintptr_t)rss_act->queue;
4880                                 rss_desc[i] = &rss_desc_v[i];
4881                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4882                                 /* This is queue action. */
4883                                 rss_desc_v[i] = wks->rss_desc;
4884                                 rss_desc_v[i].key_len = 0;
4885                                 rss_desc_v[i].hash_fields = 0;
4886                                 rss_desc_v[i].queue =
4887                                         &final_policy->act_cnt[i].queue;
4888                                 rss_desc_v[i].queue_num = 1;
4889                                 rss_desc[i] = &rss_desc_v[i];
4890                         } else {
4891                                 rss_desc[i] = NULL;
4892                         }
4893                 }
4894                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4895                                                 flow, policy, rss_desc);
4896         } else {
4897                 enum mlx5_meter_domain mtr_domain =
4898                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4899                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4900                                                 MLX5_MTR_DOMAIN_INGRESS);
4901                 sub_policy = policy->sub_policys[mtr_domain][0];
4902         }
4903         if (!sub_policy)
4904                 rte_flow_error_set(error, EINVAL,
4905                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4906                                    "Failed to get meter sub-policy.");
4907 exit:
4908         return sub_policy;
4909 }
4910
4911 /**
4912  * Split the meter flow.
4913  *
4914  * As meter flow will split to three sub flow, other than meter
4915  * action, the other actions make sense to only meter accepts
4916  * the packet. If it need to be dropped, no other additional
4917  * actions should be take.
4918  *
4919  * One kind of special action which decapsulates the L3 tunnel
4920  * header will be in the prefix sub flow, as not to take the
4921  * L3 tunnel header into account.
4922  *
4923  * @param[in] dev
4924  *   Pointer to Ethernet device.
4925  * @param[in] flow
4926  *   Parent flow structure pointer.
4927  * @param wks
4928  *   Pointer to thread flow work space.
4929  * @param[in] attr
4930  *   Flow rule attributes.
4931  * @param[in] items
4932  *   Pattern specification (list terminated by the END pattern item).
4933  * @param[out] sfx_items
4934  *   Suffix flow match items (list terminated by the END pattern item).
4935  * @param[in] actions
4936  *   Associated actions (list terminated by the END action).
4937  * @param[out] actions_sfx
4938  *   Suffix flow actions.
4939  * @param[out] actions_pre
4940  *   Prefix flow actions.
4941  * @param[out] mtr_flow_id
4942  *   Pointer to meter flow id.
4943  * @param[out] error
4944  *   Perform verbose error reporting if not NULL.
4945  *
4946  * @return
4947  *   0 on success, a negative errno value otherwise and rte_errno is set.
4948  */
4949 static int
4950 flow_meter_split_prep(struct rte_eth_dev *dev,
4951                       struct rte_flow *flow,
4952                       struct mlx5_flow_workspace *wks,
4953                       const struct rte_flow_attr *attr,
4954                       const struct rte_flow_item items[],
4955                       struct rte_flow_item sfx_items[],
4956                       const struct rte_flow_action actions[],
4957                       struct rte_flow_action actions_sfx[],
4958                       struct rte_flow_action actions_pre[],
4959                       uint32_t *mtr_flow_id,
4960                       struct rte_flow_error *error)
4961 {
4962         struct mlx5_priv *priv = dev->data->dev_private;
4963         struct mlx5_flow_meter_info *fm = wks->fm;
4964         struct rte_flow_action *tag_action = NULL;
4965         struct rte_flow_item *tag_item;
4966         struct mlx5_rte_flow_action_set_tag *set_tag;
4967         const struct rte_flow_action_raw_encap *raw_encap;
4968         const struct rte_flow_action_raw_decap *raw_decap;
4969         struct mlx5_rte_flow_item_tag *tag_item_spec;
4970         struct mlx5_rte_flow_item_tag *tag_item_mask;
4971         uint32_t tag_id = 0;
4972         struct rte_flow_item *vlan_item_dst = NULL;
4973         const struct rte_flow_item *vlan_item_src = NULL;
4974         struct rte_flow_action *hw_mtr_action;
4975         struct rte_flow_action *action_pre_head = NULL;
4976         int32_t flow_src_port = priv->representor_id;
4977         bool mtr_first;
4978         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4979         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4980                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4981         uint32_t flow_id = 0;
4982         uint32_t flow_id_reversed = 0;
4983         uint8_t flow_id_bits = 0;
4984         int shift;
4985
4986         /* Prepare the suffix subflow items. */
4987         tag_item = sfx_items++;
4988         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4989                 struct mlx5_priv *port_priv;
4990                 const struct rte_flow_item_port_id *pid_v;
4991                 int item_type = items->type;
4992
4993                 switch (item_type) {
4994                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4995                         pid_v = items->spec;
4996                         MLX5_ASSERT(pid_v);
4997                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
4998                         if (!port_priv)
4999                                 return rte_flow_error_set(error,
5000                                                 rte_errno,
5001                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5002                                                 pid_v,
5003                                                 "Failed to get port info.");
5004                         flow_src_port = port_priv->representor_id;
5005                         if (!fm->def_policy && wks->policy->is_hierarchy &&
5006                             flow_src_port != priv->representor_id) {
5007                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
5008                                                                 flow, fm,
5009                                                                 flow_src_port,
5010                                                                 items,
5011                                                                 error))
5012                                         return -rte_errno;
5013                         }
5014                         memcpy(sfx_items, items, sizeof(*sfx_items));
5015                         sfx_items++;
5016                         break;
5017                 case RTE_FLOW_ITEM_TYPE_VLAN:
5018                         /* Determine if copy vlan item below. */
5019                         vlan_item_src = items;
5020                         vlan_item_dst = sfx_items++;
5021                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
5022                         break;
5023                 default:
5024                         break;
5025                 }
5026         }
5027         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
5028         sfx_items++;
5029         mtr_first = priv->sh->meter_aso_en &&
5030                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
5031         /* For ASO meter, meter must be before tag in TX direction. */
5032         if (mtr_first) {
5033                 action_pre_head = actions_pre++;
5034                 /* Leave space for tag action. */
5035                 tag_action = actions_pre++;
5036         }
5037         /* Prepare the actions for prefix and suffix flow. */
5038         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5039                 struct rte_flow_action *action_cur = NULL;
5040
5041                 switch (actions->type) {
5042                 case RTE_FLOW_ACTION_TYPE_METER:
5043                         if (mtr_first) {
5044                                 action_cur = action_pre_head;
5045                         } else {
5046                                 /* Leave space for tag action. */
5047                                 tag_action = actions_pre++;
5048                                 action_cur = actions_pre++;
5049                         }
5050                         break;
5051                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5052                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5053                         action_cur = actions_pre++;
5054                         break;
5055                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5056                         raw_encap = actions->conf;
5057                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
5058                                 action_cur = actions_pre++;
5059                         break;
5060                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5061                         raw_decap = actions->conf;
5062                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
5063                                 action_cur = actions_pre++;
5064                         break;
5065                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5066                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5067                         if (vlan_item_dst && vlan_item_src) {
5068                                 memcpy(vlan_item_dst, vlan_item_src,
5069                                         sizeof(*vlan_item_dst));
5070                                 /*
5071                                  * Convert to internal match item, it is used
5072                                  * for vlan push and set vid.
5073                                  */
5074                                 vlan_item_dst->type = (enum rte_flow_item_type)
5075                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5076                         }
5077                         break;
5078                 default:
5079                         break;
5080                 }
5081                 if (!action_cur)
5082                         action_cur = (fm->def_policy) ?
5083                                         actions_sfx++ : actions_pre++;
5084                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5085         }
5086         /* Add end action to the actions. */
5087         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5088         if (priv->sh->meter_aso_en) {
5089                 /**
5090                  * For ASO meter, need to add an extra jump action explicitly,
5091                  * to jump from meter to policer table.
5092                  */
5093                 struct mlx5_flow_meter_sub_policy *sub_policy;
5094                 struct mlx5_flow_tbl_data_entry *tbl_data;
5095
5096                 if (!fm->def_policy) {
5097                         sub_policy = get_meter_sub_policy(dev, flow, wks,
5098                                                           attr, items, error);
5099                         if (!sub_policy)
5100                                 return -rte_errno;
5101                 } else {
5102                         enum mlx5_meter_domain mtr_domain =
5103                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5104                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5105                                                 MLX5_MTR_DOMAIN_INGRESS);
5106
5107                         sub_policy =
5108                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5109                 }
5110                 tbl_data = container_of(sub_policy->tbl_rsc,
5111                                         struct mlx5_flow_tbl_data_entry, tbl);
5112                 hw_mtr_action = actions_pre++;
5113                 hw_mtr_action->type = (enum rte_flow_action_type)
5114                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5115                 hw_mtr_action->conf = tbl_data->jump.action;
5116         }
5117         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5118         actions_pre++;
5119         if (!tag_action)
5120                 return rte_flow_error_set(error, ENOMEM,
5121                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5122                                           NULL, "No tag action space.");
5123         if (!mtr_flow_id) {
5124                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5125                 goto exit;
5126         }
5127         /* Only default-policy Meter creates mtr flow id. */
5128         if (fm->def_policy) {
5129                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5130                 if (!tag_id)
5131                         return rte_flow_error_set(error, ENOMEM,
5132                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5133                                         "Failed to allocate meter flow id.");
5134                 flow_id = tag_id - 1;
5135                 flow_id_bits = (!flow_id) ? 1 :
5136                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5137                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5138                     mtr_reg_bits) {
5139                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5140                         return rte_flow_error_set(error, EINVAL,
5141                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5142                                         "Meter flow id exceeds max limit.");
5143                 }
5144                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5145                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5146         }
5147         /* Build tag actions and items for meter_id/meter flow_id. */
5148         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5149         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5150         tag_item_mask = tag_item_spec + 1;
5151         /* Both flow_id and meter_id share the same register. */
5152         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5153                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5154                                                             0, error),
5155                 .offset = mtr_id_offset,
5156                 .length = mtr_reg_bits,
5157                 .data = flow->meter,
5158         };
5159         /*
5160          * The color Reg bits used by flow_id are growing from
5161          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5162          */
5163         for (shift = 0; shift < flow_id_bits; shift++)
5164                 flow_id_reversed = (flow_id_reversed << 1) |
5165                                 ((flow_id >> shift) & 0x1);
5166         set_tag->data |=
5167                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5168         tag_item_spec->id = set_tag->id;
5169         tag_item_spec->data = set_tag->data << mtr_id_offset;
5170         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5171         tag_action->type = (enum rte_flow_action_type)
5172                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5173         tag_action->conf = set_tag;
5174         tag_item->type = (enum rte_flow_item_type)
5175                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5176         tag_item->spec = tag_item_spec;
5177         tag_item->last = NULL;
5178         tag_item->mask = tag_item_mask;
5179 exit:
5180         if (mtr_flow_id)
5181                 *mtr_flow_id = tag_id;
5182         return 0;
5183 }
5184
5185 /**
5186  * Split action list having QUEUE/RSS for metadata register copy.
5187  *
5188  * Once Q/RSS action is detected in user's action list, the flow action
5189  * should be split in order to copy metadata registers, which will happen in
5190  * RX_CP_TBL like,
5191  *   - CQE->flow_tag := reg_c[1] (MARK)
5192  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5193  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5194  * This is because the last action of each flow must be a terminal action
5195  * (QUEUE, RSS or DROP).
5196  *
5197  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5198  * stored and kept in the mlx5_flow structure per each sub_flow.
5199  *
5200  * The Q/RSS action is replaced with,
5201  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5202  * And the following JUMP action is added at the end,
5203  *   - JUMP, to RX_CP_TBL.
5204  *
5205  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5206  * flow_create_split_metadata() routine. The flow will look like,
5207  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5208  *
5209  * @param dev
5210  *   Pointer to Ethernet device.
5211  * @param[out] split_actions
5212  *   Pointer to store split actions to jump to CP_TBL.
5213  * @param[in] actions
5214  *   Pointer to the list of original flow actions.
5215  * @param[in] qrss
5216  *   Pointer to the Q/RSS action.
5217  * @param[in] actions_n
5218  *   Number of original actions.
5219  * @param[out] error
5220  *   Perform verbose error reporting if not NULL.
5221  *
5222  * @return
5223  *   non-zero unique flow_id on success, otherwise 0 and
5224  *   error/rte_error are set.
5225  */
5226 static uint32_t
5227 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5228                           struct rte_flow_action *split_actions,
5229                           const struct rte_flow_action *actions,
5230                           const struct rte_flow_action *qrss,
5231                           int actions_n, struct rte_flow_error *error)
5232 {
5233         struct mlx5_priv *priv = dev->data->dev_private;
5234         struct mlx5_rte_flow_action_set_tag *set_tag;
5235         struct rte_flow_action_jump *jump;
5236         const int qrss_idx = qrss - actions;
5237         uint32_t flow_id = 0;
5238         int ret = 0;
5239
5240         /*
5241          * Given actions will be split
5242          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5243          * - Add jump to mreg CP_TBL.
5244          * As a result, there will be one more action.
5245          */
5246         ++actions_n;
5247         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5248         set_tag = (void *)(split_actions + actions_n);
5249         /*
5250          * If tag action is not set to void(it means we are not the meter
5251          * suffix flow), add the tag action. Since meter suffix flow already
5252          * has the tag added.
5253          */
5254         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5255                 /*
5256                  * Allocate the new subflow ID. This one is unique within
5257                  * device and not shared with representors. Otherwise,
5258                  * we would have to resolve multi-thread access synch
5259                  * issue. Each flow on the shared device is appended
5260                  * with source vport identifier, so the resulting
5261                  * flows will be unique in the shared (by master and
5262                  * representors) domain even if they have coinciding
5263                  * IDs.
5264                  */
5265                 mlx5_ipool_malloc(priv->sh->ipool
5266                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5267                 if (!flow_id)
5268                         return rte_flow_error_set(error, ENOMEM,
5269                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5270                                                   NULL, "can't allocate id "
5271                                                   "for split Q/RSS subflow");
5272                 /* Internal SET_TAG action to set flow ID. */
5273                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5274                         .data = flow_id,
5275                 };
5276                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5277                 if (ret < 0)
5278                         return ret;
5279                 set_tag->id = ret;
5280                 /* Construct new actions array. */
5281                 /* Replace QUEUE/RSS action. */
5282                 split_actions[qrss_idx] = (struct rte_flow_action){
5283                         .type = (enum rte_flow_action_type)
5284                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5285                         .conf = set_tag,
5286                 };
5287         }
5288         /* JUMP action to jump to mreg copy table (CP_TBL). */
5289         jump = (void *)(set_tag + 1);
5290         *jump = (struct rte_flow_action_jump){
5291                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5292         };
5293         split_actions[actions_n - 2] = (struct rte_flow_action){
5294                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5295                 .conf = jump,
5296         };
5297         split_actions[actions_n - 1] = (struct rte_flow_action){
5298                 .type = RTE_FLOW_ACTION_TYPE_END,
5299         };
5300         return flow_id;
5301 }
5302
5303 /**
5304  * Extend the given action list for Tx metadata copy.
5305  *
5306  * Copy the given action list to the ext_actions and add flow metadata register
5307  * copy action in order to copy reg_a set by WQE to reg_c[0].
5308  *
5309  * @param[out] ext_actions
5310  *   Pointer to the extended action list.
5311  * @param[in] actions
5312  *   Pointer to the list of actions.
5313  * @param[in] actions_n
5314  *   Number of actions in the list.
5315  * @param[out] error
5316  *   Perform verbose error reporting if not NULL.
5317  * @param[in] encap_idx
5318  *   The encap action inndex.
5319  *
5320  * @return
5321  *   0 on success, negative value otherwise
5322  */
5323 static int
5324 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5325                        struct rte_flow_action *ext_actions,
5326                        const struct rte_flow_action *actions,
5327                        int actions_n, struct rte_flow_error *error,
5328                        int encap_idx)
5329 {
5330         struct mlx5_flow_action_copy_mreg *cp_mreg =
5331                 (struct mlx5_flow_action_copy_mreg *)
5332                         (ext_actions + actions_n + 1);
5333         int ret;
5334
5335         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5336         if (ret < 0)
5337                 return ret;
5338         cp_mreg->dst = ret;
5339         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5340         if (ret < 0)
5341                 return ret;
5342         cp_mreg->src = ret;
5343         if (encap_idx != 0)
5344                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5345         if (encap_idx == actions_n - 1) {
5346                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5347                         .type = (enum rte_flow_action_type)
5348                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5349                         .conf = cp_mreg,
5350                 };
5351                 ext_actions[actions_n] = (struct rte_flow_action){
5352                         .type = RTE_FLOW_ACTION_TYPE_END,
5353                 };
5354         } else {
5355                 ext_actions[encap_idx] = (struct rte_flow_action){
5356                         .type = (enum rte_flow_action_type)
5357                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5358                         .conf = cp_mreg,
5359                 };
5360                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5361                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5362         }
5363         return 0;
5364 }
5365
5366 /**
5367  * Check the match action from the action list.
5368  *
5369  * @param[in] actions
5370  *   Pointer to the list of actions.
5371  * @param[in] attr
5372  *   Flow rule attributes.
5373  * @param[in] action
5374  *   The action to be check if exist.
5375  * @param[out] match_action_pos
5376  *   Pointer to the position of the matched action if exists, otherwise is -1.
5377  * @param[out] qrss_action_pos
5378  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5379  * @param[out] modify_after_mirror
5380  *   Pointer to the flag of modify action after FDB mirroring.
5381  *
5382  * @return
5383  *   > 0 the total number of actions.
5384  *   0 if not found match action in action list.
5385  */
5386 static int
5387 flow_check_match_action(const struct rte_flow_action actions[],
5388                         const struct rte_flow_attr *attr,
5389                         enum rte_flow_action_type action,
5390                         int *match_action_pos, int *qrss_action_pos,
5391                         int *modify_after_mirror)
5392 {
5393         const struct rte_flow_action_sample *sample;
5394         const struct rte_flow_action_raw_decap *decap;
5395         int actions_n = 0;
5396         uint32_t ratio = 0;
5397         int sub_type = 0;
5398         int flag = 0;
5399         int fdb_mirror = 0;
5400
5401         *match_action_pos = -1;
5402         *qrss_action_pos = -1;
5403         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5404                 if (actions->type == action) {
5405                         flag = 1;
5406                         *match_action_pos = actions_n;
5407                 }
5408                 switch (actions->type) {
5409                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5410                 case RTE_FLOW_ACTION_TYPE_RSS:
5411                         *qrss_action_pos = actions_n;
5412                         break;
5413                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5414                         sample = actions->conf;
5415                         ratio = sample->ratio;
5416                         sub_type = ((const struct rte_flow_action *)
5417                                         (sample->actions))->type;
5418                         if (ratio == 1 && attr->transfer)
5419                                 fdb_mirror = 1;
5420                         break;
5421                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5422                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5423                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5424                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5425                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5426                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5427                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5428                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5429                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5430                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5431                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5432                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5433                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5434                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5435                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5436                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5437                 case RTE_FLOW_ACTION_TYPE_FLAG:
5438                 case RTE_FLOW_ACTION_TYPE_MARK:
5439                 case RTE_FLOW_ACTION_TYPE_SET_META:
5440                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5441                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5442                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5443                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5444                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5445                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5446                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5447                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5448                 case RTE_FLOW_ACTION_TYPE_METER:
5449                         if (fdb_mirror)
5450                                 *modify_after_mirror = 1;
5451                         break;
5452                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5453                         decap = actions->conf;
5454                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5455                                 ;
5456                         actions_n++;
5457                         if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5458                                 const struct rte_flow_action_raw_encap *encap =
5459                                                                 actions->conf;
5460                                 if (decap->size <=
5461                                         MLX5_ENCAPSULATION_DECISION_SIZE &&
5462                                     encap->size >
5463                                         MLX5_ENCAPSULATION_DECISION_SIZE)
5464                                         /* L3 encap. */
5465                                         break;
5466                         }
5467                         if (fdb_mirror)
5468                                 *modify_after_mirror = 1;
5469                         break;
5470                 default:
5471                         break;
5472                 }
5473                 actions_n++;
5474         }
5475         if (flag && fdb_mirror && !*modify_after_mirror) {
5476                 /* FDB mirroring uses the destination array to implement
5477                  * instead of FLOW_SAMPLER object.
5478                  */
5479                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5480                         flag = 0;
5481         }
5482         /* Count RTE_FLOW_ACTION_TYPE_END. */
5483         return flag ? actions_n + 1 : 0;
5484 }
5485
5486 #define SAMPLE_SUFFIX_ITEM 2
5487
5488 /**
5489  * Split the sample flow.
5490  *
5491  * As sample flow will split to two sub flow, sample flow with
5492  * sample action, the other actions will move to new suffix flow.
5493  *
5494  * Also add unique tag id with tag action in the sample flow,
5495  * the same tag id will be as match in the suffix flow.
5496  *
5497  * @param dev
5498  *   Pointer to Ethernet device.
5499  * @param[in] add_tag
5500  *   Add extra tag action flag.
5501  * @param[out] sfx_items
5502  *   Suffix flow match items (list terminated by the END pattern item).
5503  * @param[in] actions
5504  *   Associated actions (list terminated by the END action).
5505  * @param[out] actions_sfx
5506  *   Suffix flow actions.
5507  * @param[out] actions_pre
5508  *   Prefix flow actions.
5509  * @param[in] actions_n
5510  *  The total number of actions.
5511  * @param[in] sample_action_pos
5512  *   The sample action position.
5513  * @param[in] qrss_action_pos
5514  *   The Queue/RSS action position.
5515  * @param[in] jump_table
5516  *   Add extra jump action flag.
5517  * @param[out] error
5518  *   Perform verbose error reporting if not NULL.
5519  *
5520  * @return
5521  *   0 on success, or unique flow_id, a negative errno value
5522  *   otherwise and rte_errno is set.
5523  */
5524 static int
5525 flow_sample_split_prep(struct rte_eth_dev *dev,
5526                        int add_tag,
5527                        struct rte_flow_item sfx_items[],
5528                        const struct rte_flow_action actions[],
5529                        struct rte_flow_action actions_sfx[],
5530                        struct rte_flow_action actions_pre[],
5531                        int actions_n,
5532                        int sample_action_pos,
5533                        int qrss_action_pos,
5534                        int jump_table,
5535                        struct rte_flow_error *error)
5536 {
5537         struct mlx5_priv *priv = dev->data->dev_private;
5538         struct mlx5_rte_flow_action_set_tag *set_tag;
5539         struct mlx5_rte_flow_item_tag *tag_spec;
5540         struct mlx5_rte_flow_item_tag *tag_mask;
5541         struct rte_flow_action_jump *jump_action;
5542         uint32_t tag_id = 0;
5543         int index;
5544         int append_index = 0;
5545         int ret;
5546
5547         if (sample_action_pos < 0)
5548                 return rte_flow_error_set(error, EINVAL,
5549                                           RTE_FLOW_ERROR_TYPE_ACTION,
5550                                           NULL, "invalid position of sample "
5551                                           "action in list");
5552         /* Prepare the actions for prefix and suffix flow. */
5553         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5554                 index = qrss_action_pos;
5555                 /* Put the preceding the Queue/RSS action into prefix flow. */
5556                 if (index != 0)
5557                         memcpy(actions_pre, actions,
5558                                sizeof(struct rte_flow_action) * index);
5559                 /* Put others preceding the sample action into prefix flow. */
5560                 if (sample_action_pos > index + 1)
5561                         memcpy(actions_pre + index, actions + index + 1,
5562                                sizeof(struct rte_flow_action) *
5563                                (sample_action_pos - index - 1));
5564                 index = sample_action_pos - 1;
5565                 /* Put Queue/RSS action into Suffix flow. */
5566                 memcpy(actions_sfx, actions + qrss_action_pos,
5567                        sizeof(struct rte_flow_action));
5568                 actions_sfx++;
5569         } else {
5570                 index = sample_action_pos;
5571                 if (index != 0)
5572                         memcpy(actions_pre, actions,
5573                                sizeof(struct rte_flow_action) * index);
5574         }
5575         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5576          * For CX6DX and above, metadata registers Cx preserve their value,
5577          * add an extra tag action for NIC-RX and E-Switch Domain.
5578          */
5579         if (add_tag) {
5580                 /* Prepare the prefix tag action. */
5581                 append_index++;
5582                 set_tag = (void *)(actions_pre + actions_n + append_index);
5583                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5584                 if (ret < 0)
5585                         return ret;
5586                 mlx5_ipool_malloc(priv->sh->ipool
5587                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5588                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5589                         .id = ret,
5590                         .data = tag_id,
5591                 };
5592                 /* Prepare the suffix subflow items. */
5593                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5594                 tag_spec->data = tag_id;
5595                 tag_spec->id = set_tag->id;
5596                 tag_mask = tag_spec + 1;
5597                 tag_mask->data = UINT32_MAX;
5598                 sfx_items[0] = (struct rte_flow_item){
5599                         .type = (enum rte_flow_item_type)
5600                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5601                         .spec = tag_spec,
5602                         .last = NULL,
5603                         .mask = tag_mask,
5604                 };
5605                 sfx_items[1] = (struct rte_flow_item){
5606                         .type = (enum rte_flow_item_type)
5607                                 RTE_FLOW_ITEM_TYPE_END,
5608                 };
5609                 /* Prepare the tag action in prefix subflow. */
5610                 actions_pre[index++] =
5611                         (struct rte_flow_action){
5612                         .type = (enum rte_flow_action_type)
5613                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5614                         .conf = set_tag,
5615                 };
5616         }
5617         memcpy(actions_pre + index, actions + sample_action_pos,
5618                sizeof(struct rte_flow_action));
5619         index += 1;
5620         /* For the modify action after the sample action in E-Switch mirroring,
5621          * Add the extra jump action in prefix subflow and jump into the next
5622          * table, then do the modify action in the new table.
5623          */
5624         if (jump_table) {
5625                 /* Prepare the prefix jump action. */
5626                 append_index++;
5627                 jump_action = (void *)(actions_pre + actions_n + append_index);
5628                 jump_action->group = jump_table;
5629                 actions_pre[index++] =
5630                         (struct rte_flow_action){
5631                         .type = (enum rte_flow_action_type)
5632                                 RTE_FLOW_ACTION_TYPE_JUMP,
5633                         .conf = jump_action,
5634                 };
5635         }
5636         actions_pre[index] = (struct rte_flow_action){
5637                 .type = (enum rte_flow_action_type)
5638                         RTE_FLOW_ACTION_TYPE_END,
5639         };
5640         /* Put the actions after sample into Suffix flow. */
5641         memcpy(actions_sfx, actions + sample_action_pos + 1,
5642                sizeof(struct rte_flow_action) *
5643                (actions_n - sample_action_pos - 1));
5644         return tag_id;
5645 }
5646
5647 /**
5648  * The splitting for metadata feature.
5649  *
5650  * - Q/RSS action on NIC Rx should be split in order to pass by
5651  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5652  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5653  *
5654  * - All the actions on NIC Tx should have a mreg copy action to
5655  *   copy reg_a from WQE to reg_c[0].
5656  *
5657  * @param dev
5658  *   Pointer to Ethernet device.
5659  * @param[in] flow
5660  *   Parent flow structure pointer.
5661  * @param[in] attr
5662  *   Flow rule attributes.
5663  * @param[in] items
5664  *   Pattern specification (list terminated by the END pattern item).
5665  * @param[in] actions
5666  *   Associated actions (list terminated by the END action).
5667  * @param[in] flow_split_info
5668  *   Pointer to flow split info structure.
5669  * @param[out] error
5670  *   Perform verbose error reporting if not NULL.
5671  * @return
5672  *   0 on success, negative value otherwise
5673  */
5674 static int
5675 flow_create_split_metadata(struct rte_eth_dev *dev,
5676                            struct rte_flow *flow,
5677                            const struct rte_flow_attr *attr,
5678                            const struct rte_flow_item items[],
5679                            const struct rte_flow_action actions[],
5680                            struct mlx5_flow_split_info *flow_split_info,
5681                            struct rte_flow_error *error)
5682 {
5683         struct mlx5_priv *priv = dev->data->dev_private;
5684         struct mlx5_dev_config *config = &priv->config;
5685         const struct rte_flow_action *qrss = NULL;
5686         struct rte_flow_action *ext_actions = NULL;
5687         struct mlx5_flow *dev_flow = NULL;
5688         uint32_t qrss_id = 0;
5689         int mtr_sfx = 0;
5690         size_t act_size;
5691         int actions_n;
5692         int encap_idx;
5693         int ret;
5694
5695         /* Check whether extensive metadata feature is engaged. */
5696         if (!config->dv_flow_en ||
5697             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5698             !mlx5_flow_ext_mreg_supported(dev))
5699                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5700                                                actions, flow_split_info, error);
5701         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5702                                                            &encap_idx);
5703         if (qrss) {
5704                 /* Exclude hairpin flows from splitting. */
5705                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5706                         const struct rte_flow_action_queue *queue;
5707
5708                         queue = qrss->conf;
5709                         if (mlx5_rxq_get_type(dev, queue->index) ==
5710                             MLX5_RXQ_TYPE_HAIRPIN)
5711                                 qrss = NULL;
5712                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5713                         const struct rte_flow_action_rss *rss;
5714
5715                         rss = qrss->conf;
5716                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5717                             MLX5_RXQ_TYPE_HAIRPIN)
5718                                 qrss = NULL;
5719                 }
5720         }
5721         if (qrss) {
5722                 /* Check if it is in meter suffix table. */
5723                 mtr_sfx = attr->group == (attr->transfer ?
5724                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5725                           MLX5_FLOW_TABLE_LEVEL_METER);
5726                 /*
5727                  * Q/RSS action on NIC Rx should be split in order to pass by
5728                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5729                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5730                  */
5731                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5732                            sizeof(struct rte_flow_action_set_tag) +
5733                            sizeof(struct rte_flow_action_jump);
5734                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5735                                           SOCKET_ID_ANY);
5736                 if (!ext_actions)
5737                         return rte_flow_error_set(error, ENOMEM,
5738                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5739                                                   NULL, "no memory to split "
5740                                                   "metadata flow");
5741                 /*
5742                  * If we are the suffix flow of meter, tag already exist.
5743                  * Set the tag action to void.
5744                  */
5745                 if (mtr_sfx)
5746                         ext_actions[qrss - actions].type =
5747                                                 RTE_FLOW_ACTION_TYPE_VOID;
5748                 else
5749                         ext_actions[qrss - actions].type =
5750                                                 (enum rte_flow_action_type)
5751                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5752                 /*
5753                  * Create the new actions list with removed Q/RSS action
5754                  * and appended set tag and jump to register copy table
5755                  * (RX_CP_TBL). We should preallocate unique tag ID here
5756                  * in advance, because it is needed for set tag action.
5757                  */
5758                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5759                                                     qrss, actions_n, error);
5760                 if (!mtr_sfx && !qrss_id) {
5761                         ret = -rte_errno;
5762                         goto exit;
5763                 }
5764         } else if (attr->egress && !attr->transfer) {
5765                 /*
5766                  * All the actions on NIC Tx should have a metadata register
5767                  * copy action to copy reg_a from WQE to reg_c[meta]
5768                  */
5769                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5770                            sizeof(struct mlx5_flow_action_copy_mreg);
5771                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5772                                           SOCKET_ID_ANY);
5773                 if (!ext_actions)
5774                         return rte_flow_error_set(error, ENOMEM,
5775                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5776                                                   NULL, "no memory to split "
5777                                                   "metadata flow");
5778                 /* Create the action list appended with copy register. */
5779                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5780                                              actions_n, error, encap_idx);
5781                 if (ret < 0)
5782                         goto exit;
5783         }
5784         /* Add the unmodified original or prefix subflow. */
5785         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5786                                       items, ext_actions ? ext_actions :
5787                                       actions, flow_split_info, error);
5788         if (ret < 0)
5789                 goto exit;
5790         MLX5_ASSERT(dev_flow);
5791         if (qrss) {
5792                 const struct rte_flow_attr q_attr = {
5793                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5794                         .ingress = 1,
5795                 };
5796                 /* Internal PMD action to set register. */
5797                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5798                         .data = qrss_id,
5799                         .id = REG_NON,
5800                 };
5801                 struct rte_flow_item q_items[] = {
5802                         {
5803                                 .type = (enum rte_flow_item_type)
5804                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5805                                 .spec = &q_tag_spec,
5806                                 .last = NULL,
5807                                 .mask = NULL,
5808                         },
5809                         {
5810                                 .type = RTE_FLOW_ITEM_TYPE_END,
5811                         },
5812                 };
5813                 struct rte_flow_action q_actions[] = {
5814                         {
5815                                 .type = qrss->type,
5816                                 .conf = qrss->conf,
5817                         },
5818                         {
5819                                 .type = RTE_FLOW_ACTION_TYPE_END,
5820                         },
5821                 };
5822                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5823
5824                 /*
5825                  * Configure the tag item only if there is no meter subflow.
5826                  * Since tag is already marked in the meter suffix subflow
5827                  * we can just use the meter suffix items as is.
5828                  */
5829                 if (qrss_id) {
5830                         /* Not meter subflow. */
5831                         MLX5_ASSERT(!mtr_sfx);
5832                         /*
5833                          * Put unique id in prefix flow due to it is destroyed
5834                          * after suffix flow and id will be freed after there
5835                          * is no actual flows with this id and identifier
5836                          * reallocation becomes possible (for example, for
5837                          * other flows in other threads).
5838                          */
5839                         dev_flow->handle->split_flow_id = qrss_id;
5840                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5841                                                    error);
5842                         if (ret < 0)
5843                                 goto exit;
5844                         q_tag_spec.id = ret;
5845                 }
5846                 dev_flow = NULL;
5847                 /* Add suffix subflow to execute Q/RSS. */
5848                 flow_split_info->prefix_layers = layers;
5849                 flow_split_info->prefix_mark = 0;
5850                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5851                                               &q_attr, mtr_sfx ? items :
5852                                               q_items, q_actions,
5853                                               flow_split_info, error);
5854                 if (ret < 0)
5855                         goto exit;
5856                 /* qrss ID should be freed if failed. */
5857                 qrss_id = 0;
5858                 MLX5_ASSERT(dev_flow);
5859         }
5860
5861 exit:
5862         /*
5863          * We do not destroy the partially created sub_flows in case of error.
5864          * These ones are included into parent flow list and will be destroyed
5865          * by flow_drv_destroy.
5866          */
5867         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5868                         qrss_id);
5869         mlx5_free(ext_actions);
5870         return ret;
5871 }
5872
5873 /**
5874  * Create meter internal drop flow with the original pattern.
5875  *
5876  * @param dev
5877  *   Pointer to Ethernet device.
5878  * @param[in] flow
5879  *   Parent flow structure pointer.
5880  * @param[in] attr
5881  *   Flow rule attributes.
5882  * @param[in] items
5883  *   Pattern specification (list terminated by the END pattern item).
5884  * @param[in] flow_split_info
5885  *   Pointer to flow split info structure.
5886  * @param[in] fm
5887  *   Pointer to flow meter structure.
5888  * @param[out] error
5889  *   Perform verbose error reporting if not NULL.
5890  * @return
5891  *   0 on success, negative value otherwise
5892  */
5893 static uint32_t
5894 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5895                         struct rte_flow *flow,
5896                         const struct rte_flow_attr *attr,
5897                         const struct rte_flow_item items[],
5898                         struct mlx5_flow_split_info *flow_split_info,
5899                         struct mlx5_flow_meter_info *fm,
5900                         struct rte_flow_error *error)
5901 {
5902         struct mlx5_flow *dev_flow = NULL;
5903         struct rte_flow_attr drop_attr = *attr;
5904         struct rte_flow_action drop_actions[3];
5905         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5906
5907         MLX5_ASSERT(fm->drop_cnt);
5908         drop_actions[0].type =
5909                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5910         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5911         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5912         drop_actions[1].conf = NULL;
5913         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5914         drop_actions[2].conf = NULL;
5915         drop_split_info.external = false;
5916         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5917         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5918         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5919         return flow_create_split_inner(dev, flow, &dev_flow,
5920                                 &drop_attr, items, drop_actions,
5921                                 &drop_split_info, error);
5922 }
5923
5924 /**
5925  * The splitting for meter feature.
5926  *
5927  * - The meter flow will be split to two flows as prefix and
5928  *   suffix flow. The packets make sense only it pass the prefix
5929  *   meter action.
5930  *
5931  * - Reg_C_5 is used for the packet to match betweend prefix and
5932  *   suffix flow.
5933  *
5934  * @param dev
5935  *   Pointer to Ethernet device.
5936  * @param[in] flow
5937  *   Parent flow structure pointer.
5938  * @param[in] attr
5939  *   Flow rule attributes.
5940  * @param[in] items
5941  *   Pattern specification (list terminated by the END pattern item).
5942  * @param[in] actions
5943  *   Associated actions (list terminated by the END action).
5944  * @param[in] flow_split_info
5945  *   Pointer to flow split info structure.
5946  * @param[out] error
5947  *   Perform verbose error reporting if not NULL.
5948  * @return
5949  *   0 on success, negative value otherwise
5950  */
5951 static int
5952 flow_create_split_meter(struct rte_eth_dev *dev,
5953                         struct rte_flow *flow,
5954                         const struct rte_flow_attr *attr,
5955                         const struct rte_flow_item items[],
5956                         const struct rte_flow_action actions[],
5957                         struct mlx5_flow_split_info *flow_split_info,
5958                         struct rte_flow_error *error)
5959 {
5960         struct mlx5_priv *priv = dev->data->dev_private;
5961         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5962         struct rte_flow_action *sfx_actions = NULL;
5963         struct rte_flow_action *pre_actions = NULL;
5964         struct rte_flow_item *sfx_items = NULL;
5965         struct mlx5_flow *dev_flow = NULL;
5966         struct rte_flow_attr sfx_attr = *attr;
5967         struct mlx5_flow_meter_info *fm = NULL;
5968         uint8_t skip_scale_restore;
5969         bool has_mtr = false;
5970         bool has_modify = false;
5971         bool set_mtr_reg = true;
5972         bool is_mtr_hierarchy = false;
5973         uint32_t meter_id = 0;
5974         uint32_t mtr_idx = 0;
5975         uint32_t mtr_flow_id = 0;
5976         size_t act_size;
5977         size_t item_size;
5978         int actions_n = 0;
5979         int ret = 0;
5980
5981         if (priv->mtr_en)
5982                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5983                                                     &has_modify, &meter_id);
5984         if (has_mtr) {
5985                 if (flow->meter) {
5986                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5987                         if (!fm)
5988                                 return rte_flow_error_set(error, EINVAL,
5989                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5990                                                 NULL, "Meter not found.");
5991                 } else {
5992                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5993                         if (!fm)
5994                                 return rte_flow_error_set(error, EINVAL,
5995                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5996                                                 NULL, "Meter not found.");
5997                         ret = mlx5_flow_meter_attach(priv, fm,
5998                                                      &sfx_attr, error);
5999                         if (ret)
6000                                 return -rte_errno;
6001                         flow->meter = mtr_idx;
6002                 }
6003                 MLX5_ASSERT(wks);
6004                 wks->fm = fm;
6005                 if (!fm->def_policy) {
6006                         wks->policy = mlx5_flow_meter_policy_find(dev,
6007                                                                   fm->policy_id,
6008                                                                   NULL);
6009                         MLX5_ASSERT(wks->policy);
6010                         if (wks->policy->is_hierarchy) {
6011                                 wks->final_policy =
6012                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
6013                                                                 wks->policy);
6014                                 if (!wks->final_policy)
6015                                         return rte_flow_error_set(error,
6016                                         EINVAL,
6017                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6018                                 "Failed to find terminal policy of hierarchy.");
6019                                 is_mtr_hierarchy = true;
6020                         }
6021                 }
6022                 /*
6023                  * If it isn't default-policy Meter, and
6024                  * 1. There's no action in flow to change
6025                  *    packet (modify/encap/decap etc.), OR
6026                  * 2. No drop count needed for this meter.
6027                  * 3. It's not meter hierarchy.
6028                  * Then no need to use regC to save meter id anymore.
6029                  */
6030                 if (!fm->def_policy && !is_mtr_hierarchy &&
6031                     (!has_modify || !fm->drop_cnt))
6032                         set_mtr_reg = false;
6033                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
6034                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
6035                            sizeof(struct mlx5_rte_flow_action_set_tag);
6036                 /* Suffix items: tag, vlan, port id, end. */
6037 #define METER_SUFFIX_ITEM 4
6038                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
6039                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6040                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
6041                                           0, SOCKET_ID_ANY);
6042                 if (!sfx_actions)
6043                         return rte_flow_error_set(error, ENOMEM,
6044                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6045                                                   NULL, "no memory to split "
6046                                                   "meter flow");
6047                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
6048                              act_size);
6049                 /* There's no suffix flow for meter of non-default policy. */
6050                 if (!fm->def_policy)
6051                         pre_actions = sfx_actions + 1;
6052                 else
6053                         pre_actions = sfx_actions + actions_n;
6054                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
6055                                             items, sfx_items, actions,
6056                                             sfx_actions, pre_actions,
6057                                             (set_mtr_reg ? &mtr_flow_id : NULL),
6058                                             error);
6059                 if (ret) {
6060                         ret = -rte_errno;
6061                         goto exit;
6062                 }
6063                 /* Add the prefix subflow. */
6064                 flow_split_info->prefix_mark = 0;
6065                 skip_scale_restore = flow_split_info->skip_scale;
6066                 flow_split_info->skip_scale |=
6067                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6068                 ret = flow_create_split_inner(dev, flow, &dev_flow,
6069                                               attr, items, pre_actions,
6070                                               flow_split_info, error);
6071                 flow_split_info->skip_scale = skip_scale_restore;
6072                 if (ret) {
6073                         if (mtr_flow_id)
6074                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6075                         ret = -rte_errno;
6076                         goto exit;
6077                 }
6078                 if (mtr_flow_id) {
6079                         dev_flow->handle->split_flow_id = mtr_flow_id;
6080                         dev_flow->handle->is_meter_flow_id = 1;
6081                 }
6082                 if (!fm->def_policy) {
6083                         if (!set_mtr_reg && fm->drop_cnt)
6084                                 ret =
6085                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6086                                                         &sfx_attr, items,
6087                                                         flow_split_info,
6088                                                         fm, error);
6089                         goto exit;
6090                 }
6091                 /* Setting the sfx group atrr. */
6092                 sfx_attr.group = sfx_attr.transfer ?
6093                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6094                                  MLX5_FLOW_TABLE_LEVEL_METER;
6095                 flow_split_info->prefix_layers =
6096                                 flow_get_prefix_layer_flags(dev_flow);
6097                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6098                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6099         }
6100         /* Add the prefix subflow. */
6101         ret = flow_create_split_metadata(dev, flow,
6102                                          &sfx_attr, sfx_items ?
6103                                          sfx_items : items,
6104                                          sfx_actions ? sfx_actions : actions,
6105                                          flow_split_info, error);
6106 exit:
6107         if (sfx_actions)
6108                 mlx5_free(sfx_actions);
6109         return ret;
6110 }
6111
6112 /**
6113  * The splitting for sample feature.
6114  *
6115  * Once Sample action is detected in the action list, the flow actions should
6116  * be split into prefix sub flow and suffix sub flow.
6117  *
6118  * The original items remain in the prefix sub flow, all actions preceding the
6119  * sample action and the sample action itself will be copied to the prefix
6120  * sub flow, the actions following the sample action will be copied to the
6121  * suffix sub flow, Queue action always be located in the suffix sub flow.
6122  *
6123  * In order to make the packet from prefix sub flow matches with suffix sub
6124  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6125  * flow uses tag item with the unique flow id.
6126  *
6127  * @param dev
6128  *   Pointer to Ethernet device.
6129  * @param[in] flow
6130  *   Parent flow structure pointer.
6131  * @param[in] attr
6132  *   Flow rule attributes.
6133  * @param[in] items
6134  *   Pattern specification (list terminated by the END pattern item).
6135  * @param[in] actions
6136  *   Associated actions (list terminated by the END action).
6137  * @param[in] flow_split_info
6138  *   Pointer to flow split info structure.
6139  * @param[out] error
6140  *   Perform verbose error reporting if not NULL.
6141  * @return
6142  *   0 on success, negative value otherwise
6143  */
6144 static int
6145 flow_create_split_sample(struct rte_eth_dev *dev,
6146                          struct rte_flow *flow,
6147                          const struct rte_flow_attr *attr,
6148                          const struct rte_flow_item items[],
6149                          const struct rte_flow_action actions[],
6150                          struct mlx5_flow_split_info *flow_split_info,
6151                          struct rte_flow_error *error)
6152 {
6153         struct mlx5_priv *priv = dev->data->dev_private;
6154         struct rte_flow_action *sfx_actions = NULL;
6155         struct rte_flow_action *pre_actions = NULL;
6156         struct rte_flow_item *sfx_items = NULL;
6157         struct mlx5_flow *dev_flow = NULL;
6158         struct rte_flow_attr sfx_attr = *attr;
6159 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6160         struct mlx5_flow_dv_sample_resource *sample_res;
6161         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6162         struct mlx5_flow_tbl_resource *sfx_tbl;
6163 #endif
6164         size_t act_size;
6165         size_t item_size;
6166         uint32_t fdb_tx = 0;
6167         int32_t tag_id = 0;
6168         int actions_n = 0;
6169         int sample_action_pos;
6170         int qrss_action_pos;
6171         int add_tag = 0;
6172         int modify_after_mirror = 0;
6173         uint16_t jump_table = 0;
6174         const uint32_t next_ft_step = 1;
6175         int ret = 0;
6176
6177         if (priv->sampler_en)
6178                 actions_n = flow_check_match_action(actions, attr,
6179                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6180                                         &sample_action_pos, &qrss_action_pos,
6181                                         &modify_after_mirror);
6182         if (actions_n) {
6183                 /* The prefix actions must includes sample, tag, end. */
6184                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6185                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6186                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6187                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6188                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6189                                           item_size), 0, SOCKET_ID_ANY);
6190                 if (!sfx_actions)
6191                         return rte_flow_error_set(error, ENOMEM,
6192                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6193                                                   NULL, "no memory to split "
6194                                                   "sample flow");
6195                 /* The representor_id is UINT16_MAX for uplink. */
6196                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6197                 /*
6198                  * When reg_c_preserve is set, metadata registers Cx preserve
6199                  * their value even through packet duplication.
6200                  */
6201                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6202                 if (add_tag)
6203                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6204                                         + act_size);
6205                 if (modify_after_mirror)
6206                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6207                                      next_ft_step;
6208                 pre_actions = sfx_actions + actions_n;
6209                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6210                                                 actions, sfx_actions,
6211                                                 pre_actions, actions_n,
6212                                                 sample_action_pos,
6213                                                 qrss_action_pos, jump_table,
6214                                                 error);
6215                 if (tag_id < 0 || (add_tag && !tag_id)) {
6216                         ret = -rte_errno;
6217                         goto exit;
6218                 }
6219                 if (modify_after_mirror)
6220                         flow_split_info->skip_scale =
6221                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6222                 /* Add the prefix subflow. */
6223                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6224                                               items, pre_actions,
6225                                               flow_split_info, error);
6226                 if (ret) {
6227                         ret = -rte_errno;
6228                         goto exit;
6229                 }
6230                 dev_flow->handle->split_flow_id = tag_id;
6231 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6232                 if (!modify_after_mirror) {
6233                         /* Set the sfx group attr. */
6234                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6235                                                 dev_flow->dv.sample_res;
6236                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6237                                                 sample_res->normal_path_tbl;
6238                         sfx_tbl_data = container_of(sfx_tbl,
6239                                                 struct mlx5_flow_tbl_data_entry,
6240                                                 tbl);
6241                         sfx_attr.group = sfx_attr.transfer ?
6242                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6243                 } else {
6244                         MLX5_ASSERT(attr->transfer);
6245                         sfx_attr.group = jump_table;
6246                 }
6247                 flow_split_info->prefix_layers =
6248                                 flow_get_prefix_layer_flags(dev_flow);
6249                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6250                 /* Suffix group level already be scaled with factor, set
6251                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6252                  * again in translation.
6253                  */
6254                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6255 #endif
6256         }
6257         /* Add the suffix subflow. */
6258         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6259                                       sfx_items ? sfx_items : items,
6260                                       sfx_actions ? sfx_actions : actions,
6261                                       flow_split_info, error);
6262 exit:
6263         if (sfx_actions)
6264                 mlx5_free(sfx_actions);
6265         return ret;
6266 }
6267
6268 /**
6269  * Split the flow to subflow set. The splitters might be linked
6270  * in the chain, like this:
6271  * flow_create_split_outer() calls:
6272  *   flow_create_split_meter() calls:
6273  *     flow_create_split_metadata(meter_subflow_0) calls:
6274  *       flow_create_split_inner(metadata_subflow_0)
6275  *       flow_create_split_inner(metadata_subflow_1)
6276  *       flow_create_split_inner(metadata_subflow_2)
6277  *     flow_create_split_metadata(meter_subflow_1) calls:
6278  *       flow_create_split_inner(metadata_subflow_0)
6279  *       flow_create_split_inner(metadata_subflow_1)
6280  *       flow_create_split_inner(metadata_subflow_2)
6281  *
6282  * This provide flexible way to add new levels of flow splitting.
6283  * The all of successfully created subflows are included to the
6284  * parent flow dev_flow list.
6285  *
6286  * @param dev
6287  *   Pointer to Ethernet device.
6288  * @param[in] flow
6289  *   Parent flow structure pointer.
6290  * @param[in] attr
6291  *   Flow rule attributes.
6292  * @param[in] items
6293  *   Pattern specification (list terminated by the END pattern item).
6294  * @param[in] actions
6295  *   Associated actions (list terminated by the END action).
6296  * @param[in] flow_split_info
6297  *   Pointer to flow split info structure.
6298  * @param[out] error
6299  *   Perform verbose error reporting if not NULL.
6300  * @return
6301  *   0 on success, negative value otherwise
6302  */
6303 static int
6304 flow_create_split_outer(struct rte_eth_dev *dev,
6305                         struct rte_flow *flow,
6306                         const struct rte_flow_attr *attr,
6307                         const struct rte_flow_item items[],
6308                         const struct rte_flow_action actions[],
6309                         struct mlx5_flow_split_info *flow_split_info,
6310                         struct rte_flow_error *error)
6311 {
6312         int ret;
6313
6314         ret = flow_create_split_sample(dev, flow, attr, items,
6315                                        actions, flow_split_info, error);
6316         MLX5_ASSERT(ret <= 0);
6317         return ret;
6318 }
6319
6320 static inline struct mlx5_flow_tunnel *
6321 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6322 {
6323         struct mlx5_flow_tunnel *tunnel;
6324
6325 #pragma GCC diagnostic push
6326 #pragma GCC diagnostic ignored "-Wcast-qual"
6327         tunnel = (typeof(tunnel))flow->tunnel;
6328 #pragma GCC diagnostic pop
6329
6330         return tunnel;
6331 }
6332
6333 /**
6334  * Adjust flow RSS workspace if needed.
6335  *
6336  * @param wks
6337  *   Pointer to thread flow work space.
6338  * @param rss_desc
6339  *   Pointer to RSS descriptor.
6340  * @param[in] nrssq_num
6341  *   New RSS queue number.
6342  *
6343  * @return
6344  *   0 on success, -1 otherwise and rte_errno is set.
6345  */
6346 static int
6347 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6348                           struct mlx5_flow_rss_desc *rss_desc,
6349                           uint32_t nrssq_num)
6350 {
6351         if (likely(nrssq_num <= wks->rssq_num))
6352                 return 0;
6353         rss_desc->queue = realloc(rss_desc->queue,
6354                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6355         if (!rss_desc->queue) {
6356                 rte_errno = ENOMEM;
6357                 return -1;
6358         }
6359         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6360         return 0;
6361 }
6362
6363 /**
6364  * Create a flow and add it to @p list.
6365  *
6366  * @param dev
6367  *   Pointer to Ethernet device.
6368  * @param list
6369  *   Pointer to a TAILQ flow list. If this parameter NULL,
6370  *   no list insertion occurred, flow is just created,
6371  *   this is caller's responsibility to track the
6372  *   created flow.
6373  * @param[in] attr
6374  *   Flow rule attributes.
6375  * @param[in] items
6376  *   Pattern specification (list terminated by the END pattern item).
6377  * @param[in] actions
6378  *   Associated actions (list terminated by the END action).
6379  * @param[in] external
6380  *   This flow rule is created by request external to PMD.
6381  * @param[out] error
6382  *   Perform verbose error reporting if not NULL.
6383  *
6384  * @return
6385  *   A flow index on success, 0 otherwise and rte_errno is set.
6386  */
6387 static uint32_t
6388 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6389                  const struct rte_flow_attr *attr,
6390                  const struct rte_flow_item items[],
6391                  const struct rte_flow_action original_actions[],
6392                  bool external, struct rte_flow_error *error)
6393 {
6394         struct mlx5_priv *priv = dev->data->dev_private;
6395         struct rte_flow *flow = NULL;
6396         struct mlx5_flow *dev_flow;
6397         const struct rte_flow_action_rss *rss = NULL;
6398         struct mlx5_translated_action_handle
6399                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6400         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6401         union {
6402                 struct mlx5_flow_expand_rss buf;
6403                 uint8_t buffer[4096];
6404         } expand_buffer;
6405         union {
6406                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6407                 uint8_t buffer[2048];
6408         } actions_rx;
6409         union {
6410                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6411                 uint8_t buffer[2048];
6412         } actions_hairpin_tx;
6413         union {
6414                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6415                 uint8_t buffer[2048];
6416         } items_tx;
6417         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6418         struct mlx5_flow_rss_desc *rss_desc;
6419         const struct rte_flow_action *p_actions_rx;
6420         uint32_t i;
6421         uint32_t idx = 0;
6422         int hairpin_flow;
6423         struct rte_flow_attr attr_tx = { .priority = 0 };
6424         const struct rte_flow_action *actions;
6425         struct rte_flow_action *translated_actions = NULL;
6426         struct mlx5_flow_tunnel *tunnel;
6427         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6428         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6429         struct mlx5_flow_split_info flow_split_info = {
6430                 .external = !!external,
6431                 .skip_scale = 0,
6432                 .flow_idx = 0,
6433                 .prefix_mark = 0,
6434                 .prefix_layers = 0,
6435                 .table_id = 0
6436         };
6437         int ret;
6438
6439         MLX5_ASSERT(wks);
6440         rss_desc = &wks->rss_desc;
6441         ret = flow_action_handles_translate(dev, original_actions,
6442                                             indir_actions,
6443                                             &indir_actions_n,
6444                                             &translated_actions, error);
6445         if (ret < 0) {
6446                 MLX5_ASSERT(translated_actions == NULL);
6447                 return 0;
6448         }
6449         actions = translated_actions ? translated_actions : original_actions;
6450         p_actions_rx = actions;
6451         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6452         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6453                                 external, hairpin_flow, error);
6454         if (ret < 0)
6455                 goto error_before_hairpin_split;
6456         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6457         if (!flow) {
6458                 rte_errno = ENOMEM;
6459                 goto error_before_hairpin_split;
6460         }
6461         if (hairpin_flow > 0) {
6462                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6463                         rte_errno = EINVAL;
6464                         goto error_before_hairpin_split;
6465                 }
6466                 flow_hairpin_split(dev, actions, actions_rx.actions,
6467                                    actions_hairpin_tx.actions, items_tx.items,
6468                                    idx);
6469                 p_actions_rx = actions_rx.actions;
6470         }
6471         flow_split_info.flow_idx = idx;
6472         flow->drv_type = flow_get_drv_type(dev, attr);
6473         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6474                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6475         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6476         /* RSS Action only works on NIC RX domain */
6477         if (attr->ingress && !attr->transfer)
6478                 rss = flow_get_rss_action(dev, p_actions_rx);
6479         if (rss) {
6480                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6481                         return 0;
6482                 /*
6483                  * The following information is required by
6484                  * mlx5_flow_hashfields_adjust() in advance.
6485                  */
6486                 rss_desc->level = rss->level;
6487                 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
6488                 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
6489         }
6490         flow->dev_handles = 0;
6491         if (rss && rss->types) {
6492                 unsigned int graph_root;
6493
6494                 graph_root = find_graph_root(rss->level);
6495                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6496                                            items, rss->types,
6497                                            mlx5_support_expansion, graph_root);
6498                 MLX5_ASSERT(ret > 0 &&
6499                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6500                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6501                         for (i = 0; i < buf->entries; ++i)
6502                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6503                 }
6504         } else {
6505                 buf->entries = 1;
6506                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6507         }
6508         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6509                                                       indir_actions_n);
6510         for (i = 0; i < buf->entries; ++i) {
6511                 /* Initialize flow split data. */
6512                 flow_split_info.prefix_layers = 0;
6513                 flow_split_info.prefix_mark = 0;
6514                 flow_split_info.skip_scale = 0;
6515                 /*
6516                  * The splitter may create multiple dev_flows,
6517                  * depending on configuration. In the simplest
6518                  * case it just creates unmodified original flow.
6519                  */
6520                 ret = flow_create_split_outer(dev, flow, attr,
6521                                               buf->entry[i].pattern,
6522                                               p_actions_rx, &flow_split_info,
6523                                               error);
6524                 if (ret < 0)
6525                         goto error;
6526                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6527                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6528                                                            p_actions_rx,
6529                                                            idx,
6530                                                            wks->flows[0].tunnel,
6531                                                            &default_miss_ctx,
6532                                                            error);
6533                         if (ret < 0) {
6534                                 mlx5_free(default_miss_ctx.queue);
6535                                 goto error;
6536                         }
6537                 }
6538         }
6539         /* Create the tx flow. */
6540         if (hairpin_flow) {
6541                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6542                 attr_tx.ingress = 0;
6543                 attr_tx.egress = 1;
6544                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6545                                          actions_hairpin_tx.actions,
6546                                          idx, error);
6547                 if (!dev_flow)
6548                         goto error;
6549                 dev_flow->flow = flow;
6550                 dev_flow->external = 0;
6551                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6552                               dev_flow->handle, next);
6553                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6554                                          items_tx.items,
6555                                          actions_hairpin_tx.actions, error);
6556                 if (ret < 0)
6557                         goto error;
6558         }
6559         /*
6560          * Update the metadata register copy table. If extensive
6561          * metadata feature is enabled and registers are supported
6562          * we might create the extra rte_flow for each unique
6563          * MARK/FLAG action ID.
6564          *
6565          * The table is updated for ingress Flows only, because
6566          * the egress Flows belong to the different device and
6567          * copy table should be updated in peer NIC Rx domain.
6568          */
6569         if (attr->ingress &&
6570             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6571                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6572                 if (ret)
6573                         goto error;
6574         }
6575         /*
6576          * If the flow is external (from application) OR device is started,
6577          * OR mreg discover, then apply immediately.
6578          */
6579         if (external || dev->data->dev_started ||
6580             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6581              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6582                 ret = flow_drv_apply(dev, flow, error);
6583                 if (ret < 0)
6584                         goto error;
6585         }
6586         flow->type = type;
6587         flow_rxq_flags_set(dev, flow);
6588         rte_free(translated_actions);
6589         tunnel = flow_tunnel_from_rule(wks->flows);
6590         if (tunnel) {
6591                 flow->tunnel = 1;
6592                 flow->tunnel_id = tunnel->tunnel_id;
6593                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6594                 mlx5_free(default_miss_ctx.queue);
6595         }
6596         mlx5_flow_pop_thread_workspace();
6597         return idx;
6598 error:
6599         MLX5_ASSERT(flow);
6600         ret = rte_errno; /* Save rte_errno before cleanup. */
6601         flow_mreg_del_copy_action(dev, flow);
6602         flow_drv_destroy(dev, flow);
6603         if (rss_desc->shared_rss)
6604                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6605                         mlx5_ipool_get
6606                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6607                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6608         mlx5_ipool_free(priv->flows[type], idx);
6609         rte_errno = ret; /* Restore rte_errno. */
6610         ret = rte_errno;
6611         rte_errno = ret;
6612         mlx5_flow_pop_thread_workspace();
6613 error_before_hairpin_split:
6614         rte_free(translated_actions);
6615         return 0;
6616 }
6617
6618 /**
6619  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6620  * incoming packets to table 1.
6621  *
6622  * Other flow rules, requested for group n, will be created in
6623  * e-switch table n+1.
6624  * Jump action to e-switch group n will be created to group n+1.
6625  *
6626  * Used when working in switchdev mode, to utilise advantages of table 1
6627  * and above.
6628  *
6629  * @param dev
6630  *   Pointer to Ethernet device.
6631  *
6632  * @return
6633  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6634  */
6635 struct rte_flow *
6636 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6637 {
6638         const struct rte_flow_attr attr = {
6639                 .group = 0,
6640                 .priority = 0,
6641                 .ingress = 1,
6642                 .egress = 0,
6643                 .transfer = 1,
6644         };
6645         const struct rte_flow_item pattern = {
6646                 .type = RTE_FLOW_ITEM_TYPE_END,
6647         };
6648         struct rte_flow_action_jump jump = {
6649                 .group = 1,
6650         };
6651         const struct rte_flow_action actions[] = {
6652                 {
6653                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6654                         .conf = &jump,
6655                 },
6656                 {
6657                         .type = RTE_FLOW_ACTION_TYPE_END,
6658                 },
6659         };
6660         struct rte_flow_error error;
6661
6662         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6663                                                    &attr, &pattern,
6664                                                    actions, false, &error);
6665 }
6666
6667 /**
6668  * Create a dedicated flow rule on e-switch table 1, matches ESW manager
6669  * and sq number, directs all packets to peer vport.
6670  *
6671  * @param dev
6672  *   Pointer to Ethernet device.
6673  * @param txq
6674  *   Txq index.
6675  *
6676  * @return
6677  *   Flow ID on success, 0 otherwise and rte_errno is set.
6678  */
6679 uint32_t
6680 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
6681 {
6682         struct rte_flow_attr attr = {
6683                 .group = 0,
6684                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6685                 .ingress = 1,
6686                 .egress = 0,
6687                 .transfer = 1,
6688         };
6689         struct rte_flow_item_port_id port_spec = {
6690                 .id = MLX5_PORT_ESW_MGR,
6691         };
6692         struct mlx5_rte_flow_item_tx_queue txq_spec = {
6693                 .queue = txq,
6694         };
6695         struct rte_flow_item pattern[] = {
6696                 {
6697                         .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
6698                         .spec = &port_spec,
6699                 },
6700                 {
6701                         .type = (enum rte_flow_item_type)
6702                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6703                         .spec = &txq_spec,
6704                 },
6705                 {
6706                         .type = RTE_FLOW_ITEM_TYPE_END,
6707                 },
6708         };
6709         struct rte_flow_action_jump jump = {
6710                 .group = 1,
6711         };
6712         struct rte_flow_action_port_id port = {
6713                 .id = dev->data->port_id,
6714         };
6715         struct rte_flow_action actions[] = {
6716                 {
6717                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6718                         .conf = &jump,
6719                 },
6720                 {
6721                         .type = RTE_FLOW_ACTION_TYPE_END,
6722                 },
6723         };
6724         struct rte_flow_error error;
6725
6726         /*
6727          * Creates group 0, highest priority jump flow.
6728          * Matches txq to bypass kernel packets.
6729          */
6730         if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
6731                              false, &error) == 0)
6732                 return 0;
6733         /* Create group 1, lowest priority redirect flow for txq. */
6734         attr.group = 1;
6735         actions[0].conf = &port;
6736         actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
6737         return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
6738                                 actions, false, &error);
6739 }
6740
6741 /**
6742  * Validate a flow supported by the NIC.
6743  *
6744  * @see rte_flow_validate()
6745  * @see rte_flow_ops
6746  */
6747 int
6748 mlx5_flow_validate(struct rte_eth_dev *dev,
6749                    const struct rte_flow_attr *attr,
6750                    const struct rte_flow_item items[],
6751                    const struct rte_flow_action original_actions[],
6752                    struct rte_flow_error *error)
6753 {
6754         int hairpin_flow;
6755         struct mlx5_translated_action_handle
6756                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6757         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6758         const struct rte_flow_action *actions;
6759         struct rte_flow_action *translated_actions = NULL;
6760         int ret = flow_action_handles_translate(dev, original_actions,
6761                                                 indir_actions,
6762                                                 &indir_actions_n,
6763                                                 &translated_actions, error);
6764
6765         if (ret)
6766                 return ret;
6767         actions = translated_actions ? translated_actions : original_actions;
6768         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6769         ret = flow_drv_validate(dev, attr, items, actions,
6770                                 true, hairpin_flow, error);
6771         rte_free(translated_actions);
6772         return ret;
6773 }
6774
6775 /**
6776  * Create a flow.
6777  *
6778  * @see rte_flow_create()
6779  * @see rte_flow_ops
6780  */
6781 struct rte_flow *
6782 mlx5_flow_create(struct rte_eth_dev *dev,
6783                  const struct rte_flow_attr *attr,
6784                  const struct rte_flow_item items[],
6785                  const struct rte_flow_action actions[],
6786                  struct rte_flow_error *error)
6787 {
6788         /*
6789          * If the device is not started yet, it is not allowed to created a
6790          * flow from application. PMD default flows and traffic control flows
6791          * are not affected.
6792          */
6793         if (unlikely(!dev->data->dev_started)) {
6794                 DRV_LOG(DEBUG, "port %u is not started when "
6795                         "inserting a flow", dev->data->port_id);
6796                 rte_flow_error_set(error, ENODEV,
6797                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6798                                    NULL,
6799                                    "port not started");
6800                 return NULL;
6801         }
6802
6803         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6804                                                    attr, items, actions,
6805                                                    true, error);
6806 }
6807
6808 /**
6809  * Destroy a flow in a list.
6810  *
6811  * @param dev
6812  *   Pointer to Ethernet device.
6813  * @param[in] flow_idx
6814  *   Index of flow to destroy.
6815  */
6816 static void
6817 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6818                   uint32_t flow_idx)
6819 {
6820         struct mlx5_priv *priv = dev->data->dev_private;
6821         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6822
6823         if (!flow)
6824                 return;
6825         MLX5_ASSERT(flow->type == type);
6826         /*
6827          * Update RX queue flags only if port is started, otherwise it is
6828          * already clean.
6829          */
6830         if (dev->data->dev_started)
6831                 flow_rxq_flags_trim(dev, flow);
6832         flow_drv_destroy(dev, flow);
6833         if (flow->tunnel) {
6834                 struct mlx5_flow_tunnel *tunnel;
6835
6836                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6837                 RTE_VERIFY(tunnel);
6838                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6839                         mlx5_flow_tunnel_free(dev, tunnel);
6840         }
6841         flow_mreg_del_copy_action(dev, flow);
6842         mlx5_ipool_free(priv->flows[type], flow_idx);
6843 }
6844
6845 /**
6846  * Destroy all flows.
6847  *
6848  * @param dev
6849  *   Pointer to Ethernet device.
6850  * @param type
6851  *   Flow type to be flushed.
6852  * @param active
6853  *   If flushing is called avtively.
6854  */
6855 void
6856 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6857                      bool active)
6858 {
6859         struct mlx5_priv *priv = dev->data->dev_private;
6860         uint32_t num_flushed = 0, fidx = 1;
6861         struct rte_flow *flow;
6862
6863         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6864                 flow_list_destroy(dev, type, fidx);
6865                 num_flushed++;
6866         }
6867         if (active) {
6868                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6869                         dev->data->port_id, num_flushed);
6870         }
6871 }
6872
6873 /**
6874  * Stop all default actions for flows.
6875  *
6876  * @param dev
6877  *   Pointer to Ethernet device.
6878  */
6879 void
6880 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6881 {
6882         flow_mreg_del_default_copy_action(dev);
6883         flow_rxq_flags_clear(dev);
6884 }
6885
6886 /**
6887  * Start all default actions for flows.
6888  *
6889  * @param dev
6890  *   Pointer to Ethernet device.
6891  * @return
6892  *   0 on success, a negative errno value otherwise and rte_errno is set.
6893  */
6894 int
6895 mlx5_flow_start_default(struct rte_eth_dev *dev)
6896 {
6897         struct rte_flow_error error;
6898
6899         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6900         return flow_mreg_add_default_copy_action(dev, &error);
6901 }
6902
6903 /**
6904  * Release key of thread specific flow workspace data.
6905  */
6906 void
6907 flow_release_workspace(void *data)
6908 {
6909         struct mlx5_flow_workspace *wks = data;
6910         struct mlx5_flow_workspace *next;
6911
6912         while (wks) {
6913                 next = wks->next;
6914                 free(wks->rss_desc.queue);
6915                 free(wks);
6916                 wks = next;
6917         }
6918 }
6919
6920 /**
6921  * Get thread specific current flow workspace.
6922  *
6923  * @return pointer to thread specific flow workspace data, NULL on error.
6924  */
6925 struct mlx5_flow_workspace*
6926 mlx5_flow_get_thread_workspace(void)
6927 {
6928         struct mlx5_flow_workspace *data;
6929
6930         data = mlx5_flow_os_get_specific_workspace();
6931         MLX5_ASSERT(data && data->inuse);
6932         if (!data || !data->inuse)
6933                 DRV_LOG(ERR, "flow workspace not initialized.");
6934         return data;
6935 }
6936
6937 /**
6938  * Allocate and init new flow workspace.
6939  *
6940  * @return pointer to flow workspace data, NULL on error.
6941  */
6942 static struct mlx5_flow_workspace*
6943 flow_alloc_thread_workspace(void)
6944 {
6945         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6946
6947         if (!data) {
6948                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6949                         "memory.");
6950                 return NULL;
6951         }
6952         data->rss_desc.queue = calloc(1,
6953                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6954         if (!data->rss_desc.queue)
6955                 goto err;
6956         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6957         return data;
6958 err:
6959         if (data->rss_desc.queue)
6960                 free(data->rss_desc.queue);
6961         free(data);
6962         return NULL;
6963 }
6964
6965 /**
6966  * Get new thread specific flow workspace.
6967  *
6968  * If current workspace inuse, create new one and set as current.
6969  *
6970  * @return pointer to thread specific flow workspace data, NULL on error.
6971  */
6972 static struct mlx5_flow_workspace*
6973 mlx5_flow_push_thread_workspace(void)
6974 {
6975         struct mlx5_flow_workspace *curr;
6976         struct mlx5_flow_workspace *data;
6977
6978         curr = mlx5_flow_os_get_specific_workspace();
6979         if (!curr) {
6980                 data = flow_alloc_thread_workspace();
6981                 if (!data)
6982                         return NULL;
6983         } else if (!curr->inuse) {
6984                 data = curr;
6985         } else if (curr->next) {
6986                 data = curr->next;
6987         } else {
6988                 data = flow_alloc_thread_workspace();
6989                 if (!data)
6990                         return NULL;
6991                 curr->next = data;
6992                 data->prev = curr;
6993         }
6994         data->inuse = 1;
6995         data->flow_idx = 0;
6996         /* Set as current workspace */
6997         if (mlx5_flow_os_set_specific_workspace(data))
6998                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6999         return data;
7000 }
7001
7002 /**
7003  * Close current thread specific flow workspace.
7004  *
7005  * If previous workspace available, set it as current.
7006  *
7007  * @return pointer to thread specific flow workspace data, NULL on error.
7008  */
7009 static void
7010 mlx5_flow_pop_thread_workspace(void)
7011 {
7012         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
7013
7014         if (!data)
7015                 return;
7016         if (!data->inuse) {
7017                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
7018                 return;
7019         }
7020         data->inuse = 0;
7021         if (!data->prev)
7022                 return;
7023         if (mlx5_flow_os_set_specific_workspace(data->prev))
7024                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7025 }
7026
7027 /**
7028  * Verify the flow list is empty
7029  *
7030  * @param dev
7031  *  Pointer to Ethernet device.
7032  *
7033  * @return the number of flows not released.
7034  */
7035 int
7036 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
7037 {
7038         struct mlx5_priv *priv = dev->data->dev_private;
7039         struct rte_flow *flow;
7040         uint32_t idx = 0;
7041         int ret = 0, i;
7042
7043         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
7044                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
7045                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
7046                                 dev->data->port_id, (void *)flow);
7047                         ret++;
7048                 }
7049         }
7050         return ret;
7051 }
7052
7053 /**
7054  * Enable default hairpin egress flow.
7055  *
7056  * @param dev
7057  *   Pointer to Ethernet device.
7058  * @param queue
7059  *   The queue index.
7060  *
7061  * @return
7062  *   0 on success, a negative errno value otherwise and rte_errno is set.
7063  */
7064 int
7065 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
7066                             uint32_t queue)
7067 {
7068         const struct rte_flow_attr attr = {
7069                 .egress = 1,
7070                 .priority = 0,
7071         };
7072         struct mlx5_rte_flow_item_tx_queue queue_spec = {
7073                 .queue = queue,
7074         };
7075         struct mlx5_rte_flow_item_tx_queue queue_mask = {
7076                 .queue = UINT32_MAX,
7077         };
7078         struct rte_flow_item items[] = {
7079                 {
7080                         .type = (enum rte_flow_item_type)
7081                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7082                         .spec = &queue_spec,
7083                         .last = NULL,
7084                         .mask = &queue_mask,
7085                 },
7086                 {
7087                         .type = RTE_FLOW_ITEM_TYPE_END,
7088                 },
7089         };
7090         struct rte_flow_action_jump jump = {
7091                 .group = MLX5_HAIRPIN_TX_TABLE,
7092         };
7093         struct rte_flow_action actions[2];
7094         uint32_t flow_idx;
7095         struct rte_flow_error error;
7096
7097         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
7098         actions[0].conf = &jump;
7099         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
7100         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7101                                     &attr, items, actions, false, &error);
7102         if (!flow_idx) {
7103                 DRV_LOG(DEBUG,
7104                         "Failed to create ctrl flow: rte_errno(%d),"
7105                         " type(%d), message(%s)",
7106                         rte_errno, error.type,
7107                         error.message ? error.message : " (no stated reason)");
7108                 return -rte_errno;
7109         }
7110         return 0;
7111 }
7112
7113 /**
7114  * Enable a control flow configured from the control plane.
7115  *
7116  * @param dev
7117  *   Pointer to Ethernet device.
7118  * @param eth_spec
7119  *   An Ethernet flow spec to apply.
7120  * @param eth_mask
7121  *   An Ethernet flow mask to apply.
7122  * @param vlan_spec
7123  *   A VLAN flow spec to apply.
7124  * @param vlan_mask
7125  *   A VLAN flow mask to apply.
7126  *
7127  * @return
7128  *   0 on success, a negative errno value otherwise and rte_errno is set.
7129  */
7130 int
7131 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
7132                     struct rte_flow_item_eth *eth_spec,
7133                     struct rte_flow_item_eth *eth_mask,
7134                     struct rte_flow_item_vlan *vlan_spec,
7135                     struct rte_flow_item_vlan *vlan_mask)
7136 {
7137         struct mlx5_priv *priv = dev->data->dev_private;
7138         const struct rte_flow_attr attr = {
7139                 .ingress = 1,
7140                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7141         };
7142         struct rte_flow_item items[] = {
7143                 {
7144                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7145                         .spec = eth_spec,
7146                         .last = NULL,
7147                         .mask = eth_mask,
7148                 },
7149                 {
7150                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7151                                               RTE_FLOW_ITEM_TYPE_END,
7152                         .spec = vlan_spec,
7153                         .last = NULL,
7154                         .mask = vlan_mask,
7155                 },
7156                 {
7157                         .type = RTE_FLOW_ITEM_TYPE_END,
7158                 },
7159         };
7160         uint16_t queue[priv->reta_idx_n];
7161         struct rte_flow_action_rss action_rss = {
7162                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7163                 .level = 0,
7164                 .types = priv->rss_conf.rss_hf,
7165                 .key_len = priv->rss_conf.rss_key_len,
7166                 .queue_num = priv->reta_idx_n,
7167                 .key = priv->rss_conf.rss_key,
7168                 .queue = queue,
7169         };
7170         struct rte_flow_action actions[] = {
7171                 {
7172                         .type = RTE_FLOW_ACTION_TYPE_RSS,
7173                         .conf = &action_rss,
7174                 },
7175                 {
7176                         .type = RTE_FLOW_ACTION_TYPE_END,
7177                 },
7178         };
7179         uint32_t flow_idx;
7180         struct rte_flow_error error;
7181         unsigned int i;
7182
7183         if (!priv->reta_idx_n || !priv->rxqs_n) {
7184                 return 0;
7185         }
7186         if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
7187                 action_rss.types = 0;
7188         for (i = 0; i != priv->reta_idx_n; ++i)
7189                 queue[i] = (*priv->reta_idx)[i];
7190         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7191                                     &attr, items, actions, false, &error);
7192         if (!flow_idx)
7193                 return -rte_errno;
7194         return 0;
7195 }
7196
7197 /**
7198  * Enable a flow control configured from the control plane.
7199  *
7200  * @param dev
7201  *   Pointer to Ethernet device.
7202  * @param eth_spec
7203  *   An Ethernet flow spec to apply.
7204  * @param eth_mask
7205  *   An Ethernet flow mask to apply.
7206  *
7207  * @return
7208  *   0 on success, a negative errno value otherwise and rte_errno is set.
7209  */
7210 int
7211 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7212                struct rte_flow_item_eth *eth_spec,
7213                struct rte_flow_item_eth *eth_mask)
7214 {
7215         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7216 }
7217
7218 /**
7219  * Create default miss flow rule matching lacp traffic
7220  *
7221  * @param dev
7222  *   Pointer to Ethernet device.
7223  * @param eth_spec
7224  *   An Ethernet flow spec to apply.
7225  *
7226  * @return
7227  *   0 on success, a negative errno value otherwise and rte_errno is set.
7228  */
7229 int
7230 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7231 {
7232         /*
7233          * The LACP matching is done by only using ether type since using
7234          * a multicast dst mac causes kernel to give low priority to this flow.
7235          */
7236         static const struct rte_flow_item_eth lacp_spec = {
7237                 .type = RTE_BE16(0x8809),
7238         };
7239         static const struct rte_flow_item_eth lacp_mask = {
7240                 .type = 0xffff,
7241         };
7242         const struct rte_flow_attr attr = {
7243                 .ingress = 1,
7244         };
7245         struct rte_flow_item items[] = {
7246                 {
7247                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7248                         .spec = &lacp_spec,
7249                         .mask = &lacp_mask,
7250                 },
7251                 {
7252                         .type = RTE_FLOW_ITEM_TYPE_END,
7253                 },
7254         };
7255         struct rte_flow_action actions[] = {
7256                 {
7257                         .type = (enum rte_flow_action_type)
7258                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7259                 },
7260                 {
7261                         .type = RTE_FLOW_ACTION_TYPE_END,
7262                 },
7263         };
7264         struct rte_flow_error error;
7265         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7266                                         &attr, items, actions,
7267                                         false, &error);
7268
7269         if (!flow_idx)
7270                 return -rte_errno;
7271         return 0;
7272 }
7273
7274 /**
7275  * Destroy a flow.
7276  *
7277  * @see rte_flow_destroy()
7278  * @see rte_flow_ops
7279  */
7280 int
7281 mlx5_flow_destroy(struct rte_eth_dev *dev,
7282                   struct rte_flow *flow,
7283                   struct rte_flow_error *error __rte_unused)
7284 {
7285         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7286                                 (uintptr_t)(void *)flow);
7287         return 0;
7288 }
7289
7290 /**
7291  * Destroy all flows.
7292  *
7293  * @see rte_flow_flush()
7294  * @see rte_flow_ops
7295  */
7296 int
7297 mlx5_flow_flush(struct rte_eth_dev *dev,
7298                 struct rte_flow_error *error __rte_unused)
7299 {
7300         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7301         return 0;
7302 }
7303
7304 /**
7305  * Isolated mode.
7306  *
7307  * @see rte_flow_isolate()
7308  * @see rte_flow_ops
7309  */
7310 int
7311 mlx5_flow_isolate(struct rte_eth_dev *dev,
7312                   int enable,
7313                   struct rte_flow_error *error)
7314 {
7315         struct mlx5_priv *priv = dev->data->dev_private;
7316
7317         if (dev->data->dev_started) {
7318                 rte_flow_error_set(error, EBUSY,
7319                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7320                                    NULL,
7321                                    "port must be stopped first");
7322                 return -rte_errno;
7323         }
7324         priv->isolated = !!enable;
7325         if (enable)
7326                 dev->dev_ops = &mlx5_dev_ops_isolate;
7327         else
7328                 dev->dev_ops = &mlx5_dev_ops;
7329
7330         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7331         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7332
7333         return 0;
7334 }
7335
7336 /**
7337  * Query a flow.
7338  *
7339  * @see rte_flow_query()
7340  * @see rte_flow_ops
7341  */
7342 static int
7343 flow_drv_query(struct rte_eth_dev *dev,
7344                uint32_t flow_idx,
7345                const struct rte_flow_action *actions,
7346                void *data,
7347                struct rte_flow_error *error)
7348 {
7349         struct mlx5_priv *priv = dev->data->dev_private;
7350         const struct mlx5_flow_driver_ops *fops;
7351         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7352                                                flow_idx);
7353         enum mlx5_flow_drv_type ftype;
7354
7355         if (!flow) {
7356                 return rte_flow_error_set(error, ENOENT,
7357                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7358                           NULL,
7359                           "invalid flow handle");
7360         }
7361         ftype = flow->drv_type;
7362         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7363         fops = flow_get_drv_ops(ftype);
7364
7365         return fops->query(dev, flow, actions, data, error);
7366 }
7367
7368 /**
7369  * Query a flow.
7370  *
7371  * @see rte_flow_query()
7372  * @see rte_flow_ops
7373  */
7374 int
7375 mlx5_flow_query(struct rte_eth_dev *dev,
7376                 struct rte_flow *flow,
7377                 const struct rte_flow_action *actions,
7378                 void *data,
7379                 struct rte_flow_error *error)
7380 {
7381         int ret;
7382
7383         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7384                              error);
7385         if (ret < 0)
7386                 return ret;
7387         return 0;
7388 }
7389
7390 /**
7391  * Get rte_flow callbacks.
7392  *
7393  * @param dev
7394  *   Pointer to Ethernet device structure.
7395  * @param ops
7396  *   Pointer to operation-specific structure.
7397  *
7398  * @return 0
7399  */
7400 int
7401 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7402                   const struct rte_flow_ops **ops)
7403 {
7404         *ops = &mlx5_flow_ops;
7405         return 0;
7406 }
7407
7408 /**
7409  * Validate meter policy actions.
7410  * Dispatcher for action type specific validation.
7411  *
7412  * @param[in] dev
7413  *   Pointer to the Ethernet device structure.
7414  * @param[in] action
7415  *   The meter policy action object to validate.
7416  * @param[in] attr
7417  *   Attributes of flow to determine steering domain.
7418  * @param[out] is_rss
7419  *   Is RSS or not.
7420  * @param[out] domain_bitmap
7421  *   Domain bitmap.
7422  * @param[out] is_def_policy
7423  *   Is default policy or not.
7424  * @param[out] error
7425  *   Perform verbose error reporting if not NULL. Initialized in case of
7426  *   error only.
7427  *
7428  * @return
7429  *   0 on success, otherwise negative errno value.
7430  */
7431 int
7432 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7433                         const struct rte_flow_action *actions[RTE_COLORS],
7434                         struct rte_flow_attr *attr,
7435                         bool *is_rss,
7436                         uint8_t *domain_bitmap,
7437                         uint8_t *policy_mode,
7438                         struct rte_mtr_error *error)
7439 {
7440         const struct mlx5_flow_driver_ops *fops;
7441
7442         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7443         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7444                                        domain_bitmap, policy_mode, error);
7445 }
7446
7447 /**
7448  * Destroy the meter table set.
7449  *
7450  * @param[in] dev
7451  *   Pointer to Ethernet device.
7452  * @param[in] mtr_policy
7453  *   Meter policy struct.
7454  */
7455 void
7456 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7457                       struct mlx5_flow_meter_policy *mtr_policy)
7458 {
7459         const struct mlx5_flow_driver_ops *fops;
7460
7461         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7462         fops->destroy_mtr_acts(dev, mtr_policy);
7463 }
7464
7465 /**
7466  * Create policy action, lock free,
7467  * (mutex should be acquired by caller).
7468  * Dispatcher for action type specific call.
7469  *
7470  * @param[in] dev
7471  *   Pointer to the Ethernet device structure.
7472  * @param[in] mtr_policy
7473  *   Meter policy struct.
7474  * @param[in] action
7475  *   Action specification used to create meter actions.
7476  * @param[out] error
7477  *   Perform verbose error reporting if not NULL. Initialized in case of
7478  *   error only.
7479  *
7480  * @return
7481  *   0 on success, otherwise negative errno value.
7482  */
7483 int
7484 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7485                       struct mlx5_flow_meter_policy *mtr_policy,
7486                       const struct rte_flow_action *actions[RTE_COLORS],
7487                       struct rte_mtr_error *error)
7488 {
7489         const struct mlx5_flow_driver_ops *fops;
7490
7491         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7492         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7493 }
7494
7495 /**
7496  * Create policy rules, lock free,
7497  * (mutex should be acquired by caller).
7498  * Dispatcher for action type specific call.
7499  *
7500  * @param[in] dev
7501  *   Pointer to the Ethernet device structure.
7502  * @param[in] mtr_policy
7503  *   Meter policy struct.
7504  *
7505  * @return
7506  *   0 on success, -1 otherwise.
7507  */
7508 int
7509 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7510                              struct mlx5_flow_meter_policy *mtr_policy)
7511 {
7512         const struct mlx5_flow_driver_ops *fops;
7513
7514         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7515         return fops->create_policy_rules(dev, mtr_policy);
7516 }
7517
7518 /**
7519  * Destroy policy rules, lock free,
7520  * (mutex should be acquired by caller).
7521  * Dispatcher for action type specific call.
7522  *
7523  * @param[in] dev
7524  *   Pointer to the Ethernet device structure.
7525  * @param[in] mtr_policy
7526  *   Meter policy struct.
7527  */
7528 void
7529 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7530                              struct mlx5_flow_meter_policy *mtr_policy)
7531 {
7532         const struct mlx5_flow_driver_ops *fops;
7533
7534         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7535         fops->destroy_policy_rules(dev, mtr_policy);
7536 }
7537
7538 /**
7539  * Destroy the default policy table set.
7540  *
7541  * @param[in] dev
7542  *   Pointer to Ethernet device.
7543  */
7544 void
7545 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7546 {
7547         const struct mlx5_flow_driver_ops *fops;
7548
7549         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7550         fops->destroy_def_policy(dev);
7551 }
7552
7553 /**
7554  * Destroy the default policy table set.
7555  *
7556  * @param[in] dev
7557  *   Pointer to Ethernet device.
7558  *
7559  * @return
7560  *   0 on success, -1 otherwise.
7561  */
7562 int
7563 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7564 {
7565         const struct mlx5_flow_driver_ops *fops;
7566
7567         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7568         return fops->create_def_policy(dev);
7569 }
7570
7571 /**
7572  * Create the needed meter and suffix tables.
7573  *
7574  * @param[in] dev
7575  *   Pointer to Ethernet device.
7576  *
7577  * @return
7578  *   0 on success, -1 otherwise.
7579  */
7580 int
7581 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7582                         struct mlx5_flow_meter_info *fm,
7583                         uint32_t mtr_idx,
7584                         uint8_t domain_bitmap)
7585 {
7586         const struct mlx5_flow_driver_ops *fops;
7587
7588         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7589         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7590 }
7591
7592 /**
7593  * Destroy the meter table set.
7594  *
7595  * @param[in] dev
7596  *   Pointer to Ethernet device.
7597  * @param[in] tbl
7598  *   Pointer to the meter table set.
7599  */
7600 void
7601 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7602                            struct mlx5_flow_meter_info *fm)
7603 {
7604         const struct mlx5_flow_driver_ops *fops;
7605
7606         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7607         fops->destroy_mtr_tbls(dev, fm);
7608 }
7609
7610 /**
7611  * Destroy the global meter drop table.
7612  *
7613  * @param[in] dev
7614  *   Pointer to Ethernet device.
7615  */
7616 void
7617 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7618 {
7619         const struct mlx5_flow_driver_ops *fops;
7620
7621         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7622         fops->destroy_mtr_drop_tbls(dev);
7623 }
7624
7625 /**
7626  * Destroy the sub policy table with RX queue.
7627  *
7628  * @param[in] dev
7629  *   Pointer to Ethernet device.
7630  * @param[in] mtr_policy
7631  *   Pointer to meter policy table.
7632  */
7633 void
7634 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7635                 struct mlx5_flow_meter_policy *mtr_policy)
7636 {
7637         const struct mlx5_flow_driver_ops *fops;
7638
7639         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7640         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7641 }
7642
7643 /**
7644  * Allocate the needed aso flow meter id.
7645  *
7646  * @param[in] dev
7647  *   Pointer to Ethernet device.
7648  *
7649  * @return
7650  *   Index to aso flow meter on success, NULL otherwise.
7651  */
7652 uint32_t
7653 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7654 {
7655         const struct mlx5_flow_driver_ops *fops;
7656
7657         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7658         return fops->create_meter(dev);
7659 }
7660
7661 /**
7662  * Free the aso flow meter id.
7663  *
7664  * @param[in] dev
7665  *   Pointer to Ethernet device.
7666  * @param[in] mtr_idx
7667  *  Index to aso flow meter to be free.
7668  *
7669  * @return
7670  *   0 on success.
7671  */
7672 void
7673 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7674 {
7675         const struct mlx5_flow_driver_ops *fops;
7676
7677         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7678         fops->free_meter(dev, mtr_idx);
7679 }
7680
7681 /**
7682  * Allocate a counter.
7683  *
7684  * @param[in] dev
7685  *   Pointer to Ethernet device structure.
7686  *
7687  * @return
7688  *   Index to allocated counter  on success, 0 otherwise.
7689  */
7690 uint32_t
7691 mlx5_counter_alloc(struct rte_eth_dev *dev)
7692 {
7693         const struct mlx5_flow_driver_ops *fops;
7694         struct rte_flow_attr attr = { .transfer = 0 };
7695
7696         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7697                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7698                 return fops->counter_alloc(dev);
7699         }
7700         DRV_LOG(ERR,
7701                 "port %u counter allocate is not supported.",
7702                  dev->data->port_id);
7703         return 0;
7704 }
7705
7706 /**
7707  * Free a counter.
7708  *
7709  * @param[in] dev
7710  *   Pointer to Ethernet device structure.
7711  * @param[in] cnt
7712  *   Index to counter to be free.
7713  */
7714 void
7715 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7716 {
7717         const struct mlx5_flow_driver_ops *fops;
7718         struct rte_flow_attr attr = { .transfer = 0 };
7719
7720         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7721                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7722                 fops->counter_free(dev, cnt);
7723                 return;
7724         }
7725         DRV_LOG(ERR,
7726                 "port %u counter free is not supported.",
7727                  dev->data->port_id);
7728 }
7729
7730 /**
7731  * Query counter statistics.
7732  *
7733  * @param[in] dev
7734  *   Pointer to Ethernet device structure.
7735  * @param[in] cnt
7736  *   Index to counter to query.
7737  * @param[in] clear
7738  *   Set to clear counter statistics.
7739  * @param[out] pkts
7740  *   The counter hits packets number to save.
7741  * @param[out] bytes
7742  *   The counter hits bytes number to save.
7743  *
7744  * @return
7745  *   0 on success, a negative errno value otherwise.
7746  */
7747 int
7748 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7749                    bool clear, uint64_t *pkts, uint64_t *bytes)
7750 {
7751         const struct mlx5_flow_driver_ops *fops;
7752         struct rte_flow_attr attr = { .transfer = 0 };
7753
7754         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7755                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7756                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7757         }
7758         DRV_LOG(ERR,
7759                 "port %u counter query is not supported.",
7760                  dev->data->port_id);
7761         return -ENOTSUP;
7762 }
7763
7764 /**
7765  * Allocate a new memory for the counter values wrapped by all the needed
7766  * management.
7767  *
7768  * @param[in] sh
7769  *   Pointer to mlx5_dev_ctx_shared object.
7770  *
7771  * @return
7772  *   0 on success, a negative errno value otherwise.
7773  */
7774 static int
7775 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7776 {
7777         struct mlx5_devx_mkey_attr mkey_attr;
7778         struct mlx5_counter_stats_mem_mng *mem_mng;
7779         volatile struct flow_counter_stats *raw_data;
7780         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7781         int size = (sizeof(struct flow_counter_stats) *
7782                         MLX5_COUNTERS_PER_POOL +
7783                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7784                         sizeof(struct mlx5_counter_stats_mem_mng);
7785         size_t pgsize = rte_mem_page_size();
7786         uint8_t *mem;
7787         int i;
7788
7789         if (pgsize == (size_t)-1) {
7790                 DRV_LOG(ERR, "Failed to get mem page size");
7791                 rte_errno = ENOMEM;
7792                 return -ENOMEM;
7793         }
7794         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7795         if (!mem) {
7796                 rte_errno = ENOMEM;
7797                 return -ENOMEM;
7798         }
7799         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7800         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7801         mem_mng->umem = mlx5_os_umem_reg(sh->cdev->ctx, mem, size,
7802                                                  IBV_ACCESS_LOCAL_WRITE);
7803         if (!mem_mng->umem) {
7804                 rte_errno = errno;
7805                 mlx5_free(mem);
7806                 return -rte_errno;
7807         }
7808         memset(&mkey_attr, 0, sizeof(mkey_attr));
7809         mkey_attr.addr = (uintptr_t)mem;
7810         mkey_attr.size = size;
7811         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7812         mkey_attr.pd = sh->cdev->pdn;
7813         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7814         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7815         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->cdev->ctx, &mkey_attr);
7816         if (!mem_mng->dm) {
7817                 mlx5_os_umem_dereg(mem_mng->umem);
7818                 rte_errno = errno;
7819                 mlx5_free(mem);
7820                 return -rte_errno;
7821         }
7822         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7823         raw_data = (volatile struct flow_counter_stats *)mem;
7824         for (i = 0; i < raws_n; ++i) {
7825                 mem_mng->raws[i].mem_mng = mem_mng;
7826                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7827         }
7828         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7829                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7830                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7831                                  next);
7832         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7833         sh->cmng.mem_mng = mem_mng;
7834         return 0;
7835 }
7836
7837 /**
7838  * Set the statistic memory to the new counter pool.
7839  *
7840  * @param[in] sh
7841  *   Pointer to mlx5_dev_ctx_shared object.
7842  * @param[in] pool
7843  *   Pointer to the pool to set the statistic memory.
7844  *
7845  * @return
7846  *   0 on success, a negative errno value otherwise.
7847  */
7848 static int
7849 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7850                                struct mlx5_flow_counter_pool *pool)
7851 {
7852         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7853         /* Resize statistic memory once used out. */
7854         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7855             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7856                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7857                 return -1;
7858         }
7859         rte_spinlock_lock(&pool->sl);
7860         pool->raw = cmng->mem_mng->raws + pool->index %
7861                     MLX5_CNT_CONTAINER_RESIZE;
7862         rte_spinlock_unlock(&pool->sl);
7863         pool->raw_hw = NULL;
7864         return 0;
7865 }
7866
7867 #define MLX5_POOL_QUERY_FREQ_US 1000000
7868
7869 /**
7870  * Set the periodic procedure for triggering asynchronous batch queries for all
7871  * the counter pools.
7872  *
7873  * @param[in] sh
7874  *   Pointer to mlx5_dev_ctx_shared object.
7875  */
7876 void
7877 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7878 {
7879         uint32_t pools_n, us;
7880
7881         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7882         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7883         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7884         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7885                 sh->cmng.query_thread_on = 0;
7886                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7887         } else {
7888                 sh->cmng.query_thread_on = 1;
7889         }
7890 }
7891
7892 /**
7893  * The periodic procedure for triggering asynchronous batch queries for all the
7894  * counter pools. This function is probably called by the host thread.
7895  *
7896  * @param[in] arg
7897  *   The parameter for the alarm process.
7898  */
7899 void
7900 mlx5_flow_query_alarm(void *arg)
7901 {
7902         struct mlx5_dev_ctx_shared *sh = arg;
7903         int ret;
7904         uint16_t pool_index = sh->cmng.pool_index;
7905         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7906         struct mlx5_flow_counter_pool *pool;
7907         uint16_t n_valid;
7908
7909         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7910                 goto set_alarm;
7911         rte_spinlock_lock(&cmng->pool_update_sl);
7912         pool = cmng->pools[pool_index];
7913         n_valid = cmng->n_valid;
7914         rte_spinlock_unlock(&cmng->pool_update_sl);
7915         /* Set the statistic memory to the new created pool. */
7916         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7917                 goto set_alarm;
7918         if (pool->raw_hw)
7919                 /* There is a pool query in progress. */
7920                 goto set_alarm;
7921         pool->raw_hw =
7922                 LIST_FIRST(&sh->cmng.free_stat_raws);
7923         if (!pool->raw_hw)
7924                 /* No free counter statistics raw memory. */
7925                 goto set_alarm;
7926         /*
7927          * Identify the counters released between query trigger and query
7928          * handle more efficiently. The counter released in this gap period
7929          * should wait for a new round of query as the new arrived packets
7930          * will not be taken into account.
7931          */
7932         pool->query_gen++;
7933         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7934                                                MLX5_COUNTERS_PER_POOL,
7935                                                NULL, NULL,
7936                                                pool->raw_hw->mem_mng->dm->id,
7937                                                (void *)(uintptr_t)
7938                                                pool->raw_hw->data,
7939                                                sh->devx_comp,
7940                                                (uint64_t)(uintptr_t)pool);
7941         if (ret) {
7942                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7943                         " %d", pool->min_dcs->id);
7944                 pool->raw_hw = NULL;
7945                 goto set_alarm;
7946         }
7947         LIST_REMOVE(pool->raw_hw, next);
7948         sh->cmng.pending_queries++;
7949         pool_index++;
7950         if (pool_index >= n_valid)
7951                 pool_index = 0;
7952 set_alarm:
7953         sh->cmng.pool_index = pool_index;
7954         mlx5_set_query_alarm(sh);
7955 }
7956
7957 /**
7958  * Check and callback event for new aged flow in the counter pool
7959  *
7960  * @param[in] sh
7961  *   Pointer to mlx5_dev_ctx_shared object.
7962  * @param[in] pool
7963  *   Pointer to Current counter pool.
7964  */
7965 static void
7966 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7967                    struct mlx5_flow_counter_pool *pool)
7968 {
7969         struct mlx5_priv *priv;
7970         struct mlx5_flow_counter *cnt;
7971         struct mlx5_age_info *age_info;
7972         struct mlx5_age_param *age_param;
7973         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7974         struct mlx5_counter_stats_raw *prev = pool->raw;
7975         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7976         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7977         uint16_t expected = AGE_CANDIDATE;
7978         uint32_t i;
7979
7980         pool->time_of_last_age_check = curr_time;
7981         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7982                 cnt = MLX5_POOL_GET_CNT(pool, i);
7983                 age_param = MLX5_CNT_TO_AGE(cnt);
7984                 if (__atomic_load_n(&age_param->state,
7985                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7986                         continue;
7987                 if (cur->data[i].hits != prev->data[i].hits) {
7988                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7989                                          __ATOMIC_RELAXED);
7990                         continue;
7991                 }
7992                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7993                                        time_delta,
7994                                        __ATOMIC_RELAXED) <= age_param->timeout)
7995                         continue;
7996                 /**
7997                  * Hold the lock first, or if between the
7998                  * state AGE_TMOUT and tailq operation the
7999                  * release happened, the release procedure
8000                  * may delete a non-existent tailq node.
8001                  */
8002                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
8003                 age_info = GET_PORT_AGE_INFO(priv);
8004                 rte_spinlock_lock(&age_info->aged_sl);
8005                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
8006                                                 AGE_TMOUT, false,
8007                                                 __ATOMIC_RELAXED,
8008                                                 __ATOMIC_RELAXED)) {
8009                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
8010                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
8011                 }
8012                 rte_spinlock_unlock(&age_info->aged_sl);
8013         }
8014         mlx5_age_event_prepare(sh);
8015 }
8016
8017 /**
8018  * Handler for the HW respond about ready values from an asynchronous batch
8019  * query. This function is probably called by the host thread.
8020  *
8021  * @param[in] sh
8022  *   The pointer to the shared device context.
8023  * @param[in] async_id
8024  *   The Devx async ID.
8025  * @param[in] status
8026  *   The status of the completion.
8027  */
8028 void
8029 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
8030                                   uint64_t async_id, int status)
8031 {
8032         struct mlx5_flow_counter_pool *pool =
8033                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
8034         struct mlx5_counter_stats_raw *raw_to_free;
8035         uint8_t query_gen = pool->query_gen ^ 1;
8036         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8037         enum mlx5_counter_type cnt_type =
8038                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
8039                                 MLX5_COUNTER_TYPE_ORIGIN;
8040
8041         if (unlikely(status)) {
8042                 raw_to_free = pool->raw_hw;
8043         } else {
8044                 raw_to_free = pool->raw;
8045                 if (pool->is_aged)
8046                         mlx5_flow_aging_check(sh, pool);
8047                 rte_spinlock_lock(&pool->sl);
8048                 pool->raw = pool->raw_hw;
8049                 rte_spinlock_unlock(&pool->sl);
8050                 /* Be sure the new raw counters data is updated in memory. */
8051                 rte_io_wmb();
8052                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
8053                         rte_spinlock_lock(&cmng->csl[cnt_type]);
8054                         TAILQ_CONCAT(&cmng->counters[cnt_type],
8055                                      &pool->counters[query_gen], next);
8056                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
8057                 }
8058         }
8059         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
8060         pool->raw_hw = NULL;
8061         sh->cmng.pending_queries--;
8062 }
8063
8064 static int
8065 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
8066                     const struct flow_grp_info *grp_info,
8067                     struct rte_flow_error *error)
8068 {
8069         if (grp_info->transfer && grp_info->external &&
8070             grp_info->fdb_def_rule) {
8071                 if (group == UINT32_MAX)
8072                         return rte_flow_error_set
8073                                                 (error, EINVAL,
8074                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8075                                                  NULL,
8076                                                  "group index not supported");
8077                 *table = group + 1;
8078         } else {
8079                 *table = group;
8080         }
8081         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
8082         return 0;
8083 }
8084
8085 /**
8086  * Translate the rte_flow group index to HW table value.
8087  *
8088  * If tunnel offload is disabled, all group ids converted to flow table
8089  * id using the standard method.
8090  * If tunnel offload is enabled, group id can be converted using the
8091  * standard or tunnel conversion method. Group conversion method
8092  * selection depends on flags in `grp_info` parameter:
8093  * - Internal (grp_info.external == 0) groups conversion uses the
8094  *   standard method.
8095  * - Group ids in JUMP action converted with the tunnel conversion.
8096  * - Group id in rule attribute conversion depends on a rule type and
8097  *   group id value:
8098  *   ** non zero group attributes converted with the tunnel method
8099  *   ** zero group attribute in non-tunnel rule is converted using the
8100  *      standard method - there's only one root table
8101  *   ** zero group attribute in steer tunnel rule is converted with the
8102  *      standard method - single root table
8103  *   ** zero group attribute in match tunnel rule is a special OvS
8104  *      case: that value is used for portability reasons. That group
8105  *      id is converted with the tunnel conversion method.
8106  *
8107  * @param[in] dev
8108  *   Port device
8109  * @param[in] tunnel
8110  *   PMD tunnel offload object
8111  * @param[in] group
8112  *   rte_flow group index value.
8113  * @param[out] table
8114  *   HW table value.
8115  * @param[in] grp_info
8116  *   flags used for conversion
8117  * @param[out] error
8118  *   Pointer to error structure.
8119  *
8120  * @return
8121  *   0 on success, a negative errno value otherwise and rte_errno is set.
8122  */
8123 int
8124 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
8125                          const struct mlx5_flow_tunnel *tunnel,
8126                          uint32_t group, uint32_t *table,
8127                          const struct flow_grp_info *grp_info,
8128                          struct rte_flow_error *error)
8129 {
8130         int ret;
8131         bool standard_translation;
8132
8133         if (!grp_info->skip_scale && grp_info->external &&
8134             group < MLX5_MAX_TABLES_EXTERNAL)
8135                 group *= MLX5_FLOW_TABLE_FACTOR;
8136         if (is_tunnel_offload_active(dev)) {
8137                 standard_translation = !grp_info->external ||
8138                                         grp_info->std_tbl_fix;
8139         } else {
8140                 standard_translation = true;
8141         }
8142         DRV_LOG(DEBUG,
8143                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
8144                 dev->data->port_id, group, grp_info->transfer,
8145                 grp_info->external, grp_info->fdb_def_rule,
8146                 standard_translation ? "STANDARD" : "TUNNEL");
8147         if (standard_translation)
8148                 ret = flow_group_to_table(dev->data->port_id, group, table,
8149                                           grp_info, error);
8150         else
8151                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
8152                                                       table, error);
8153
8154         return ret;
8155 }
8156
8157 /**
8158  * Discover availability of metadata reg_c's.
8159  *
8160  * Iteratively use test flows to check availability.
8161  *
8162  * @param[in] dev
8163  *   Pointer to the Ethernet device structure.
8164  *
8165  * @return
8166  *   0 on success, a negative errno value otherwise and rte_errno is set.
8167  */
8168 int
8169 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
8170 {
8171         struct mlx5_priv *priv = dev->data->dev_private;
8172         enum modify_reg idx;
8173         int n = 0;
8174
8175         /* reg_c[0] and reg_c[1] are reserved. */
8176         priv->sh->flow_mreg_c[n++] = REG_C_0;
8177         priv->sh->flow_mreg_c[n++] = REG_C_1;
8178         /* Discover availability of other reg_c's. */
8179         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
8180                 struct rte_flow_attr attr = {
8181                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
8182                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
8183                         .ingress = 1,
8184                 };
8185                 struct rte_flow_item items[] = {
8186                         [0] = {
8187                                 .type = RTE_FLOW_ITEM_TYPE_END,
8188                         },
8189                 };
8190                 struct rte_flow_action actions[] = {
8191                         [0] = {
8192                                 .type = (enum rte_flow_action_type)
8193                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
8194                                 .conf = &(struct mlx5_flow_action_copy_mreg){
8195                                         .src = REG_C_1,
8196                                         .dst = idx,
8197                                 },
8198                         },
8199                         [1] = {
8200                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
8201                                 .conf = &(struct rte_flow_action_jump){
8202                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
8203                                 },
8204                         },
8205                         [2] = {
8206                                 .type = RTE_FLOW_ACTION_TYPE_END,
8207                         },
8208                 };
8209                 uint32_t flow_idx;
8210                 struct rte_flow *flow;
8211                 struct rte_flow_error error;
8212
8213                 if (!priv->config.dv_flow_en)
8214                         break;
8215                 /* Create internal flow, validation skips copy action. */
8216                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8217                                         items, actions, false, &error);
8218                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8219                                       flow_idx);
8220                 if (!flow)
8221                         continue;
8222                 priv->sh->flow_mreg_c[n++] = idx;
8223                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8224         }
8225         for (; n < MLX5_MREG_C_NUM; ++n)
8226                 priv->sh->flow_mreg_c[n] = REG_NON;
8227         priv->sh->metadata_regc_check_flag = 1;
8228         return 0;
8229 }
8230
8231 int
8232 save_dump_file(const uint8_t *data, uint32_t size,
8233         uint32_t type, uint64_t id, void *arg, FILE *file)
8234 {
8235         char line[BUF_SIZE];
8236         uint32_t out = 0;
8237         uint32_t k;
8238         uint32_t actions_num;
8239         struct rte_flow_query_count *count;
8240
8241         memset(line, 0, BUF_SIZE);
8242         switch (type) {
8243         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8244                 actions_num = *(uint32_t *)(arg);
8245                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,",
8246                                 type, id, actions_num);
8247                 break;
8248         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8249                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",",
8250                                 type, id);
8251                 break;
8252         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8253                 count = (struct rte_flow_query_count *)arg;
8254                 fprintf(file,
8255                         "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n",
8256                         type, id, count->hits, count->bytes);
8257                 return 0;
8258         default:
8259                 return -1;
8260         }
8261
8262         for (k = 0; k < size; k++) {
8263                 /* Make sure we do not overrun the line buffer length. */
8264                 if (out >= BUF_SIZE - 4) {
8265                         line[out] = '\0';
8266                         break;
8267                 }
8268                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8269                                 (data[k]) & 0xff);
8270         }
8271         fprintf(file, "%s\n", line);
8272         return 0;
8273 }
8274
8275 int
8276 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8277         struct rte_flow_query_count *count, struct rte_flow_error *error)
8278 {
8279         struct rte_flow_action action[2];
8280         enum mlx5_flow_drv_type ftype;
8281         const struct mlx5_flow_driver_ops *fops;
8282
8283         if (!flow) {
8284                 return rte_flow_error_set(error, ENOENT,
8285                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8286                                 NULL,
8287                                 "invalid flow handle");
8288         }
8289         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8290         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8291         if (flow->counter) {
8292                 memset(count, 0, sizeof(struct rte_flow_query_count));
8293                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8294                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8295                                                 ftype < MLX5_FLOW_TYPE_MAX);
8296                 fops = flow_get_drv_ops(ftype);
8297                 return fops->query(dev, flow, action, count, error);
8298         }
8299         return -1;
8300 }
8301
8302 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8303 /**
8304  * Dump flow ipool data to file
8305  *
8306  * @param[in] dev
8307  *   The pointer to Ethernet device.
8308  * @param[in] file
8309  *   A pointer to a file for output.
8310  * @param[out] error
8311  *   Perform verbose error reporting if not NULL. PMDs initialize this
8312  *   structure in case of error only.
8313  * @return
8314  *   0 on success, a negative value otherwise.
8315  */
8316 int
8317 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8318         struct rte_flow *flow, FILE *file,
8319         struct rte_flow_error *error)
8320 {
8321         struct mlx5_priv *priv = dev->data->dev_private;
8322         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8323         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8324         uint32_t handle_idx;
8325         struct mlx5_flow_handle *dh;
8326         struct rte_flow_query_count count;
8327         uint32_t actions_num;
8328         const uint8_t *data;
8329         size_t size;
8330         uint64_t id;
8331         uint32_t type;
8332         void *action = NULL;
8333
8334         if (!flow) {
8335                 return rte_flow_error_set(error, ENOENT,
8336                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8337                                 NULL,
8338                                 "invalid flow handle");
8339         }
8340         handle_idx = flow->dev_handles;
8341         while (handle_idx) {
8342                 dh = mlx5_ipool_get(priv->sh->ipool
8343                                 [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8344                 if (!dh)
8345                         continue;
8346                 handle_idx = dh->next.next;
8347
8348                 /* query counter */
8349                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8350                 flow_dv_query_count_ptr(dev, flow->counter,
8351                                                 &action, error);
8352                 if (action) {
8353                         id = (uint64_t)(uintptr_t)action;
8354                         if (!mlx5_flow_query_counter(dev, flow, &count, error))
8355                                 save_dump_file(NULL, 0, type,
8356                                                 id, (void *)&count, file);
8357                 }
8358                 /* Get modify_hdr and encap_decap buf from ipools. */
8359                 encap_decap = NULL;
8360                 modify_hdr = dh->dvh.modify_hdr;
8361
8362                 if (dh->dvh.rix_encap_decap) {
8363                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8364                                                 [MLX5_IPOOL_DECAP_ENCAP],
8365                                                 dh->dvh.rix_encap_decap);
8366                 }
8367                 if (modify_hdr) {
8368                         data = (const uint8_t *)modify_hdr->actions;
8369                         size = (size_t)(modify_hdr->actions_num) * 8;
8370                         id = (uint64_t)(uintptr_t)modify_hdr->action;
8371                         actions_num = modify_hdr->actions_num;
8372                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8373                         save_dump_file(data, size, type, id,
8374                                                 (void *)(&actions_num), file);
8375                 }
8376                 if (encap_decap) {
8377                         data = encap_decap->buf;
8378                         size = encap_decap->size;
8379                         id = (uint64_t)(uintptr_t)encap_decap->action;
8380                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8381                         save_dump_file(data, size, type,
8382                                                 id, NULL, file);
8383                 }
8384         }
8385         return 0;
8386 }
8387
8388 /**
8389  * Dump all flow's encap_decap/modify_hdr/counter data to file
8390  *
8391  * @param[in] dev
8392  *   The pointer to Ethernet device.
8393  * @param[in] file
8394  *   A pointer to a file for output.
8395  * @param[out] error
8396  *   Perform verbose error reporting if not NULL. PMDs initialize this
8397  *   structure in case of error only.
8398  * @return
8399  *   0 on success, a negative value otherwise.
8400  */
8401 static int
8402 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev,
8403         FILE *file, struct rte_flow_error *error)
8404 {
8405         struct mlx5_priv *priv = dev->data->dev_private;
8406         struct mlx5_dev_ctx_shared *sh = priv->sh;
8407         struct mlx5_hlist *h;
8408         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8409         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8410         struct rte_flow_query_count count;
8411         uint32_t actions_num;
8412         const uint8_t *data;
8413         size_t size;
8414         uint64_t id;
8415         uint32_t type;
8416         uint32_t i;
8417         uint32_t j;
8418         struct mlx5_list_inconst *l_inconst;
8419         struct mlx5_list_entry *e;
8420         int lcore_index;
8421         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
8422         uint32_t max;
8423         void *action;
8424
8425         /* encap_decap hlist is lcore_share, get global core cache. */
8426         i = MLX5_LIST_GLOBAL;
8427         h = sh->encaps_decaps;
8428         if (h) {
8429                 for (j = 0; j <= h->mask; j++) {
8430                         l_inconst = &h->buckets[j].l;
8431                         if (!l_inconst || !l_inconst->cache[i])
8432                                 continue;
8433
8434                         e = LIST_FIRST(&l_inconst->cache[i]->h);
8435                         while (e) {
8436                                 encap_decap =
8437                                 (struct mlx5_flow_dv_encap_decap_resource *)e;
8438                                 data = encap_decap->buf;
8439                                 size = encap_decap->size;
8440                                 id = (uint64_t)(uintptr_t)encap_decap->action;
8441                                 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8442                                 save_dump_file(data, size, type,
8443                                         id, NULL, file);
8444                                 e = LIST_NEXT(e, next);
8445                         }
8446                 }
8447         }
8448
8449         /* get modify_hdr */
8450         h = sh->modify_cmds;
8451         if (h) {
8452                 lcore_index = rte_lcore_index(rte_lcore_id());
8453                 if (unlikely(lcore_index == -1)) {
8454                         lcore_index = MLX5_LIST_NLCORE;
8455                         rte_spinlock_lock(&h->l_const.lcore_lock);
8456                 }
8457                 i = lcore_index;
8458
8459                 for (j = 0; j <= h->mask; j++) {
8460                         l_inconst = &h->buckets[j].l;
8461                         if (!l_inconst || !l_inconst->cache[i])
8462                                 continue;
8463
8464                         e = LIST_FIRST(&l_inconst->cache[i]->h);
8465                         while (e) {
8466                                 modify_hdr =
8467                                 (struct mlx5_flow_dv_modify_hdr_resource *)e;
8468                                 data = (const uint8_t *)modify_hdr->actions;
8469                                 size = (size_t)(modify_hdr->actions_num) * 8;
8470                                 actions_num = modify_hdr->actions_num;
8471                                 id = (uint64_t)(uintptr_t)modify_hdr->action;
8472                                 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8473                                 save_dump_file(data, size, type, id,
8474                                                 (void *)(&actions_num), file);
8475                                 e = LIST_NEXT(e, next);
8476                         }
8477                 }
8478
8479                 if (unlikely(lcore_index == MLX5_LIST_NLCORE))
8480                         rte_spinlock_unlock(&h->l_const.lcore_lock);
8481         }
8482
8483         /* get counter */
8484         MLX5_ASSERT(cmng->n_valid <= cmng->n);
8485         max = MLX5_COUNTERS_PER_POOL * cmng->n_valid;
8486         for (j = 1; j <= max; j++) {
8487                 action = NULL;
8488                 flow_dv_query_count_ptr(dev, j, &action, error);
8489                 if (action) {
8490                         if (!flow_dv_query_count(dev, j, &count, error)) {
8491                                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8492                                 id = (uint64_t)(uintptr_t)action;
8493                                 save_dump_file(NULL, 0, type,
8494                                                 id, (void *)&count, file);
8495                         }
8496                 }
8497         }
8498         return 0;
8499 }
8500 #endif
8501
8502 /**
8503  * Dump flow raw hw data to file
8504  *
8505  * @param[in] dev
8506  *    The pointer to Ethernet device.
8507  * @param[in] file
8508  *   A pointer to a file for output.
8509  * @param[out] error
8510  *   Perform verbose error reporting if not NULL. PMDs initialize this
8511  *   structure in case of error only.
8512  * @return
8513  *   0 on success, a nagative value otherwise.
8514  */
8515 int
8516 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8517                    FILE *file,
8518                    struct rte_flow_error *error __rte_unused)
8519 {
8520         struct mlx5_priv *priv = dev->data->dev_private;
8521         struct mlx5_dev_ctx_shared *sh = priv->sh;
8522         uint32_t handle_idx;
8523         int ret;
8524         struct mlx5_flow_handle *dh;
8525         struct rte_flow *flow;
8526
8527         if (!priv->config.dv_flow_en) {
8528                 if (fputs("device dv flow disabled\n", file) <= 0)
8529                         return -errno;
8530                 return -ENOTSUP;
8531         }
8532
8533         /* dump all */
8534         if (!flow_idx) {
8535 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8536                 if (mlx5_flow_dev_dump_sh_all(dev, file, error))
8537                         return -EINVAL;
8538 #endif
8539                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8540                                         sh->rx_domain,
8541                                         sh->tx_domain, file);
8542         }
8543         /* dump one */
8544         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8545                         (uintptr_t)(void *)flow_idx);
8546         if (!flow)
8547                 return -EINVAL;
8548
8549 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8550         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8551 #endif
8552         handle_idx = flow->dev_handles;
8553         while (handle_idx) {
8554                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8555                                 handle_idx);
8556                 if (!dh)
8557                         return -ENOENT;
8558                 if (dh->drv_flow) {
8559                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8560                                         file);
8561                         if (ret)
8562                                 return -ENOENT;
8563                 }
8564                 handle_idx = dh->next.next;
8565         }
8566         return 0;
8567 }
8568
8569 /**
8570  * Get aged-out flows.
8571  *
8572  * @param[in] dev
8573  *   Pointer to the Ethernet device structure.
8574  * @param[in] context
8575  *   The address of an array of pointers to the aged-out flows contexts.
8576  * @param[in] nb_countexts
8577  *   The length of context array pointers.
8578  * @param[out] error
8579  *   Perform verbose error reporting if not NULL. Initialized in case of
8580  *   error only.
8581  *
8582  * @return
8583  *   how many contexts get in success, otherwise negative errno value.
8584  *   if nb_contexts is 0, return the amount of all aged contexts.
8585  *   if nb_contexts is not 0 , return the amount of aged flows reported
8586  *   in the context array.
8587  */
8588 int
8589 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8590                         uint32_t nb_contexts, struct rte_flow_error *error)
8591 {
8592         const struct mlx5_flow_driver_ops *fops;
8593         struct rte_flow_attr attr = { .transfer = 0 };
8594
8595         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8596                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8597                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8598                                                     error);
8599         }
8600         DRV_LOG(ERR,
8601                 "port %u get aged flows is not supported.",
8602                  dev->data->port_id);
8603         return -ENOTSUP;
8604 }
8605
8606 /* Wrapper for driver action_validate op callback */
8607 static int
8608 flow_drv_action_validate(struct rte_eth_dev *dev,
8609                          const struct rte_flow_indir_action_conf *conf,
8610                          const struct rte_flow_action *action,
8611                          const struct mlx5_flow_driver_ops *fops,
8612                          struct rte_flow_error *error)
8613 {
8614         static const char err_msg[] = "indirect action validation unsupported";
8615
8616         if (!fops->action_validate) {
8617                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8618                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8619                                    NULL, err_msg);
8620                 return -rte_errno;
8621         }
8622         return fops->action_validate(dev, conf, action, error);
8623 }
8624
8625 /**
8626  * Destroys the shared action by handle.
8627  *
8628  * @param dev
8629  *   Pointer to Ethernet device structure.
8630  * @param[in] handle
8631  *   Handle for the indirect action object to be destroyed.
8632  * @param[out] error
8633  *   Perform verbose error reporting if not NULL. PMDs initialize this
8634  *   structure in case of error only.
8635  *
8636  * @return
8637  *   0 on success, a negative errno value otherwise and rte_errno is set.
8638  *
8639  * @note: wrapper for driver action_create op callback.
8640  */
8641 static int
8642 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8643                            struct rte_flow_action_handle *handle,
8644                            struct rte_flow_error *error)
8645 {
8646         static const char err_msg[] = "indirect action destruction unsupported";
8647         struct rte_flow_attr attr = { .transfer = 0 };
8648         const struct mlx5_flow_driver_ops *fops =
8649                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8650
8651         if (!fops->action_destroy) {
8652                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8653                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8654                                    NULL, err_msg);
8655                 return -rte_errno;
8656         }
8657         return fops->action_destroy(dev, handle, error);
8658 }
8659
8660 /* Wrapper for driver action_destroy op callback */
8661 static int
8662 flow_drv_action_update(struct rte_eth_dev *dev,
8663                        struct rte_flow_action_handle *handle,
8664                        const void *update,
8665                        const struct mlx5_flow_driver_ops *fops,
8666                        struct rte_flow_error *error)
8667 {
8668         static const char err_msg[] = "indirect action update unsupported";
8669
8670         if (!fops->action_update) {
8671                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8672                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8673                                    NULL, err_msg);
8674                 return -rte_errno;
8675         }
8676         return fops->action_update(dev, handle, update, error);
8677 }
8678
8679 /* Wrapper for driver action_destroy op callback */
8680 static int
8681 flow_drv_action_query(struct rte_eth_dev *dev,
8682                       const struct rte_flow_action_handle *handle,
8683                       void *data,
8684                       const struct mlx5_flow_driver_ops *fops,
8685                       struct rte_flow_error *error)
8686 {
8687         static const char err_msg[] = "indirect action query unsupported";
8688
8689         if (!fops->action_query) {
8690                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8691                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8692                                    NULL, err_msg);
8693                 return -rte_errno;
8694         }
8695         return fops->action_query(dev, handle, data, error);
8696 }
8697
8698 /**
8699  * Create indirect action for reuse in multiple flow rules.
8700  *
8701  * @param dev
8702  *   Pointer to Ethernet device structure.
8703  * @param conf
8704  *   Pointer to indirect action object configuration.
8705  * @param[in] action
8706  *   Action configuration for indirect action object creation.
8707  * @param[out] error
8708  *   Perform verbose error reporting if not NULL. PMDs initialize this
8709  *   structure in case of error only.
8710  * @return
8711  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8712  */
8713 static struct rte_flow_action_handle *
8714 mlx5_action_handle_create(struct rte_eth_dev *dev,
8715                           const struct rte_flow_indir_action_conf *conf,
8716                           const struct rte_flow_action *action,
8717                           struct rte_flow_error *error)
8718 {
8719         static const char err_msg[] = "indirect action creation unsupported";
8720         struct rte_flow_attr attr = { .transfer = 0 };
8721         const struct mlx5_flow_driver_ops *fops =
8722                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8723
8724         if (flow_drv_action_validate(dev, conf, action, fops, error))
8725                 return NULL;
8726         if (!fops->action_create) {
8727                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8728                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8729                                    NULL, err_msg);
8730                 return NULL;
8731         }
8732         return fops->action_create(dev, conf, action, error);
8733 }
8734
8735 /**
8736  * Updates inplace the indirect action configuration pointed by *handle*
8737  * with the configuration provided as *update* argument.
8738  * The update of the indirect action configuration effects all flow rules
8739  * reusing the action via handle.
8740  *
8741  * @param dev
8742  *   Pointer to Ethernet device structure.
8743  * @param[in] handle
8744  *   Handle for the indirect action to be updated.
8745  * @param[in] update
8746  *   Action specification used to modify the action pointed by handle.
8747  *   *update* could be of same type with the action pointed by the *handle*
8748  *   handle argument, or some other structures like a wrapper, depending on
8749  *   the indirect action type.
8750  * @param[out] error
8751  *   Perform verbose error reporting if not NULL. PMDs initialize this
8752  *   structure in case of error only.
8753  *
8754  * @return
8755  *   0 on success, a negative errno value otherwise and rte_errno is set.
8756  */
8757 static int
8758 mlx5_action_handle_update(struct rte_eth_dev *dev,
8759                 struct rte_flow_action_handle *handle,
8760                 const void *update,
8761                 struct rte_flow_error *error)
8762 {
8763         struct rte_flow_attr attr = { .transfer = 0 };
8764         const struct mlx5_flow_driver_ops *fops =
8765                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8766         int ret;
8767
8768         ret = flow_drv_action_validate(dev, NULL,
8769                         (const struct rte_flow_action *)update, fops, error);
8770         if (ret)
8771                 return ret;
8772         return flow_drv_action_update(dev, handle, update, fops,
8773                                       error);
8774 }
8775
8776 /**
8777  * Query the indirect action by handle.
8778  *
8779  * This function allows retrieving action-specific data such as counters.
8780  * Data is gathered by special action which may be present/referenced in
8781  * more than one flow rule definition.
8782  *
8783  * see @RTE_FLOW_ACTION_TYPE_COUNT
8784  *
8785  * @param dev
8786  *   Pointer to Ethernet device structure.
8787  * @param[in] handle
8788  *   Handle for the indirect action to query.
8789  * @param[in, out] data
8790  *   Pointer to storage for the associated query data type.
8791  * @param[out] error
8792  *   Perform verbose error reporting if not NULL. PMDs initialize this
8793  *   structure in case of error only.
8794  *
8795  * @return
8796  *   0 on success, a negative errno value otherwise and rte_errno is set.
8797  */
8798 static int
8799 mlx5_action_handle_query(struct rte_eth_dev *dev,
8800                          const struct rte_flow_action_handle *handle,
8801                          void *data,
8802                          struct rte_flow_error *error)
8803 {
8804         struct rte_flow_attr attr = { .transfer = 0 };
8805         const struct mlx5_flow_driver_ops *fops =
8806                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8807
8808         return flow_drv_action_query(dev, handle, data, fops, error);
8809 }
8810
8811 /**
8812  * Destroy all indirect actions (shared RSS).
8813  *
8814  * @param dev
8815  *   Pointer to Ethernet device.
8816  *
8817  * @return
8818  *   0 on success, a negative errno value otherwise and rte_errno is set.
8819  */
8820 int
8821 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8822 {
8823         struct rte_flow_error error;
8824         struct mlx5_priv *priv = dev->data->dev_private;
8825         struct mlx5_shared_action_rss *shared_rss;
8826         int ret = 0;
8827         uint32_t idx;
8828
8829         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8830                       priv->rss_shared_actions, idx, shared_rss, next) {
8831                 ret |= mlx5_action_handle_destroy(dev,
8832                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8833         }
8834         return ret;
8835 }
8836
8837 /**
8838  * Validate existing indirect actions against current device configuration
8839  * and attach them to device resources.
8840  *
8841  * @param dev
8842  *   Pointer to Ethernet device.
8843  *
8844  * @return
8845  *   0 on success, a negative errno value otherwise and rte_errno is set.
8846  */
8847 int
8848 mlx5_action_handle_attach(struct rte_eth_dev *dev)
8849 {
8850         struct mlx5_priv *priv = dev->data->dev_private;
8851         struct mlx5_indexed_pool *ipool =
8852                         priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8853         struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8854         int ret = 0;
8855         uint32_t idx;
8856
8857         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8858                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8859                 const char *message;
8860                 uint32_t queue_idx;
8861
8862                 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues,
8863                                                ind_tbl->queues_n,
8864                                                &message, &queue_idx);
8865                 if (ret != 0) {
8866                         DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s",
8867                                 dev->data->port_id, ind_tbl->queues[queue_idx],
8868                                 message);
8869                         break;
8870                 }
8871         }
8872         if (ret != 0)
8873                 return ret;
8874         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8875                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8876
8877                 ret = mlx5_ind_table_obj_attach(dev, ind_tbl);
8878                 if (ret != 0) {
8879                         DRV_LOG(ERR, "Port %u could not attach "
8880                                 "indirection table obj %p",
8881                                 dev->data->port_id, (void *)ind_tbl);
8882                         goto error;
8883                 }
8884         }
8885         return 0;
8886 error:
8887         shared_rss_last = shared_rss;
8888         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8889                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8890
8891                 if (shared_rss == shared_rss_last)
8892                         break;
8893                 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0)
8894                         DRV_LOG(CRIT, "Port %u could not detach "
8895                                 "indirection table obj %p on rollback",
8896                                 dev->data->port_id, (void *)ind_tbl);
8897         }
8898         return ret;
8899 }
8900
8901 /**
8902  * Detach indirect actions of the device from its resources.
8903  *
8904  * @param dev
8905  *   Pointer to Ethernet device.
8906  *
8907  * @return
8908  *   0 on success, a negative errno value otherwise and rte_errno is set.
8909  */
8910 int
8911 mlx5_action_handle_detach(struct rte_eth_dev *dev)
8912 {
8913         struct mlx5_priv *priv = dev->data->dev_private;
8914         struct mlx5_indexed_pool *ipool =
8915                         priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8916         struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8917         int ret = 0;
8918         uint32_t idx;
8919
8920         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8921                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8922
8923                 ret = mlx5_ind_table_obj_detach(dev, ind_tbl);
8924                 if (ret != 0) {
8925                         DRV_LOG(ERR, "Port %u could not detach "
8926                                 "indirection table obj %p",
8927                                 dev->data->port_id, (void *)ind_tbl);
8928                         goto error;
8929                 }
8930         }
8931         return 0;
8932 error:
8933         shared_rss_last = shared_rss;
8934         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8935                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8936
8937                 if (shared_rss == shared_rss_last)
8938                         break;
8939                 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0)
8940                         DRV_LOG(CRIT, "Port %u could not attach "
8941                                 "indirection table obj %p on rollback",
8942                                 dev->data->port_id, (void *)ind_tbl);
8943         }
8944         return ret;
8945 }
8946
8947 #ifndef HAVE_MLX5DV_DR
8948 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8949 #else
8950 #define MLX5_DOMAIN_SYNC_FLOW \
8951         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8952 #endif
8953
8954 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8955 {
8956         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8957         const struct mlx5_flow_driver_ops *fops;
8958         int ret;
8959         struct rte_flow_attr attr = { .transfer = 0 };
8960
8961         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8962         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8963         if (ret > 0)
8964                 ret = -ret;
8965         return ret;
8966 }
8967
8968 const struct mlx5_flow_tunnel *
8969 mlx5_get_tof(const struct rte_flow_item *item,
8970              const struct rte_flow_action *action,
8971              enum mlx5_tof_rule_type *rule_type)
8972 {
8973         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8974                 if (item->type == (typeof(item->type))
8975                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8976                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8977                         return flow_items_to_tunnel(item);
8978                 }
8979         }
8980         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8981                 if (action->type == (typeof(action->type))
8982                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8983                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8984                         return flow_actions_to_tunnel(action);
8985                 }
8986         }
8987         return NULL;
8988 }
8989
8990 /**
8991  * tunnel offload functionalilty is defined for DV environment only
8992  */
8993 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8994 __extension__
8995 union tunnel_offload_mark {
8996         uint32_t val;
8997         struct {
8998                 uint32_t app_reserve:8;
8999                 uint32_t table_id:15;
9000                 uint32_t transfer:1;
9001                 uint32_t _unused_:8;
9002         };
9003 };
9004
9005 static bool
9006 mlx5_access_tunnel_offload_db
9007         (struct rte_eth_dev *dev,
9008          bool (*match)(struct rte_eth_dev *,
9009                        struct mlx5_flow_tunnel *, const void *),
9010          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9011          void (*miss)(struct rte_eth_dev *, void *),
9012          void *ctx, bool lock_op);
9013
9014 static int
9015 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
9016                              struct rte_flow *flow,
9017                              const struct rte_flow_attr *attr,
9018                              const struct rte_flow_action *app_actions,
9019                              uint32_t flow_idx,
9020                              const struct mlx5_flow_tunnel *tunnel,
9021                              struct tunnel_default_miss_ctx *ctx,
9022                              struct rte_flow_error *error)
9023 {
9024         struct mlx5_priv *priv = dev->data->dev_private;
9025         struct mlx5_flow *dev_flow;
9026         struct rte_flow_attr miss_attr = *attr;
9027         const struct rte_flow_item miss_items[2] = {
9028                 {
9029                         .type = RTE_FLOW_ITEM_TYPE_ETH,
9030                         .spec = NULL,
9031                         .last = NULL,
9032                         .mask = NULL
9033                 },
9034                 {
9035                         .type = RTE_FLOW_ITEM_TYPE_END,
9036                         .spec = NULL,
9037                         .last = NULL,
9038                         .mask = NULL
9039                 }
9040         };
9041         union tunnel_offload_mark mark_id;
9042         struct rte_flow_action_mark miss_mark;
9043         struct rte_flow_action miss_actions[3] = {
9044                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
9045                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
9046         };
9047         const struct rte_flow_action_jump *jump_data;
9048         uint32_t i, flow_table = 0; /* prevent compilation warning */
9049         struct flow_grp_info grp_info = {
9050                 .external = 1,
9051                 .transfer = attr->transfer,
9052                 .fdb_def_rule = !!priv->fdb_def_rule,
9053                 .std_tbl_fix = 0,
9054         };
9055         int ret;
9056
9057         if (!attr->transfer) {
9058                 uint32_t q_size;
9059
9060                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
9061                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
9062                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
9063                                          0, SOCKET_ID_ANY);
9064                 if (!ctx->queue)
9065                         return rte_flow_error_set
9066                                 (error, ENOMEM,
9067                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9068                                 NULL, "invalid default miss RSS");
9069                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
9070                 ctx->action_rss.level = 0,
9071                 ctx->action_rss.types = priv->rss_conf.rss_hf,
9072                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
9073                 ctx->action_rss.queue_num = priv->reta_idx_n,
9074                 ctx->action_rss.key = priv->rss_conf.rss_key,
9075                 ctx->action_rss.queue = ctx->queue;
9076                 if (!priv->reta_idx_n || !priv->rxqs_n)
9077                         return rte_flow_error_set
9078                                 (error, EINVAL,
9079                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9080                                 NULL, "invalid port configuration");
9081                 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
9082                         ctx->action_rss.types = 0;
9083                 for (i = 0; i != priv->reta_idx_n; ++i)
9084                         ctx->queue[i] = (*priv->reta_idx)[i];
9085         } else {
9086                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
9087                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
9088         }
9089         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
9090         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
9091         jump_data = app_actions->conf;
9092         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
9093         miss_attr.group = jump_data->group;
9094         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
9095                                        &flow_table, &grp_info, error);
9096         if (ret)
9097                 return rte_flow_error_set(error, EINVAL,
9098                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9099                                           NULL, "invalid tunnel id");
9100         mark_id.app_reserve = 0;
9101         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
9102         mark_id.transfer = !!attr->transfer;
9103         mark_id._unused_ = 0;
9104         miss_mark.id = mark_id.val;
9105         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
9106                                     miss_items, miss_actions, flow_idx, error);
9107         if (!dev_flow)
9108                 return -rte_errno;
9109         dev_flow->flow = flow;
9110         dev_flow->external = true;
9111         dev_flow->tunnel = tunnel;
9112         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
9113         /* Subflow object was created, we must include one in the list. */
9114         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
9115                       dev_flow->handle, next);
9116         DRV_LOG(DEBUG,
9117                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
9118                 dev->data->port_id, tunnel->app_tunnel.type,
9119                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
9120         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
9121                                   miss_actions, error);
9122         if (!ret)
9123                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
9124                                                   error);
9125
9126         return ret;
9127 }
9128
9129 static const struct mlx5_flow_tbl_data_entry  *
9130 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
9131 {
9132         struct mlx5_priv *priv = dev->data->dev_private;
9133         struct mlx5_dev_ctx_shared *sh = priv->sh;
9134         struct mlx5_list_entry *he;
9135         union tunnel_offload_mark mbits = { .val = mark };
9136         union mlx5_flow_tbl_key table_key = {
9137                 {
9138                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
9139                         .id = 0,
9140                         .reserved = 0,
9141                         .dummy = 0,
9142                         .is_fdb = !!mbits.transfer,
9143                         .is_egress = 0,
9144                 }
9145         };
9146         struct mlx5_flow_cb_ctx ctx = {
9147                 .data = &table_key.v64,
9148         };
9149
9150         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
9151         return he ?
9152                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
9153 }
9154
9155 static void
9156 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
9157                                    struct mlx5_list_entry *entry)
9158 {
9159         struct mlx5_dev_ctx_shared *sh = tool_ctx;
9160         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9161
9162         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9163                         tunnel_flow_tbl_to_id(tte->flow_table));
9164         mlx5_free(tte);
9165 }
9166
9167 static int
9168 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
9169                                   struct mlx5_list_entry *entry, void *cb_ctx)
9170 {
9171         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9172         union tunnel_tbl_key tbl = {
9173                 .val = *(uint64_t *)(ctx->data),
9174         };
9175         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9176
9177         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
9178 }
9179
9180 static struct mlx5_list_entry *
9181 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
9182 {
9183         struct mlx5_dev_ctx_shared *sh = tool_ctx;
9184         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9185         struct tunnel_tbl_entry *tte;
9186         union tunnel_tbl_key tbl = {
9187                 .val = *(uint64_t *)(ctx->data),
9188         };
9189
9190         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
9191                           sizeof(*tte), 0,
9192                           SOCKET_ID_ANY);
9193         if (!tte)
9194                 goto err;
9195         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9196                           &tte->flow_table);
9197         if (tte->flow_table >= MLX5_MAX_TABLES) {
9198                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
9199                         tte->flow_table);
9200                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9201                                 tte->flow_table);
9202                 goto err;
9203         } else if (!tte->flow_table) {
9204                 goto err;
9205         }
9206         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
9207         tte->tunnel_id = tbl.tunnel_id;
9208         tte->group = tbl.group;
9209         return &tte->hash;
9210 err:
9211         if (tte)
9212                 mlx5_free(tte);
9213         return NULL;
9214 }
9215
9216 static struct mlx5_list_entry *
9217 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
9218                                   struct mlx5_list_entry *oentry,
9219                                   void *cb_ctx __rte_unused)
9220 {
9221         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
9222                                                    0, SOCKET_ID_ANY);
9223
9224         if (!tte)
9225                 return NULL;
9226         memcpy(tte, oentry, sizeof(*tte));
9227         return &tte->hash;
9228 }
9229
9230 static void
9231 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
9232                                        struct mlx5_list_entry *entry)
9233 {
9234         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9235
9236         mlx5_free(tte);
9237 }
9238
9239 static uint32_t
9240 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
9241                                 const struct mlx5_flow_tunnel *tunnel,
9242                                 uint32_t group, uint32_t *table,
9243                                 struct rte_flow_error *error)
9244 {
9245         struct mlx5_list_entry *he;
9246         struct tunnel_tbl_entry *tte;
9247         union tunnel_tbl_key key = {
9248                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
9249                 .group = group
9250         };
9251         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9252         struct mlx5_hlist *group_hash;
9253         struct mlx5_flow_cb_ctx ctx = {
9254                 .data = &key.val,
9255         };
9256
9257         group_hash = tunnel ? tunnel->groups : thub->groups;
9258         he = mlx5_hlist_register(group_hash, key.val, &ctx);
9259         if (!he)
9260                 return rte_flow_error_set(error, EINVAL,
9261                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
9262                                           NULL,
9263                                           "tunnel group index not supported");
9264         tte = container_of(he, typeof(*tte), hash);
9265         *table = tte->flow_table;
9266         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
9267                 dev->data->port_id, key.tunnel_id, group, *table);
9268         return 0;
9269 }
9270
9271 static void
9272 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
9273                       struct mlx5_flow_tunnel *tunnel)
9274 {
9275         struct mlx5_priv *priv = dev->data->dev_private;
9276         struct mlx5_indexed_pool *ipool;
9277
9278         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
9279                 dev->data->port_id, tunnel->tunnel_id);
9280         LIST_REMOVE(tunnel, chain);
9281         mlx5_hlist_destroy(tunnel->groups);
9282         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9283         mlx5_ipool_free(ipool, tunnel->tunnel_id);
9284 }
9285
9286 static bool
9287 mlx5_access_tunnel_offload_db
9288         (struct rte_eth_dev *dev,
9289          bool (*match)(struct rte_eth_dev *,
9290                        struct mlx5_flow_tunnel *, const void *),
9291          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9292          void (*miss)(struct rte_eth_dev *, void *),
9293          void *ctx, bool lock_op)
9294 {
9295         bool verdict = false;
9296         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9297         struct mlx5_flow_tunnel *tunnel;
9298
9299         rte_spinlock_lock(&thub->sl);
9300         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
9301                 verdict = match(dev, tunnel, (const void *)ctx);
9302                 if (verdict)
9303                         break;
9304         }
9305         if (!lock_op)
9306                 rte_spinlock_unlock(&thub->sl);
9307         if (verdict && hit)
9308                 hit(dev, tunnel, ctx);
9309         if (!verdict && miss)
9310                 miss(dev, ctx);
9311         if (lock_op)
9312                 rte_spinlock_unlock(&thub->sl);
9313
9314         return verdict;
9315 }
9316
9317 struct tunnel_db_find_tunnel_id_ctx {
9318         uint32_t tunnel_id;
9319         struct mlx5_flow_tunnel *tunnel;
9320 };
9321
9322 static bool
9323 find_tunnel_id_match(struct rte_eth_dev *dev,
9324                      struct mlx5_flow_tunnel *tunnel, const void *x)
9325 {
9326         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9327
9328         RTE_SET_USED(dev);
9329         return tunnel->tunnel_id == ctx->tunnel_id;
9330 }
9331
9332 static void
9333 find_tunnel_id_hit(struct rte_eth_dev *dev,
9334                    struct mlx5_flow_tunnel *tunnel, void *x)
9335 {
9336         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9337         RTE_SET_USED(dev);
9338         ctx->tunnel = tunnel;
9339 }
9340
9341 static struct mlx5_flow_tunnel *
9342 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
9343 {
9344         struct tunnel_db_find_tunnel_id_ctx ctx = {
9345                 .tunnel_id = id,
9346         };
9347
9348         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
9349                                       find_tunnel_id_hit, NULL, &ctx, true);
9350
9351         return ctx.tunnel;
9352 }
9353
9354 static struct mlx5_flow_tunnel *
9355 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
9356                           const struct rte_flow_tunnel *app_tunnel)
9357 {
9358         struct mlx5_priv *priv = dev->data->dev_private;
9359         struct mlx5_indexed_pool *ipool;
9360         struct mlx5_flow_tunnel *tunnel;
9361         uint32_t id;
9362
9363         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9364         tunnel = mlx5_ipool_zmalloc(ipool, &id);
9365         if (!tunnel)
9366                 return NULL;
9367         if (id >= MLX5_MAX_TUNNELS) {
9368                 mlx5_ipool_free(ipool, id);
9369                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
9370                 return NULL;
9371         }
9372         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
9373                                            priv->sh,
9374                                            mlx5_flow_tunnel_grp2tbl_create_cb,
9375                                            mlx5_flow_tunnel_grp2tbl_match_cb,
9376                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
9377                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
9378                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9379         if (!tunnel->groups) {
9380                 mlx5_ipool_free(ipool, id);
9381                 return NULL;
9382         }
9383         /* initiate new PMD tunnel */
9384         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
9385         tunnel->tunnel_id = id;
9386         tunnel->action.type = (typeof(tunnel->action.type))
9387                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
9388         tunnel->action.conf = tunnel;
9389         tunnel->item.type = (typeof(tunnel->item.type))
9390                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
9391         tunnel->item.spec = tunnel;
9392         tunnel->item.last = NULL;
9393         tunnel->item.mask = NULL;
9394
9395         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
9396                 dev->data->port_id, tunnel->tunnel_id);
9397
9398         return tunnel;
9399 }
9400
9401 struct tunnel_db_get_tunnel_ctx {
9402         const struct rte_flow_tunnel *app_tunnel;
9403         struct mlx5_flow_tunnel *tunnel;
9404 };
9405
9406 static bool get_tunnel_match(struct rte_eth_dev *dev,
9407                              struct mlx5_flow_tunnel *tunnel, const void *x)
9408 {
9409         const struct tunnel_db_get_tunnel_ctx *ctx = x;
9410
9411         RTE_SET_USED(dev);
9412         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
9413                        sizeof(*ctx->app_tunnel));
9414 }
9415
9416 static void get_tunnel_hit(struct rte_eth_dev *dev,
9417                            struct mlx5_flow_tunnel *tunnel, void *x)
9418 {
9419         /* called under tunnel spinlock protection */
9420         struct tunnel_db_get_tunnel_ctx *ctx = x;
9421
9422         RTE_SET_USED(dev);
9423         tunnel->refctn++;
9424         ctx->tunnel = tunnel;
9425 }
9426
9427 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
9428 {
9429         /* called under tunnel spinlock protection */
9430         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9431         struct tunnel_db_get_tunnel_ctx *ctx = x;
9432
9433         rte_spinlock_unlock(&thub->sl);
9434         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
9435         rte_spinlock_lock(&thub->sl);
9436         if (ctx->tunnel) {
9437                 ctx->tunnel->refctn = 1;
9438                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
9439         }
9440 }
9441
9442
9443 static int
9444 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
9445                      const struct rte_flow_tunnel *app_tunnel,
9446                      struct mlx5_flow_tunnel **tunnel)
9447 {
9448         struct tunnel_db_get_tunnel_ctx ctx = {
9449                 .app_tunnel = app_tunnel,
9450         };
9451
9452         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9453                                       get_tunnel_miss, &ctx, true);
9454         *tunnel = ctx.tunnel;
9455         return ctx.tunnel ? 0 : -ENOMEM;
9456 }
9457
9458 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9459 {
9460         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9461
9462         if (!thub)
9463                 return;
9464         if (!LIST_EMPTY(&thub->tunnels))
9465                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9466         mlx5_hlist_destroy(thub->groups);
9467         mlx5_free(thub);
9468 }
9469
9470 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9471 {
9472         int err;
9473         struct mlx5_flow_tunnel_hub *thub;
9474
9475         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9476                            0, SOCKET_ID_ANY);
9477         if (!thub)
9478                 return -ENOMEM;
9479         LIST_INIT(&thub->tunnels);
9480         rte_spinlock_init(&thub->sl);
9481         thub->groups = mlx5_hlist_create("flow groups", 64,
9482                                          false, true, sh,
9483                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9484                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9485                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9486                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9487                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9488         if (!thub->groups) {
9489                 err = -rte_errno;
9490                 goto err;
9491         }
9492         sh->tunnel_hub = thub;
9493
9494         return 0;
9495
9496 err:
9497         if (thub->groups)
9498                 mlx5_hlist_destroy(thub->groups);
9499         if (thub)
9500                 mlx5_free(thub);
9501         return err;
9502 }
9503
9504 static inline bool
9505 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9506                           struct rte_flow_tunnel *tunnel,
9507                           const char *err_msg)
9508 {
9509         err_msg = NULL;
9510         if (!is_tunnel_offload_active(dev)) {
9511                 err_msg = "tunnel offload was not activated";
9512                 goto out;
9513         } else if (!tunnel) {
9514                 err_msg = "no application tunnel";
9515                 goto out;
9516         }
9517
9518         switch (tunnel->type) {
9519         default:
9520                 err_msg = "unsupported tunnel type";
9521                 goto out;
9522         case RTE_FLOW_ITEM_TYPE_VXLAN:
9523         case RTE_FLOW_ITEM_TYPE_GRE:
9524         case RTE_FLOW_ITEM_TYPE_NVGRE:
9525         case RTE_FLOW_ITEM_TYPE_GENEVE:
9526                 break;
9527         }
9528
9529 out:
9530         return !err_msg;
9531 }
9532
9533 static int
9534 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9535                     struct rte_flow_tunnel *app_tunnel,
9536                     struct rte_flow_action **actions,
9537                     uint32_t *num_of_actions,
9538                     struct rte_flow_error *error)
9539 {
9540         int ret;
9541         struct mlx5_flow_tunnel *tunnel;
9542         const char *err_msg = NULL;
9543         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9544
9545         if (!verdict)
9546                 return rte_flow_error_set(error, EINVAL,
9547                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9548                                           err_msg);
9549         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9550         if (ret < 0) {
9551                 return rte_flow_error_set(error, ret,
9552                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9553                                           "failed to initialize pmd tunnel");
9554         }
9555         *actions = &tunnel->action;
9556         *num_of_actions = 1;
9557         return 0;
9558 }
9559
9560 static int
9561 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9562                        struct rte_flow_tunnel *app_tunnel,
9563                        struct rte_flow_item **items,
9564                        uint32_t *num_of_items,
9565                        struct rte_flow_error *error)
9566 {
9567         int ret;
9568         struct mlx5_flow_tunnel *tunnel;
9569         const char *err_msg = NULL;
9570         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9571
9572         if (!verdict)
9573                 return rte_flow_error_set(error, EINVAL,
9574                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9575                                           err_msg);
9576         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9577         if (ret < 0) {
9578                 return rte_flow_error_set(error, ret,
9579                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9580                                           "failed to initialize pmd tunnel");
9581         }
9582         *items = &tunnel->item;
9583         *num_of_items = 1;
9584         return 0;
9585 }
9586
9587 struct tunnel_db_element_release_ctx {
9588         struct rte_flow_item *items;
9589         struct rte_flow_action *actions;
9590         uint32_t num_elements;
9591         struct rte_flow_error *error;
9592         int ret;
9593 };
9594
9595 static bool
9596 tunnel_element_release_match(struct rte_eth_dev *dev,
9597                              struct mlx5_flow_tunnel *tunnel, const void *x)
9598 {
9599         const struct tunnel_db_element_release_ctx *ctx = x;
9600
9601         RTE_SET_USED(dev);
9602         if (ctx->num_elements != 1)
9603                 return false;
9604         else if (ctx->items)
9605                 return ctx->items == &tunnel->item;
9606         else if (ctx->actions)
9607                 return ctx->actions == &tunnel->action;
9608
9609         return false;
9610 }
9611
9612 static void
9613 tunnel_element_release_hit(struct rte_eth_dev *dev,
9614                            struct mlx5_flow_tunnel *tunnel, void *x)
9615 {
9616         struct tunnel_db_element_release_ctx *ctx = x;
9617         ctx->ret = 0;
9618         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9619                 mlx5_flow_tunnel_free(dev, tunnel);
9620 }
9621
9622 static void
9623 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9624 {
9625         struct tunnel_db_element_release_ctx *ctx = x;
9626         RTE_SET_USED(dev);
9627         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9628                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9629                                       "invalid argument");
9630 }
9631
9632 static int
9633 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9634                        struct rte_flow_item *pmd_items,
9635                        uint32_t num_items, struct rte_flow_error *err)
9636 {
9637         struct tunnel_db_element_release_ctx ctx = {
9638                 .items = pmd_items,
9639                 .actions = NULL,
9640                 .num_elements = num_items,
9641                 .error = err,
9642         };
9643
9644         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9645                                       tunnel_element_release_hit,
9646                                       tunnel_element_release_miss, &ctx, false);
9647
9648         return ctx.ret;
9649 }
9650
9651 static int
9652 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9653                          struct rte_flow_action *pmd_actions,
9654                          uint32_t num_actions, struct rte_flow_error *err)
9655 {
9656         struct tunnel_db_element_release_ctx ctx = {
9657                 .items = NULL,
9658                 .actions = pmd_actions,
9659                 .num_elements = num_actions,
9660                 .error = err,
9661         };
9662
9663         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9664                                       tunnel_element_release_hit,
9665                                       tunnel_element_release_miss, &ctx, false);
9666
9667         return ctx.ret;
9668 }
9669
9670 static int
9671 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9672                                   struct rte_mbuf *m,
9673                                   struct rte_flow_restore_info *info,
9674                                   struct rte_flow_error *err)
9675 {
9676         uint64_t ol_flags = m->ol_flags;
9677         const struct mlx5_flow_tbl_data_entry *tble;
9678         const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
9679
9680         if (!is_tunnel_offload_active(dev)) {
9681                 info->flags = 0;
9682                 return 0;
9683         }
9684
9685         if ((ol_flags & mask) != mask)
9686                 goto err;
9687         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9688         if (!tble) {
9689                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9690                         dev->data->port_id, m->hash.fdir.hi);
9691                 goto err;
9692         }
9693         MLX5_ASSERT(tble->tunnel);
9694         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9695         info->group_id = tble->group_id;
9696         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9697                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9698                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9699
9700         return 0;
9701
9702 err:
9703         return rte_flow_error_set(err, EINVAL,
9704                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9705                                   "failed to get restore info");
9706 }
9707
9708 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9709 static int
9710 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9711                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9712                            __rte_unused struct rte_flow_action **actions,
9713                            __rte_unused uint32_t *num_of_actions,
9714                            __rte_unused struct rte_flow_error *error)
9715 {
9716         return -ENOTSUP;
9717 }
9718
9719 static int
9720 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9721                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9722                        __rte_unused struct rte_flow_item **items,
9723                        __rte_unused uint32_t *num_of_items,
9724                        __rte_unused struct rte_flow_error *error)
9725 {
9726         return -ENOTSUP;
9727 }
9728
9729 static int
9730 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9731                               __rte_unused struct rte_flow_item *pmd_items,
9732                               __rte_unused uint32_t num_items,
9733                               __rte_unused struct rte_flow_error *err)
9734 {
9735         return -ENOTSUP;
9736 }
9737
9738 static int
9739 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9740                                 __rte_unused struct rte_flow_action *pmd_action,
9741                                 __rte_unused uint32_t num_actions,
9742                                 __rte_unused struct rte_flow_error *err)
9743 {
9744         return -ENOTSUP;
9745 }
9746
9747 static int
9748 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9749                                   __rte_unused struct rte_mbuf *m,
9750                                   __rte_unused struct rte_flow_restore_info *i,
9751                                   __rte_unused struct rte_flow_error *err)
9752 {
9753         return -ENOTSUP;
9754 }
9755
9756 static int
9757 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9758                              __rte_unused struct rte_flow *flow,
9759                              __rte_unused const struct rte_flow_attr *attr,
9760                              __rte_unused const struct rte_flow_action *actions,
9761                              __rte_unused uint32_t flow_idx,
9762                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9763                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9764                              __rte_unused struct rte_flow_error *error)
9765 {
9766         return -ENOTSUP;
9767 }
9768
9769 static struct mlx5_flow_tunnel *
9770 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9771                     __rte_unused uint32_t id)
9772 {
9773         return NULL;
9774 }
9775
9776 static void
9777 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9778                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9779 {
9780 }
9781
9782 static uint32_t
9783 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9784                                 __rte_unused const struct mlx5_flow_tunnel *t,
9785                                 __rte_unused uint32_t group,
9786                                 __rte_unused uint32_t *table,
9787                                 struct rte_flow_error *error)
9788 {
9789         return rte_flow_error_set(error, ENOTSUP,
9790                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9791                                   "tunnel offload requires DV support");
9792 }
9793
9794 void
9795 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9796                         __rte_unused  uint16_t port_id)
9797 {
9798 }
9799 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9800
9801 /* Flex flow item API */
9802 static struct rte_flow_item_flex_handle *
9803 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
9804                            const struct rte_flow_item_flex_conf *conf,
9805                            struct rte_flow_error *error)
9806 {
9807         static const char err_msg[] = "flex item creation unsupported";
9808         struct rte_flow_attr attr = { .transfer = 0 };
9809         const struct mlx5_flow_driver_ops *fops =
9810                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9811
9812         if (!fops->item_create) {
9813                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9814                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9815                                    NULL, err_msg);
9816                 return NULL;
9817         }
9818         return fops->item_create(dev, conf, error);
9819 }
9820
9821 static int
9822 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
9823                             const struct rte_flow_item_flex_handle *handle,
9824                             struct rte_flow_error *error)
9825 {
9826         static const char err_msg[] = "flex item release unsupported";
9827         struct rte_flow_attr attr = { .transfer = 0 };
9828         const struct mlx5_flow_driver_ops *fops =
9829                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9830
9831         if (!fops->item_release) {
9832                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9833                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9834                                    NULL, err_msg);
9835                 return -rte_errno;
9836         }
9837         return fops->item_release(dev, handle, error);
9838 }
9839
9840 static void
9841 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9842 {
9843         int ret;
9844         struct rte_flow_error error;
9845
9846         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9847                 char *item_name;
9848                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9849                                     sizeof(item_name),
9850                                     (void *)(uintptr_t)item->type, &error);
9851                 if (ret > 0)
9852                         printf("%s ", item_name);
9853                 else
9854                         printf("%d\n", (int)item->type);
9855         }
9856         printf("END\n");
9857 }
9858
9859 static int
9860 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
9861 {
9862         const struct rte_flow_item_udp *spec = udp_item->spec;
9863         const struct rte_flow_item_udp *mask = udp_item->mask;
9864         uint16_t udp_dport = 0;
9865
9866         if (spec != NULL) {
9867                 if (!mask)
9868                         mask = &rte_flow_item_udp_mask;
9869                 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
9870                                 mask->hdr.dst_port);
9871         }
9872         return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
9873 }
9874
9875 static const struct mlx5_flow_expand_node *
9876 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
9877                 unsigned int item_idx,
9878                 const struct mlx5_flow_expand_node graph[],
9879                 const struct mlx5_flow_expand_node *node)
9880 {
9881         const struct rte_flow_item *item = pattern + item_idx, *prev_item;
9882
9883         if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN &&
9884                         node != NULL &&
9885                         node->type == RTE_FLOW_ITEM_TYPE_VXLAN) {
9886                 /*
9887                  * The expansion node is VXLAN and it is also the last
9888                  * expandable item in the pattern, so need to continue
9889                  * expansion of the inner tunnel.
9890                  */
9891                 MLX5_ASSERT(item_idx > 0);
9892                 prev_item = pattern + item_idx - 1;
9893                 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
9894                 if (mlx5_flow_is_std_vxlan_port(prev_item))
9895                         return &graph[MLX5_EXPANSION_STD_VXLAN];
9896                 return &graph[MLX5_EXPANSION_L3_VXLAN];
9897         }
9898         return node;
9899 }
9900
9901 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
9902 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
9903         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
9904 };
9905
9906 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
9907 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
9908         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
9909         { 9, 10, 11 }, { 12, 13, 14 },
9910 };
9911
9912 /**
9913  * Discover the number of available flow priorities.
9914  *
9915  * @param dev
9916  *   Ethernet device.
9917  *
9918  * @return
9919  *   On success, number of available flow priorities.
9920  *   On failure, a negative errno-style code and rte_errno is set.
9921  */
9922 int
9923 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
9924 {
9925         static const uint16_t vprio[] = {8, 16};
9926         const struct mlx5_priv *priv = dev->data->dev_private;
9927         const struct mlx5_flow_driver_ops *fops;
9928         enum mlx5_flow_drv_type type;
9929         int ret;
9930
9931         type = mlx5_flow_os_get_type();
9932         if (type == MLX5_FLOW_TYPE_MAX) {
9933                 type = MLX5_FLOW_TYPE_VERBS;
9934                 if (priv->sh->devx && priv->config.dv_flow_en)
9935                         type = MLX5_FLOW_TYPE_DV;
9936         }
9937         fops = flow_get_drv_ops(type);
9938         if (fops->discover_priorities == NULL) {
9939                 DRV_LOG(ERR, "Priority discovery not supported");
9940                 rte_errno = ENOTSUP;
9941                 return -rte_errno;
9942         }
9943         ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio));
9944         if (ret < 0)
9945                 return ret;
9946         switch (ret) {
9947         case 8:
9948                 ret = RTE_DIM(priority_map_3);
9949                 break;
9950         case 16:
9951                 ret = RTE_DIM(priority_map_5);
9952                 break;
9953         default:
9954                 rte_errno = ENOTSUP;
9955                 DRV_LOG(ERR,
9956                         "port %u maximum priority: %d expected 8/16",
9957                         dev->data->port_id, ret);
9958                 return -rte_errno;
9959         }
9960         DRV_LOG(INFO, "port %u supported flow priorities:"
9961                 " 0-%d for ingress or egress root table,"
9962                 " 0-%d for non-root table or transfer root table.",
9963                 dev->data->port_id, ret - 2,
9964                 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1);
9965         return ret;
9966 }
9967
9968 /**
9969  * Adjust flow priority based on the highest layer and the request priority.
9970  *
9971  * @param[in] dev
9972  *   Pointer to the Ethernet device structure.
9973  * @param[in] priority
9974  *   The rule base priority.
9975  * @param[in] subpriority
9976  *   The priority based on the items.
9977  *
9978  * @return
9979  *   The new priority.
9980  */
9981 uint32_t
9982 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
9983                           uint32_t subpriority)
9984 {
9985         uint32_t res = 0;
9986         struct mlx5_priv *priv = dev->data->dev_private;
9987
9988         switch (priv->sh->flow_max_priority) {
9989         case RTE_DIM(priority_map_3):
9990                 res = priority_map_3[priority][subpriority];
9991                 break;
9992         case RTE_DIM(priority_map_5):
9993                 res = priority_map_5[priority][subpriority];
9994                 break;
9995         }
9996         return  res;
9997 }